elink3.c revision 1.6 1 /* $NetBSD: elink3.c,v 1.6 1996/05/10 05:28:06 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 1994 Herb Peyerl <hpeyerl (at) beer.org>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Herb Peyerl.
18 * 4. The name of Herb Peyerl may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #include "bpfilter.h"
34
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/mbuf.h>
38 #include <sys/socket.h>
39 #include <sys/ioctl.h>
40 #include <sys/errno.h>
41 #include <sys/syslog.h>
42 #include <sys/select.h>
43 #include <sys/device.h>
44
45 #include <net/if.h>
46 #include <net/netisr.h>
47 #include <net/if_dl.h>
48 #include <net/if_types.h>
49 #include <net/netisr.h>
50
51 #ifdef INET
52 #include <netinet/in.h>
53 #include <netinet/in_systm.h>
54 #include <netinet/in_var.h>
55 #include <netinet/ip.h>
56 #include <netinet/if_ether.h>
57 #endif
58
59 #ifdef NS
60 #include <netns/ns.h>
61 #include <netns/ns_if.h>
62 #endif
63
64 #if NBPFILTER > 0
65 #include <net/bpf.h>
66 #include <net/bpfdesc.h>
67 #endif
68
69 #include <machine/cpu.h>
70 #include <machine/bus.h>
71
72 #include <dev/ic/elink3var.h>
73 #include <dev/ic/elink3reg.h>
74
75 #define ETHER_MIN_LEN 64
76 #define ETHER_MAX_LEN 1518
77 #define ETHER_ADDR_LEN 6
78
79 struct cfdriver ep_cd = {
80 NULL, "ep", DV_IFNET
81 };
82
83 static void eptxstat __P((struct ep_softc *));
84 static int epstatus __P((struct ep_softc *));
85 void epinit __P((struct ep_softc *));
86 int epioctl __P((struct ifnet *, u_long, caddr_t));
87 void epstart __P((struct ifnet *));
88 void epwatchdog __P((struct ifnet *));
89 void epreset __P((struct ep_softc *));
90 void epread __P((struct ep_softc *));
91 struct mbuf *epget __P((struct ep_softc *, int));
92 void epmbuffill __P((void *));
93 void epmbufempty __P((struct ep_softc *));
94 void epsetfilter __P((struct ep_softc *));
95 void epsetlink __P((struct ep_softc *));
96
97 static int epbusyeeprom __P((struct ep_softc *));
98
99 void
100 epconfig(sc, conn)
101 struct ep_softc *sc;
102 u_int conn;
103 {
104 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
105 bus_chipset_tag_t bc = sc->sc_bc;
106 bus_io_handle_t ioh = sc->sc_ioh;
107 u_short i;
108
109 sc->ep_connectors = 0;
110 printf("%s: ", sc->sc_dev.dv_xname);
111 if (conn & IS_AUI) {
112 printf("aui");
113 sc->ep_connectors |= AUI;
114 }
115 if (conn & IS_BNC) {
116 if (sc->ep_connectors)
117 printf("/");
118 printf("bnc");
119 sc->ep_connectors |= BNC;
120 }
121 if (conn & IS_UTP) {
122 if (sc->ep_connectors)
123 printf("/");
124 printf("utp");
125 sc->ep_connectors |= UTP;
126 }
127 if (!sc->ep_connectors)
128 printf("no connectors!");
129
130 /*
131 * Read the station address from the eeprom
132 */
133 for (i = 0; i < 3; i++) {
134 u_short x;
135 if (epbusyeeprom(sc))
136 return;
137 bus_io_write_2(bc, ioh, EP_W0_EEPROM_COMMAND, READ_EEPROM | i);
138 if (epbusyeeprom(sc))
139 return;
140 x = bus_io_read_2(bc, ioh, EP_W0_EEPROM_DATA);
141 sc->sc_arpcom.ac_enaddr[(i << 1)] = x >> 8;
142 sc->sc_arpcom.ac_enaddr[(i << 1) + 1] = x;
143 }
144
145 printf(" address %s\n", ether_sprintf(sc->sc_arpcom.ac_enaddr));
146
147 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
148 ifp->if_softc = sc;
149 ifp->if_start = epstart;
150 ifp->if_ioctl = epioctl;
151 ifp->if_watchdog = epwatchdog;
152 ifp->if_flags =
153 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
154
155 if_attach(ifp);
156 ether_ifattach(ifp);
157
158 #if NBPFILTER > 0
159 bpfattach(&sc->sc_arpcom.ac_if.if_bpf, ifp, DLT_EN10MB,
160 sizeof(struct ether_header));
161 #endif
162
163 sc->tx_start_thresh = 20; /* probably a good starting point. */
164 }
165
166 /*
167 * The order in here seems important. Otherwise we may not receive
168 * interrupts. ?!
169 */
170 void
171 epinit(sc)
172 register struct ep_softc *sc;
173 {
174 register struct ifnet *ifp = &sc->sc_arpcom.ac_if;
175 bus_chipset_tag_t bc = sc->sc_bc;
176 bus_io_handle_t ioh = sc->sc_ioh;
177 int i;
178
179 while (bus_io_read_2(bc, ioh, EP_STATUS) & S_COMMAND_IN_PROGRESS)
180 ;
181
182 if (sc->bustype != EP_BUS_PCI) {
183 GO_WINDOW(0);
184 bus_io_write_2(bc, ioh, EP_W0_CONFIG_CTRL, 0);
185 bus_io_write_2(bc, ioh, EP_W0_CONFIG_CTRL, ENABLE_DRQ_IRQ);
186 }
187
188 if (sc->bustype == EP_BUS_PCMCIA) {
189 #ifdef EP_COAX_DEFAULT
190 bus_io_write_2(bc, ioh, EP_W0_ADDRESS_CFG,3<<14);
191 #else
192 bus_io_write_2(bc, ioh, EP_W0_ADDRESS_CFG,0<<14);
193 #endif
194 bus_io_write_2(bc, ioh, EP_W0_RESOURCE_CFG, 0x3f00);
195 }
196
197 GO_WINDOW(2);
198 for (i = 0; i < 6; i++) /* Reload the ether_addr. */
199 bus_io_write_1(bc, ioh, EP_W2_ADDR_0 + i,
200 sc->sc_arpcom.ac_enaddr[i]);
201
202 bus_io_write_2(bc, ioh, EP_COMMAND, RX_RESET);
203 bus_io_write_2(bc, ioh, EP_COMMAND, TX_RESET);
204
205 GO_WINDOW(1); /* Window 1 is operating window */
206 for (i = 0; i < 31; i++)
207 bus_io_read_1(bc, ioh, EP_W1_TX_STATUS);
208
209 bus_io_write_2(bc, ioh, EP_COMMAND, SET_RD_0_MASK | S_CARD_FAILURE |
210 S_RX_COMPLETE | S_TX_COMPLETE | S_TX_AVAIL);
211 bus_io_write_2(bc, ioh, EP_COMMAND, SET_INTR_MASK | S_CARD_FAILURE |
212 S_RX_COMPLETE | S_TX_COMPLETE | S_TX_AVAIL);
213
214 /*
215 * Attempt to get rid of any stray interrupts that occured during
216 * configuration. On the i386 this isn't possible because one may
217 * already be queued. However, a single stray interrupt is
218 * unimportant.
219 */
220 bus_io_write_2(bc, ioh, EP_COMMAND, ACK_INTR | 0xff);
221
222 epsetfilter(sc);
223 epsetlink(sc);
224
225 bus_io_write_2(bc, ioh, EP_COMMAND, RX_ENABLE);
226 bus_io_write_2(bc, ioh, EP_COMMAND, TX_ENABLE);
227
228 epmbuffill(sc);
229
230 /* Interface is now `running', with no output active. */
231 ifp->if_flags |= IFF_RUNNING;
232 ifp->if_flags &= ~IFF_OACTIVE;
233
234 /* Attempt to start output, if any. */
235 epstart(ifp);
236 }
237
238 void
239 epsetfilter(sc)
240 register struct ep_softc *sc;
241 {
242 register struct ifnet *ifp = &sc->sc_arpcom.ac_if;
243
244 GO_WINDOW(1); /* Window 1 is operating window */
245 bus_io_write_2(sc->sc_bc, sc->sc_ioh, EP_COMMAND, SET_RX_FILTER |
246 FIL_INDIVIDUAL | FIL_BRDCST |
247 ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0 ) |
248 ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0 ));
249 }
250
251 void
252 epsetlink(sc)
253 register struct ep_softc *sc;
254 {
255 register struct ifnet *ifp = &sc->sc_arpcom.ac_if;
256 bus_chipset_tag_t bc = sc->sc_bc;
257 bus_io_handle_t ioh = sc->sc_ioh;
258
259 /*
260 * you can `ifconfig (link0|-link0) ep0' to get the following
261 * behaviour:
262 * -link0 disable AUI/UTP. enable BNC.
263 * link0 disable BNC. enable AUI.
264 * link1 if the card has a UTP connector, and link0 is
265 * set too, then you get the UTP port.
266 */
267 GO_WINDOW(4);
268 bus_io_write_2(bc, ioh, EP_W4_MEDIA_TYPE, DISABLE_UTP);
269 if (!(ifp->if_flags & IFF_LINK0) && (sc->ep_connectors & BNC)) {
270 if (sc->bustype == EP_BUS_PCMCIA) {
271 GO_WINDOW(0);
272 bus_io_write_2(bc, ioh, EP_W0_ADDRESS_CFG,3<<14);
273 GO_WINDOW(1);
274 }
275 bus_io_write_2(bc, ioh, EP_COMMAND, START_TRANSCEIVER);
276 delay(1000);
277 }
278 if (ifp->if_flags & IFF_LINK0) {
279 bus_io_write_2(bc, ioh, EP_COMMAND, STOP_TRANSCEIVER);
280 delay(1000);
281 if ((ifp->if_flags & IFF_LINK1) && (sc->ep_connectors & UTP)) {
282 if (sc->bustype == EP_BUS_PCMCIA) {
283 GO_WINDOW(0);
284 bus_io_write_2(bc, ioh,
285 EP_W0_ADDRESS_CFG,0<<14);
286 GO_WINDOW(4);
287 }
288 bus_io_write_2(bc, ioh, EP_W4_MEDIA_TYPE, ENABLE_UTP);
289 }
290 }
291 GO_WINDOW(1);
292 }
293
294 /*
295 * Start outputting on the interface.
296 * Always called as splnet().
297 */
298 void
299 epstart(ifp)
300 struct ifnet *ifp;
301 {
302 register struct ep_softc *sc = ifp->if_softc;
303 bus_chipset_tag_t bc = sc->sc_bc;
304 bus_io_handle_t ioh = sc->sc_ioh;
305 struct mbuf *m, *m0;
306 int sh, len, pad;
307
308 /* Don't transmit if interface is busy or not running */
309 if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING)
310 return;
311
312 startagain:
313 /* Sneak a peek at the next packet */
314 m0 = ifp->if_snd.ifq_head;
315 if (m0 == 0)
316 return;
317
318 /* We need to use m->m_pkthdr.len, so require the header */
319 if ((m0->m_flags & M_PKTHDR) == 0)
320 panic("epstart: no header mbuf");
321 len = m0->m_pkthdr.len;
322
323 pad = (4 - len) & 3;
324
325 /*
326 * The 3c509 automatically pads short packets to minimum ethernet
327 * length, but we drop packets that are too large. Perhaps we should
328 * truncate them instead?
329 */
330 if (len + pad > ETHER_MAX_LEN) {
331 /* packet is obviously too large: toss it */
332 ++ifp->if_oerrors;
333 IF_DEQUEUE(&ifp->if_snd, m0);
334 m_freem(m0);
335 goto readcheck;
336 }
337
338 if (bus_io_read_2(bc, ioh, EP_W1_FREE_TX) < len + pad + 4) {
339 bus_io_write_2(bc, ioh, EP_COMMAND,
340 SET_TX_AVAIL_THRESH | (len + pad + 4));
341 /* not enough room in FIFO */
342 ifp->if_flags |= IFF_OACTIVE;
343 return;
344 } else {
345 bus_io_write_2(bc, ioh, EP_COMMAND,
346 SET_TX_AVAIL_THRESH | 2044);
347 }
348
349 IF_DEQUEUE(&ifp->if_snd, m0);
350 if (m0 == 0) /* not really needed */
351 return;
352
353 bus_io_write_2(bc, ioh, EP_COMMAND, SET_TX_START_THRESH |
354 (len / 4 + sc->tx_start_thresh));
355
356 #if NBPFILTER > 0
357 if (ifp->if_bpf)
358 bpf_mtap(ifp->if_bpf, m0);
359 #endif
360
361 /*
362 * Do the output at splhigh() so that an interrupt from another device
363 * won't cause a FIFO underrun.
364 */
365 sh = splhigh();
366
367 bus_io_write_2(bc, ioh, EP_W1_TX_PIO_WR_1, len);
368 bus_io_write_2(bc, ioh, EP_W1_TX_PIO_WR_1,
369 0xffff); /* Second dword meaningless */
370 if (EP_IS_BUS_32(sc->bustype)) {
371 for (m = m0; m; ) {
372 if (m->m_len > 3)
373 bus_io_write_multi_4(bc, ioh,
374 EP_W1_TX_PIO_WR_1, mtod(m, u_int32_t *),
375 m->m_len / 4);
376 if (m->m_len & 3)
377 bus_io_write_multi_1(bc, ioh,
378 EP_W1_TX_PIO_WR_1,
379 mtod(m, u_int8_t *) + (m->m_len & ~3),
380 m->m_len & 3);
381 MFREE(m, m0);
382 m = m0;
383 }
384 } else {
385 for (m = m0; m; ) {
386 if (m->m_len > 1)
387 bus_io_write_multi_2(bc, ioh,
388 EP_W1_TX_PIO_WR_1, mtod(m, u_int16_t *),
389 m->m_len / 2);
390 if (m->m_len & 1)
391 bus_io_write_1(bc, ioh, EP_W1_TX_PIO_WR_1,
392 *(mtod(m, u_int8_t *) + m->m_len - 1));
393 MFREE(m, m0);
394 m = m0;
395 }
396 }
397 while (pad--)
398 bus_io_write_1(bc, ioh, EP_W1_TX_PIO_WR_1, 0);
399
400 splx(sh);
401
402 ++ifp->if_opackets;
403
404 readcheck:
405 if ((bus_io_read_2(bc, ioh, EP_W1_RX_STATUS) & ERR_INCOMPLETE) == 0) {
406 /* We received a complete packet. */
407 u_short status = bus_io_read_2(bc, ioh, EP_STATUS);
408
409 if ((status & S_INTR_LATCH) == 0) {
410 /*
411 * No interrupt, read the packet and continue
412 * Is this supposed to happen? Is my motherboard
413 * completely busted?
414 */
415 epread(sc);
416 }
417 else
418 /* Got an interrupt, return so that it gets serviced. */
419 return;
420 }
421 else {
422 /* Check if we are stuck and reset [see XXX comment] */
423 if (epstatus(sc)) {
424 if (ifp->if_flags & IFF_DEBUG)
425 printf("%s: adapter reset\n",
426 sc->sc_dev.dv_xname);
427 epreset(sc);
428 }
429 }
430
431 goto startagain;
432 }
433
434
435 /*
436 * XXX: The 3c509 card can get in a mode where both the fifo status bit
437 * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set
438 * We detect this situation and we reset the adapter.
439 * It happens at times when there is a lot of broadcast traffic
440 * on the cable (once in a blue moon).
441 */
442 static int
443 epstatus(sc)
444 register struct ep_softc *sc;
445 {
446 bus_chipset_tag_t bc = sc->sc_bc;
447 bus_io_handle_t ioh = sc->sc_ioh;
448 u_short fifost;
449
450 /*
451 * Check the FIFO status and act accordingly
452 */
453 GO_WINDOW(4);
454 fifost = bus_io_read_2(bc, ioh, EP_W4_FIFO_DIAG);
455 GO_WINDOW(1);
456
457 if (fifost & FIFOS_RX_UNDERRUN) {
458 if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
459 printf("%s: RX underrun\n", sc->sc_dev.dv_xname);
460 epreset(sc);
461 return 0;
462 }
463
464 if (fifost & FIFOS_RX_STATUS_OVERRUN) {
465 if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
466 printf("%s: RX Status overrun\n", sc->sc_dev.dv_xname);
467 return 1;
468 }
469
470 if (fifost & FIFOS_RX_OVERRUN) {
471 if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
472 printf("%s: RX overrun\n", sc->sc_dev.dv_xname);
473 return 1;
474 }
475
476 if (fifost & FIFOS_TX_OVERRUN) {
477 if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
478 printf("%s: TX overrun\n", sc->sc_dev.dv_xname);
479 epreset(sc);
480 return 0;
481 }
482
483 return 0;
484 }
485
486
487 static void
488 eptxstat(sc)
489 register struct ep_softc *sc;
490 {
491 bus_chipset_tag_t bc = sc->sc_bc;
492 bus_io_handle_t ioh = sc->sc_ioh;
493 int i;
494
495 /*
496 * We need to read+write TX_STATUS until we get a 0 status
497 * in order to turn off the interrupt flag.
498 */
499 while ((i = bus_io_read_1(bc, ioh, EP_W1_TX_STATUS)) & TXS_COMPLETE) {
500 bus_io_write_1(bc, ioh, EP_W1_TX_STATUS, 0x0);
501
502 if (i & TXS_JABBER) {
503 ++sc->sc_arpcom.ac_if.if_oerrors;
504 if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
505 printf("%s: jabber (%x)\n",
506 sc->sc_dev.dv_xname, i);
507 epreset(sc);
508 } else if (i & TXS_UNDERRUN) {
509 ++sc->sc_arpcom.ac_if.if_oerrors;
510 if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
511 printf("%s: fifo underrun (%x) @%d\n",
512 sc->sc_dev.dv_xname, i,
513 sc->tx_start_thresh);
514 if (sc->tx_succ_ok < 100)
515 sc->tx_start_thresh = min(ETHER_MAX_LEN,
516 sc->tx_start_thresh + 20);
517 sc->tx_succ_ok = 0;
518 epreset(sc);
519 } else if (i & TXS_MAX_COLLISION) {
520 ++sc->sc_arpcom.ac_if.if_collisions;
521 bus_io_write_2(bc, ioh, EP_COMMAND, TX_ENABLE);
522 sc->sc_arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
523 } else
524 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127;
525 }
526 }
527
528 int
529 epintr(arg)
530 void *arg;
531 {
532 register struct ep_softc *sc = arg;
533 bus_chipset_tag_t bc = sc->sc_bc;
534 bus_io_handle_t ioh = sc->sc_ioh;
535 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
536 u_short status;
537 int ret = 0;
538
539 for (;;) {
540 bus_io_write_2(bc, ioh, EP_COMMAND, C_INTR_LATCH);
541
542 status = bus_io_read_2(bc, ioh, EP_STATUS);
543
544 if ((status & (S_TX_COMPLETE | S_TX_AVAIL |
545 S_RX_COMPLETE | S_CARD_FAILURE)) == 0)
546 break;
547
548 ret = 1;
549
550 /*
551 * Acknowledge any interrupts. It's important that we do this
552 * first, since there would otherwise be a race condition.
553 * Due to the i386 interrupt queueing, we may get spurious
554 * interrupts occasionally.
555 */
556 bus_io_write_2(bc, ioh, EP_COMMAND, ACK_INTR | status);
557
558 if (status & S_RX_COMPLETE)
559 epread(sc);
560 if (status & S_TX_AVAIL) {
561 sc->sc_arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
562 epstart(&sc->sc_arpcom.ac_if);
563 }
564 if (status & S_CARD_FAILURE) {
565 printf("%s: adapter failure (%x)\n",
566 sc->sc_dev.dv_xname, status);
567 epreset(sc);
568 return (1);
569 }
570 if (status & S_TX_COMPLETE) {
571 eptxstat(sc);
572 epstart(ifp);
573 }
574 }
575
576 /* no more interrupts */
577 return (ret);
578 }
579
580 void
581 epread(sc)
582 register struct ep_softc *sc;
583 {
584 bus_chipset_tag_t bc = sc->sc_bc;
585 bus_io_handle_t ioh = sc->sc_ioh;
586 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
587 struct mbuf *m;
588 struct ether_header *eh;
589 int len;
590
591 len = bus_io_read_2(bc, ioh, EP_W1_RX_STATUS);
592
593 again:
594 if (ifp->if_flags & IFF_DEBUG) {
595 int err = len & ERR_MASK;
596 char *s = NULL;
597
598 if (len & ERR_INCOMPLETE)
599 s = "incomplete packet";
600 else if (err == ERR_OVERRUN)
601 s = "packet overrun";
602 else if (err == ERR_RUNT)
603 s = "runt packet";
604 else if (err == ERR_ALIGNMENT)
605 s = "bad alignment";
606 else if (err == ERR_CRC)
607 s = "bad crc";
608 else if (err == ERR_OVERSIZE)
609 s = "oversized packet";
610 else if (err == ERR_DRIBBLE)
611 s = "dribble bits";
612
613 if (s)
614 printf("%s: %s\n", sc->sc_dev.dv_xname, s);
615 }
616
617 if (len & ERR_INCOMPLETE)
618 return;
619
620 if (len & ERR_RX) {
621 ++ifp->if_ierrors;
622 goto abort;
623 }
624
625 len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */
626
627 /* Pull packet off interface. */
628 m = epget(sc, len);
629 if (m == 0) {
630 ifp->if_ierrors++;
631 goto abort;
632 }
633
634 ++ifp->if_ipackets;
635
636 /* We assume the header fit entirely in one mbuf. */
637 eh = mtod(m, struct ether_header *);
638
639 #if NBPFILTER > 0
640 /*
641 * Check if there's a BPF listener on this interface.
642 * If so, hand off the raw packet to BPF.
643 */
644 if (ifp->if_bpf) {
645 bpf_mtap(ifp->if_bpf, m);
646
647 /*
648 * Note that the interface cannot be in promiscuous mode if
649 * there are no BPF listeners. And if we are in promiscuous
650 * mode, we have to check if this packet is really ours.
651 */
652 if ((ifp->if_flags & IFF_PROMISC) &&
653 (eh->ether_dhost[0] & 1) == 0 && /* !mcast and !bcast */
654 bcmp(eh->ether_dhost, sc->sc_arpcom.ac_enaddr,
655 sizeof(eh->ether_dhost)) != 0) {
656 m_freem(m);
657 return;
658 }
659 }
660 #endif
661
662 /* We assume the header fit entirely in one mbuf. */
663 m_adj(m, sizeof(struct ether_header));
664 ether_input(ifp, eh, m);
665
666 /*
667 * In periods of high traffic we can actually receive enough
668 * packets so that the fifo overrun bit will be set at this point,
669 * even though we just read a packet. In this case we
670 * are not going to receive any more interrupts. We check for
671 * this condition and read again until the fifo is not full.
672 * We could simplify this test by not using epstatus(), but
673 * rechecking the RX_STATUS register directly. This test could
674 * result in unnecessary looping in cases where there is a new
675 * packet but the fifo is not full, but it will not fix the
676 * stuck behavior.
677 *
678 * Even with this improvement, we still get packet overrun errors
679 * which are hurting performance. Maybe when I get some more time
680 * I'll modify epread() so that it can handle RX_EARLY interrupts.
681 */
682 if (epstatus(sc)) {
683 len = bus_io_read_2(bc, ioh, EP_W1_RX_STATUS);
684 /* Check if we are stuck and reset [see XXX comment] */
685 if (len & ERR_INCOMPLETE) {
686 if (ifp->if_flags & IFF_DEBUG)
687 printf("%s: adapter reset\n",
688 sc->sc_dev.dv_xname);
689 epreset(sc);
690 return;
691 }
692 goto again;
693 }
694
695 return;
696
697 abort:
698 bus_io_write_2(bc, ioh, EP_COMMAND, RX_DISCARD_TOP_PACK);
699 while (bus_io_read_2(bc, ioh, EP_STATUS) & S_COMMAND_IN_PROGRESS)
700 ;
701 }
702
703 struct mbuf *
704 epget(sc, totlen)
705 struct ep_softc *sc;
706 int totlen;
707 {
708 bus_chipset_tag_t bc = sc->sc_bc;
709 bus_io_handle_t ioh = sc->sc_ioh;
710 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
711 struct mbuf *top, **mp, *m;
712 int len;
713 int sh;
714
715 m = sc->mb[sc->next_mb];
716 sc->mb[sc->next_mb] = 0;
717 if (m == 0) {
718 MGETHDR(m, M_DONTWAIT, MT_DATA);
719 if (m == 0)
720 return 0;
721 } else {
722 /* If the queue is no longer full, refill. */
723 if (sc->last_mb == sc->next_mb)
724 timeout(epmbuffill, sc, 1);
725 /* Convert one of our saved mbuf's. */
726 sc->next_mb = (sc->next_mb + 1) % MAX_MBS;
727 m->m_data = m->m_pktdat;
728 m->m_flags = M_PKTHDR;
729 }
730 m->m_pkthdr.rcvif = ifp;
731 m->m_pkthdr.len = totlen;
732 len = MHLEN;
733 top = 0;
734 mp = ⊤
735
736 /*
737 * We read the packet at splhigh() so that an interrupt from another
738 * device doesn't cause the card's buffer to overflow while we're
739 * reading it. We may still lose packets at other times.
740 */
741 sh = splhigh();
742
743 while (totlen > 0) {
744 if (top) {
745 m = sc->mb[sc->next_mb];
746 sc->mb[sc->next_mb] = 0;
747 if (m == 0) {
748 MGET(m, M_DONTWAIT, MT_DATA);
749 if (m == 0) {
750 splx(sh);
751 m_freem(top);
752 return 0;
753 }
754 } else {
755 sc->next_mb = (sc->next_mb + 1) % MAX_MBS;
756 }
757 len = MLEN;
758 }
759 if (totlen >= MINCLSIZE) {
760 MCLGET(m, M_DONTWAIT);
761 if (m->m_flags & M_EXT)
762 len = MCLBYTES;
763 }
764 len = min(totlen, len);
765 if (EP_IS_BUS_32(sc->bustype)) {
766 if (len > 3) {
767 len &= ~3;
768 bus_io_read_multi_4(bc, ioh,
769 EP_W1_RX_PIO_RD_1, mtod(m, u_int32_t *),
770 len / 4);
771 } else
772 bus_io_read_multi_1(bc, ioh,
773 EP_W1_RX_PIO_RD_1, mtod(m, u_int8_t *),
774 len);
775 } else {
776 if (len > 1) {
777 len &= ~1;
778 bus_io_read_multi_2(bc, ioh,
779 EP_W1_RX_PIO_RD_1, mtod(m, u_int16_t *),
780 len / 2);
781 } else
782 *(mtod(m, u_int8_t *)) =
783 bus_io_read_1(bc, ioh, EP_W1_RX_PIO_RD_1);
784 }
785 m->m_len = len;
786 totlen -= len;
787 *mp = m;
788 mp = &m->m_next;
789 }
790
791 bus_io_write_2(bc, ioh, EP_COMMAND, RX_DISCARD_TOP_PACK);
792 while (bus_io_read_2(bc, ioh, EP_STATUS) & S_COMMAND_IN_PROGRESS)
793 ;
794
795 splx(sh);
796
797 return top;
798 }
799
800 int
801 epioctl(ifp, cmd, data)
802 register struct ifnet *ifp;
803 u_long cmd;
804 caddr_t data;
805 {
806 struct ep_softc *sc = ifp->if_softc;
807 struct ifaddr *ifa = (struct ifaddr *)data;
808 struct ifreq *ifr = (struct ifreq *)data;
809 int s, error = 0;
810
811 s = splnet();
812
813 switch (cmd) {
814
815 case SIOCSIFADDR:
816 ifp->if_flags |= IFF_UP;
817
818 switch (ifa->ifa_addr->sa_family) {
819 #ifdef INET
820 case AF_INET:
821 epinit(sc);
822 arp_ifinit(&sc->sc_arpcom, ifa);
823 break;
824 #endif
825 #ifdef NS
826 case AF_NS:
827 {
828 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
829
830 if (ns_nullhost(*ina))
831 ina->x_host =
832 *(union ns_host *)(sc->sc_arpcom.ac_enaddr);
833 else
834 bcopy(ina->x_host.c_host,
835 sc->sc_arpcom.ac_enaddr,
836 sizeof(sc->sc_arpcom.ac_enaddr));
837 /* Set new address. */
838 epinit(sc);
839 break;
840 }
841 #endif
842 default:
843 epinit(sc);
844 break;
845 }
846 break;
847
848 case SIOCSIFFLAGS:
849 if ((ifp->if_flags & IFF_UP) == 0 &&
850 (ifp->if_flags & IFF_RUNNING) != 0) {
851 /*
852 * If interface is marked down and it is running, then
853 * stop it.
854 */
855 epstop(sc);
856 ifp->if_flags &= ~IFF_RUNNING;
857 } else if ((ifp->if_flags & IFF_UP) != 0 &&
858 (ifp->if_flags & IFF_RUNNING) == 0) {
859 /*
860 * If interface is marked up and it is stopped, then
861 * start it.
862 */
863 epinit(sc);
864 } else {
865 /*
866 * deal with flags changes:
867 * IFF_MULTICAST, IFF_PROMISC,
868 * IFF_LINK0, IFF_LINK1,
869 */
870 epsetfilter(sc);
871 epsetlink(sc);
872 }
873 break;
874
875 case SIOCADDMULTI:
876 case SIOCDELMULTI:
877 error = (cmd == SIOCADDMULTI) ?
878 ether_addmulti(ifr, &sc->sc_arpcom) :
879 ether_delmulti(ifr, &sc->sc_arpcom);
880
881 if (error == ENETRESET) {
882 /*
883 * Multicast list has changed; set the hardware filter
884 * accordingly.
885 */
886 epreset(sc);
887 error = 0;
888 }
889 break;
890
891 default:
892 error = EINVAL;
893 break;
894 }
895
896 splx(s);
897 return (error);
898 }
899
900 void
901 epreset(sc)
902 struct ep_softc *sc;
903 {
904 int s;
905
906 s = splnet();
907 epstop(sc);
908 epinit(sc);
909 splx(s);
910 }
911
912 void
913 epwatchdog(ifp)
914 struct ifnet *ifp;
915 {
916 struct ep_softc *sc = ifp->if_softc;
917
918 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
919 ++sc->sc_arpcom.ac_if.if_oerrors;
920
921 epreset(sc);
922 }
923
924 void
925 epstop(sc)
926 register struct ep_softc *sc;
927 {
928 bus_chipset_tag_t bc = sc->sc_bc;
929 bus_io_handle_t ioh = sc->sc_ioh;
930
931 bus_io_write_2(bc, ioh, EP_COMMAND, RX_DISABLE);
932 bus_io_write_2(bc, ioh, EP_COMMAND, RX_DISCARD_TOP_PACK);
933 while (bus_io_read_2(bc, ioh, EP_STATUS) & S_COMMAND_IN_PROGRESS)
934 ;
935 bus_io_write_2(bc, ioh, EP_COMMAND, TX_DISABLE);
936 bus_io_write_2(bc, ioh, EP_COMMAND, STOP_TRANSCEIVER);
937 bus_io_write_2(bc, ioh, EP_COMMAND, RX_RESET);
938 bus_io_write_2(bc, ioh, EP_COMMAND, TX_RESET);
939 bus_io_write_2(bc, ioh, EP_COMMAND, C_INTR_LATCH);
940 bus_io_write_2(bc, ioh, EP_COMMAND, SET_RD_0_MASK);
941 bus_io_write_2(bc, ioh, EP_COMMAND, SET_INTR_MASK);
942 bus_io_write_2(bc, ioh, EP_COMMAND, SET_RX_FILTER);
943
944 epmbufempty(sc);
945 }
946
947 /*
948 * We get eeprom data from the id_port given an offset into the
949 * eeprom. Basically; after the ID_sequence is sent to all of
950 * the cards; they enter the ID_CMD state where they will accept
951 * command requests. 0x80-0xbf loads the eeprom data. We then
952 * read the port 16 times and with every read; the cards check
953 * for contention (ie: if one card writes a 0 bit and another
954 * writes a 1 bit then the host sees a 0. At the end of the cycle;
955 * each card compares the data on the bus; if there is a difference
956 * then that card goes into ID_WAIT state again). In the meantime;
957 * one bit of data is returned in the AX register which is conveniently
958 * returned to us by bus_io_read_1(). Hence; we read 16 times getting one
959 * bit of data with each read.
960 *
961 * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT!
962 */
963 u_int16_t
964 epreadeeprom(bc, ioh, offset)
965 bus_chipset_tag_t bc;
966 bus_io_handle_t ioh;
967 int offset;
968 {
969 u_int16_t data = 0;
970 int i;
971
972 bus_io_write_1(bc, ioh, 0, 0x80 + offset);
973 delay(1000);
974 for (i = 0; i < 16; i++)
975 data = (data << 1) | (bus_io_read_2(bc, ioh, 0) & 1);
976 return (data);
977 }
978
979 static int
980 epbusyeeprom(sc)
981 struct ep_softc *sc;
982 {
983 bus_chipset_tag_t bc = sc->sc_bc;
984 bus_io_handle_t ioh = sc->sc_ioh;
985 int i = 100, j;
986
987 if (sc->bustype == EP_BUS_PCMCIA) {
988 delay(1000);
989 return 0;
990 }
991
992 while (i--) {
993 j = bus_io_read_2(bc, ioh, EP_W0_EEPROM_COMMAND);
994 if (j & EEPROM_BUSY)
995 delay(100);
996 else
997 break;
998 }
999 if (!i) {
1000 printf("\n%s: eeprom failed to come ready\n",
1001 sc->sc_dev.dv_xname);
1002 return (1);
1003 }
1004 if (j & EEPROM_TST_MODE) {
1005 printf("\n%s: erase pencil mark, or disable plug-n-play mode!\n",
1006 sc->sc_dev.dv_xname);
1007 return (1);
1008 }
1009 return (0);
1010 }
1011
1012 void
1013 epmbuffill(v)
1014 void *v;
1015 {
1016 struct ep_softc *sc = v;
1017 int s, i;
1018
1019 s = splnet();
1020 i = sc->last_mb;
1021 do {
1022 if (sc->mb[i] == NULL)
1023 MGET(sc->mb[i], M_DONTWAIT, MT_DATA);
1024 if (sc->mb[i] == NULL)
1025 break;
1026 i = (i + 1) % MAX_MBS;
1027 } while (i != sc->next_mb);
1028 sc->last_mb = i;
1029 /* If the queue was not filled, try again. */
1030 if (sc->last_mb != sc->next_mb)
1031 timeout(epmbuffill, sc, 1);
1032 splx(s);
1033 }
1034
1035 void
1036 epmbufempty(sc)
1037 struct ep_softc *sc;
1038 {
1039 int s, i;
1040
1041 s = splnet();
1042 for (i = 0; i<MAX_MBS; i++) {
1043 if (sc->mb[i]) {
1044 m_freem(sc->mb[i]);
1045 sc->mb[i] = NULL;
1046 }
1047 }
1048 sc->last_mb = sc->next_mb = 0;
1049 untimeout(epmbuffill, sc);
1050 splx(s);
1051 }
1052