elink3.c revision 1.66
1 /* $NetBSD: elink3.c,v 1.66 1999/11/12 18:14:17 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1996, 1997 Jonathan Stone <jonathan (at) NetBSD.org> 42 * Copyright (c) 1994 Herb Peyerl <hpeyerl (at) beer.org> 43 * All rights reserved. 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice, this list of conditions and the following disclaimer. 50 * 2. Redistributions in binary form must reproduce the above copyright 51 * notice, this list of conditions and the following disclaimer in the 52 * documentation and/or other materials provided with the distribution. 53 * 3. All advertising materials mentioning features or use of this software 54 * must display the following acknowledgement: 55 * This product includes software developed by Herb Peyerl. 56 * 4. The name of Herb Peyerl may not be used to endorse or promote products 57 * derived from this software without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 60 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 61 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 62 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 63 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 64 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 65 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 66 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 67 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 68 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 #include "opt_inet.h" 72 #include "opt_ns.h" 73 #include "bpfilter.h" 74 #include "rnd.h" 75 76 #include <sys/param.h> 77 #include <sys/systm.h> 78 #include <sys/kernel.h> 79 #include <sys/mbuf.h> 80 #include <sys/socket.h> 81 #include <sys/ioctl.h> 82 #include <sys/errno.h> 83 #include <sys/syslog.h> 84 #include <sys/select.h> 85 #include <sys/device.h> 86 #if NRND > 0 87 #include <sys/rnd.h> 88 #endif 89 90 #include <net/if.h> 91 #include <net/if_dl.h> 92 #include <net/if_ether.h> 93 #include <net/if_media.h> 94 95 #ifdef INET 96 #include <netinet/in.h> 97 #include <netinet/in_systm.h> 98 #include <netinet/in_var.h> 99 #include <netinet/ip.h> 100 #include <netinet/if_inarp.h> 101 #endif 102 103 #ifdef NS 104 #include <netns/ns.h> 105 #include <netns/ns_if.h> 106 #endif 107 108 #if NBPFILTER > 0 109 #include <net/bpf.h> 110 #include <net/bpfdesc.h> 111 #endif 112 113 #include <machine/cpu.h> 114 #include <machine/bus.h> 115 #include <machine/intr.h> 116 117 #include <dev/mii/mii.h> 118 #include <dev/mii/miivar.h> 119 120 #include <dev/ic/elink3var.h> 121 #include <dev/ic/elink3reg.h> 122 123 #ifdef DEBUG 124 int epdebug = 0; 125 #endif 126 127 /* 128 * XXX endian workaround for big-endian CPUs with pcmcia: 129 * if stream methods for bus_space_multi are not provided, define them 130 * using non-stream bus_space_{read,write}_multi_. 131 * Assumes host CPU is same endian-ness as bus. 132 */ 133 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 134 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 135 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 136 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 137 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 138 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 139 140 /* 141 * Structure to map media-present bits in boards to ifmedia codes and 142 * printable media names. Used for table-driven ifmedia initialization. 143 */ 144 struct ep_media { 145 int epm_mpbit; /* media present bit */ 146 const char *epm_name; /* name of medium */ 147 int epm_ifmedia; /* ifmedia word for medium */ 148 int epm_epmedia; /* ELINKMEDIA_* constant */ 149 }; 150 151 /* 152 * Media table for the Demon/Vortex/Boomerang chipsets. 153 * 154 * Note that MII on the Demon and Vortex (3c59x) indicates an external 155 * MII connector (for connecting an external PHY) ... I think. Treat 156 * it as `manual' on these chips. 157 * 158 * Any Boomerang (3c90x) chips with MII really do have an internal 159 * MII and real PHYs attached; no `native' media. 160 */ 161 struct ep_media ep_vortex_media[] = { 162 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 163 ELINKMEDIA_10BASE_T }, 164 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 165 ELINKMEDIA_10BASE_T }, 166 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 167 ELINKMEDIA_AUI }, 168 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 169 ELINKMEDIA_10BASE_2 }, 170 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 171 ELINKMEDIA_100BASE_TX }, 172 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 173 ELINKMEDIA_100BASE_TX }, 174 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 175 ELINKMEDIA_100BASE_FX }, 176 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 177 ELINKMEDIA_MII }, 178 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 179 ELINKMEDIA_100BASE_T4 }, 180 { 0, NULL, 0, 181 0 }, 182 }; 183 184 /* 185 * Media table for the older 3Com Etherlink III chipset, used 186 * in the 3c509, 3c579, and 3c589. 187 */ 188 struct ep_media ep_509_media[] = { 189 { ELINK_W0_CC_UTP, "10baseT", IFM_ETHER|IFM_10_T, 190 ELINKMEDIA_10BASE_T }, 191 { ELINK_W0_CC_AUI, "10base5", IFM_ETHER|IFM_10_5, 192 ELINKMEDIA_AUI }, 193 { ELINK_W0_CC_BNC, "10base2", IFM_ETHER|IFM_10_2, 194 ELINKMEDIA_10BASE_2 }, 195 { 0, NULL, 0, 196 0 }, 197 }; 198 199 void ep_internalconfig __P((struct ep_softc *sc)); 200 void ep_vortex_probemedia __P((struct ep_softc *sc)); 201 void ep_509_probemedia __P((struct ep_softc *sc)); 202 203 static void eptxstat __P((struct ep_softc *)); 204 static int epstatus __P((struct ep_softc *)); 205 void epinit __P((struct ep_softc *)); 206 int epioctl __P((struct ifnet *, u_long, caddr_t)); 207 void epstart __P((struct ifnet *)); 208 void epwatchdog __P((struct ifnet *)); 209 void epreset __P((struct ep_softc *)); 210 static void epshutdown __P((void *)); 211 void epread __P((struct ep_softc *)); 212 struct mbuf *epget __P((struct ep_softc *, int)); 213 void epmbuffill __P((void *)); 214 void epmbufempty __P((struct ep_softc *)); 215 void epsetfilter __P((struct ep_softc *)); 216 void ep_roadrunner_mii_enable __P((struct ep_softc *)); 217 void epsetmedia __P((struct ep_softc *)); 218 219 /* ifmedia callbacks */ 220 int ep_media_change __P((struct ifnet *ifp)); 221 void ep_media_status __P((struct ifnet *ifp, struct ifmediareq *req)); 222 223 /* MII callbacks */ 224 int ep_mii_readreg __P((struct device *, int, int)); 225 void ep_mii_writereg __P((struct device *, int, int, int)); 226 void ep_statchg __P((struct device *)); 227 228 void ep_tick __P((void *)); 229 230 void ep_mii_setbit __P((struct ep_softc *, u_int16_t)); 231 void ep_mii_clrbit __P((struct ep_softc *, u_int16_t)); 232 u_int16_t ep_mii_readbit __P((struct ep_softc *, u_int16_t)); 233 void ep_mii_sync __P((struct ep_softc *)); 234 void ep_mii_sendbits __P((struct ep_softc *, u_int32_t, int)); 235 236 static int epbusyeeprom __P((struct ep_softc *)); 237 u_int16_t ep_read_eeprom __P((struct ep_softc *, u_int16_t)); 238 static inline void ep_reset_cmd __P((struct ep_softc *sc, 239 u_int cmd, u_int arg)); 240 static inline void ep_finish_reset __P((bus_space_tag_t, bus_space_handle_t)); 241 static inline void ep_discard_rxtop __P((bus_space_tag_t, bus_space_handle_t)); 242 static __inline int ep_w1_reg __P((struct ep_softc *, int)); 243 244 /* 245 * Some chips (3c515 [Corkscrew] and 3c574 [RoadRunner]) have 246 * Window 1 registers offset! 247 */ 248 static __inline int 249 ep_w1_reg(sc, reg) 250 struct ep_softc *sc; 251 int reg; 252 { 253 254 switch (sc->ep_chipset) { 255 case ELINK_CHIPSET_CORKSCREW: 256 return (reg + 0x10); 257 258 case ELINK_CHIPSET_ROADRUNNER: 259 switch (reg) { 260 case ELINK_W1_FREE_TX: 261 case ELINK_W1_RUNNER_RDCTL: 262 case ELINK_W1_RUNNER_WRCTL: 263 return (reg); 264 } 265 return (reg + 0x10); 266 } 267 268 return (reg); 269 } 270 271 /* 272 * Wait for any pending reset to complete. 273 * On newer hardware we could poll SC_COMMAND_IN_PROGRESS, 274 * but older hardware doesn't implement it and we must delay. 275 */ 276 static inline void 277 ep_finish_reset(iot, ioh) 278 bus_space_tag_t iot; 279 bus_space_handle_t ioh; 280 { 281 int i; 282 283 for (i = 0; i < 10000; i++) { 284 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 285 S_COMMAND_IN_PROGRESS) == 0) 286 break; 287 DELAY(10); 288 } 289 } 290 291 /* 292 * Issue a (reset) command, and be sure it has completed. 293 * Used for global reset, TX_RESET, RX_RESET. 294 */ 295 static inline void 296 ep_reset_cmd(sc, cmd, arg) 297 struct ep_softc *sc; 298 u_int cmd, arg; 299 { 300 register bus_space_tag_t iot = sc->sc_iot; 301 register bus_space_handle_t ioh = sc->sc_ioh; 302 303 bus_space_write_2(iot, ioh, cmd, arg); 304 ep_finish_reset(iot, ioh); 305 } 306 307 308 static inline void 309 ep_discard_rxtop(iot, ioh) 310 register bus_space_tag_t iot; 311 register bus_space_handle_t ioh; 312 { 313 int i; 314 315 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISCARD_TOP_PACK); 316 317 /* 318 * Spin for about 1 msec, to avoid forcing a DELAY() between 319 * every received packet (adding latency and limiting pkt-recv rate). 320 * On PCI, at 4 30-nsec PCI bus cycles for a read, 8000 iterations 321 * is about right. 322 */ 323 for (i = 0; i < 8000; i++) { 324 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 325 S_COMMAND_IN_PROGRESS) == 0) 326 return; 327 } 328 329 /* Didn't complete in a hurry. Do DELAY()s. */ 330 ep_finish_reset(iot, ioh); 331 } 332 333 /* 334 * Back-end attach and configure. 335 */ 336 void 337 epconfig(sc, chipset, enaddr) 338 struct ep_softc *sc; 339 u_short chipset; 340 u_int8_t *enaddr; 341 { 342 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 343 bus_space_tag_t iot = sc->sc_iot; 344 bus_space_handle_t ioh = sc->sc_ioh; 345 u_int16_t i; 346 u_int8_t myla[6]; 347 348 sc->ep_chipset = chipset; 349 350 /* 351 * We could have been groveling around in other register 352 * windows in the front-end; make sure we're in window 0 353 * to read the EEPROM. 354 */ 355 GO_WINDOW(0); 356 357 if (enaddr == NULL) { 358 /* 359 * Read the station address from the eeprom. 360 */ 361 for (i = 0; i < 3; i++) { 362 u_int16_t x = ep_read_eeprom(sc, i); 363 myla[(i << 1)] = x >> 8; 364 myla[(i << 1) + 1] = x; 365 } 366 enaddr = myla; 367 } 368 369 /* 370 * Vortex-based (3c59x pci,eisa) and Boomerang (3c900) cards 371 * allow FDDI-sized (4500) byte packets. Commands only take an 372 * 11-bit parameter, and 11 bits isn't enough to hold a full-size 373 * packet length. 374 * Commands to these cards implicitly upshift a packet size 375 * or threshold by 2 bits. 376 * To detect cards with large-packet support, we probe by setting 377 * the transmit threshold register, then change windows and 378 * read back the threshold register directly, and see if the 379 * threshold value was shifted or not. 380 */ 381 bus_space_write_2(iot, ioh, ELINK_COMMAND, 382 SET_TX_AVAIL_THRESH | ELINK_LARGEWIN_PROBE); 383 GO_WINDOW(5); 384 i = bus_space_read_2(iot, ioh, ELINK_W5_TX_AVAIL_THRESH); 385 GO_WINDOW(1); 386 switch (i) { 387 case ELINK_LARGEWIN_PROBE: 388 case (ELINK_LARGEWIN_PROBE & ELINK_LARGEWIN_MASK): 389 sc->ep_pktlenshift = 0; 390 break; 391 392 case (ELINK_LARGEWIN_PROBE << 2): 393 sc->ep_pktlenshift = 2; 394 break; 395 396 default: 397 printf("%s: wrote 0x%x to TX_AVAIL_THRESH, read back 0x%x. " 398 "Interface disabled\n", 399 sc->sc_dev.dv_xname, ELINK_LARGEWIN_PROBE, (int) i); 400 return; 401 } 402 403 /* 404 * Ensure Tx-available interrupts are enabled for 405 * start the interface. 406 * XXX should be in epinit()? 407 */ 408 bus_space_write_2(iot, ioh, ELINK_COMMAND, 409 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 410 411 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 412 ifp->if_softc = sc; 413 ifp->if_start = epstart; 414 ifp->if_ioctl = epioctl; 415 ifp->if_watchdog = epwatchdog; 416 ifp->if_flags = 417 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 418 419 if_attach(ifp); 420 ether_ifattach(ifp, enaddr); 421 422 /* 423 * Finish configuration: 424 * determine chipset if the front-end couldn't do so, 425 * show board details, set media. 426 */ 427 428 /* 429 * Print RAM size. We also print the Ethernet address in here. 430 * It's extracted from the ifp, so we have to make sure it's 431 * been attached first. 432 */ 433 ep_internalconfig(sc); 434 GO_WINDOW(0); 435 436 /* 437 * Display some additional information, if pertinent. 438 */ 439 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 440 printf("%s: RoadRunner FIFO buffer enabled\n", 441 sc->sc_dev.dv_xname); 442 443 /* 444 * Initialize our media structures and MII info. We'll 445 * probe the MII if we discover that we have one. 446 */ 447 sc->sc_mii.mii_ifp = ifp; 448 sc->sc_mii.mii_readreg = ep_mii_readreg; 449 sc->sc_mii.mii_writereg = ep_mii_writereg; 450 sc->sc_mii.mii_statchg = ep_statchg; 451 ifmedia_init(&sc->sc_mii.mii_media, 0, ep_media_change, 452 ep_media_status); 453 454 /* 455 * Now, determine which media we have. 456 */ 457 switch (sc->ep_chipset) { 458 case ELINK_CHIPSET_ROADRUNNER: 459 if (sc->ep_flags & ELINK_FLAGS_MII) { 460 ep_roadrunner_mii_enable(sc); 461 GO_WINDOW(0); 462 } 463 /* FALLTHROUGH */ 464 465 case ELINK_CHIPSET_BOOMERANG: 466 /* 467 * If the device has MII, probe it. We won't be using 468 * any `native' media in this case, only PHYs. If 469 * we don't, just treat the Boomerang like the Vortex. 470 */ 471 if (sc->ep_flags & ELINK_FLAGS_MII) { 472 mii_phy_probe(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 473 MII_PHY_ANY, MII_OFFSET_ANY); 474 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 475 ifmedia_add(&sc->sc_mii.mii_media, 476 IFM_ETHER|IFM_NONE, 0, NULL); 477 ifmedia_set(&sc->sc_mii.mii_media, 478 IFM_ETHER|IFM_NONE); 479 } else { 480 ifmedia_set(&sc->sc_mii.mii_media, 481 IFM_ETHER|IFM_AUTO); 482 } 483 break; 484 } 485 /* FALLTHROUGH */ 486 487 case ELINK_CHIPSET_VORTEX: 488 ep_vortex_probemedia(sc); 489 break; 490 491 default: 492 ep_509_probemedia(sc); 493 break; 494 } 495 496 GO_WINDOW(1); /* Window 1 is operating window */ 497 498 #if NBPFILTER > 0 499 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 500 #endif 501 502 #if NRND > 0 503 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 504 RND_TYPE_NET, 0); 505 #endif 506 507 sc->tx_start_thresh = 20; /* probably a good starting point. */ 508 509 /* Establish callback to reset card when we reboot. */ 510 shutdownhook_establish(epshutdown, sc); 511 512 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 513 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 514 } 515 516 517 /* 518 * Show interface-model-independent info from window 3 519 * internal-configuration register. 520 */ 521 void 522 ep_internalconfig(sc) 523 struct ep_softc *sc; 524 { 525 bus_space_tag_t iot = sc->sc_iot; 526 bus_space_handle_t ioh = sc->sc_ioh; 527 528 u_int config0; 529 u_int config1; 530 531 int ram_size, ram_width, ram_speed, rom_size, ram_split; 532 /* 533 * NVRAM buffer Rx:Tx config names for busmastering cards 534 * (Demon, Vortex, and later). 535 */ 536 const char *onboard_ram_config[] = { 537 "5:3", "3:1", "1:1", "3:5" }; 538 539 GO_WINDOW(3); 540 config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 541 config1 = (u_int)bus_space_read_2(iot, ioh, 542 ELINK_W3_INTERNAL_CONFIG + 2); 543 GO_WINDOW(0); 544 545 ram_size = (config0 & CONFIG_RAMSIZE) >> CONFIG_RAMSIZE_SHIFT; 546 ram_width = (config0 & CONFIG_RAMWIDTH) >> CONFIG_RAMWIDTH_SHIFT; 547 ram_speed = (config0 & CONFIG_RAMSPEED) >> CONFIG_RAMSPEED_SHIFT; 548 rom_size = (config0 & CONFIG_ROMSIZE) >> CONFIG_ROMSIZE_SHIFT; 549 550 ram_split = (config1 & CONFIG_RAMSPLIT) >> CONFIG_RAMSPLIT_SHIFT; 551 552 printf("%s: address %s, %dKB %s-wide FIFO, %s Rx:Tx split\n", 553 sc->sc_dev.dv_xname, 554 ether_sprintf(LLADDR(sc->sc_ethercom.ec_if.if_sadl)), 555 8 << ram_size, 556 (ram_width) ? "word" : "byte", 557 onboard_ram_config[ram_split]); 558 } 559 560 561 /* 562 * Find supported media on 3c509-generation hardware that doesn't have 563 * a "reset_options" register in window 3. 564 * Use the config_cntrl register in window 0 instead. 565 * Used on original, 10Mbit ISA (3c509), 3c509B, and pre-Demon EISA cards 566 * that implement CONFIG_CTRL. We don't have a good way to set the 567 * default active mediuim; punt to ifconfig instead. 568 */ 569 void 570 ep_509_probemedia(sc) 571 struct ep_softc *sc; 572 { 573 bus_space_tag_t iot = sc->sc_iot; 574 bus_space_handle_t ioh = sc->sc_ioh; 575 struct ifmedia *ifm = &sc->sc_mii.mii_media; 576 u_int16_t ep_w0_config, port; 577 struct ep_media *epm; 578 const char *sep = "", *defmedianame = NULL; 579 int defmedia = 0; 580 581 GO_WINDOW(0); 582 ep_w0_config = bus_space_read_2(iot, ioh, ELINK_W0_CONFIG_CTRL); 583 584 printf("%s: ", sc->sc_dev.dv_xname); 585 586 /* Sanity check that there are any media! */ 587 if ((ep_w0_config & ELINK_W0_CC_MEDIAMASK) == 0) { 588 printf("no media present!\n"); 589 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 590 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 591 return; 592 } 593 594 /* 595 * Get the default media from the EEPROM. 596 */ 597 port = ep_read_eeprom(sc, EEPROM_ADDR_CFG) >> 14; 598 599 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 600 601 for (epm = ep_509_media; epm->epm_name != NULL; epm++) { 602 if (ep_w0_config & epm->epm_mpbit) { 603 /* 604 * This simple test works because 509 chipsets 605 * don't do full-duplex. 606 */ 607 if (epm->epm_epmedia == port || defmedia == 0) { 608 defmedia = epm->epm_ifmedia; 609 defmedianame = epm->epm_name; 610 } 611 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 612 NULL); 613 PRINT(epm->epm_name); 614 } 615 } 616 617 #undef PRINT 618 619 #ifdef DIAGNOSTIC 620 if (defmedia == 0) 621 panic("ep_509_probemedia: impossible"); 622 #endif 623 624 printf(" (default %s)\n", defmedianame); 625 ifmedia_set(ifm, defmedia); 626 } 627 628 /* 629 * Find media present on large-packet-capable elink3 devices. 630 * Show onboard configuration of large-packet-capable elink3 devices 631 * (Demon, Vortex, Boomerang), which do not implement CONFIG_CTRL in window 0. 632 * Use media and card-version info in window 3 instead. 633 */ 634 void 635 ep_vortex_probemedia(sc) 636 struct ep_softc *sc; 637 { 638 bus_space_tag_t iot = sc->sc_iot; 639 bus_space_handle_t ioh = sc->sc_ioh; 640 struct ifmedia *ifm = &sc->sc_mii.mii_media; 641 struct ep_media *epm; 642 u_int config1; 643 int reset_options; 644 int default_media; /* 3-bit encoding of default (EEPROM) media */ 645 int defmedia = 0; 646 const char *sep = "", *defmedianame = NULL; 647 648 GO_WINDOW(3); 649 config1 = (u_int)bus_space_read_2(iot, ioh, 650 ELINK_W3_INTERNAL_CONFIG + 2); 651 reset_options = (int)bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 652 GO_WINDOW(0); 653 654 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 655 656 printf("%s: ", sc->sc_dev.dv_xname); 657 658 /* Sanity check that there are any media! */ 659 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 660 printf("no media present!\n"); 661 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 662 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 663 return; 664 } 665 666 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 667 668 for (epm = ep_vortex_media; epm->epm_name != NULL; epm++) { 669 if (reset_options & epm->epm_mpbit) { 670 /* 671 * Default media is a little more complicated 672 * on the Vortex. We support full-duplex which 673 * uses the same reset options bit. 674 * 675 * XXX Check EEPROM for default to FDX? 676 */ 677 if (epm->epm_epmedia == default_media) { 678 if ((epm->epm_ifmedia & IFM_FDX) == 0) { 679 defmedia = epm->epm_ifmedia; 680 defmedianame = epm->epm_name; 681 } 682 } else if (defmedia == 0) { 683 defmedia = epm->epm_ifmedia; 684 defmedianame = epm->epm_name; 685 } 686 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 687 NULL); 688 PRINT(epm->epm_name); 689 } 690 } 691 692 #undef PRINT 693 694 #ifdef DIAGNOSTIC 695 if (defmedia == 0) 696 panic("ep_vortex_probemedia: impossible"); 697 #endif 698 699 printf(" (default %s)\n", defmedianame); 700 ifmedia_set(ifm, defmedia); 701 } 702 703 /* 704 * One second timer, used to tick the MII. 705 */ 706 void 707 ep_tick(arg) 708 void *arg; 709 { 710 struct ep_softc *sc = arg; 711 int s; 712 713 #ifdef DIAGNOSTIC 714 if ((sc->ep_flags & ELINK_FLAGS_MII) == 0) 715 panic("ep_tick"); 716 #endif 717 718 s = splnet(); 719 mii_tick(&sc->sc_mii); 720 splx(s); 721 722 timeout(ep_tick, sc, hz); 723 } 724 725 /* 726 * Bring device up. 727 * 728 * The order in here seems important. Otherwise we may not receive 729 * interrupts. ?! 730 */ 731 void 732 epinit(sc) 733 register struct ep_softc *sc; 734 { 735 register struct ifnet *ifp = &sc->sc_ethercom.ec_if; 736 bus_space_tag_t iot = sc->sc_iot; 737 bus_space_handle_t ioh = sc->sc_ioh; 738 int i; 739 740 /* Make sure any pending reset has completed before touching board. */ 741 ep_finish_reset(iot, ioh); 742 743 /* 744 * Cance any pending I/O. 745 */ 746 epstop(sc); 747 748 if (sc->bustype != ELINK_BUS_PCI) { 749 GO_WINDOW(0); 750 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 0); 751 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 752 ENABLE_DRQ_IRQ); 753 } 754 755 if (sc->bustype == ELINK_BUS_PCMCIA) { 756 bus_space_write_2(iot, ioh, ELINK_W0_RESOURCE_CFG, 0x3f00); 757 } 758 759 GO_WINDOW(2); 760 for (i = 0; i < 6; i++) /* Reload the ether_addr. */ 761 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 762 LLADDR(ifp->if_sadl)[i]); 763 764 /* 765 * Reset the station-address receive filter. 766 * A bug workaround for busmastering (Vortex, Demon) cards. 767 */ 768 for (i = 0; i < 6; i++) 769 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 770 771 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 772 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 773 774 GO_WINDOW(1); /* Window 1 is operating window */ 775 for (i = 0; i < 31; i++) 776 bus_space_read_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS)); 777 778 /* Set threshhold for for Tx-space avaiable interrupt. */ 779 bus_space_write_2(iot, ioh, ELINK_COMMAND, 780 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 781 782 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 783 /* 784 * Enable options in the PCMCIA LAN COR register, via 785 * RoadRunner Window 1. 786 * 787 * XXX MAGIC CONSTANTS! 788 */ 789 u_int16_t cor; 790 791 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, (1 << 11)); 792 793 cor = bus_space_read_2(iot, ioh, 0) & ~0x30; 794 if (sc->ep_flags & ELINK_FLAGS_USESHAREDMEM) 795 cor |= 0x10; 796 if (sc->ep_flags & ELINK_FLAGS_FORCENOWAIT) 797 cor |= 0x20; 798 bus_space_write_2(iot, ioh, 0, cor); 799 800 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 801 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 802 803 if (sc->ep_flags & ELINK_FLAGS_MII) { 804 ep_roadrunner_mii_enable(sc); 805 GO_WINDOW(1); 806 } 807 } 808 809 /* Enable interrupts. */ 810 bus_space_write_2(iot, ioh, ELINK_COMMAND, 811 SET_RD_0_MASK | S_CARD_FAILURE | S_RX_COMPLETE | S_TX_COMPLETE | 812 S_TX_AVAIL); 813 bus_space_write_2(iot, ioh, ELINK_COMMAND, 814 SET_INTR_MASK | S_CARD_FAILURE | S_RX_COMPLETE | S_TX_COMPLETE | 815 S_TX_AVAIL); 816 817 /* 818 * Attempt to get rid of any stray interrupts that occured during 819 * configuration. On the i386 this isn't possible because one may 820 * already be queued. However, a single stray interrupt is 821 * unimportant. 822 */ 823 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 824 825 epsetfilter(sc); 826 epsetmedia(sc); 827 828 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 829 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 830 831 epmbuffill(sc); 832 833 /* Interface is now `running', with no output active. */ 834 ifp->if_flags |= IFF_RUNNING; 835 ifp->if_flags &= ~IFF_OACTIVE; 836 837 if (sc->ep_flags & ELINK_FLAGS_MII) { 838 /* Start the one second clock. */ 839 timeout(ep_tick, sc, hz); 840 } 841 842 /* Attempt to start output, if any. */ 843 epstart(ifp); 844 } 845 846 847 /* 848 * Set multicast receive filter. 849 * elink3 hardware has no selective multicast filter in hardware. 850 * Enable reception of all multicasts and filter in software. 851 */ 852 void 853 epsetfilter(sc) 854 register struct ep_softc *sc; 855 { 856 register struct ifnet *ifp = &sc->sc_ethercom.ec_if; 857 858 GO_WINDOW(1); /* Window 1 is operating window */ 859 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 860 SET_RX_FILTER | FIL_INDIVIDUAL | FIL_BRDCST | 861 ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0) | 862 ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0)); 863 } 864 865 int 866 ep_media_change(ifp) 867 struct ifnet *ifp; 868 { 869 register struct ep_softc *sc = ifp->if_softc; 870 871 if (sc->enabled && (ifp->if_flags & IFF_UP) != 0) 872 epreset(sc); 873 874 return (0); 875 } 876 877 /* 878 * Reset and enable the MII on the RoadRunner. 879 */ 880 void 881 ep_roadrunner_mii_enable(sc) 882 struct ep_softc *sc; 883 { 884 bus_space_tag_t iot = sc->sc_iot; 885 bus_space_handle_t ioh = sc->sc_ioh; 886 887 GO_WINDOW(3); 888 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 889 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 890 delay(1000); 891 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 892 ELINK_PCI_100BASE_MII|ELINK_RUNNER_MII_RESET| 893 ELINK_RUNNER_ENABLE_MII); 894 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 895 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 896 delay(1000); 897 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 898 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 899 } 900 901 /* 902 * Set the card to use the specified media. 903 */ 904 void 905 epsetmedia(sc) 906 struct ep_softc *sc; 907 { 908 bus_space_tag_t iot = sc->sc_iot; 909 bus_space_handle_t ioh = sc->sc_ioh; 910 911 /* Turn everything off. First turn off linkbeat and UTP. */ 912 GO_WINDOW(4); 913 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0x0); 914 915 /* Turn off coax */ 916 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 917 delay(1000); 918 919 /* 920 * If the device has MII, select it, and then tell the 921 * PHY which media to use. 922 */ 923 if (sc->ep_flags & ELINK_FLAGS_MII) { 924 int config0, config1; 925 926 GO_WINDOW(3); 927 928 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 929 int resopt; 930 931 resopt = bus_space_read_2(iot, ioh, 932 ELINK_W3_RESET_OPTIONS); 933 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 934 resopt | ELINK_RUNNER_ENABLE_MII); 935 } 936 937 config0 = (u_int)bus_space_read_2(iot, ioh, 938 ELINK_W3_INTERNAL_CONFIG); 939 config1 = (u_int)bus_space_read_2(iot, ioh, 940 ELINK_W3_INTERNAL_CONFIG + 2); 941 942 config1 = config1 & ~CONFIG_MEDIAMASK; 943 config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT); 944 945 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 946 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 947 config1); 948 GO_WINDOW(1); /* back to operating window */ 949 950 mii_mediachg(&sc->sc_mii); 951 return; 952 } 953 954 /* 955 * Now turn on the selected media/transceiver. 956 */ 957 GO_WINDOW(4); 958 switch (IFM_SUBTYPE(sc->sc_mii.mii_media.ifm_cur->ifm_media)) { 959 case IFM_10_T: 960 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 961 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 962 break; 963 964 case IFM_10_2: 965 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 966 DELAY(1000); /* 50ms not enmough? */ 967 break; 968 969 case IFM_100_TX: 970 case IFM_100_FX: 971 case IFM_100_T4: /* XXX check documentation */ 972 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 973 LINKBEAT_ENABLE); 974 DELAY(1000); /* not strictly necessary? */ 975 break; 976 977 case IFM_10_5: 978 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 979 SQE_ENABLE); 980 DELAY(1000); /* not strictly necessary? */ 981 break; 982 983 case IFM_MANUAL: 984 /* 985 * Nothing to do here; we are actually enabling the 986 * external PHY on the MII port. 987 */ 988 break; 989 990 case IFM_NONE: 991 printf("%s: interface disabled\n", sc->sc_dev.dv_xname); 992 return; 993 994 default: 995 panic("epsetmedia: impossible"); 996 } 997 998 /* 999 * Tell the chip which port to use. 1000 */ 1001 switch (sc->ep_chipset) { 1002 case ELINK_CHIPSET_VORTEX: 1003 case ELINK_CHIPSET_BOOMERANG: 1004 { 1005 int mctl, config0, config1; 1006 1007 GO_WINDOW(3); 1008 config0 = (u_int)bus_space_read_2(iot, ioh, 1009 ELINK_W3_INTERNAL_CONFIG); 1010 config1 = (u_int)bus_space_read_2(iot, ioh, 1011 ELINK_W3_INTERNAL_CONFIG + 2); 1012 1013 config1 = config1 & ~CONFIG_MEDIAMASK; 1014 config1 |= (sc->sc_mii.mii_media.ifm_cur->ifm_data << 1015 CONFIG_MEDIAMASK_SHIFT); 1016 1017 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 1018 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 1019 config1); 1020 1021 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1022 if (sc->sc_mii.mii_media.ifm_cur->ifm_media & IFM_FDX) 1023 mctl |= MAC_CONTROL_FDX; 1024 else 1025 mctl &= ~MAC_CONTROL_FDX; 1026 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1027 break; 1028 } 1029 default: 1030 { 1031 int w0_addr_cfg; 1032 1033 GO_WINDOW(0); 1034 w0_addr_cfg = bus_space_read_2(iot, ioh, ELINK_W0_ADDRESS_CFG); 1035 w0_addr_cfg &= 0x3fff; 1036 bus_space_write_2(iot, ioh, ELINK_W0_ADDRESS_CFG, w0_addr_cfg | 1037 (sc->sc_mii.mii_media.ifm_cur->ifm_data << 14)); 1038 DELAY(1000); 1039 break; 1040 } 1041 } 1042 1043 GO_WINDOW(1); /* Window 1 is operating window */ 1044 } 1045 1046 /* 1047 * Get currently-selected media from card. 1048 * (if_media callback, may be called before interface is brought up). 1049 */ 1050 void 1051 ep_media_status(ifp, req) 1052 struct ifnet *ifp; 1053 struct ifmediareq *req; 1054 { 1055 register struct ep_softc *sc = ifp->if_softc; 1056 bus_space_tag_t iot = sc->sc_iot; 1057 bus_space_handle_t ioh = sc->sc_ioh; 1058 1059 if (sc->enabled == 0) { 1060 req->ifm_active = IFM_ETHER|IFM_NONE; 1061 req->ifm_status = 0; 1062 return; 1063 } 1064 1065 /* 1066 * If we have MII, go ask the PHY what's going on. 1067 */ 1068 if (sc->ep_flags & ELINK_FLAGS_MII) { 1069 mii_pollstat(&sc->sc_mii); 1070 req->ifm_active = sc->sc_mii.mii_media_active; 1071 req->ifm_status = sc->sc_mii.mii_media_status; 1072 return; 1073 } 1074 1075 /* 1076 * Ok, at this point we claim that our active media is 1077 * the currently selected media. We'll update our status 1078 * if our chipset allows us to detect link. 1079 */ 1080 req->ifm_active = sc->sc_mii.mii_media.ifm_cur->ifm_media; 1081 req->ifm_status = 0; 1082 1083 switch (sc->ep_chipset) { 1084 case ELINK_CHIPSET_VORTEX: 1085 case ELINK_CHIPSET_BOOMERANG: 1086 GO_WINDOW(4); 1087 req->ifm_status = IFM_AVALID; 1088 if (bus_space_read_2(iot, ioh, ELINK_W4_MEDIA_TYPE) & 1089 LINKBEAT_DETECT) 1090 req->ifm_status |= IFM_ACTIVE; 1091 GO_WINDOW(1); /* back to operating window */ 1092 break; 1093 } 1094 } 1095 1096 1097 1098 /* 1099 * Start outputting on the interface. 1100 * Always called as splnet(). 1101 */ 1102 void 1103 epstart(ifp) 1104 struct ifnet *ifp; 1105 { 1106 register struct ep_softc *sc = ifp->if_softc; 1107 bus_space_tag_t iot = sc->sc_iot; 1108 bus_space_handle_t ioh = sc->sc_ioh; 1109 struct mbuf *m, *m0; 1110 int sh, len, pad; 1111 bus_addr_t txreg; 1112 1113 /* Don't transmit if interface is busy or not running */ 1114 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1115 return; 1116 1117 startagain: 1118 /* Sneak a peek at the next packet */ 1119 m0 = ifp->if_snd.ifq_head; 1120 if (m0 == 0) 1121 return; 1122 1123 /* We need to use m->m_pkthdr.len, so require the header */ 1124 if ((m0->m_flags & M_PKTHDR) == 0) 1125 panic("epstart: no header mbuf"); 1126 len = m0->m_pkthdr.len; 1127 1128 pad = (4 - len) & 3; 1129 1130 /* 1131 * The 3c509 automatically pads short packets to minimum ethernet 1132 * length, but we drop packets that are too large. Perhaps we should 1133 * truncate them instead? 1134 */ 1135 if (len + pad > ETHER_MAX_LEN) { 1136 /* packet is obviously too large: toss it */ 1137 ++ifp->if_oerrors; 1138 IF_DEQUEUE(&ifp->if_snd, m0); 1139 m_freem(m0); 1140 goto readcheck; 1141 } 1142 1143 if (bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_FREE_TX)) < 1144 len + pad + 4) { 1145 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1146 SET_TX_AVAIL_THRESH | 1147 ((len + pad + 4) >> sc->ep_pktlenshift)); 1148 /* not enough room in FIFO */ 1149 ifp->if_flags |= IFF_OACTIVE; 1150 return; 1151 } else { 1152 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1153 SET_TX_AVAIL_THRESH | ELINK_THRESH_DISABLE); 1154 } 1155 1156 IF_DEQUEUE(&ifp->if_snd, m0); 1157 if (m0 == 0) /* not really needed */ 1158 return; 1159 1160 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_TX_START_THRESH | 1161 ((len / 4 + sc->tx_start_thresh) /* >> sc->ep_pktlenshift*/)); 1162 1163 #if NBPFILTER > 0 1164 if (ifp->if_bpf) 1165 bpf_mtap(ifp->if_bpf, m0); 1166 #endif 1167 1168 /* 1169 * Do the output at splhigh() so that an interrupt from another device 1170 * won't cause a FIFO underrun. 1171 */ 1172 sh = splhigh(); 1173 1174 txreg = ep_w1_reg(sc, ELINK_W1_TX_PIO_WR_1); 1175 1176 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1177 /* 1178 * Prime the FIFO buffer counter (number of 16-bit 1179 * words about to be written to the FIFO). 1180 * 1181 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1182 * COUNTER IS NON-ZERO! 1183 */ 1184 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 1185 (len + pad) >> 1); 1186 } 1187 1188 bus_space_write_2(iot, ioh, txreg, len); 1189 bus_space_write_2(iot, ioh, txreg, 0xffff); /* Second is meaningless */ 1190 if (ELINK_IS_BUS_32(sc->bustype)) { 1191 for (m = m0; m;) { 1192 if (m->m_len > 3) { 1193 /* align our reads from core */ 1194 if (mtod(m, u_long) & 3) { 1195 u_long count = 1196 4 - (mtod(m, u_long) & 3); 1197 bus_space_write_multi_1(iot, ioh, 1198 txreg, mtod(m, u_int8_t *), count); 1199 m->m_data = 1200 (void *)(mtod(m, u_long) + count); 1201 m->m_len -= count; 1202 } 1203 bus_space_write_multi_stream_4(iot, ioh, 1204 txreg, mtod(m, u_int32_t *), m->m_len >> 2); 1205 m->m_data = (void *)(mtod(m, u_long) + 1206 (u_long)(m->m_len & ~3)); 1207 m->m_len -= m->m_len & ~3; 1208 } 1209 if (m->m_len) { 1210 bus_space_write_multi_1(iot, ioh, 1211 txreg, mtod(m, u_int8_t *), m->m_len); 1212 } 1213 MFREE(m, m0); 1214 m = m0; 1215 } 1216 } else { 1217 for (m = m0; m;) { 1218 if (m->m_len > 1) { 1219 if (mtod(m, u_long) & 1) { 1220 bus_space_write_1(iot, ioh, 1221 txreg, *(mtod(m, u_int8_t *))); 1222 m->m_data = 1223 (void *)(mtod(m, u_long) + 1); 1224 m->m_len -= 1; 1225 } 1226 bus_space_write_multi_stream_2(iot, ioh, 1227 txreg, mtod(m, u_int16_t *), 1228 m->m_len >> 1); 1229 } 1230 if (m->m_len & 1) { 1231 bus_space_write_1(iot, ioh, txreg, 1232 *(mtod(m, u_int8_t *) + m->m_len - 1)); 1233 } 1234 MFREE(m, m0); 1235 m = m0; 1236 } 1237 } 1238 while (pad--) 1239 bus_space_write_1(iot, ioh, txreg, 0); 1240 1241 splx(sh); 1242 1243 ++ifp->if_opackets; 1244 1245 readcheck: 1246 if ((bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)) & 1247 ERR_INCOMPLETE) == 0) { 1248 /* We received a complete packet. */ 1249 u_int16_t status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1250 1251 if ((status & S_INTR_LATCH) == 0) { 1252 /* 1253 * No interrupt, read the packet and continue 1254 * Is this supposed to happen? Is my motherboard 1255 * completely busted? 1256 */ 1257 epread(sc); 1258 } else { 1259 /* Got an interrupt, return so that it gets serviced. */ 1260 return; 1261 } 1262 } else { 1263 /* Check if we are stuck and reset [see XXX comment] */ 1264 if (epstatus(sc)) { 1265 if (ifp->if_flags & IFF_DEBUG) 1266 printf("%s: adapter reset\n", 1267 sc->sc_dev.dv_xname); 1268 epreset(sc); 1269 } 1270 } 1271 1272 goto startagain; 1273 } 1274 1275 1276 /* 1277 * XXX: The 3c509 card can get in a mode where both the fifo status bit 1278 * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set 1279 * We detect this situation and we reset the adapter. 1280 * It happens at times when there is a lot of broadcast traffic 1281 * on the cable (once in a blue moon). 1282 */ 1283 static int 1284 epstatus(sc) 1285 register struct ep_softc *sc; 1286 { 1287 bus_space_tag_t iot = sc->sc_iot; 1288 bus_space_handle_t ioh = sc->sc_ioh; 1289 u_int16_t fifost; 1290 1291 /* 1292 * Check the FIFO status and act accordingly 1293 */ 1294 GO_WINDOW(4); 1295 fifost = bus_space_read_2(iot, ioh, ELINK_W4_FIFO_DIAG); 1296 GO_WINDOW(1); 1297 1298 if (fifost & FIFOS_RX_UNDERRUN) { 1299 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1300 printf("%s: RX underrun\n", sc->sc_dev.dv_xname); 1301 epreset(sc); 1302 return 0; 1303 } 1304 1305 if (fifost & FIFOS_RX_STATUS_OVERRUN) { 1306 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1307 printf("%s: RX Status overrun\n", sc->sc_dev.dv_xname); 1308 return 1; 1309 } 1310 1311 if (fifost & FIFOS_RX_OVERRUN) { 1312 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1313 printf("%s: RX overrun\n", sc->sc_dev.dv_xname); 1314 return 1; 1315 } 1316 1317 if (fifost & FIFOS_TX_OVERRUN) { 1318 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1319 printf("%s: TX overrun\n", sc->sc_dev.dv_xname); 1320 epreset(sc); 1321 return 0; 1322 } 1323 1324 return 0; 1325 } 1326 1327 1328 static void 1329 eptxstat(sc) 1330 register struct ep_softc *sc; 1331 { 1332 bus_space_tag_t iot = sc->sc_iot; 1333 bus_space_handle_t ioh = sc->sc_ioh; 1334 int i; 1335 1336 /* 1337 * We need to read+write TX_STATUS until we get a 0 status 1338 * in order to turn off the interrupt flag. 1339 */ 1340 while ((i = bus_space_read_1(iot, ioh, 1341 ep_w1_reg(sc, ELINK_W1_TX_STATUS))) & TXS_COMPLETE) { 1342 bus_space_write_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS), 1343 0x0); 1344 1345 if (i & TXS_JABBER) { 1346 ++sc->sc_ethercom.ec_if.if_oerrors; 1347 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1348 printf("%s: jabber (%x)\n", 1349 sc->sc_dev.dv_xname, i); 1350 epreset(sc); 1351 } else if (i & TXS_UNDERRUN) { 1352 ++sc->sc_ethercom.ec_if.if_oerrors; 1353 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1354 printf("%s: fifo underrun (%x) @%d\n", 1355 sc->sc_dev.dv_xname, i, 1356 sc->tx_start_thresh); 1357 if (sc->tx_succ_ok < 100) 1358 sc->tx_start_thresh = min(ETHER_MAX_LEN, 1359 sc->tx_start_thresh + 20); 1360 sc->tx_succ_ok = 0; 1361 epreset(sc); 1362 } else if (i & TXS_MAX_COLLISION) { 1363 ++sc->sc_ethercom.ec_if.if_collisions; 1364 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 1365 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1366 } else 1367 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 1368 } 1369 } 1370 1371 int 1372 epintr(arg) 1373 void *arg; 1374 { 1375 register struct ep_softc *sc = arg; 1376 bus_space_tag_t iot = sc->sc_iot; 1377 bus_space_handle_t ioh = sc->sc_ioh; 1378 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1379 u_int16_t status; 1380 int ret = 0; 1381 int addrandom = 0; 1382 1383 if (sc->enabled == 0) 1384 return (0); 1385 1386 for (;;) { 1387 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1388 1389 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1390 1391 if ((status & (S_TX_COMPLETE | S_TX_AVAIL | 1392 S_RX_COMPLETE | S_CARD_FAILURE)) == 0) { 1393 if ((status & S_INTR_LATCH) == 0) { 1394 #if 0 1395 printf("%s: intr latch cleared\n", 1396 sc->sc_dev.dv_xname); 1397 #endif 1398 break; 1399 } 1400 } 1401 1402 ret = 1; 1403 1404 /* 1405 * Acknowledge any interrupts. It's important that we do this 1406 * first, since there would otherwise be a race condition. 1407 * Due to the i386 interrupt queueing, we may get spurious 1408 * interrupts occasionally. 1409 */ 1410 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1411 (status & (C_INTR_LATCH | 1412 C_CARD_FAILURE | 1413 C_TX_COMPLETE | 1414 C_TX_AVAIL | 1415 C_RX_COMPLETE | 1416 C_RX_EARLY | 1417 C_INT_RQD | 1418 C_UPD_STATS))); 1419 1420 #if 0 1421 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1422 1423 printf("%s: intr%s%s%s%s\n", sc->sc_dev.dv_xname, 1424 (status & S_RX_COMPLETE)?" RX_COMPLETE":"", 1425 (status & S_TX_COMPLETE)?" TX_COMPLETE":"", 1426 (status & S_TX_AVAIL)?" TX_AVAIL":"", 1427 (status & S_CARD_FAILURE)?" CARD_FAILURE":""); 1428 #endif 1429 1430 if (status & S_RX_COMPLETE) { 1431 epread(sc); 1432 addrandom = 1; 1433 } 1434 if (status & S_TX_AVAIL) { 1435 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1436 epstart(&sc->sc_ethercom.ec_if); 1437 addrandom = 1; 1438 } 1439 if (status & S_CARD_FAILURE) { 1440 printf("%s: adapter failure (%x)\n", 1441 sc->sc_dev.dv_xname, status); 1442 #if 1 1443 epinit(sc); 1444 #else 1445 epreset(sc); 1446 #endif 1447 return (1); 1448 } 1449 if (status & S_TX_COMPLETE) { 1450 eptxstat(sc); 1451 epstart(ifp); 1452 addrandom = 1; 1453 } 1454 1455 #if NRND > 0 1456 if (status) 1457 rnd_add_uint32(&sc->rnd_source, status); 1458 #endif 1459 } 1460 1461 /* no more interrupts */ 1462 return (ret); 1463 } 1464 1465 void 1466 epread(sc) 1467 register struct ep_softc *sc; 1468 { 1469 bus_space_tag_t iot = sc->sc_iot; 1470 bus_space_handle_t ioh = sc->sc_ioh; 1471 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1472 struct mbuf *m; 1473 struct ether_header *eh; 1474 int len; 1475 1476 len = bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1477 1478 again: 1479 if (ifp->if_flags & IFF_DEBUG) { 1480 int err = len & ERR_MASK; 1481 char *s = NULL; 1482 1483 if (len & ERR_INCOMPLETE) 1484 s = "incomplete packet"; 1485 else if (err == ERR_OVERRUN) 1486 s = "packet overrun"; 1487 else if (err == ERR_RUNT) 1488 s = "runt packet"; 1489 else if (err == ERR_ALIGNMENT) 1490 s = "bad alignment"; 1491 else if (err == ERR_CRC) 1492 s = "bad crc"; 1493 else if (err == ERR_OVERSIZE) 1494 s = "oversized packet"; 1495 else if (err == ERR_DRIBBLE) 1496 s = "dribble bits"; 1497 1498 if (s) 1499 printf("%s: %s\n", sc->sc_dev.dv_xname, s); 1500 } 1501 1502 if (len & ERR_INCOMPLETE) 1503 return; 1504 1505 if (len & ERR_RX) { 1506 ++ifp->if_ierrors; 1507 goto abort; 1508 } 1509 1510 len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */ 1511 1512 /* Pull packet off interface. */ 1513 m = epget(sc, len); 1514 if (m == 0) { 1515 ifp->if_ierrors++; 1516 goto abort; 1517 } 1518 1519 ++ifp->if_ipackets; 1520 1521 /* We assume the header fit entirely in one mbuf. */ 1522 eh = mtod(m, struct ether_header *); 1523 1524 #if NBPFILTER > 0 1525 /* 1526 * Check if there's a BPF listener on this interface. 1527 * If so, hand off the raw packet to BPF. 1528 */ 1529 if (ifp->if_bpf) { 1530 bpf_mtap(ifp->if_bpf, m); 1531 1532 /* 1533 * Note that the interface cannot be in promiscuous mode if 1534 * there are no BPF listeners. And if we are in promiscuous 1535 * mode, we have to check if this packet is really ours. 1536 */ 1537 if ((ifp->if_flags & IFF_PROMISC) && 1538 (eh->ether_dhost[0] & 1) == 0 && /* !mcast and !bcast */ 1539 bcmp(eh->ether_dhost, LLADDR(sc->sc_ethercom.ec_if.if_sadl), 1540 sizeof(eh->ether_dhost)) != 0) { 1541 m_freem(m); 1542 return; 1543 } 1544 } 1545 #endif 1546 (*ifp->if_input)(ifp, m); 1547 1548 /* 1549 * In periods of high traffic we can actually receive enough 1550 * packets so that the fifo overrun bit will be set at this point, 1551 * even though we just read a packet. In this case we 1552 * are not going to receive any more interrupts. We check for 1553 * this condition and read again until the fifo is not full. 1554 * We could simplify this test by not using epstatus(), but 1555 * rechecking the RX_STATUS register directly. This test could 1556 * result in unnecessary looping in cases where there is a new 1557 * packet but the fifo is not full, but it will not fix the 1558 * stuck behavior. 1559 * 1560 * Even with this improvement, we still get packet overrun errors 1561 * which are hurting performance. Maybe when I get some more time 1562 * I'll modify epread() so that it can handle RX_EARLY interrupts. 1563 */ 1564 if (epstatus(sc)) { 1565 len = bus_space_read_2(iot, ioh, 1566 ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1567 /* Check if we are stuck and reset [see XXX comment] */ 1568 if (len & ERR_INCOMPLETE) { 1569 if (ifp->if_flags & IFF_DEBUG) 1570 printf("%s: adapter reset\n", 1571 sc->sc_dev.dv_xname); 1572 epreset(sc); 1573 return; 1574 } 1575 goto again; 1576 } 1577 1578 return; 1579 1580 abort: 1581 ep_discard_rxtop(iot, ioh); 1582 1583 } 1584 1585 struct mbuf * 1586 epget(sc, totlen) 1587 struct ep_softc *sc; 1588 int totlen; 1589 { 1590 bus_space_tag_t iot = sc->sc_iot; 1591 bus_space_handle_t ioh = sc->sc_ioh; 1592 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1593 struct mbuf *top, **mp, *m, *rv = NULL; 1594 bus_addr_t rxreg; 1595 int len, remaining; 1596 int sh; 1597 1598 m = sc->mb[sc->next_mb]; 1599 sc->mb[sc->next_mb] = 0; 1600 if (m == 0) { 1601 MGETHDR(m, M_DONTWAIT, MT_DATA); 1602 if (m == 0) 1603 return 0; 1604 } else { 1605 /* If the queue is no longer full, refill. */ 1606 if (sc->last_mb == sc->next_mb) 1607 timeout(epmbuffill, sc, 1); 1608 /* Convert one of our saved mbuf's. */ 1609 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1610 m->m_data = m->m_pktdat; 1611 m->m_flags = M_PKTHDR; 1612 } 1613 m->m_pkthdr.rcvif = ifp; 1614 m->m_pkthdr.len = totlen; 1615 len = MHLEN; 1616 top = 0; 1617 mp = ⊤ 1618 1619 /* 1620 * We read the packet at splhigh() so that an interrupt from another 1621 * device doesn't cause the card's buffer to overflow while we're 1622 * reading it. We may still lose packets at other times. 1623 */ 1624 sh = splhigh(); 1625 1626 rxreg = ep_w1_reg(sc, ELINK_W1_RX_PIO_RD_1); 1627 1628 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1629 /* 1630 * Prime the FIFO buffer counter (number of 16-bit 1631 * words about to be read from the FIFO). 1632 * 1633 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1634 * COUNTER IS NON-ZERO! 1635 */ 1636 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, totlen >> 1); 1637 } 1638 1639 while (totlen > 0) { 1640 if (top) { 1641 m = sc->mb[sc->next_mb]; 1642 sc->mb[sc->next_mb] = 0; 1643 if (m == 0) { 1644 MGET(m, M_DONTWAIT, MT_DATA); 1645 if (m == 0) { 1646 m_freem(top); 1647 goto out; 1648 } 1649 } else { 1650 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1651 } 1652 len = MLEN; 1653 } 1654 if (totlen >= MINCLSIZE) { 1655 MCLGET(m, M_DONTWAIT); 1656 if ((m->m_flags & M_EXT) == 0) { 1657 m_free(m); 1658 m_freem(top); 1659 goto out; 1660 } 1661 len = MCLBYTES; 1662 } 1663 if (top == 0) { 1664 /* align the struct ip header */ 1665 caddr_t newdata = (caddr_t) 1666 ALIGN(m->m_data + sizeof(struct ether_header)) 1667 - sizeof(struct ether_header); 1668 len -= newdata - m->m_data; 1669 m->m_data = newdata; 1670 } 1671 remaining = len = min(totlen, len); 1672 if (ELINK_IS_BUS_32(sc->bustype)) { 1673 u_long offset = mtod(m, u_long); 1674 /* 1675 * Read bytes up to the point where we are aligned. 1676 * (We can align to 4 bytes, rather than ALIGNBYTES, 1677 * here because we're later reading 4-byte chunks.) 1678 */ 1679 if ((remaining > 3) && (offset & 3)) { 1680 int count = (4 - (offset & 3)); 1681 bus_space_read_multi_1(iot, ioh, 1682 rxreg, (u_int8_t *) offset, count); 1683 offset += count; 1684 remaining -= count; 1685 } 1686 if (remaining > 3) { 1687 bus_space_read_multi_stream_4(iot, ioh, 1688 rxreg, (u_int32_t *) offset, 1689 remaining >> 2); 1690 offset += remaining & ~3; 1691 remaining &= 3; 1692 } 1693 if (remaining) { 1694 bus_space_read_multi_1(iot, ioh, 1695 rxreg, (u_int8_t *) offset, remaining); 1696 } 1697 } else { 1698 u_long offset = mtod(m, u_long); 1699 if ((remaining > 1) && (offset & 1)) { 1700 bus_space_read_multi_1(iot, ioh, 1701 rxreg, (u_int8_t *) offset, 1); 1702 remaining -= 1; 1703 offset += 1; 1704 } 1705 if (remaining > 1) { 1706 bus_space_read_multi_stream_2(iot, ioh, 1707 rxreg, (u_int16_t *) offset, 1708 remaining >> 1); 1709 offset += remaining & ~1; 1710 } 1711 if (remaining & 1) { 1712 bus_space_read_multi_1(iot, ioh, 1713 rxreg, (u_int8_t *) offset, remaining & 1); 1714 } 1715 } 1716 m->m_len = len; 1717 totlen -= len; 1718 *mp = m; 1719 mp = &m->m_next; 1720 } 1721 1722 rv = top; 1723 1724 ep_discard_rxtop(iot, ioh); 1725 1726 out: 1727 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 1728 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1729 splx(sh); 1730 1731 return rv; 1732 } 1733 1734 int 1735 epioctl(ifp, cmd, data) 1736 register struct ifnet *ifp; 1737 u_long cmd; 1738 caddr_t data; 1739 { 1740 struct ep_softc *sc = ifp->if_softc; 1741 struct ifaddr *ifa = (struct ifaddr *)data; 1742 struct ifreq *ifr = (struct ifreq *)data; 1743 int s, error = 0; 1744 1745 s = splnet(); 1746 1747 switch (cmd) { 1748 1749 case SIOCSIFADDR: 1750 if ((error = epenable(sc)) != 0) 1751 break; 1752 /* epinit is called just below */ 1753 ifp->if_flags |= IFF_UP; 1754 switch (ifa->ifa_addr->sa_family) { 1755 #ifdef INET 1756 case AF_INET: 1757 epinit(sc); 1758 arp_ifinit(&sc->sc_ethercom.ec_if, ifa); 1759 break; 1760 #endif 1761 #ifdef NS 1762 case AF_NS: 1763 { 1764 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1765 1766 if (ns_nullhost(*ina)) 1767 ina->x_host = *(union ns_host *) 1768 LLADDR(ifp->if_sadl); 1769 else 1770 bcopy(ina->x_host.c_host, 1771 LLADDR(ifp->if_sadl), 1772 ifp->if_addrlen); 1773 /* Set new address. */ 1774 epinit(sc); 1775 break; 1776 } 1777 #endif 1778 default: 1779 epinit(sc); 1780 break; 1781 } 1782 break; 1783 1784 case SIOCSIFMEDIA: 1785 case SIOCGIFMEDIA: 1786 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 1787 break; 1788 1789 case SIOCSIFFLAGS: 1790 if ((ifp->if_flags & IFF_UP) == 0 && 1791 (ifp->if_flags & IFF_RUNNING) != 0) { 1792 /* 1793 * If interface is marked down and it is running, then 1794 * stop it. 1795 */ 1796 epstop(sc); 1797 ifp->if_flags &= ~IFF_RUNNING; 1798 epdisable(sc); 1799 } else if ((ifp->if_flags & IFF_UP) != 0 && 1800 (ifp->if_flags & IFF_RUNNING) == 0) { 1801 /* 1802 * If interface is marked up and it is stopped, then 1803 * start it. 1804 */ 1805 if ((error = epenable(sc)) != 0) 1806 break; 1807 epinit(sc); 1808 } else if ((ifp->if_flags & IFF_UP) != 0) { 1809 /* 1810 * deal with flags changes: 1811 * IFF_MULTICAST, IFF_PROMISC. 1812 */ 1813 epsetfilter(sc); 1814 } 1815 break; 1816 1817 case SIOCADDMULTI: 1818 case SIOCDELMULTI: 1819 if (sc->enabled == 0) { 1820 error = EIO; 1821 break; 1822 } 1823 1824 error = (cmd == SIOCADDMULTI) ? 1825 ether_addmulti(ifr, &sc->sc_ethercom) : 1826 ether_delmulti(ifr, &sc->sc_ethercom); 1827 1828 if (error == ENETRESET) { 1829 /* 1830 * Multicast list has changed; set the hardware filter 1831 * accordingly. 1832 */ 1833 epreset(sc); 1834 error = 0; 1835 } 1836 break; 1837 1838 default: 1839 error = EINVAL; 1840 break; 1841 } 1842 1843 splx(s); 1844 return (error); 1845 } 1846 1847 void 1848 epreset(sc) 1849 struct ep_softc *sc; 1850 { 1851 int s; 1852 1853 s = splnet(); 1854 epinit(sc); 1855 splx(s); 1856 } 1857 1858 void 1859 epwatchdog(ifp) 1860 struct ifnet *ifp; 1861 { 1862 struct ep_softc *sc = ifp->if_softc; 1863 1864 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1865 ++sc->sc_ethercom.ec_if.if_oerrors; 1866 1867 epreset(sc); 1868 } 1869 1870 void 1871 epstop(sc) 1872 register struct ep_softc *sc; 1873 { 1874 bus_space_tag_t iot = sc->sc_iot; 1875 bus_space_handle_t ioh = sc->sc_ioh; 1876 1877 if (sc->ep_flags & ELINK_FLAGS_MII) { 1878 /* Stop the one second clock. */ 1879 untimeout(ep_tick, sc); 1880 1881 /* Down the MII. */ 1882 mii_down(&sc->sc_mii); 1883 } 1884 1885 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 1886 /* 1887 * Clear the FIFO buffer count, thus halting 1888 * any currently-running transactions. 1889 */ 1890 GO_WINDOW(1); /* sanity */ 1891 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 1892 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1893 } 1894 1895 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1896 ep_discard_rxtop(iot, ioh); 1897 1898 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1899 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1900 1901 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 1902 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 1903 1904 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1905 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK); 1906 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK); 1907 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RX_FILTER); 1908 1909 epmbufempty(sc); 1910 } 1911 1912 1913 /* 1914 * Before reboots, reset card completely. 1915 */ 1916 static void 1917 epshutdown(arg) 1918 void *arg; 1919 { 1920 register struct ep_softc *sc = arg; 1921 int s = splnet(); 1922 1923 if (sc->enabled) { 1924 epstop(sc); 1925 ep_reset_cmd(sc, ELINK_COMMAND, GLOBAL_RESET); 1926 sc->enabled = 0; 1927 } 1928 splx(s); 1929 } 1930 1931 /* 1932 * We get eeprom data from the id_port given an offset into the 1933 * eeprom. Basically; after the ID_sequence is sent to all of 1934 * the cards; they enter the ID_CMD state where they will accept 1935 * command requests. 0x80-0xbf loads the eeprom data. We then 1936 * read the port 16 times and with every read; the cards check 1937 * for contention (ie: if one card writes a 0 bit and another 1938 * writes a 1 bit then the host sees a 0. At the end of the cycle; 1939 * each card compares the data on the bus; if there is a difference 1940 * then that card goes into ID_WAIT state again). In the meantime; 1941 * one bit of data is returned in the AX register which is conveniently 1942 * returned to us by bus_space_read_1(). Hence; we read 16 times getting one 1943 * bit of data with each read. 1944 * 1945 * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT! 1946 */ 1947 u_int16_t 1948 epreadeeprom(iot, ioh, offset) 1949 bus_space_tag_t iot; 1950 bus_space_handle_t ioh; 1951 int offset; 1952 { 1953 u_int16_t data = 0; 1954 int i; 1955 1956 bus_space_write_1(iot, ioh, 0, 0x80 + offset); 1957 delay(1000); 1958 for (i = 0; i < 16; i++) 1959 data = (data << 1) | (bus_space_read_2(iot, ioh, 0) & 1); 1960 return (data); 1961 } 1962 1963 static int 1964 epbusyeeprom(sc) 1965 struct ep_softc *sc; 1966 { 1967 bus_space_tag_t iot = sc->sc_iot; 1968 bus_space_handle_t ioh = sc->sc_ioh; 1969 int i = 100, j; 1970 1971 if (sc->bustype == ELINK_BUS_PCMCIA) { 1972 delay(1000); 1973 return 0; 1974 } 1975 1976 j = 0; /* bad GCC flow analysis */ 1977 while (i--) { 1978 j = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND); 1979 if (j & EEPROM_BUSY) 1980 delay(100); 1981 else 1982 break; 1983 } 1984 if (!i) { 1985 printf("\n%s: eeprom failed to come ready\n", 1986 sc->sc_dev.dv_xname); 1987 return (1); 1988 } 1989 if (j & EEPROM_TST_MODE) { 1990 /* XXX PnP mode? */ 1991 printf("\n%s: erase pencil mark!\n", sc->sc_dev.dv_xname); 1992 return (1); 1993 } 1994 return (0); 1995 } 1996 1997 u_int16_t 1998 ep_read_eeprom(sc, offset) 1999 struct ep_softc *sc; 2000 u_int16_t offset; 2001 { 2002 u_int16_t readcmd; 2003 2004 /* 2005 * RoadRunner has a larger EEPROM, so a different read command 2006 * is required. 2007 */ 2008 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) 2009 readcmd = READ_EEPROM_RR; 2010 else 2011 readcmd = READ_EEPROM; 2012 2013 if (epbusyeeprom(sc)) 2014 return (0); /* XXX why is eeprom busy? */ 2015 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W0_EEPROM_COMMAND, 2016 readcmd | offset); 2017 if (epbusyeeprom(sc)) 2018 return (0); /* XXX why is eeprom busy? */ 2019 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W0_EEPROM_DATA)); 2020 } 2021 2022 void 2023 epmbuffill(v) 2024 void *v; 2025 { 2026 struct ep_softc *sc = v; 2027 struct mbuf *m; 2028 int s, i; 2029 2030 s = splnet(); 2031 i = sc->last_mb; 2032 do { 2033 if (sc->mb[i] == 0) { 2034 MGET(m, M_DONTWAIT, MT_DATA); 2035 if (m == 0) 2036 break; 2037 sc->mb[i] = m; 2038 } 2039 i = (i + 1) % MAX_MBS; 2040 } while (i != sc->next_mb); 2041 sc->last_mb = i; 2042 /* If the queue was not filled, try again. */ 2043 if (sc->last_mb != sc->next_mb) 2044 timeout(epmbuffill, sc, 1); 2045 splx(s); 2046 } 2047 2048 void 2049 epmbufempty(sc) 2050 struct ep_softc *sc; 2051 { 2052 int s, i; 2053 2054 s = splnet(); 2055 for (i = 0; i<MAX_MBS; i++) { 2056 if (sc->mb[i]) { 2057 m_freem(sc->mb[i]); 2058 sc->mb[i] = NULL; 2059 } 2060 } 2061 sc->last_mb = sc->next_mb = 0; 2062 untimeout(epmbuffill, sc); 2063 splx(s); 2064 } 2065 2066 int 2067 epenable(sc) 2068 struct ep_softc *sc; 2069 { 2070 2071 if (sc->enabled == 0 && sc->enable != NULL) { 2072 if ((*sc->enable)(sc) != 0) { 2073 printf("%s: device enable failed\n", 2074 sc->sc_dev.dv_xname); 2075 return (EIO); 2076 } 2077 } 2078 2079 sc->enabled = 1; 2080 return (0); 2081 } 2082 2083 void 2084 epdisable(sc) 2085 struct ep_softc *sc; 2086 { 2087 2088 if (sc->enabled != 0 && sc->disable != NULL) { 2089 (*sc->disable)(sc); 2090 sc->enabled = 0; 2091 } 2092 } 2093 2094 int 2095 ep_activate(self, act) 2096 struct device *self; 2097 enum devact act; 2098 { 2099 struct ep_softc *sc = (struct ep_softc *)self; 2100 int rv = 0, s; 2101 2102 s = splnet(); 2103 switch (act) { 2104 case DVACT_ACTIVATE: 2105 rv = EOPNOTSUPP; 2106 break; 2107 2108 case DVACT_DEACTIVATE: 2109 #ifdef notyet 2110 /* First, kill off the interface. */ 2111 if_detach(sc->sc_ethercom.ec_if); 2112 #endif 2113 2114 /* Now disable the interface. */ 2115 epdisable(sc); 2116 break; 2117 } 2118 splx(s); 2119 return (rv); 2120 } 2121 2122 void 2123 ep_mii_setbit(sc, bit) 2124 struct ep_softc *sc; 2125 u_int16_t bit; 2126 { 2127 u_int16_t val; 2128 2129 /* We assume we're already in Window 4 */ 2130 val = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_BOOM_PHYSMGMT); 2131 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_BOOM_PHYSMGMT, 2132 val | bit); 2133 } 2134 2135 void 2136 ep_mii_clrbit(sc, bit) 2137 struct ep_softc *sc; 2138 u_int16_t bit; 2139 { 2140 u_int16_t val; 2141 2142 /* We assume we're already in Window 4 */ 2143 val = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_BOOM_PHYSMGMT); 2144 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_BOOM_PHYSMGMT, 2145 val & ~bit); 2146 } 2147 2148 u_int16_t 2149 ep_mii_readbit(sc, bit) 2150 struct ep_softc *sc; 2151 u_int16_t bit; 2152 { 2153 2154 /* We assume we're already in Window 4 */ 2155 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_BOOM_PHYSMGMT) & 2156 bit); 2157 } 2158 2159 void 2160 ep_mii_sync(sc) 2161 struct ep_softc *sc; 2162 { 2163 int i; 2164 2165 /* We assume we're already in Window 4 */ 2166 ep_mii_clrbit(sc, PHYSMGMT_DIR); 2167 for (i = 0; i < 32; i++) { 2168 ep_mii_clrbit(sc, PHYSMGMT_CLK); 2169 ep_mii_setbit(sc, PHYSMGMT_CLK); 2170 } 2171 } 2172 2173 void 2174 ep_mii_sendbits(sc, data, nbits) 2175 struct ep_softc *sc; 2176 u_int32_t data; 2177 int nbits; 2178 { 2179 int i; 2180 2181 /* We assume we're already in Window 4 */ 2182 ep_mii_setbit(sc, PHYSMGMT_DIR); 2183 for (i = 1 << (nbits - 1); i; i = i >> 1) { 2184 ep_mii_clrbit(sc, PHYSMGMT_CLK); 2185 ep_mii_readbit(sc, PHYSMGMT_CLK); 2186 if (data & i) 2187 ep_mii_setbit(sc, PHYSMGMT_DATA); 2188 else 2189 ep_mii_clrbit(sc, PHYSMGMT_DATA); 2190 ep_mii_setbit(sc, PHYSMGMT_CLK); 2191 ep_mii_readbit(sc, PHYSMGMT_CLK); 2192 } 2193 } 2194 2195 int 2196 ep_mii_readreg(self, phy, reg) 2197 struct device *self; 2198 int phy, reg; 2199 { 2200 struct ep_softc *sc = (struct ep_softc *)self; 2201 int val = 0, i, err; 2202 2203 /* 2204 * Read the PHY register by manually driving the MII control lines. 2205 */ 2206 2207 GO_WINDOW(4); 2208 2209 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_BOOM_PHYSMGMT, 0); 2210 2211 ep_mii_sync(sc); 2212 ep_mii_sendbits(sc, MII_COMMAND_START, 2); 2213 ep_mii_sendbits(sc, MII_COMMAND_READ, 2); 2214 ep_mii_sendbits(sc, phy, 5); 2215 ep_mii_sendbits(sc, reg, 5); 2216 2217 ep_mii_clrbit(sc, PHYSMGMT_DIR); 2218 ep_mii_clrbit(sc, PHYSMGMT_CLK); 2219 ep_mii_setbit(sc, PHYSMGMT_CLK); 2220 ep_mii_clrbit(sc, PHYSMGMT_CLK); 2221 2222 err = ep_mii_readbit(sc, PHYSMGMT_DATA); 2223 ep_mii_setbit(sc, PHYSMGMT_CLK); 2224 2225 /* Even if an error occurs, must still clock out the cycle. */ 2226 for (i = 0; i < 16; i++) { 2227 val <<= 1; 2228 ep_mii_clrbit(sc, PHYSMGMT_CLK); 2229 if (err == 0 && ep_mii_readbit(sc, PHYSMGMT_DATA)) 2230 val |= 1; 2231 ep_mii_setbit(sc, PHYSMGMT_CLK); 2232 } 2233 ep_mii_clrbit(sc, PHYSMGMT_CLK); 2234 ep_mii_setbit(sc, PHYSMGMT_CLK); 2235 2236 GO_WINDOW(1); /* back to operating window */ 2237 2238 return (err ? 0 : val); 2239 } 2240 2241 void 2242 ep_mii_writereg(self, phy, reg, val) 2243 struct device *self; 2244 int phy, reg, val; 2245 { 2246 struct ep_softc *sc = (struct ep_softc *)self; 2247 2248 /* 2249 * Write the PHY register by manually driving the MII control lines. 2250 */ 2251 2252 GO_WINDOW(4); 2253 2254 ep_mii_sync(sc); 2255 ep_mii_sendbits(sc, MII_COMMAND_START, 2); 2256 ep_mii_sendbits(sc, MII_COMMAND_WRITE, 2); 2257 ep_mii_sendbits(sc, phy, 5); 2258 ep_mii_sendbits(sc, reg, 5); 2259 ep_mii_sendbits(sc, MII_COMMAND_ACK, 2); 2260 ep_mii_sendbits(sc, val, 16); 2261 2262 ep_mii_clrbit(sc, PHYSMGMT_CLK); 2263 ep_mii_setbit(sc, PHYSMGMT_CLK); 2264 2265 GO_WINDOW(1); /* back to operating window */ 2266 } 2267 2268 void 2269 ep_statchg(self) 2270 struct device *self; 2271 { 2272 struct ep_softc *sc = (struct ep_softc *)self; 2273 bus_space_tag_t iot = sc->sc_iot; 2274 bus_space_handle_t ioh = sc->sc_ioh; 2275 int mctl; 2276 2277 /* XXX Update ifp->if_baudrate */ 2278 2279 GO_WINDOW(3); 2280 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 2281 if (sc->sc_mii.mii_media_active & IFM_FDX) 2282 mctl |= MAC_CONTROL_FDX; 2283 else 2284 mctl &= ~MAC_CONTROL_FDX; 2285 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 2286 GO_WINDOW(1); /* back to operating window */ 2287 } 2288
Indexes created Sun Sep 28 12:09:53 GMT 2025