elink3.c revision 1.7 1 /* $NetBSD: elink3.c,v 1.7 1996/05/14 22:22:05 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 1994 Herb Peyerl <hpeyerl (at) beer.org>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Herb Peyerl.
18 * 4. The name of Herb Peyerl may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #include "bpfilter.h"
34
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/mbuf.h>
38 #include <sys/socket.h>
39 #include <sys/ioctl.h>
40 #include <sys/errno.h>
41 #include <sys/syslog.h>
42 #include <sys/select.h>
43 #include <sys/device.h>
44
45 #include <net/if.h>
46 #include <net/netisr.h>
47 #include <net/if_dl.h>
48 #include <net/if_types.h>
49 #include <net/netisr.h>
50
51 #ifdef INET
52 #include <netinet/in.h>
53 #include <netinet/in_systm.h>
54 #include <netinet/in_var.h>
55 #include <netinet/ip.h>
56 #include <netinet/if_ether.h>
57 #endif
58
59 #ifdef NS
60 #include <netns/ns.h>
61 #include <netns/ns_if.h>
62 #endif
63
64 #if NBPFILTER > 0
65 #include <net/bpf.h>
66 #include <net/bpfdesc.h>
67 #endif
68
69 #include <machine/cpu.h>
70 #include <machine/bus.h>
71 #include <machine/intr.h>
72
73 #include <dev/ic/elink3var.h>
74 #include <dev/ic/elink3reg.h>
75
76 #define ETHER_MIN_LEN 64
77 #define ETHER_MAX_LEN 1518
78 #define ETHER_ADDR_LEN 6
79
80 struct cfdriver ep_cd = {
81 NULL, "ep", DV_IFNET
82 };
83
84 static void eptxstat __P((struct ep_softc *));
85 static int epstatus __P((struct ep_softc *));
86 void epinit __P((struct ep_softc *));
87 int epioctl __P((struct ifnet *, u_long, caddr_t));
88 void epstart __P((struct ifnet *));
89 void epwatchdog __P((struct ifnet *));
90 void epreset __P((struct ep_softc *));
91 void epread __P((struct ep_softc *));
92 struct mbuf *epget __P((struct ep_softc *, int));
93 void epmbuffill __P((void *));
94 void epmbufempty __P((struct ep_softc *));
95 void epsetfilter __P((struct ep_softc *));
96 void epsetlink __P((struct ep_softc *));
97
98 static int epbusyeeprom __P((struct ep_softc *));
99
100 void
101 epconfig(sc, conn)
102 struct ep_softc *sc;
103 u_int16_t conn;
104 {
105 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
106 bus_chipset_tag_t bc = sc->sc_bc;
107 bus_io_handle_t ioh = sc->sc_ioh;
108 u_int16_t i;
109
110 sc->ep_connectors = 0;
111 printf("%s: ", sc->sc_dev.dv_xname);
112 if (conn & IS_AUI) {
113 printf("aui");
114 sc->ep_connectors |= AUI;
115 }
116 if (conn & IS_BNC) {
117 if (sc->ep_connectors)
118 printf("/");
119 printf("bnc");
120 sc->ep_connectors |= BNC;
121 }
122 if (conn & IS_UTP) {
123 if (sc->ep_connectors)
124 printf("/");
125 printf("utp");
126 sc->ep_connectors |= UTP;
127 }
128 if (!sc->ep_connectors)
129 printf("no connectors!");
130
131 /*
132 * Read the station address from the eeprom
133 */
134 for (i = 0; i < 3; i++) {
135 u_int16_t x;
136 if (epbusyeeprom(sc))
137 return;
138 bus_io_write_2(bc, ioh, EP_W0_EEPROM_COMMAND, READ_EEPROM | i);
139 if (epbusyeeprom(sc))
140 return;
141 x = bus_io_read_2(bc, ioh, EP_W0_EEPROM_DATA);
142 sc->sc_arpcom.ac_enaddr[(i << 1)] = x >> 8;
143 sc->sc_arpcom.ac_enaddr[(i << 1) + 1] = x;
144 }
145
146 printf(" address %s\n", ether_sprintf(sc->sc_arpcom.ac_enaddr));
147
148 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
149 ifp->if_softc = sc;
150 ifp->if_start = epstart;
151 ifp->if_ioctl = epioctl;
152 ifp->if_watchdog = epwatchdog;
153 ifp->if_flags =
154 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
155
156 if_attach(ifp);
157 ether_ifattach(ifp);
158
159 #if NBPFILTER > 0
160 bpfattach(&sc->sc_arpcom.ac_if.if_bpf, ifp, DLT_EN10MB,
161 sizeof(struct ether_header));
162 #endif
163
164 sc->tx_start_thresh = 20; /* probably a good starting point. */
165 }
166
167 /*
168 * The order in here seems important. Otherwise we may not receive
169 * interrupts. ?!
170 */
171 void
172 epinit(sc)
173 register struct ep_softc *sc;
174 {
175 register struct ifnet *ifp = &sc->sc_arpcom.ac_if;
176 bus_chipset_tag_t bc = sc->sc_bc;
177 bus_io_handle_t ioh = sc->sc_ioh;
178 int i;
179
180 while (bus_io_read_2(bc, ioh, EP_STATUS) & S_COMMAND_IN_PROGRESS)
181 ;
182
183 if (sc->bustype != EP_BUS_PCI) {
184 GO_WINDOW(0);
185 bus_io_write_2(bc, ioh, EP_W0_CONFIG_CTRL, 0);
186 bus_io_write_2(bc, ioh, EP_W0_CONFIG_CTRL, ENABLE_DRQ_IRQ);
187 }
188
189 if (sc->bustype == EP_BUS_PCMCIA) {
190 #ifdef EP_COAX_DEFAULT
191 bus_io_write_2(bc, ioh, EP_W0_ADDRESS_CFG,3<<14);
192 #else
193 bus_io_write_2(bc, ioh, EP_W0_ADDRESS_CFG,0<<14);
194 #endif
195 bus_io_write_2(bc, ioh, EP_W0_RESOURCE_CFG, 0x3f00);
196 }
197
198 GO_WINDOW(2);
199 for (i = 0; i < 6; i++) /* Reload the ether_addr. */
200 bus_io_write_1(bc, ioh, EP_W2_ADDR_0 + i,
201 sc->sc_arpcom.ac_enaddr[i]);
202
203 bus_io_write_2(bc, ioh, EP_COMMAND, RX_RESET);
204 bus_io_write_2(bc, ioh, EP_COMMAND, TX_RESET);
205
206 GO_WINDOW(1); /* Window 1 is operating window */
207 for (i = 0; i < 31; i++)
208 bus_io_read_1(bc, ioh, EP_W1_TX_STATUS);
209
210 bus_io_write_2(bc, ioh, EP_COMMAND, SET_RD_0_MASK | S_CARD_FAILURE |
211 S_RX_COMPLETE | S_TX_COMPLETE | S_TX_AVAIL);
212 bus_io_write_2(bc, ioh, EP_COMMAND, SET_INTR_MASK | S_CARD_FAILURE |
213 S_RX_COMPLETE | S_TX_COMPLETE | S_TX_AVAIL);
214
215 /*
216 * Attempt to get rid of any stray interrupts that occured during
217 * configuration. On the i386 this isn't possible because one may
218 * already be queued. However, a single stray interrupt is
219 * unimportant.
220 */
221 bus_io_write_2(bc, ioh, EP_COMMAND, ACK_INTR | 0xff);
222
223 epsetfilter(sc);
224 epsetlink(sc);
225
226 bus_io_write_2(bc, ioh, EP_COMMAND, RX_ENABLE);
227 bus_io_write_2(bc, ioh, EP_COMMAND, TX_ENABLE);
228
229 epmbuffill(sc);
230
231 /* Interface is now `running', with no output active. */
232 ifp->if_flags |= IFF_RUNNING;
233 ifp->if_flags &= ~IFF_OACTIVE;
234
235 /* Attempt to start output, if any. */
236 epstart(ifp);
237 }
238
239 void
240 epsetfilter(sc)
241 register struct ep_softc *sc;
242 {
243 register struct ifnet *ifp = &sc->sc_arpcom.ac_if;
244
245 GO_WINDOW(1); /* Window 1 is operating window */
246 bus_io_write_2(sc->sc_bc, sc->sc_ioh, EP_COMMAND, SET_RX_FILTER |
247 FIL_INDIVIDUAL | FIL_BRDCST |
248 ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0 ) |
249 ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0 ));
250 }
251
252 void
253 epsetlink(sc)
254 register struct ep_softc *sc;
255 {
256 register struct ifnet *ifp = &sc->sc_arpcom.ac_if;
257 bus_chipset_tag_t bc = sc->sc_bc;
258 bus_io_handle_t ioh = sc->sc_ioh;
259
260 /*
261 * you can `ifconfig (link0|-link0) ep0' to get the following
262 * behaviour:
263 * -link0 disable AUI/UTP. enable BNC.
264 * link0 disable BNC. enable AUI.
265 * link1 if the card has a UTP connector, and link0 is
266 * set too, then you get the UTP port.
267 */
268 GO_WINDOW(4);
269 bus_io_write_2(bc, ioh, EP_W4_MEDIA_TYPE, DISABLE_UTP);
270 if (!(ifp->if_flags & IFF_LINK0) && (sc->ep_connectors & BNC)) {
271 if (sc->bustype == EP_BUS_PCMCIA) {
272 GO_WINDOW(0);
273 bus_io_write_2(bc, ioh, EP_W0_ADDRESS_CFG,3<<14);
274 GO_WINDOW(1);
275 }
276 bus_io_write_2(bc, ioh, EP_COMMAND, START_TRANSCEIVER);
277 delay(1000);
278 }
279 if (ifp->if_flags & IFF_LINK0) {
280 bus_io_write_2(bc, ioh, EP_COMMAND, STOP_TRANSCEIVER);
281 delay(1000);
282 if ((ifp->if_flags & IFF_LINK1) && (sc->ep_connectors & UTP)) {
283 if (sc->bustype == EP_BUS_PCMCIA) {
284 GO_WINDOW(0);
285 bus_io_write_2(bc, ioh,
286 EP_W0_ADDRESS_CFG,0<<14);
287 GO_WINDOW(4);
288 }
289 bus_io_write_2(bc, ioh, EP_W4_MEDIA_TYPE, ENABLE_UTP);
290 }
291 }
292 GO_WINDOW(1);
293 }
294
295 /*
296 * Start outputting on the interface.
297 * Always called as splnet().
298 */
299 void
300 epstart(ifp)
301 struct ifnet *ifp;
302 {
303 register struct ep_softc *sc = ifp->if_softc;
304 bus_chipset_tag_t bc = sc->sc_bc;
305 bus_io_handle_t ioh = sc->sc_ioh;
306 struct mbuf *m, *m0;
307 int sh, len, pad;
308
309 /* Don't transmit if interface is busy or not running */
310 if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING)
311 return;
312
313 startagain:
314 /* Sneak a peek at the next packet */
315 m0 = ifp->if_snd.ifq_head;
316 if (m0 == 0)
317 return;
318
319 /* We need to use m->m_pkthdr.len, so require the header */
320 if ((m0->m_flags & M_PKTHDR) == 0)
321 panic("epstart: no header mbuf");
322 len = m0->m_pkthdr.len;
323
324 pad = (4 - len) & 3;
325
326 /*
327 * The 3c509 automatically pads short packets to minimum ethernet
328 * length, but we drop packets that are too large. Perhaps we should
329 * truncate them instead?
330 */
331 if (len + pad > ETHER_MAX_LEN) {
332 /* packet is obviously too large: toss it */
333 ++ifp->if_oerrors;
334 IF_DEQUEUE(&ifp->if_snd, m0);
335 m_freem(m0);
336 goto readcheck;
337 }
338
339 if (bus_io_read_2(bc, ioh, EP_W1_FREE_TX) < len + pad + 4) {
340 bus_io_write_2(bc, ioh, EP_COMMAND,
341 SET_TX_AVAIL_THRESH | (len + pad + 4));
342 /* not enough room in FIFO */
343 ifp->if_flags |= IFF_OACTIVE;
344 return;
345 } else {
346 bus_io_write_2(bc, ioh, EP_COMMAND,
347 SET_TX_AVAIL_THRESH | 2044);
348 }
349
350 IF_DEQUEUE(&ifp->if_snd, m0);
351 if (m0 == 0) /* not really needed */
352 return;
353
354 bus_io_write_2(bc, ioh, EP_COMMAND, SET_TX_START_THRESH |
355 (len / 4 + sc->tx_start_thresh));
356
357 #if NBPFILTER > 0
358 if (ifp->if_bpf)
359 bpf_mtap(ifp->if_bpf, m0);
360 #endif
361
362 /*
363 * Do the output at splhigh() so that an interrupt from another device
364 * won't cause a FIFO underrun.
365 */
366 sh = splhigh();
367
368 bus_io_write_2(bc, ioh, EP_W1_TX_PIO_WR_1, len);
369 bus_io_write_2(bc, ioh, EP_W1_TX_PIO_WR_1,
370 0xffff); /* Second dword meaningless */
371 if (EP_IS_BUS_32(sc->bustype)) {
372 for (m = m0; m; ) {
373 if (m->m_len > 3)
374 bus_io_write_multi_4(bc, ioh,
375 EP_W1_TX_PIO_WR_1, mtod(m, u_int32_t *),
376 m->m_len / 4);
377 if (m->m_len & 3)
378 bus_io_write_multi_1(bc, ioh,
379 EP_W1_TX_PIO_WR_1,
380 mtod(m, u_int8_t *) + (m->m_len & ~3),
381 m->m_len & 3);
382 MFREE(m, m0);
383 m = m0;
384 }
385 } else {
386 for (m = m0; m; ) {
387 if (m->m_len > 1)
388 bus_io_write_multi_2(bc, ioh,
389 EP_W1_TX_PIO_WR_1, mtod(m, u_int16_t *),
390 m->m_len / 2);
391 if (m->m_len & 1)
392 bus_io_write_1(bc, ioh, EP_W1_TX_PIO_WR_1,
393 *(mtod(m, u_int8_t *) + m->m_len - 1));
394 MFREE(m, m0);
395 m = m0;
396 }
397 }
398 while (pad--)
399 bus_io_write_1(bc, ioh, EP_W1_TX_PIO_WR_1, 0);
400
401 splx(sh);
402
403 ++ifp->if_opackets;
404
405 readcheck:
406 if ((bus_io_read_2(bc, ioh, EP_W1_RX_STATUS) & ERR_INCOMPLETE) == 0) {
407 /* We received a complete packet. */
408 u_int16_t status = bus_io_read_2(bc, ioh, EP_STATUS);
409
410 if ((status & S_INTR_LATCH) == 0) {
411 /*
412 * No interrupt, read the packet and continue
413 * Is this supposed to happen? Is my motherboard
414 * completely busted?
415 */
416 epread(sc);
417 }
418 else
419 /* Got an interrupt, return so that it gets serviced. */
420 return;
421 }
422 else {
423 /* Check if we are stuck and reset [see XXX comment] */
424 if (epstatus(sc)) {
425 if (ifp->if_flags & IFF_DEBUG)
426 printf("%s: adapter reset\n",
427 sc->sc_dev.dv_xname);
428 epreset(sc);
429 }
430 }
431
432 goto startagain;
433 }
434
435
436 /*
437 * XXX: The 3c509 card can get in a mode where both the fifo status bit
438 * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set
439 * We detect this situation and we reset the adapter.
440 * It happens at times when there is a lot of broadcast traffic
441 * on the cable (once in a blue moon).
442 */
443 static int
444 epstatus(sc)
445 register struct ep_softc *sc;
446 {
447 bus_chipset_tag_t bc = sc->sc_bc;
448 bus_io_handle_t ioh = sc->sc_ioh;
449 u_int16_t fifost;
450
451 /*
452 * Check the FIFO status and act accordingly
453 */
454 GO_WINDOW(4);
455 fifost = bus_io_read_2(bc, ioh, EP_W4_FIFO_DIAG);
456 GO_WINDOW(1);
457
458 if (fifost & FIFOS_RX_UNDERRUN) {
459 if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
460 printf("%s: RX underrun\n", sc->sc_dev.dv_xname);
461 epreset(sc);
462 return 0;
463 }
464
465 if (fifost & FIFOS_RX_STATUS_OVERRUN) {
466 if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
467 printf("%s: RX Status overrun\n", sc->sc_dev.dv_xname);
468 return 1;
469 }
470
471 if (fifost & FIFOS_RX_OVERRUN) {
472 if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
473 printf("%s: RX overrun\n", sc->sc_dev.dv_xname);
474 return 1;
475 }
476
477 if (fifost & FIFOS_TX_OVERRUN) {
478 if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
479 printf("%s: TX overrun\n", sc->sc_dev.dv_xname);
480 epreset(sc);
481 return 0;
482 }
483
484 return 0;
485 }
486
487
488 static void
489 eptxstat(sc)
490 register struct ep_softc *sc;
491 {
492 bus_chipset_tag_t bc = sc->sc_bc;
493 bus_io_handle_t ioh = sc->sc_ioh;
494 int i;
495
496 /*
497 * We need to read+write TX_STATUS until we get a 0 status
498 * in order to turn off the interrupt flag.
499 */
500 while ((i = bus_io_read_1(bc, ioh, EP_W1_TX_STATUS)) & TXS_COMPLETE) {
501 bus_io_write_1(bc, ioh, EP_W1_TX_STATUS, 0x0);
502
503 if (i & TXS_JABBER) {
504 ++sc->sc_arpcom.ac_if.if_oerrors;
505 if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
506 printf("%s: jabber (%x)\n",
507 sc->sc_dev.dv_xname, i);
508 epreset(sc);
509 } else if (i & TXS_UNDERRUN) {
510 ++sc->sc_arpcom.ac_if.if_oerrors;
511 if (sc->sc_arpcom.ac_if.if_flags & IFF_DEBUG)
512 printf("%s: fifo underrun (%x) @%d\n",
513 sc->sc_dev.dv_xname, i,
514 sc->tx_start_thresh);
515 if (sc->tx_succ_ok < 100)
516 sc->tx_start_thresh = min(ETHER_MAX_LEN,
517 sc->tx_start_thresh + 20);
518 sc->tx_succ_ok = 0;
519 epreset(sc);
520 } else if (i & TXS_MAX_COLLISION) {
521 ++sc->sc_arpcom.ac_if.if_collisions;
522 bus_io_write_2(bc, ioh, EP_COMMAND, TX_ENABLE);
523 sc->sc_arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
524 } else
525 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127;
526 }
527 }
528
529 int
530 epintr(arg)
531 void *arg;
532 {
533 register struct ep_softc *sc = arg;
534 bus_chipset_tag_t bc = sc->sc_bc;
535 bus_io_handle_t ioh = sc->sc_ioh;
536 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
537 u_int16_t status;
538 int ret = 0;
539
540 for (;;) {
541 bus_io_write_2(bc, ioh, EP_COMMAND, C_INTR_LATCH);
542
543 status = bus_io_read_2(bc, ioh, EP_STATUS);
544
545 if ((status & (S_TX_COMPLETE | S_TX_AVAIL |
546 S_RX_COMPLETE | S_CARD_FAILURE)) == 0)
547 break;
548
549 ret = 1;
550
551 /*
552 * Acknowledge any interrupts. It's important that we do this
553 * first, since there would otherwise be a race condition.
554 * Due to the i386 interrupt queueing, we may get spurious
555 * interrupts occasionally.
556 */
557 bus_io_write_2(bc, ioh, EP_COMMAND, ACK_INTR | status);
558
559 if (status & S_RX_COMPLETE)
560 epread(sc);
561 if (status & S_TX_AVAIL) {
562 sc->sc_arpcom.ac_if.if_flags &= ~IFF_OACTIVE;
563 epstart(&sc->sc_arpcom.ac_if);
564 }
565 if (status & S_CARD_FAILURE) {
566 printf("%s: adapter failure (%x)\n",
567 sc->sc_dev.dv_xname, status);
568 epreset(sc);
569 return (1);
570 }
571 if (status & S_TX_COMPLETE) {
572 eptxstat(sc);
573 epstart(ifp);
574 }
575 }
576
577 /* no more interrupts */
578 return (ret);
579 }
580
581 void
582 epread(sc)
583 register struct ep_softc *sc;
584 {
585 bus_chipset_tag_t bc = sc->sc_bc;
586 bus_io_handle_t ioh = sc->sc_ioh;
587 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
588 struct mbuf *m;
589 struct ether_header *eh;
590 int len;
591
592 len = bus_io_read_2(bc, ioh, EP_W1_RX_STATUS);
593
594 again:
595 if (ifp->if_flags & IFF_DEBUG) {
596 int err = len & ERR_MASK;
597 char *s = NULL;
598
599 if (len & ERR_INCOMPLETE)
600 s = "incomplete packet";
601 else if (err == ERR_OVERRUN)
602 s = "packet overrun";
603 else if (err == ERR_RUNT)
604 s = "runt packet";
605 else if (err == ERR_ALIGNMENT)
606 s = "bad alignment";
607 else if (err == ERR_CRC)
608 s = "bad crc";
609 else if (err == ERR_OVERSIZE)
610 s = "oversized packet";
611 else if (err == ERR_DRIBBLE)
612 s = "dribble bits";
613
614 if (s)
615 printf("%s: %s\n", sc->sc_dev.dv_xname, s);
616 }
617
618 if (len & ERR_INCOMPLETE)
619 return;
620
621 if (len & ERR_RX) {
622 ++ifp->if_ierrors;
623 goto abort;
624 }
625
626 len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */
627
628 /* Pull packet off interface. */
629 m = epget(sc, len);
630 if (m == 0) {
631 ifp->if_ierrors++;
632 goto abort;
633 }
634
635 ++ifp->if_ipackets;
636
637 /* We assume the header fit entirely in one mbuf. */
638 eh = mtod(m, struct ether_header *);
639
640 #if NBPFILTER > 0
641 /*
642 * Check if there's a BPF listener on this interface.
643 * If so, hand off the raw packet to BPF.
644 */
645 if (ifp->if_bpf) {
646 bpf_mtap(ifp->if_bpf, m);
647
648 /*
649 * Note that the interface cannot be in promiscuous mode if
650 * there are no BPF listeners. And if we are in promiscuous
651 * mode, we have to check if this packet is really ours.
652 */
653 if ((ifp->if_flags & IFF_PROMISC) &&
654 (eh->ether_dhost[0] & 1) == 0 && /* !mcast and !bcast */
655 bcmp(eh->ether_dhost, sc->sc_arpcom.ac_enaddr,
656 sizeof(eh->ether_dhost)) != 0) {
657 m_freem(m);
658 return;
659 }
660 }
661 #endif
662
663 /* We assume the header fit entirely in one mbuf. */
664 m_adj(m, sizeof(struct ether_header));
665 ether_input(ifp, eh, m);
666
667 /*
668 * In periods of high traffic we can actually receive enough
669 * packets so that the fifo overrun bit will be set at this point,
670 * even though we just read a packet. In this case we
671 * are not going to receive any more interrupts. We check for
672 * this condition and read again until the fifo is not full.
673 * We could simplify this test by not using epstatus(), but
674 * rechecking the RX_STATUS register directly. This test could
675 * result in unnecessary looping in cases where there is a new
676 * packet but the fifo is not full, but it will not fix the
677 * stuck behavior.
678 *
679 * Even with this improvement, we still get packet overrun errors
680 * which are hurting performance. Maybe when I get some more time
681 * I'll modify epread() so that it can handle RX_EARLY interrupts.
682 */
683 if (epstatus(sc)) {
684 len = bus_io_read_2(bc, ioh, EP_W1_RX_STATUS);
685 /* Check if we are stuck and reset [see XXX comment] */
686 if (len & ERR_INCOMPLETE) {
687 if (ifp->if_flags & IFF_DEBUG)
688 printf("%s: adapter reset\n",
689 sc->sc_dev.dv_xname);
690 epreset(sc);
691 return;
692 }
693 goto again;
694 }
695
696 return;
697
698 abort:
699 bus_io_write_2(bc, ioh, EP_COMMAND, RX_DISCARD_TOP_PACK);
700 while (bus_io_read_2(bc, ioh, EP_STATUS) & S_COMMAND_IN_PROGRESS)
701 ;
702 }
703
704 struct mbuf *
705 epget(sc, totlen)
706 struct ep_softc *sc;
707 int totlen;
708 {
709 bus_chipset_tag_t bc = sc->sc_bc;
710 bus_io_handle_t ioh = sc->sc_ioh;
711 struct ifnet *ifp = &sc->sc_arpcom.ac_if;
712 struct mbuf *top, **mp, *m;
713 int len;
714 int sh;
715
716 m = sc->mb[sc->next_mb];
717 sc->mb[sc->next_mb] = 0;
718 if (m == 0) {
719 MGETHDR(m, M_DONTWAIT, MT_DATA);
720 if (m == 0)
721 return 0;
722 } else {
723 /* If the queue is no longer full, refill. */
724 if (sc->last_mb == sc->next_mb)
725 timeout(epmbuffill, sc, 1);
726 /* Convert one of our saved mbuf's. */
727 sc->next_mb = (sc->next_mb + 1) % MAX_MBS;
728 m->m_data = m->m_pktdat;
729 m->m_flags = M_PKTHDR;
730 }
731 m->m_pkthdr.rcvif = ifp;
732 m->m_pkthdr.len = totlen;
733 len = MHLEN;
734 top = 0;
735 mp = ⊤
736
737 /*
738 * We read the packet at splhigh() so that an interrupt from another
739 * device doesn't cause the card's buffer to overflow while we're
740 * reading it. We may still lose packets at other times.
741 */
742 sh = splhigh();
743
744 while (totlen > 0) {
745 if (top) {
746 m = sc->mb[sc->next_mb];
747 sc->mb[sc->next_mb] = 0;
748 if (m == 0) {
749 MGET(m, M_DONTWAIT, MT_DATA);
750 if (m == 0) {
751 splx(sh);
752 m_freem(top);
753 return 0;
754 }
755 } else {
756 sc->next_mb = (sc->next_mb + 1) % MAX_MBS;
757 }
758 len = MLEN;
759 }
760 if (totlen >= MINCLSIZE) {
761 MCLGET(m, M_DONTWAIT);
762 if (m->m_flags & M_EXT)
763 len = MCLBYTES;
764 }
765 len = min(totlen, len);
766 if (EP_IS_BUS_32(sc->bustype)) {
767 if (len > 3) {
768 len &= ~3;
769 bus_io_read_multi_4(bc, ioh,
770 EP_W1_RX_PIO_RD_1, mtod(m, u_int32_t *),
771 len / 4);
772 } else
773 bus_io_read_multi_1(bc, ioh,
774 EP_W1_RX_PIO_RD_1, mtod(m, u_int8_t *),
775 len);
776 } else {
777 if (len > 1) {
778 len &= ~1;
779 bus_io_read_multi_2(bc, ioh,
780 EP_W1_RX_PIO_RD_1, mtod(m, u_int16_t *),
781 len / 2);
782 } else
783 *(mtod(m, u_int8_t *)) =
784 bus_io_read_1(bc, ioh, EP_W1_RX_PIO_RD_1);
785 }
786 m->m_len = len;
787 totlen -= len;
788 *mp = m;
789 mp = &m->m_next;
790 }
791
792 bus_io_write_2(bc, ioh, EP_COMMAND, RX_DISCARD_TOP_PACK);
793 while (bus_io_read_2(bc, ioh, EP_STATUS) & S_COMMAND_IN_PROGRESS)
794 ;
795
796 splx(sh);
797
798 return top;
799 }
800
801 int
802 epioctl(ifp, cmd, data)
803 register struct ifnet *ifp;
804 u_long cmd;
805 caddr_t data;
806 {
807 struct ep_softc *sc = ifp->if_softc;
808 struct ifaddr *ifa = (struct ifaddr *)data;
809 struct ifreq *ifr = (struct ifreq *)data;
810 int s, error = 0;
811
812 s = splnet();
813
814 switch (cmd) {
815
816 case SIOCSIFADDR:
817 ifp->if_flags |= IFF_UP;
818
819 switch (ifa->ifa_addr->sa_family) {
820 #ifdef INET
821 case AF_INET:
822 epinit(sc);
823 arp_ifinit(&sc->sc_arpcom, ifa);
824 break;
825 #endif
826 #ifdef NS
827 case AF_NS:
828 {
829 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
830
831 if (ns_nullhost(*ina))
832 ina->x_host =
833 *(union ns_host *)(sc->sc_arpcom.ac_enaddr);
834 else
835 bcopy(ina->x_host.c_host,
836 sc->sc_arpcom.ac_enaddr,
837 sizeof(sc->sc_arpcom.ac_enaddr));
838 /* Set new address. */
839 epinit(sc);
840 break;
841 }
842 #endif
843 default:
844 epinit(sc);
845 break;
846 }
847 break;
848
849 case SIOCSIFFLAGS:
850 if ((ifp->if_flags & IFF_UP) == 0 &&
851 (ifp->if_flags & IFF_RUNNING) != 0) {
852 /*
853 * If interface is marked down and it is running, then
854 * stop it.
855 */
856 epstop(sc);
857 ifp->if_flags &= ~IFF_RUNNING;
858 } else if ((ifp->if_flags & IFF_UP) != 0 &&
859 (ifp->if_flags & IFF_RUNNING) == 0) {
860 /*
861 * If interface is marked up and it is stopped, then
862 * start it.
863 */
864 epinit(sc);
865 } else {
866 /*
867 * deal with flags changes:
868 * IFF_MULTICAST, IFF_PROMISC,
869 * IFF_LINK0, IFF_LINK1,
870 */
871 epsetfilter(sc);
872 epsetlink(sc);
873 }
874 break;
875
876 case SIOCADDMULTI:
877 case SIOCDELMULTI:
878 error = (cmd == SIOCADDMULTI) ?
879 ether_addmulti(ifr, &sc->sc_arpcom) :
880 ether_delmulti(ifr, &sc->sc_arpcom);
881
882 if (error == ENETRESET) {
883 /*
884 * Multicast list has changed; set the hardware filter
885 * accordingly.
886 */
887 epreset(sc);
888 error = 0;
889 }
890 break;
891
892 default:
893 error = EINVAL;
894 break;
895 }
896
897 splx(s);
898 return (error);
899 }
900
901 void
902 epreset(sc)
903 struct ep_softc *sc;
904 {
905 int s;
906
907 s = splnet();
908 epstop(sc);
909 epinit(sc);
910 splx(s);
911 }
912
913 void
914 epwatchdog(ifp)
915 struct ifnet *ifp;
916 {
917 struct ep_softc *sc = ifp->if_softc;
918
919 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
920 ++sc->sc_arpcom.ac_if.if_oerrors;
921
922 epreset(sc);
923 }
924
925 void
926 epstop(sc)
927 register struct ep_softc *sc;
928 {
929 bus_chipset_tag_t bc = sc->sc_bc;
930 bus_io_handle_t ioh = sc->sc_ioh;
931
932 bus_io_write_2(bc, ioh, EP_COMMAND, RX_DISABLE);
933 bus_io_write_2(bc, ioh, EP_COMMAND, RX_DISCARD_TOP_PACK);
934 while (bus_io_read_2(bc, ioh, EP_STATUS) & S_COMMAND_IN_PROGRESS)
935 ;
936 bus_io_write_2(bc, ioh, EP_COMMAND, TX_DISABLE);
937 bus_io_write_2(bc, ioh, EP_COMMAND, STOP_TRANSCEIVER);
938 bus_io_write_2(bc, ioh, EP_COMMAND, RX_RESET);
939 bus_io_write_2(bc, ioh, EP_COMMAND, TX_RESET);
940 bus_io_write_2(bc, ioh, EP_COMMAND, C_INTR_LATCH);
941 bus_io_write_2(bc, ioh, EP_COMMAND, SET_RD_0_MASK);
942 bus_io_write_2(bc, ioh, EP_COMMAND, SET_INTR_MASK);
943 bus_io_write_2(bc, ioh, EP_COMMAND, SET_RX_FILTER);
944
945 epmbufempty(sc);
946 }
947
948 /*
949 * We get eeprom data from the id_port given an offset into the
950 * eeprom. Basically; after the ID_sequence is sent to all of
951 * the cards; they enter the ID_CMD state where they will accept
952 * command requests. 0x80-0xbf loads the eeprom data. We then
953 * read the port 16 times and with every read; the cards check
954 * for contention (ie: if one card writes a 0 bit and another
955 * writes a 1 bit then the host sees a 0. At the end of the cycle;
956 * each card compares the data on the bus; if there is a difference
957 * then that card goes into ID_WAIT state again). In the meantime;
958 * one bit of data is returned in the AX register which is conveniently
959 * returned to us by bus_io_read_1(). Hence; we read 16 times getting one
960 * bit of data with each read.
961 *
962 * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT!
963 */
964 u_int16_t
965 epreadeeprom(bc, ioh, offset)
966 bus_chipset_tag_t bc;
967 bus_io_handle_t ioh;
968 int offset;
969 {
970 u_int16_t data = 0;
971 int i;
972
973 bus_io_write_1(bc, ioh, 0, 0x80 + offset);
974 delay(1000);
975 for (i = 0; i < 16; i++)
976 data = (data << 1) | (bus_io_read_2(bc, ioh, 0) & 1);
977 return (data);
978 }
979
980 static int
981 epbusyeeprom(sc)
982 struct ep_softc *sc;
983 {
984 bus_chipset_tag_t bc = sc->sc_bc;
985 bus_io_handle_t ioh = sc->sc_ioh;
986 int i = 100, j;
987
988 if (sc->bustype == EP_BUS_PCMCIA) {
989 delay(1000);
990 return 0;
991 }
992
993 while (i--) {
994 j = bus_io_read_2(bc, ioh, EP_W0_EEPROM_COMMAND);
995 if (j & EEPROM_BUSY)
996 delay(100);
997 else
998 break;
999 }
1000 if (!i) {
1001 printf("\n%s: eeprom failed to come ready\n",
1002 sc->sc_dev.dv_xname);
1003 return (1);
1004 }
1005 if (j & EEPROM_TST_MODE) {
1006 printf("\n%s: erase pencil mark, or disable plug-n-play mode!\n",
1007 sc->sc_dev.dv_xname);
1008 return (1);
1009 }
1010 return (0);
1011 }
1012
1013 void
1014 epmbuffill(v)
1015 void *v;
1016 {
1017 struct ep_softc *sc = v;
1018 int s, i;
1019
1020 s = splnet();
1021 i = sc->last_mb;
1022 do {
1023 if (sc->mb[i] == NULL)
1024 MGET(sc->mb[i], M_DONTWAIT, MT_DATA);
1025 if (sc->mb[i] == NULL)
1026 break;
1027 i = (i + 1) % MAX_MBS;
1028 } while (i != sc->next_mb);
1029 sc->last_mb = i;
1030 /* If the queue was not filled, try again. */
1031 if (sc->last_mb != sc->next_mb)
1032 timeout(epmbuffill, sc, 1);
1033 splx(s);
1034 }
1035
1036 void
1037 epmbufempty(sc)
1038 struct ep_softc *sc;
1039 {
1040 int s, i;
1041
1042 s = splnet();
1043 for (i = 0; i<MAX_MBS; i++) {
1044 if (sc->mb[i]) {
1045 m_freem(sc->mb[i]);
1046 sc->mb[i] = NULL;
1047 }
1048 }
1049 sc->last_mb = sc->next_mb = 0;
1050 untimeout(epmbuffill, sc);
1051 splx(s);
1052 }
1053