elink3.c revision 1.74
1 /* $NetBSD: elink3.c,v 1.74 2000/02/03 06:03:39 enami Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1996, 1997 Jonathan Stone <jonathan (at) NetBSD.org> 42 * Copyright (c) 1994 Herb Peyerl <hpeyerl (at) beer.org> 43 * All rights reserved. 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice, this list of conditions and the following disclaimer. 50 * 2. Redistributions in binary form must reproduce the above copyright 51 * notice, this list of conditions and the following disclaimer in the 52 * documentation and/or other materials provided with the distribution. 53 * 3. All advertising materials mentioning features or use of this software 54 * must display the following acknowledgement: 55 * This product includes software developed by Herb Peyerl. 56 * 4. The name of Herb Peyerl may not be used to endorse or promote products 57 * derived from this software without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 60 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 61 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 62 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 63 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 64 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 65 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 66 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 67 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 68 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 #include "opt_inet.h" 72 #include "opt_ns.h" 73 #include "bpfilter.h" 74 #include "rnd.h" 75 76 #include <sys/param.h> 77 #include <sys/systm.h> 78 #include <sys/kernel.h> 79 #include <sys/mbuf.h> 80 #include <sys/socket.h> 81 #include <sys/ioctl.h> 82 #include <sys/errno.h> 83 #include <sys/syslog.h> 84 #include <sys/select.h> 85 #include <sys/device.h> 86 #if NRND > 0 87 #include <sys/rnd.h> 88 #endif 89 90 #include <net/if.h> 91 #include <net/if_dl.h> 92 #include <net/if_ether.h> 93 #include <net/if_media.h> 94 95 #ifdef INET 96 #include <netinet/in.h> 97 #include <netinet/in_systm.h> 98 #include <netinet/in_var.h> 99 #include <netinet/ip.h> 100 #include <netinet/if_inarp.h> 101 #endif 102 103 #ifdef NS 104 #include <netns/ns.h> 105 #include <netns/ns_if.h> 106 #endif 107 108 #if NBPFILTER > 0 109 #include <net/bpf.h> 110 #include <net/bpfdesc.h> 111 #endif 112 113 #include <machine/cpu.h> 114 #include <machine/bus.h> 115 #include <machine/intr.h> 116 117 #include <dev/mii/mii.h> 118 #include <dev/mii/miivar.h> 119 #include <dev/mii/mii_bitbang.h> 120 121 #include <dev/ic/elink3var.h> 122 #include <dev/ic/elink3reg.h> 123 124 #ifdef DEBUG 125 int epdebug = 0; 126 #endif 127 128 /* 129 * XXX endian workaround for big-endian CPUs with pcmcia: 130 * if stream methods for bus_space_multi are not provided, define them 131 * using non-stream bus_space_{read,write}_multi_. 132 * Assumes host CPU is same endian-ness as bus. 133 */ 134 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 135 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 136 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 137 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 138 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 139 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 140 141 /* 142 * Structure to map media-present bits in boards to ifmedia codes and 143 * printable media names. Used for table-driven ifmedia initialization. 144 */ 145 struct ep_media { 146 int epm_mpbit; /* media present bit */ 147 const char *epm_name; /* name of medium */ 148 int epm_ifmedia; /* ifmedia word for medium */ 149 int epm_epmedia; /* ELINKMEDIA_* constant */ 150 }; 151 152 /* 153 * Media table for the Demon/Vortex/Boomerang chipsets. 154 * 155 * Note that MII on the Demon and Vortex (3c59x) indicates an external 156 * MII connector (for connecting an external PHY) ... I think. Treat 157 * it as `manual' on these chips. 158 * 159 * Any Boomerang (3c90x) chips with MII really do have an internal 160 * MII and real PHYs attached; no `native' media. 161 */ 162 struct ep_media ep_vortex_media[] = { 163 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 164 ELINKMEDIA_10BASE_T }, 165 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 166 ELINKMEDIA_10BASE_T }, 167 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 168 ELINKMEDIA_AUI }, 169 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 170 ELINKMEDIA_10BASE_2 }, 171 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 172 ELINKMEDIA_100BASE_TX }, 173 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 174 ELINKMEDIA_100BASE_TX }, 175 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 176 ELINKMEDIA_100BASE_FX }, 177 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 178 ELINKMEDIA_MII }, 179 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 180 ELINKMEDIA_100BASE_T4 }, 181 { 0, NULL, 0, 182 0 }, 183 }; 184 185 /* 186 * Media table for the older 3Com Etherlink III chipset, used 187 * in the 3c509, 3c579, and 3c589. 188 */ 189 struct ep_media ep_509_media[] = { 190 { ELINK_W0_CC_UTP, "10baseT", IFM_ETHER|IFM_10_T, 191 ELINKMEDIA_10BASE_T }, 192 { ELINK_W0_CC_AUI, "10base5", IFM_ETHER|IFM_10_5, 193 ELINKMEDIA_AUI }, 194 { ELINK_W0_CC_BNC, "10base2", IFM_ETHER|IFM_10_2, 195 ELINKMEDIA_10BASE_2 }, 196 { 0, NULL, 0, 197 0 }, 198 }; 199 200 void ep_internalconfig __P((struct ep_softc *sc)); 201 void ep_vortex_probemedia __P((struct ep_softc *sc)); 202 void ep_509_probemedia __P((struct ep_softc *sc)); 203 204 static void eptxstat __P((struct ep_softc *)); 205 static int epstatus __P((struct ep_softc *)); 206 void epinit __P((struct ep_softc *)); 207 int epioctl __P((struct ifnet *, u_long, caddr_t)); 208 void epstart __P((struct ifnet *)); 209 void epwatchdog __P((struct ifnet *)); 210 void epreset __P((struct ep_softc *)); 211 static void epshutdown __P((void *)); 212 void epread __P((struct ep_softc *)); 213 struct mbuf *epget __P((struct ep_softc *, int)); 214 void epmbuffill __P((void *)); 215 void epmbufempty __P((struct ep_softc *)); 216 void epsetfilter __P((struct ep_softc *)); 217 void ep_roadrunner_mii_enable __P((struct ep_softc *)); 218 void epsetmedia __P((struct ep_softc *)); 219 220 /* ifmedia callbacks */ 221 int ep_media_change __P((struct ifnet *ifp)); 222 void ep_media_status __P((struct ifnet *ifp, struct ifmediareq *req)); 223 224 /* MII callbacks */ 225 int ep_mii_readreg __P((struct device *, int, int)); 226 void ep_mii_writereg __P((struct device *, int, int, int)); 227 void ep_statchg __P((struct device *)); 228 229 void ep_tick __P((void *)); 230 231 static int epbusyeeprom __P((struct ep_softc *)); 232 u_int16_t ep_read_eeprom __P((struct ep_softc *, u_int16_t)); 233 static inline void ep_reset_cmd __P((struct ep_softc *sc, 234 u_int cmd, u_int arg)); 235 static inline void ep_finish_reset __P((bus_space_tag_t, bus_space_handle_t)); 236 static inline void ep_discard_rxtop __P((bus_space_tag_t, bus_space_handle_t)); 237 static __inline int ep_w1_reg __P((struct ep_softc *, int)); 238 239 /* 240 * MII bit-bang glue. 241 */ 242 u_int32_t ep_mii_bitbang_read __P((struct device *)); 243 void ep_mii_bitbang_write __P((struct device *, u_int32_t)); 244 245 const struct mii_bitbang_ops ep_mii_bitbang_ops = { 246 ep_mii_bitbang_read, 247 ep_mii_bitbang_write, 248 { 249 PHYSMGMT_DATA, /* MII_BIT_MDO */ 250 PHYSMGMT_DATA, /* MII_BIT_MDI */ 251 PHYSMGMT_CLK, /* MII_BIT_MDC */ 252 PHYSMGMT_DIR, /* MII_BIT_DIR_HOST_PHY */ 253 0, /* MII_BIT_DIR_PHY_HOST */ 254 } 255 }; 256 257 /* 258 * Some chips (3c515 [Corkscrew] and 3c574 [RoadRunner]) have 259 * Window 1 registers offset! 260 */ 261 static __inline int 262 ep_w1_reg(sc, reg) 263 struct ep_softc *sc; 264 int reg; 265 { 266 267 switch (sc->ep_chipset) { 268 case ELINK_CHIPSET_CORKSCREW: 269 return (reg + 0x10); 270 271 case ELINK_CHIPSET_ROADRUNNER: 272 switch (reg) { 273 case ELINK_W1_FREE_TX: 274 case ELINK_W1_RUNNER_RDCTL: 275 case ELINK_W1_RUNNER_WRCTL: 276 return (reg); 277 } 278 return (reg + 0x10); 279 } 280 281 return (reg); 282 } 283 284 /* 285 * Wait for any pending reset to complete. 286 * On newer hardware we could poll SC_COMMAND_IN_PROGRESS, 287 * but older hardware doesn't implement it and we must delay. 288 */ 289 static inline void 290 ep_finish_reset(iot, ioh) 291 bus_space_tag_t iot; 292 bus_space_handle_t ioh; 293 { 294 int i; 295 296 for (i = 0; i < 10000; i++) { 297 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 298 S_COMMAND_IN_PROGRESS) == 0) 299 break; 300 DELAY(10); 301 } 302 } 303 304 /* 305 * Issue a (reset) command, and be sure it has completed. 306 * Used for global reset, TX_RESET, RX_RESET. 307 */ 308 static inline void 309 ep_reset_cmd(sc, cmd, arg) 310 struct ep_softc *sc; 311 u_int cmd, arg; 312 { 313 register bus_space_tag_t iot = sc->sc_iot; 314 register bus_space_handle_t ioh = sc->sc_ioh; 315 316 bus_space_write_2(iot, ioh, cmd, arg); 317 ep_finish_reset(iot, ioh); 318 } 319 320 321 static inline void 322 ep_discard_rxtop(iot, ioh) 323 register bus_space_tag_t iot; 324 register bus_space_handle_t ioh; 325 { 326 int i; 327 328 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISCARD_TOP_PACK); 329 330 /* 331 * Spin for about 1 msec, to avoid forcing a DELAY() between 332 * every received packet (adding latency and limiting pkt-recv rate). 333 * On PCI, at 4 30-nsec PCI bus cycles for a read, 8000 iterations 334 * is about right. 335 */ 336 for (i = 0; i < 8000; i++) { 337 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 338 S_COMMAND_IN_PROGRESS) == 0) 339 return; 340 } 341 342 /* Didn't complete in a hurry. Do DELAY()s. */ 343 ep_finish_reset(iot, ioh); 344 } 345 346 /* 347 * Back-end attach and configure. 348 */ 349 void 350 epconfig(sc, chipset, enaddr) 351 struct ep_softc *sc; 352 u_short chipset; 353 u_int8_t *enaddr; 354 { 355 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 356 bus_space_tag_t iot = sc->sc_iot; 357 bus_space_handle_t ioh = sc->sc_ioh; 358 u_int16_t i; 359 u_int8_t myla[6]; 360 361 sc->ep_chipset = chipset; 362 363 /* 364 * We could have been groveling around in other register 365 * windows in the front-end; make sure we're in window 0 366 * to read the EEPROM. 367 */ 368 GO_WINDOW(0); 369 370 if (enaddr == NULL) { 371 /* 372 * Read the station address from the eeprom. 373 */ 374 for (i = 0; i < 3; i++) { 375 u_int16_t x = ep_read_eeprom(sc, i); 376 myla[(i << 1)] = x >> 8; 377 myla[(i << 1) + 1] = x; 378 } 379 enaddr = myla; 380 } 381 382 /* 383 * Vortex-based (3c59x pci,eisa) and Boomerang (3c900) cards 384 * allow FDDI-sized (4500) byte packets. Commands only take an 385 * 11-bit parameter, and 11 bits isn't enough to hold a full-size 386 * packet length. 387 * Commands to these cards implicitly upshift a packet size 388 * or threshold by 2 bits. 389 * To detect cards with large-packet support, we probe by setting 390 * the transmit threshold register, then change windows and 391 * read back the threshold register directly, and see if the 392 * threshold value was shifted or not. 393 */ 394 bus_space_write_2(iot, ioh, ELINK_COMMAND, 395 SET_TX_AVAIL_THRESH | ELINK_LARGEWIN_PROBE); 396 GO_WINDOW(5); 397 i = bus_space_read_2(iot, ioh, ELINK_W5_TX_AVAIL_THRESH); 398 GO_WINDOW(1); 399 switch (i) { 400 case ELINK_LARGEWIN_PROBE: 401 case (ELINK_LARGEWIN_PROBE & ELINK_LARGEWIN_MASK): 402 sc->ep_pktlenshift = 0; 403 break; 404 405 case (ELINK_LARGEWIN_PROBE << 2): 406 sc->ep_pktlenshift = 2; 407 break; 408 409 default: 410 printf("%s: wrote 0x%x to TX_AVAIL_THRESH, read back 0x%x. " 411 "Interface disabled\n", 412 sc->sc_dev.dv_xname, ELINK_LARGEWIN_PROBE, (int) i); 413 return; 414 } 415 416 /* 417 * Ensure Tx-available interrupts are enabled for 418 * start the interface. 419 * XXX should be in epinit()? 420 */ 421 bus_space_write_2(iot, ioh, ELINK_COMMAND, 422 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 423 424 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 425 ifp->if_softc = sc; 426 ifp->if_start = epstart; 427 ifp->if_ioctl = epioctl; 428 ifp->if_watchdog = epwatchdog; 429 ifp->if_flags = 430 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 431 432 if_attach(ifp); 433 ether_ifattach(ifp, enaddr); 434 435 /* 436 * Finish configuration: 437 * determine chipset if the front-end couldn't do so, 438 * show board details, set media. 439 */ 440 441 /* 442 * Print RAM size. We also print the Ethernet address in here. 443 * It's extracted from the ifp, so we have to make sure it's 444 * been attached first. 445 */ 446 ep_internalconfig(sc); 447 GO_WINDOW(0); 448 449 /* 450 * Display some additional information, if pertinent. 451 */ 452 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 453 printf("%s: RoadRunner FIFO buffer enabled\n", 454 sc->sc_dev.dv_xname); 455 456 /* 457 * Initialize our media structures and MII info. We'll 458 * probe the MII if we discover that we have one. 459 */ 460 sc->sc_mii.mii_ifp = ifp; 461 sc->sc_mii.mii_readreg = ep_mii_readreg; 462 sc->sc_mii.mii_writereg = ep_mii_writereg; 463 sc->sc_mii.mii_statchg = ep_statchg; 464 ifmedia_init(&sc->sc_mii.mii_media, 0, ep_media_change, 465 ep_media_status); 466 467 /* 468 * Now, determine which media we have. 469 */ 470 switch (sc->ep_chipset) { 471 case ELINK_CHIPSET_ROADRUNNER: 472 if (sc->ep_flags & ELINK_FLAGS_MII) { 473 ep_roadrunner_mii_enable(sc); 474 GO_WINDOW(0); 475 } 476 /* FALLTHROUGH */ 477 478 case ELINK_CHIPSET_BOOMERANG: 479 /* 480 * If the device has MII, probe it. We won't be using 481 * any `native' media in this case, only PHYs. If 482 * we don't, just treat the Boomerang like the Vortex. 483 */ 484 if (sc->ep_flags & ELINK_FLAGS_MII) { 485 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 486 MII_PHY_ANY, MII_OFFSET_ANY, 0); 487 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 488 ifmedia_add(&sc->sc_mii.mii_media, 489 IFM_ETHER|IFM_NONE, 0, NULL); 490 ifmedia_set(&sc->sc_mii.mii_media, 491 IFM_ETHER|IFM_NONE); 492 } else { 493 ifmedia_set(&sc->sc_mii.mii_media, 494 IFM_ETHER|IFM_AUTO); 495 } 496 break; 497 } 498 /* FALLTHROUGH */ 499 500 case ELINK_CHIPSET_VORTEX: 501 ep_vortex_probemedia(sc); 502 break; 503 504 default: 505 ep_509_probemedia(sc); 506 break; 507 } 508 509 GO_WINDOW(1); /* Window 1 is operating window */ 510 511 #if NBPFILTER > 0 512 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 513 #endif 514 515 #if NRND > 0 516 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 517 RND_TYPE_NET, 0); 518 #endif 519 520 sc->tx_start_thresh = 20; /* probably a good starting point. */ 521 522 /* Establish callback to reset card when we reboot. */ 523 sc->sd_hook = shutdownhook_establish(epshutdown, sc); 524 525 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 526 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 527 } 528 529 530 /* 531 * Show interface-model-independent info from window 3 532 * internal-configuration register. 533 */ 534 void 535 ep_internalconfig(sc) 536 struct ep_softc *sc; 537 { 538 bus_space_tag_t iot = sc->sc_iot; 539 bus_space_handle_t ioh = sc->sc_ioh; 540 541 u_int config0; 542 u_int config1; 543 544 int ram_size, ram_width, ram_speed, rom_size, ram_split; 545 /* 546 * NVRAM buffer Rx:Tx config names for busmastering cards 547 * (Demon, Vortex, and later). 548 */ 549 const char *onboard_ram_config[] = { 550 "5:3", "3:1", "1:1", "3:5" }; 551 552 GO_WINDOW(3); 553 config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 554 config1 = (u_int)bus_space_read_2(iot, ioh, 555 ELINK_W3_INTERNAL_CONFIG + 2); 556 GO_WINDOW(0); 557 558 ram_size = (config0 & CONFIG_RAMSIZE) >> CONFIG_RAMSIZE_SHIFT; 559 ram_width = (config0 & CONFIG_RAMWIDTH) >> CONFIG_RAMWIDTH_SHIFT; 560 ram_speed = (config0 & CONFIG_RAMSPEED) >> CONFIG_RAMSPEED_SHIFT; 561 rom_size = (config0 & CONFIG_ROMSIZE) >> CONFIG_ROMSIZE_SHIFT; 562 563 ram_split = (config1 & CONFIG_RAMSPLIT) >> CONFIG_RAMSPLIT_SHIFT; 564 565 printf("%s: address %s, %dKB %s-wide FIFO, %s Rx:Tx split\n", 566 sc->sc_dev.dv_xname, 567 ether_sprintf(LLADDR(sc->sc_ethercom.ec_if.if_sadl)), 568 8 << ram_size, 569 (ram_width) ? "word" : "byte", 570 onboard_ram_config[ram_split]); 571 } 572 573 574 /* 575 * Find supported media on 3c509-generation hardware that doesn't have 576 * a "reset_options" register in window 3. 577 * Use the config_cntrl register in window 0 instead. 578 * Used on original, 10Mbit ISA (3c509), 3c509B, and pre-Demon EISA cards 579 * that implement CONFIG_CTRL. We don't have a good way to set the 580 * default active mediuim; punt to ifconfig instead. 581 */ 582 void 583 ep_509_probemedia(sc) 584 struct ep_softc *sc; 585 { 586 bus_space_tag_t iot = sc->sc_iot; 587 bus_space_handle_t ioh = sc->sc_ioh; 588 struct ifmedia *ifm = &sc->sc_mii.mii_media; 589 u_int16_t ep_w0_config, port; 590 struct ep_media *epm; 591 const char *sep = "", *defmedianame = NULL; 592 int defmedia = 0; 593 594 GO_WINDOW(0); 595 ep_w0_config = bus_space_read_2(iot, ioh, ELINK_W0_CONFIG_CTRL); 596 597 printf("%s: ", sc->sc_dev.dv_xname); 598 599 /* Sanity check that there are any media! */ 600 if ((ep_w0_config & ELINK_W0_CC_MEDIAMASK) == 0) { 601 printf("no media present!\n"); 602 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 603 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 604 return; 605 } 606 607 /* 608 * Get the default media from the EEPROM. 609 */ 610 port = ep_read_eeprom(sc, EEPROM_ADDR_CFG) >> 14; 611 612 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 613 614 for (epm = ep_509_media; epm->epm_name != NULL; epm++) { 615 if (ep_w0_config & epm->epm_mpbit) { 616 /* 617 * This simple test works because 509 chipsets 618 * don't do full-duplex. 619 */ 620 if (epm->epm_epmedia == port || defmedia == 0) { 621 defmedia = epm->epm_ifmedia; 622 defmedianame = epm->epm_name; 623 } 624 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 625 NULL); 626 PRINT(epm->epm_name); 627 } 628 } 629 630 #undef PRINT 631 632 #ifdef DIAGNOSTIC 633 if (defmedia == 0) 634 panic("ep_509_probemedia: impossible"); 635 #endif 636 637 printf(" (default %s)\n", defmedianame); 638 ifmedia_set(ifm, defmedia); 639 } 640 641 /* 642 * Find media present on large-packet-capable elink3 devices. 643 * Show onboard configuration of large-packet-capable elink3 devices 644 * (Demon, Vortex, Boomerang), which do not implement CONFIG_CTRL in window 0. 645 * Use media and card-version info in window 3 instead. 646 */ 647 void 648 ep_vortex_probemedia(sc) 649 struct ep_softc *sc; 650 { 651 bus_space_tag_t iot = sc->sc_iot; 652 bus_space_handle_t ioh = sc->sc_ioh; 653 struct ifmedia *ifm = &sc->sc_mii.mii_media; 654 struct ep_media *epm; 655 u_int config1; 656 int reset_options; 657 int default_media; /* 3-bit encoding of default (EEPROM) media */ 658 int defmedia = 0; 659 const char *sep = "", *defmedianame = NULL; 660 661 GO_WINDOW(3); 662 config1 = (u_int)bus_space_read_2(iot, ioh, 663 ELINK_W3_INTERNAL_CONFIG + 2); 664 reset_options = (int)bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 665 GO_WINDOW(0); 666 667 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 668 669 printf("%s: ", sc->sc_dev.dv_xname); 670 671 /* Sanity check that there are any media! */ 672 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 673 printf("no media present!\n"); 674 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 675 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 676 return; 677 } 678 679 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 680 681 for (epm = ep_vortex_media; epm->epm_name != NULL; epm++) { 682 if (reset_options & epm->epm_mpbit) { 683 /* 684 * Default media is a little more complicated 685 * on the Vortex. We support full-duplex which 686 * uses the same reset options bit. 687 * 688 * XXX Check EEPROM for default to FDX? 689 */ 690 if (epm->epm_epmedia == default_media) { 691 if ((epm->epm_ifmedia & IFM_FDX) == 0) { 692 defmedia = epm->epm_ifmedia; 693 defmedianame = epm->epm_name; 694 } 695 } else if (defmedia == 0) { 696 defmedia = epm->epm_ifmedia; 697 defmedianame = epm->epm_name; 698 } 699 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 700 NULL); 701 PRINT(epm->epm_name); 702 } 703 } 704 705 #undef PRINT 706 707 #ifdef DIAGNOSTIC 708 if (defmedia == 0) 709 panic("ep_vortex_probemedia: impossible"); 710 #endif 711 712 printf(" (default %s)\n", defmedianame); 713 ifmedia_set(ifm, defmedia); 714 } 715 716 /* 717 * One second timer, used to tick the MII. 718 */ 719 void 720 ep_tick(arg) 721 void *arg; 722 { 723 struct ep_softc *sc = arg; 724 int s; 725 726 #ifdef DIAGNOSTIC 727 if ((sc->ep_flags & ELINK_FLAGS_MII) == 0) 728 panic("ep_tick"); 729 #endif 730 731 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 732 return; 733 734 s = splnet(); 735 mii_tick(&sc->sc_mii); 736 splx(s); 737 738 timeout(ep_tick, sc, hz); 739 } 740 741 /* 742 * Bring device up. 743 * 744 * The order in here seems important. Otherwise we may not receive 745 * interrupts. ?! 746 */ 747 void 748 epinit(sc) 749 register struct ep_softc *sc; 750 { 751 register struct ifnet *ifp = &sc->sc_ethercom.ec_if; 752 bus_space_tag_t iot = sc->sc_iot; 753 bus_space_handle_t ioh = sc->sc_ioh; 754 int i; 755 756 /* Make sure any pending reset has completed before touching board. */ 757 ep_finish_reset(iot, ioh); 758 759 /* 760 * Cance any pending I/O. 761 */ 762 epstop(sc); 763 764 if (sc->bustype != ELINK_BUS_PCI) { 765 GO_WINDOW(0); 766 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 0); 767 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 768 ENABLE_DRQ_IRQ); 769 } 770 771 if (sc->bustype == ELINK_BUS_PCMCIA) { 772 bus_space_write_2(iot, ioh, ELINK_W0_RESOURCE_CFG, 0x3f00); 773 } 774 775 GO_WINDOW(2); 776 for (i = 0; i < 6; i++) /* Reload the ether_addr. */ 777 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 778 LLADDR(ifp->if_sadl)[i]); 779 780 /* 781 * Reset the station-address receive filter. 782 * A bug workaround for busmastering (Vortex, Demon) cards. 783 */ 784 for (i = 0; i < 6; i++) 785 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 786 787 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 788 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 789 790 GO_WINDOW(1); /* Window 1 is operating window */ 791 for (i = 0; i < 31; i++) 792 bus_space_read_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS)); 793 794 /* Set threshhold for for Tx-space avaiable interrupt. */ 795 bus_space_write_2(iot, ioh, ELINK_COMMAND, 796 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 797 798 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 799 /* 800 * Enable options in the PCMCIA LAN COR register, via 801 * RoadRunner Window 1. 802 * 803 * XXX MAGIC CONSTANTS! 804 */ 805 u_int16_t cor; 806 807 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, (1 << 11)); 808 809 cor = bus_space_read_2(iot, ioh, 0) & ~0x30; 810 if (sc->ep_flags & ELINK_FLAGS_USESHAREDMEM) 811 cor |= 0x10; 812 if (sc->ep_flags & ELINK_FLAGS_FORCENOWAIT) 813 cor |= 0x20; 814 bus_space_write_2(iot, ioh, 0, cor); 815 816 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 817 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 818 819 if (sc->ep_flags & ELINK_FLAGS_MII) { 820 ep_roadrunner_mii_enable(sc); 821 GO_WINDOW(1); 822 } 823 } 824 825 /* Enable interrupts. */ 826 bus_space_write_2(iot, ioh, ELINK_COMMAND, 827 SET_RD_0_MASK | S_CARD_FAILURE | S_RX_COMPLETE | S_TX_COMPLETE | 828 S_TX_AVAIL); 829 bus_space_write_2(iot, ioh, ELINK_COMMAND, 830 SET_INTR_MASK | S_CARD_FAILURE | S_RX_COMPLETE | S_TX_COMPLETE | 831 S_TX_AVAIL); 832 833 /* 834 * Attempt to get rid of any stray interrupts that occured during 835 * configuration. On the i386 this isn't possible because one may 836 * already be queued. However, a single stray interrupt is 837 * unimportant. 838 */ 839 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 840 841 epsetfilter(sc); 842 epsetmedia(sc); 843 844 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 845 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 846 847 epmbuffill(sc); 848 849 /* Interface is now `running', with no output active. */ 850 ifp->if_flags |= IFF_RUNNING; 851 ifp->if_flags &= ~IFF_OACTIVE; 852 853 if (sc->ep_flags & ELINK_FLAGS_MII) { 854 /* Start the one second clock. */ 855 timeout(ep_tick, sc, hz); 856 } 857 858 /* Attempt to start output, if any. */ 859 epstart(ifp); 860 } 861 862 863 /* 864 * Set multicast receive filter. 865 * elink3 hardware has no selective multicast filter in hardware. 866 * Enable reception of all multicasts and filter in software. 867 */ 868 void 869 epsetfilter(sc) 870 register struct ep_softc *sc; 871 { 872 register struct ifnet *ifp = &sc->sc_ethercom.ec_if; 873 874 GO_WINDOW(1); /* Window 1 is operating window */ 875 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 876 SET_RX_FILTER | FIL_INDIVIDUAL | FIL_BRDCST | 877 ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0) | 878 ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0)); 879 } 880 881 int 882 ep_media_change(ifp) 883 struct ifnet *ifp; 884 { 885 register struct ep_softc *sc = ifp->if_softc; 886 887 if (sc->enabled && (ifp->if_flags & IFF_UP) != 0) 888 epreset(sc); 889 890 return (0); 891 } 892 893 /* 894 * Reset and enable the MII on the RoadRunner. 895 */ 896 void 897 ep_roadrunner_mii_enable(sc) 898 struct ep_softc *sc; 899 { 900 bus_space_tag_t iot = sc->sc_iot; 901 bus_space_handle_t ioh = sc->sc_ioh; 902 903 GO_WINDOW(3); 904 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 905 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 906 delay(1000); 907 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 908 ELINK_PCI_100BASE_MII|ELINK_RUNNER_MII_RESET| 909 ELINK_RUNNER_ENABLE_MII); 910 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 911 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 912 delay(1000); 913 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 914 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 915 } 916 917 /* 918 * Set the card to use the specified media. 919 */ 920 void 921 epsetmedia(sc) 922 struct ep_softc *sc; 923 { 924 bus_space_tag_t iot = sc->sc_iot; 925 bus_space_handle_t ioh = sc->sc_ioh; 926 927 /* Turn everything off. First turn off linkbeat and UTP. */ 928 GO_WINDOW(4); 929 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0x0); 930 931 /* Turn off coax */ 932 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 933 delay(1000); 934 935 /* 936 * If the device has MII, select it, and then tell the 937 * PHY which media to use. 938 */ 939 if (sc->ep_flags & ELINK_FLAGS_MII) { 940 int config0, config1; 941 942 GO_WINDOW(3); 943 944 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 945 int resopt; 946 947 resopt = bus_space_read_2(iot, ioh, 948 ELINK_W3_RESET_OPTIONS); 949 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 950 resopt | ELINK_RUNNER_ENABLE_MII); 951 } 952 953 config0 = (u_int)bus_space_read_2(iot, ioh, 954 ELINK_W3_INTERNAL_CONFIG); 955 config1 = (u_int)bus_space_read_2(iot, ioh, 956 ELINK_W3_INTERNAL_CONFIG + 2); 957 958 config1 = config1 & ~CONFIG_MEDIAMASK; 959 config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT); 960 961 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 962 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 963 config1); 964 GO_WINDOW(1); /* back to operating window */ 965 966 mii_mediachg(&sc->sc_mii); 967 return; 968 } 969 970 /* 971 * Now turn on the selected media/transceiver. 972 */ 973 GO_WINDOW(4); 974 switch (IFM_SUBTYPE(sc->sc_mii.mii_media.ifm_cur->ifm_media)) { 975 case IFM_10_T: 976 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 977 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 978 break; 979 980 case IFM_10_2: 981 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 982 DELAY(1000); /* 50ms not enmough? */ 983 break; 984 985 case IFM_100_TX: 986 case IFM_100_FX: 987 case IFM_100_T4: /* XXX check documentation */ 988 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 989 LINKBEAT_ENABLE); 990 DELAY(1000); /* not strictly necessary? */ 991 break; 992 993 case IFM_10_5: 994 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 995 SQE_ENABLE); 996 DELAY(1000); /* not strictly necessary? */ 997 break; 998 999 case IFM_MANUAL: 1000 /* 1001 * Nothing to do here; we are actually enabling the 1002 * external PHY on the MII port. 1003 */ 1004 break; 1005 1006 case IFM_NONE: 1007 printf("%s: interface disabled\n", sc->sc_dev.dv_xname); 1008 return; 1009 1010 default: 1011 panic("epsetmedia: impossible"); 1012 } 1013 1014 /* 1015 * Tell the chip which port to use. 1016 */ 1017 switch (sc->ep_chipset) { 1018 case ELINK_CHIPSET_VORTEX: 1019 case ELINK_CHIPSET_BOOMERANG: 1020 { 1021 int mctl, config0, config1; 1022 1023 GO_WINDOW(3); 1024 config0 = (u_int)bus_space_read_2(iot, ioh, 1025 ELINK_W3_INTERNAL_CONFIG); 1026 config1 = (u_int)bus_space_read_2(iot, ioh, 1027 ELINK_W3_INTERNAL_CONFIG + 2); 1028 1029 config1 = config1 & ~CONFIG_MEDIAMASK; 1030 config1 |= (sc->sc_mii.mii_media.ifm_cur->ifm_data << 1031 CONFIG_MEDIAMASK_SHIFT); 1032 1033 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 1034 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 1035 config1); 1036 1037 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1038 if (sc->sc_mii.mii_media.ifm_cur->ifm_media & IFM_FDX) 1039 mctl |= MAC_CONTROL_FDX; 1040 else 1041 mctl &= ~MAC_CONTROL_FDX; 1042 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1043 break; 1044 } 1045 default: 1046 { 1047 int w0_addr_cfg; 1048 1049 GO_WINDOW(0); 1050 w0_addr_cfg = bus_space_read_2(iot, ioh, ELINK_W0_ADDRESS_CFG); 1051 w0_addr_cfg &= 0x3fff; 1052 bus_space_write_2(iot, ioh, ELINK_W0_ADDRESS_CFG, w0_addr_cfg | 1053 (sc->sc_mii.mii_media.ifm_cur->ifm_data << 14)); 1054 DELAY(1000); 1055 break; 1056 } 1057 } 1058 1059 GO_WINDOW(1); /* Window 1 is operating window */ 1060 } 1061 1062 /* 1063 * Get currently-selected media from card. 1064 * (if_media callback, may be called before interface is brought up). 1065 */ 1066 void 1067 ep_media_status(ifp, req) 1068 struct ifnet *ifp; 1069 struct ifmediareq *req; 1070 { 1071 register struct ep_softc *sc = ifp->if_softc; 1072 bus_space_tag_t iot = sc->sc_iot; 1073 bus_space_handle_t ioh = sc->sc_ioh; 1074 1075 if (sc->enabled == 0) { 1076 req->ifm_active = IFM_ETHER|IFM_NONE; 1077 req->ifm_status = 0; 1078 return; 1079 } 1080 1081 /* 1082 * If we have MII, go ask the PHY what's going on. 1083 */ 1084 if (sc->ep_flags & ELINK_FLAGS_MII) { 1085 mii_pollstat(&sc->sc_mii); 1086 req->ifm_active = sc->sc_mii.mii_media_active; 1087 req->ifm_status = sc->sc_mii.mii_media_status; 1088 return; 1089 } 1090 1091 /* 1092 * Ok, at this point we claim that our active media is 1093 * the currently selected media. We'll update our status 1094 * if our chipset allows us to detect link. 1095 */ 1096 req->ifm_active = sc->sc_mii.mii_media.ifm_cur->ifm_media; 1097 req->ifm_status = 0; 1098 1099 switch (sc->ep_chipset) { 1100 case ELINK_CHIPSET_VORTEX: 1101 case ELINK_CHIPSET_BOOMERANG: 1102 GO_WINDOW(4); 1103 req->ifm_status = IFM_AVALID; 1104 if (bus_space_read_2(iot, ioh, ELINK_W4_MEDIA_TYPE) & 1105 LINKBEAT_DETECT) 1106 req->ifm_status |= IFM_ACTIVE; 1107 GO_WINDOW(1); /* back to operating window */ 1108 break; 1109 } 1110 } 1111 1112 1113 1114 /* 1115 * Start outputting on the interface. 1116 * Always called as splnet(). 1117 */ 1118 void 1119 epstart(ifp) 1120 struct ifnet *ifp; 1121 { 1122 register struct ep_softc *sc = ifp->if_softc; 1123 bus_space_tag_t iot = sc->sc_iot; 1124 bus_space_handle_t ioh = sc->sc_ioh; 1125 struct mbuf *m, *m0; 1126 int sh, len, pad; 1127 bus_addr_t txreg; 1128 1129 /* Don't transmit if interface is busy or not running */ 1130 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1131 return; 1132 1133 startagain: 1134 /* Sneak a peek at the next packet */ 1135 m0 = ifp->if_snd.ifq_head; 1136 if (m0 == 0) 1137 return; 1138 1139 /* We need to use m->m_pkthdr.len, so require the header */ 1140 if ((m0->m_flags & M_PKTHDR) == 0) 1141 panic("epstart: no header mbuf"); 1142 len = m0->m_pkthdr.len; 1143 1144 pad = (4 - len) & 3; 1145 1146 /* 1147 * The 3c509 automatically pads short packets to minimum ethernet 1148 * length, but we drop packets that are too large. Perhaps we should 1149 * truncate them instead? 1150 */ 1151 if (len + pad > ETHER_MAX_LEN) { 1152 /* packet is obviously too large: toss it */ 1153 ++ifp->if_oerrors; 1154 IF_DEQUEUE(&ifp->if_snd, m0); 1155 m_freem(m0); 1156 goto readcheck; 1157 } 1158 1159 if (bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_FREE_TX)) < 1160 len + pad + 4) { 1161 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1162 SET_TX_AVAIL_THRESH | 1163 ((len + pad + 4) >> sc->ep_pktlenshift)); 1164 /* not enough room in FIFO */ 1165 ifp->if_flags |= IFF_OACTIVE; 1166 return; 1167 } else { 1168 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1169 SET_TX_AVAIL_THRESH | ELINK_THRESH_DISABLE); 1170 } 1171 1172 IF_DEQUEUE(&ifp->if_snd, m0); 1173 if (m0 == 0) /* not really needed */ 1174 return; 1175 1176 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_TX_START_THRESH | 1177 ((len / 4 + sc->tx_start_thresh) /* >> sc->ep_pktlenshift*/)); 1178 1179 #if NBPFILTER > 0 1180 if (ifp->if_bpf) 1181 bpf_mtap(ifp->if_bpf, m0); 1182 #endif 1183 1184 /* 1185 * Do the output at splhigh() so that an interrupt from another device 1186 * won't cause a FIFO underrun. 1187 */ 1188 sh = splhigh(); 1189 1190 txreg = ep_w1_reg(sc, ELINK_W1_TX_PIO_WR_1); 1191 1192 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1193 /* 1194 * Prime the FIFO buffer counter (number of 16-bit 1195 * words about to be written to the FIFO). 1196 * 1197 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1198 * COUNTER IS NON-ZERO! 1199 */ 1200 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 1201 (len + pad) >> 1); 1202 } 1203 1204 bus_space_write_2(iot, ioh, txreg, len); 1205 bus_space_write_2(iot, ioh, txreg, 0xffff); /* Second is meaningless */ 1206 if (ELINK_IS_BUS_32(sc->bustype)) { 1207 for (m = m0; m;) { 1208 if (m->m_len > 3) { 1209 /* align our reads from core */ 1210 if (mtod(m, u_long) & 3) { 1211 u_long count = 1212 4 - (mtod(m, u_long) & 3); 1213 bus_space_write_multi_1(iot, ioh, 1214 txreg, mtod(m, u_int8_t *), count); 1215 m->m_data = 1216 (void *)(mtod(m, u_long) + count); 1217 m->m_len -= count; 1218 } 1219 bus_space_write_multi_stream_4(iot, ioh, 1220 txreg, mtod(m, u_int32_t *), m->m_len >> 2); 1221 m->m_data = (void *)(mtod(m, u_long) + 1222 (u_long)(m->m_len & ~3)); 1223 m->m_len -= m->m_len & ~3; 1224 } 1225 if (m->m_len) { 1226 bus_space_write_multi_1(iot, ioh, 1227 txreg, mtod(m, u_int8_t *), m->m_len); 1228 } 1229 MFREE(m, m0); 1230 m = m0; 1231 } 1232 } else { 1233 for (m = m0; m;) { 1234 if (m->m_len > 1) { 1235 if (mtod(m, u_long) & 1) { 1236 bus_space_write_1(iot, ioh, 1237 txreg, *(mtod(m, u_int8_t *))); 1238 m->m_data = 1239 (void *)(mtod(m, u_long) + 1); 1240 m->m_len -= 1; 1241 } 1242 bus_space_write_multi_stream_2(iot, ioh, 1243 txreg, mtod(m, u_int16_t *), 1244 m->m_len >> 1); 1245 } 1246 if (m->m_len & 1) { 1247 bus_space_write_1(iot, ioh, txreg, 1248 *(mtod(m, u_int8_t *) + m->m_len - 1)); 1249 } 1250 MFREE(m, m0); 1251 m = m0; 1252 } 1253 } 1254 while (pad--) 1255 bus_space_write_1(iot, ioh, txreg, 0); 1256 1257 splx(sh); 1258 1259 ++ifp->if_opackets; 1260 1261 readcheck: 1262 if ((bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)) & 1263 ERR_INCOMPLETE) == 0) { 1264 /* We received a complete packet. */ 1265 u_int16_t status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1266 1267 if ((status & S_INTR_LATCH) == 0) { 1268 /* 1269 * No interrupt, read the packet and continue 1270 * Is this supposed to happen? Is my motherboard 1271 * completely busted? 1272 */ 1273 epread(sc); 1274 } else { 1275 /* Got an interrupt, return so that it gets serviced. */ 1276 return; 1277 } 1278 } else { 1279 /* Check if we are stuck and reset [see XXX comment] */ 1280 if (epstatus(sc)) { 1281 if (ifp->if_flags & IFF_DEBUG) 1282 printf("%s: adapter reset\n", 1283 sc->sc_dev.dv_xname); 1284 epreset(sc); 1285 } 1286 } 1287 1288 goto startagain; 1289 } 1290 1291 1292 /* 1293 * XXX: The 3c509 card can get in a mode where both the fifo status bit 1294 * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set 1295 * We detect this situation and we reset the adapter. 1296 * It happens at times when there is a lot of broadcast traffic 1297 * on the cable (once in a blue moon). 1298 */ 1299 static int 1300 epstatus(sc) 1301 register struct ep_softc *sc; 1302 { 1303 bus_space_tag_t iot = sc->sc_iot; 1304 bus_space_handle_t ioh = sc->sc_ioh; 1305 u_int16_t fifost; 1306 1307 /* 1308 * Check the FIFO status and act accordingly 1309 */ 1310 GO_WINDOW(4); 1311 fifost = bus_space_read_2(iot, ioh, ELINK_W4_FIFO_DIAG); 1312 GO_WINDOW(1); 1313 1314 if (fifost & FIFOS_RX_UNDERRUN) { 1315 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1316 printf("%s: RX underrun\n", sc->sc_dev.dv_xname); 1317 epreset(sc); 1318 return 0; 1319 } 1320 1321 if (fifost & FIFOS_RX_STATUS_OVERRUN) { 1322 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1323 printf("%s: RX Status overrun\n", sc->sc_dev.dv_xname); 1324 return 1; 1325 } 1326 1327 if (fifost & FIFOS_RX_OVERRUN) { 1328 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1329 printf("%s: RX overrun\n", sc->sc_dev.dv_xname); 1330 return 1; 1331 } 1332 1333 if (fifost & FIFOS_TX_OVERRUN) { 1334 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1335 printf("%s: TX overrun\n", sc->sc_dev.dv_xname); 1336 epreset(sc); 1337 return 0; 1338 } 1339 1340 return 0; 1341 } 1342 1343 1344 static void 1345 eptxstat(sc) 1346 register struct ep_softc *sc; 1347 { 1348 bus_space_tag_t iot = sc->sc_iot; 1349 bus_space_handle_t ioh = sc->sc_ioh; 1350 int i; 1351 1352 /* 1353 * We need to read+write TX_STATUS until we get a 0 status 1354 * in order to turn off the interrupt flag. 1355 */ 1356 while ((i = bus_space_read_1(iot, ioh, 1357 ep_w1_reg(sc, ELINK_W1_TX_STATUS))) & TXS_COMPLETE) { 1358 bus_space_write_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS), 1359 0x0); 1360 1361 if (i & TXS_JABBER) { 1362 ++sc->sc_ethercom.ec_if.if_oerrors; 1363 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1364 printf("%s: jabber (%x)\n", 1365 sc->sc_dev.dv_xname, i); 1366 epreset(sc); 1367 } else if (i & TXS_UNDERRUN) { 1368 ++sc->sc_ethercom.ec_if.if_oerrors; 1369 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1370 printf("%s: fifo underrun (%x) @%d\n", 1371 sc->sc_dev.dv_xname, i, 1372 sc->tx_start_thresh); 1373 if (sc->tx_succ_ok < 100) 1374 sc->tx_start_thresh = min(ETHER_MAX_LEN, 1375 sc->tx_start_thresh + 20); 1376 sc->tx_succ_ok = 0; 1377 epreset(sc); 1378 } else if (i & TXS_MAX_COLLISION) { 1379 ++sc->sc_ethercom.ec_if.if_collisions; 1380 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 1381 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1382 } else 1383 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 1384 } 1385 } 1386 1387 int 1388 epintr(arg) 1389 void *arg; 1390 { 1391 register struct ep_softc *sc = arg; 1392 bus_space_tag_t iot = sc->sc_iot; 1393 bus_space_handle_t ioh = sc->sc_ioh; 1394 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1395 u_int16_t status; 1396 int ret = 0; 1397 int addrandom = 0; 1398 1399 if (sc->enabled == 0 || 1400 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1401 return (0); 1402 1403 for (;;) { 1404 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1405 1406 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1407 1408 if ((status & (S_TX_COMPLETE | S_TX_AVAIL | 1409 S_RX_COMPLETE | S_CARD_FAILURE)) == 0) { 1410 if ((status & S_INTR_LATCH) == 0) { 1411 #if 0 1412 printf("%s: intr latch cleared\n", 1413 sc->sc_dev.dv_xname); 1414 #endif 1415 break; 1416 } 1417 } 1418 1419 ret = 1; 1420 1421 /* 1422 * Acknowledge any interrupts. It's important that we do this 1423 * first, since there would otherwise be a race condition. 1424 * Due to the i386 interrupt queueing, we may get spurious 1425 * interrupts occasionally. 1426 */ 1427 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1428 (status & (C_INTR_LATCH | 1429 C_CARD_FAILURE | 1430 C_TX_COMPLETE | 1431 C_TX_AVAIL | 1432 C_RX_COMPLETE | 1433 C_RX_EARLY | 1434 C_INT_RQD | 1435 C_UPD_STATS))); 1436 1437 #if 0 1438 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1439 1440 printf("%s: intr%s%s%s%s\n", sc->sc_dev.dv_xname, 1441 (status & S_RX_COMPLETE)?" RX_COMPLETE":"", 1442 (status & S_TX_COMPLETE)?" TX_COMPLETE":"", 1443 (status & S_TX_AVAIL)?" TX_AVAIL":"", 1444 (status & S_CARD_FAILURE)?" CARD_FAILURE":""); 1445 #endif 1446 1447 if (status & S_RX_COMPLETE) { 1448 epread(sc); 1449 addrandom = 1; 1450 } 1451 if (status & S_TX_AVAIL) { 1452 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1453 epstart(&sc->sc_ethercom.ec_if); 1454 addrandom = 1; 1455 } 1456 if (status & S_CARD_FAILURE) { 1457 printf("%s: adapter failure (%x)\n", 1458 sc->sc_dev.dv_xname, status); 1459 #if 1 1460 epinit(sc); 1461 #else 1462 epreset(sc); 1463 #endif 1464 return (1); 1465 } 1466 if (status & S_TX_COMPLETE) { 1467 eptxstat(sc); 1468 epstart(ifp); 1469 addrandom = 1; 1470 } 1471 1472 #if NRND > 0 1473 if (status) 1474 rnd_add_uint32(&sc->rnd_source, status); 1475 #endif 1476 } 1477 1478 /* no more interrupts */ 1479 return (ret); 1480 } 1481 1482 void 1483 epread(sc) 1484 register struct ep_softc *sc; 1485 { 1486 bus_space_tag_t iot = sc->sc_iot; 1487 bus_space_handle_t ioh = sc->sc_ioh; 1488 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1489 struct mbuf *m; 1490 struct ether_header *eh; 1491 int len; 1492 1493 len = bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1494 1495 again: 1496 if (ifp->if_flags & IFF_DEBUG) { 1497 int err = len & ERR_MASK; 1498 char *s = NULL; 1499 1500 if (len & ERR_INCOMPLETE) 1501 s = "incomplete packet"; 1502 else if (err == ERR_OVERRUN) 1503 s = "packet overrun"; 1504 else if (err == ERR_RUNT) 1505 s = "runt packet"; 1506 else if (err == ERR_ALIGNMENT) 1507 s = "bad alignment"; 1508 else if (err == ERR_CRC) 1509 s = "bad crc"; 1510 else if (err == ERR_OVERSIZE) 1511 s = "oversized packet"; 1512 else if (err == ERR_DRIBBLE) 1513 s = "dribble bits"; 1514 1515 if (s) 1516 printf("%s: %s\n", sc->sc_dev.dv_xname, s); 1517 } 1518 1519 if (len & ERR_INCOMPLETE) 1520 return; 1521 1522 if (len & ERR_RX) { 1523 ++ifp->if_ierrors; 1524 goto abort; 1525 } 1526 1527 len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */ 1528 1529 /* Pull packet off interface. */ 1530 m = epget(sc, len); 1531 if (m == 0) { 1532 ifp->if_ierrors++; 1533 goto abort; 1534 } 1535 1536 ++ifp->if_ipackets; 1537 1538 /* We assume the header fit entirely in one mbuf. */ 1539 eh = mtod(m, struct ether_header *); 1540 1541 #if NBPFILTER > 0 1542 /* 1543 * Check if there's a BPF listener on this interface. 1544 * If so, hand off the raw packet to BPF. 1545 */ 1546 if (ifp->if_bpf) { 1547 bpf_mtap(ifp->if_bpf, m); 1548 1549 /* 1550 * Note that the interface cannot be in promiscuous mode if 1551 * there are no BPF listeners. And if we are in promiscuous 1552 * mode, we have to check if this packet is really ours. 1553 */ 1554 if ((ifp->if_flags & IFF_PROMISC) && 1555 (eh->ether_dhost[0] & 1) == 0 && /* !mcast and !bcast */ 1556 bcmp(eh->ether_dhost, LLADDR(sc->sc_ethercom.ec_if.if_sadl), 1557 sizeof(eh->ether_dhost)) != 0) { 1558 m_freem(m); 1559 return; 1560 } 1561 } 1562 #endif 1563 (*ifp->if_input)(ifp, m); 1564 1565 /* 1566 * In periods of high traffic we can actually receive enough 1567 * packets so that the fifo overrun bit will be set at this point, 1568 * even though we just read a packet. In this case we 1569 * are not going to receive any more interrupts. We check for 1570 * this condition and read again until the fifo is not full. 1571 * We could simplify this test by not using epstatus(), but 1572 * rechecking the RX_STATUS register directly. This test could 1573 * result in unnecessary looping in cases where there is a new 1574 * packet but the fifo is not full, but it will not fix the 1575 * stuck behavior. 1576 * 1577 * Even with this improvement, we still get packet overrun errors 1578 * which are hurting performance. Maybe when I get some more time 1579 * I'll modify epread() so that it can handle RX_EARLY interrupts. 1580 */ 1581 if (epstatus(sc)) { 1582 len = bus_space_read_2(iot, ioh, 1583 ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1584 /* Check if we are stuck and reset [see XXX comment] */ 1585 if (len & ERR_INCOMPLETE) { 1586 if (ifp->if_flags & IFF_DEBUG) 1587 printf("%s: adapter reset\n", 1588 sc->sc_dev.dv_xname); 1589 epreset(sc); 1590 return; 1591 } 1592 goto again; 1593 } 1594 1595 return; 1596 1597 abort: 1598 ep_discard_rxtop(iot, ioh); 1599 1600 } 1601 1602 struct mbuf * 1603 epget(sc, totlen) 1604 struct ep_softc *sc; 1605 int totlen; 1606 { 1607 bus_space_tag_t iot = sc->sc_iot; 1608 bus_space_handle_t ioh = sc->sc_ioh; 1609 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1610 struct mbuf *top, **mp, *m, *rv = NULL; 1611 bus_addr_t rxreg; 1612 int len, remaining; 1613 int sh; 1614 1615 m = sc->mb[sc->next_mb]; 1616 sc->mb[sc->next_mb] = 0; 1617 if (m == 0) { 1618 MGETHDR(m, M_DONTWAIT, MT_DATA); 1619 if (m == 0) 1620 return 0; 1621 } else { 1622 /* If the queue is no longer full, refill. */ 1623 if (sc->last_mb == sc->next_mb) 1624 timeout(epmbuffill, sc, 1); 1625 /* Convert one of our saved mbuf's. */ 1626 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1627 m->m_data = m->m_pktdat; 1628 m->m_flags = M_PKTHDR; 1629 } 1630 m->m_pkthdr.rcvif = ifp; 1631 m->m_pkthdr.len = totlen; 1632 len = MHLEN; 1633 top = 0; 1634 mp = ⊤ 1635 1636 /* 1637 * We read the packet at splhigh() so that an interrupt from another 1638 * device doesn't cause the card's buffer to overflow while we're 1639 * reading it. We may still lose packets at other times. 1640 */ 1641 sh = splhigh(); 1642 1643 rxreg = ep_w1_reg(sc, ELINK_W1_RX_PIO_RD_1); 1644 1645 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1646 /* 1647 * Prime the FIFO buffer counter (number of 16-bit 1648 * words about to be read from the FIFO). 1649 * 1650 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1651 * COUNTER IS NON-ZERO! 1652 */ 1653 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, totlen >> 1); 1654 } 1655 1656 while (totlen > 0) { 1657 if (top) { 1658 m = sc->mb[sc->next_mb]; 1659 sc->mb[sc->next_mb] = 0; 1660 if (m == 0) { 1661 MGET(m, M_DONTWAIT, MT_DATA); 1662 if (m == 0) { 1663 m_freem(top); 1664 goto out; 1665 } 1666 } else { 1667 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1668 } 1669 len = MLEN; 1670 } 1671 if (totlen >= MINCLSIZE) { 1672 MCLGET(m, M_DONTWAIT); 1673 if ((m->m_flags & M_EXT) == 0) { 1674 m_free(m); 1675 m_freem(top); 1676 goto out; 1677 } 1678 len = MCLBYTES; 1679 } 1680 if (top == 0) { 1681 /* align the struct ip header */ 1682 caddr_t newdata = (caddr_t) 1683 ALIGN(m->m_data + sizeof(struct ether_header)) 1684 - sizeof(struct ether_header); 1685 len -= newdata - m->m_data; 1686 m->m_data = newdata; 1687 } 1688 remaining = len = min(totlen, len); 1689 if (ELINK_IS_BUS_32(sc->bustype)) { 1690 u_long offset = mtod(m, u_long); 1691 /* 1692 * Read bytes up to the point where we are aligned. 1693 * (We can align to 4 bytes, rather than ALIGNBYTES, 1694 * here because we're later reading 4-byte chunks.) 1695 */ 1696 if ((remaining > 3) && (offset & 3)) { 1697 int count = (4 - (offset & 3)); 1698 bus_space_read_multi_1(iot, ioh, 1699 rxreg, (u_int8_t *) offset, count); 1700 offset += count; 1701 remaining -= count; 1702 } 1703 if (remaining > 3) { 1704 bus_space_read_multi_stream_4(iot, ioh, 1705 rxreg, (u_int32_t *) offset, 1706 remaining >> 2); 1707 offset += remaining & ~3; 1708 remaining &= 3; 1709 } 1710 if (remaining) { 1711 bus_space_read_multi_1(iot, ioh, 1712 rxreg, (u_int8_t *) offset, remaining); 1713 } 1714 } else { 1715 u_long offset = mtod(m, u_long); 1716 if ((remaining > 1) && (offset & 1)) { 1717 bus_space_read_multi_1(iot, ioh, 1718 rxreg, (u_int8_t *) offset, 1); 1719 remaining -= 1; 1720 offset += 1; 1721 } 1722 if (remaining > 1) { 1723 bus_space_read_multi_stream_2(iot, ioh, 1724 rxreg, (u_int16_t *) offset, 1725 remaining >> 1); 1726 offset += remaining & ~1; 1727 } 1728 if (remaining & 1) { 1729 bus_space_read_multi_1(iot, ioh, 1730 rxreg, (u_int8_t *) offset, remaining & 1); 1731 } 1732 } 1733 m->m_len = len; 1734 totlen -= len; 1735 *mp = m; 1736 mp = &m->m_next; 1737 } 1738 1739 rv = top; 1740 1741 ep_discard_rxtop(iot, ioh); 1742 1743 out: 1744 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 1745 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1746 splx(sh); 1747 1748 return rv; 1749 } 1750 1751 int 1752 epioctl(ifp, cmd, data) 1753 register struct ifnet *ifp; 1754 u_long cmd; 1755 caddr_t data; 1756 { 1757 struct ep_softc *sc = ifp->if_softc; 1758 struct ifaddr *ifa = (struct ifaddr *)data; 1759 struct ifreq *ifr = (struct ifreq *)data; 1760 int s, error = 0; 1761 1762 s = splnet(); 1763 1764 switch (cmd) { 1765 1766 case SIOCSIFADDR: 1767 if ((error = epenable(sc)) != 0) 1768 break; 1769 /* epinit is called just below */ 1770 ifp->if_flags |= IFF_UP; 1771 switch (ifa->ifa_addr->sa_family) { 1772 #ifdef INET 1773 case AF_INET: 1774 epinit(sc); 1775 arp_ifinit(&sc->sc_ethercom.ec_if, ifa); 1776 break; 1777 #endif 1778 #ifdef NS 1779 case AF_NS: 1780 { 1781 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1782 1783 if (ns_nullhost(*ina)) 1784 ina->x_host = *(union ns_host *) 1785 LLADDR(ifp->if_sadl); 1786 else 1787 bcopy(ina->x_host.c_host, 1788 LLADDR(ifp->if_sadl), 1789 ifp->if_addrlen); 1790 /* Set new address. */ 1791 epinit(sc); 1792 break; 1793 } 1794 #endif 1795 default: 1796 epinit(sc); 1797 break; 1798 } 1799 break; 1800 1801 case SIOCSIFMEDIA: 1802 case SIOCGIFMEDIA: 1803 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 1804 break; 1805 1806 case SIOCSIFFLAGS: 1807 if ((ifp->if_flags & IFF_UP) == 0 && 1808 (ifp->if_flags & IFF_RUNNING) != 0) { 1809 /* 1810 * If interface is marked down and it is running, then 1811 * stop it. 1812 */ 1813 epstop(sc); 1814 ifp->if_flags &= ~IFF_RUNNING; 1815 epdisable(sc); 1816 } else if ((ifp->if_flags & IFF_UP) != 0 && 1817 (ifp->if_flags & IFF_RUNNING) == 0) { 1818 /* 1819 * If interface is marked up and it is stopped, then 1820 * start it. 1821 */ 1822 if ((error = epenable(sc)) != 0) 1823 break; 1824 epinit(sc); 1825 } else if ((ifp->if_flags & IFF_UP) != 0) { 1826 /* 1827 * deal with flags changes: 1828 * IFF_MULTICAST, IFF_PROMISC. 1829 */ 1830 epsetfilter(sc); 1831 } 1832 break; 1833 1834 case SIOCADDMULTI: 1835 case SIOCDELMULTI: 1836 if (sc->enabled == 0) { 1837 error = EIO; 1838 break; 1839 } 1840 1841 error = (cmd == SIOCADDMULTI) ? 1842 ether_addmulti(ifr, &sc->sc_ethercom) : 1843 ether_delmulti(ifr, &sc->sc_ethercom); 1844 1845 if (error == ENETRESET) { 1846 /* 1847 * Multicast list has changed; set the hardware filter 1848 * accordingly. 1849 */ 1850 epreset(sc); 1851 error = 0; 1852 } 1853 break; 1854 1855 default: 1856 error = EINVAL; 1857 break; 1858 } 1859 1860 splx(s); 1861 return (error); 1862 } 1863 1864 void 1865 epreset(sc) 1866 struct ep_softc *sc; 1867 { 1868 int s; 1869 1870 s = splnet(); 1871 epinit(sc); 1872 splx(s); 1873 } 1874 1875 void 1876 epwatchdog(ifp) 1877 struct ifnet *ifp; 1878 { 1879 struct ep_softc *sc = ifp->if_softc; 1880 1881 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1882 ++sc->sc_ethercom.ec_if.if_oerrors; 1883 1884 epreset(sc); 1885 } 1886 1887 void 1888 epstop(sc) 1889 register struct ep_softc *sc; 1890 { 1891 bus_space_tag_t iot = sc->sc_iot; 1892 bus_space_handle_t ioh = sc->sc_ioh; 1893 1894 if (sc->ep_flags & ELINK_FLAGS_MII) { 1895 /* Stop the one second clock. */ 1896 untimeout(ep_tick, sc); 1897 1898 /* Down the MII. */ 1899 mii_down(&sc->sc_mii); 1900 } 1901 1902 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 1903 /* 1904 * Clear the FIFO buffer count, thus halting 1905 * any currently-running transactions. 1906 */ 1907 GO_WINDOW(1); /* sanity */ 1908 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 1909 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1910 } 1911 1912 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1913 ep_discard_rxtop(iot, ioh); 1914 1915 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1916 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1917 1918 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 1919 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 1920 1921 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1922 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK); 1923 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK); 1924 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RX_FILTER); 1925 1926 epmbufempty(sc); 1927 } 1928 1929 1930 /* 1931 * Before reboots, reset card completely. 1932 */ 1933 static void 1934 epshutdown(arg) 1935 void *arg; 1936 { 1937 register struct ep_softc *sc = arg; 1938 int s = splnet(); 1939 1940 if (sc->enabled) { 1941 epstop(sc); 1942 ep_reset_cmd(sc, ELINK_COMMAND, GLOBAL_RESET); 1943 sc->enabled = 0; 1944 } 1945 splx(s); 1946 } 1947 1948 /* 1949 * We get eeprom data from the id_port given an offset into the 1950 * eeprom. Basically; after the ID_sequence is sent to all of 1951 * the cards; they enter the ID_CMD state where they will accept 1952 * command requests. 0x80-0xbf loads the eeprom data. We then 1953 * read the port 16 times and with every read; the cards check 1954 * for contention (ie: if one card writes a 0 bit and another 1955 * writes a 1 bit then the host sees a 0. At the end of the cycle; 1956 * each card compares the data on the bus; if there is a difference 1957 * then that card goes into ID_WAIT state again). In the meantime; 1958 * one bit of data is returned in the AX register which is conveniently 1959 * returned to us by bus_space_read_1(). Hence; we read 16 times getting one 1960 * bit of data with each read. 1961 * 1962 * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT! 1963 */ 1964 u_int16_t 1965 epreadeeprom(iot, ioh, offset) 1966 bus_space_tag_t iot; 1967 bus_space_handle_t ioh; 1968 int offset; 1969 { 1970 u_int16_t data = 0; 1971 int i; 1972 1973 bus_space_write_1(iot, ioh, 0, 0x80 + offset); 1974 delay(1000); 1975 for (i = 0; i < 16; i++) 1976 data = (data << 1) | (bus_space_read_2(iot, ioh, 0) & 1); 1977 return (data); 1978 } 1979 1980 static int 1981 epbusyeeprom(sc) 1982 struct ep_softc *sc; 1983 { 1984 bus_space_tag_t iot = sc->sc_iot; 1985 bus_space_handle_t ioh = sc->sc_ioh; 1986 int i = 100, j; 1987 1988 if (sc->bustype == ELINK_BUS_PCMCIA) { 1989 delay(1000); 1990 return 0; 1991 } 1992 1993 j = 0; /* bad GCC flow analysis */ 1994 while (i--) { 1995 j = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND); 1996 if (j & EEPROM_BUSY) 1997 delay(100); 1998 else 1999 break; 2000 } 2001 if (!i) { 2002 printf("\n%s: eeprom failed to come ready\n", 2003 sc->sc_dev.dv_xname); 2004 return (1); 2005 } 2006 if (j & EEPROM_TST_MODE) { 2007 /* XXX PnP mode? */ 2008 printf("\n%s: erase pencil mark!\n", sc->sc_dev.dv_xname); 2009 return (1); 2010 } 2011 return (0); 2012 } 2013 2014 u_int16_t 2015 ep_read_eeprom(sc, offset) 2016 struct ep_softc *sc; 2017 u_int16_t offset; 2018 { 2019 u_int16_t readcmd; 2020 2021 /* 2022 * RoadRunner has a larger EEPROM, so a different read command 2023 * is required. 2024 */ 2025 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) 2026 readcmd = READ_EEPROM_RR; 2027 else 2028 readcmd = READ_EEPROM; 2029 2030 if (epbusyeeprom(sc)) 2031 return (0); /* XXX why is eeprom busy? */ 2032 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W0_EEPROM_COMMAND, 2033 readcmd | offset); 2034 if (epbusyeeprom(sc)) 2035 return (0); /* XXX why is eeprom busy? */ 2036 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W0_EEPROM_DATA)); 2037 } 2038 2039 void 2040 epmbuffill(v) 2041 void *v; 2042 { 2043 struct ep_softc *sc = v; 2044 struct mbuf *m; 2045 int s, i; 2046 2047 s = splnet(); 2048 i = sc->last_mb; 2049 do { 2050 if (sc->mb[i] == 0) { 2051 MGET(m, M_DONTWAIT, MT_DATA); 2052 if (m == 0) 2053 break; 2054 sc->mb[i] = m; 2055 } 2056 i = (i + 1) % MAX_MBS; 2057 } while (i != sc->next_mb); 2058 sc->last_mb = i; 2059 /* If the queue was not filled, try again. */ 2060 if (sc->last_mb != sc->next_mb) 2061 timeout(epmbuffill, sc, 1); 2062 splx(s); 2063 } 2064 2065 void 2066 epmbufempty(sc) 2067 struct ep_softc *sc; 2068 { 2069 int s, i; 2070 2071 s = splnet(); 2072 for (i = 0; i<MAX_MBS; i++) { 2073 if (sc->mb[i]) { 2074 m_freem(sc->mb[i]); 2075 sc->mb[i] = NULL; 2076 } 2077 } 2078 sc->last_mb = sc->next_mb = 0; 2079 untimeout(epmbuffill, sc); 2080 splx(s); 2081 } 2082 2083 int 2084 epenable(sc) 2085 struct ep_softc *sc; 2086 { 2087 2088 if (sc->enabled == 0 && sc->enable != NULL) { 2089 if ((*sc->enable)(sc) != 0) { 2090 printf("%s: device enable failed\n", 2091 sc->sc_dev.dv_xname); 2092 return (EIO); 2093 } 2094 } 2095 2096 sc->enabled = 1; 2097 return (0); 2098 } 2099 2100 void 2101 epdisable(sc) 2102 struct ep_softc *sc; 2103 { 2104 2105 if (sc->enabled != 0 && sc->disable != NULL) { 2106 (*sc->disable)(sc); 2107 sc->enabled = 0; 2108 } 2109 } 2110 2111 /* 2112 * ep_activate: 2113 * 2114 * Handle device activation/deactivation requests. 2115 */ 2116 int 2117 ep_activate(self, act) 2118 struct device *self; 2119 enum devact act; 2120 { 2121 struct ep_softc *sc = (struct ep_softc *)self; 2122 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2123 int error = 0, s; 2124 2125 s = splnet(); 2126 switch (act) { 2127 case DVACT_ACTIVATE: 2128 error = EOPNOTSUPP; 2129 break; 2130 2131 case DVACT_DEACTIVATE: 2132 if (sc->ep_flags & ELINK_FLAGS_MII) 2133 mii_activate(&sc->sc_mii, act, MII_PHY_ANY, 2134 MII_OFFSET_ANY); 2135 if_deactivate(ifp); 2136 break; 2137 } 2138 splx(s); 2139 return (error); 2140 } 2141 2142 /* 2143 * ep_detach: 2144 * 2145 * Detach a elink3 interface. 2146 */ 2147 int 2148 ep_detach(self, flags) 2149 struct device *self; 2150 int flags; 2151 { 2152 struct ep_softc *sc = (struct ep_softc *)self; 2153 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2154 2155 epdisable(sc); 2156 2157 untimeout(ep_tick, sc); 2158 untimeout(epmbuffill, sc); 2159 2160 if (sc->ep_flags & ELINK_FLAGS_MII) { 2161 /* Detach all PHYs */ 2162 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 2163 } 2164 2165 /* Delete all remaining media. */ 2166 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 2167 2168 #if NRND > 0 2169 rnd_detach_source(&sc->rnd_source); 2170 #endif 2171 #if NBPFILTER > 0 2172 bpfdetach(ifp); 2173 #endif 2174 ether_ifdetach(ifp); 2175 if_detach(ifp); 2176 2177 shutdownhook_disestablish(sc->sd_hook); 2178 2179 return (0); 2180 } 2181 2182 u_int32_t 2183 ep_mii_bitbang_read(self) 2184 struct device *self; 2185 { 2186 struct ep_softc *sc = (void *) self; 2187 2188 /* We're already in Window 4. */ 2189 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 2190 ELINK_W4_BOOM_PHYSMGMT)); 2191 } 2192 2193 void 2194 ep_mii_bitbang_write(self, val) 2195 struct device *self; 2196 u_int32_t val; 2197 { 2198 struct ep_softc *sc = (void *) self; 2199 2200 /* We're already in Window 4. */ 2201 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 2202 ELINK_W4_BOOM_PHYSMGMT, val); 2203 } 2204 2205 int 2206 ep_mii_readreg(self, phy, reg) 2207 struct device *self; 2208 int phy, reg; 2209 { 2210 struct ep_softc *sc = (void *) self; 2211 int val; 2212 2213 GO_WINDOW(4); 2214 2215 val = mii_bitbang_readreg(self, &ep_mii_bitbang_ops, phy, reg); 2216 2217 GO_WINDOW(1); 2218 2219 return (val); 2220 } 2221 2222 void 2223 ep_mii_writereg(self, phy, reg, val) 2224 struct device *self; 2225 int phy, reg, val; 2226 { 2227 struct ep_softc *sc = (void *) self; 2228 2229 GO_WINDOW(4); 2230 2231 mii_bitbang_writereg(self, &ep_mii_bitbang_ops, phy, reg, val); 2232 2233 GO_WINDOW(1); 2234 } 2235 2236 void 2237 ep_statchg(self) 2238 struct device *self; 2239 { 2240 struct ep_softc *sc = (struct ep_softc *)self; 2241 bus_space_tag_t iot = sc->sc_iot; 2242 bus_space_handle_t ioh = sc->sc_ioh; 2243 int mctl; 2244 2245 /* XXX Update ifp->if_baudrate */ 2246 2247 GO_WINDOW(3); 2248 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 2249 if (sc->sc_mii.mii_media_active & IFM_FDX) 2250 mctl |= MAC_CONTROL_FDX; 2251 else 2252 mctl &= ~MAC_CONTROL_FDX; 2253 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 2254 GO_WINDOW(1); /* back to operating window */ 2255 } 2256
Indexes created Mon Sep 29 18:09:42 GMT 2025