elink3.c revision 1.76
1 /* $NetBSD: elink3.c,v 1.76 2000/02/25 03:39:13 itojun Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1996, 1997 Jonathan Stone <jonathan (at) NetBSD.org> 42 * Copyright (c) 1994 Herb Peyerl <hpeyerl (at) beer.org> 43 * All rights reserved. 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice, this list of conditions and the following disclaimer. 50 * 2. Redistributions in binary form must reproduce the above copyright 51 * notice, this list of conditions and the following disclaimer in the 52 * documentation and/or other materials provided with the distribution. 53 * 3. All advertising materials mentioning features or use of this software 54 * must display the following acknowledgement: 55 * This product includes software developed by Herb Peyerl. 56 * 4. The name of Herb Peyerl may not be used to endorse or promote products 57 * derived from this software without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 60 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 61 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 62 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 63 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 64 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 65 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 66 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 67 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 68 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 #include "opt_inet.h" 72 #include "opt_ns.h" 73 #include "bpfilter.h" 74 #include "rnd.h" 75 76 #include <sys/param.h> 77 #include <sys/systm.h> 78 #include <sys/kernel.h> 79 #include <sys/mbuf.h> 80 #include <sys/socket.h> 81 #include <sys/ioctl.h> 82 #include <sys/errno.h> 83 #include <sys/syslog.h> 84 #include <sys/select.h> 85 #include <sys/device.h> 86 #if NRND > 0 87 #include <sys/rnd.h> 88 #endif 89 90 #include <net/if.h> 91 #include <net/if_dl.h> 92 #include <net/if_ether.h> 93 #include <net/if_media.h> 94 95 #ifdef INET 96 #include <netinet/in.h> 97 #include <netinet/in_systm.h> 98 #include <netinet/in_var.h> 99 #include <netinet/ip.h> 100 #include <netinet/if_inarp.h> 101 #endif 102 103 #ifdef NS 104 #include <netns/ns.h> 105 #include <netns/ns_if.h> 106 #endif 107 108 #if NBPFILTER > 0 109 #include <net/bpf.h> 110 #include <net/bpfdesc.h> 111 #endif 112 113 #include <machine/cpu.h> 114 #include <machine/bus.h> 115 #include <machine/intr.h> 116 117 #include <dev/mii/mii.h> 118 #include <dev/mii/miivar.h> 119 #include <dev/mii/mii_bitbang.h> 120 121 #include <dev/ic/elink3var.h> 122 #include <dev/ic/elink3reg.h> 123 124 #ifdef DEBUG 125 int epdebug = 0; 126 #endif 127 128 /* 129 * XXX endian workaround for big-endian CPUs with pcmcia: 130 * if stream methods for bus_space_multi are not provided, define them 131 * using non-stream bus_space_{read,write}_multi_. 132 * Assumes host CPU is same endian-ness as bus. 133 */ 134 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 135 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 136 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 137 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 138 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 139 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 140 141 /* 142 * Structure to map media-present bits in boards to ifmedia codes and 143 * printable media names. Used for table-driven ifmedia initialization. 144 */ 145 struct ep_media { 146 int epm_mpbit; /* media present bit */ 147 const char *epm_name; /* name of medium */ 148 int epm_ifmedia; /* ifmedia word for medium */ 149 int epm_epmedia; /* ELINKMEDIA_* constant */ 150 }; 151 152 /* 153 * Media table for the Demon/Vortex/Boomerang chipsets. 154 * 155 * Note that MII on the Demon and Vortex (3c59x) indicates an external 156 * MII connector (for connecting an external PHY) ... I think. Treat 157 * it as `manual' on these chips. 158 * 159 * Any Boomerang (3c90x) chips with MII really do have an internal 160 * MII and real PHYs attached; no `native' media. 161 */ 162 struct ep_media ep_vortex_media[] = { 163 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 164 ELINKMEDIA_10BASE_T }, 165 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 166 ELINKMEDIA_10BASE_T }, 167 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 168 ELINKMEDIA_AUI }, 169 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 170 ELINKMEDIA_10BASE_2 }, 171 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 172 ELINKMEDIA_100BASE_TX }, 173 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 174 ELINKMEDIA_100BASE_TX }, 175 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 176 ELINKMEDIA_100BASE_FX }, 177 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 178 ELINKMEDIA_MII }, 179 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 180 ELINKMEDIA_100BASE_T4 }, 181 { 0, NULL, 0, 182 0 }, 183 }; 184 185 /* 186 * Media table for the older 3Com Etherlink III chipset, used 187 * in the 3c509, 3c579, and 3c589. 188 */ 189 struct ep_media ep_509_media[] = { 190 { ELINK_W0_CC_UTP, "10baseT", IFM_ETHER|IFM_10_T, 191 ELINKMEDIA_10BASE_T }, 192 { ELINK_W0_CC_AUI, "10base5", IFM_ETHER|IFM_10_5, 193 ELINKMEDIA_AUI }, 194 { ELINK_W0_CC_BNC, "10base2", IFM_ETHER|IFM_10_2, 195 ELINKMEDIA_10BASE_2 }, 196 { 0, NULL, 0, 197 0 }, 198 }; 199 200 void ep_internalconfig __P((struct ep_softc *sc)); 201 void ep_vortex_probemedia __P((struct ep_softc *sc)); 202 void ep_509_probemedia __P((struct ep_softc *sc)); 203 204 static void eptxstat __P((struct ep_softc *)); 205 static int epstatus __P((struct ep_softc *)); 206 void epinit __P((struct ep_softc *)); 207 int epioctl __P((struct ifnet *, u_long, caddr_t)); 208 void epstart __P((struct ifnet *)); 209 void epwatchdog __P((struct ifnet *)); 210 void epreset __P((struct ep_softc *)); 211 static void epshutdown __P((void *)); 212 void epread __P((struct ep_softc *)); 213 struct mbuf *epget __P((struct ep_softc *, int)); 214 void epmbuffill __P((void *)); 215 void epmbufempty __P((struct ep_softc *)); 216 void epsetfilter __P((struct ep_softc *)); 217 void ep_roadrunner_mii_enable __P((struct ep_softc *)); 218 void epsetmedia __P((struct ep_softc *)); 219 220 /* ifmedia callbacks */ 221 int ep_media_change __P((struct ifnet *ifp)); 222 void ep_media_status __P((struct ifnet *ifp, struct ifmediareq *req)); 223 224 /* MII callbacks */ 225 int ep_mii_readreg __P((struct device *, int, int)); 226 void ep_mii_writereg __P((struct device *, int, int, int)); 227 void ep_statchg __P((struct device *)); 228 229 void ep_tick __P((void *)); 230 231 static int epbusyeeprom __P((struct ep_softc *)); 232 u_int16_t ep_read_eeprom __P((struct ep_softc *, u_int16_t)); 233 static inline void ep_reset_cmd __P((struct ep_softc *sc, 234 u_int cmd, u_int arg)); 235 static inline void ep_finish_reset __P((bus_space_tag_t, bus_space_handle_t)); 236 static inline void ep_discard_rxtop __P((bus_space_tag_t, bus_space_handle_t)); 237 static __inline int ep_w1_reg __P((struct ep_softc *, int)); 238 239 /* 240 * MII bit-bang glue. 241 */ 242 u_int32_t ep_mii_bitbang_read __P((struct device *)); 243 void ep_mii_bitbang_write __P((struct device *, u_int32_t)); 244 245 const struct mii_bitbang_ops ep_mii_bitbang_ops = { 246 ep_mii_bitbang_read, 247 ep_mii_bitbang_write, 248 { 249 PHYSMGMT_DATA, /* MII_BIT_MDO */ 250 PHYSMGMT_DATA, /* MII_BIT_MDI */ 251 PHYSMGMT_CLK, /* MII_BIT_MDC */ 252 PHYSMGMT_DIR, /* MII_BIT_DIR_HOST_PHY */ 253 0, /* MII_BIT_DIR_PHY_HOST */ 254 } 255 }; 256 257 /* 258 * Some chips (3c515 [Corkscrew] and 3c574 [RoadRunner]) have 259 * Window 1 registers offset! 260 */ 261 static __inline int 262 ep_w1_reg(sc, reg) 263 struct ep_softc *sc; 264 int reg; 265 { 266 267 switch (sc->ep_chipset) { 268 case ELINK_CHIPSET_CORKSCREW: 269 return (reg + 0x10); 270 271 case ELINK_CHIPSET_ROADRUNNER: 272 switch (reg) { 273 case ELINK_W1_FREE_TX: 274 case ELINK_W1_RUNNER_RDCTL: 275 case ELINK_W1_RUNNER_WRCTL: 276 return (reg); 277 } 278 return (reg + 0x10); 279 } 280 281 return (reg); 282 } 283 284 /* 285 * Wait for any pending reset to complete. 286 * On newer hardware we could poll SC_COMMAND_IN_PROGRESS, 287 * but older hardware doesn't implement it and we must delay. 288 */ 289 static inline void 290 ep_finish_reset(iot, ioh) 291 bus_space_tag_t iot; 292 bus_space_handle_t ioh; 293 { 294 int i; 295 296 for (i = 0; i < 10000; i++) { 297 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 298 S_COMMAND_IN_PROGRESS) == 0) 299 break; 300 DELAY(10); 301 } 302 } 303 304 /* 305 * Issue a (reset) command, and be sure it has completed. 306 * Used for global reset, TX_RESET, RX_RESET. 307 */ 308 static inline void 309 ep_reset_cmd(sc, cmd, arg) 310 struct ep_softc *sc; 311 u_int cmd, arg; 312 { 313 register bus_space_tag_t iot = sc->sc_iot; 314 register bus_space_handle_t ioh = sc->sc_ioh; 315 316 bus_space_write_2(iot, ioh, cmd, arg); 317 ep_finish_reset(iot, ioh); 318 } 319 320 321 static inline void 322 ep_discard_rxtop(iot, ioh) 323 register bus_space_tag_t iot; 324 register bus_space_handle_t ioh; 325 { 326 int i; 327 328 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISCARD_TOP_PACK); 329 330 /* 331 * Spin for about 1 msec, to avoid forcing a DELAY() between 332 * every received packet (adding latency and limiting pkt-recv rate). 333 * On PCI, at 4 30-nsec PCI bus cycles for a read, 8000 iterations 334 * is about right. 335 */ 336 for (i = 0; i < 8000; i++) { 337 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 338 S_COMMAND_IN_PROGRESS) == 0) 339 return; 340 } 341 342 /* Didn't complete in a hurry. Do DELAY()s. */ 343 ep_finish_reset(iot, ioh); 344 } 345 346 /* 347 * Back-end attach and configure. 348 */ 349 int 350 epconfig(sc, chipset, enaddr) 351 struct ep_softc *sc; 352 u_short chipset; 353 u_int8_t *enaddr; 354 { 355 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 356 bus_space_tag_t iot = sc->sc_iot; 357 bus_space_handle_t ioh = sc->sc_ioh; 358 u_int16_t i; 359 u_int8_t myla[6]; 360 361 sc->ep_chipset = chipset; 362 363 /* 364 * We could have been groveling around in other register 365 * windows in the front-end; make sure we're in window 0 366 * to read the EEPROM. 367 */ 368 GO_WINDOW(0); 369 370 if (enaddr == NULL) { 371 /* 372 * Read the station address from the eeprom. 373 */ 374 for (i = 0; i < 3; i++) { 375 u_int16_t x = ep_read_eeprom(sc, i); 376 myla[(i << 1)] = x >> 8; 377 myla[(i << 1) + 1] = x; 378 } 379 enaddr = myla; 380 } 381 382 /* 383 * Vortex-based (3c59x pci,eisa) and Boomerang (3c900) cards 384 * allow FDDI-sized (4500) byte packets. Commands only take an 385 * 11-bit parameter, and 11 bits isn't enough to hold a full-size 386 * packet length. 387 * Commands to these cards implicitly upshift a packet size 388 * or threshold by 2 bits. 389 * To detect cards with large-packet support, we probe by setting 390 * the transmit threshold register, then change windows and 391 * read back the threshold register directly, and see if the 392 * threshold value was shifted or not. 393 */ 394 bus_space_write_2(iot, ioh, ELINK_COMMAND, 395 SET_TX_AVAIL_THRESH | ELINK_LARGEWIN_PROBE); 396 GO_WINDOW(5); 397 i = bus_space_read_2(iot, ioh, ELINK_W5_TX_AVAIL_THRESH); 398 GO_WINDOW(1); 399 switch (i) { 400 case ELINK_LARGEWIN_PROBE: 401 case (ELINK_LARGEWIN_PROBE & ELINK_LARGEWIN_MASK): 402 sc->ep_pktlenshift = 0; 403 break; 404 405 case (ELINK_LARGEWIN_PROBE << 2): 406 sc->ep_pktlenshift = 2; 407 break; 408 409 default: 410 printf("%s: wrote 0x%x to TX_AVAIL_THRESH, read back 0x%x. " 411 "Interface disabled\n", 412 sc->sc_dev.dv_xname, ELINK_LARGEWIN_PROBE, (int) i); 413 return (1); 414 } 415 416 /* 417 * Ensure Tx-available interrupts are enabled for 418 * start the interface. 419 * XXX should be in epinit()? 420 */ 421 bus_space_write_2(iot, ioh, ELINK_COMMAND, 422 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 423 424 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 425 ifp->if_softc = sc; 426 ifp->if_start = epstart; 427 ifp->if_ioctl = epioctl; 428 ifp->if_watchdog = epwatchdog; 429 ifp->if_flags = 430 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 431 432 if_attach(ifp); 433 ether_ifattach(ifp, enaddr); 434 435 /* 436 * Finish configuration: 437 * determine chipset if the front-end couldn't do so, 438 * show board details, set media. 439 */ 440 441 /* 442 * Print RAM size. We also print the Ethernet address in here. 443 * It's extracted from the ifp, so we have to make sure it's 444 * been attached first. 445 */ 446 ep_internalconfig(sc); 447 GO_WINDOW(0); 448 449 /* 450 * Display some additional information, if pertinent. 451 */ 452 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 453 printf("%s: RoadRunner FIFO buffer enabled\n", 454 sc->sc_dev.dv_xname); 455 456 /* 457 * Initialize our media structures and MII info. We'll 458 * probe the MII if we discover that we have one. 459 */ 460 sc->sc_mii.mii_ifp = ifp; 461 sc->sc_mii.mii_readreg = ep_mii_readreg; 462 sc->sc_mii.mii_writereg = ep_mii_writereg; 463 sc->sc_mii.mii_statchg = ep_statchg; 464 ifmedia_init(&sc->sc_mii.mii_media, 0, ep_media_change, 465 ep_media_status); 466 467 /* 468 * Now, determine which media we have. 469 */ 470 switch (sc->ep_chipset) { 471 case ELINK_CHIPSET_ROADRUNNER: 472 if (sc->ep_flags & ELINK_FLAGS_MII) { 473 ep_roadrunner_mii_enable(sc); 474 GO_WINDOW(0); 475 } 476 /* FALLTHROUGH */ 477 478 case ELINK_CHIPSET_BOOMERANG: 479 /* 480 * If the device has MII, probe it. We won't be using 481 * any `native' media in this case, only PHYs. If 482 * we don't, just treat the Boomerang like the Vortex. 483 */ 484 if (sc->ep_flags & ELINK_FLAGS_MII) { 485 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 486 MII_PHY_ANY, MII_OFFSET_ANY, 0); 487 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 488 ifmedia_add(&sc->sc_mii.mii_media, 489 IFM_ETHER|IFM_NONE, 0, NULL); 490 ifmedia_set(&sc->sc_mii.mii_media, 491 IFM_ETHER|IFM_NONE); 492 } else { 493 ifmedia_set(&sc->sc_mii.mii_media, 494 IFM_ETHER|IFM_AUTO); 495 } 496 break; 497 } 498 /* FALLTHROUGH */ 499 500 case ELINK_CHIPSET_VORTEX: 501 ep_vortex_probemedia(sc); 502 break; 503 504 default: 505 ep_509_probemedia(sc); 506 break; 507 } 508 509 GO_WINDOW(1); /* Window 1 is operating window */ 510 511 #if NBPFILTER > 0 512 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 513 #endif 514 515 #if NRND > 0 516 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 517 RND_TYPE_NET, 0); 518 #endif 519 520 sc->tx_start_thresh = 20; /* probably a good starting point. */ 521 522 /* Establish callback to reset card when we reboot. */ 523 sc->sd_hook = shutdownhook_establish(epshutdown, sc); 524 525 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 526 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 527 return (0); 528 } 529 530 531 /* 532 * Show interface-model-independent info from window 3 533 * internal-configuration register. 534 */ 535 void 536 ep_internalconfig(sc) 537 struct ep_softc *sc; 538 { 539 bus_space_tag_t iot = sc->sc_iot; 540 bus_space_handle_t ioh = sc->sc_ioh; 541 542 u_int config0; 543 u_int config1; 544 545 int ram_size, ram_width, ram_speed, rom_size, ram_split; 546 /* 547 * NVRAM buffer Rx:Tx config names for busmastering cards 548 * (Demon, Vortex, and later). 549 */ 550 const char *onboard_ram_config[] = { 551 "5:3", "3:1", "1:1", "3:5" }; 552 553 GO_WINDOW(3); 554 config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 555 config1 = (u_int)bus_space_read_2(iot, ioh, 556 ELINK_W3_INTERNAL_CONFIG + 2); 557 GO_WINDOW(0); 558 559 ram_size = (config0 & CONFIG_RAMSIZE) >> CONFIG_RAMSIZE_SHIFT; 560 ram_width = (config0 & CONFIG_RAMWIDTH) >> CONFIG_RAMWIDTH_SHIFT; 561 ram_speed = (config0 & CONFIG_RAMSPEED) >> CONFIG_RAMSPEED_SHIFT; 562 rom_size = (config0 & CONFIG_ROMSIZE) >> CONFIG_ROMSIZE_SHIFT; 563 564 ram_split = (config1 & CONFIG_RAMSPLIT) >> CONFIG_RAMSPLIT_SHIFT; 565 566 printf("%s: address %s, %dKB %s-wide FIFO, %s Rx:Tx split\n", 567 sc->sc_dev.dv_xname, 568 ether_sprintf(LLADDR(sc->sc_ethercom.ec_if.if_sadl)), 569 8 << ram_size, 570 (ram_width) ? "word" : "byte", 571 onboard_ram_config[ram_split]); 572 } 573 574 575 /* 576 * Find supported media on 3c509-generation hardware that doesn't have 577 * a "reset_options" register in window 3. 578 * Use the config_cntrl register in window 0 instead. 579 * Used on original, 10Mbit ISA (3c509), 3c509B, and pre-Demon EISA cards 580 * that implement CONFIG_CTRL. We don't have a good way to set the 581 * default active mediuim; punt to ifconfig instead. 582 */ 583 void 584 ep_509_probemedia(sc) 585 struct ep_softc *sc; 586 { 587 bus_space_tag_t iot = sc->sc_iot; 588 bus_space_handle_t ioh = sc->sc_ioh; 589 struct ifmedia *ifm = &sc->sc_mii.mii_media; 590 u_int16_t ep_w0_config, port; 591 struct ep_media *epm; 592 const char *sep = "", *defmedianame = NULL; 593 int defmedia = 0; 594 595 GO_WINDOW(0); 596 ep_w0_config = bus_space_read_2(iot, ioh, ELINK_W0_CONFIG_CTRL); 597 598 printf("%s: ", sc->sc_dev.dv_xname); 599 600 /* Sanity check that there are any media! */ 601 if ((ep_w0_config & ELINK_W0_CC_MEDIAMASK) == 0) { 602 printf("no media present!\n"); 603 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 604 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 605 return; 606 } 607 608 /* 609 * Get the default media from the EEPROM. 610 */ 611 port = ep_read_eeprom(sc, EEPROM_ADDR_CFG) >> 14; 612 613 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 614 615 for (epm = ep_509_media; epm->epm_name != NULL; epm++) { 616 if (ep_w0_config & epm->epm_mpbit) { 617 /* 618 * This simple test works because 509 chipsets 619 * don't do full-duplex. 620 */ 621 if (epm->epm_epmedia == port || defmedia == 0) { 622 defmedia = epm->epm_ifmedia; 623 defmedianame = epm->epm_name; 624 } 625 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 626 NULL); 627 PRINT(epm->epm_name); 628 } 629 } 630 631 #undef PRINT 632 633 #ifdef DIAGNOSTIC 634 if (defmedia == 0) 635 panic("ep_509_probemedia: impossible"); 636 #endif 637 638 printf(" (default %s)\n", defmedianame); 639 ifmedia_set(ifm, defmedia); 640 } 641 642 /* 643 * Find media present on large-packet-capable elink3 devices. 644 * Show onboard configuration of large-packet-capable elink3 devices 645 * (Demon, Vortex, Boomerang), which do not implement CONFIG_CTRL in window 0. 646 * Use media and card-version info in window 3 instead. 647 */ 648 void 649 ep_vortex_probemedia(sc) 650 struct ep_softc *sc; 651 { 652 bus_space_tag_t iot = sc->sc_iot; 653 bus_space_handle_t ioh = sc->sc_ioh; 654 struct ifmedia *ifm = &sc->sc_mii.mii_media; 655 struct ep_media *epm; 656 u_int config1; 657 int reset_options; 658 int default_media; /* 3-bit encoding of default (EEPROM) media */ 659 int defmedia = 0; 660 const char *sep = "", *defmedianame = NULL; 661 662 GO_WINDOW(3); 663 config1 = (u_int)bus_space_read_2(iot, ioh, 664 ELINK_W3_INTERNAL_CONFIG + 2); 665 reset_options = (int)bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 666 GO_WINDOW(0); 667 668 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 669 670 printf("%s: ", sc->sc_dev.dv_xname); 671 672 /* Sanity check that there are any media! */ 673 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 674 printf("no media present!\n"); 675 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 676 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 677 return; 678 } 679 680 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 681 682 for (epm = ep_vortex_media; epm->epm_name != NULL; epm++) { 683 if (reset_options & epm->epm_mpbit) { 684 /* 685 * Default media is a little more complicated 686 * on the Vortex. We support full-duplex which 687 * uses the same reset options bit. 688 * 689 * XXX Check EEPROM for default to FDX? 690 */ 691 if (epm->epm_epmedia == default_media) { 692 if ((epm->epm_ifmedia & IFM_FDX) == 0) { 693 defmedia = epm->epm_ifmedia; 694 defmedianame = epm->epm_name; 695 } 696 } else if (defmedia == 0) { 697 defmedia = epm->epm_ifmedia; 698 defmedianame = epm->epm_name; 699 } 700 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 701 NULL); 702 PRINT(epm->epm_name); 703 } 704 } 705 706 #undef PRINT 707 708 #ifdef DIAGNOSTIC 709 if (defmedia == 0) 710 panic("ep_vortex_probemedia: impossible"); 711 #endif 712 713 printf(" (default %s)\n", defmedianame); 714 ifmedia_set(ifm, defmedia); 715 } 716 717 /* 718 * One second timer, used to tick the MII. 719 */ 720 void 721 ep_tick(arg) 722 void *arg; 723 { 724 struct ep_softc *sc = arg; 725 int s; 726 727 #ifdef DIAGNOSTIC 728 if ((sc->ep_flags & ELINK_FLAGS_MII) == 0) 729 panic("ep_tick"); 730 #endif 731 732 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 733 return; 734 735 s = splnet(); 736 mii_tick(&sc->sc_mii); 737 splx(s); 738 739 timeout(ep_tick, sc, hz); 740 } 741 742 /* 743 * Bring device up. 744 * 745 * The order in here seems important. Otherwise we may not receive 746 * interrupts. ?! 747 */ 748 void 749 epinit(sc) 750 register struct ep_softc *sc; 751 { 752 register struct ifnet *ifp = &sc->sc_ethercom.ec_if; 753 bus_space_tag_t iot = sc->sc_iot; 754 bus_space_handle_t ioh = sc->sc_ioh; 755 int i; 756 757 /* Make sure any pending reset has completed before touching board. */ 758 ep_finish_reset(iot, ioh); 759 760 /* 761 * Cance any pending I/O. 762 */ 763 epstop(sc); 764 765 if (sc->bustype != ELINK_BUS_PCI) { 766 GO_WINDOW(0); 767 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 0); 768 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 769 ENABLE_DRQ_IRQ); 770 } 771 772 if (sc->bustype == ELINK_BUS_PCMCIA) { 773 bus_space_write_2(iot, ioh, ELINK_W0_RESOURCE_CFG, 0x3f00); 774 } 775 776 GO_WINDOW(2); 777 for (i = 0; i < 6; i++) /* Reload the ether_addr. */ 778 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 779 LLADDR(ifp->if_sadl)[i]); 780 781 /* 782 * Reset the station-address receive filter. 783 * A bug workaround for busmastering (Vortex, Demon) cards. 784 */ 785 for (i = 0; i < 6; i++) 786 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 787 788 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 789 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 790 791 GO_WINDOW(1); /* Window 1 is operating window */ 792 for (i = 0; i < 31; i++) 793 bus_space_read_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS)); 794 795 /* Set threshhold for for Tx-space avaiable interrupt. */ 796 bus_space_write_2(iot, ioh, ELINK_COMMAND, 797 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 798 799 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 800 /* 801 * Enable options in the PCMCIA LAN COR register, via 802 * RoadRunner Window 1. 803 * 804 * XXX MAGIC CONSTANTS! 805 */ 806 u_int16_t cor; 807 808 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, (1 << 11)); 809 810 cor = bus_space_read_2(iot, ioh, 0) & ~0x30; 811 if (sc->ep_flags & ELINK_FLAGS_USESHAREDMEM) 812 cor |= 0x10; 813 if (sc->ep_flags & ELINK_FLAGS_FORCENOWAIT) 814 cor |= 0x20; 815 bus_space_write_2(iot, ioh, 0, cor); 816 817 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 818 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 819 820 if (sc->ep_flags & ELINK_FLAGS_MII) { 821 ep_roadrunner_mii_enable(sc); 822 GO_WINDOW(1); 823 } 824 } 825 826 /* Enable interrupts. */ 827 bus_space_write_2(iot, ioh, ELINK_COMMAND, 828 SET_RD_0_MASK | S_CARD_FAILURE | S_RX_COMPLETE | S_TX_COMPLETE | 829 S_TX_AVAIL); 830 bus_space_write_2(iot, ioh, ELINK_COMMAND, 831 SET_INTR_MASK | S_CARD_FAILURE | S_RX_COMPLETE | S_TX_COMPLETE | 832 S_TX_AVAIL); 833 834 /* 835 * Attempt to get rid of any stray interrupts that occured during 836 * configuration. On the i386 this isn't possible because one may 837 * already be queued. However, a single stray interrupt is 838 * unimportant. 839 */ 840 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 841 842 epsetfilter(sc); 843 epsetmedia(sc); 844 845 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 846 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 847 848 epmbuffill(sc); 849 850 /* Interface is now `running', with no output active. */ 851 ifp->if_flags |= IFF_RUNNING; 852 ifp->if_flags &= ~IFF_OACTIVE; 853 854 if (sc->ep_flags & ELINK_FLAGS_MII) { 855 /* Start the one second clock. */ 856 timeout(ep_tick, sc, hz); 857 } 858 859 /* Attempt to start output, if any. */ 860 epstart(ifp); 861 } 862 863 864 /* 865 * Set multicast receive filter. 866 * elink3 hardware has no selective multicast filter in hardware. 867 * Enable reception of all multicasts and filter in software. 868 */ 869 void 870 epsetfilter(sc) 871 register struct ep_softc *sc; 872 { 873 register struct ifnet *ifp = &sc->sc_ethercom.ec_if; 874 875 GO_WINDOW(1); /* Window 1 is operating window */ 876 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 877 SET_RX_FILTER | FIL_INDIVIDUAL | FIL_BRDCST | 878 ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0) | 879 ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0)); 880 } 881 882 int 883 ep_media_change(ifp) 884 struct ifnet *ifp; 885 { 886 register struct ep_softc *sc = ifp->if_softc; 887 888 if (sc->enabled && (ifp->if_flags & IFF_UP) != 0) 889 epreset(sc); 890 891 return (0); 892 } 893 894 /* 895 * Reset and enable the MII on the RoadRunner. 896 */ 897 void 898 ep_roadrunner_mii_enable(sc) 899 struct ep_softc *sc; 900 { 901 bus_space_tag_t iot = sc->sc_iot; 902 bus_space_handle_t ioh = sc->sc_ioh; 903 904 GO_WINDOW(3); 905 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 906 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 907 delay(1000); 908 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 909 ELINK_PCI_100BASE_MII|ELINK_RUNNER_MII_RESET| 910 ELINK_RUNNER_ENABLE_MII); 911 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 912 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 913 delay(1000); 914 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 915 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 916 } 917 918 /* 919 * Set the card to use the specified media. 920 */ 921 void 922 epsetmedia(sc) 923 struct ep_softc *sc; 924 { 925 bus_space_tag_t iot = sc->sc_iot; 926 bus_space_handle_t ioh = sc->sc_ioh; 927 928 /* Turn everything off. First turn off linkbeat and UTP. */ 929 GO_WINDOW(4); 930 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0x0); 931 932 /* Turn off coax */ 933 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 934 delay(1000); 935 936 /* 937 * If the device has MII, select it, and then tell the 938 * PHY which media to use. 939 */ 940 if (sc->ep_flags & ELINK_FLAGS_MII) { 941 int config0, config1; 942 943 GO_WINDOW(3); 944 945 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 946 int resopt; 947 948 resopt = bus_space_read_2(iot, ioh, 949 ELINK_W3_RESET_OPTIONS); 950 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 951 resopt | ELINK_RUNNER_ENABLE_MII); 952 } 953 954 config0 = (u_int)bus_space_read_2(iot, ioh, 955 ELINK_W3_INTERNAL_CONFIG); 956 config1 = (u_int)bus_space_read_2(iot, ioh, 957 ELINK_W3_INTERNAL_CONFIG + 2); 958 959 config1 = config1 & ~CONFIG_MEDIAMASK; 960 config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT); 961 962 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 963 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 964 config1); 965 GO_WINDOW(1); /* back to operating window */ 966 967 mii_mediachg(&sc->sc_mii); 968 return; 969 } 970 971 /* 972 * Now turn on the selected media/transceiver. 973 */ 974 GO_WINDOW(4); 975 switch (IFM_SUBTYPE(sc->sc_mii.mii_media.ifm_cur->ifm_media)) { 976 case IFM_10_T: 977 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 978 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 979 break; 980 981 case IFM_10_2: 982 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 983 DELAY(1000); /* 50ms not enmough? */ 984 break; 985 986 case IFM_100_TX: 987 case IFM_100_FX: 988 case IFM_100_T4: /* XXX check documentation */ 989 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 990 LINKBEAT_ENABLE); 991 DELAY(1000); /* not strictly necessary? */ 992 break; 993 994 case IFM_10_5: 995 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 996 SQE_ENABLE); 997 DELAY(1000); /* not strictly necessary? */ 998 break; 999 1000 case IFM_MANUAL: 1001 /* 1002 * Nothing to do here; we are actually enabling the 1003 * external PHY on the MII port. 1004 */ 1005 break; 1006 1007 case IFM_NONE: 1008 printf("%s: interface disabled\n", sc->sc_dev.dv_xname); 1009 return; 1010 1011 default: 1012 panic("epsetmedia: impossible"); 1013 } 1014 1015 /* 1016 * Tell the chip which port to use. 1017 */ 1018 switch (sc->ep_chipset) { 1019 case ELINK_CHIPSET_VORTEX: 1020 case ELINK_CHIPSET_BOOMERANG: 1021 { 1022 int mctl, config0, config1; 1023 1024 GO_WINDOW(3); 1025 config0 = (u_int)bus_space_read_2(iot, ioh, 1026 ELINK_W3_INTERNAL_CONFIG); 1027 config1 = (u_int)bus_space_read_2(iot, ioh, 1028 ELINK_W3_INTERNAL_CONFIG + 2); 1029 1030 config1 = config1 & ~CONFIG_MEDIAMASK; 1031 config1 |= (sc->sc_mii.mii_media.ifm_cur->ifm_data << 1032 CONFIG_MEDIAMASK_SHIFT); 1033 1034 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 1035 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 1036 config1); 1037 1038 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1039 if (sc->sc_mii.mii_media.ifm_cur->ifm_media & IFM_FDX) 1040 mctl |= MAC_CONTROL_FDX; 1041 else 1042 mctl &= ~MAC_CONTROL_FDX; 1043 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1044 break; 1045 } 1046 default: 1047 { 1048 int w0_addr_cfg; 1049 1050 GO_WINDOW(0); 1051 w0_addr_cfg = bus_space_read_2(iot, ioh, ELINK_W0_ADDRESS_CFG); 1052 w0_addr_cfg &= 0x3fff; 1053 bus_space_write_2(iot, ioh, ELINK_W0_ADDRESS_CFG, w0_addr_cfg | 1054 (sc->sc_mii.mii_media.ifm_cur->ifm_data << 14)); 1055 DELAY(1000); 1056 break; 1057 } 1058 } 1059 1060 GO_WINDOW(1); /* Window 1 is operating window */ 1061 } 1062 1063 /* 1064 * Get currently-selected media from card. 1065 * (if_media callback, may be called before interface is brought up). 1066 */ 1067 void 1068 ep_media_status(ifp, req) 1069 struct ifnet *ifp; 1070 struct ifmediareq *req; 1071 { 1072 register struct ep_softc *sc = ifp->if_softc; 1073 bus_space_tag_t iot = sc->sc_iot; 1074 bus_space_handle_t ioh = sc->sc_ioh; 1075 1076 if (sc->enabled == 0) { 1077 req->ifm_active = IFM_ETHER|IFM_NONE; 1078 req->ifm_status = 0; 1079 return; 1080 } 1081 1082 /* 1083 * If we have MII, go ask the PHY what's going on. 1084 */ 1085 if (sc->ep_flags & ELINK_FLAGS_MII) { 1086 mii_pollstat(&sc->sc_mii); 1087 req->ifm_active = sc->sc_mii.mii_media_active; 1088 req->ifm_status = sc->sc_mii.mii_media_status; 1089 return; 1090 } 1091 1092 /* 1093 * Ok, at this point we claim that our active media is 1094 * the currently selected media. We'll update our status 1095 * if our chipset allows us to detect link. 1096 */ 1097 req->ifm_active = sc->sc_mii.mii_media.ifm_cur->ifm_media; 1098 req->ifm_status = 0; 1099 1100 switch (sc->ep_chipset) { 1101 case ELINK_CHIPSET_VORTEX: 1102 case ELINK_CHIPSET_BOOMERANG: 1103 GO_WINDOW(4); 1104 req->ifm_status = IFM_AVALID; 1105 if (bus_space_read_2(iot, ioh, ELINK_W4_MEDIA_TYPE) & 1106 LINKBEAT_DETECT) 1107 req->ifm_status |= IFM_ACTIVE; 1108 GO_WINDOW(1); /* back to operating window */ 1109 break; 1110 } 1111 } 1112 1113 1114 1115 /* 1116 * Start outputting on the interface. 1117 * Always called as splnet(). 1118 */ 1119 void 1120 epstart(ifp) 1121 struct ifnet *ifp; 1122 { 1123 register struct ep_softc *sc = ifp->if_softc; 1124 bus_space_tag_t iot = sc->sc_iot; 1125 bus_space_handle_t ioh = sc->sc_ioh; 1126 struct mbuf *m, *m0; 1127 int sh, len, pad; 1128 bus_addr_t txreg; 1129 1130 /* Don't transmit if interface is busy or not running */ 1131 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1132 return; 1133 1134 startagain: 1135 /* Sneak a peek at the next packet */ 1136 m0 = ifp->if_snd.ifq_head; 1137 if (m0 == 0) 1138 return; 1139 1140 /* We need to use m->m_pkthdr.len, so require the header */ 1141 if ((m0->m_flags & M_PKTHDR) == 0) 1142 panic("epstart: no header mbuf"); 1143 len = m0->m_pkthdr.len; 1144 1145 pad = (4 - len) & 3; 1146 1147 /* 1148 * The 3c509 automatically pads short packets to minimum ethernet 1149 * length, but we drop packets that are too large. Perhaps we should 1150 * truncate them instead? 1151 */ 1152 if (len + pad > ETHER_MAX_LEN) { 1153 /* packet is obviously too large: toss it */ 1154 ++ifp->if_oerrors; 1155 IF_DEQUEUE(&ifp->if_snd, m0); 1156 m_freem(m0); 1157 goto readcheck; 1158 } 1159 1160 if (bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_FREE_TX)) < 1161 len + pad + 4) { 1162 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1163 SET_TX_AVAIL_THRESH | 1164 ((len + pad + 4) >> sc->ep_pktlenshift)); 1165 /* not enough room in FIFO */ 1166 ifp->if_flags |= IFF_OACTIVE; 1167 return; 1168 } else { 1169 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1170 SET_TX_AVAIL_THRESH | ELINK_THRESH_DISABLE); 1171 } 1172 1173 IF_DEQUEUE(&ifp->if_snd, m0); 1174 if (m0 == 0) /* not really needed */ 1175 return; 1176 1177 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_TX_START_THRESH | 1178 ((len / 4 + sc->tx_start_thresh) /* >> sc->ep_pktlenshift*/)); 1179 1180 #if NBPFILTER > 0 1181 if (ifp->if_bpf) 1182 bpf_mtap(ifp->if_bpf, m0); 1183 #endif 1184 1185 /* 1186 * Do the output at splhigh() so that an interrupt from another device 1187 * won't cause a FIFO underrun. 1188 */ 1189 sh = splhigh(); 1190 1191 txreg = ep_w1_reg(sc, ELINK_W1_TX_PIO_WR_1); 1192 1193 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1194 /* 1195 * Prime the FIFO buffer counter (number of 16-bit 1196 * words about to be written to the FIFO). 1197 * 1198 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1199 * COUNTER IS NON-ZERO! 1200 */ 1201 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 1202 (len + pad) >> 1); 1203 } 1204 1205 bus_space_write_2(iot, ioh, txreg, len); 1206 bus_space_write_2(iot, ioh, txreg, 0xffff); /* Second is meaningless */ 1207 if (ELINK_IS_BUS_32(sc->bustype)) { 1208 for (m = m0; m;) { 1209 if (m->m_len > 3) { 1210 /* align our reads from core */ 1211 if (mtod(m, u_long) & 3) { 1212 u_long count = 1213 4 - (mtod(m, u_long) & 3); 1214 bus_space_write_multi_1(iot, ioh, 1215 txreg, mtod(m, u_int8_t *), count); 1216 m->m_data = 1217 (void *)(mtod(m, u_long) + count); 1218 m->m_len -= count; 1219 } 1220 bus_space_write_multi_stream_4(iot, ioh, 1221 txreg, mtod(m, u_int32_t *), m->m_len >> 2); 1222 m->m_data = (void *)(mtod(m, u_long) + 1223 (u_long)(m->m_len & ~3)); 1224 m->m_len -= m->m_len & ~3; 1225 } 1226 if (m->m_len) { 1227 bus_space_write_multi_1(iot, ioh, 1228 txreg, mtod(m, u_int8_t *), m->m_len); 1229 } 1230 MFREE(m, m0); 1231 m = m0; 1232 } 1233 } else { 1234 for (m = m0; m;) { 1235 if (m->m_len > 1) { 1236 if (mtod(m, u_long) & 1) { 1237 bus_space_write_1(iot, ioh, 1238 txreg, *(mtod(m, u_int8_t *))); 1239 m->m_data = 1240 (void *)(mtod(m, u_long) + 1); 1241 m->m_len -= 1; 1242 } 1243 bus_space_write_multi_stream_2(iot, ioh, 1244 txreg, mtod(m, u_int16_t *), 1245 m->m_len >> 1); 1246 } 1247 if (m->m_len & 1) { 1248 bus_space_write_1(iot, ioh, txreg, 1249 *(mtod(m, u_int8_t *) + m->m_len - 1)); 1250 } 1251 MFREE(m, m0); 1252 m = m0; 1253 } 1254 } 1255 while (pad--) 1256 bus_space_write_1(iot, ioh, txreg, 0); 1257 1258 splx(sh); 1259 1260 ++ifp->if_opackets; 1261 1262 readcheck: 1263 if ((bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)) & 1264 ERR_INCOMPLETE) == 0) { 1265 /* We received a complete packet. */ 1266 u_int16_t status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1267 1268 if ((status & S_INTR_LATCH) == 0) { 1269 /* 1270 * No interrupt, read the packet and continue 1271 * Is this supposed to happen? Is my motherboard 1272 * completely busted? 1273 */ 1274 epread(sc); 1275 } else { 1276 /* Got an interrupt, return so that it gets serviced. */ 1277 return; 1278 } 1279 } else { 1280 /* Check if we are stuck and reset [see XXX comment] */ 1281 if (epstatus(sc)) { 1282 if (ifp->if_flags & IFF_DEBUG) 1283 printf("%s: adapter reset\n", 1284 sc->sc_dev.dv_xname); 1285 epreset(sc); 1286 } 1287 } 1288 1289 goto startagain; 1290 } 1291 1292 1293 /* 1294 * XXX: The 3c509 card can get in a mode where both the fifo status bit 1295 * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set 1296 * We detect this situation and we reset the adapter. 1297 * It happens at times when there is a lot of broadcast traffic 1298 * on the cable (once in a blue moon). 1299 */ 1300 static int 1301 epstatus(sc) 1302 register struct ep_softc *sc; 1303 { 1304 bus_space_tag_t iot = sc->sc_iot; 1305 bus_space_handle_t ioh = sc->sc_ioh; 1306 u_int16_t fifost; 1307 1308 /* 1309 * Check the FIFO status and act accordingly 1310 */ 1311 GO_WINDOW(4); 1312 fifost = bus_space_read_2(iot, ioh, ELINK_W4_FIFO_DIAG); 1313 GO_WINDOW(1); 1314 1315 if (fifost & FIFOS_RX_UNDERRUN) { 1316 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1317 printf("%s: RX underrun\n", sc->sc_dev.dv_xname); 1318 epreset(sc); 1319 return 0; 1320 } 1321 1322 if (fifost & FIFOS_RX_STATUS_OVERRUN) { 1323 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1324 printf("%s: RX Status overrun\n", sc->sc_dev.dv_xname); 1325 return 1; 1326 } 1327 1328 if (fifost & FIFOS_RX_OVERRUN) { 1329 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1330 printf("%s: RX overrun\n", sc->sc_dev.dv_xname); 1331 return 1; 1332 } 1333 1334 if (fifost & FIFOS_TX_OVERRUN) { 1335 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1336 printf("%s: TX overrun\n", sc->sc_dev.dv_xname); 1337 epreset(sc); 1338 return 0; 1339 } 1340 1341 return 0; 1342 } 1343 1344 1345 static void 1346 eptxstat(sc) 1347 register struct ep_softc *sc; 1348 { 1349 bus_space_tag_t iot = sc->sc_iot; 1350 bus_space_handle_t ioh = sc->sc_ioh; 1351 int i; 1352 1353 /* 1354 * We need to read+write TX_STATUS until we get a 0 status 1355 * in order to turn off the interrupt flag. 1356 */ 1357 while ((i = bus_space_read_1(iot, ioh, 1358 ep_w1_reg(sc, ELINK_W1_TX_STATUS))) & TXS_COMPLETE) { 1359 bus_space_write_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS), 1360 0x0); 1361 1362 if (i & TXS_JABBER) { 1363 ++sc->sc_ethercom.ec_if.if_oerrors; 1364 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1365 printf("%s: jabber (%x)\n", 1366 sc->sc_dev.dv_xname, i); 1367 epreset(sc); 1368 } else if (i & TXS_UNDERRUN) { 1369 ++sc->sc_ethercom.ec_if.if_oerrors; 1370 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1371 printf("%s: fifo underrun (%x) @%d\n", 1372 sc->sc_dev.dv_xname, i, 1373 sc->tx_start_thresh); 1374 if (sc->tx_succ_ok < 100) 1375 sc->tx_start_thresh = min(ETHER_MAX_LEN, 1376 sc->tx_start_thresh + 20); 1377 sc->tx_succ_ok = 0; 1378 epreset(sc); 1379 } else if (i & TXS_MAX_COLLISION) { 1380 ++sc->sc_ethercom.ec_if.if_collisions; 1381 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 1382 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1383 } else 1384 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 1385 } 1386 } 1387 1388 int 1389 epintr(arg) 1390 void *arg; 1391 { 1392 register struct ep_softc *sc = arg; 1393 bus_space_tag_t iot = sc->sc_iot; 1394 bus_space_handle_t ioh = sc->sc_ioh; 1395 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1396 u_int16_t status; 1397 int ret = 0; 1398 int addrandom = 0; 1399 1400 if (sc->enabled == 0 || 1401 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1402 return (0); 1403 1404 for (;;) { 1405 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1406 1407 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1408 1409 if ((status & (S_TX_COMPLETE | S_TX_AVAIL | 1410 S_RX_COMPLETE | S_CARD_FAILURE)) == 0) { 1411 if ((status & S_INTR_LATCH) == 0) { 1412 #if 0 1413 printf("%s: intr latch cleared\n", 1414 sc->sc_dev.dv_xname); 1415 #endif 1416 break; 1417 } 1418 } 1419 1420 ret = 1; 1421 1422 /* 1423 * Acknowledge any interrupts. It's important that we do this 1424 * first, since there would otherwise be a race condition. 1425 * Due to the i386 interrupt queueing, we may get spurious 1426 * interrupts occasionally. 1427 */ 1428 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1429 (status & (C_INTR_LATCH | 1430 C_CARD_FAILURE | 1431 C_TX_COMPLETE | 1432 C_TX_AVAIL | 1433 C_RX_COMPLETE | 1434 C_RX_EARLY | 1435 C_INT_RQD | 1436 C_UPD_STATS))); 1437 1438 #if 0 1439 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1440 1441 printf("%s: intr%s%s%s%s\n", sc->sc_dev.dv_xname, 1442 (status & S_RX_COMPLETE)?" RX_COMPLETE":"", 1443 (status & S_TX_COMPLETE)?" TX_COMPLETE":"", 1444 (status & S_TX_AVAIL)?" TX_AVAIL":"", 1445 (status & S_CARD_FAILURE)?" CARD_FAILURE":""); 1446 #endif 1447 1448 if (status & S_RX_COMPLETE) { 1449 epread(sc); 1450 addrandom = 1; 1451 } 1452 if (status & S_TX_AVAIL) { 1453 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1454 epstart(&sc->sc_ethercom.ec_if); 1455 addrandom = 1; 1456 } 1457 if (status & S_CARD_FAILURE) { 1458 printf("%s: adapter failure (%x)\n", 1459 sc->sc_dev.dv_xname, status); 1460 #if 1 1461 epinit(sc); 1462 #else 1463 epreset(sc); 1464 #endif 1465 return (1); 1466 } 1467 if (status & S_TX_COMPLETE) { 1468 eptxstat(sc); 1469 epstart(ifp); 1470 addrandom = 1; 1471 } 1472 1473 #if NRND > 0 1474 if (status) 1475 rnd_add_uint32(&sc->rnd_source, status); 1476 #endif 1477 } 1478 1479 /* no more interrupts */ 1480 return (ret); 1481 } 1482 1483 void 1484 epread(sc) 1485 register struct ep_softc *sc; 1486 { 1487 bus_space_tag_t iot = sc->sc_iot; 1488 bus_space_handle_t ioh = sc->sc_ioh; 1489 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1490 struct mbuf *m; 1491 struct ether_header *eh; 1492 int len; 1493 1494 len = bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1495 1496 again: 1497 if (ifp->if_flags & IFF_DEBUG) { 1498 int err = len & ERR_MASK; 1499 char *s = NULL; 1500 1501 if (len & ERR_INCOMPLETE) 1502 s = "incomplete packet"; 1503 else if (err == ERR_OVERRUN) 1504 s = "packet overrun"; 1505 else if (err == ERR_RUNT) 1506 s = "runt packet"; 1507 else if (err == ERR_ALIGNMENT) 1508 s = "bad alignment"; 1509 else if (err == ERR_CRC) 1510 s = "bad crc"; 1511 else if (err == ERR_OVERSIZE) 1512 s = "oversized packet"; 1513 else if (err == ERR_DRIBBLE) 1514 s = "dribble bits"; 1515 1516 if (s) 1517 printf("%s: %s\n", sc->sc_dev.dv_xname, s); 1518 } 1519 1520 if (len & ERR_INCOMPLETE) 1521 return; 1522 1523 if (len & ERR_RX) { 1524 ++ifp->if_ierrors; 1525 goto abort; 1526 } 1527 1528 len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */ 1529 1530 /* Pull packet off interface. */ 1531 m = epget(sc, len); 1532 if (m == 0) { 1533 ifp->if_ierrors++; 1534 goto abort; 1535 } 1536 1537 ++ifp->if_ipackets; 1538 1539 /* We assume the header fit entirely in one mbuf. */ 1540 eh = mtod(m, struct ether_header *); 1541 1542 #if NBPFILTER > 0 1543 /* 1544 * Check if there's a BPF listener on this interface. 1545 * If so, hand off the raw packet to BPF. 1546 */ 1547 if (ifp->if_bpf) { 1548 bpf_mtap(ifp->if_bpf, m); 1549 1550 /* 1551 * Note that the interface cannot be in promiscuous mode if 1552 * there are no BPF listeners. And if we are in promiscuous 1553 * mode, we have to check if this packet is really ours. 1554 */ 1555 if ((ifp->if_flags & IFF_PROMISC) && 1556 (eh->ether_dhost[0] & 1) == 0 && /* !mcast and !bcast */ 1557 bcmp(eh->ether_dhost, LLADDR(sc->sc_ethercom.ec_if.if_sadl), 1558 sizeof(eh->ether_dhost)) != 0) { 1559 m_freem(m); 1560 return; 1561 } 1562 } 1563 #endif 1564 (*ifp->if_input)(ifp, m); 1565 1566 /* 1567 * In periods of high traffic we can actually receive enough 1568 * packets so that the fifo overrun bit will be set at this point, 1569 * even though we just read a packet. In this case we 1570 * are not going to receive any more interrupts. We check for 1571 * this condition and read again until the fifo is not full. 1572 * We could simplify this test by not using epstatus(), but 1573 * rechecking the RX_STATUS register directly. This test could 1574 * result in unnecessary looping in cases where there is a new 1575 * packet but the fifo is not full, but it will not fix the 1576 * stuck behavior. 1577 * 1578 * Even with this improvement, we still get packet overrun errors 1579 * which are hurting performance. Maybe when I get some more time 1580 * I'll modify epread() so that it can handle RX_EARLY interrupts. 1581 */ 1582 if (epstatus(sc)) { 1583 len = bus_space_read_2(iot, ioh, 1584 ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1585 /* Check if we are stuck and reset [see XXX comment] */ 1586 if (len & ERR_INCOMPLETE) { 1587 if (ifp->if_flags & IFF_DEBUG) 1588 printf("%s: adapter reset\n", 1589 sc->sc_dev.dv_xname); 1590 epreset(sc); 1591 return; 1592 } 1593 goto again; 1594 } 1595 1596 return; 1597 1598 abort: 1599 ep_discard_rxtop(iot, ioh); 1600 1601 } 1602 1603 struct mbuf * 1604 epget(sc, totlen) 1605 struct ep_softc *sc; 1606 int totlen; 1607 { 1608 bus_space_tag_t iot = sc->sc_iot; 1609 bus_space_handle_t ioh = sc->sc_ioh; 1610 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1611 struct mbuf *top, **mp, *m, *rv = NULL; 1612 bus_addr_t rxreg; 1613 int len, remaining; 1614 int sh; 1615 1616 m = sc->mb[sc->next_mb]; 1617 sc->mb[sc->next_mb] = 0; 1618 if (m == 0) { 1619 MGETHDR(m, M_DONTWAIT, MT_DATA); 1620 if (m == 0) 1621 return 0; 1622 } else { 1623 /* If the queue is no longer full, refill. */ 1624 if (sc->last_mb == sc->next_mb) 1625 timeout(epmbuffill, sc, 1); 1626 /* Convert one of our saved mbuf's. */ 1627 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1628 m->m_data = m->m_pktdat; 1629 m->m_flags = M_PKTHDR; 1630 bzero(&m->m_pkthdr, sizeof(m->m_pkthdr)); 1631 } 1632 m->m_pkthdr.rcvif = ifp; 1633 m->m_pkthdr.len = totlen; 1634 len = MHLEN; 1635 top = 0; 1636 mp = ⊤ 1637 1638 /* 1639 * We read the packet at splhigh() so that an interrupt from another 1640 * device doesn't cause the card's buffer to overflow while we're 1641 * reading it. We may still lose packets at other times. 1642 */ 1643 sh = splhigh(); 1644 1645 rxreg = ep_w1_reg(sc, ELINK_W1_RX_PIO_RD_1); 1646 1647 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1648 /* 1649 * Prime the FIFO buffer counter (number of 16-bit 1650 * words about to be read from the FIFO). 1651 * 1652 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1653 * COUNTER IS NON-ZERO! 1654 */ 1655 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, totlen >> 1); 1656 } 1657 1658 while (totlen > 0) { 1659 if (top) { 1660 m = sc->mb[sc->next_mb]; 1661 sc->mb[sc->next_mb] = 0; 1662 if (m == 0) { 1663 MGET(m, M_DONTWAIT, MT_DATA); 1664 if (m == 0) { 1665 m_freem(top); 1666 goto out; 1667 } 1668 } else { 1669 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1670 } 1671 len = MLEN; 1672 } 1673 if (totlen >= MINCLSIZE) { 1674 MCLGET(m, M_DONTWAIT); 1675 if ((m->m_flags & M_EXT) == 0) { 1676 m_free(m); 1677 m_freem(top); 1678 goto out; 1679 } 1680 len = MCLBYTES; 1681 } 1682 if (top == 0) { 1683 /* align the struct ip header */ 1684 caddr_t newdata = (caddr_t) 1685 ALIGN(m->m_data + sizeof(struct ether_header)) 1686 - sizeof(struct ether_header); 1687 len -= newdata - m->m_data; 1688 m->m_data = newdata; 1689 } 1690 remaining = len = min(totlen, len); 1691 if (ELINK_IS_BUS_32(sc->bustype)) { 1692 u_long offset = mtod(m, u_long); 1693 /* 1694 * Read bytes up to the point where we are aligned. 1695 * (We can align to 4 bytes, rather than ALIGNBYTES, 1696 * here because we're later reading 4-byte chunks.) 1697 */ 1698 if ((remaining > 3) && (offset & 3)) { 1699 int count = (4 - (offset & 3)); 1700 bus_space_read_multi_1(iot, ioh, 1701 rxreg, (u_int8_t *) offset, count); 1702 offset += count; 1703 remaining -= count; 1704 } 1705 if (remaining > 3) { 1706 bus_space_read_multi_stream_4(iot, ioh, 1707 rxreg, (u_int32_t *) offset, 1708 remaining >> 2); 1709 offset += remaining & ~3; 1710 remaining &= 3; 1711 } 1712 if (remaining) { 1713 bus_space_read_multi_1(iot, ioh, 1714 rxreg, (u_int8_t *) offset, remaining); 1715 } 1716 } else { 1717 u_long offset = mtod(m, u_long); 1718 if ((remaining > 1) && (offset & 1)) { 1719 bus_space_read_multi_1(iot, ioh, 1720 rxreg, (u_int8_t *) offset, 1); 1721 remaining -= 1; 1722 offset += 1; 1723 } 1724 if (remaining > 1) { 1725 bus_space_read_multi_stream_2(iot, ioh, 1726 rxreg, (u_int16_t *) offset, 1727 remaining >> 1); 1728 offset += remaining & ~1; 1729 } 1730 if (remaining & 1) { 1731 bus_space_read_multi_1(iot, ioh, 1732 rxreg, (u_int8_t *) offset, remaining & 1); 1733 } 1734 } 1735 m->m_len = len; 1736 totlen -= len; 1737 *mp = m; 1738 mp = &m->m_next; 1739 } 1740 1741 rv = top; 1742 1743 ep_discard_rxtop(iot, ioh); 1744 1745 out: 1746 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 1747 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1748 splx(sh); 1749 1750 return rv; 1751 } 1752 1753 int 1754 epioctl(ifp, cmd, data) 1755 register struct ifnet *ifp; 1756 u_long cmd; 1757 caddr_t data; 1758 { 1759 struct ep_softc *sc = ifp->if_softc; 1760 struct ifaddr *ifa = (struct ifaddr *)data; 1761 struct ifreq *ifr = (struct ifreq *)data; 1762 int s, error = 0; 1763 1764 s = splnet(); 1765 1766 switch (cmd) { 1767 1768 case SIOCSIFADDR: 1769 if ((error = epenable(sc)) != 0) 1770 break; 1771 /* epinit is called just below */ 1772 ifp->if_flags |= IFF_UP; 1773 switch (ifa->ifa_addr->sa_family) { 1774 #ifdef INET 1775 case AF_INET: 1776 epinit(sc); 1777 arp_ifinit(&sc->sc_ethercom.ec_if, ifa); 1778 break; 1779 #endif 1780 #ifdef NS 1781 case AF_NS: 1782 { 1783 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1784 1785 if (ns_nullhost(*ina)) 1786 ina->x_host = *(union ns_host *) 1787 LLADDR(ifp->if_sadl); 1788 else 1789 bcopy(ina->x_host.c_host, 1790 LLADDR(ifp->if_sadl), 1791 ifp->if_addrlen); 1792 /* Set new address. */ 1793 epinit(sc); 1794 break; 1795 } 1796 #endif 1797 default: 1798 epinit(sc); 1799 break; 1800 } 1801 break; 1802 1803 case SIOCSIFMEDIA: 1804 case SIOCGIFMEDIA: 1805 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 1806 break; 1807 1808 case SIOCSIFFLAGS: 1809 if ((ifp->if_flags & IFF_UP) == 0 && 1810 (ifp->if_flags & IFF_RUNNING) != 0) { 1811 /* 1812 * If interface is marked down and it is running, then 1813 * stop it. 1814 */ 1815 epstop(sc); 1816 ifp->if_flags &= ~IFF_RUNNING; 1817 epdisable(sc); 1818 } else if ((ifp->if_flags & IFF_UP) != 0 && 1819 (ifp->if_flags & IFF_RUNNING) == 0) { 1820 /* 1821 * If interface is marked up and it is stopped, then 1822 * start it. 1823 */ 1824 if ((error = epenable(sc)) != 0) 1825 break; 1826 epinit(sc); 1827 } else if ((ifp->if_flags & IFF_UP) != 0) { 1828 /* 1829 * deal with flags changes: 1830 * IFF_MULTICAST, IFF_PROMISC. 1831 */ 1832 epsetfilter(sc); 1833 } 1834 break; 1835 1836 case SIOCADDMULTI: 1837 case SIOCDELMULTI: 1838 if (sc->enabled == 0) { 1839 error = EIO; 1840 break; 1841 } 1842 1843 error = (cmd == SIOCADDMULTI) ? 1844 ether_addmulti(ifr, &sc->sc_ethercom) : 1845 ether_delmulti(ifr, &sc->sc_ethercom); 1846 1847 if (error == ENETRESET) { 1848 /* 1849 * Multicast list has changed; set the hardware filter 1850 * accordingly. 1851 */ 1852 epreset(sc); 1853 error = 0; 1854 } 1855 break; 1856 1857 default: 1858 error = EINVAL; 1859 break; 1860 } 1861 1862 splx(s); 1863 return (error); 1864 } 1865 1866 void 1867 epreset(sc) 1868 struct ep_softc *sc; 1869 { 1870 int s; 1871 1872 s = splnet(); 1873 epinit(sc); 1874 splx(s); 1875 } 1876 1877 void 1878 epwatchdog(ifp) 1879 struct ifnet *ifp; 1880 { 1881 struct ep_softc *sc = ifp->if_softc; 1882 1883 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1884 ++sc->sc_ethercom.ec_if.if_oerrors; 1885 1886 epreset(sc); 1887 } 1888 1889 void 1890 epstop(sc) 1891 register struct ep_softc *sc; 1892 { 1893 bus_space_tag_t iot = sc->sc_iot; 1894 bus_space_handle_t ioh = sc->sc_ioh; 1895 1896 if (sc->ep_flags & ELINK_FLAGS_MII) { 1897 /* Stop the one second clock. */ 1898 untimeout(ep_tick, sc); 1899 1900 /* Down the MII. */ 1901 mii_down(&sc->sc_mii); 1902 } 1903 1904 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 1905 /* 1906 * Clear the FIFO buffer count, thus halting 1907 * any currently-running transactions. 1908 */ 1909 GO_WINDOW(1); /* sanity */ 1910 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 1911 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1912 } 1913 1914 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1915 ep_discard_rxtop(iot, ioh); 1916 1917 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1918 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1919 1920 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 1921 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 1922 1923 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1924 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK); 1925 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK); 1926 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RX_FILTER); 1927 1928 epmbufempty(sc); 1929 } 1930 1931 1932 /* 1933 * Before reboots, reset card completely. 1934 */ 1935 static void 1936 epshutdown(arg) 1937 void *arg; 1938 { 1939 register struct ep_softc *sc = arg; 1940 int s = splnet(); 1941 1942 if (sc->enabled) { 1943 epstop(sc); 1944 ep_reset_cmd(sc, ELINK_COMMAND, GLOBAL_RESET); 1945 sc->enabled = 0; 1946 } 1947 splx(s); 1948 } 1949 1950 /* 1951 * We get eeprom data from the id_port given an offset into the 1952 * eeprom. Basically; after the ID_sequence is sent to all of 1953 * the cards; they enter the ID_CMD state where they will accept 1954 * command requests. 0x80-0xbf loads the eeprom data. We then 1955 * read the port 16 times and with every read; the cards check 1956 * for contention (ie: if one card writes a 0 bit and another 1957 * writes a 1 bit then the host sees a 0. At the end of the cycle; 1958 * each card compares the data on the bus; if there is a difference 1959 * then that card goes into ID_WAIT state again). In the meantime; 1960 * one bit of data is returned in the AX register which is conveniently 1961 * returned to us by bus_space_read_1(). Hence; we read 16 times getting one 1962 * bit of data with each read. 1963 * 1964 * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT! 1965 */ 1966 u_int16_t 1967 epreadeeprom(iot, ioh, offset) 1968 bus_space_tag_t iot; 1969 bus_space_handle_t ioh; 1970 int offset; 1971 { 1972 u_int16_t data = 0; 1973 int i; 1974 1975 bus_space_write_1(iot, ioh, 0, 0x80 + offset); 1976 delay(1000); 1977 for (i = 0; i < 16; i++) 1978 data = (data << 1) | (bus_space_read_2(iot, ioh, 0) & 1); 1979 return (data); 1980 } 1981 1982 static int 1983 epbusyeeprom(sc) 1984 struct ep_softc *sc; 1985 { 1986 bus_space_tag_t iot = sc->sc_iot; 1987 bus_space_handle_t ioh = sc->sc_ioh; 1988 int i = 100, j; 1989 1990 if (sc->bustype == ELINK_BUS_PCMCIA) { 1991 delay(1000); 1992 return 0; 1993 } 1994 1995 j = 0; /* bad GCC flow analysis */ 1996 while (i--) { 1997 j = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND); 1998 if (j & EEPROM_BUSY) 1999 delay(100); 2000 else 2001 break; 2002 } 2003 if (!i) { 2004 printf("\n%s: eeprom failed to come ready\n", 2005 sc->sc_dev.dv_xname); 2006 return (1); 2007 } 2008 if (j & EEPROM_TST_MODE) { 2009 /* XXX PnP mode? */ 2010 printf("\n%s: erase pencil mark!\n", sc->sc_dev.dv_xname); 2011 return (1); 2012 } 2013 return (0); 2014 } 2015 2016 u_int16_t 2017 ep_read_eeprom(sc, offset) 2018 struct ep_softc *sc; 2019 u_int16_t offset; 2020 { 2021 u_int16_t readcmd; 2022 2023 /* 2024 * RoadRunner has a larger EEPROM, so a different read command 2025 * is required. 2026 */ 2027 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) 2028 readcmd = READ_EEPROM_RR; 2029 else 2030 readcmd = READ_EEPROM; 2031 2032 if (epbusyeeprom(sc)) 2033 return (0); /* XXX why is eeprom busy? */ 2034 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W0_EEPROM_COMMAND, 2035 readcmd | offset); 2036 if (epbusyeeprom(sc)) 2037 return (0); /* XXX why is eeprom busy? */ 2038 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W0_EEPROM_DATA)); 2039 } 2040 2041 void 2042 epmbuffill(v) 2043 void *v; 2044 { 2045 struct ep_softc *sc = v; 2046 struct mbuf *m; 2047 int s, i; 2048 2049 s = splnet(); 2050 i = sc->last_mb; 2051 do { 2052 if (sc->mb[i] == 0) { 2053 MGET(m, M_DONTWAIT, MT_DATA); 2054 if (m == 0) 2055 break; 2056 sc->mb[i] = m; 2057 } 2058 i = (i + 1) % MAX_MBS; 2059 } while (i != sc->next_mb); 2060 sc->last_mb = i; 2061 /* If the queue was not filled, try again. */ 2062 if (sc->last_mb != sc->next_mb) 2063 timeout(epmbuffill, sc, 1); 2064 splx(s); 2065 } 2066 2067 void 2068 epmbufempty(sc) 2069 struct ep_softc *sc; 2070 { 2071 int s, i; 2072 2073 s = splnet(); 2074 for (i = 0; i<MAX_MBS; i++) { 2075 if (sc->mb[i]) { 2076 m_freem(sc->mb[i]); 2077 sc->mb[i] = NULL; 2078 } 2079 } 2080 sc->last_mb = sc->next_mb = 0; 2081 untimeout(epmbuffill, sc); 2082 splx(s); 2083 } 2084 2085 int 2086 epenable(sc) 2087 struct ep_softc *sc; 2088 { 2089 2090 if (sc->enabled == 0 && sc->enable != NULL) { 2091 if ((*sc->enable)(sc) != 0) { 2092 printf("%s: device enable failed\n", 2093 sc->sc_dev.dv_xname); 2094 return (EIO); 2095 } 2096 } 2097 2098 sc->enabled = 1; 2099 return (0); 2100 } 2101 2102 void 2103 epdisable(sc) 2104 struct ep_softc *sc; 2105 { 2106 2107 if (sc->enabled != 0 && sc->disable != NULL) { 2108 (*sc->disable)(sc); 2109 sc->enabled = 0; 2110 } 2111 } 2112 2113 /* 2114 * ep_activate: 2115 * 2116 * Handle device activation/deactivation requests. 2117 */ 2118 int 2119 ep_activate(self, act) 2120 struct device *self; 2121 enum devact act; 2122 { 2123 struct ep_softc *sc = (struct ep_softc *)self; 2124 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2125 int error = 0, s; 2126 2127 s = splnet(); 2128 switch (act) { 2129 case DVACT_ACTIVATE: 2130 error = EOPNOTSUPP; 2131 break; 2132 2133 case DVACT_DEACTIVATE: 2134 if (sc->ep_flags & ELINK_FLAGS_MII) 2135 mii_activate(&sc->sc_mii, act, MII_PHY_ANY, 2136 MII_OFFSET_ANY); 2137 if_deactivate(ifp); 2138 break; 2139 } 2140 splx(s); 2141 return (error); 2142 } 2143 2144 /* 2145 * ep_detach: 2146 * 2147 * Detach a elink3 interface. 2148 */ 2149 int 2150 ep_detach(self, flags) 2151 struct device *self; 2152 int flags; 2153 { 2154 struct ep_softc *sc = (struct ep_softc *)self; 2155 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2156 2157 epdisable(sc); 2158 2159 untimeout(ep_tick, sc); 2160 untimeout(epmbuffill, sc); 2161 2162 if (sc->ep_flags & ELINK_FLAGS_MII) { 2163 /* Detach all PHYs */ 2164 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 2165 } 2166 2167 /* Delete all remaining media. */ 2168 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 2169 2170 #if NRND > 0 2171 rnd_detach_source(&sc->rnd_source); 2172 #endif 2173 #if NBPFILTER > 0 2174 bpfdetach(ifp); 2175 #endif 2176 ether_ifdetach(ifp); 2177 if_detach(ifp); 2178 2179 shutdownhook_disestablish(sc->sd_hook); 2180 2181 return (0); 2182 } 2183 2184 u_int32_t 2185 ep_mii_bitbang_read(self) 2186 struct device *self; 2187 { 2188 struct ep_softc *sc = (void *) self; 2189 2190 /* We're already in Window 4. */ 2191 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 2192 ELINK_W4_BOOM_PHYSMGMT)); 2193 } 2194 2195 void 2196 ep_mii_bitbang_write(self, val) 2197 struct device *self; 2198 u_int32_t val; 2199 { 2200 struct ep_softc *sc = (void *) self; 2201 2202 /* We're already in Window 4. */ 2203 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 2204 ELINK_W4_BOOM_PHYSMGMT, val); 2205 } 2206 2207 int 2208 ep_mii_readreg(self, phy, reg) 2209 struct device *self; 2210 int phy, reg; 2211 { 2212 struct ep_softc *sc = (void *) self; 2213 int val; 2214 2215 GO_WINDOW(4); 2216 2217 val = mii_bitbang_readreg(self, &ep_mii_bitbang_ops, phy, reg); 2218 2219 GO_WINDOW(1); 2220 2221 return (val); 2222 } 2223 2224 void 2225 ep_mii_writereg(self, phy, reg, val) 2226 struct device *self; 2227 int phy, reg, val; 2228 { 2229 struct ep_softc *sc = (void *) self; 2230 2231 GO_WINDOW(4); 2232 2233 mii_bitbang_writereg(self, &ep_mii_bitbang_ops, phy, reg, val); 2234 2235 GO_WINDOW(1); 2236 } 2237 2238 void 2239 ep_statchg(self) 2240 struct device *self; 2241 { 2242 struct ep_softc *sc = (struct ep_softc *)self; 2243 bus_space_tag_t iot = sc->sc_iot; 2244 bus_space_handle_t ioh = sc->sc_ioh; 2245 int mctl; 2246 2247 /* XXX Update ifp->if_baudrate */ 2248 2249 GO_WINDOW(3); 2250 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 2251 if (sc->sc_mii.mii_media_active & IFM_FDX) 2252 mctl |= MAC_CONTROL_FDX; 2253 else 2254 mctl &= ~MAC_CONTROL_FDX; 2255 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 2256 GO_WINDOW(1); /* back to operating window */ 2257 } 2258
Indexes created Mon Sep 29 21:09:56 GMT 2025