elink3.c revision 1.78
1 /* $NetBSD: elink3.c,v 1.78 2000/03/23 07:01:30 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1996, 1997 Jonathan Stone <jonathan (at) NetBSD.org> 42 * Copyright (c) 1994 Herb Peyerl <hpeyerl (at) beer.org> 43 * All rights reserved. 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice, this list of conditions and the following disclaimer. 50 * 2. Redistributions in binary form must reproduce the above copyright 51 * notice, this list of conditions and the following disclaimer in the 52 * documentation and/or other materials provided with the distribution. 53 * 3. All advertising materials mentioning features or use of this software 54 * must display the following acknowledgement: 55 * This product includes software developed by Herb Peyerl. 56 * 4. The name of Herb Peyerl may not be used to endorse or promote products 57 * derived from this software without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 60 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 61 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 62 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 63 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 64 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 65 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 66 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 67 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 68 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 #include "opt_inet.h" 72 #include "opt_ns.h" 73 #include "bpfilter.h" 74 #include "rnd.h" 75 76 #include <sys/param.h> 77 #include <sys/systm.h> 78 #include <sys/callout.h> 79 #include <sys/kernel.h> 80 #include <sys/mbuf.h> 81 #include <sys/socket.h> 82 #include <sys/ioctl.h> 83 #include <sys/errno.h> 84 #include <sys/syslog.h> 85 #include <sys/select.h> 86 #include <sys/device.h> 87 #if NRND > 0 88 #include <sys/rnd.h> 89 #endif 90 91 #include <net/if.h> 92 #include <net/if_dl.h> 93 #include <net/if_ether.h> 94 #include <net/if_media.h> 95 96 #ifdef INET 97 #include <netinet/in.h> 98 #include <netinet/in_systm.h> 99 #include <netinet/in_var.h> 100 #include <netinet/ip.h> 101 #include <netinet/if_inarp.h> 102 #endif 103 104 #ifdef NS 105 #include <netns/ns.h> 106 #include <netns/ns_if.h> 107 #endif 108 109 #if NBPFILTER > 0 110 #include <net/bpf.h> 111 #include <net/bpfdesc.h> 112 #endif 113 114 #include <machine/cpu.h> 115 #include <machine/bus.h> 116 #include <machine/intr.h> 117 118 #include <dev/mii/mii.h> 119 #include <dev/mii/miivar.h> 120 #include <dev/mii/mii_bitbang.h> 121 122 #include <dev/ic/elink3var.h> 123 #include <dev/ic/elink3reg.h> 124 125 #ifdef DEBUG 126 int epdebug = 0; 127 #endif 128 129 /* 130 * XXX endian workaround for big-endian CPUs with pcmcia: 131 * if stream methods for bus_space_multi are not provided, define them 132 * using non-stream bus_space_{read,write}_multi_. 133 * Assumes host CPU is same endian-ness as bus. 134 */ 135 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 136 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 137 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 138 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 139 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 140 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 141 142 /* 143 * Structure to map media-present bits in boards to ifmedia codes and 144 * printable media names. Used for table-driven ifmedia initialization. 145 */ 146 struct ep_media { 147 int epm_mpbit; /* media present bit */ 148 const char *epm_name; /* name of medium */ 149 int epm_ifmedia; /* ifmedia word for medium */ 150 int epm_epmedia; /* ELINKMEDIA_* constant */ 151 }; 152 153 /* 154 * Media table for the Demon/Vortex/Boomerang chipsets. 155 * 156 * Note that MII on the Demon and Vortex (3c59x) indicates an external 157 * MII connector (for connecting an external PHY) ... I think. Treat 158 * it as `manual' on these chips. 159 * 160 * Any Boomerang (3c90x) chips with MII really do have an internal 161 * MII and real PHYs attached; no `native' media. 162 */ 163 struct ep_media ep_vortex_media[] = { 164 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 165 ELINKMEDIA_10BASE_T }, 166 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 167 ELINKMEDIA_10BASE_T }, 168 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 169 ELINKMEDIA_AUI }, 170 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 171 ELINKMEDIA_10BASE_2 }, 172 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 173 ELINKMEDIA_100BASE_TX }, 174 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 175 ELINKMEDIA_100BASE_TX }, 176 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 177 ELINKMEDIA_100BASE_FX }, 178 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 179 ELINKMEDIA_MII }, 180 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 181 ELINKMEDIA_100BASE_T4 }, 182 { 0, NULL, 0, 183 0 }, 184 }; 185 186 /* 187 * Media table for the older 3Com Etherlink III chipset, used 188 * in the 3c509, 3c579, and 3c589. 189 */ 190 struct ep_media ep_509_media[] = { 191 { ELINK_W0_CC_UTP, "10baseT", IFM_ETHER|IFM_10_T, 192 ELINKMEDIA_10BASE_T }, 193 { ELINK_W0_CC_AUI, "10base5", IFM_ETHER|IFM_10_5, 194 ELINKMEDIA_AUI }, 195 { ELINK_W0_CC_BNC, "10base2", IFM_ETHER|IFM_10_2, 196 ELINKMEDIA_10BASE_2 }, 197 { 0, NULL, 0, 198 0 }, 199 }; 200 201 void ep_internalconfig __P((struct ep_softc *sc)); 202 void ep_vortex_probemedia __P((struct ep_softc *sc)); 203 void ep_509_probemedia __P((struct ep_softc *sc)); 204 205 static void eptxstat __P((struct ep_softc *)); 206 static int epstatus __P((struct ep_softc *)); 207 void epinit __P((struct ep_softc *)); 208 int epioctl __P((struct ifnet *, u_long, caddr_t)); 209 void epstart __P((struct ifnet *)); 210 void epwatchdog __P((struct ifnet *)); 211 void epreset __P((struct ep_softc *)); 212 static void epshutdown __P((void *)); 213 void epread __P((struct ep_softc *)); 214 struct mbuf *epget __P((struct ep_softc *, int)); 215 void epmbuffill __P((void *)); 216 void epmbufempty __P((struct ep_softc *)); 217 void epsetfilter __P((struct ep_softc *)); 218 void ep_roadrunner_mii_enable __P((struct ep_softc *)); 219 void epsetmedia __P((struct ep_softc *)); 220 221 /* ifmedia callbacks */ 222 int ep_media_change __P((struct ifnet *ifp)); 223 void ep_media_status __P((struct ifnet *ifp, struct ifmediareq *req)); 224 225 /* MII callbacks */ 226 int ep_mii_readreg __P((struct device *, int, int)); 227 void ep_mii_writereg __P((struct device *, int, int, int)); 228 void ep_statchg __P((struct device *)); 229 230 void ep_tick __P((void *)); 231 232 static int epbusyeeprom __P((struct ep_softc *)); 233 u_int16_t ep_read_eeprom __P((struct ep_softc *, u_int16_t)); 234 static inline void ep_reset_cmd __P((struct ep_softc *sc, 235 u_int cmd, u_int arg)); 236 static inline void ep_finish_reset __P((bus_space_tag_t, bus_space_handle_t)); 237 static inline void ep_discard_rxtop __P((bus_space_tag_t, bus_space_handle_t)); 238 static __inline int ep_w1_reg __P((struct ep_softc *, int)); 239 240 /* 241 * MII bit-bang glue. 242 */ 243 u_int32_t ep_mii_bitbang_read __P((struct device *)); 244 void ep_mii_bitbang_write __P((struct device *, u_int32_t)); 245 246 const struct mii_bitbang_ops ep_mii_bitbang_ops = { 247 ep_mii_bitbang_read, 248 ep_mii_bitbang_write, 249 { 250 PHYSMGMT_DATA, /* MII_BIT_MDO */ 251 PHYSMGMT_DATA, /* MII_BIT_MDI */ 252 PHYSMGMT_CLK, /* MII_BIT_MDC */ 253 PHYSMGMT_DIR, /* MII_BIT_DIR_HOST_PHY */ 254 0, /* MII_BIT_DIR_PHY_HOST */ 255 } 256 }; 257 258 /* 259 * Some chips (3c515 [Corkscrew] and 3c574 [RoadRunner]) have 260 * Window 1 registers offset! 261 */ 262 static __inline int 263 ep_w1_reg(sc, reg) 264 struct ep_softc *sc; 265 int reg; 266 { 267 268 switch (sc->ep_chipset) { 269 case ELINK_CHIPSET_CORKSCREW: 270 return (reg + 0x10); 271 272 case ELINK_CHIPSET_ROADRUNNER: 273 switch (reg) { 274 case ELINK_W1_FREE_TX: 275 case ELINK_W1_RUNNER_RDCTL: 276 case ELINK_W1_RUNNER_WRCTL: 277 return (reg); 278 } 279 return (reg + 0x10); 280 } 281 282 return (reg); 283 } 284 285 /* 286 * Wait for any pending reset to complete. 287 * On newer hardware we could poll SC_COMMAND_IN_PROGRESS, 288 * but older hardware doesn't implement it and we must delay. 289 */ 290 static inline void 291 ep_finish_reset(iot, ioh) 292 bus_space_tag_t iot; 293 bus_space_handle_t ioh; 294 { 295 int i; 296 297 for (i = 0; i < 10000; i++) { 298 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 299 S_COMMAND_IN_PROGRESS) == 0) 300 break; 301 DELAY(10); 302 } 303 } 304 305 /* 306 * Issue a (reset) command, and be sure it has completed. 307 * Used for global reset, TX_RESET, RX_RESET. 308 */ 309 static inline void 310 ep_reset_cmd(sc, cmd, arg) 311 struct ep_softc *sc; 312 u_int cmd, arg; 313 { 314 register bus_space_tag_t iot = sc->sc_iot; 315 register bus_space_handle_t ioh = sc->sc_ioh; 316 317 bus_space_write_2(iot, ioh, cmd, arg); 318 ep_finish_reset(iot, ioh); 319 } 320 321 322 static inline void 323 ep_discard_rxtop(iot, ioh) 324 register bus_space_tag_t iot; 325 register bus_space_handle_t ioh; 326 { 327 int i; 328 329 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISCARD_TOP_PACK); 330 331 /* 332 * Spin for about 1 msec, to avoid forcing a DELAY() between 333 * every received packet (adding latency and limiting pkt-recv rate). 334 * On PCI, at 4 30-nsec PCI bus cycles for a read, 8000 iterations 335 * is about right. 336 */ 337 for (i = 0; i < 8000; i++) { 338 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 339 S_COMMAND_IN_PROGRESS) == 0) 340 return; 341 } 342 343 /* Didn't complete in a hurry. Do DELAY()s. */ 344 ep_finish_reset(iot, ioh); 345 } 346 347 /* 348 * Back-end attach and configure. 349 */ 350 int 351 epconfig(sc, chipset, enaddr) 352 struct ep_softc *sc; 353 u_short chipset; 354 u_int8_t *enaddr; 355 { 356 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 357 bus_space_tag_t iot = sc->sc_iot; 358 bus_space_handle_t ioh = sc->sc_ioh; 359 u_int16_t i; 360 u_int8_t myla[6]; 361 362 callout_init(&sc->sc_mii_callout); 363 callout_init(&sc->sc_mbuf_callout); 364 365 sc->ep_chipset = chipset; 366 367 /* 368 * We could have been groveling around in other register 369 * windows in the front-end; make sure we're in window 0 370 * to read the EEPROM. 371 */ 372 GO_WINDOW(0); 373 374 if (enaddr == NULL) { 375 /* 376 * Read the station address from the eeprom. 377 */ 378 for (i = 0; i < 3; i++) { 379 u_int16_t x = ep_read_eeprom(sc, i); 380 myla[(i << 1)] = x >> 8; 381 myla[(i << 1) + 1] = x; 382 } 383 enaddr = myla; 384 } 385 386 /* 387 * Vortex-based (3c59x pci,eisa) and Boomerang (3c900) cards 388 * allow FDDI-sized (4500) byte packets. Commands only take an 389 * 11-bit parameter, and 11 bits isn't enough to hold a full-size 390 * packet length. 391 * Commands to these cards implicitly upshift a packet size 392 * or threshold by 2 bits. 393 * To detect cards with large-packet support, we probe by setting 394 * the transmit threshold register, then change windows and 395 * read back the threshold register directly, and see if the 396 * threshold value was shifted or not. 397 */ 398 bus_space_write_2(iot, ioh, ELINK_COMMAND, 399 SET_TX_AVAIL_THRESH | ELINK_LARGEWIN_PROBE); 400 GO_WINDOW(5); 401 i = bus_space_read_2(iot, ioh, ELINK_W5_TX_AVAIL_THRESH); 402 GO_WINDOW(1); 403 switch (i) { 404 case ELINK_LARGEWIN_PROBE: 405 case (ELINK_LARGEWIN_PROBE & ELINK_LARGEWIN_MASK): 406 sc->ep_pktlenshift = 0; 407 break; 408 409 case (ELINK_LARGEWIN_PROBE << 2): 410 sc->ep_pktlenshift = 2; 411 break; 412 413 default: 414 printf("%s: wrote 0x%x to TX_AVAIL_THRESH, read back 0x%x. " 415 "Interface disabled\n", 416 sc->sc_dev.dv_xname, ELINK_LARGEWIN_PROBE, (int) i); 417 return (1); 418 } 419 420 /* 421 * Ensure Tx-available interrupts are enabled for 422 * start the interface. 423 * XXX should be in epinit()? 424 */ 425 bus_space_write_2(iot, ioh, ELINK_COMMAND, 426 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 427 428 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 429 ifp->if_softc = sc; 430 ifp->if_start = epstart; 431 ifp->if_ioctl = epioctl; 432 ifp->if_watchdog = epwatchdog; 433 ifp->if_flags = 434 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 435 436 if_attach(ifp); 437 ether_ifattach(ifp, enaddr); 438 439 /* 440 * Finish configuration: 441 * determine chipset if the front-end couldn't do so, 442 * show board details, set media. 443 */ 444 445 /* 446 * Print RAM size. We also print the Ethernet address in here. 447 * It's extracted from the ifp, so we have to make sure it's 448 * been attached first. 449 */ 450 ep_internalconfig(sc); 451 GO_WINDOW(0); 452 453 /* 454 * Display some additional information, if pertinent. 455 */ 456 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 457 printf("%s: RoadRunner FIFO buffer enabled\n", 458 sc->sc_dev.dv_xname); 459 460 /* 461 * Initialize our media structures and MII info. We'll 462 * probe the MII if we discover that we have one. 463 */ 464 sc->sc_mii.mii_ifp = ifp; 465 sc->sc_mii.mii_readreg = ep_mii_readreg; 466 sc->sc_mii.mii_writereg = ep_mii_writereg; 467 sc->sc_mii.mii_statchg = ep_statchg; 468 ifmedia_init(&sc->sc_mii.mii_media, 0, ep_media_change, 469 ep_media_status); 470 471 /* 472 * Now, determine which media we have. 473 */ 474 switch (sc->ep_chipset) { 475 case ELINK_CHIPSET_ROADRUNNER: 476 if (sc->ep_flags & ELINK_FLAGS_MII) { 477 ep_roadrunner_mii_enable(sc); 478 GO_WINDOW(0); 479 } 480 /* FALLTHROUGH */ 481 482 case ELINK_CHIPSET_BOOMERANG: 483 /* 484 * If the device has MII, probe it. We won't be using 485 * any `native' media in this case, only PHYs. If 486 * we don't, just treat the Boomerang like the Vortex. 487 */ 488 if (sc->ep_flags & ELINK_FLAGS_MII) { 489 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 490 MII_PHY_ANY, MII_OFFSET_ANY, 0); 491 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 492 ifmedia_add(&sc->sc_mii.mii_media, 493 IFM_ETHER|IFM_NONE, 0, NULL); 494 ifmedia_set(&sc->sc_mii.mii_media, 495 IFM_ETHER|IFM_NONE); 496 } else { 497 ifmedia_set(&sc->sc_mii.mii_media, 498 IFM_ETHER|IFM_AUTO); 499 } 500 break; 501 } 502 /* FALLTHROUGH */ 503 504 case ELINK_CHIPSET_VORTEX: 505 ep_vortex_probemedia(sc); 506 break; 507 508 default: 509 ep_509_probemedia(sc); 510 break; 511 } 512 513 GO_WINDOW(1); /* Window 1 is operating window */ 514 515 #if NBPFILTER > 0 516 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 517 #endif 518 519 #if NRND > 0 520 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 521 RND_TYPE_NET, 0); 522 #endif 523 524 sc->tx_start_thresh = 20; /* probably a good starting point. */ 525 526 /* Establish callback to reset card when we reboot. */ 527 sc->sd_hook = shutdownhook_establish(epshutdown, sc); 528 529 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 530 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 531 return (0); 532 } 533 534 535 /* 536 * Show interface-model-independent info from window 3 537 * internal-configuration register. 538 */ 539 void 540 ep_internalconfig(sc) 541 struct ep_softc *sc; 542 { 543 bus_space_tag_t iot = sc->sc_iot; 544 bus_space_handle_t ioh = sc->sc_ioh; 545 546 u_int config0; 547 u_int config1; 548 549 int ram_size, ram_width, ram_speed, rom_size, ram_split; 550 /* 551 * NVRAM buffer Rx:Tx config names for busmastering cards 552 * (Demon, Vortex, and later). 553 */ 554 const char *onboard_ram_config[] = { 555 "5:3", "3:1", "1:1", "3:5" }; 556 557 GO_WINDOW(3); 558 config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 559 config1 = (u_int)bus_space_read_2(iot, ioh, 560 ELINK_W3_INTERNAL_CONFIG + 2); 561 GO_WINDOW(0); 562 563 ram_size = (config0 & CONFIG_RAMSIZE) >> CONFIG_RAMSIZE_SHIFT; 564 ram_width = (config0 & CONFIG_RAMWIDTH) >> CONFIG_RAMWIDTH_SHIFT; 565 ram_speed = (config0 & CONFIG_RAMSPEED) >> CONFIG_RAMSPEED_SHIFT; 566 rom_size = (config0 & CONFIG_ROMSIZE) >> CONFIG_ROMSIZE_SHIFT; 567 568 ram_split = (config1 & CONFIG_RAMSPLIT) >> CONFIG_RAMSPLIT_SHIFT; 569 570 printf("%s: address %s, %dKB %s-wide FIFO, %s Rx:Tx split\n", 571 sc->sc_dev.dv_xname, 572 ether_sprintf(LLADDR(sc->sc_ethercom.ec_if.if_sadl)), 573 8 << ram_size, 574 (ram_width) ? "word" : "byte", 575 onboard_ram_config[ram_split]); 576 } 577 578 579 /* 580 * Find supported media on 3c509-generation hardware that doesn't have 581 * a "reset_options" register in window 3. 582 * Use the config_cntrl register in window 0 instead. 583 * Used on original, 10Mbit ISA (3c509), 3c509B, and pre-Demon EISA cards 584 * that implement CONFIG_CTRL. We don't have a good way to set the 585 * default active mediuim; punt to ifconfig instead. 586 */ 587 void 588 ep_509_probemedia(sc) 589 struct ep_softc *sc; 590 { 591 bus_space_tag_t iot = sc->sc_iot; 592 bus_space_handle_t ioh = sc->sc_ioh; 593 struct ifmedia *ifm = &sc->sc_mii.mii_media; 594 u_int16_t ep_w0_config, port; 595 struct ep_media *epm; 596 const char *sep = "", *defmedianame = NULL; 597 int defmedia = 0; 598 599 GO_WINDOW(0); 600 ep_w0_config = bus_space_read_2(iot, ioh, ELINK_W0_CONFIG_CTRL); 601 602 printf("%s: ", sc->sc_dev.dv_xname); 603 604 /* Sanity check that there are any media! */ 605 if ((ep_w0_config & ELINK_W0_CC_MEDIAMASK) == 0) { 606 printf("no media present!\n"); 607 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 608 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 609 return; 610 } 611 612 /* 613 * Get the default media from the EEPROM. 614 */ 615 port = ep_read_eeprom(sc, EEPROM_ADDR_CFG) >> 14; 616 617 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 618 619 for (epm = ep_509_media; epm->epm_name != NULL; epm++) { 620 if (ep_w0_config & epm->epm_mpbit) { 621 /* 622 * This simple test works because 509 chipsets 623 * don't do full-duplex. 624 */ 625 if (epm->epm_epmedia == port || defmedia == 0) { 626 defmedia = epm->epm_ifmedia; 627 defmedianame = epm->epm_name; 628 } 629 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 630 NULL); 631 PRINT(epm->epm_name); 632 } 633 } 634 635 #undef PRINT 636 637 #ifdef DIAGNOSTIC 638 if (defmedia == 0) 639 panic("ep_509_probemedia: impossible"); 640 #endif 641 642 printf(" (default %s)\n", defmedianame); 643 ifmedia_set(ifm, defmedia); 644 } 645 646 /* 647 * Find media present on large-packet-capable elink3 devices. 648 * Show onboard configuration of large-packet-capable elink3 devices 649 * (Demon, Vortex, Boomerang), which do not implement CONFIG_CTRL in window 0. 650 * Use media and card-version info in window 3 instead. 651 */ 652 void 653 ep_vortex_probemedia(sc) 654 struct ep_softc *sc; 655 { 656 bus_space_tag_t iot = sc->sc_iot; 657 bus_space_handle_t ioh = sc->sc_ioh; 658 struct ifmedia *ifm = &sc->sc_mii.mii_media; 659 struct ep_media *epm; 660 u_int config1; 661 int reset_options; 662 int default_media; /* 3-bit encoding of default (EEPROM) media */ 663 int defmedia = 0; 664 const char *sep = "", *defmedianame = NULL; 665 666 GO_WINDOW(3); 667 config1 = (u_int)bus_space_read_2(iot, ioh, 668 ELINK_W3_INTERNAL_CONFIG + 2); 669 reset_options = (int)bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 670 GO_WINDOW(0); 671 672 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 673 674 printf("%s: ", sc->sc_dev.dv_xname); 675 676 /* Sanity check that there are any media! */ 677 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 678 printf("no media present!\n"); 679 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 680 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 681 return; 682 } 683 684 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 685 686 for (epm = ep_vortex_media; epm->epm_name != NULL; epm++) { 687 if (reset_options & epm->epm_mpbit) { 688 /* 689 * Default media is a little more complicated 690 * on the Vortex. We support full-duplex which 691 * uses the same reset options bit. 692 * 693 * XXX Check EEPROM for default to FDX? 694 */ 695 if (epm->epm_epmedia == default_media) { 696 if ((epm->epm_ifmedia & IFM_FDX) == 0) { 697 defmedia = epm->epm_ifmedia; 698 defmedianame = epm->epm_name; 699 } 700 } else if (defmedia == 0) { 701 defmedia = epm->epm_ifmedia; 702 defmedianame = epm->epm_name; 703 } 704 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 705 NULL); 706 PRINT(epm->epm_name); 707 } 708 } 709 710 #undef PRINT 711 712 #ifdef DIAGNOSTIC 713 if (defmedia == 0) 714 panic("ep_vortex_probemedia: impossible"); 715 #endif 716 717 printf(" (default %s)\n", defmedianame); 718 ifmedia_set(ifm, defmedia); 719 } 720 721 /* 722 * One second timer, used to tick the MII. 723 */ 724 void 725 ep_tick(arg) 726 void *arg; 727 { 728 struct ep_softc *sc = arg; 729 int s; 730 731 #ifdef DIAGNOSTIC 732 if ((sc->ep_flags & ELINK_FLAGS_MII) == 0) 733 panic("ep_tick"); 734 #endif 735 736 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 737 return; 738 739 s = splnet(); 740 mii_tick(&sc->sc_mii); 741 splx(s); 742 743 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 744 } 745 746 /* 747 * Bring device up. 748 * 749 * The order in here seems important. Otherwise we may not receive 750 * interrupts. ?! 751 */ 752 void 753 epinit(sc) 754 register struct ep_softc *sc; 755 { 756 register struct ifnet *ifp = &sc->sc_ethercom.ec_if; 757 bus_space_tag_t iot = sc->sc_iot; 758 bus_space_handle_t ioh = sc->sc_ioh; 759 int i; 760 761 /* Make sure any pending reset has completed before touching board. */ 762 ep_finish_reset(iot, ioh); 763 764 /* 765 * Cance any pending I/O. 766 */ 767 epstop(sc); 768 769 if (sc->bustype != ELINK_BUS_PCI) { 770 GO_WINDOW(0); 771 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 0); 772 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 773 ENABLE_DRQ_IRQ); 774 } 775 776 if (sc->bustype == ELINK_BUS_PCMCIA) { 777 bus_space_write_2(iot, ioh, ELINK_W0_RESOURCE_CFG, 0x3f00); 778 } 779 780 GO_WINDOW(2); 781 for (i = 0; i < 6; i++) /* Reload the ether_addr. */ 782 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 783 LLADDR(ifp->if_sadl)[i]); 784 785 /* 786 * Reset the station-address receive filter. 787 * A bug workaround for busmastering (Vortex, Demon) cards. 788 */ 789 for (i = 0; i < 6; i++) 790 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 791 792 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 793 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 794 795 GO_WINDOW(1); /* Window 1 is operating window */ 796 for (i = 0; i < 31; i++) 797 bus_space_read_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS)); 798 799 /* Set threshhold for for Tx-space avaiable interrupt. */ 800 bus_space_write_2(iot, ioh, ELINK_COMMAND, 801 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 802 803 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 804 /* 805 * Enable options in the PCMCIA LAN COR register, via 806 * RoadRunner Window 1. 807 * 808 * XXX MAGIC CONSTANTS! 809 */ 810 u_int16_t cor; 811 812 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, (1 << 11)); 813 814 cor = bus_space_read_2(iot, ioh, 0) & ~0x30; 815 if (sc->ep_flags & ELINK_FLAGS_USESHAREDMEM) 816 cor |= 0x10; 817 if (sc->ep_flags & ELINK_FLAGS_FORCENOWAIT) 818 cor |= 0x20; 819 bus_space_write_2(iot, ioh, 0, cor); 820 821 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 822 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 823 824 if (sc->ep_flags & ELINK_FLAGS_MII) { 825 ep_roadrunner_mii_enable(sc); 826 GO_WINDOW(1); 827 } 828 } 829 830 /* Enable interrupts. */ 831 bus_space_write_2(iot, ioh, ELINK_COMMAND, 832 SET_RD_0_MASK | S_CARD_FAILURE | S_RX_COMPLETE | S_TX_COMPLETE | 833 S_TX_AVAIL); 834 bus_space_write_2(iot, ioh, ELINK_COMMAND, 835 SET_INTR_MASK | S_CARD_FAILURE | S_RX_COMPLETE | S_TX_COMPLETE | 836 S_TX_AVAIL); 837 838 /* 839 * Attempt to get rid of any stray interrupts that occured during 840 * configuration. On the i386 this isn't possible because one may 841 * already be queued. However, a single stray interrupt is 842 * unimportant. 843 */ 844 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 845 846 epsetfilter(sc); 847 epsetmedia(sc); 848 849 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 850 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 851 852 epmbuffill(sc); 853 854 /* Interface is now `running', with no output active. */ 855 ifp->if_flags |= IFF_RUNNING; 856 ifp->if_flags &= ~IFF_OACTIVE; 857 858 if (sc->ep_flags & ELINK_FLAGS_MII) { 859 /* Start the one second clock. */ 860 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 861 } 862 863 /* Attempt to start output, if any. */ 864 epstart(ifp); 865 } 866 867 868 /* 869 * Set multicast receive filter. 870 * elink3 hardware has no selective multicast filter in hardware. 871 * Enable reception of all multicasts and filter in software. 872 */ 873 void 874 epsetfilter(sc) 875 register struct ep_softc *sc; 876 { 877 register struct ifnet *ifp = &sc->sc_ethercom.ec_if; 878 879 GO_WINDOW(1); /* Window 1 is operating window */ 880 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 881 SET_RX_FILTER | FIL_INDIVIDUAL | FIL_BRDCST | 882 ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0) | 883 ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0)); 884 } 885 886 int 887 ep_media_change(ifp) 888 struct ifnet *ifp; 889 { 890 register struct ep_softc *sc = ifp->if_softc; 891 892 if (sc->enabled && (ifp->if_flags & IFF_UP) != 0) 893 epreset(sc); 894 895 return (0); 896 } 897 898 /* 899 * Reset and enable the MII on the RoadRunner. 900 */ 901 void 902 ep_roadrunner_mii_enable(sc) 903 struct ep_softc *sc; 904 { 905 bus_space_tag_t iot = sc->sc_iot; 906 bus_space_handle_t ioh = sc->sc_ioh; 907 908 GO_WINDOW(3); 909 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 910 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 911 delay(1000); 912 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 913 ELINK_PCI_100BASE_MII|ELINK_RUNNER_MII_RESET| 914 ELINK_RUNNER_ENABLE_MII); 915 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 916 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 917 delay(1000); 918 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 919 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 920 } 921 922 /* 923 * Set the card to use the specified media. 924 */ 925 void 926 epsetmedia(sc) 927 struct ep_softc *sc; 928 { 929 bus_space_tag_t iot = sc->sc_iot; 930 bus_space_handle_t ioh = sc->sc_ioh; 931 932 /* Turn everything off. First turn off linkbeat and UTP. */ 933 GO_WINDOW(4); 934 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0x0); 935 936 /* Turn off coax */ 937 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 938 delay(1000); 939 940 /* 941 * If the device has MII, select it, and then tell the 942 * PHY which media to use. 943 */ 944 if (sc->ep_flags & ELINK_FLAGS_MII) { 945 int config0, config1; 946 947 GO_WINDOW(3); 948 949 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 950 int resopt; 951 952 resopt = bus_space_read_2(iot, ioh, 953 ELINK_W3_RESET_OPTIONS); 954 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 955 resopt | ELINK_RUNNER_ENABLE_MII); 956 } 957 958 config0 = (u_int)bus_space_read_2(iot, ioh, 959 ELINK_W3_INTERNAL_CONFIG); 960 config1 = (u_int)bus_space_read_2(iot, ioh, 961 ELINK_W3_INTERNAL_CONFIG + 2); 962 963 config1 = config1 & ~CONFIG_MEDIAMASK; 964 config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT); 965 966 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 967 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 968 config1); 969 GO_WINDOW(1); /* back to operating window */ 970 971 mii_mediachg(&sc->sc_mii); 972 return; 973 } 974 975 /* 976 * Now turn on the selected media/transceiver. 977 */ 978 GO_WINDOW(4); 979 switch (IFM_SUBTYPE(sc->sc_mii.mii_media.ifm_cur->ifm_media)) { 980 case IFM_10_T: 981 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 982 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 983 break; 984 985 case IFM_10_2: 986 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 987 DELAY(1000); /* 50ms not enmough? */ 988 break; 989 990 case IFM_100_TX: 991 case IFM_100_FX: 992 case IFM_100_T4: /* XXX check documentation */ 993 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 994 LINKBEAT_ENABLE); 995 DELAY(1000); /* not strictly necessary? */ 996 break; 997 998 case IFM_10_5: 999 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 1000 SQE_ENABLE); 1001 DELAY(1000); /* not strictly necessary? */ 1002 break; 1003 1004 case IFM_MANUAL: 1005 /* 1006 * Nothing to do here; we are actually enabling the 1007 * external PHY on the MII port. 1008 */ 1009 break; 1010 1011 case IFM_NONE: 1012 printf("%s: interface disabled\n", sc->sc_dev.dv_xname); 1013 return; 1014 1015 default: 1016 panic("epsetmedia: impossible"); 1017 } 1018 1019 /* 1020 * Tell the chip which port to use. 1021 */ 1022 switch (sc->ep_chipset) { 1023 case ELINK_CHIPSET_VORTEX: 1024 case ELINK_CHIPSET_BOOMERANG: 1025 { 1026 int mctl, config0, config1; 1027 1028 GO_WINDOW(3); 1029 config0 = (u_int)bus_space_read_2(iot, ioh, 1030 ELINK_W3_INTERNAL_CONFIG); 1031 config1 = (u_int)bus_space_read_2(iot, ioh, 1032 ELINK_W3_INTERNAL_CONFIG + 2); 1033 1034 config1 = config1 & ~CONFIG_MEDIAMASK; 1035 config1 |= (sc->sc_mii.mii_media.ifm_cur->ifm_data << 1036 CONFIG_MEDIAMASK_SHIFT); 1037 1038 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 1039 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 1040 config1); 1041 1042 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1043 if (sc->sc_mii.mii_media.ifm_cur->ifm_media & IFM_FDX) 1044 mctl |= MAC_CONTROL_FDX; 1045 else 1046 mctl &= ~MAC_CONTROL_FDX; 1047 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1048 break; 1049 } 1050 default: 1051 { 1052 int w0_addr_cfg; 1053 1054 GO_WINDOW(0); 1055 w0_addr_cfg = bus_space_read_2(iot, ioh, ELINK_W0_ADDRESS_CFG); 1056 w0_addr_cfg &= 0x3fff; 1057 bus_space_write_2(iot, ioh, ELINK_W0_ADDRESS_CFG, w0_addr_cfg | 1058 (sc->sc_mii.mii_media.ifm_cur->ifm_data << 14)); 1059 DELAY(1000); 1060 break; 1061 } 1062 } 1063 1064 GO_WINDOW(1); /* Window 1 is operating window */ 1065 } 1066 1067 /* 1068 * Get currently-selected media from card. 1069 * (if_media callback, may be called before interface is brought up). 1070 */ 1071 void 1072 ep_media_status(ifp, req) 1073 struct ifnet *ifp; 1074 struct ifmediareq *req; 1075 { 1076 register struct ep_softc *sc = ifp->if_softc; 1077 bus_space_tag_t iot = sc->sc_iot; 1078 bus_space_handle_t ioh = sc->sc_ioh; 1079 1080 if (sc->enabled == 0) { 1081 req->ifm_active = IFM_ETHER|IFM_NONE; 1082 req->ifm_status = 0; 1083 return; 1084 } 1085 1086 /* 1087 * If we have MII, go ask the PHY what's going on. 1088 */ 1089 if (sc->ep_flags & ELINK_FLAGS_MII) { 1090 mii_pollstat(&sc->sc_mii); 1091 req->ifm_active = sc->sc_mii.mii_media_active; 1092 req->ifm_status = sc->sc_mii.mii_media_status; 1093 return; 1094 } 1095 1096 /* 1097 * Ok, at this point we claim that our active media is 1098 * the currently selected media. We'll update our status 1099 * if our chipset allows us to detect link. 1100 */ 1101 req->ifm_active = sc->sc_mii.mii_media.ifm_cur->ifm_media; 1102 req->ifm_status = 0; 1103 1104 switch (sc->ep_chipset) { 1105 case ELINK_CHIPSET_VORTEX: 1106 case ELINK_CHIPSET_BOOMERANG: 1107 GO_WINDOW(4); 1108 req->ifm_status = IFM_AVALID; 1109 if (bus_space_read_2(iot, ioh, ELINK_W4_MEDIA_TYPE) & 1110 LINKBEAT_DETECT) 1111 req->ifm_status |= IFM_ACTIVE; 1112 GO_WINDOW(1); /* back to operating window */ 1113 break; 1114 } 1115 } 1116 1117 1118 1119 /* 1120 * Start outputting on the interface. 1121 * Always called as splnet(). 1122 */ 1123 void 1124 epstart(ifp) 1125 struct ifnet *ifp; 1126 { 1127 register struct ep_softc *sc = ifp->if_softc; 1128 bus_space_tag_t iot = sc->sc_iot; 1129 bus_space_handle_t ioh = sc->sc_ioh; 1130 struct mbuf *m, *m0; 1131 int sh, len, pad; 1132 bus_addr_t txreg; 1133 1134 /* Don't transmit if interface is busy or not running */ 1135 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1136 return; 1137 1138 startagain: 1139 /* Sneak a peek at the next packet */ 1140 m0 = ifp->if_snd.ifq_head; 1141 if (m0 == 0) 1142 return; 1143 1144 /* We need to use m->m_pkthdr.len, so require the header */ 1145 if ((m0->m_flags & M_PKTHDR) == 0) 1146 panic("epstart: no header mbuf"); 1147 len = m0->m_pkthdr.len; 1148 1149 pad = (4 - len) & 3; 1150 1151 /* 1152 * The 3c509 automatically pads short packets to minimum ethernet 1153 * length, but we drop packets that are too large. Perhaps we should 1154 * truncate them instead? 1155 */ 1156 if (len + pad > ETHER_MAX_LEN) { 1157 /* packet is obviously too large: toss it */ 1158 ++ifp->if_oerrors; 1159 IF_DEQUEUE(&ifp->if_snd, m0); 1160 m_freem(m0); 1161 goto readcheck; 1162 } 1163 1164 if (bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_FREE_TX)) < 1165 len + pad + 4) { 1166 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1167 SET_TX_AVAIL_THRESH | 1168 ((len + pad + 4) >> sc->ep_pktlenshift)); 1169 /* not enough room in FIFO */ 1170 ifp->if_flags |= IFF_OACTIVE; 1171 return; 1172 } else { 1173 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1174 SET_TX_AVAIL_THRESH | ELINK_THRESH_DISABLE); 1175 } 1176 1177 IF_DEQUEUE(&ifp->if_snd, m0); 1178 if (m0 == 0) /* not really needed */ 1179 return; 1180 1181 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_TX_START_THRESH | 1182 ((len / 4 + sc->tx_start_thresh) /* >> sc->ep_pktlenshift*/)); 1183 1184 #if NBPFILTER > 0 1185 if (ifp->if_bpf) 1186 bpf_mtap(ifp->if_bpf, m0); 1187 #endif 1188 1189 /* 1190 * Do the output at splhigh() so that an interrupt from another device 1191 * won't cause a FIFO underrun. 1192 */ 1193 sh = splhigh(); 1194 1195 txreg = ep_w1_reg(sc, ELINK_W1_TX_PIO_WR_1); 1196 1197 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1198 /* 1199 * Prime the FIFO buffer counter (number of 16-bit 1200 * words about to be written to the FIFO). 1201 * 1202 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1203 * COUNTER IS NON-ZERO! 1204 */ 1205 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 1206 (len + pad) >> 1); 1207 } 1208 1209 bus_space_write_2(iot, ioh, txreg, len); 1210 bus_space_write_2(iot, ioh, txreg, 0xffff); /* Second is meaningless */ 1211 if (ELINK_IS_BUS_32(sc->bustype)) { 1212 for (m = m0; m;) { 1213 if (m->m_len > 3) { 1214 /* align our reads from core */ 1215 if (mtod(m, u_long) & 3) { 1216 u_long count = 1217 4 - (mtod(m, u_long) & 3); 1218 bus_space_write_multi_1(iot, ioh, 1219 txreg, mtod(m, u_int8_t *), count); 1220 m->m_data = 1221 (void *)(mtod(m, u_long) + count); 1222 m->m_len -= count; 1223 } 1224 bus_space_write_multi_stream_4(iot, ioh, 1225 txreg, mtod(m, u_int32_t *), m->m_len >> 2); 1226 m->m_data = (void *)(mtod(m, u_long) + 1227 (u_long)(m->m_len & ~3)); 1228 m->m_len -= m->m_len & ~3; 1229 } 1230 if (m->m_len) { 1231 bus_space_write_multi_1(iot, ioh, 1232 txreg, mtod(m, u_int8_t *), m->m_len); 1233 } 1234 MFREE(m, m0); 1235 m = m0; 1236 } 1237 } else { 1238 for (m = m0; m;) { 1239 if (m->m_len > 1) { 1240 if (mtod(m, u_long) & 1) { 1241 bus_space_write_1(iot, ioh, 1242 txreg, *(mtod(m, u_int8_t *))); 1243 m->m_data = 1244 (void *)(mtod(m, u_long) + 1); 1245 m->m_len -= 1; 1246 } 1247 bus_space_write_multi_stream_2(iot, ioh, 1248 txreg, mtod(m, u_int16_t *), 1249 m->m_len >> 1); 1250 } 1251 if (m->m_len & 1) { 1252 bus_space_write_1(iot, ioh, txreg, 1253 *(mtod(m, u_int8_t *) + m->m_len - 1)); 1254 } 1255 MFREE(m, m0); 1256 m = m0; 1257 } 1258 } 1259 while (pad--) 1260 bus_space_write_1(iot, ioh, txreg, 0); 1261 1262 splx(sh); 1263 1264 ++ifp->if_opackets; 1265 1266 readcheck: 1267 if ((bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)) & 1268 ERR_INCOMPLETE) == 0) { 1269 /* We received a complete packet. */ 1270 u_int16_t status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1271 1272 if ((status & S_INTR_LATCH) == 0) { 1273 /* 1274 * No interrupt, read the packet and continue 1275 * Is this supposed to happen? Is my motherboard 1276 * completely busted? 1277 */ 1278 epread(sc); 1279 } else { 1280 /* Got an interrupt, return so that it gets serviced. */ 1281 return; 1282 } 1283 } else { 1284 /* Check if we are stuck and reset [see XXX comment] */ 1285 if (epstatus(sc)) { 1286 if (ifp->if_flags & IFF_DEBUG) 1287 printf("%s: adapter reset\n", 1288 sc->sc_dev.dv_xname); 1289 epreset(sc); 1290 } 1291 } 1292 1293 goto startagain; 1294 } 1295 1296 1297 /* 1298 * XXX: The 3c509 card can get in a mode where both the fifo status bit 1299 * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set 1300 * We detect this situation and we reset the adapter. 1301 * It happens at times when there is a lot of broadcast traffic 1302 * on the cable (once in a blue moon). 1303 */ 1304 static int 1305 epstatus(sc) 1306 register struct ep_softc *sc; 1307 { 1308 bus_space_tag_t iot = sc->sc_iot; 1309 bus_space_handle_t ioh = sc->sc_ioh; 1310 u_int16_t fifost; 1311 1312 /* 1313 * Check the FIFO status and act accordingly 1314 */ 1315 GO_WINDOW(4); 1316 fifost = bus_space_read_2(iot, ioh, ELINK_W4_FIFO_DIAG); 1317 GO_WINDOW(1); 1318 1319 if (fifost & FIFOS_RX_UNDERRUN) { 1320 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1321 printf("%s: RX underrun\n", sc->sc_dev.dv_xname); 1322 epreset(sc); 1323 return 0; 1324 } 1325 1326 if (fifost & FIFOS_RX_STATUS_OVERRUN) { 1327 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1328 printf("%s: RX Status overrun\n", sc->sc_dev.dv_xname); 1329 return 1; 1330 } 1331 1332 if (fifost & FIFOS_RX_OVERRUN) { 1333 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1334 printf("%s: RX overrun\n", sc->sc_dev.dv_xname); 1335 return 1; 1336 } 1337 1338 if (fifost & FIFOS_TX_OVERRUN) { 1339 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1340 printf("%s: TX overrun\n", sc->sc_dev.dv_xname); 1341 epreset(sc); 1342 return 0; 1343 } 1344 1345 return 0; 1346 } 1347 1348 1349 static void 1350 eptxstat(sc) 1351 register struct ep_softc *sc; 1352 { 1353 bus_space_tag_t iot = sc->sc_iot; 1354 bus_space_handle_t ioh = sc->sc_ioh; 1355 int i; 1356 1357 /* 1358 * We need to read+write TX_STATUS until we get a 0 status 1359 * in order to turn off the interrupt flag. 1360 */ 1361 while ((i = bus_space_read_1(iot, ioh, 1362 ep_w1_reg(sc, ELINK_W1_TX_STATUS))) & TXS_COMPLETE) { 1363 bus_space_write_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS), 1364 0x0); 1365 1366 if (i & TXS_JABBER) { 1367 ++sc->sc_ethercom.ec_if.if_oerrors; 1368 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1369 printf("%s: jabber (%x)\n", 1370 sc->sc_dev.dv_xname, i); 1371 epreset(sc); 1372 } else if (i & TXS_UNDERRUN) { 1373 ++sc->sc_ethercom.ec_if.if_oerrors; 1374 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1375 printf("%s: fifo underrun (%x) @%d\n", 1376 sc->sc_dev.dv_xname, i, 1377 sc->tx_start_thresh); 1378 if (sc->tx_succ_ok < 100) 1379 sc->tx_start_thresh = min(ETHER_MAX_LEN, 1380 sc->tx_start_thresh + 20); 1381 sc->tx_succ_ok = 0; 1382 epreset(sc); 1383 } else if (i & TXS_MAX_COLLISION) { 1384 ++sc->sc_ethercom.ec_if.if_collisions; 1385 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 1386 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1387 } else 1388 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 1389 } 1390 } 1391 1392 int 1393 epintr(arg) 1394 void *arg; 1395 { 1396 register struct ep_softc *sc = arg; 1397 bus_space_tag_t iot = sc->sc_iot; 1398 bus_space_handle_t ioh = sc->sc_ioh; 1399 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1400 u_int16_t status; 1401 int ret = 0; 1402 int addrandom = 0; 1403 1404 if (sc->enabled == 0 || 1405 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1406 return (0); 1407 1408 for (;;) { 1409 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1410 1411 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1412 1413 if ((status & (S_TX_COMPLETE | S_TX_AVAIL | 1414 S_RX_COMPLETE | S_CARD_FAILURE)) == 0) { 1415 if ((status & S_INTR_LATCH) == 0) { 1416 #if 0 1417 printf("%s: intr latch cleared\n", 1418 sc->sc_dev.dv_xname); 1419 #endif 1420 break; 1421 } 1422 } 1423 1424 ret = 1; 1425 1426 /* 1427 * Acknowledge any interrupts. It's important that we do this 1428 * first, since there would otherwise be a race condition. 1429 * Due to the i386 interrupt queueing, we may get spurious 1430 * interrupts occasionally. 1431 */ 1432 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1433 (status & (C_INTR_LATCH | 1434 C_CARD_FAILURE | 1435 C_TX_COMPLETE | 1436 C_TX_AVAIL | 1437 C_RX_COMPLETE | 1438 C_RX_EARLY | 1439 C_INT_RQD | 1440 C_UPD_STATS))); 1441 1442 #if 0 1443 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1444 1445 printf("%s: intr%s%s%s%s\n", sc->sc_dev.dv_xname, 1446 (status & S_RX_COMPLETE)?" RX_COMPLETE":"", 1447 (status & S_TX_COMPLETE)?" TX_COMPLETE":"", 1448 (status & S_TX_AVAIL)?" TX_AVAIL":"", 1449 (status & S_CARD_FAILURE)?" CARD_FAILURE":""); 1450 #endif 1451 1452 if (status & S_RX_COMPLETE) { 1453 epread(sc); 1454 addrandom = 1; 1455 } 1456 if (status & S_TX_AVAIL) { 1457 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1458 epstart(&sc->sc_ethercom.ec_if); 1459 addrandom = 1; 1460 } 1461 if (status & S_CARD_FAILURE) { 1462 printf("%s: adapter failure (%x)\n", 1463 sc->sc_dev.dv_xname, status); 1464 #if 1 1465 epinit(sc); 1466 #else 1467 epreset(sc); 1468 #endif 1469 return (1); 1470 } 1471 if (status & S_TX_COMPLETE) { 1472 eptxstat(sc); 1473 epstart(ifp); 1474 addrandom = 1; 1475 } 1476 1477 #if NRND > 0 1478 if (status) 1479 rnd_add_uint32(&sc->rnd_source, status); 1480 #endif 1481 } 1482 1483 /* no more interrupts */ 1484 return (ret); 1485 } 1486 1487 void 1488 epread(sc) 1489 register struct ep_softc *sc; 1490 { 1491 bus_space_tag_t iot = sc->sc_iot; 1492 bus_space_handle_t ioh = sc->sc_ioh; 1493 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1494 struct mbuf *m; 1495 struct ether_header *eh; 1496 int len; 1497 1498 len = bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1499 1500 again: 1501 if (ifp->if_flags & IFF_DEBUG) { 1502 int err = len & ERR_MASK; 1503 char *s = NULL; 1504 1505 if (len & ERR_INCOMPLETE) 1506 s = "incomplete packet"; 1507 else if (err == ERR_OVERRUN) 1508 s = "packet overrun"; 1509 else if (err == ERR_RUNT) 1510 s = "runt packet"; 1511 else if (err == ERR_ALIGNMENT) 1512 s = "bad alignment"; 1513 else if (err == ERR_CRC) 1514 s = "bad crc"; 1515 else if (err == ERR_OVERSIZE) 1516 s = "oversized packet"; 1517 else if (err == ERR_DRIBBLE) 1518 s = "dribble bits"; 1519 1520 if (s) 1521 printf("%s: %s\n", sc->sc_dev.dv_xname, s); 1522 } 1523 1524 if (len & ERR_INCOMPLETE) 1525 return; 1526 1527 if (len & ERR_RX) { 1528 ++ifp->if_ierrors; 1529 goto abort; 1530 } 1531 1532 len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */ 1533 1534 /* Pull packet off interface. */ 1535 m = epget(sc, len); 1536 if (m == 0) { 1537 ifp->if_ierrors++; 1538 goto abort; 1539 } 1540 1541 ++ifp->if_ipackets; 1542 1543 /* We assume the header fit entirely in one mbuf. */ 1544 eh = mtod(m, struct ether_header *); 1545 1546 #if NBPFILTER > 0 1547 /* 1548 * Check if there's a BPF listener on this interface. 1549 * If so, hand off the raw packet to BPF. 1550 */ 1551 if (ifp->if_bpf) { 1552 bpf_mtap(ifp->if_bpf, m); 1553 1554 /* 1555 * Note that the interface cannot be in promiscuous mode if 1556 * there are no BPF listeners. And if we are in promiscuous 1557 * mode, we have to check if this packet is really ours. 1558 */ 1559 if ((ifp->if_flags & IFF_PROMISC) && 1560 (eh->ether_dhost[0] & 1) == 0 && /* !mcast and !bcast */ 1561 bcmp(eh->ether_dhost, LLADDR(sc->sc_ethercom.ec_if.if_sadl), 1562 sizeof(eh->ether_dhost)) != 0) { 1563 m_freem(m); 1564 return; 1565 } 1566 } 1567 #endif 1568 (*ifp->if_input)(ifp, m); 1569 1570 /* 1571 * In periods of high traffic we can actually receive enough 1572 * packets so that the fifo overrun bit will be set at this point, 1573 * even though we just read a packet. In this case we 1574 * are not going to receive any more interrupts. We check for 1575 * this condition and read again until the fifo is not full. 1576 * We could simplify this test by not using epstatus(), but 1577 * rechecking the RX_STATUS register directly. This test could 1578 * result in unnecessary looping in cases where there is a new 1579 * packet but the fifo is not full, but it will not fix the 1580 * stuck behavior. 1581 * 1582 * Even with this improvement, we still get packet overrun errors 1583 * which are hurting performance. Maybe when I get some more time 1584 * I'll modify epread() so that it can handle RX_EARLY interrupts. 1585 */ 1586 if (epstatus(sc)) { 1587 len = bus_space_read_2(iot, ioh, 1588 ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1589 /* Check if we are stuck and reset [see XXX comment] */ 1590 if (len & ERR_INCOMPLETE) { 1591 if (ifp->if_flags & IFF_DEBUG) 1592 printf("%s: adapter reset\n", 1593 sc->sc_dev.dv_xname); 1594 epreset(sc); 1595 return; 1596 } 1597 goto again; 1598 } 1599 1600 return; 1601 1602 abort: 1603 ep_discard_rxtop(iot, ioh); 1604 1605 } 1606 1607 struct mbuf * 1608 epget(sc, totlen) 1609 struct ep_softc *sc; 1610 int totlen; 1611 { 1612 bus_space_tag_t iot = sc->sc_iot; 1613 bus_space_handle_t ioh = sc->sc_ioh; 1614 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1615 struct mbuf *top, **mp, *m, *rv = NULL; 1616 bus_addr_t rxreg; 1617 int len, remaining; 1618 int sh; 1619 1620 m = sc->mb[sc->next_mb]; 1621 sc->mb[sc->next_mb] = 0; 1622 if (m == 0) { 1623 MGETHDR(m, M_DONTWAIT, MT_DATA); 1624 if (m == 0) 1625 return 0; 1626 } else { 1627 /* If the queue is no longer full, refill. */ 1628 if (sc->last_mb == sc->next_mb) 1629 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1630 /* Convert one of our saved mbuf's. */ 1631 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1632 m->m_data = m->m_pktdat; 1633 m->m_flags = M_PKTHDR; 1634 bzero(&m->m_pkthdr, sizeof(m->m_pkthdr)); 1635 } 1636 m->m_pkthdr.rcvif = ifp; 1637 m->m_pkthdr.len = totlen; 1638 len = MHLEN; 1639 top = 0; 1640 mp = ⊤ 1641 1642 /* 1643 * We read the packet at splhigh() so that an interrupt from another 1644 * device doesn't cause the card's buffer to overflow while we're 1645 * reading it. We may still lose packets at other times. 1646 */ 1647 sh = splhigh(); 1648 1649 rxreg = ep_w1_reg(sc, ELINK_W1_RX_PIO_RD_1); 1650 1651 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1652 /* 1653 * Prime the FIFO buffer counter (number of 16-bit 1654 * words about to be read from the FIFO). 1655 * 1656 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1657 * COUNTER IS NON-ZERO! 1658 */ 1659 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, totlen >> 1); 1660 } 1661 1662 while (totlen > 0) { 1663 if (top) { 1664 m = sc->mb[sc->next_mb]; 1665 sc->mb[sc->next_mb] = 0; 1666 if (m == 0) { 1667 MGET(m, M_DONTWAIT, MT_DATA); 1668 if (m == 0) { 1669 m_freem(top); 1670 goto out; 1671 } 1672 } else { 1673 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1674 } 1675 len = MLEN; 1676 } 1677 if (totlen >= MINCLSIZE) { 1678 MCLGET(m, M_DONTWAIT); 1679 if ((m->m_flags & M_EXT) == 0) { 1680 m_free(m); 1681 m_freem(top); 1682 goto out; 1683 } 1684 len = MCLBYTES; 1685 } 1686 if (top == 0) { 1687 /* align the struct ip header */ 1688 caddr_t newdata = (caddr_t) 1689 ALIGN(m->m_data + sizeof(struct ether_header)) 1690 - sizeof(struct ether_header); 1691 len -= newdata - m->m_data; 1692 m->m_data = newdata; 1693 } 1694 remaining = len = min(totlen, len); 1695 if (ELINK_IS_BUS_32(sc->bustype)) { 1696 u_long offset = mtod(m, u_long); 1697 /* 1698 * Read bytes up to the point where we are aligned. 1699 * (We can align to 4 bytes, rather than ALIGNBYTES, 1700 * here because we're later reading 4-byte chunks.) 1701 */ 1702 if ((remaining > 3) && (offset & 3)) { 1703 int count = (4 - (offset & 3)); 1704 bus_space_read_multi_1(iot, ioh, 1705 rxreg, (u_int8_t *) offset, count); 1706 offset += count; 1707 remaining -= count; 1708 } 1709 if (remaining > 3) { 1710 bus_space_read_multi_stream_4(iot, ioh, 1711 rxreg, (u_int32_t *) offset, 1712 remaining >> 2); 1713 offset += remaining & ~3; 1714 remaining &= 3; 1715 } 1716 if (remaining) { 1717 bus_space_read_multi_1(iot, ioh, 1718 rxreg, (u_int8_t *) offset, remaining); 1719 } 1720 } else { 1721 u_long offset = mtod(m, u_long); 1722 if ((remaining > 1) && (offset & 1)) { 1723 bus_space_read_multi_1(iot, ioh, 1724 rxreg, (u_int8_t *) offset, 1); 1725 remaining -= 1; 1726 offset += 1; 1727 } 1728 if (remaining > 1) { 1729 bus_space_read_multi_stream_2(iot, ioh, 1730 rxreg, (u_int16_t *) offset, 1731 remaining >> 1); 1732 offset += remaining & ~1; 1733 } 1734 if (remaining & 1) { 1735 bus_space_read_multi_1(iot, ioh, 1736 rxreg, (u_int8_t *) offset, remaining & 1); 1737 } 1738 } 1739 m->m_len = len; 1740 totlen -= len; 1741 *mp = m; 1742 mp = &m->m_next; 1743 } 1744 1745 rv = top; 1746 1747 ep_discard_rxtop(iot, ioh); 1748 1749 out: 1750 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 1751 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1752 splx(sh); 1753 1754 return rv; 1755 } 1756 1757 int 1758 epioctl(ifp, cmd, data) 1759 register struct ifnet *ifp; 1760 u_long cmd; 1761 caddr_t data; 1762 { 1763 struct ep_softc *sc = ifp->if_softc; 1764 struct ifaddr *ifa = (struct ifaddr *)data; 1765 struct ifreq *ifr = (struct ifreq *)data; 1766 int s, error = 0; 1767 1768 s = splnet(); 1769 1770 switch (cmd) { 1771 1772 case SIOCSIFADDR: 1773 if ((error = epenable(sc)) != 0) 1774 break; 1775 /* epinit is called just below */ 1776 ifp->if_flags |= IFF_UP; 1777 switch (ifa->ifa_addr->sa_family) { 1778 #ifdef INET 1779 case AF_INET: 1780 epinit(sc); 1781 arp_ifinit(&sc->sc_ethercom.ec_if, ifa); 1782 break; 1783 #endif 1784 #ifdef NS 1785 case AF_NS: 1786 { 1787 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1788 1789 if (ns_nullhost(*ina)) 1790 ina->x_host = *(union ns_host *) 1791 LLADDR(ifp->if_sadl); 1792 else 1793 bcopy(ina->x_host.c_host, 1794 LLADDR(ifp->if_sadl), 1795 ifp->if_addrlen); 1796 /* Set new address. */ 1797 epinit(sc); 1798 break; 1799 } 1800 #endif 1801 default: 1802 epinit(sc); 1803 break; 1804 } 1805 break; 1806 1807 case SIOCSIFMEDIA: 1808 case SIOCGIFMEDIA: 1809 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 1810 break; 1811 1812 case SIOCSIFFLAGS: 1813 if ((ifp->if_flags & IFF_UP) == 0 && 1814 (ifp->if_flags & IFF_RUNNING) != 0) { 1815 /* 1816 * If interface is marked down and it is running, then 1817 * stop it. 1818 */ 1819 epstop(sc); 1820 ifp->if_flags &= ~IFF_RUNNING; 1821 epdisable(sc); 1822 } else if ((ifp->if_flags & IFF_UP) != 0 && 1823 (ifp->if_flags & IFF_RUNNING) == 0) { 1824 /* 1825 * If interface is marked up and it is stopped, then 1826 * start it. 1827 */ 1828 if ((error = epenable(sc)) != 0) 1829 break; 1830 epinit(sc); 1831 } else if ((ifp->if_flags & IFF_UP) != 0) { 1832 /* 1833 * deal with flags changes: 1834 * IFF_MULTICAST, IFF_PROMISC. 1835 */ 1836 epsetfilter(sc); 1837 } 1838 break; 1839 1840 case SIOCADDMULTI: 1841 case SIOCDELMULTI: 1842 if (sc->enabled == 0) { 1843 error = EIO; 1844 break; 1845 } 1846 1847 error = (cmd == SIOCADDMULTI) ? 1848 ether_addmulti(ifr, &sc->sc_ethercom) : 1849 ether_delmulti(ifr, &sc->sc_ethercom); 1850 1851 if (error == ENETRESET) { 1852 /* 1853 * Multicast list has changed; set the hardware filter 1854 * accordingly. 1855 */ 1856 epreset(sc); 1857 error = 0; 1858 } 1859 break; 1860 1861 default: 1862 error = EINVAL; 1863 break; 1864 } 1865 1866 splx(s); 1867 return (error); 1868 } 1869 1870 void 1871 epreset(sc) 1872 struct ep_softc *sc; 1873 { 1874 int s; 1875 1876 s = splnet(); 1877 epinit(sc); 1878 splx(s); 1879 } 1880 1881 void 1882 epwatchdog(ifp) 1883 struct ifnet *ifp; 1884 { 1885 struct ep_softc *sc = ifp->if_softc; 1886 1887 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1888 ++sc->sc_ethercom.ec_if.if_oerrors; 1889 1890 epreset(sc); 1891 } 1892 1893 void 1894 epstop(sc) 1895 register struct ep_softc *sc; 1896 { 1897 bus_space_tag_t iot = sc->sc_iot; 1898 bus_space_handle_t ioh = sc->sc_ioh; 1899 1900 if (sc->ep_flags & ELINK_FLAGS_MII) { 1901 /* Stop the one second clock. */ 1902 callout_stop(&sc->sc_mbuf_callout); 1903 1904 /* Down the MII. */ 1905 mii_down(&sc->sc_mii); 1906 } 1907 1908 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 1909 /* 1910 * Clear the FIFO buffer count, thus halting 1911 * any currently-running transactions. 1912 */ 1913 GO_WINDOW(1); /* sanity */ 1914 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 1915 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1916 } 1917 1918 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1919 ep_discard_rxtop(iot, ioh); 1920 1921 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1922 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1923 1924 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 1925 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 1926 1927 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1928 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK); 1929 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK); 1930 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RX_FILTER); 1931 1932 epmbufempty(sc); 1933 } 1934 1935 1936 /* 1937 * Before reboots, reset card completely. 1938 */ 1939 static void 1940 epshutdown(arg) 1941 void *arg; 1942 { 1943 register struct ep_softc *sc = arg; 1944 int s = splnet(); 1945 1946 if (sc->enabled) { 1947 epstop(sc); 1948 ep_reset_cmd(sc, ELINK_COMMAND, GLOBAL_RESET); 1949 sc->enabled = 0; 1950 } 1951 splx(s); 1952 } 1953 1954 /* 1955 * We get eeprom data from the id_port given an offset into the 1956 * eeprom. Basically; after the ID_sequence is sent to all of 1957 * the cards; they enter the ID_CMD state where they will accept 1958 * command requests. 0x80-0xbf loads the eeprom data. We then 1959 * read the port 16 times and with every read; the cards check 1960 * for contention (ie: if one card writes a 0 bit and another 1961 * writes a 1 bit then the host sees a 0. At the end of the cycle; 1962 * each card compares the data on the bus; if there is a difference 1963 * then that card goes into ID_WAIT state again). In the meantime; 1964 * one bit of data is returned in the AX register which is conveniently 1965 * returned to us by bus_space_read_1(). Hence; we read 16 times getting one 1966 * bit of data with each read. 1967 * 1968 * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT! 1969 */ 1970 u_int16_t 1971 epreadeeprom(iot, ioh, offset) 1972 bus_space_tag_t iot; 1973 bus_space_handle_t ioh; 1974 int offset; 1975 { 1976 u_int16_t data = 0; 1977 int i; 1978 1979 bus_space_write_1(iot, ioh, 0, 0x80 + offset); 1980 delay(1000); 1981 for (i = 0; i < 16; i++) 1982 data = (data << 1) | (bus_space_read_2(iot, ioh, 0) & 1); 1983 return (data); 1984 } 1985 1986 static int 1987 epbusyeeprom(sc) 1988 struct ep_softc *sc; 1989 { 1990 bus_space_tag_t iot = sc->sc_iot; 1991 bus_space_handle_t ioh = sc->sc_ioh; 1992 int i = 100, j; 1993 1994 if (sc->bustype == ELINK_BUS_PCMCIA) { 1995 delay(1000); 1996 return 0; 1997 } 1998 1999 j = 0; /* bad GCC flow analysis */ 2000 while (i--) { 2001 j = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND); 2002 if (j & EEPROM_BUSY) 2003 delay(100); 2004 else 2005 break; 2006 } 2007 if (!i) { 2008 printf("\n%s: eeprom failed to come ready\n", 2009 sc->sc_dev.dv_xname); 2010 return (1); 2011 } 2012 if (j & EEPROM_TST_MODE) { 2013 /* XXX PnP mode? */ 2014 printf("\n%s: erase pencil mark!\n", sc->sc_dev.dv_xname); 2015 return (1); 2016 } 2017 return (0); 2018 } 2019 2020 u_int16_t 2021 ep_read_eeprom(sc, offset) 2022 struct ep_softc *sc; 2023 u_int16_t offset; 2024 { 2025 u_int16_t readcmd; 2026 2027 /* 2028 * RoadRunner has a larger EEPROM, so a different read command 2029 * is required. 2030 */ 2031 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) 2032 readcmd = READ_EEPROM_RR; 2033 else 2034 readcmd = READ_EEPROM; 2035 2036 if (epbusyeeprom(sc)) 2037 return (0); /* XXX why is eeprom busy? */ 2038 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W0_EEPROM_COMMAND, 2039 readcmd | offset); 2040 if (epbusyeeprom(sc)) 2041 return (0); /* XXX why is eeprom busy? */ 2042 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W0_EEPROM_DATA)); 2043 } 2044 2045 void 2046 epmbuffill(v) 2047 void *v; 2048 { 2049 struct ep_softc *sc = v; 2050 struct mbuf *m; 2051 int s, i; 2052 2053 s = splnet(); 2054 i = sc->last_mb; 2055 do { 2056 if (sc->mb[i] == 0) { 2057 MGET(m, M_DONTWAIT, MT_DATA); 2058 if (m == 0) 2059 break; 2060 sc->mb[i] = m; 2061 } 2062 i = (i + 1) % MAX_MBS; 2063 } while (i != sc->next_mb); 2064 sc->last_mb = i; 2065 /* If the queue was not filled, try again. */ 2066 if (sc->last_mb != sc->next_mb) 2067 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 2068 splx(s); 2069 } 2070 2071 void 2072 epmbufempty(sc) 2073 struct ep_softc *sc; 2074 { 2075 int s, i; 2076 2077 s = splnet(); 2078 for (i = 0; i<MAX_MBS; i++) { 2079 if (sc->mb[i]) { 2080 m_freem(sc->mb[i]); 2081 sc->mb[i] = NULL; 2082 } 2083 } 2084 sc->last_mb = sc->next_mb = 0; 2085 callout_stop(&sc->sc_mbuf_callout); 2086 splx(s); 2087 } 2088 2089 int 2090 epenable(sc) 2091 struct ep_softc *sc; 2092 { 2093 2094 if (sc->enabled == 0 && sc->enable != NULL) { 2095 if ((*sc->enable)(sc) != 0) { 2096 printf("%s: device enable failed\n", 2097 sc->sc_dev.dv_xname); 2098 return (EIO); 2099 } 2100 } 2101 2102 sc->enabled = 1; 2103 return (0); 2104 } 2105 2106 void 2107 epdisable(sc) 2108 struct ep_softc *sc; 2109 { 2110 2111 if (sc->enabled != 0 && sc->disable != NULL) { 2112 (*sc->disable)(sc); 2113 sc->enabled = 0; 2114 } 2115 } 2116 2117 /* 2118 * ep_activate: 2119 * 2120 * Handle device activation/deactivation requests. 2121 */ 2122 int 2123 ep_activate(self, act) 2124 struct device *self; 2125 enum devact act; 2126 { 2127 struct ep_softc *sc = (struct ep_softc *)self; 2128 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2129 int error = 0, s; 2130 2131 s = splnet(); 2132 switch (act) { 2133 case DVACT_ACTIVATE: 2134 error = EOPNOTSUPP; 2135 break; 2136 2137 case DVACT_DEACTIVATE: 2138 if (sc->ep_flags & ELINK_FLAGS_MII) 2139 mii_activate(&sc->sc_mii, act, MII_PHY_ANY, 2140 MII_OFFSET_ANY); 2141 if_deactivate(ifp); 2142 break; 2143 } 2144 splx(s); 2145 return (error); 2146 } 2147 2148 /* 2149 * ep_detach: 2150 * 2151 * Detach a elink3 interface. 2152 */ 2153 int 2154 ep_detach(self, flags) 2155 struct device *self; 2156 int flags; 2157 { 2158 struct ep_softc *sc = (struct ep_softc *)self; 2159 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2160 2161 epdisable(sc); 2162 2163 callout_stop(&sc->sc_mii_callout); 2164 callout_stop(&sc->sc_mbuf_callout); 2165 2166 if (sc->ep_flags & ELINK_FLAGS_MII) { 2167 /* Detach all PHYs */ 2168 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 2169 } 2170 2171 /* Delete all remaining media. */ 2172 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 2173 2174 #if NRND > 0 2175 rnd_detach_source(&sc->rnd_source); 2176 #endif 2177 #if NBPFILTER > 0 2178 bpfdetach(ifp); 2179 #endif 2180 ether_ifdetach(ifp); 2181 if_detach(ifp); 2182 2183 shutdownhook_disestablish(sc->sd_hook); 2184 2185 return (0); 2186 } 2187 2188 u_int32_t 2189 ep_mii_bitbang_read(self) 2190 struct device *self; 2191 { 2192 struct ep_softc *sc = (void *) self; 2193 2194 /* We're already in Window 4. */ 2195 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 2196 ELINK_W4_BOOM_PHYSMGMT)); 2197 } 2198 2199 void 2200 ep_mii_bitbang_write(self, val) 2201 struct device *self; 2202 u_int32_t val; 2203 { 2204 struct ep_softc *sc = (void *) self; 2205 2206 /* We're already in Window 4. */ 2207 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 2208 ELINK_W4_BOOM_PHYSMGMT, val); 2209 } 2210 2211 int 2212 ep_mii_readreg(self, phy, reg) 2213 struct device *self; 2214 int phy, reg; 2215 { 2216 struct ep_softc *sc = (void *) self; 2217 int val; 2218 2219 GO_WINDOW(4); 2220 2221 val = mii_bitbang_readreg(self, &ep_mii_bitbang_ops, phy, reg); 2222 2223 GO_WINDOW(1); 2224 2225 return (val); 2226 } 2227 2228 void 2229 ep_mii_writereg(self, phy, reg, val) 2230 struct device *self; 2231 int phy, reg, val; 2232 { 2233 struct ep_softc *sc = (void *) self; 2234 2235 GO_WINDOW(4); 2236 2237 mii_bitbang_writereg(self, &ep_mii_bitbang_ops, phy, reg, val); 2238 2239 GO_WINDOW(1); 2240 } 2241 2242 void 2243 ep_statchg(self) 2244 struct device *self; 2245 { 2246 struct ep_softc *sc = (struct ep_softc *)self; 2247 bus_space_tag_t iot = sc->sc_iot; 2248 bus_space_handle_t ioh = sc->sc_ioh; 2249 int mctl; 2250 2251 GO_WINDOW(3); 2252 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 2253 if (sc->sc_mii.mii_media_active & IFM_FDX) 2254 mctl |= MAC_CONTROL_FDX; 2255 else 2256 mctl &= ~MAC_CONTROL_FDX; 2257 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 2258 GO_WINDOW(1); /* back to operating window */ 2259 } 2260
Indexes created Thu Sep 25 16:09:42 GMT 2025