elink3.c revision 1.81
1 /* $NetBSD: elink3.c,v 1.81 2000/05/29 17:37:12 jhawk Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1996, 1997 Jonathan Stone <jonathan (at) NetBSD.org> 42 * Copyright (c) 1994 Herb Peyerl <hpeyerl (at) beer.org> 43 * All rights reserved. 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice, this list of conditions and the following disclaimer. 50 * 2. Redistributions in binary form must reproduce the above copyright 51 * notice, this list of conditions and the following disclaimer in the 52 * documentation and/or other materials provided with the distribution. 53 * 3. All advertising materials mentioning features or use of this software 54 * must display the following acknowledgement: 55 * This product includes software developed by Herb Peyerl. 56 * 4. The name of Herb Peyerl may not be used to endorse or promote products 57 * derived from this software without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 60 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 61 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 62 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 63 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 64 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 65 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 66 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 67 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 68 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 #include "opt_inet.h" 72 #include "opt_ns.h" 73 #include "bpfilter.h" 74 #include "rnd.h" 75 76 #include <sys/param.h> 77 #include <sys/systm.h> 78 #include <sys/callout.h> 79 #include <sys/kernel.h> 80 #include <sys/mbuf.h> 81 #include <sys/socket.h> 82 #include <sys/ioctl.h> 83 #include <sys/errno.h> 84 #include <sys/syslog.h> 85 #include <sys/select.h> 86 #include <sys/device.h> 87 #if NRND > 0 88 #include <sys/rnd.h> 89 #endif 90 91 #include <net/if.h> 92 #include <net/if_dl.h> 93 #include <net/if_ether.h> 94 #include <net/if_media.h> 95 96 #ifdef INET 97 #include <netinet/in.h> 98 #include <netinet/in_systm.h> 99 #include <netinet/in_var.h> 100 #include <netinet/ip.h> 101 #include <netinet/if_inarp.h> 102 #endif 103 104 #ifdef NS 105 #include <netns/ns.h> 106 #include <netns/ns_if.h> 107 #endif 108 109 #if NBPFILTER > 0 110 #include <net/bpf.h> 111 #include <net/bpfdesc.h> 112 #endif 113 114 #include <machine/cpu.h> 115 #include <machine/bus.h> 116 #include <machine/intr.h> 117 118 #include <dev/mii/mii.h> 119 #include <dev/mii/miivar.h> 120 #include <dev/mii/mii_bitbang.h> 121 122 #include <dev/ic/elink3var.h> 123 #include <dev/ic/elink3reg.h> 124 125 #ifdef DEBUG 126 int epdebug = 0; 127 #endif 128 129 /* 130 * XXX endian workaround for big-endian CPUs with pcmcia: 131 * if stream methods for bus_space_multi are not provided, define them 132 * using non-stream bus_space_{read,write}_multi_. 133 * Assumes host CPU is same endian-ness as bus. 134 */ 135 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 136 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 137 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 138 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 139 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 140 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 141 142 /* 143 * Structure to map media-present bits in boards to ifmedia codes and 144 * printable media names. Used for table-driven ifmedia initialization. 145 */ 146 struct ep_media { 147 int epm_mpbit; /* media present bit */ 148 const char *epm_name; /* name of medium */ 149 int epm_ifmedia; /* ifmedia word for medium */ 150 int epm_epmedia; /* ELINKMEDIA_* constant */ 151 }; 152 153 /* 154 * Media table for the Demon/Vortex/Boomerang chipsets. 155 * 156 * Note that MII on the Demon and Vortex (3c59x) indicates an external 157 * MII connector (for connecting an external PHY) ... I think. Treat 158 * it as `manual' on these chips. 159 * 160 * Any Boomerang (3c90x) chips with MII really do have an internal 161 * MII and real PHYs attached; no `native' media. 162 */ 163 struct ep_media ep_vortex_media[] = { 164 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 165 ELINKMEDIA_10BASE_T }, 166 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 167 ELINKMEDIA_10BASE_T }, 168 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 169 ELINKMEDIA_AUI }, 170 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 171 ELINKMEDIA_10BASE_2 }, 172 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 173 ELINKMEDIA_100BASE_TX }, 174 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 175 ELINKMEDIA_100BASE_TX }, 176 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 177 ELINKMEDIA_100BASE_FX }, 178 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 179 ELINKMEDIA_MII }, 180 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 181 ELINKMEDIA_100BASE_T4 }, 182 { 0, NULL, 0, 183 0 }, 184 }; 185 186 /* 187 * Media table for the older 3Com Etherlink III chipset, used 188 * in the 3c509, 3c579, and 3c589. 189 */ 190 struct ep_media ep_509_media[] = { 191 { ELINK_W0_CC_UTP, "10baseT", IFM_ETHER|IFM_10_T, 192 ELINKMEDIA_10BASE_T }, 193 { ELINK_W0_CC_AUI, "10base5", IFM_ETHER|IFM_10_5, 194 ELINKMEDIA_AUI }, 195 { ELINK_W0_CC_BNC, "10base2", IFM_ETHER|IFM_10_2, 196 ELINKMEDIA_10BASE_2 }, 197 { 0, NULL, 0, 198 0 }, 199 }; 200 201 void ep_internalconfig __P((struct ep_softc *sc)); 202 void ep_vortex_probemedia __P((struct ep_softc *sc)); 203 void ep_509_probemedia __P((struct ep_softc *sc)); 204 205 static void eptxstat __P((struct ep_softc *)); 206 static int epstatus __P((struct ep_softc *)); 207 void epinit __P((struct ep_softc *)); 208 int epioctl __P((struct ifnet *, u_long, caddr_t)); 209 void epstart __P((struct ifnet *)); 210 void epwatchdog __P((struct ifnet *)); 211 void epreset __P((struct ep_softc *)); 212 static void epshutdown __P((void *)); 213 void epread __P((struct ep_softc *)); 214 struct mbuf *epget __P((struct ep_softc *, int)); 215 void epmbuffill __P((void *)); 216 void epmbufempty __P((struct ep_softc *)); 217 void epsetfilter __P((struct ep_softc *)); 218 void ep_roadrunner_mii_enable __P((struct ep_softc *)); 219 void epsetmedia __P((struct ep_softc *)); 220 221 /* ifmedia callbacks */ 222 int ep_media_change __P((struct ifnet *ifp)); 223 void ep_media_status __P((struct ifnet *ifp, struct ifmediareq *req)); 224 225 /* MII callbacks */ 226 int ep_mii_readreg __P((struct device *, int, int)); 227 void ep_mii_writereg __P((struct device *, int, int, int)); 228 void ep_statchg __P((struct device *)); 229 230 void ep_tick __P((void *)); 231 232 static int epbusyeeprom __P((struct ep_softc *)); 233 u_int16_t ep_read_eeprom __P((struct ep_softc *, u_int16_t)); 234 static inline void ep_reset_cmd __P((struct ep_softc *sc, 235 u_int cmd, u_int arg)); 236 static inline void ep_finish_reset __P((bus_space_tag_t, bus_space_handle_t)); 237 static inline void ep_discard_rxtop __P((bus_space_tag_t, bus_space_handle_t)); 238 static __inline int ep_w1_reg __P((struct ep_softc *, int)); 239 240 /* 241 * MII bit-bang glue. 242 */ 243 u_int32_t ep_mii_bitbang_read __P((struct device *)); 244 void ep_mii_bitbang_write __P((struct device *, u_int32_t)); 245 246 const struct mii_bitbang_ops ep_mii_bitbang_ops = { 247 ep_mii_bitbang_read, 248 ep_mii_bitbang_write, 249 { 250 PHYSMGMT_DATA, /* MII_BIT_MDO */ 251 PHYSMGMT_DATA, /* MII_BIT_MDI */ 252 PHYSMGMT_CLK, /* MII_BIT_MDC */ 253 PHYSMGMT_DIR, /* MII_BIT_DIR_HOST_PHY */ 254 0, /* MII_BIT_DIR_PHY_HOST */ 255 } 256 }; 257 258 /* 259 * Some chips (3c515 [Corkscrew] and 3c574 [RoadRunner]) have 260 * Window 1 registers offset! 261 */ 262 static __inline int 263 ep_w1_reg(sc, reg) 264 struct ep_softc *sc; 265 int reg; 266 { 267 268 switch (sc->ep_chipset) { 269 case ELINK_CHIPSET_CORKSCREW: 270 return (reg + 0x10); 271 272 case ELINK_CHIPSET_ROADRUNNER: 273 switch (reg) { 274 case ELINK_W1_FREE_TX: 275 case ELINK_W1_RUNNER_RDCTL: 276 case ELINK_W1_RUNNER_WRCTL: 277 return (reg); 278 } 279 return (reg + 0x10); 280 } 281 282 return (reg); 283 } 284 285 /* 286 * Wait for any pending reset to complete. 287 * On newer hardware we could poll SC_COMMAND_IN_PROGRESS, 288 * but older hardware doesn't implement it and we must delay. 289 */ 290 static inline void 291 ep_finish_reset(iot, ioh) 292 bus_space_tag_t iot; 293 bus_space_handle_t ioh; 294 { 295 int i; 296 297 for (i = 0; i < 10000; i++) { 298 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 299 S_COMMAND_IN_PROGRESS) == 0) 300 break; 301 DELAY(10); 302 } 303 } 304 305 /* 306 * Issue a (reset) command, and be sure it has completed. 307 * Used for global reset, TX_RESET, RX_RESET. 308 */ 309 static inline void 310 ep_reset_cmd(sc, cmd, arg) 311 struct ep_softc *sc; 312 u_int cmd, arg; 313 { 314 bus_space_tag_t iot = sc->sc_iot; 315 bus_space_handle_t ioh = sc->sc_ioh; 316 317 bus_space_write_2(iot, ioh, cmd, arg); 318 ep_finish_reset(iot, ioh); 319 } 320 321 322 static inline void 323 ep_discard_rxtop(iot, ioh) 324 bus_space_tag_t iot; 325 bus_space_handle_t ioh; 326 { 327 int i; 328 329 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISCARD_TOP_PACK); 330 331 /* 332 * Spin for about 1 msec, to avoid forcing a DELAY() between 333 * every received packet (adding latency and limiting pkt-recv rate). 334 * On PCI, at 4 30-nsec PCI bus cycles for a read, 8000 iterations 335 * is about right. 336 */ 337 for (i = 0; i < 8000; i++) { 338 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 339 S_COMMAND_IN_PROGRESS) == 0) 340 return; 341 } 342 343 /* Didn't complete in a hurry. Do DELAY()s. */ 344 ep_finish_reset(iot, ioh); 345 } 346 347 /* 348 * Back-end attach and configure. 349 */ 350 int 351 epconfig(sc, chipset, enaddr) 352 struct ep_softc *sc; 353 u_short chipset; 354 u_int8_t *enaddr; 355 { 356 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 357 bus_space_tag_t iot = sc->sc_iot; 358 bus_space_handle_t ioh = sc->sc_ioh; 359 u_int16_t i; 360 u_int8_t myla[6]; 361 362 callout_init(&sc->sc_mii_callout); 363 callout_init(&sc->sc_mbuf_callout); 364 365 sc->ep_chipset = chipset; 366 367 /* 368 * We could have been groveling around in other register 369 * windows in the front-end; make sure we're in window 0 370 * to read the EEPROM. 371 */ 372 GO_WINDOW(0); 373 374 if (enaddr == NULL) { 375 /* 376 * Read the station address from the eeprom. 377 */ 378 for (i = 0; i < 3; i++) { 379 u_int16_t x = ep_read_eeprom(sc, i); 380 myla[(i << 1)] = x >> 8; 381 myla[(i << 1) + 1] = x; 382 } 383 enaddr = myla; 384 } 385 386 /* 387 * Vortex-based (3c59x pci,eisa) and Boomerang (3c900) cards 388 * allow FDDI-sized (4500) byte packets. Commands only take an 389 * 11-bit parameter, and 11 bits isn't enough to hold a full-size 390 * packet length. 391 * Commands to these cards implicitly upshift a packet size 392 * or threshold by 2 bits. 393 * To detect cards with large-packet support, we probe by setting 394 * the transmit threshold register, then change windows and 395 * read back the threshold register directly, and see if the 396 * threshold value was shifted or not. 397 */ 398 bus_space_write_2(iot, ioh, ELINK_COMMAND, 399 SET_TX_AVAIL_THRESH | ELINK_LARGEWIN_PROBE); 400 GO_WINDOW(5); 401 i = bus_space_read_2(iot, ioh, ELINK_W5_TX_AVAIL_THRESH); 402 GO_WINDOW(1); 403 switch (i) { 404 case ELINK_LARGEWIN_PROBE: 405 case (ELINK_LARGEWIN_PROBE & ELINK_LARGEWIN_MASK): 406 sc->ep_pktlenshift = 0; 407 break; 408 409 case (ELINK_LARGEWIN_PROBE << 2): 410 sc->ep_pktlenshift = 2; 411 break; 412 413 default: 414 printf("%s: wrote 0x%x to TX_AVAIL_THRESH, read back 0x%x. " 415 "Interface disabled\n", 416 sc->sc_dev.dv_xname, ELINK_LARGEWIN_PROBE, (int) i); 417 return (1); 418 } 419 420 /* 421 * Ensure Tx-available interrupts are enabled for 422 * start the interface. 423 * XXX should be in epinit()? 424 */ 425 bus_space_write_2(iot, ioh, ELINK_COMMAND, 426 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 427 428 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 429 ifp->if_softc = sc; 430 ifp->if_start = epstart; 431 ifp->if_ioctl = epioctl; 432 ifp->if_watchdog = epwatchdog; 433 ifp->if_flags = 434 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 435 436 if_attach(ifp); 437 ether_ifattach(ifp, enaddr); 438 439 /* 440 * Finish configuration: 441 * determine chipset if the front-end couldn't do so, 442 * show board details, set media. 443 */ 444 445 /* 446 * Print RAM size. We also print the Ethernet address in here. 447 * It's extracted from the ifp, so we have to make sure it's 448 * been attached first. 449 */ 450 ep_internalconfig(sc); 451 GO_WINDOW(0); 452 453 /* 454 * Display some additional information, if pertinent. 455 */ 456 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 457 printf("%s: RoadRunner FIFO buffer enabled\n", 458 sc->sc_dev.dv_xname); 459 460 /* 461 * Initialize our media structures and MII info. We'll 462 * probe the MII if we discover that we have one. 463 */ 464 sc->sc_mii.mii_ifp = ifp; 465 sc->sc_mii.mii_readreg = ep_mii_readreg; 466 sc->sc_mii.mii_writereg = ep_mii_writereg; 467 sc->sc_mii.mii_statchg = ep_statchg; 468 ifmedia_init(&sc->sc_mii.mii_media, 0, ep_media_change, 469 ep_media_status); 470 471 /* 472 * Now, determine which media we have. 473 */ 474 switch (sc->ep_chipset) { 475 case ELINK_CHIPSET_ROADRUNNER: 476 if (sc->ep_flags & ELINK_FLAGS_MII) { 477 ep_roadrunner_mii_enable(sc); 478 GO_WINDOW(0); 479 } 480 /* FALLTHROUGH */ 481 482 case ELINK_CHIPSET_BOOMERANG: 483 /* 484 * If the device has MII, probe it. We won't be using 485 * any `native' media in this case, only PHYs. If 486 * we don't, just treat the Boomerang like the Vortex. 487 */ 488 if (sc->ep_flags & ELINK_FLAGS_MII) { 489 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 490 MII_PHY_ANY, MII_OFFSET_ANY, 0); 491 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 492 ifmedia_add(&sc->sc_mii.mii_media, 493 IFM_ETHER|IFM_NONE, 0, NULL); 494 ifmedia_set(&sc->sc_mii.mii_media, 495 IFM_ETHER|IFM_NONE); 496 } else { 497 ifmedia_set(&sc->sc_mii.mii_media, 498 IFM_ETHER|IFM_AUTO); 499 } 500 break; 501 } 502 /* FALLTHROUGH */ 503 504 case ELINK_CHIPSET_VORTEX: 505 ep_vortex_probemedia(sc); 506 break; 507 508 default: 509 ep_509_probemedia(sc); 510 break; 511 } 512 513 GO_WINDOW(1); /* Window 1 is operating window */ 514 515 #if NBPFILTER > 0 516 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 517 #endif 518 519 #if NRND > 0 520 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 521 RND_TYPE_NET, 0); 522 #endif 523 524 sc->tx_start_thresh = 20; /* probably a good starting point. */ 525 526 /* Establish callback to reset card when we reboot. */ 527 sc->sd_hook = shutdownhook_establish(epshutdown, sc); 528 529 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 530 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 531 532 /* The attach is successful. */ 533 sc->sc_flags |= ELINK_FLAGS_ATTACHED; 534 return (0); 535 } 536 537 538 /* 539 * Show interface-model-independent info from window 3 540 * internal-configuration register. 541 */ 542 void 543 ep_internalconfig(sc) 544 struct ep_softc *sc; 545 { 546 bus_space_tag_t iot = sc->sc_iot; 547 bus_space_handle_t ioh = sc->sc_ioh; 548 549 u_int config0; 550 u_int config1; 551 552 int ram_size, ram_width, ram_speed, rom_size, ram_split; 553 /* 554 * NVRAM buffer Rx:Tx config names for busmastering cards 555 * (Demon, Vortex, and later). 556 */ 557 const char *onboard_ram_config[] = { 558 "5:3", "3:1", "1:1", "3:5" }; 559 560 GO_WINDOW(3); 561 config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 562 config1 = (u_int)bus_space_read_2(iot, ioh, 563 ELINK_W3_INTERNAL_CONFIG + 2); 564 GO_WINDOW(0); 565 566 ram_size = (config0 & CONFIG_RAMSIZE) >> CONFIG_RAMSIZE_SHIFT; 567 ram_width = (config0 & CONFIG_RAMWIDTH) >> CONFIG_RAMWIDTH_SHIFT; 568 ram_speed = (config0 & CONFIG_RAMSPEED) >> CONFIG_RAMSPEED_SHIFT; 569 rom_size = (config0 & CONFIG_ROMSIZE) >> CONFIG_ROMSIZE_SHIFT; 570 571 ram_split = (config1 & CONFIG_RAMSPLIT) >> CONFIG_RAMSPLIT_SHIFT; 572 573 printf("%s: address %s, %dKB %s-wide FIFO, %s Rx:Tx split\n", 574 sc->sc_dev.dv_xname, 575 ether_sprintf(LLADDR(sc->sc_ethercom.ec_if.if_sadl)), 576 8 << ram_size, 577 (ram_width) ? "word" : "byte", 578 onboard_ram_config[ram_split]); 579 } 580 581 582 /* 583 * Find supported media on 3c509-generation hardware that doesn't have 584 * a "reset_options" register in window 3. 585 * Use the config_cntrl register in window 0 instead. 586 * Used on original, 10Mbit ISA (3c509), 3c509B, and pre-Demon EISA cards 587 * that implement CONFIG_CTRL. We don't have a good way to set the 588 * default active mediuim; punt to ifconfig instead. 589 */ 590 void 591 ep_509_probemedia(sc) 592 struct ep_softc *sc; 593 { 594 bus_space_tag_t iot = sc->sc_iot; 595 bus_space_handle_t ioh = sc->sc_ioh; 596 struct ifmedia *ifm = &sc->sc_mii.mii_media; 597 u_int16_t ep_w0_config, port; 598 struct ep_media *epm; 599 const char *sep = "", *defmedianame = NULL; 600 int defmedia = 0; 601 602 GO_WINDOW(0); 603 ep_w0_config = bus_space_read_2(iot, ioh, ELINK_W0_CONFIG_CTRL); 604 605 printf("%s: ", sc->sc_dev.dv_xname); 606 607 /* Sanity check that there are any media! */ 608 if ((ep_w0_config & ELINK_W0_CC_MEDIAMASK) == 0) { 609 printf("no media present!\n"); 610 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 611 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 612 return; 613 } 614 615 /* 616 * Get the default media from the EEPROM. 617 */ 618 port = ep_read_eeprom(sc, EEPROM_ADDR_CFG) >> 14; 619 620 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 621 622 for (epm = ep_509_media; epm->epm_name != NULL; epm++) { 623 if (ep_w0_config & epm->epm_mpbit) { 624 /* 625 * This simple test works because 509 chipsets 626 * don't do full-duplex. 627 */ 628 if (epm->epm_epmedia == port || defmedia == 0) { 629 defmedia = epm->epm_ifmedia; 630 defmedianame = epm->epm_name; 631 } 632 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 633 NULL); 634 PRINT(epm->epm_name); 635 } 636 } 637 638 #undef PRINT 639 640 #ifdef DIAGNOSTIC 641 if (defmedia == 0) 642 panic("ep_509_probemedia: impossible"); 643 #endif 644 645 printf(" (default %s)\n", defmedianame); 646 ifmedia_set(ifm, defmedia); 647 } 648 649 /* 650 * Find media present on large-packet-capable elink3 devices. 651 * Show onboard configuration of large-packet-capable elink3 devices 652 * (Demon, Vortex, Boomerang), which do not implement CONFIG_CTRL in window 0. 653 * Use media and card-version info in window 3 instead. 654 */ 655 void 656 ep_vortex_probemedia(sc) 657 struct ep_softc *sc; 658 { 659 bus_space_tag_t iot = sc->sc_iot; 660 bus_space_handle_t ioh = sc->sc_ioh; 661 struct ifmedia *ifm = &sc->sc_mii.mii_media; 662 struct ep_media *epm; 663 u_int config1; 664 int reset_options; 665 int default_media; /* 3-bit encoding of default (EEPROM) media */ 666 int defmedia = 0; 667 const char *sep = "", *defmedianame = NULL; 668 669 GO_WINDOW(3); 670 config1 = (u_int)bus_space_read_2(iot, ioh, 671 ELINK_W3_INTERNAL_CONFIG + 2); 672 reset_options = (int)bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 673 GO_WINDOW(0); 674 675 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 676 677 printf("%s: ", sc->sc_dev.dv_xname); 678 679 /* Sanity check that there are any media! */ 680 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 681 printf("no media present!\n"); 682 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 683 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 684 return; 685 } 686 687 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 688 689 for (epm = ep_vortex_media; epm->epm_name != NULL; epm++) { 690 if (reset_options & epm->epm_mpbit) { 691 /* 692 * Default media is a little more complicated 693 * on the Vortex. We support full-duplex which 694 * uses the same reset options bit. 695 * 696 * XXX Check EEPROM for default to FDX? 697 */ 698 if (epm->epm_epmedia == default_media) { 699 if ((epm->epm_ifmedia & IFM_FDX) == 0) { 700 defmedia = epm->epm_ifmedia; 701 defmedianame = epm->epm_name; 702 } 703 } else if (defmedia == 0) { 704 defmedia = epm->epm_ifmedia; 705 defmedianame = epm->epm_name; 706 } 707 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 708 NULL); 709 PRINT(epm->epm_name); 710 } 711 } 712 713 #undef PRINT 714 715 #ifdef DIAGNOSTIC 716 if (defmedia == 0) 717 panic("ep_vortex_probemedia: impossible"); 718 #endif 719 720 printf(" (default %s)\n", defmedianame); 721 ifmedia_set(ifm, defmedia); 722 } 723 724 /* 725 * One second timer, used to tick the MII. 726 */ 727 void 728 ep_tick(arg) 729 void *arg; 730 { 731 struct ep_softc *sc = arg; 732 int s; 733 734 #ifdef DIAGNOSTIC 735 if ((sc->ep_flags & ELINK_FLAGS_MII) == 0) 736 panic("ep_tick"); 737 #endif 738 739 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 740 return; 741 742 s = splnet(); 743 mii_tick(&sc->sc_mii); 744 splx(s); 745 746 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 747 } 748 749 /* 750 * Bring device up. 751 * 752 * The order in here seems important. Otherwise we may not receive 753 * interrupts. ?! 754 */ 755 void 756 epinit(sc) 757 struct ep_softc *sc; 758 { 759 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 760 bus_space_tag_t iot = sc->sc_iot; 761 bus_space_handle_t ioh = sc->sc_ioh; 762 int i; 763 764 /* Make sure any pending reset has completed before touching board. */ 765 ep_finish_reset(iot, ioh); 766 767 /* 768 * Cance any pending I/O. 769 */ 770 epstop(sc); 771 772 if (sc->bustype != ELINK_BUS_PCI && sc->bustype != ELINK_BUS_EISA) { 773 GO_WINDOW(0); 774 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 0); 775 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 776 ENABLE_DRQ_IRQ); 777 } 778 779 if (sc->bustype == ELINK_BUS_PCMCIA) { 780 bus_space_write_2(iot, ioh, ELINK_W0_RESOURCE_CFG, 0x3f00); 781 } 782 783 GO_WINDOW(2); 784 for (i = 0; i < 6; i++) /* Reload the ether_addr. */ 785 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 786 LLADDR(ifp->if_sadl)[i]); 787 788 /* 789 * Reset the station-address receive filter. 790 * A bug workaround for busmastering (Vortex, Demon) cards. 791 */ 792 for (i = 0; i < 6; i++) 793 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 794 795 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 796 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 797 798 GO_WINDOW(1); /* Window 1 is operating window */ 799 for (i = 0; i < 31; i++) 800 bus_space_read_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS)); 801 802 /* Set threshhold for for Tx-space avaiable interrupt. */ 803 bus_space_write_2(iot, ioh, ELINK_COMMAND, 804 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 805 806 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 807 /* 808 * Enable options in the PCMCIA LAN COR register, via 809 * RoadRunner Window 1. 810 * 811 * XXX MAGIC CONSTANTS! 812 */ 813 u_int16_t cor; 814 815 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, (1 << 11)); 816 817 cor = bus_space_read_2(iot, ioh, 0) & ~0x30; 818 if (sc->ep_flags & ELINK_FLAGS_USESHAREDMEM) 819 cor |= 0x10; 820 if (sc->ep_flags & ELINK_FLAGS_FORCENOWAIT) 821 cor |= 0x20; 822 bus_space_write_2(iot, ioh, 0, cor); 823 824 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 825 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 826 827 if (sc->ep_flags & ELINK_FLAGS_MII) { 828 ep_roadrunner_mii_enable(sc); 829 GO_WINDOW(1); 830 } 831 } 832 833 /* Enable interrupts. */ 834 bus_space_write_2(iot, ioh, ELINK_COMMAND, 835 SET_RD_0_MASK | S_CARD_FAILURE | S_RX_COMPLETE | S_TX_COMPLETE | 836 S_TX_AVAIL); 837 bus_space_write_2(iot, ioh, ELINK_COMMAND, 838 SET_INTR_MASK | S_CARD_FAILURE | S_RX_COMPLETE | S_TX_COMPLETE | 839 S_TX_AVAIL); 840 841 /* 842 * Attempt to get rid of any stray interrupts that occured during 843 * configuration. On the i386 this isn't possible because one may 844 * already be queued. However, a single stray interrupt is 845 * unimportant. 846 */ 847 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 848 849 epsetfilter(sc); 850 epsetmedia(sc); 851 852 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 853 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 854 855 epmbuffill(sc); 856 857 /* Interface is now `running', with no output active. */ 858 ifp->if_flags |= IFF_RUNNING; 859 ifp->if_flags &= ~IFF_OACTIVE; 860 861 if (sc->ep_flags & ELINK_FLAGS_MII) { 862 /* Start the one second clock. */ 863 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 864 } 865 866 /* Attempt to start output, if any. */ 867 epstart(ifp); 868 } 869 870 871 /* 872 * Set multicast receive filter. 873 * elink3 hardware has no selective multicast filter in hardware. 874 * Enable reception of all multicasts and filter in software. 875 */ 876 void 877 epsetfilter(sc) 878 struct ep_softc *sc; 879 { 880 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 881 882 GO_WINDOW(1); /* Window 1 is operating window */ 883 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 884 SET_RX_FILTER | FIL_INDIVIDUAL | FIL_BRDCST | 885 ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0) | 886 ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0)); 887 } 888 889 int 890 ep_media_change(ifp) 891 struct ifnet *ifp; 892 { 893 struct ep_softc *sc = ifp->if_softc; 894 895 if (sc->enabled && (ifp->if_flags & IFF_UP) != 0) 896 epreset(sc); 897 898 return (0); 899 } 900 901 /* 902 * Reset and enable the MII on the RoadRunner. 903 */ 904 void 905 ep_roadrunner_mii_enable(sc) 906 struct ep_softc *sc; 907 { 908 bus_space_tag_t iot = sc->sc_iot; 909 bus_space_handle_t ioh = sc->sc_ioh; 910 911 GO_WINDOW(3); 912 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 913 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 914 delay(1000); 915 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 916 ELINK_PCI_100BASE_MII|ELINK_RUNNER_MII_RESET| 917 ELINK_RUNNER_ENABLE_MII); 918 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 919 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 920 delay(1000); 921 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 922 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 923 } 924 925 /* 926 * Set the card to use the specified media. 927 */ 928 void 929 epsetmedia(sc) 930 struct ep_softc *sc; 931 { 932 bus_space_tag_t iot = sc->sc_iot; 933 bus_space_handle_t ioh = sc->sc_ioh; 934 935 /* Turn everything off. First turn off linkbeat and UTP. */ 936 GO_WINDOW(4); 937 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0x0); 938 939 /* Turn off coax */ 940 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 941 delay(1000); 942 943 /* 944 * If the device has MII, select it, and then tell the 945 * PHY which media to use. 946 */ 947 if (sc->ep_flags & ELINK_FLAGS_MII) { 948 int config0, config1; 949 950 GO_WINDOW(3); 951 952 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 953 int resopt; 954 955 resopt = bus_space_read_2(iot, ioh, 956 ELINK_W3_RESET_OPTIONS); 957 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 958 resopt | ELINK_RUNNER_ENABLE_MII); 959 } 960 961 config0 = (u_int)bus_space_read_2(iot, ioh, 962 ELINK_W3_INTERNAL_CONFIG); 963 config1 = (u_int)bus_space_read_2(iot, ioh, 964 ELINK_W3_INTERNAL_CONFIG + 2); 965 966 config1 = config1 & ~CONFIG_MEDIAMASK; 967 config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT); 968 969 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 970 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 971 config1); 972 GO_WINDOW(1); /* back to operating window */ 973 974 mii_mediachg(&sc->sc_mii); 975 return; 976 } 977 978 /* 979 * Now turn on the selected media/transceiver. 980 */ 981 GO_WINDOW(4); 982 switch (IFM_SUBTYPE(sc->sc_mii.mii_media.ifm_cur->ifm_media)) { 983 case IFM_10_T: 984 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 985 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 986 break; 987 988 case IFM_10_2: 989 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 990 DELAY(1000); /* 50ms not enmough? */ 991 break; 992 993 case IFM_100_TX: 994 case IFM_100_FX: 995 case IFM_100_T4: /* XXX check documentation */ 996 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 997 LINKBEAT_ENABLE); 998 DELAY(1000); /* not strictly necessary? */ 999 break; 1000 1001 case IFM_10_5: 1002 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 1003 SQE_ENABLE); 1004 DELAY(1000); /* not strictly necessary? */ 1005 break; 1006 1007 case IFM_MANUAL: 1008 /* 1009 * Nothing to do here; we are actually enabling the 1010 * external PHY on the MII port. 1011 */ 1012 break; 1013 1014 case IFM_NONE: 1015 printf("%s: interface disabled\n", sc->sc_dev.dv_xname); 1016 return; 1017 1018 default: 1019 panic("epsetmedia: impossible"); 1020 } 1021 1022 /* 1023 * Tell the chip which port to use. 1024 */ 1025 switch (sc->ep_chipset) { 1026 case ELINK_CHIPSET_VORTEX: 1027 case ELINK_CHIPSET_BOOMERANG: 1028 { 1029 int mctl, config0, config1; 1030 1031 GO_WINDOW(3); 1032 config0 = (u_int)bus_space_read_2(iot, ioh, 1033 ELINK_W3_INTERNAL_CONFIG); 1034 config1 = (u_int)bus_space_read_2(iot, ioh, 1035 ELINK_W3_INTERNAL_CONFIG + 2); 1036 1037 config1 = config1 & ~CONFIG_MEDIAMASK; 1038 config1 |= (sc->sc_mii.mii_media.ifm_cur->ifm_data << 1039 CONFIG_MEDIAMASK_SHIFT); 1040 1041 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 1042 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 1043 config1); 1044 1045 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1046 if (sc->sc_mii.mii_media.ifm_cur->ifm_media & IFM_FDX) 1047 mctl |= MAC_CONTROL_FDX; 1048 else 1049 mctl &= ~MAC_CONTROL_FDX; 1050 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1051 break; 1052 } 1053 default: 1054 { 1055 int w0_addr_cfg; 1056 1057 GO_WINDOW(0); 1058 w0_addr_cfg = bus_space_read_2(iot, ioh, ELINK_W0_ADDRESS_CFG); 1059 w0_addr_cfg &= 0x3fff; 1060 bus_space_write_2(iot, ioh, ELINK_W0_ADDRESS_CFG, w0_addr_cfg | 1061 (sc->sc_mii.mii_media.ifm_cur->ifm_data << 14)); 1062 DELAY(1000); 1063 break; 1064 } 1065 } 1066 1067 GO_WINDOW(1); /* Window 1 is operating window */ 1068 } 1069 1070 /* 1071 * Get currently-selected media from card. 1072 * (if_media callback, may be called before interface is brought up). 1073 */ 1074 void 1075 ep_media_status(ifp, req) 1076 struct ifnet *ifp; 1077 struct ifmediareq *req; 1078 { 1079 struct ep_softc *sc = ifp->if_softc; 1080 bus_space_tag_t iot = sc->sc_iot; 1081 bus_space_handle_t ioh = sc->sc_ioh; 1082 1083 if (sc->enabled == 0) { 1084 req->ifm_active = IFM_ETHER|IFM_NONE; 1085 req->ifm_status = 0; 1086 return; 1087 } 1088 1089 /* 1090 * If we have MII, go ask the PHY what's going on. 1091 */ 1092 if (sc->ep_flags & ELINK_FLAGS_MII) { 1093 mii_pollstat(&sc->sc_mii); 1094 req->ifm_active = sc->sc_mii.mii_media_active; 1095 req->ifm_status = sc->sc_mii.mii_media_status; 1096 return; 1097 } 1098 1099 /* 1100 * Ok, at this point we claim that our active media is 1101 * the currently selected media. We'll update our status 1102 * if our chipset allows us to detect link. 1103 */ 1104 req->ifm_active = sc->sc_mii.mii_media.ifm_cur->ifm_media; 1105 req->ifm_status = 0; 1106 1107 switch (sc->ep_chipset) { 1108 case ELINK_CHIPSET_VORTEX: 1109 case ELINK_CHIPSET_BOOMERANG: 1110 GO_WINDOW(4); 1111 req->ifm_status = IFM_AVALID; 1112 if (bus_space_read_2(iot, ioh, ELINK_W4_MEDIA_TYPE) & 1113 LINKBEAT_DETECT) 1114 req->ifm_status |= IFM_ACTIVE; 1115 GO_WINDOW(1); /* back to operating window */ 1116 break; 1117 } 1118 } 1119 1120 1121 1122 /* 1123 * Start outputting on the interface. 1124 * Always called as splnet(). 1125 */ 1126 void 1127 epstart(ifp) 1128 struct ifnet *ifp; 1129 { 1130 struct ep_softc *sc = ifp->if_softc; 1131 bus_space_tag_t iot = sc->sc_iot; 1132 bus_space_handle_t ioh = sc->sc_ioh; 1133 struct mbuf *m, *m0; 1134 int sh, len, pad; 1135 bus_addr_t txreg; 1136 1137 /* Don't transmit if interface is busy or not running */ 1138 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1139 return; 1140 1141 startagain: 1142 /* Sneak a peek at the next packet */ 1143 m0 = ifp->if_snd.ifq_head; 1144 if (m0 == 0) 1145 return; 1146 1147 /* We need to use m->m_pkthdr.len, so require the header */ 1148 if ((m0->m_flags & M_PKTHDR) == 0) 1149 panic("epstart: no header mbuf"); 1150 len = m0->m_pkthdr.len; 1151 1152 pad = (4 - len) & 3; 1153 1154 /* 1155 * The 3c509 automatically pads short packets to minimum ethernet 1156 * length, but we drop packets that are too large. Perhaps we should 1157 * truncate them instead? 1158 */ 1159 if (len + pad > ETHER_MAX_LEN) { 1160 /* packet is obviously too large: toss it */ 1161 ++ifp->if_oerrors; 1162 IF_DEQUEUE(&ifp->if_snd, m0); 1163 m_freem(m0); 1164 goto readcheck; 1165 } 1166 1167 if (bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_FREE_TX)) < 1168 len + pad + 4) { 1169 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1170 SET_TX_AVAIL_THRESH | 1171 ((len + pad + 4) >> sc->ep_pktlenshift)); 1172 /* not enough room in FIFO */ 1173 ifp->if_flags |= IFF_OACTIVE; 1174 return; 1175 } else { 1176 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1177 SET_TX_AVAIL_THRESH | ELINK_THRESH_DISABLE); 1178 } 1179 1180 IF_DEQUEUE(&ifp->if_snd, m0); 1181 if (m0 == 0) /* not really needed */ 1182 return; 1183 1184 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_TX_START_THRESH | 1185 ((len / 4 + sc->tx_start_thresh) /* >> sc->ep_pktlenshift*/)); 1186 1187 #if NBPFILTER > 0 1188 if (ifp->if_bpf) 1189 bpf_mtap(ifp->if_bpf, m0); 1190 #endif 1191 1192 /* 1193 * Do the output at splhigh() so that an interrupt from another device 1194 * won't cause a FIFO underrun. 1195 */ 1196 sh = splhigh(); 1197 1198 txreg = ep_w1_reg(sc, ELINK_W1_TX_PIO_WR_1); 1199 1200 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1201 /* 1202 * Prime the FIFO buffer counter (number of 16-bit 1203 * words about to be written to the FIFO). 1204 * 1205 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1206 * COUNTER IS NON-ZERO! 1207 */ 1208 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 1209 (len + pad) >> 1); 1210 } 1211 1212 bus_space_write_2(iot, ioh, txreg, len); 1213 bus_space_write_2(iot, ioh, txreg, 0xffff); /* Second is meaningless */ 1214 if (ELINK_IS_BUS_32(sc->bustype)) { 1215 for (m = m0; m;) { 1216 if (m->m_len > 3) { 1217 /* align our reads from core */ 1218 if (mtod(m, u_long) & 3) { 1219 u_long count = 1220 4 - (mtod(m, u_long) & 3); 1221 bus_space_write_multi_1(iot, ioh, 1222 txreg, mtod(m, u_int8_t *), count); 1223 m->m_data = 1224 (void *)(mtod(m, u_long) + count); 1225 m->m_len -= count; 1226 } 1227 bus_space_write_multi_stream_4(iot, ioh, 1228 txreg, mtod(m, u_int32_t *), m->m_len >> 2); 1229 m->m_data = (void *)(mtod(m, u_long) + 1230 (u_long)(m->m_len & ~3)); 1231 m->m_len -= m->m_len & ~3; 1232 } 1233 if (m->m_len) { 1234 bus_space_write_multi_1(iot, ioh, 1235 txreg, mtod(m, u_int8_t *), m->m_len); 1236 } 1237 MFREE(m, m0); 1238 m = m0; 1239 } 1240 } else { 1241 for (m = m0; m;) { 1242 if (m->m_len > 1) { 1243 if (mtod(m, u_long) & 1) { 1244 bus_space_write_1(iot, ioh, 1245 txreg, *(mtod(m, u_int8_t *))); 1246 m->m_data = 1247 (void *)(mtod(m, u_long) + 1); 1248 m->m_len -= 1; 1249 } 1250 bus_space_write_multi_stream_2(iot, ioh, 1251 txreg, mtod(m, u_int16_t *), 1252 m->m_len >> 1); 1253 } 1254 if (m->m_len & 1) { 1255 bus_space_write_1(iot, ioh, txreg, 1256 *(mtod(m, u_int8_t *) + m->m_len - 1)); 1257 } 1258 MFREE(m, m0); 1259 m = m0; 1260 } 1261 } 1262 while (pad--) 1263 bus_space_write_1(iot, ioh, txreg, 0); 1264 1265 splx(sh); 1266 1267 ++ifp->if_opackets; 1268 1269 readcheck: 1270 if ((bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)) & 1271 ERR_INCOMPLETE) == 0) { 1272 /* We received a complete packet. */ 1273 u_int16_t status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1274 1275 if ((status & S_INTR_LATCH) == 0) { 1276 /* 1277 * No interrupt, read the packet and continue 1278 * Is this supposed to happen? Is my motherboard 1279 * completely busted? 1280 */ 1281 epread(sc); 1282 } else { 1283 /* Got an interrupt, return so that it gets serviced. */ 1284 return; 1285 } 1286 } else { 1287 /* Check if we are stuck and reset [see XXX comment] */ 1288 if (epstatus(sc)) { 1289 if (ifp->if_flags & IFF_DEBUG) 1290 printf("%s: adapter reset\n", 1291 sc->sc_dev.dv_xname); 1292 epreset(sc); 1293 } 1294 } 1295 1296 goto startagain; 1297 } 1298 1299 1300 /* 1301 * XXX: The 3c509 card can get in a mode where both the fifo status bit 1302 * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set 1303 * We detect this situation and we reset the adapter. 1304 * It happens at times when there is a lot of broadcast traffic 1305 * on the cable (once in a blue moon). 1306 */ 1307 static int 1308 epstatus(sc) 1309 struct ep_softc *sc; 1310 { 1311 bus_space_tag_t iot = sc->sc_iot; 1312 bus_space_handle_t ioh = sc->sc_ioh; 1313 u_int16_t fifost; 1314 1315 /* 1316 * Check the FIFO status and act accordingly 1317 */ 1318 GO_WINDOW(4); 1319 fifost = bus_space_read_2(iot, ioh, ELINK_W4_FIFO_DIAG); 1320 GO_WINDOW(1); 1321 1322 if (fifost & FIFOS_RX_UNDERRUN) { 1323 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1324 printf("%s: RX underrun\n", sc->sc_dev.dv_xname); 1325 epreset(sc); 1326 return 0; 1327 } 1328 1329 if (fifost & FIFOS_RX_STATUS_OVERRUN) { 1330 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1331 printf("%s: RX Status overrun\n", sc->sc_dev.dv_xname); 1332 return 1; 1333 } 1334 1335 if (fifost & FIFOS_RX_OVERRUN) { 1336 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1337 printf("%s: RX overrun\n", sc->sc_dev.dv_xname); 1338 return 1; 1339 } 1340 1341 if (fifost & FIFOS_TX_OVERRUN) { 1342 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1343 printf("%s: TX overrun\n", sc->sc_dev.dv_xname); 1344 epreset(sc); 1345 return 0; 1346 } 1347 1348 return 0; 1349 } 1350 1351 1352 static void 1353 eptxstat(sc) 1354 struct ep_softc *sc; 1355 { 1356 bus_space_tag_t iot = sc->sc_iot; 1357 bus_space_handle_t ioh = sc->sc_ioh; 1358 int i; 1359 1360 /* 1361 * We need to read+write TX_STATUS until we get a 0 status 1362 * in order to turn off the interrupt flag. 1363 */ 1364 while ((i = bus_space_read_1(iot, ioh, 1365 ep_w1_reg(sc, ELINK_W1_TX_STATUS))) & TXS_COMPLETE) { 1366 bus_space_write_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS), 1367 0x0); 1368 1369 if (i & TXS_JABBER) { 1370 ++sc->sc_ethercom.ec_if.if_oerrors; 1371 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1372 printf("%s: jabber (%x)\n", 1373 sc->sc_dev.dv_xname, i); 1374 epreset(sc); 1375 } else if (i & TXS_UNDERRUN) { 1376 ++sc->sc_ethercom.ec_if.if_oerrors; 1377 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1378 printf("%s: fifo underrun (%x) @%d\n", 1379 sc->sc_dev.dv_xname, i, 1380 sc->tx_start_thresh); 1381 if (sc->tx_succ_ok < 100) 1382 sc->tx_start_thresh = min(ETHER_MAX_LEN, 1383 sc->tx_start_thresh + 20); 1384 sc->tx_succ_ok = 0; 1385 epreset(sc); 1386 } else if (i & TXS_MAX_COLLISION) { 1387 ++sc->sc_ethercom.ec_if.if_collisions; 1388 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 1389 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1390 } else 1391 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 1392 } 1393 } 1394 1395 int 1396 epintr(arg) 1397 void *arg; 1398 { 1399 struct ep_softc *sc = arg; 1400 bus_space_tag_t iot = sc->sc_iot; 1401 bus_space_handle_t ioh = sc->sc_ioh; 1402 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1403 u_int16_t status; 1404 int ret = 0; 1405 int addrandom = 0; 1406 1407 if (sc->enabled == 0 || 1408 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1409 return (0); 1410 1411 for (;;) { 1412 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1413 1414 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1415 1416 if ((status & (S_TX_COMPLETE | S_TX_AVAIL | 1417 S_RX_COMPLETE | S_CARD_FAILURE)) == 0) { 1418 if ((status & S_INTR_LATCH) == 0) { 1419 #if 0 1420 printf("%s: intr latch cleared\n", 1421 sc->sc_dev.dv_xname); 1422 #endif 1423 break; 1424 } 1425 } 1426 1427 ret = 1; 1428 1429 /* 1430 * Acknowledge any interrupts. It's important that we do this 1431 * first, since there would otherwise be a race condition. 1432 * Due to the i386 interrupt queueing, we may get spurious 1433 * interrupts occasionally. 1434 */ 1435 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1436 (status & (C_INTR_LATCH | 1437 C_CARD_FAILURE | 1438 C_TX_COMPLETE | 1439 C_TX_AVAIL | 1440 C_RX_COMPLETE | 1441 C_RX_EARLY | 1442 C_INT_RQD | 1443 C_UPD_STATS))); 1444 1445 #if 0 1446 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1447 1448 printf("%s: intr%s%s%s%s\n", sc->sc_dev.dv_xname, 1449 (status & S_RX_COMPLETE)?" RX_COMPLETE":"", 1450 (status & S_TX_COMPLETE)?" TX_COMPLETE":"", 1451 (status & S_TX_AVAIL)?" TX_AVAIL":"", 1452 (status & S_CARD_FAILURE)?" CARD_FAILURE":""); 1453 #endif 1454 1455 if (status & S_RX_COMPLETE) { 1456 epread(sc); 1457 addrandom = 1; 1458 } 1459 if (status & S_TX_AVAIL) { 1460 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1461 epstart(&sc->sc_ethercom.ec_if); 1462 addrandom = 1; 1463 } 1464 if (status & S_CARD_FAILURE) { 1465 printf("%s: adapter failure (%x)\n", 1466 sc->sc_dev.dv_xname, status); 1467 #if 1 1468 epinit(sc); 1469 #else 1470 epreset(sc); 1471 #endif 1472 return (1); 1473 } 1474 if (status & S_TX_COMPLETE) { 1475 eptxstat(sc); 1476 epstart(ifp); 1477 addrandom = 1; 1478 } 1479 1480 #if NRND > 0 1481 if (status) 1482 rnd_add_uint32(&sc->rnd_source, status); 1483 #endif 1484 } 1485 1486 /* no more interrupts */ 1487 return (ret); 1488 } 1489 1490 void 1491 epread(sc) 1492 struct ep_softc *sc; 1493 { 1494 bus_space_tag_t iot = sc->sc_iot; 1495 bus_space_handle_t ioh = sc->sc_ioh; 1496 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1497 struct mbuf *m; 1498 struct ether_header *eh; 1499 int len; 1500 1501 len = bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1502 1503 again: 1504 if (ifp->if_flags & IFF_DEBUG) { 1505 int err = len & ERR_MASK; 1506 char *s = NULL; 1507 1508 if (len & ERR_INCOMPLETE) 1509 s = "incomplete packet"; 1510 else if (err == ERR_OVERRUN) 1511 s = "packet overrun"; 1512 else if (err == ERR_RUNT) 1513 s = "runt packet"; 1514 else if (err == ERR_ALIGNMENT) 1515 s = "bad alignment"; 1516 else if (err == ERR_CRC) 1517 s = "bad crc"; 1518 else if (err == ERR_OVERSIZE) 1519 s = "oversized packet"; 1520 else if (err == ERR_DRIBBLE) 1521 s = "dribble bits"; 1522 1523 if (s) 1524 printf("%s: %s\n", sc->sc_dev.dv_xname, s); 1525 } 1526 1527 if (len & ERR_INCOMPLETE) 1528 return; 1529 1530 if (len & ERR_RX) { 1531 ++ifp->if_ierrors; 1532 goto abort; 1533 } 1534 1535 len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */ 1536 1537 /* Pull packet off interface. */ 1538 m = epget(sc, len); 1539 if (m == 0) { 1540 ifp->if_ierrors++; 1541 goto abort; 1542 } 1543 1544 ++ifp->if_ipackets; 1545 1546 /* We assume the header fit entirely in one mbuf. */ 1547 eh = mtod(m, struct ether_header *); 1548 1549 #if NBPFILTER > 0 1550 /* 1551 * Check if there's a BPF listener on this interface. 1552 * If so, hand off the raw packet to BPF. 1553 */ 1554 if (ifp->if_bpf) { 1555 bpf_mtap(ifp->if_bpf, m); 1556 1557 /* 1558 * Note that the interface cannot be in promiscuous mode if 1559 * there are no BPF listeners. And if we are in promiscuous 1560 * mode, we have to check if this packet is really ours. 1561 */ 1562 if ((ifp->if_flags & IFF_PROMISC) && 1563 (eh->ether_dhost[0] & 1) == 0 && /* !mcast and !bcast */ 1564 bcmp(eh->ether_dhost, LLADDR(sc->sc_ethercom.ec_if.if_sadl), 1565 sizeof(eh->ether_dhost)) != 0) { 1566 m_freem(m); 1567 return; 1568 } 1569 } 1570 #endif 1571 (*ifp->if_input)(ifp, m); 1572 1573 /* 1574 * In periods of high traffic we can actually receive enough 1575 * packets so that the fifo overrun bit will be set at this point, 1576 * even though we just read a packet. In this case we 1577 * are not going to receive any more interrupts. We check for 1578 * this condition and read again until the fifo is not full. 1579 * We could simplify this test by not using epstatus(), but 1580 * rechecking the RX_STATUS register directly. This test could 1581 * result in unnecessary looping in cases where there is a new 1582 * packet but the fifo is not full, but it will not fix the 1583 * stuck behavior. 1584 * 1585 * Even with this improvement, we still get packet overrun errors 1586 * which are hurting performance. Maybe when I get some more time 1587 * I'll modify epread() so that it can handle RX_EARLY interrupts. 1588 */ 1589 if (epstatus(sc)) { 1590 len = bus_space_read_2(iot, ioh, 1591 ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1592 /* Check if we are stuck and reset [see XXX comment] */ 1593 if (len & ERR_INCOMPLETE) { 1594 if (ifp->if_flags & IFF_DEBUG) 1595 printf("%s: adapter reset\n", 1596 sc->sc_dev.dv_xname); 1597 epreset(sc); 1598 return; 1599 } 1600 goto again; 1601 } 1602 1603 return; 1604 1605 abort: 1606 ep_discard_rxtop(iot, ioh); 1607 1608 } 1609 1610 struct mbuf * 1611 epget(sc, totlen) 1612 struct ep_softc *sc; 1613 int totlen; 1614 { 1615 bus_space_tag_t iot = sc->sc_iot; 1616 bus_space_handle_t ioh = sc->sc_ioh; 1617 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1618 struct mbuf *top, **mp, *m, *rv = NULL; 1619 bus_addr_t rxreg; 1620 int len, remaining; 1621 int sh; 1622 1623 m = sc->mb[sc->next_mb]; 1624 sc->mb[sc->next_mb] = 0; 1625 if (m == 0) { 1626 MGETHDR(m, M_DONTWAIT, MT_DATA); 1627 if (m == 0) 1628 return 0; 1629 } else { 1630 /* If the queue is no longer full, refill. */ 1631 if (sc->last_mb == sc->next_mb) 1632 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1633 /* Convert one of our saved mbuf's. */ 1634 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1635 m->m_data = m->m_pktdat; 1636 m->m_flags = M_PKTHDR; 1637 bzero(&m->m_pkthdr, sizeof(m->m_pkthdr)); 1638 } 1639 m->m_pkthdr.rcvif = ifp; 1640 m->m_pkthdr.len = totlen; 1641 len = MHLEN; 1642 top = 0; 1643 mp = ⊤ 1644 1645 /* 1646 * We read the packet at splhigh() so that an interrupt from another 1647 * device doesn't cause the card's buffer to overflow while we're 1648 * reading it. We may still lose packets at other times. 1649 */ 1650 sh = splhigh(); 1651 1652 rxreg = ep_w1_reg(sc, ELINK_W1_RX_PIO_RD_1); 1653 1654 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1655 /* 1656 * Prime the FIFO buffer counter (number of 16-bit 1657 * words about to be read from the FIFO). 1658 * 1659 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1660 * COUNTER IS NON-ZERO! 1661 */ 1662 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, totlen >> 1); 1663 } 1664 1665 while (totlen > 0) { 1666 if (top) { 1667 m = sc->mb[sc->next_mb]; 1668 sc->mb[sc->next_mb] = 0; 1669 if (m == 0) { 1670 MGET(m, M_DONTWAIT, MT_DATA); 1671 if (m == 0) { 1672 m_freem(top); 1673 goto out; 1674 } 1675 } else { 1676 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1677 } 1678 len = MLEN; 1679 } 1680 if (totlen >= MINCLSIZE) { 1681 MCLGET(m, M_DONTWAIT); 1682 if ((m->m_flags & M_EXT) == 0) { 1683 m_free(m); 1684 m_freem(top); 1685 goto out; 1686 } 1687 len = MCLBYTES; 1688 } 1689 if (top == 0) { 1690 /* align the struct ip header */ 1691 caddr_t newdata = (caddr_t) 1692 ALIGN(m->m_data + sizeof(struct ether_header)) 1693 - sizeof(struct ether_header); 1694 len -= newdata - m->m_data; 1695 m->m_data = newdata; 1696 } 1697 remaining = len = min(totlen, len); 1698 if (ELINK_IS_BUS_32(sc->bustype)) { 1699 u_long offset = mtod(m, u_long); 1700 /* 1701 * Read bytes up to the point where we are aligned. 1702 * (We can align to 4 bytes, rather than ALIGNBYTES, 1703 * here because we're later reading 4-byte chunks.) 1704 */ 1705 if ((remaining > 3) && (offset & 3)) { 1706 int count = (4 - (offset & 3)); 1707 bus_space_read_multi_1(iot, ioh, 1708 rxreg, (u_int8_t *) offset, count); 1709 offset += count; 1710 remaining -= count; 1711 } 1712 if (remaining > 3) { 1713 bus_space_read_multi_stream_4(iot, ioh, 1714 rxreg, (u_int32_t *) offset, 1715 remaining >> 2); 1716 offset += remaining & ~3; 1717 remaining &= 3; 1718 } 1719 if (remaining) { 1720 bus_space_read_multi_1(iot, ioh, 1721 rxreg, (u_int8_t *) offset, remaining); 1722 } 1723 } else { 1724 u_long offset = mtod(m, u_long); 1725 if ((remaining > 1) && (offset & 1)) { 1726 bus_space_read_multi_1(iot, ioh, 1727 rxreg, (u_int8_t *) offset, 1); 1728 remaining -= 1; 1729 offset += 1; 1730 } 1731 if (remaining > 1) { 1732 bus_space_read_multi_stream_2(iot, ioh, 1733 rxreg, (u_int16_t *) offset, 1734 remaining >> 1); 1735 offset += remaining & ~1; 1736 } 1737 if (remaining & 1) { 1738 bus_space_read_multi_1(iot, ioh, 1739 rxreg, (u_int8_t *) offset, remaining & 1); 1740 } 1741 } 1742 m->m_len = len; 1743 totlen -= len; 1744 *mp = m; 1745 mp = &m->m_next; 1746 } 1747 1748 rv = top; 1749 1750 ep_discard_rxtop(iot, ioh); 1751 1752 out: 1753 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 1754 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1755 splx(sh); 1756 1757 return rv; 1758 } 1759 1760 int 1761 epioctl(ifp, cmd, data) 1762 struct ifnet *ifp; 1763 u_long cmd; 1764 caddr_t data; 1765 { 1766 struct ep_softc *sc = ifp->if_softc; 1767 struct ifaddr *ifa = (struct ifaddr *)data; 1768 struct ifreq *ifr = (struct ifreq *)data; 1769 int s, error = 0; 1770 1771 s = splnet(); 1772 1773 switch (cmd) { 1774 1775 case SIOCSIFADDR: 1776 if ((error = epenable(sc)) != 0) 1777 break; 1778 /* epinit is called just below */ 1779 ifp->if_flags |= IFF_UP; 1780 switch (ifa->ifa_addr->sa_family) { 1781 #ifdef INET 1782 case AF_INET: 1783 epinit(sc); 1784 arp_ifinit(&sc->sc_ethercom.ec_if, ifa); 1785 break; 1786 #endif 1787 #ifdef NS 1788 case AF_NS: 1789 { 1790 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1791 1792 if (ns_nullhost(*ina)) 1793 ina->x_host = *(union ns_host *) 1794 LLADDR(ifp->if_sadl); 1795 else 1796 bcopy(ina->x_host.c_host, 1797 LLADDR(ifp->if_sadl), 1798 ifp->if_addrlen); 1799 /* Set new address. */ 1800 epinit(sc); 1801 break; 1802 } 1803 #endif 1804 default: 1805 epinit(sc); 1806 break; 1807 } 1808 break; 1809 1810 case SIOCSIFMEDIA: 1811 case SIOCGIFMEDIA: 1812 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 1813 break; 1814 1815 case SIOCSIFFLAGS: 1816 if ((ifp->if_flags & IFF_UP) == 0 && 1817 (ifp->if_flags & IFF_RUNNING) != 0) { 1818 /* 1819 * If interface is marked down and it is running, then 1820 * stop it. 1821 */ 1822 epstop(sc); 1823 ifp->if_flags &= ~IFF_RUNNING; 1824 epdisable(sc); 1825 } else if ((ifp->if_flags & IFF_UP) != 0 && 1826 (ifp->if_flags & IFF_RUNNING) == 0) { 1827 /* 1828 * If interface is marked up and it is stopped, then 1829 * start it. 1830 */ 1831 if ((error = epenable(sc)) != 0) 1832 break; 1833 epinit(sc); 1834 } else if ((ifp->if_flags & IFF_UP) != 0) { 1835 /* 1836 * deal with flags changes: 1837 * IFF_MULTICAST, IFF_PROMISC. 1838 */ 1839 epsetfilter(sc); 1840 } 1841 break; 1842 1843 case SIOCADDMULTI: 1844 case SIOCDELMULTI: 1845 if (sc->enabled == 0) { 1846 error = EIO; 1847 break; 1848 } 1849 1850 error = (cmd == SIOCADDMULTI) ? 1851 ether_addmulti(ifr, &sc->sc_ethercom) : 1852 ether_delmulti(ifr, &sc->sc_ethercom); 1853 1854 if (error == ENETRESET) { 1855 /* 1856 * Multicast list has changed; set the hardware filter 1857 * accordingly. 1858 */ 1859 epreset(sc); 1860 error = 0; 1861 } 1862 break; 1863 1864 default: 1865 error = EINVAL; 1866 break; 1867 } 1868 1869 splx(s); 1870 return (error); 1871 } 1872 1873 void 1874 epreset(sc) 1875 struct ep_softc *sc; 1876 { 1877 int s; 1878 1879 s = splnet(); 1880 epinit(sc); 1881 splx(s); 1882 } 1883 1884 void 1885 epwatchdog(ifp) 1886 struct ifnet *ifp; 1887 { 1888 struct ep_softc *sc = ifp->if_softc; 1889 1890 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1891 ++sc->sc_ethercom.ec_if.if_oerrors; 1892 1893 epreset(sc); 1894 } 1895 1896 void 1897 epstop(sc) 1898 struct ep_softc *sc; 1899 { 1900 bus_space_tag_t iot = sc->sc_iot; 1901 bus_space_handle_t ioh = sc->sc_ioh; 1902 1903 if (sc->ep_flags & ELINK_FLAGS_MII) { 1904 /* Stop the one second clock. */ 1905 callout_stop(&sc->sc_mbuf_callout); 1906 1907 /* Down the MII. */ 1908 mii_down(&sc->sc_mii); 1909 } 1910 1911 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 1912 /* 1913 * Clear the FIFO buffer count, thus halting 1914 * any currently-running transactions. 1915 */ 1916 GO_WINDOW(1); /* sanity */ 1917 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 1918 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1919 } 1920 1921 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1922 ep_discard_rxtop(iot, ioh); 1923 1924 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1925 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1926 1927 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 1928 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 1929 1930 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1931 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK); 1932 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK); 1933 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RX_FILTER); 1934 1935 epmbufempty(sc); 1936 } 1937 1938 1939 /* 1940 * Before reboots, reset card completely. 1941 */ 1942 static void 1943 epshutdown(arg) 1944 void *arg; 1945 { 1946 struct ep_softc *sc = arg; 1947 int s = splnet(); 1948 1949 if (sc->enabled) { 1950 epstop(sc); 1951 ep_reset_cmd(sc, ELINK_COMMAND, GLOBAL_RESET); 1952 sc->enabled = 0; 1953 } 1954 splx(s); 1955 } 1956 1957 /* 1958 * We get eeprom data from the id_port given an offset into the 1959 * eeprom. Basically; after the ID_sequence is sent to all of 1960 * the cards; they enter the ID_CMD state where they will accept 1961 * command requests. 0x80-0xbf loads the eeprom data. We then 1962 * read the port 16 times and with every read; the cards check 1963 * for contention (ie: if one card writes a 0 bit and another 1964 * writes a 1 bit then the host sees a 0. At the end of the cycle; 1965 * each card compares the data on the bus; if there is a difference 1966 * then that card goes into ID_WAIT state again). In the meantime; 1967 * one bit of data is returned in the AX register which is conveniently 1968 * returned to us by bus_space_read_1(). Hence; we read 16 times getting one 1969 * bit of data with each read. 1970 * 1971 * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT! 1972 */ 1973 u_int16_t 1974 epreadeeprom(iot, ioh, offset) 1975 bus_space_tag_t iot; 1976 bus_space_handle_t ioh; 1977 int offset; 1978 { 1979 u_int16_t data = 0; 1980 int i; 1981 1982 bus_space_write_1(iot, ioh, 0, 0x80 + offset); 1983 delay(1000); 1984 for (i = 0; i < 16; i++) 1985 data = (data << 1) | (bus_space_read_2(iot, ioh, 0) & 1); 1986 return (data); 1987 } 1988 1989 static int 1990 epbusyeeprom(sc) 1991 struct ep_softc *sc; 1992 { 1993 bus_space_tag_t iot = sc->sc_iot; 1994 bus_space_handle_t ioh = sc->sc_ioh; 1995 int i = 100, j; 1996 1997 if (sc->bustype == ELINK_BUS_PCMCIA) { 1998 delay(1000); 1999 return 0; 2000 } 2001 2002 j = 0; /* bad GCC flow analysis */ 2003 while (i--) { 2004 j = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND); 2005 if (j & EEPROM_BUSY) 2006 delay(100); 2007 else 2008 break; 2009 } 2010 if (!i) { 2011 printf("\n%s: eeprom failed to come ready\n", 2012 sc->sc_dev.dv_xname); 2013 return (1); 2014 } 2015 if (j & EEPROM_TST_MODE) { 2016 /* XXX PnP mode? */ 2017 printf("\n%s: erase pencil mark!\n", sc->sc_dev.dv_xname); 2018 return (1); 2019 } 2020 return (0); 2021 } 2022 2023 u_int16_t 2024 ep_read_eeprom(sc, offset) 2025 struct ep_softc *sc; 2026 u_int16_t offset; 2027 { 2028 u_int16_t readcmd; 2029 2030 /* 2031 * RoadRunner has a larger EEPROM, so a different read command 2032 * is required. 2033 */ 2034 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) 2035 readcmd = READ_EEPROM_RR; 2036 else 2037 readcmd = READ_EEPROM; 2038 2039 if (epbusyeeprom(sc)) 2040 return (0); /* XXX why is eeprom busy? */ 2041 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W0_EEPROM_COMMAND, 2042 readcmd | offset); 2043 if (epbusyeeprom(sc)) 2044 return (0); /* XXX why is eeprom busy? */ 2045 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W0_EEPROM_DATA)); 2046 } 2047 2048 void 2049 epmbuffill(v) 2050 void *v; 2051 { 2052 struct ep_softc *sc = v; 2053 struct mbuf *m; 2054 int s, i; 2055 2056 s = splnet(); 2057 i = sc->last_mb; 2058 do { 2059 if (sc->mb[i] == 0) { 2060 MGET(m, M_DONTWAIT, MT_DATA); 2061 if (m == 0) 2062 break; 2063 sc->mb[i] = m; 2064 } 2065 i = (i + 1) % MAX_MBS; 2066 } while (i != sc->next_mb); 2067 sc->last_mb = i; 2068 /* If the queue was not filled, try again. */ 2069 if (sc->last_mb != sc->next_mb) 2070 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 2071 splx(s); 2072 } 2073 2074 void 2075 epmbufempty(sc) 2076 struct ep_softc *sc; 2077 { 2078 int s, i; 2079 2080 s = splnet(); 2081 for (i = 0; i<MAX_MBS; i++) { 2082 if (sc->mb[i]) { 2083 m_freem(sc->mb[i]); 2084 sc->mb[i] = NULL; 2085 } 2086 } 2087 sc->last_mb = sc->next_mb = 0; 2088 callout_stop(&sc->sc_mbuf_callout); 2089 splx(s); 2090 } 2091 2092 int 2093 epenable(sc) 2094 struct ep_softc *sc; 2095 { 2096 2097 if (sc->enabled == 0 && sc->enable != NULL) { 2098 if ((*sc->enable)(sc) != 0) { 2099 printf("%s: device enable failed\n", 2100 sc->sc_dev.dv_xname); 2101 return (EIO); 2102 } 2103 } 2104 2105 sc->enabled = 1; 2106 return (0); 2107 } 2108 2109 void 2110 epdisable(sc) 2111 struct ep_softc *sc; 2112 { 2113 2114 if (sc->enabled != 0 && sc->disable != NULL) { 2115 (*sc->disable)(sc); 2116 sc->enabled = 0; 2117 } 2118 } 2119 2120 /* 2121 * ep_activate: 2122 * 2123 * Handle device activation/deactivation requests. 2124 */ 2125 int 2126 ep_activate(self, act) 2127 struct device *self; 2128 enum devact act; 2129 { 2130 struct ep_softc *sc = (struct ep_softc *)self; 2131 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2132 int error = 0, s; 2133 2134 s = splnet(); 2135 switch (act) { 2136 case DVACT_ACTIVATE: 2137 error = EOPNOTSUPP; 2138 break; 2139 2140 case DVACT_DEACTIVATE: 2141 if (sc->ep_flags & ELINK_FLAGS_MII) 2142 mii_activate(&sc->sc_mii, act, MII_PHY_ANY, 2143 MII_OFFSET_ANY); 2144 if_deactivate(ifp); 2145 break; 2146 } 2147 splx(s); 2148 return (error); 2149 } 2150 2151 /* 2152 * ep_detach: 2153 * 2154 * Detach a elink3 interface. 2155 */ 2156 int 2157 ep_detach(self, flags) 2158 struct device *self; 2159 int flags; 2160 { 2161 struct ep_softc *sc = (struct ep_softc *)self; 2162 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2163 2164 /* Succeed now if there's no work to do. */ 2165 if ((sc->sc_flags & ELINK_FLAGS_ATTACHED) == 0) 2166 return (0); 2167 2168 epdisable(sc); 2169 2170 callout_stop(&sc->sc_mii_callout); 2171 callout_stop(&sc->sc_mbuf_callout); 2172 2173 if (sc->ep_flags & ELINK_FLAGS_MII) { 2174 /* Detach all PHYs */ 2175 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 2176 } 2177 2178 /* Delete all remaining media. */ 2179 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 2180 2181 #if NRND > 0 2182 rnd_detach_source(&sc->rnd_source); 2183 #endif 2184 #if NBPFILTER > 0 2185 bpfdetach(ifp); 2186 #endif 2187 ether_ifdetach(ifp); 2188 if_detach(ifp); 2189 2190 shutdownhook_disestablish(sc->sd_hook); 2191 2192 return (0); 2193 } 2194 2195 u_int32_t 2196 ep_mii_bitbang_read(self) 2197 struct device *self; 2198 { 2199 struct ep_softc *sc = (void *) self; 2200 2201 /* We're already in Window 4. */ 2202 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 2203 ELINK_W4_BOOM_PHYSMGMT)); 2204 } 2205 2206 void 2207 ep_mii_bitbang_write(self, val) 2208 struct device *self; 2209 u_int32_t val; 2210 { 2211 struct ep_softc *sc = (void *) self; 2212 2213 /* We're already in Window 4. */ 2214 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 2215 ELINK_W4_BOOM_PHYSMGMT, val); 2216 } 2217 2218 int 2219 ep_mii_readreg(self, phy, reg) 2220 struct device *self; 2221 int phy, reg; 2222 { 2223 struct ep_softc *sc = (void *) self; 2224 int val; 2225 2226 GO_WINDOW(4); 2227 2228 val = mii_bitbang_readreg(self, &ep_mii_bitbang_ops, phy, reg); 2229 2230 GO_WINDOW(1); 2231 2232 return (val); 2233 } 2234 2235 void 2236 ep_mii_writereg(self, phy, reg, val) 2237 struct device *self; 2238 int phy, reg, val; 2239 { 2240 struct ep_softc *sc = (void *) self; 2241 2242 GO_WINDOW(4); 2243 2244 mii_bitbang_writereg(self, &ep_mii_bitbang_ops, phy, reg, val); 2245 2246 GO_WINDOW(1); 2247 } 2248 2249 void 2250 ep_statchg(self) 2251 struct device *self; 2252 { 2253 struct ep_softc *sc = (struct ep_softc *)self; 2254 bus_space_tag_t iot = sc->sc_iot; 2255 bus_space_handle_t ioh = sc->sc_ioh; 2256 int mctl; 2257 2258 GO_WINDOW(3); 2259 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 2260 if (sc->sc_mii.mii_media_active & IFM_FDX) 2261 mctl |= MAC_CONTROL_FDX; 2262 else 2263 mctl &= ~MAC_CONTROL_FDX; 2264 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 2265 GO_WINDOW(1); /* back to operating window */ 2266 } 2267
Indexes created Mon Sep 29 18:09:42 GMT 2025