elink3.c revision 1.84
1 /* $NetBSD: elink3.c,v 1.84 2000/10/01 23:32:41 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1996, 1997 Jonathan Stone <jonathan (at) NetBSD.org> 42 * Copyright (c) 1994 Herb Peyerl <hpeyerl (at) beer.org> 43 * All rights reserved. 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice, this list of conditions and the following disclaimer. 50 * 2. Redistributions in binary form must reproduce the above copyright 51 * notice, this list of conditions and the following disclaimer in the 52 * documentation and/or other materials provided with the distribution. 53 * 3. All advertising materials mentioning features or use of this software 54 * must display the following acknowledgement: 55 * This product includes software developed by Herb Peyerl. 56 * 4. The name of Herb Peyerl may not be used to endorse or promote products 57 * derived from this software without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 60 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 61 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 62 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 63 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 64 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 65 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 66 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 67 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 68 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 #include "opt_inet.h" 72 #include "opt_ns.h" 73 #include "bpfilter.h" 74 #include "rnd.h" 75 76 #include <sys/param.h> 77 #include <sys/systm.h> 78 #include <sys/callout.h> 79 #include <sys/kernel.h> 80 #include <sys/mbuf.h> 81 #include <sys/socket.h> 82 #include <sys/ioctl.h> 83 #include <sys/errno.h> 84 #include <sys/syslog.h> 85 #include <sys/select.h> 86 #include <sys/device.h> 87 #if NRND > 0 88 #include <sys/rnd.h> 89 #endif 90 91 #include <net/if.h> 92 #include <net/if_dl.h> 93 #include <net/if_ether.h> 94 #include <net/if_media.h> 95 96 #ifdef INET 97 #include <netinet/in.h> 98 #include <netinet/in_systm.h> 99 #include <netinet/in_var.h> 100 #include <netinet/ip.h> 101 #include <netinet/if_inarp.h> 102 #endif 103 104 #ifdef NS 105 #include <netns/ns.h> 106 #include <netns/ns_if.h> 107 #endif 108 109 #if NBPFILTER > 0 110 #include <net/bpf.h> 111 #include <net/bpfdesc.h> 112 #endif 113 114 #include <machine/cpu.h> 115 #include <machine/bus.h> 116 #include <machine/intr.h> 117 118 #include <dev/mii/mii.h> 119 #include <dev/mii/miivar.h> 120 #include <dev/mii/mii_bitbang.h> 121 122 #include <dev/ic/elink3var.h> 123 #include <dev/ic/elink3reg.h> 124 125 #ifdef DEBUG 126 int epdebug = 0; 127 #endif 128 129 /* 130 * XXX endian workaround for big-endian CPUs with pcmcia: 131 * if stream methods for bus_space_multi are not provided, define them 132 * using non-stream bus_space_{read,write}_multi_. 133 * Assumes host CPU is same endian-ness as bus. 134 */ 135 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 136 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 137 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 138 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 139 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 140 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 141 142 /* 143 * Structure to map media-present bits in boards to ifmedia codes and 144 * printable media names. Used for table-driven ifmedia initialization. 145 */ 146 struct ep_media { 147 int epm_mpbit; /* media present bit */ 148 const char *epm_name; /* name of medium */ 149 int epm_ifmedia; /* ifmedia word for medium */ 150 int epm_epmedia; /* ELINKMEDIA_* constant */ 151 }; 152 153 /* 154 * Media table for the Demon/Vortex/Boomerang chipsets. 155 * 156 * Note that MII on the Demon and Vortex (3c59x) indicates an external 157 * MII connector (for connecting an external PHY) ... I think. Treat 158 * it as `manual' on these chips. 159 * 160 * Any Boomerang (3c90x) chips with MII really do have an internal 161 * MII and real PHYs attached; no `native' media. 162 */ 163 struct ep_media ep_vortex_media[] = { 164 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 165 ELINKMEDIA_10BASE_T }, 166 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 167 ELINKMEDIA_10BASE_T }, 168 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 169 ELINKMEDIA_AUI }, 170 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 171 ELINKMEDIA_10BASE_2 }, 172 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 173 ELINKMEDIA_100BASE_TX }, 174 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 175 ELINKMEDIA_100BASE_TX }, 176 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 177 ELINKMEDIA_100BASE_FX }, 178 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 179 ELINKMEDIA_MII }, 180 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 181 ELINKMEDIA_100BASE_T4 }, 182 { 0, NULL, 0, 183 0 }, 184 }; 185 186 /* 187 * Media table for the older 3Com Etherlink III chipset, used 188 * in the 3c509, 3c579, and 3c589. 189 */ 190 struct ep_media ep_509_media[] = { 191 { ELINK_W0_CC_UTP, "10baseT", IFM_ETHER|IFM_10_T, 192 ELINKMEDIA_10BASE_T }, 193 { ELINK_W0_CC_AUI, "10base5", IFM_ETHER|IFM_10_5, 194 ELINKMEDIA_AUI }, 195 { ELINK_W0_CC_BNC, "10base2", IFM_ETHER|IFM_10_2, 196 ELINKMEDIA_10BASE_2 }, 197 { 0, NULL, 0, 198 0 }, 199 }; 200 201 void ep_internalconfig __P((struct ep_softc *sc)); 202 void ep_vortex_probemedia __P((struct ep_softc *sc)); 203 void ep_509_probemedia __P((struct ep_softc *sc)); 204 205 static void eptxstat __P((struct ep_softc *)); 206 static int epstatus __P((struct ep_softc *)); 207 void epinit __P((struct ep_softc *)); 208 int epioctl __P((struct ifnet *, u_long, caddr_t)); 209 void epstart __P((struct ifnet *)); 210 void epwatchdog __P((struct ifnet *)); 211 void epreset __P((struct ep_softc *)); 212 static void epshutdown __P((void *)); 213 void epread __P((struct ep_softc *)); 214 struct mbuf *epget __P((struct ep_softc *, int)); 215 void epmbuffill __P((void *)); 216 void epmbufempty __P((struct ep_softc *)); 217 void epsetfilter __P((struct ep_softc *)); 218 void ep_roadrunner_mii_enable __P((struct ep_softc *)); 219 void epsetmedia __P((struct ep_softc *)); 220 221 /* ifmedia callbacks */ 222 int ep_media_change __P((struct ifnet *ifp)); 223 void ep_media_status __P((struct ifnet *ifp, struct ifmediareq *req)); 224 225 /* MII callbacks */ 226 int ep_mii_readreg __P((struct device *, int, int)); 227 void ep_mii_writereg __P((struct device *, int, int, int)); 228 void ep_statchg __P((struct device *)); 229 230 void ep_tick __P((void *)); 231 232 static int epbusyeeprom __P((struct ep_softc *)); 233 u_int16_t ep_read_eeprom __P((struct ep_softc *, u_int16_t)); 234 static inline void ep_reset_cmd __P((struct ep_softc *sc, 235 u_int cmd, u_int arg)); 236 static inline void ep_finish_reset __P((bus_space_tag_t, bus_space_handle_t)); 237 static inline void ep_discard_rxtop __P((bus_space_tag_t, bus_space_handle_t)); 238 static __inline int ep_w1_reg __P((struct ep_softc *, int)); 239 240 /* 241 * MII bit-bang glue. 242 */ 243 u_int32_t ep_mii_bitbang_read __P((struct device *)); 244 void ep_mii_bitbang_write __P((struct device *, u_int32_t)); 245 246 const struct mii_bitbang_ops ep_mii_bitbang_ops = { 247 ep_mii_bitbang_read, 248 ep_mii_bitbang_write, 249 { 250 PHYSMGMT_DATA, /* MII_BIT_MDO */ 251 PHYSMGMT_DATA, /* MII_BIT_MDI */ 252 PHYSMGMT_CLK, /* MII_BIT_MDC */ 253 PHYSMGMT_DIR, /* MII_BIT_DIR_HOST_PHY */ 254 0, /* MII_BIT_DIR_PHY_HOST */ 255 } 256 }; 257 258 /* 259 * Some chips (3c515 [Corkscrew] and 3c574 [RoadRunner]) have 260 * Window 1 registers offset! 261 */ 262 static __inline int 263 ep_w1_reg(sc, reg) 264 struct ep_softc *sc; 265 int reg; 266 { 267 268 switch (sc->ep_chipset) { 269 case ELINK_CHIPSET_CORKSCREW: 270 return (reg + 0x10); 271 272 case ELINK_CHIPSET_ROADRUNNER: 273 switch (reg) { 274 case ELINK_W1_FREE_TX: 275 case ELINK_W1_RUNNER_RDCTL: 276 case ELINK_W1_RUNNER_WRCTL: 277 return (reg); 278 } 279 return (reg + 0x10); 280 } 281 282 return (reg); 283 } 284 285 /* 286 * Wait for any pending reset to complete. 287 * On newer hardware we could poll SC_COMMAND_IN_PROGRESS, 288 * but older hardware doesn't implement it and we must delay. 289 */ 290 static inline void 291 ep_finish_reset(iot, ioh) 292 bus_space_tag_t iot; 293 bus_space_handle_t ioh; 294 { 295 int i; 296 297 for (i = 0; i < 10000; i++) { 298 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 299 S_COMMAND_IN_PROGRESS) == 0) 300 break; 301 DELAY(10); 302 } 303 } 304 305 /* 306 * Issue a (reset) command, and be sure it has completed. 307 * Used for global reset, TX_RESET, RX_RESET. 308 */ 309 static inline void 310 ep_reset_cmd(sc, cmd, arg) 311 struct ep_softc *sc; 312 u_int cmd, arg; 313 { 314 bus_space_tag_t iot = sc->sc_iot; 315 bus_space_handle_t ioh = sc->sc_ioh; 316 317 bus_space_write_2(iot, ioh, cmd, arg); 318 ep_finish_reset(iot, ioh); 319 } 320 321 322 static inline void 323 ep_discard_rxtop(iot, ioh) 324 bus_space_tag_t iot; 325 bus_space_handle_t ioh; 326 { 327 int i; 328 329 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISCARD_TOP_PACK); 330 331 /* 332 * Spin for about 1 msec, to avoid forcing a DELAY() between 333 * every received packet (adding latency and limiting pkt-recv rate). 334 * On PCI, at 4 30-nsec PCI bus cycles for a read, 8000 iterations 335 * is about right. 336 */ 337 for (i = 0; i < 8000; i++) { 338 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 339 S_COMMAND_IN_PROGRESS) == 0) 340 return; 341 } 342 343 /* Didn't complete in a hurry. Do DELAY()s. */ 344 ep_finish_reset(iot, ioh); 345 } 346 347 /* 348 * Back-end attach and configure. 349 */ 350 int 351 epconfig(sc, chipset, enaddr) 352 struct ep_softc *sc; 353 u_short chipset; 354 u_int8_t *enaddr; 355 { 356 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 357 bus_space_tag_t iot = sc->sc_iot; 358 bus_space_handle_t ioh = sc->sc_ioh; 359 u_int16_t i; 360 u_int8_t myla[ETHER_ADDR_LEN]; 361 362 callout_init(&sc->sc_mii_callout); 363 callout_init(&sc->sc_mbuf_callout); 364 365 sc->ep_chipset = chipset; 366 367 /* 368 * We could have been groveling around in other register 369 * windows in the front-end; make sure we're in window 0 370 * to read the EEPROM. 371 */ 372 GO_WINDOW(0); 373 374 if (enaddr == NULL) { 375 /* 376 * Read the station address from the eeprom. 377 */ 378 for (i = 0; i < ETHER_ADDR_LEN / 2; i++) { 379 u_int16_t x = ep_read_eeprom(sc, i); 380 myla[(i << 1)] = x >> 8; 381 myla[(i << 1) + 1] = x; 382 } 383 enaddr = myla; 384 } 385 386 /* 387 * Vortex-based (3c59x pci,eisa) and Boomerang (3c900) cards 388 * allow FDDI-sized (4500) byte packets. Commands only take an 389 * 11-bit parameter, and 11 bits isn't enough to hold a full-size 390 * packet length. 391 * Commands to these cards implicitly upshift a packet size 392 * or threshold by 2 bits. 393 * To detect cards with large-packet support, we probe by setting 394 * the transmit threshold register, then change windows and 395 * read back the threshold register directly, and see if the 396 * threshold value was shifted or not. 397 */ 398 bus_space_write_2(iot, ioh, ELINK_COMMAND, 399 SET_TX_AVAIL_THRESH | ELINK_LARGEWIN_PROBE); 400 GO_WINDOW(5); 401 i = bus_space_read_2(iot, ioh, ELINK_W5_TX_AVAIL_THRESH); 402 GO_WINDOW(1); 403 switch (i) { 404 case ELINK_LARGEWIN_PROBE: 405 case (ELINK_LARGEWIN_PROBE & ELINK_LARGEWIN_MASK): 406 sc->ep_pktlenshift = 0; 407 break; 408 409 case (ELINK_LARGEWIN_PROBE << 2): 410 sc->ep_pktlenshift = 2; 411 break; 412 413 default: 414 printf("%s: wrote 0x%x to TX_AVAIL_THRESH, read back 0x%x. " 415 "Interface disabled\n", 416 sc->sc_dev.dv_xname, ELINK_LARGEWIN_PROBE, (int) i); 417 return (1); 418 } 419 420 /* 421 * Ensure Tx-available interrupts are enabled for 422 * start the interface. 423 * XXX should be in epinit()? 424 */ 425 bus_space_write_2(iot, ioh, ELINK_COMMAND, 426 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 427 428 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 429 ifp->if_softc = sc; 430 ifp->if_start = epstart; 431 ifp->if_ioctl = epioctl; 432 ifp->if_watchdog = epwatchdog; 433 ifp->if_flags = 434 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 435 436 if_attach(ifp); 437 ether_ifattach(ifp, enaddr); 438 439 /* 440 * Finish configuration: 441 * determine chipset if the front-end couldn't do so, 442 * show board details, set media. 443 */ 444 445 /* 446 * Print RAM size. We also print the Ethernet address in here. 447 * It's extracted from the ifp, so we have to make sure it's 448 * been attached first. 449 */ 450 ep_internalconfig(sc); 451 GO_WINDOW(0); 452 453 /* 454 * Display some additional information, if pertinent. 455 */ 456 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 457 printf("%s: RoadRunner FIFO buffer enabled\n", 458 sc->sc_dev.dv_xname); 459 460 /* 461 * Initialize our media structures and MII info. We'll 462 * probe the MII if we discover that we have one. 463 */ 464 sc->sc_mii.mii_ifp = ifp; 465 sc->sc_mii.mii_readreg = ep_mii_readreg; 466 sc->sc_mii.mii_writereg = ep_mii_writereg; 467 sc->sc_mii.mii_statchg = ep_statchg; 468 ifmedia_init(&sc->sc_mii.mii_media, 0, ep_media_change, 469 ep_media_status); 470 471 /* 472 * Now, determine which media we have. 473 */ 474 switch (sc->ep_chipset) { 475 case ELINK_CHIPSET_ROADRUNNER: 476 if (sc->ep_flags & ELINK_FLAGS_MII) { 477 ep_roadrunner_mii_enable(sc); 478 GO_WINDOW(0); 479 } 480 /* FALLTHROUGH */ 481 482 case ELINK_CHIPSET_BOOMERANG: 483 /* 484 * If the device has MII, probe it. We won't be using 485 * any `native' media in this case, only PHYs. If 486 * we don't, just treat the Boomerang like the Vortex. 487 */ 488 if (sc->ep_flags & ELINK_FLAGS_MII) { 489 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 490 MII_PHY_ANY, MII_OFFSET_ANY, 0); 491 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 492 ifmedia_add(&sc->sc_mii.mii_media, 493 IFM_ETHER|IFM_NONE, 0, NULL); 494 ifmedia_set(&sc->sc_mii.mii_media, 495 IFM_ETHER|IFM_NONE); 496 } else { 497 ifmedia_set(&sc->sc_mii.mii_media, 498 IFM_ETHER|IFM_AUTO); 499 } 500 break; 501 } 502 /* FALLTHROUGH */ 503 504 case ELINK_CHIPSET_VORTEX: 505 ep_vortex_probemedia(sc); 506 break; 507 508 default: 509 ep_509_probemedia(sc); 510 break; 511 } 512 513 GO_WINDOW(1); /* Window 1 is operating window */ 514 515 #if NBPFILTER > 0 516 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 517 #endif 518 519 #if NRND > 0 520 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 521 RND_TYPE_NET, 0); 522 #endif 523 524 sc->tx_start_thresh = 20; /* probably a good starting point. */ 525 526 /* Establish callback to reset card when we reboot. */ 527 sc->sd_hook = shutdownhook_establish(epshutdown, sc); 528 529 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 530 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 531 532 /* The attach is successful. */ 533 sc->sc_flags |= ELINK_FLAGS_ATTACHED; 534 return (0); 535 } 536 537 538 /* 539 * Show interface-model-independent info from window 3 540 * internal-configuration register. 541 */ 542 void 543 ep_internalconfig(sc) 544 struct ep_softc *sc; 545 { 546 bus_space_tag_t iot = sc->sc_iot; 547 bus_space_handle_t ioh = sc->sc_ioh; 548 549 u_int config0; 550 u_int config1; 551 552 int ram_size, ram_width, ram_speed, rom_size, ram_split; 553 /* 554 * NVRAM buffer Rx:Tx config names for busmastering cards 555 * (Demon, Vortex, and later). 556 */ 557 const char *onboard_ram_config[] = { 558 "5:3", "3:1", "1:1", "3:5" }; 559 560 GO_WINDOW(3); 561 config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 562 config1 = (u_int)bus_space_read_2(iot, ioh, 563 ELINK_W3_INTERNAL_CONFIG + 2); 564 GO_WINDOW(0); 565 566 ram_size = (config0 & CONFIG_RAMSIZE) >> CONFIG_RAMSIZE_SHIFT; 567 ram_width = (config0 & CONFIG_RAMWIDTH) >> CONFIG_RAMWIDTH_SHIFT; 568 ram_speed = (config0 & CONFIG_RAMSPEED) >> CONFIG_RAMSPEED_SHIFT; 569 rom_size = (config0 & CONFIG_ROMSIZE) >> CONFIG_ROMSIZE_SHIFT; 570 571 ram_split = (config1 & CONFIG_RAMSPLIT) >> CONFIG_RAMSPLIT_SHIFT; 572 573 printf("%s: address %s, %dKB %s-wide FIFO, %s Rx:Tx split\n", 574 sc->sc_dev.dv_xname, 575 ether_sprintf(LLADDR(sc->sc_ethercom.ec_if.if_sadl)), 576 8 << ram_size, 577 (ram_width) ? "word" : "byte", 578 onboard_ram_config[ram_split]); 579 } 580 581 582 /* 583 * Find supported media on 3c509-generation hardware that doesn't have 584 * a "reset_options" register in window 3. 585 * Use the config_cntrl register in window 0 instead. 586 * Used on original, 10Mbit ISA (3c509), 3c509B, and pre-Demon EISA cards 587 * that implement CONFIG_CTRL. We don't have a good way to set the 588 * default active mediuim; punt to ifconfig instead. 589 */ 590 void 591 ep_509_probemedia(sc) 592 struct ep_softc *sc; 593 { 594 bus_space_tag_t iot = sc->sc_iot; 595 bus_space_handle_t ioh = sc->sc_ioh; 596 struct ifmedia *ifm = &sc->sc_mii.mii_media; 597 u_int16_t ep_w0_config, port; 598 struct ep_media *epm; 599 const char *sep = "", *defmedianame = NULL; 600 int defmedia = 0; 601 602 GO_WINDOW(0); 603 ep_w0_config = bus_space_read_2(iot, ioh, ELINK_W0_CONFIG_CTRL); 604 605 printf("%s: ", sc->sc_dev.dv_xname); 606 607 /* Sanity check that there are any media! */ 608 if ((ep_w0_config & ELINK_W0_CC_MEDIAMASK) == 0) { 609 printf("no media present!\n"); 610 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 611 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 612 return; 613 } 614 615 /* 616 * Get the default media from the EEPROM. 617 */ 618 port = ep_read_eeprom(sc, EEPROM_ADDR_CFG) >> 14; 619 620 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 621 622 for (epm = ep_509_media; epm->epm_name != NULL; epm++) { 623 if (ep_w0_config & epm->epm_mpbit) { 624 /* 625 * This simple test works because 509 chipsets 626 * don't do full-duplex. 627 */ 628 if (epm->epm_epmedia == port || defmedia == 0) { 629 defmedia = epm->epm_ifmedia; 630 defmedianame = epm->epm_name; 631 } 632 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 633 NULL); 634 PRINT(epm->epm_name); 635 } 636 } 637 638 #undef PRINT 639 640 #ifdef DIAGNOSTIC 641 if (defmedia == 0) 642 panic("ep_509_probemedia: impossible"); 643 #endif 644 645 printf(" (default %s)\n", defmedianame); 646 ifmedia_set(ifm, defmedia); 647 } 648 649 /* 650 * Find media present on large-packet-capable elink3 devices. 651 * Show onboard configuration of large-packet-capable elink3 devices 652 * (Demon, Vortex, Boomerang), which do not implement CONFIG_CTRL in window 0. 653 * Use media and card-version info in window 3 instead. 654 */ 655 void 656 ep_vortex_probemedia(sc) 657 struct ep_softc *sc; 658 { 659 bus_space_tag_t iot = sc->sc_iot; 660 bus_space_handle_t ioh = sc->sc_ioh; 661 struct ifmedia *ifm = &sc->sc_mii.mii_media; 662 struct ep_media *epm; 663 u_int config1; 664 int reset_options; 665 int default_media; /* 3-bit encoding of default (EEPROM) media */ 666 int defmedia = 0; 667 const char *sep = "", *defmedianame = NULL; 668 669 GO_WINDOW(3); 670 config1 = (u_int)bus_space_read_2(iot, ioh, 671 ELINK_W3_INTERNAL_CONFIG + 2); 672 reset_options = (int)bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 673 GO_WINDOW(0); 674 675 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 676 677 printf("%s: ", sc->sc_dev.dv_xname); 678 679 /* Sanity check that there are any media! */ 680 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 681 printf("no media present!\n"); 682 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 683 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 684 return; 685 } 686 687 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 688 689 for (epm = ep_vortex_media; epm->epm_name != NULL; epm++) { 690 if (reset_options & epm->epm_mpbit) { 691 /* 692 * Default media is a little more complicated 693 * on the Vortex. We support full-duplex which 694 * uses the same reset options bit. 695 * 696 * XXX Check EEPROM for default to FDX? 697 */ 698 if (epm->epm_epmedia == default_media) { 699 if ((epm->epm_ifmedia & IFM_FDX) == 0) { 700 defmedia = epm->epm_ifmedia; 701 defmedianame = epm->epm_name; 702 } 703 } else if (defmedia == 0) { 704 defmedia = epm->epm_ifmedia; 705 defmedianame = epm->epm_name; 706 } 707 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 708 NULL); 709 PRINT(epm->epm_name); 710 } 711 } 712 713 #undef PRINT 714 715 #ifdef DIAGNOSTIC 716 if (defmedia == 0) 717 panic("ep_vortex_probemedia: impossible"); 718 #endif 719 720 printf(" (default %s)\n", defmedianame); 721 ifmedia_set(ifm, defmedia); 722 } 723 724 /* 725 * One second timer, used to tick the MII. 726 */ 727 void 728 ep_tick(arg) 729 void *arg; 730 { 731 struct ep_softc *sc = arg; 732 int s; 733 734 #ifdef DIAGNOSTIC 735 if ((sc->ep_flags & ELINK_FLAGS_MII) == 0) 736 panic("ep_tick"); 737 #endif 738 739 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 740 return; 741 742 s = splnet(); 743 mii_tick(&sc->sc_mii); 744 splx(s); 745 746 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 747 } 748 749 /* 750 * Bring device up. 751 * 752 * The order in here seems important. Otherwise we may not receive 753 * interrupts. ?! 754 */ 755 void 756 epinit(sc) 757 struct ep_softc *sc; 758 { 759 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 760 bus_space_tag_t iot = sc->sc_iot; 761 bus_space_handle_t ioh = sc->sc_ioh; 762 int i; 763 764 /* Make sure any pending reset has completed before touching board. */ 765 ep_finish_reset(iot, ioh); 766 767 /* 768 * Cance any pending I/O. 769 */ 770 epstop(sc); 771 772 if (sc->bustype != ELINK_BUS_PCI && sc->bustype != ELINK_BUS_EISA) { 773 GO_WINDOW(0); 774 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 0); 775 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 776 ENABLE_DRQ_IRQ); 777 } 778 779 if (sc->bustype == ELINK_BUS_PCMCIA) { 780 bus_space_write_2(iot, ioh, ELINK_W0_RESOURCE_CFG, 0x3f00); 781 } 782 783 GO_WINDOW(2); 784 for (i = 0; i < 6; i++) /* Reload the ether_addr. */ 785 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 786 LLADDR(ifp->if_sadl)[i]); 787 788 /* 789 * Reset the station-address receive filter. 790 * A bug workaround for busmastering (Vortex, Demon) cards. 791 */ 792 for (i = 0; i < 6; i++) 793 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 794 795 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 796 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 797 798 GO_WINDOW(1); /* Window 1 is operating window */ 799 for (i = 0; i < 31; i++) 800 bus_space_read_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS)); 801 802 /* Set threshhold for for Tx-space avaiable interrupt. */ 803 bus_space_write_2(iot, ioh, ELINK_COMMAND, 804 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 805 806 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 807 /* 808 * Enable options in the PCMCIA LAN COR register, via 809 * RoadRunner Window 1. 810 * 811 * XXX MAGIC CONSTANTS! 812 */ 813 u_int16_t cor; 814 815 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, (1 << 11)); 816 817 cor = bus_space_read_2(iot, ioh, 0) & ~0x30; 818 if (sc->ep_flags & ELINK_FLAGS_USESHAREDMEM) 819 cor |= 0x10; 820 if (sc->ep_flags & ELINK_FLAGS_FORCENOWAIT) 821 cor |= 0x20; 822 bus_space_write_2(iot, ioh, 0, cor); 823 824 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 825 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 826 827 if (sc->ep_flags & ELINK_FLAGS_MII) { 828 ep_roadrunner_mii_enable(sc); 829 GO_WINDOW(1); 830 } 831 } 832 833 /* Enable interrupts. */ 834 bus_space_write_2(iot, ioh, ELINK_COMMAND, 835 SET_RD_0_MASK | S_CARD_FAILURE | S_RX_COMPLETE | S_TX_COMPLETE | 836 S_TX_AVAIL); 837 bus_space_write_2(iot, ioh, ELINK_COMMAND, 838 SET_INTR_MASK | S_CARD_FAILURE | S_RX_COMPLETE | S_TX_COMPLETE | 839 S_TX_AVAIL); 840 841 /* 842 * Attempt to get rid of any stray interrupts that occured during 843 * configuration. On the i386 this isn't possible because one may 844 * already be queued. However, a single stray interrupt is 845 * unimportant. 846 */ 847 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 848 849 epsetfilter(sc); 850 epsetmedia(sc); 851 852 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 853 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 854 855 epmbuffill(sc); 856 857 /* Interface is now `running', with no output active. */ 858 ifp->if_flags |= IFF_RUNNING; 859 ifp->if_flags &= ~IFF_OACTIVE; 860 861 if (sc->ep_flags & ELINK_FLAGS_MII) { 862 /* Start the one second clock. */ 863 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 864 } 865 866 /* Attempt to start output, if any. */ 867 epstart(ifp); 868 } 869 870 871 /* 872 * Set multicast receive filter. 873 * elink3 hardware has no selective multicast filter in hardware. 874 * Enable reception of all multicasts and filter in software. 875 */ 876 void 877 epsetfilter(sc) 878 struct ep_softc *sc; 879 { 880 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 881 882 GO_WINDOW(1); /* Window 1 is operating window */ 883 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 884 SET_RX_FILTER | FIL_INDIVIDUAL | FIL_BRDCST | 885 ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0) | 886 ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0)); 887 } 888 889 int 890 ep_media_change(ifp) 891 struct ifnet *ifp; 892 { 893 struct ep_softc *sc = ifp->if_softc; 894 895 if (sc->enabled && (ifp->if_flags & IFF_UP) != 0) 896 epreset(sc); 897 898 return (0); 899 } 900 901 /* 902 * Reset and enable the MII on the RoadRunner. 903 */ 904 void 905 ep_roadrunner_mii_enable(sc) 906 struct ep_softc *sc; 907 { 908 bus_space_tag_t iot = sc->sc_iot; 909 bus_space_handle_t ioh = sc->sc_ioh; 910 911 GO_WINDOW(3); 912 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 913 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 914 delay(1000); 915 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 916 ELINK_PCI_100BASE_MII|ELINK_RUNNER_MII_RESET| 917 ELINK_RUNNER_ENABLE_MII); 918 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 919 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 920 delay(1000); 921 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 922 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 923 } 924 925 /* 926 * Set the card to use the specified media. 927 */ 928 void 929 epsetmedia(sc) 930 struct ep_softc *sc; 931 { 932 bus_space_tag_t iot = sc->sc_iot; 933 bus_space_handle_t ioh = sc->sc_ioh; 934 935 /* Turn everything off. First turn off linkbeat and UTP. */ 936 GO_WINDOW(4); 937 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0x0); 938 939 /* Turn off coax */ 940 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 941 delay(1000); 942 943 /* 944 * If the device has MII, select it, and then tell the 945 * PHY which media to use. 946 */ 947 if (sc->ep_flags & ELINK_FLAGS_MII) { 948 int config0, config1; 949 950 GO_WINDOW(3); 951 952 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 953 int resopt; 954 955 resopt = bus_space_read_2(iot, ioh, 956 ELINK_W3_RESET_OPTIONS); 957 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 958 resopt | ELINK_RUNNER_ENABLE_MII); 959 } 960 961 config0 = (u_int)bus_space_read_2(iot, ioh, 962 ELINK_W3_INTERNAL_CONFIG); 963 config1 = (u_int)bus_space_read_2(iot, ioh, 964 ELINK_W3_INTERNAL_CONFIG + 2); 965 966 config1 = config1 & ~CONFIG_MEDIAMASK; 967 config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT); 968 969 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 970 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 971 config1); 972 GO_WINDOW(1); /* back to operating window */ 973 974 mii_mediachg(&sc->sc_mii); 975 return; 976 } 977 978 /* 979 * Now turn on the selected media/transceiver. 980 */ 981 GO_WINDOW(4); 982 switch (IFM_SUBTYPE(sc->sc_mii.mii_media.ifm_cur->ifm_media)) { 983 case IFM_10_T: 984 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 985 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 986 break; 987 988 case IFM_10_2: 989 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 990 DELAY(1000); /* 50ms not enmough? */ 991 break; 992 993 case IFM_100_TX: 994 case IFM_100_FX: 995 case IFM_100_T4: /* XXX check documentation */ 996 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 997 LINKBEAT_ENABLE); 998 DELAY(1000); /* not strictly necessary? */ 999 break; 1000 1001 case IFM_10_5: 1002 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 1003 SQE_ENABLE); 1004 DELAY(1000); /* not strictly necessary? */ 1005 break; 1006 1007 case IFM_MANUAL: 1008 /* 1009 * Nothing to do here; we are actually enabling the 1010 * external PHY on the MII port. 1011 */ 1012 break; 1013 1014 case IFM_NONE: 1015 printf("%s: interface disabled\n", sc->sc_dev.dv_xname); 1016 return; 1017 1018 default: 1019 panic("epsetmedia: impossible"); 1020 } 1021 1022 /* 1023 * Tell the chip which port to use. 1024 */ 1025 switch (sc->ep_chipset) { 1026 case ELINK_CHIPSET_VORTEX: 1027 case ELINK_CHIPSET_BOOMERANG: 1028 { 1029 int mctl, config0, config1; 1030 1031 GO_WINDOW(3); 1032 config0 = (u_int)bus_space_read_2(iot, ioh, 1033 ELINK_W3_INTERNAL_CONFIG); 1034 config1 = (u_int)bus_space_read_2(iot, ioh, 1035 ELINK_W3_INTERNAL_CONFIG + 2); 1036 1037 config1 = config1 & ~CONFIG_MEDIAMASK; 1038 config1 |= (sc->sc_mii.mii_media.ifm_cur->ifm_data << 1039 CONFIG_MEDIAMASK_SHIFT); 1040 1041 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 1042 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 1043 config1); 1044 1045 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1046 if (sc->sc_mii.mii_media.ifm_cur->ifm_media & IFM_FDX) 1047 mctl |= MAC_CONTROL_FDX; 1048 else 1049 mctl &= ~MAC_CONTROL_FDX; 1050 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1051 break; 1052 } 1053 default: 1054 { 1055 int w0_addr_cfg; 1056 1057 GO_WINDOW(0); 1058 w0_addr_cfg = bus_space_read_2(iot, ioh, ELINK_W0_ADDRESS_CFG); 1059 w0_addr_cfg &= 0x3fff; 1060 bus_space_write_2(iot, ioh, ELINK_W0_ADDRESS_CFG, w0_addr_cfg | 1061 (sc->sc_mii.mii_media.ifm_cur->ifm_data << 14)); 1062 DELAY(1000); 1063 break; 1064 } 1065 } 1066 1067 GO_WINDOW(1); /* Window 1 is operating window */ 1068 } 1069 1070 /* 1071 * Get currently-selected media from card. 1072 * (if_media callback, may be called before interface is brought up). 1073 */ 1074 void 1075 ep_media_status(ifp, req) 1076 struct ifnet *ifp; 1077 struct ifmediareq *req; 1078 { 1079 struct ep_softc *sc = ifp->if_softc; 1080 bus_space_tag_t iot = sc->sc_iot; 1081 bus_space_handle_t ioh = sc->sc_ioh; 1082 1083 if (sc->enabled == 0) { 1084 req->ifm_active = IFM_ETHER|IFM_NONE; 1085 req->ifm_status = 0; 1086 return; 1087 } 1088 1089 /* 1090 * If we have MII, go ask the PHY what's going on. 1091 */ 1092 if (sc->ep_flags & ELINK_FLAGS_MII) { 1093 mii_pollstat(&sc->sc_mii); 1094 req->ifm_active = sc->sc_mii.mii_media_active; 1095 req->ifm_status = sc->sc_mii.mii_media_status; 1096 return; 1097 } 1098 1099 /* 1100 * Ok, at this point we claim that our active media is 1101 * the currently selected media. We'll update our status 1102 * if our chipset allows us to detect link. 1103 */ 1104 req->ifm_active = sc->sc_mii.mii_media.ifm_cur->ifm_media; 1105 req->ifm_status = 0; 1106 1107 switch (sc->ep_chipset) { 1108 case ELINK_CHIPSET_VORTEX: 1109 case ELINK_CHIPSET_BOOMERANG: 1110 GO_WINDOW(4); 1111 req->ifm_status = IFM_AVALID; 1112 if (bus_space_read_2(iot, ioh, ELINK_W4_MEDIA_TYPE) & 1113 LINKBEAT_DETECT) 1114 req->ifm_status |= IFM_ACTIVE; 1115 GO_WINDOW(1); /* back to operating window */ 1116 break; 1117 } 1118 } 1119 1120 1121 1122 /* 1123 * Start outputting on the interface. 1124 * Always called as splnet(). 1125 */ 1126 void 1127 epstart(ifp) 1128 struct ifnet *ifp; 1129 { 1130 struct ep_softc *sc = ifp->if_softc; 1131 bus_space_tag_t iot = sc->sc_iot; 1132 bus_space_handle_t ioh = sc->sc_ioh; 1133 struct mbuf *m, *m0; 1134 int sh, len, pad; 1135 bus_addr_t txreg; 1136 1137 /* Don't transmit if interface is busy or not running */ 1138 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1139 return; 1140 1141 startagain: 1142 /* Sneak a peek at the next packet */ 1143 m0 = ifp->if_snd.ifq_head; 1144 if (m0 == 0) 1145 return; 1146 1147 /* We need to use m->m_pkthdr.len, so require the header */ 1148 if ((m0->m_flags & M_PKTHDR) == 0) 1149 panic("epstart: no header mbuf"); 1150 len = m0->m_pkthdr.len; 1151 1152 pad = (4 - len) & 3; 1153 1154 /* 1155 * The 3c509 automatically pads short packets to minimum ethernet 1156 * length, but we drop packets that are too large. Perhaps we should 1157 * truncate them instead? 1158 */ 1159 if (len + pad > ETHER_MAX_LEN) { 1160 /* packet is obviously too large: toss it */ 1161 ++ifp->if_oerrors; 1162 IF_DEQUEUE(&ifp->if_snd, m0); 1163 m_freem(m0); 1164 goto readcheck; 1165 } 1166 1167 if (bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_FREE_TX)) < 1168 len + pad + 4) { 1169 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1170 SET_TX_AVAIL_THRESH | 1171 ((len + pad + 4) >> sc->ep_pktlenshift)); 1172 /* not enough room in FIFO */ 1173 ifp->if_flags |= IFF_OACTIVE; 1174 return; 1175 } else { 1176 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1177 SET_TX_AVAIL_THRESH | ELINK_THRESH_DISABLE); 1178 } 1179 1180 IF_DEQUEUE(&ifp->if_snd, m0); 1181 if (m0 == 0) /* not really needed */ 1182 return; 1183 1184 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_TX_START_THRESH | 1185 ((len / 4 + sc->tx_start_thresh) /* >> sc->ep_pktlenshift*/)); 1186 1187 #if NBPFILTER > 0 1188 if (ifp->if_bpf) 1189 bpf_mtap(ifp->if_bpf, m0); 1190 #endif 1191 1192 /* 1193 * Do the output at a high interrupt priority level so that an 1194 * interrupt from another device won't cause a FIFO underrun. 1195 * We choose splsched() since that blocks essentially everything 1196 * except for interrupts from serial devices (which typically 1197 * lose data of their interrupt isn't serviced fast enough). 1198 * 1199 * XXX THIS CAN CAUSE CLOCK DRIFT! 1200 */ 1201 sh = splsched(); 1202 1203 txreg = ep_w1_reg(sc, ELINK_W1_TX_PIO_WR_1); 1204 1205 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1206 /* 1207 * Prime the FIFO buffer counter (number of 16-bit 1208 * words about to be written to the FIFO). 1209 * 1210 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1211 * COUNTER IS NON-ZERO! 1212 */ 1213 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 1214 (len + pad) >> 1); 1215 } 1216 1217 bus_space_write_2(iot, ioh, txreg, len); 1218 bus_space_write_2(iot, ioh, txreg, 0xffff); /* Second is meaningless */ 1219 if (ELINK_IS_BUS_32(sc->bustype)) { 1220 for (m = m0; m;) { 1221 if (m->m_len > 3) { 1222 /* align our reads from core */ 1223 if (mtod(m, u_long) & 3) { 1224 u_long count = 1225 4 - (mtod(m, u_long) & 3); 1226 bus_space_write_multi_1(iot, ioh, 1227 txreg, mtod(m, u_int8_t *), count); 1228 m->m_data = 1229 (void *)(mtod(m, u_long) + count); 1230 m->m_len -= count; 1231 } 1232 bus_space_write_multi_stream_4(iot, ioh, 1233 txreg, mtod(m, u_int32_t *), m->m_len >> 2); 1234 m->m_data = (void *)(mtod(m, u_long) + 1235 (u_long)(m->m_len & ~3)); 1236 m->m_len -= m->m_len & ~3; 1237 } 1238 if (m->m_len) { 1239 bus_space_write_multi_1(iot, ioh, 1240 txreg, mtod(m, u_int8_t *), m->m_len); 1241 } 1242 MFREE(m, m0); 1243 m = m0; 1244 } 1245 } else { 1246 for (m = m0; m;) { 1247 if (m->m_len > 1) { 1248 if (mtod(m, u_long) & 1) { 1249 bus_space_write_1(iot, ioh, 1250 txreg, *(mtod(m, u_int8_t *))); 1251 m->m_data = 1252 (void *)(mtod(m, u_long) + 1); 1253 m->m_len -= 1; 1254 } 1255 bus_space_write_multi_stream_2(iot, ioh, 1256 txreg, mtod(m, u_int16_t *), 1257 m->m_len >> 1); 1258 } 1259 if (m->m_len & 1) { 1260 bus_space_write_1(iot, ioh, txreg, 1261 *(mtod(m, u_int8_t *) + m->m_len - 1)); 1262 } 1263 MFREE(m, m0); 1264 m = m0; 1265 } 1266 } 1267 while (pad--) 1268 bus_space_write_1(iot, ioh, txreg, 0); 1269 1270 splx(sh); 1271 1272 ++ifp->if_opackets; 1273 1274 readcheck: 1275 if ((bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)) & 1276 ERR_INCOMPLETE) == 0) { 1277 /* We received a complete packet. */ 1278 u_int16_t status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1279 1280 if ((status & S_INTR_LATCH) == 0) { 1281 /* 1282 * No interrupt, read the packet and continue 1283 * Is this supposed to happen? Is my motherboard 1284 * completely busted? 1285 */ 1286 epread(sc); 1287 } else { 1288 /* Got an interrupt, return so that it gets serviced. */ 1289 return; 1290 } 1291 } else { 1292 /* Check if we are stuck and reset [see XXX comment] */ 1293 if (epstatus(sc)) { 1294 if (ifp->if_flags & IFF_DEBUG) 1295 printf("%s: adapter reset\n", 1296 sc->sc_dev.dv_xname); 1297 epreset(sc); 1298 } 1299 } 1300 1301 goto startagain; 1302 } 1303 1304 1305 /* 1306 * XXX: The 3c509 card can get in a mode where both the fifo status bit 1307 * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set 1308 * We detect this situation and we reset the adapter. 1309 * It happens at times when there is a lot of broadcast traffic 1310 * on the cable (once in a blue moon). 1311 */ 1312 static int 1313 epstatus(sc) 1314 struct ep_softc *sc; 1315 { 1316 bus_space_tag_t iot = sc->sc_iot; 1317 bus_space_handle_t ioh = sc->sc_ioh; 1318 u_int16_t fifost; 1319 1320 /* 1321 * Check the FIFO status and act accordingly 1322 */ 1323 GO_WINDOW(4); 1324 fifost = bus_space_read_2(iot, ioh, ELINK_W4_FIFO_DIAG); 1325 GO_WINDOW(1); 1326 1327 if (fifost & FIFOS_RX_UNDERRUN) { 1328 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1329 printf("%s: RX underrun\n", sc->sc_dev.dv_xname); 1330 epreset(sc); 1331 return 0; 1332 } 1333 1334 if (fifost & FIFOS_RX_STATUS_OVERRUN) { 1335 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1336 printf("%s: RX Status overrun\n", sc->sc_dev.dv_xname); 1337 return 1; 1338 } 1339 1340 if (fifost & FIFOS_RX_OVERRUN) { 1341 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1342 printf("%s: RX overrun\n", sc->sc_dev.dv_xname); 1343 return 1; 1344 } 1345 1346 if (fifost & FIFOS_TX_OVERRUN) { 1347 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1348 printf("%s: TX overrun\n", sc->sc_dev.dv_xname); 1349 epreset(sc); 1350 return 0; 1351 } 1352 1353 return 0; 1354 } 1355 1356 1357 static void 1358 eptxstat(sc) 1359 struct ep_softc *sc; 1360 { 1361 bus_space_tag_t iot = sc->sc_iot; 1362 bus_space_handle_t ioh = sc->sc_ioh; 1363 int i; 1364 1365 /* 1366 * We need to read+write TX_STATUS until we get a 0 status 1367 * in order to turn off the interrupt flag. 1368 */ 1369 while ((i = bus_space_read_1(iot, ioh, 1370 ep_w1_reg(sc, ELINK_W1_TX_STATUS))) & TXS_COMPLETE) { 1371 bus_space_write_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS), 1372 0x0); 1373 1374 if (i & TXS_JABBER) { 1375 ++sc->sc_ethercom.ec_if.if_oerrors; 1376 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1377 printf("%s: jabber (%x)\n", 1378 sc->sc_dev.dv_xname, i); 1379 epreset(sc); 1380 } else if (i & TXS_UNDERRUN) { 1381 ++sc->sc_ethercom.ec_if.if_oerrors; 1382 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1383 printf("%s: fifo underrun (%x) @%d\n", 1384 sc->sc_dev.dv_xname, i, 1385 sc->tx_start_thresh); 1386 if (sc->tx_succ_ok < 100) 1387 sc->tx_start_thresh = min(ETHER_MAX_LEN, 1388 sc->tx_start_thresh + 20); 1389 sc->tx_succ_ok = 0; 1390 epreset(sc); 1391 } else if (i & TXS_MAX_COLLISION) { 1392 ++sc->sc_ethercom.ec_if.if_collisions; 1393 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 1394 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1395 } else 1396 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 1397 } 1398 } 1399 1400 int 1401 epintr(arg) 1402 void *arg; 1403 { 1404 struct ep_softc *sc = arg; 1405 bus_space_tag_t iot = sc->sc_iot; 1406 bus_space_handle_t ioh = sc->sc_ioh; 1407 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1408 u_int16_t status; 1409 int ret = 0; 1410 int addrandom = 0; 1411 1412 if (sc->enabled == 0 || 1413 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1414 return (0); 1415 1416 for (;;) { 1417 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1418 1419 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1420 1421 if ((status & (S_TX_COMPLETE | S_TX_AVAIL | 1422 S_RX_COMPLETE | S_CARD_FAILURE)) == 0) { 1423 if ((status & S_INTR_LATCH) == 0) { 1424 #if 0 1425 printf("%s: intr latch cleared\n", 1426 sc->sc_dev.dv_xname); 1427 #endif 1428 break; 1429 } 1430 } 1431 1432 ret = 1; 1433 1434 /* 1435 * Acknowledge any interrupts. It's important that we do this 1436 * first, since there would otherwise be a race condition. 1437 * Due to the i386 interrupt queueing, we may get spurious 1438 * interrupts occasionally. 1439 */ 1440 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1441 (status & (C_INTR_LATCH | 1442 C_CARD_FAILURE | 1443 C_TX_COMPLETE | 1444 C_TX_AVAIL | 1445 C_RX_COMPLETE | 1446 C_RX_EARLY | 1447 C_INT_RQD | 1448 C_UPD_STATS))); 1449 1450 #if 0 1451 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1452 1453 printf("%s: intr%s%s%s%s\n", sc->sc_dev.dv_xname, 1454 (status & S_RX_COMPLETE)?" RX_COMPLETE":"", 1455 (status & S_TX_COMPLETE)?" TX_COMPLETE":"", 1456 (status & S_TX_AVAIL)?" TX_AVAIL":"", 1457 (status & S_CARD_FAILURE)?" CARD_FAILURE":""); 1458 #endif 1459 1460 if (status & S_RX_COMPLETE) { 1461 epread(sc); 1462 addrandom = 1; 1463 } 1464 if (status & S_TX_AVAIL) { 1465 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1466 epstart(&sc->sc_ethercom.ec_if); 1467 addrandom = 1; 1468 } 1469 if (status & S_CARD_FAILURE) { 1470 printf("%s: adapter failure (%x)\n", 1471 sc->sc_dev.dv_xname, status); 1472 #if 1 1473 epinit(sc); 1474 #else 1475 epreset(sc); 1476 #endif 1477 return (1); 1478 } 1479 if (status & S_TX_COMPLETE) { 1480 eptxstat(sc); 1481 epstart(ifp); 1482 addrandom = 1; 1483 } 1484 1485 #if NRND > 0 1486 if (status) 1487 rnd_add_uint32(&sc->rnd_source, status); 1488 #endif 1489 } 1490 1491 /* no more interrupts */ 1492 return (ret); 1493 } 1494 1495 void 1496 epread(sc) 1497 struct ep_softc *sc; 1498 { 1499 bus_space_tag_t iot = sc->sc_iot; 1500 bus_space_handle_t ioh = sc->sc_ioh; 1501 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1502 struct mbuf *m; 1503 int len; 1504 1505 len = bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1506 1507 again: 1508 if (ifp->if_flags & IFF_DEBUG) { 1509 int err = len & ERR_MASK; 1510 char *s = NULL; 1511 1512 if (len & ERR_INCOMPLETE) 1513 s = "incomplete packet"; 1514 else if (err == ERR_OVERRUN) 1515 s = "packet overrun"; 1516 else if (err == ERR_RUNT) 1517 s = "runt packet"; 1518 else if (err == ERR_ALIGNMENT) 1519 s = "bad alignment"; 1520 else if (err == ERR_CRC) 1521 s = "bad crc"; 1522 else if (err == ERR_OVERSIZE) 1523 s = "oversized packet"; 1524 else if (err == ERR_DRIBBLE) 1525 s = "dribble bits"; 1526 1527 if (s) 1528 printf("%s: %s\n", sc->sc_dev.dv_xname, s); 1529 } 1530 1531 if (len & ERR_INCOMPLETE) 1532 return; 1533 1534 if (len & ERR_RX) { 1535 ++ifp->if_ierrors; 1536 goto abort; 1537 } 1538 1539 len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */ 1540 1541 /* Pull packet off interface. */ 1542 m = epget(sc, len); 1543 if (m == 0) { 1544 ifp->if_ierrors++; 1545 goto abort; 1546 } 1547 1548 ++ifp->if_ipackets; 1549 1550 #if NBPFILTER > 0 1551 /* 1552 * Check if there's a BPF listener on this interface. 1553 * If so, hand off the raw packet to BPF. 1554 */ 1555 if (ifp->if_bpf) 1556 bpf_mtap(ifp->if_bpf, m); 1557 #endif 1558 1559 (*ifp->if_input)(ifp, m); 1560 1561 /* 1562 * In periods of high traffic we can actually receive enough 1563 * packets so that the fifo overrun bit will be set at this point, 1564 * even though we just read a packet. In this case we 1565 * are not going to receive any more interrupts. We check for 1566 * this condition and read again until the fifo is not full. 1567 * We could simplify this test by not using epstatus(), but 1568 * rechecking the RX_STATUS register directly. This test could 1569 * result in unnecessary looping in cases where there is a new 1570 * packet but the fifo is not full, but it will not fix the 1571 * stuck behavior. 1572 * 1573 * Even with this improvement, we still get packet overrun errors 1574 * which are hurting performance. Maybe when I get some more time 1575 * I'll modify epread() so that it can handle RX_EARLY interrupts. 1576 */ 1577 if (epstatus(sc)) { 1578 len = bus_space_read_2(iot, ioh, 1579 ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1580 /* Check if we are stuck and reset [see XXX comment] */ 1581 if (len & ERR_INCOMPLETE) { 1582 if (ifp->if_flags & IFF_DEBUG) 1583 printf("%s: adapter reset\n", 1584 sc->sc_dev.dv_xname); 1585 epreset(sc); 1586 return; 1587 } 1588 goto again; 1589 } 1590 1591 return; 1592 1593 abort: 1594 ep_discard_rxtop(iot, ioh); 1595 1596 } 1597 1598 struct mbuf * 1599 epget(sc, totlen) 1600 struct ep_softc *sc; 1601 int totlen; 1602 { 1603 bus_space_tag_t iot = sc->sc_iot; 1604 bus_space_handle_t ioh = sc->sc_ioh; 1605 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1606 struct mbuf *top, **mp, *m, *rv = NULL; 1607 bus_addr_t rxreg; 1608 int len, remaining; 1609 int sh; 1610 1611 m = sc->mb[sc->next_mb]; 1612 sc->mb[sc->next_mb] = 0; 1613 if (m == 0) { 1614 MGETHDR(m, M_DONTWAIT, MT_DATA); 1615 if (m == 0) 1616 return 0; 1617 } else { 1618 /* If the queue is no longer full, refill. */ 1619 if (sc->last_mb == sc->next_mb) 1620 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1621 /* Convert one of our saved mbuf's. */ 1622 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1623 m->m_data = m->m_pktdat; 1624 m->m_flags = M_PKTHDR; 1625 bzero(&m->m_pkthdr, sizeof(m->m_pkthdr)); 1626 } 1627 m->m_pkthdr.rcvif = ifp; 1628 m->m_pkthdr.len = totlen; 1629 len = MHLEN; 1630 top = 0; 1631 mp = ⊤ 1632 1633 /* 1634 * We read the packet at a high interrupt priority level so that 1635 * an interrupt from another device won't cause the card's packet 1636 * buffer to overflow. We choose splsched() since that blocks 1637 * essentially everything except for interrupts from serial 1638 * devices (which typically lose data of their interrupt isn't 1639 * serviced fast enough). 1640 * 1641 * XXX THIS CAN CAUSE CLOCK DRIFT! 1642 */ 1643 sh = splsched(); 1644 1645 rxreg = ep_w1_reg(sc, ELINK_W1_RX_PIO_RD_1); 1646 1647 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1648 /* 1649 * Prime the FIFO buffer counter (number of 16-bit 1650 * words about to be read from the FIFO). 1651 * 1652 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1653 * COUNTER IS NON-ZERO! 1654 */ 1655 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, totlen >> 1); 1656 } 1657 1658 while (totlen > 0) { 1659 if (top) { 1660 m = sc->mb[sc->next_mb]; 1661 sc->mb[sc->next_mb] = 0; 1662 if (m == 0) { 1663 MGET(m, M_DONTWAIT, MT_DATA); 1664 if (m == 0) { 1665 m_freem(top); 1666 goto out; 1667 } 1668 } else { 1669 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1670 } 1671 len = MLEN; 1672 } 1673 if (totlen >= MINCLSIZE) { 1674 MCLGET(m, M_DONTWAIT); 1675 if ((m->m_flags & M_EXT) == 0) { 1676 m_free(m); 1677 m_freem(top); 1678 goto out; 1679 } 1680 len = MCLBYTES; 1681 } 1682 if (top == 0) { 1683 /* align the struct ip header */ 1684 caddr_t newdata = (caddr_t) 1685 ALIGN(m->m_data + sizeof(struct ether_header)) 1686 - sizeof(struct ether_header); 1687 len -= newdata - m->m_data; 1688 m->m_data = newdata; 1689 } 1690 remaining = len = min(totlen, len); 1691 if (ELINK_IS_BUS_32(sc->bustype)) { 1692 u_long offset = mtod(m, u_long); 1693 /* 1694 * Read bytes up to the point where we are aligned. 1695 * (We can align to 4 bytes, rather than ALIGNBYTES, 1696 * here because we're later reading 4-byte chunks.) 1697 */ 1698 if ((remaining > 3) && (offset & 3)) { 1699 int count = (4 - (offset & 3)); 1700 bus_space_read_multi_1(iot, ioh, 1701 rxreg, (u_int8_t *) offset, count); 1702 offset += count; 1703 remaining -= count; 1704 } 1705 if (remaining > 3) { 1706 bus_space_read_multi_stream_4(iot, ioh, 1707 rxreg, (u_int32_t *) offset, 1708 remaining >> 2); 1709 offset += remaining & ~3; 1710 remaining &= 3; 1711 } 1712 if (remaining) { 1713 bus_space_read_multi_1(iot, ioh, 1714 rxreg, (u_int8_t *) offset, remaining); 1715 } 1716 } else { 1717 u_long offset = mtod(m, u_long); 1718 if ((remaining > 1) && (offset & 1)) { 1719 bus_space_read_multi_1(iot, ioh, 1720 rxreg, (u_int8_t *) offset, 1); 1721 remaining -= 1; 1722 offset += 1; 1723 } 1724 if (remaining > 1) { 1725 bus_space_read_multi_stream_2(iot, ioh, 1726 rxreg, (u_int16_t *) offset, 1727 remaining >> 1); 1728 offset += remaining & ~1; 1729 } 1730 if (remaining & 1) { 1731 bus_space_read_multi_1(iot, ioh, 1732 rxreg, (u_int8_t *) offset, remaining & 1); 1733 } 1734 } 1735 m->m_len = len; 1736 totlen -= len; 1737 *mp = m; 1738 mp = &m->m_next; 1739 } 1740 1741 rv = top; 1742 1743 ep_discard_rxtop(iot, ioh); 1744 1745 out: 1746 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 1747 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1748 splx(sh); 1749 1750 return rv; 1751 } 1752 1753 int 1754 epioctl(ifp, cmd, data) 1755 struct ifnet *ifp; 1756 u_long cmd; 1757 caddr_t data; 1758 { 1759 struct ep_softc *sc = ifp->if_softc; 1760 struct ifaddr *ifa = (struct ifaddr *)data; 1761 struct ifreq *ifr = (struct ifreq *)data; 1762 int s, error = 0; 1763 1764 s = splnet(); 1765 1766 switch (cmd) { 1767 1768 case SIOCSIFADDR: 1769 if ((error = epenable(sc)) != 0) 1770 break; 1771 /* epinit is called just below */ 1772 ifp->if_flags |= IFF_UP; 1773 switch (ifa->ifa_addr->sa_family) { 1774 #ifdef INET 1775 case AF_INET: 1776 epinit(sc); 1777 arp_ifinit(&sc->sc_ethercom.ec_if, ifa); 1778 break; 1779 #endif 1780 #ifdef NS 1781 case AF_NS: 1782 { 1783 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1784 1785 if (ns_nullhost(*ina)) 1786 ina->x_host = *(union ns_host *) 1787 LLADDR(ifp->if_sadl); 1788 else 1789 bcopy(ina->x_host.c_host, 1790 LLADDR(ifp->if_sadl), 1791 ifp->if_addrlen); 1792 /* Set new address. */ 1793 epinit(sc); 1794 break; 1795 } 1796 #endif 1797 default: 1798 epinit(sc); 1799 break; 1800 } 1801 break; 1802 1803 case SIOCSIFMEDIA: 1804 case SIOCGIFMEDIA: 1805 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 1806 break; 1807 1808 case SIOCSIFFLAGS: 1809 if ((ifp->if_flags & IFF_UP) == 0 && 1810 (ifp->if_flags & IFF_RUNNING) != 0) { 1811 /* 1812 * If interface is marked down and it is running, then 1813 * stop it. 1814 */ 1815 epstop(sc); 1816 ifp->if_flags &= ~IFF_RUNNING; 1817 epdisable(sc); 1818 } else if ((ifp->if_flags & IFF_UP) != 0 && 1819 (ifp->if_flags & IFF_RUNNING) == 0) { 1820 /* 1821 * If interface is marked up and it is stopped, then 1822 * start it. 1823 */ 1824 if ((error = epenable(sc)) != 0) 1825 break; 1826 epinit(sc); 1827 } else if ((ifp->if_flags & IFF_UP) != 0) { 1828 /* 1829 * deal with flags changes: 1830 * IFF_MULTICAST, IFF_PROMISC. 1831 */ 1832 epsetfilter(sc); 1833 } 1834 break; 1835 1836 case SIOCADDMULTI: 1837 case SIOCDELMULTI: 1838 if (sc->enabled == 0) { 1839 error = EIO; 1840 break; 1841 } 1842 1843 error = (cmd == SIOCADDMULTI) ? 1844 ether_addmulti(ifr, &sc->sc_ethercom) : 1845 ether_delmulti(ifr, &sc->sc_ethercom); 1846 1847 if (error == ENETRESET) { 1848 /* 1849 * Multicast list has changed; set the hardware filter 1850 * accordingly. 1851 */ 1852 epreset(sc); 1853 error = 0; 1854 } 1855 break; 1856 1857 default: 1858 error = EINVAL; 1859 break; 1860 } 1861 1862 splx(s); 1863 return (error); 1864 } 1865 1866 void 1867 epreset(sc) 1868 struct ep_softc *sc; 1869 { 1870 int s; 1871 1872 s = splnet(); 1873 epinit(sc); 1874 splx(s); 1875 } 1876 1877 void 1878 epwatchdog(ifp) 1879 struct ifnet *ifp; 1880 { 1881 struct ep_softc *sc = ifp->if_softc; 1882 1883 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1884 ++sc->sc_ethercom.ec_if.if_oerrors; 1885 1886 epreset(sc); 1887 } 1888 1889 void 1890 epstop(sc) 1891 struct ep_softc *sc; 1892 { 1893 bus_space_tag_t iot = sc->sc_iot; 1894 bus_space_handle_t ioh = sc->sc_ioh; 1895 1896 if (sc->ep_flags & ELINK_FLAGS_MII) { 1897 /* Stop the one second clock. */ 1898 callout_stop(&sc->sc_mbuf_callout); 1899 1900 /* Down the MII. */ 1901 mii_down(&sc->sc_mii); 1902 } 1903 1904 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 1905 /* 1906 * Clear the FIFO buffer count, thus halting 1907 * any currently-running transactions. 1908 */ 1909 GO_WINDOW(1); /* sanity */ 1910 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 1911 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1912 } 1913 1914 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1915 ep_discard_rxtop(iot, ioh); 1916 1917 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1918 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1919 1920 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 1921 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 1922 1923 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1924 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK); 1925 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK); 1926 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RX_FILTER); 1927 1928 epmbufempty(sc); 1929 } 1930 1931 1932 /* 1933 * Before reboots, reset card completely. 1934 */ 1935 static void 1936 epshutdown(arg) 1937 void *arg; 1938 { 1939 struct ep_softc *sc = arg; 1940 int s = splnet(); 1941 1942 if (sc->enabled) { 1943 epstop(sc); 1944 ep_reset_cmd(sc, ELINK_COMMAND, GLOBAL_RESET); 1945 sc->enabled = 0; 1946 } 1947 splx(s); 1948 } 1949 1950 /* 1951 * We get eeprom data from the id_port given an offset into the 1952 * eeprom. Basically; after the ID_sequence is sent to all of 1953 * the cards; they enter the ID_CMD state where they will accept 1954 * command requests. 0x80-0xbf loads the eeprom data. We then 1955 * read the port 16 times and with every read; the cards check 1956 * for contention (ie: if one card writes a 0 bit and another 1957 * writes a 1 bit then the host sees a 0. At the end of the cycle; 1958 * each card compares the data on the bus; if there is a difference 1959 * then that card goes into ID_WAIT state again). In the meantime; 1960 * one bit of data is returned in the AX register which is conveniently 1961 * returned to us by bus_space_read_1(). Hence; we read 16 times getting one 1962 * bit of data with each read. 1963 * 1964 * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT! 1965 */ 1966 u_int16_t 1967 epreadeeprom(iot, ioh, offset) 1968 bus_space_tag_t iot; 1969 bus_space_handle_t ioh; 1970 int offset; 1971 { 1972 u_int16_t data = 0; 1973 int i; 1974 1975 bus_space_write_1(iot, ioh, 0, 0x80 + offset); 1976 delay(1000); 1977 for (i = 0; i < 16; i++) 1978 data = (data << 1) | (bus_space_read_2(iot, ioh, 0) & 1); 1979 return (data); 1980 } 1981 1982 static int 1983 epbusyeeprom(sc) 1984 struct ep_softc *sc; 1985 { 1986 bus_space_tag_t iot = sc->sc_iot; 1987 bus_space_handle_t ioh = sc->sc_ioh; 1988 int i = 100, j; 1989 1990 if (sc->bustype == ELINK_BUS_PCMCIA) { 1991 delay(1000); 1992 return 0; 1993 } 1994 1995 j = 0; /* bad GCC flow analysis */ 1996 while (i--) { 1997 j = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND); 1998 if (j & EEPROM_BUSY) 1999 delay(100); 2000 else 2001 break; 2002 } 2003 if (!i) { 2004 printf("\n%s: eeprom failed to come ready\n", 2005 sc->sc_dev.dv_xname); 2006 return (1); 2007 } 2008 if (j & EEPROM_TST_MODE) { 2009 /* XXX PnP mode? */ 2010 printf("\n%s: erase pencil mark!\n", sc->sc_dev.dv_xname); 2011 return (1); 2012 } 2013 return (0); 2014 } 2015 2016 u_int16_t 2017 ep_read_eeprom(sc, offset) 2018 struct ep_softc *sc; 2019 u_int16_t offset; 2020 { 2021 u_int16_t readcmd; 2022 2023 /* 2024 * RoadRunner has a larger EEPROM, so a different read command 2025 * is required. 2026 */ 2027 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) 2028 readcmd = READ_EEPROM_RR; 2029 else 2030 readcmd = READ_EEPROM; 2031 2032 if (epbusyeeprom(sc)) 2033 return (0); /* XXX why is eeprom busy? */ 2034 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W0_EEPROM_COMMAND, 2035 readcmd | offset); 2036 if (epbusyeeprom(sc)) 2037 return (0); /* XXX why is eeprom busy? */ 2038 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W0_EEPROM_DATA)); 2039 } 2040 2041 void 2042 epmbuffill(v) 2043 void *v; 2044 { 2045 struct ep_softc *sc = v; 2046 struct mbuf *m; 2047 int s, i; 2048 2049 s = splnet(); 2050 i = sc->last_mb; 2051 do { 2052 if (sc->mb[i] == 0) { 2053 MGET(m, M_DONTWAIT, MT_DATA); 2054 if (m == 0) 2055 break; 2056 sc->mb[i] = m; 2057 } 2058 i = (i + 1) % MAX_MBS; 2059 } while (i != sc->next_mb); 2060 sc->last_mb = i; 2061 /* If the queue was not filled, try again. */ 2062 if (sc->last_mb != sc->next_mb) 2063 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 2064 splx(s); 2065 } 2066 2067 void 2068 epmbufempty(sc) 2069 struct ep_softc *sc; 2070 { 2071 int s, i; 2072 2073 s = splnet(); 2074 for (i = 0; i<MAX_MBS; i++) { 2075 if (sc->mb[i]) { 2076 m_freem(sc->mb[i]); 2077 sc->mb[i] = NULL; 2078 } 2079 } 2080 sc->last_mb = sc->next_mb = 0; 2081 callout_stop(&sc->sc_mbuf_callout); 2082 splx(s); 2083 } 2084 2085 int 2086 epenable(sc) 2087 struct ep_softc *sc; 2088 { 2089 2090 if (sc->enabled == 0 && sc->enable != NULL) { 2091 if ((*sc->enable)(sc) != 0) { 2092 printf("%s: device enable failed\n", 2093 sc->sc_dev.dv_xname); 2094 return (EIO); 2095 } 2096 } 2097 2098 sc->enabled = 1; 2099 return (0); 2100 } 2101 2102 void 2103 epdisable(sc) 2104 struct ep_softc *sc; 2105 { 2106 2107 if (sc->enabled != 0 && sc->disable != NULL) { 2108 (*sc->disable)(sc); 2109 sc->enabled = 0; 2110 } 2111 } 2112 2113 /* 2114 * ep_activate: 2115 * 2116 * Handle device activation/deactivation requests. 2117 */ 2118 int 2119 ep_activate(self, act) 2120 struct device *self; 2121 enum devact act; 2122 { 2123 struct ep_softc *sc = (struct ep_softc *)self; 2124 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2125 int error = 0, s; 2126 2127 s = splnet(); 2128 switch (act) { 2129 case DVACT_ACTIVATE: 2130 error = EOPNOTSUPP; 2131 break; 2132 2133 case DVACT_DEACTIVATE: 2134 if (sc->ep_flags & ELINK_FLAGS_MII) 2135 mii_activate(&sc->sc_mii, act, MII_PHY_ANY, 2136 MII_OFFSET_ANY); 2137 if_deactivate(ifp); 2138 break; 2139 } 2140 splx(s); 2141 return (error); 2142 } 2143 2144 /* 2145 * ep_detach: 2146 * 2147 * Detach a elink3 interface. 2148 */ 2149 int 2150 ep_detach(self, flags) 2151 struct device *self; 2152 int flags; 2153 { 2154 struct ep_softc *sc = (struct ep_softc *)self; 2155 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2156 2157 /* Succeed now if there's no work to do. */ 2158 if ((sc->sc_flags & ELINK_FLAGS_ATTACHED) == 0) 2159 return (0); 2160 2161 epdisable(sc); 2162 2163 callout_stop(&sc->sc_mii_callout); 2164 callout_stop(&sc->sc_mbuf_callout); 2165 2166 if (sc->ep_flags & ELINK_FLAGS_MII) { 2167 /* Detach all PHYs */ 2168 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 2169 } 2170 2171 /* Delete all remaining media. */ 2172 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 2173 2174 #if NRND > 0 2175 rnd_detach_source(&sc->rnd_source); 2176 #endif 2177 #if NBPFILTER > 0 2178 bpfdetach(ifp); 2179 #endif 2180 ether_ifdetach(ifp); 2181 if_detach(ifp); 2182 2183 shutdownhook_disestablish(sc->sd_hook); 2184 2185 return (0); 2186 } 2187 2188 u_int32_t 2189 ep_mii_bitbang_read(self) 2190 struct device *self; 2191 { 2192 struct ep_softc *sc = (void *) self; 2193 2194 /* We're already in Window 4. */ 2195 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 2196 ELINK_W4_BOOM_PHYSMGMT)); 2197 } 2198 2199 void 2200 ep_mii_bitbang_write(self, val) 2201 struct device *self; 2202 u_int32_t val; 2203 { 2204 struct ep_softc *sc = (void *) self; 2205 2206 /* We're already in Window 4. */ 2207 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 2208 ELINK_W4_BOOM_PHYSMGMT, val); 2209 } 2210 2211 int 2212 ep_mii_readreg(self, phy, reg) 2213 struct device *self; 2214 int phy, reg; 2215 { 2216 struct ep_softc *sc = (void *) self; 2217 int val; 2218 2219 GO_WINDOW(4); 2220 2221 val = mii_bitbang_readreg(self, &ep_mii_bitbang_ops, phy, reg); 2222 2223 GO_WINDOW(1); 2224 2225 return (val); 2226 } 2227 2228 void 2229 ep_mii_writereg(self, phy, reg, val) 2230 struct device *self; 2231 int phy, reg, val; 2232 { 2233 struct ep_softc *sc = (void *) self; 2234 2235 GO_WINDOW(4); 2236 2237 mii_bitbang_writereg(self, &ep_mii_bitbang_ops, phy, reg, val); 2238 2239 GO_WINDOW(1); 2240 } 2241 2242 void 2243 ep_statchg(self) 2244 struct device *self; 2245 { 2246 struct ep_softc *sc = (struct ep_softc *)self; 2247 bus_space_tag_t iot = sc->sc_iot; 2248 bus_space_handle_t ioh = sc->sc_ioh; 2249 int mctl; 2250 2251 GO_WINDOW(3); 2252 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 2253 if (sc->sc_mii.mii_media_active & IFM_FDX) 2254 mctl |= MAC_CONTROL_FDX; 2255 else 2256 mctl &= ~MAC_CONTROL_FDX; 2257 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 2258 GO_WINDOW(1); /* back to operating window */ 2259 } 2260
Indexes created Mon Sep 29 21:09:56 GMT 2025