elink3.c revision 1.88
1 /* $NetBSD: elink3.c,v 1.88 2001/03/22 12:00:26 jdolecek Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1996, 1997 Jonathan Stone <jonathan (at) NetBSD.org> 42 * Copyright (c) 1994 Herb Peyerl <hpeyerl (at) beer.org> 43 * All rights reserved. 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice, this list of conditions and the following disclaimer. 50 * 2. Redistributions in binary form must reproduce the above copyright 51 * notice, this list of conditions and the following disclaimer in the 52 * documentation and/or other materials provided with the distribution. 53 * 3. All advertising materials mentioning features or use of this software 54 * must display the following acknowledgement: 55 * This product includes software developed by Herb Peyerl. 56 * 4. The name of Herb Peyerl may not be used to endorse or promote products 57 * derived from this software without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 60 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 61 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 62 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 63 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 64 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 65 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 66 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 67 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 68 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 #include "opt_inet.h" 72 #include "opt_ns.h" 73 #include "bpfilter.h" 74 #include "rnd.h" 75 76 #include <sys/param.h> 77 #include <sys/systm.h> 78 #include <sys/callout.h> 79 #include <sys/kernel.h> 80 #include <sys/mbuf.h> 81 #include <sys/socket.h> 82 #include <sys/ioctl.h> 83 #include <sys/errno.h> 84 #include <sys/syslog.h> 85 #include <sys/select.h> 86 #include <sys/device.h> 87 #if NRND > 0 88 #include <sys/rnd.h> 89 #endif 90 91 #include <net/if.h> 92 #include <net/if_dl.h> 93 #include <net/if_ether.h> 94 #include <net/if_media.h> 95 96 #ifdef INET 97 #include <netinet/in.h> 98 #include <netinet/in_systm.h> 99 #include <netinet/in_var.h> 100 #include <netinet/ip.h> 101 #include <netinet/if_inarp.h> 102 #endif 103 104 #ifdef NS 105 #include <netns/ns.h> 106 #include <netns/ns_if.h> 107 #endif 108 109 #if NBPFILTER > 0 110 #include <net/bpf.h> 111 #include <net/bpfdesc.h> 112 #endif 113 114 #include <machine/cpu.h> 115 #include <machine/bus.h> 116 #include <machine/intr.h> 117 118 #include <dev/mii/mii.h> 119 #include <dev/mii/miivar.h> 120 #include <dev/mii/mii_bitbang.h> 121 122 #include <dev/ic/elink3var.h> 123 #include <dev/ic/elink3reg.h> 124 125 #ifdef DEBUG 126 int epdebug = 0; 127 #endif 128 129 /* 130 * XXX endian workaround for big-endian CPUs with pcmcia: 131 * if stream methods for bus_space_multi are not provided, define them 132 * using non-stream bus_space_{read,write}_multi_. 133 * Assumes host CPU is same endian-ness as bus. 134 */ 135 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 136 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 137 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 138 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 139 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 140 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 141 142 /* 143 * Structure to map media-present bits in boards to ifmedia codes and 144 * printable media names. Used for table-driven ifmedia initialization. 145 */ 146 struct ep_media { 147 int epm_mpbit; /* media present bit */ 148 const char *epm_name; /* name of medium */ 149 int epm_ifmedia; /* ifmedia word for medium */ 150 int epm_epmedia; /* ELINKMEDIA_* constant */ 151 }; 152 153 /* 154 * Media table for the Demon/Vortex/Boomerang chipsets. 155 * 156 * Note that MII on the Demon and Vortex (3c59x) indicates an external 157 * MII connector (for connecting an external PHY) ... I think. Treat 158 * it as `manual' on these chips. 159 * 160 * Any Boomerang (3c90x) chips with MII really do have an internal 161 * MII and real PHYs attached; no `native' media. 162 */ 163 const struct ep_media ep_vortex_media[] = { 164 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 165 ELINKMEDIA_10BASE_T }, 166 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 167 ELINKMEDIA_10BASE_T }, 168 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 169 ELINKMEDIA_AUI }, 170 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 171 ELINKMEDIA_10BASE_2 }, 172 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 173 ELINKMEDIA_100BASE_TX }, 174 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 175 ELINKMEDIA_100BASE_TX }, 176 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 177 ELINKMEDIA_100BASE_FX }, 178 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 179 ELINKMEDIA_MII }, 180 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 181 ELINKMEDIA_100BASE_T4 }, 182 { 0, NULL, 0, 183 0 }, 184 }; 185 186 /* 187 * Media table for the older 3Com Etherlink III chipset, used 188 * in the 3c509, 3c579, and 3c589. 189 */ 190 const struct ep_media ep_509_media[] = { 191 { ELINK_W0_CC_UTP, "10baseT", IFM_ETHER|IFM_10_T, 192 ELINKMEDIA_10BASE_T }, 193 { ELINK_W0_CC_AUI, "10base5", IFM_ETHER|IFM_10_5, 194 ELINKMEDIA_AUI }, 195 { ELINK_W0_CC_BNC, "10base2", IFM_ETHER|IFM_10_2, 196 ELINKMEDIA_10BASE_2 }, 197 { 0, NULL, 0, 198 0 }, 199 }; 200 201 void ep_internalconfig __P((struct ep_softc *sc)); 202 void ep_vortex_probemedia __P((struct ep_softc *sc)); 203 void ep_509_probemedia __P((struct ep_softc *sc)); 204 205 static void eptxstat __P((struct ep_softc *)); 206 static int epstatus __P((struct ep_softc *)); 207 int epinit __P((struct ifnet *)); 208 void epstop __P((struct ifnet *, int)); 209 int epioctl __P((struct ifnet *, u_long, caddr_t)); 210 void epstart __P((struct ifnet *)); 211 void epwatchdog __P((struct ifnet *)); 212 void epreset __P((struct ep_softc *)); 213 static void epshutdown __P((void *)); 214 void epread __P((struct ep_softc *)); 215 struct mbuf *epget __P((struct ep_softc *, int)); 216 void epmbuffill __P((void *)); 217 void epmbufempty __P((struct ep_softc *)); 218 void epsetfilter __P((struct ep_softc *)); 219 void ep_roadrunner_mii_enable __P((struct ep_softc *)); 220 void epsetmedia __P((struct ep_softc *)); 221 222 /* ifmedia callbacks */ 223 int ep_media_change __P((struct ifnet *ifp)); 224 void ep_media_status __P((struct ifnet *ifp, struct ifmediareq *req)); 225 226 /* MII callbacks */ 227 int ep_mii_readreg __P((struct device *, int, int)); 228 void ep_mii_writereg __P((struct device *, int, int, int)); 229 void ep_statchg __P((struct device *)); 230 231 void ep_tick __P((void *)); 232 233 static int epbusyeeprom __P((struct ep_softc *)); 234 u_int16_t ep_read_eeprom __P((struct ep_softc *, u_int16_t)); 235 static inline void ep_reset_cmd __P((struct ep_softc *sc, 236 u_int cmd, u_int arg)); 237 static inline void ep_finish_reset __P((bus_space_tag_t, bus_space_handle_t)); 238 static inline void ep_discard_rxtop __P((bus_space_tag_t, bus_space_handle_t)); 239 static __inline int ep_w1_reg __P((struct ep_softc *, int)); 240 241 /* 242 * MII bit-bang glue. 243 */ 244 u_int32_t ep_mii_bitbang_read __P((struct device *)); 245 void ep_mii_bitbang_write __P((struct device *, u_int32_t)); 246 247 const struct mii_bitbang_ops ep_mii_bitbang_ops = { 248 ep_mii_bitbang_read, 249 ep_mii_bitbang_write, 250 { 251 PHYSMGMT_DATA, /* MII_BIT_MDO */ 252 PHYSMGMT_DATA, /* MII_BIT_MDI */ 253 PHYSMGMT_CLK, /* MII_BIT_MDC */ 254 PHYSMGMT_DIR, /* MII_BIT_DIR_HOST_PHY */ 255 0, /* MII_BIT_DIR_PHY_HOST */ 256 } 257 }; 258 259 /* 260 * Some chips (3c515 [Corkscrew] and 3c574 [RoadRunner]) have 261 * Window 1 registers offset! 262 */ 263 static __inline int 264 ep_w1_reg(sc, reg) 265 struct ep_softc *sc; 266 int reg; 267 { 268 269 switch (sc->ep_chipset) { 270 case ELINK_CHIPSET_CORKSCREW: 271 return (reg + 0x10); 272 273 case ELINK_CHIPSET_ROADRUNNER: 274 switch (reg) { 275 case ELINK_W1_FREE_TX: 276 case ELINK_W1_RUNNER_RDCTL: 277 case ELINK_W1_RUNNER_WRCTL: 278 return (reg); 279 } 280 return (reg + 0x10); 281 } 282 283 return (reg); 284 } 285 286 /* 287 * Wait for any pending reset to complete. 288 * On newer hardware we could poll SC_COMMAND_IN_PROGRESS, 289 * but older hardware doesn't implement it and we must delay. 290 */ 291 static inline void 292 ep_finish_reset(iot, ioh) 293 bus_space_tag_t iot; 294 bus_space_handle_t ioh; 295 { 296 int i; 297 298 for (i = 0; i < 10000; i++) { 299 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 300 S_COMMAND_IN_PROGRESS) == 0) 301 break; 302 DELAY(10); 303 } 304 } 305 306 /* 307 * Issue a (reset) command, and be sure it has completed. 308 * Used for global reset, TX_RESET, RX_RESET. 309 */ 310 static inline void 311 ep_reset_cmd(sc, cmd, arg) 312 struct ep_softc *sc; 313 u_int cmd, arg; 314 { 315 bus_space_tag_t iot = sc->sc_iot; 316 bus_space_handle_t ioh = sc->sc_ioh; 317 318 bus_space_write_2(iot, ioh, cmd, arg); 319 ep_finish_reset(iot, ioh); 320 } 321 322 323 static inline void 324 ep_discard_rxtop(iot, ioh) 325 bus_space_tag_t iot; 326 bus_space_handle_t ioh; 327 { 328 int i; 329 330 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISCARD_TOP_PACK); 331 332 /* 333 * Spin for about 1 msec, to avoid forcing a DELAY() between 334 * every received packet (adding latency and limiting pkt-recv rate). 335 * On PCI, at 4 30-nsec PCI bus cycles for a read, 8000 iterations 336 * is about right. 337 */ 338 for (i = 0; i < 8000; i++) { 339 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 340 S_COMMAND_IN_PROGRESS) == 0) 341 return; 342 } 343 344 /* Didn't complete in a hurry. Do DELAY()s. */ 345 ep_finish_reset(iot, ioh); 346 } 347 348 /* 349 * Back-end attach and configure. 350 */ 351 int 352 epconfig(sc, chipset, enaddr) 353 struct ep_softc *sc; 354 u_short chipset; 355 u_int8_t *enaddr; 356 { 357 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 358 bus_space_tag_t iot = sc->sc_iot; 359 bus_space_handle_t ioh = sc->sc_ioh; 360 u_int16_t i; 361 u_int8_t myla[ETHER_ADDR_LEN]; 362 363 callout_init(&sc->sc_mii_callout); 364 callout_init(&sc->sc_mbuf_callout); 365 366 sc->ep_chipset = chipset; 367 368 /* 369 * We could have been groveling around in other register 370 * windows in the front-end; make sure we're in window 0 371 * to read the EEPROM. 372 */ 373 GO_WINDOW(0); 374 375 if (enaddr == NULL) { 376 /* 377 * Read the station address from the eeprom. 378 */ 379 for (i = 0; i < ETHER_ADDR_LEN / 2; i++) { 380 u_int16_t x = ep_read_eeprom(sc, i); 381 myla[(i << 1)] = x >> 8; 382 myla[(i << 1) + 1] = x; 383 } 384 enaddr = myla; 385 } 386 387 /* 388 * Vortex-based (3c59x pci,eisa) and Boomerang (3c900) cards 389 * allow FDDI-sized (4500) byte packets. Commands only take an 390 * 11-bit parameter, and 11 bits isn't enough to hold a full-size 391 * packet length. 392 * Commands to these cards implicitly upshift a packet size 393 * or threshold by 2 bits. 394 * To detect cards with large-packet support, we probe by setting 395 * the transmit threshold register, then change windows and 396 * read back the threshold register directly, and see if the 397 * threshold value was shifted or not. 398 */ 399 bus_space_write_2(iot, ioh, ELINK_COMMAND, 400 SET_TX_AVAIL_THRESH | ELINK_LARGEWIN_PROBE); 401 GO_WINDOW(5); 402 i = bus_space_read_2(iot, ioh, ELINK_W5_TX_AVAIL_THRESH); 403 GO_WINDOW(1); 404 switch (i) { 405 case ELINK_LARGEWIN_PROBE: 406 case (ELINK_LARGEWIN_PROBE & ELINK_LARGEWIN_MASK): 407 sc->ep_pktlenshift = 0; 408 break; 409 410 case (ELINK_LARGEWIN_PROBE << 2): 411 sc->ep_pktlenshift = 2; 412 break; 413 414 default: 415 printf("%s: wrote 0x%x to TX_AVAIL_THRESH, read back 0x%x. " 416 "Interface disabled\n", 417 sc->sc_dev.dv_xname, ELINK_LARGEWIN_PROBE, (int) i); 418 return (1); 419 } 420 421 /* 422 * Ensure Tx-available interrupts are enabled for 423 * start the interface. 424 * XXX should be in epinit()? 425 */ 426 bus_space_write_2(iot, ioh, ELINK_COMMAND, 427 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 428 429 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 430 ifp->if_softc = sc; 431 ifp->if_start = epstart; 432 ifp->if_ioctl = epioctl; 433 ifp->if_watchdog = epwatchdog; 434 ifp->if_init = epinit; 435 ifp->if_stop = epstop; 436 ifp->if_flags = 437 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 438 IFQ_SET_READY(&ifp->if_snd); 439 440 if_attach(ifp); 441 ether_ifattach(ifp, enaddr); 442 443 /* 444 * Finish configuration: 445 * determine chipset if the front-end couldn't do so, 446 * show board details, set media. 447 */ 448 449 /* 450 * Print RAM size. We also print the Ethernet address in here. 451 * It's extracted from the ifp, so we have to make sure it's 452 * been attached first. 453 */ 454 ep_internalconfig(sc); 455 GO_WINDOW(0); 456 457 /* 458 * Display some additional information, if pertinent. 459 */ 460 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 461 printf("%s: RoadRunner FIFO buffer enabled\n", 462 sc->sc_dev.dv_xname); 463 464 /* 465 * Initialize our media structures and MII info. We'll 466 * probe the MII if we discover that we have one. 467 */ 468 sc->sc_mii.mii_ifp = ifp; 469 sc->sc_mii.mii_readreg = ep_mii_readreg; 470 sc->sc_mii.mii_writereg = ep_mii_writereg; 471 sc->sc_mii.mii_statchg = ep_statchg; 472 ifmedia_init(&sc->sc_mii.mii_media, 0, ep_media_change, 473 ep_media_status); 474 475 /* 476 * Now, determine which media we have. 477 */ 478 switch (sc->ep_chipset) { 479 case ELINK_CHIPSET_ROADRUNNER: 480 if (sc->ep_flags & ELINK_FLAGS_MII) { 481 ep_roadrunner_mii_enable(sc); 482 GO_WINDOW(0); 483 } 484 /* FALLTHROUGH */ 485 486 case ELINK_CHIPSET_BOOMERANG: 487 /* 488 * If the device has MII, probe it. We won't be using 489 * any `native' media in this case, only PHYs. If 490 * we don't, just treat the Boomerang like the Vortex. 491 */ 492 if (sc->ep_flags & ELINK_FLAGS_MII) { 493 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 494 MII_PHY_ANY, MII_OFFSET_ANY, 0); 495 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 496 ifmedia_add(&sc->sc_mii.mii_media, 497 IFM_ETHER|IFM_NONE, 0, NULL); 498 ifmedia_set(&sc->sc_mii.mii_media, 499 IFM_ETHER|IFM_NONE); 500 } else { 501 ifmedia_set(&sc->sc_mii.mii_media, 502 IFM_ETHER|IFM_AUTO); 503 } 504 break; 505 } 506 /* FALLTHROUGH */ 507 508 case ELINK_CHIPSET_VORTEX: 509 ep_vortex_probemedia(sc); 510 break; 511 512 default: 513 ep_509_probemedia(sc); 514 break; 515 } 516 517 GO_WINDOW(1); /* Window 1 is operating window */ 518 519 #if NRND > 0 520 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 521 RND_TYPE_NET, 0); 522 #endif 523 524 sc->tx_start_thresh = 20; /* probably a good starting point. */ 525 526 /* Establish callback to reset card when we reboot. */ 527 sc->sd_hook = shutdownhook_establish(epshutdown, sc); 528 529 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 530 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 531 532 /* The attach is successful. */ 533 sc->sc_flags |= ELINK_FLAGS_ATTACHED; 534 return (0); 535 } 536 537 538 /* 539 * Show interface-model-independent info from window 3 540 * internal-configuration register. 541 */ 542 void 543 ep_internalconfig(sc) 544 struct ep_softc *sc; 545 { 546 bus_space_tag_t iot = sc->sc_iot; 547 bus_space_handle_t ioh = sc->sc_ioh; 548 549 u_int config0; 550 u_int config1; 551 552 int ram_size, ram_width, ram_speed, rom_size, ram_split; 553 /* 554 * NVRAM buffer Rx:Tx config names for busmastering cards 555 * (Demon, Vortex, and later). 556 */ 557 const char *onboard_ram_config[] = { 558 "5:3", "3:1", "1:1", "3:5" }; 559 560 GO_WINDOW(3); 561 config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 562 config1 = (u_int)bus_space_read_2(iot, ioh, 563 ELINK_W3_INTERNAL_CONFIG + 2); 564 GO_WINDOW(0); 565 566 ram_size = (config0 & CONFIG_RAMSIZE) >> CONFIG_RAMSIZE_SHIFT; 567 ram_width = (config0 & CONFIG_RAMWIDTH) >> CONFIG_RAMWIDTH_SHIFT; 568 ram_speed = (config0 & CONFIG_RAMSPEED) >> CONFIG_RAMSPEED_SHIFT; 569 rom_size = (config0 & CONFIG_ROMSIZE) >> CONFIG_ROMSIZE_SHIFT; 570 571 ram_split = (config1 & CONFIG_RAMSPLIT) >> CONFIG_RAMSPLIT_SHIFT; 572 573 printf("%s: address %s, %dKB %s-wide FIFO, %s Rx:Tx split\n", 574 sc->sc_dev.dv_xname, 575 ether_sprintf(LLADDR(sc->sc_ethercom.ec_if.if_sadl)), 576 8 << ram_size, 577 (ram_width) ? "word" : "byte", 578 onboard_ram_config[ram_split]); 579 } 580 581 582 /* 583 * Find supported media on 3c509-generation hardware that doesn't have 584 * a "reset_options" register in window 3. 585 * Use the config_cntrl register in window 0 instead. 586 * Used on original, 10Mbit ISA (3c509), 3c509B, and pre-Demon EISA cards 587 * that implement CONFIG_CTRL. We don't have a good way to set the 588 * default active mediuim; punt to ifconfig instead. 589 */ 590 void 591 ep_509_probemedia(sc) 592 struct ep_softc *sc; 593 { 594 bus_space_tag_t iot = sc->sc_iot; 595 bus_space_handle_t ioh = sc->sc_ioh; 596 struct ifmedia *ifm = &sc->sc_mii.mii_media; 597 u_int16_t ep_w0_config, port; 598 const struct ep_media *epm; 599 const char *sep = "", *defmedianame = NULL; 600 int defmedia = 0; 601 602 GO_WINDOW(0); 603 ep_w0_config = bus_space_read_2(iot, ioh, ELINK_W0_CONFIG_CTRL); 604 605 printf("%s: ", sc->sc_dev.dv_xname); 606 607 /* Sanity check that there are any media! */ 608 if ((ep_w0_config & ELINK_W0_CC_MEDIAMASK) == 0) { 609 printf("no media present!\n"); 610 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 611 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 612 return; 613 } 614 615 /* 616 * Get the default media from the EEPROM. 617 */ 618 port = ep_read_eeprom(sc, EEPROM_ADDR_CFG) >> 14; 619 620 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 621 622 for (epm = ep_509_media; epm->epm_name != NULL; epm++) { 623 if (ep_w0_config & epm->epm_mpbit) { 624 /* 625 * This simple test works because 509 chipsets 626 * don't do full-duplex. 627 */ 628 if (epm->epm_epmedia == port || defmedia == 0) { 629 defmedia = epm->epm_ifmedia; 630 defmedianame = epm->epm_name; 631 } 632 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 633 NULL); 634 PRINT(epm->epm_name); 635 } 636 } 637 638 #undef PRINT 639 640 #ifdef DIAGNOSTIC 641 if (defmedia == 0) 642 panic("ep_509_probemedia: impossible"); 643 #endif 644 645 printf(" (default %s)\n", defmedianame); 646 ifmedia_set(ifm, defmedia); 647 } 648 649 /* 650 * Find media present on large-packet-capable elink3 devices. 651 * Show onboard configuration of large-packet-capable elink3 devices 652 * (Demon, Vortex, Boomerang), which do not implement CONFIG_CTRL in window 0. 653 * Use media and card-version info in window 3 instead. 654 */ 655 void 656 ep_vortex_probemedia(sc) 657 struct ep_softc *sc; 658 { 659 bus_space_tag_t iot = sc->sc_iot; 660 bus_space_handle_t ioh = sc->sc_ioh; 661 struct ifmedia *ifm = &sc->sc_mii.mii_media; 662 const struct ep_media *epm; 663 u_int config1; 664 int reset_options; 665 int default_media; /* 3-bit encoding of default (EEPROM) media */ 666 int defmedia = 0; 667 const char *sep = "", *defmedianame = NULL; 668 669 GO_WINDOW(3); 670 config1 = (u_int)bus_space_read_2(iot, ioh, 671 ELINK_W3_INTERNAL_CONFIG + 2); 672 reset_options = (int)bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 673 GO_WINDOW(0); 674 675 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 676 677 printf("%s: ", sc->sc_dev.dv_xname); 678 679 /* Sanity check that there are any media! */ 680 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 681 printf("no media present!\n"); 682 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 683 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 684 return; 685 } 686 687 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 688 689 for (epm = ep_vortex_media; epm->epm_name != NULL; epm++) { 690 if (reset_options & epm->epm_mpbit) { 691 /* 692 * Default media is a little more complicated 693 * on the Vortex. We support full-duplex which 694 * uses the same reset options bit. 695 * 696 * XXX Check EEPROM for default to FDX? 697 */ 698 if (epm->epm_epmedia == default_media) { 699 if ((epm->epm_ifmedia & IFM_FDX) == 0) { 700 defmedia = epm->epm_ifmedia; 701 defmedianame = epm->epm_name; 702 } 703 } else if (defmedia == 0) { 704 defmedia = epm->epm_ifmedia; 705 defmedianame = epm->epm_name; 706 } 707 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 708 NULL); 709 PRINT(epm->epm_name); 710 } 711 } 712 713 #undef PRINT 714 715 #ifdef DIAGNOSTIC 716 if (defmedia == 0) 717 panic("ep_vortex_probemedia: impossible"); 718 #endif 719 720 printf(" (default %s)\n", defmedianame); 721 ifmedia_set(ifm, defmedia); 722 } 723 724 /* 725 * One second timer, used to tick the MII. 726 */ 727 void 728 ep_tick(arg) 729 void *arg; 730 { 731 struct ep_softc *sc = arg; 732 int s; 733 734 #ifdef DIAGNOSTIC 735 if ((sc->ep_flags & ELINK_FLAGS_MII) == 0) 736 panic("ep_tick"); 737 #endif 738 739 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 740 return; 741 742 s = splnet(); 743 mii_tick(&sc->sc_mii); 744 splx(s); 745 746 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 747 } 748 749 /* 750 * Bring device up. 751 * 752 * The order in here seems important. Otherwise we may not receive 753 * interrupts. ?! 754 */ 755 int 756 epinit(ifp) 757 struct ifnet *ifp; 758 { 759 struct ep_softc *sc = ifp->if_softc; 760 bus_space_tag_t iot = sc->sc_iot; 761 bus_space_handle_t ioh = sc->sc_ioh; 762 int i, error; 763 764 if (!sc->enabled && (error = epenable(sc)) != 0) 765 return (error); 766 767 /* Make sure any pending reset has completed before touching board */ 768 ep_finish_reset(iot, ioh); 769 770 /* 771 * Cancel any pending I/O. 772 */ 773 epstop(ifp, 0); 774 775 if (sc->bustype != ELINK_BUS_PCI && sc->bustype != ELINK_BUS_EISA) { 776 GO_WINDOW(0); 777 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 0); 778 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 779 ENABLE_DRQ_IRQ); 780 } 781 782 if (sc->bustype == ELINK_BUS_PCMCIA) { 783 bus_space_write_2(iot, ioh, ELINK_W0_RESOURCE_CFG, 0x3f00); 784 } 785 786 GO_WINDOW(2); 787 for (i = 0; i < 6; i++) /* Reload the ether_addr. */ 788 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 789 LLADDR(ifp->if_sadl)[i]); 790 791 /* 792 * Reset the station-address receive filter. 793 * A bug workaround for busmastering (Vortex, Demon) cards. 794 */ 795 for (i = 0; i < 6; i++) 796 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 797 798 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 799 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 800 801 GO_WINDOW(1); /* Window 1 is operating window */ 802 for (i = 0; i < 31; i++) 803 bus_space_read_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS)); 804 805 /* Set threshold for Tx-space available interrupt. */ 806 bus_space_write_2(iot, ioh, ELINK_COMMAND, 807 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 808 809 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 810 /* 811 * Enable options in the PCMCIA LAN COR register, via 812 * RoadRunner Window 1. 813 * 814 * XXX MAGIC CONSTANTS! 815 */ 816 u_int16_t cor; 817 818 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, (1 << 11)); 819 820 cor = bus_space_read_2(iot, ioh, 0) & ~0x30; 821 if (sc->ep_flags & ELINK_FLAGS_USESHAREDMEM) 822 cor |= 0x10; 823 if (sc->ep_flags & ELINK_FLAGS_FORCENOWAIT) 824 cor |= 0x20; 825 bus_space_write_2(iot, ioh, 0, cor); 826 827 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 828 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 829 830 if (sc->ep_flags & ELINK_FLAGS_MII) { 831 ep_roadrunner_mii_enable(sc); 832 GO_WINDOW(1); 833 } 834 } 835 836 /* Enable interrupts. */ 837 bus_space_write_2(iot, ioh, ELINK_COMMAND, 838 SET_RD_0_MASK | S_CARD_FAILURE | S_RX_COMPLETE | S_TX_COMPLETE | 839 S_TX_AVAIL); 840 bus_space_write_2(iot, ioh, ELINK_COMMAND, 841 SET_INTR_MASK | S_CARD_FAILURE | S_RX_COMPLETE | S_TX_COMPLETE | 842 S_TX_AVAIL); 843 844 /* 845 * Attempt to get rid of any stray interrupts that occured during 846 * configuration. On the i386 this isn't possible because one may 847 * already be queued. However, a single stray interrupt is 848 * unimportant. 849 */ 850 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 851 852 epsetfilter(sc); 853 epsetmedia(sc); 854 855 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 856 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 857 858 epmbuffill(sc); 859 860 /* Interface is now `running', with no output active. */ 861 ifp->if_flags |= IFF_RUNNING; 862 ifp->if_flags &= ~IFF_OACTIVE; 863 864 if (sc->ep_flags & ELINK_FLAGS_MII) { 865 /* Start the one second clock. */ 866 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 867 } 868 869 /* Attempt to start output, if any. */ 870 epstart(ifp); 871 872 return (0); 873 } 874 875 876 /* 877 * Set multicast receive filter. 878 * elink3 hardware has no selective multicast filter in hardware. 879 * Enable reception of all multicasts and filter in software. 880 */ 881 void 882 epsetfilter(sc) 883 struct ep_softc *sc; 884 { 885 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 886 887 GO_WINDOW(1); /* Window 1 is operating window */ 888 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 889 SET_RX_FILTER | FIL_INDIVIDUAL | FIL_BRDCST | 890 ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0) | 891 ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0)); 892 } 893 894 int 895 ep_media_change(ifp) 896 struct ifnet *ifp; 897 { 898 struct ep_softc *sc = ifp->if_softc; 899 900 if (sc->enabled && (ifp->if_flags & IFF_UP) != 0) 901 epreset(sc); 902 903 return (0); 904 } 905 906 /* 907 * Reset and enable the MII on the RoadRunner. 908 */ 909 void 910 ep_roadrunner_mii_enable(sc) 911 struct ep_softc *sc; 912 { 913 bus_space_tag_t iot = sc->sc_iot; 914 bus_space_handle_t ioh = sc->sc_ioh; 915 916 GO_WINDOW(3); 917 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 918 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 919 delay(1000); 920 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 921 ELINK_PCI_100BASE_MII|ELINK_RUNNER_MII_RESET| 922 ELINK_RUNNER_ENABLE_MII); 923 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 924 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 925 delay(1000); 926 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 927 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 928 } 929 930 /* 931 * Set the card to use the specified media. 932 */ 933 void 934 epsetmedia(sc) 935 struct ep_softc *sc; 936 { 937 bus_space_tag_t iot = sc->sc_iot; 938 bus_space_handle_t ioh = sc->sc_ioh; 939 940 /* Turn everything off. First turn off linkbeat and UTP. */ 941 GO_WINDOW(4); 942 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0x0); 943 944 /* Turn off coax */ 945 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 946 delay(1000); 947 948 /* 949 * If the device has MII, select it, and then tell the 950 * PHY which media to use. 951 */ 952 if (sc->ep_flags & ELINK_FLAGS_MII) { 953 int config0, config1; 954 955 GO_WINDOW(3); 956 957 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 958 int resopt; 959 960 resopt = bus_space_read_2(iot, ioh, 961 ELINK_W3_RESET_OPTIONS); 962 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 963 resopt | ELINK_RUNNER_ENABLE_MII); 964 } 965 966 config0 = (u_int)bus_space_read_2(iot, ioh, 967 ELINK_W3_INTERNAL_CONFIG); 968 config1 = (u_int)bus_space_read_2(iot, ioh, 969 ELINK_W3_INTERNAL_CONFIG + 2); 970 971 config1 = config1 & ~CONFIG_MEDIAMASK; 972 config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT); 973 974 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 975 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 976 config1); 977 GO_WINDOW(1); /* back to operating window */ 978 979 mii_mediachg(&sc->sc_mii); 980 return; 981 } 982 983 /* 984 * Now turn on the selected media/transceiver. 985 */ 986 GO_WINDOW(4); 987 switch (IFM_SUBTYPE(sc->sc_mii.mii_media.ifm_cur->ifm_media)) { 988 case IFM_10_T: 989 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 990 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 991 break; 992 993 case IFM_10_2: 994 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 995 DELAY(1000); /* 50ms not enmough? */ 996 break; 997 998 case IFM_100_TX: 999 case IFM_100_FX: 1000 case IFM_100_T4: /* XXX check documentation */ 1001 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 1002 LINKBEAT_ENABLE); 1003 DELAY(1000); /* not strictly necessary? */ 1004 break; 1005 1006 case IFM_10_5: 1007 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 1008 SQE_ENABLE); 1009 DELAY(1000); /* not strictly necessary? */ 1010 break; 1011 1012 case IFM_MANUAL: 1013 /* 1014 * Nothing to do here; we are actually enabling the 1015 * external PHY on the MII port. 1016 */ 1017 break; 1018 1019 case IFM_NONE: 1020 printf("%s: interface disabled\n", sc->sc_dev.dv_xname); 1021 return; 1022 1023 default: 1024 panic("epsetmedia: impossible"); 1025 } 1026 1027 /* 1028 * Tell the chip which port to use. 1029 */ 1030 switch (sc->ep_chipset) { 1031 case ELINK_CHIPSET_VORTEX: 1032 case ELINK_CHIPSET_BOOMERANG: 1033 { 1034 int mctl, config0, config1; 1035 1036 GO_WINDOW(3); 1037 config0 = (u_int)bus_space_read_2(iot, ioh, 1038 ELINK_W3_INTERNAL_CONFIG); 1039 config1 = (u_int)bus_space_read_2(iot, ioh, 1040 ELINK_W3_INTERNAL_CONFIG + 2); 1041 1042 config1 = config1 & ~CONFIG_MEDIAMASK; 1043 config1 |= (sc->sc_mii.mii_media.ifm_cur->ifm_data << 1044 CONFIG_MEDIAMASK_SHIFT); 1045 1046 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 1047 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 1048 config1); 1049 1050 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1051 if (sc->sc_mii.mii_media.ifm_cur->ifm_media & IFM_FDX) 1052 mctl |= MAC_CONTROL_FDX; 1053 else 1054 mctl &= ~MAC_CONTROL_FDX; 1055 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1056 break; 1057 } 1058 default: 1059 { 1060 int w0_addr_cfg; 1061 1062 GO_WINDOW(0); 1063 w0_addr_cfg = bus_space_read_2(iot, ioh, ELINK_W0_ADDRESS_CFG); 1064 w0_addr_cfg &= 0x3fff; 1065 bus_space_write_2(iot, ioh, ELINK_W0_ADDRESS_CFG, w0_addr_cfg | 1066 (sc->sc_mii.mii_media.ifm_cur->ifm_data << 14)); 1067 DELAY(1000); 1068 break; 1069 } 1070 } 1071 1072 GO_WINDOW(1); /* Window 1 is operating window */ 1073 } 1074 1075 /* 1076 * Get currently-selected media from card. 1077 * (if_media callback, may be called before interface is brought up). 1078 */ 1079 void 1080 ep_media_status(ifp, req) 1081 struct ifnet *ifp; 1082 struct ifmediareq *req; 1083 { 1084 struct ep_softc *sc = ifp->if_softc; 1085 bus_space_tag_t iot = sc->sc_iot; 1086 bus_space_handle_t ioh = sc->sc_ioh; 1087 1088 if (sc->enabled == 0) { 1089 req->ifm_active = IFM_ETHER|IFM_NONE; 1090 req->ifm_status = 0; 1091 return; 1092 } 1093 1094 /* 1095 * If we have MII, go ask the PHY what's going on. 1096 */ 1097 if (sc->ep_flags & ELINK_FLAGS_MII) { 1098 mii_pollstat(&sc->sc_mii); 1099 req->ifm_active = sc->sc_mii.mii_media_active; 1100 req->ifm_status = sc->sc_mii.mii_media_status; 1101 return; 1102 } 1103 1104 /* 1105 * Ok, at this point we claim that our active media is 1106 * the currently selected media. We'll update our status 1107 * if our chipset allows us to detect link. 1108 */ 1109 req->ifm_active = sc->sc_mii.mii_media.ifm_cur->ifm_media; 1110 req->ifm_status = 0; 1111 1112 switch (sc->ep_chipset) { 1113 case ELINK_CHIPSET_VORTEX: 1114 case ELINK_CHIPSET_BOOMERANG: 1115 GO_WINDOW(4); 1116 req->ifm_status = IFM_AVALID; 1117 if (bus_space_read_2(iot, ioh, ELINK_W4_MEDIA_TYPE) & 1118 LINKBEAT_DETECT) 1119 req->ifm_status |= IFM_ACTIVE; 1120 GO_WINDOW(1); /* back to operating window */ 1121 break; 1122 } 1123 } 1124 1125 1126 1127 /* 1128 * Start outputting on the interface. 1129 * Always called as splnet(). 1130 */ 1131 void 1132 epstart(ifp) 1133 struct ifnet *ifp; 1134 { 1135 struct ep_softc *sc = ifp->if_softc; 1136 bus_space_tag_t iot = sc->sc_iot; 1137 bus_space_handle_t ioh = sc->sc_ioh; 1138 struct mbuf *m, *m0; 1139 int sh, len, pad; 1140 bus_addr_t txreg; 1141 1142 /* Don't transmit if interface is busy or not running */ 1143 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1144 return; 1145 1146 startagain: 1147 /* Sneak a peek at the next packet */ 1148 IFQ_POLL(&ifp->if_snd, m0); 1149 if (m0 == 0) 1150 return; 1151 1152 /* We need to use m->m_pkthdr.len, so require the header */ 1153 if ((m0->m_flags & M_PKTHDR) == 0) 1154 panic("epstart: no header mbuf"); 1155 len = m0->m_pkthdr.len; 1156 1157 pad = (4 - len) & 3; 1158 1159 /* 1160 * The 3c509 automatically pads short packets to minimum ethernet 1161 * length, but we drop packets that are too large. Perhaps we should 1162 * truncate them instead? 1163 */ 1164 if (len + pad > ETHER_MAX_LEN) { 1165 /* packet is obviously too large: toss it */ 1166 ++ifp->if_oerrors; 1167 IFQ_DEQUEUE(&ifp->if_snd, m0); 1168 m_freem(m0); 1169 goto readcheck; 1170 } 1171 1172 if (bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_FREE_TX)) < 1173 len + pad + 4) { 1174 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1175 SET_TX_AVAIL_THRESH | 1176 ((len + pad + 4) >> sc->ep_pktlenshift)); 1177 /* not enough room in FIFO */ 1178 ifp->if_flags |= IFF_OACTIVE; 1179 return; 1180 } else { 1181 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1182 SET_TX_AVAIL_THRESH | ELINK_THRESH_DISABLE); 1183 } 1184 1185 IFQ_DEQUEUE(&ifp->if_snd, m0); 1186 if (m0 == 0) /* not really needed */ 1187 return; 1188 1189 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_TX_START_THRESH | 1190 ((len / 4 + sc->tx_start_thresh) /* >> sc->ep_pktlenshift*/)); 1191 1192 #if NBPFILTER > 0 1193 if (ifp->if_bpf) 1194 bpf_mtap(ifp->if_bpf, m0); 1195 #endif 1196 1197 /* 1198 * Do the output at a high interrupt priority level so that an 1199 * interrupt from another device won't cause a FIFO underrun. 1200 * We choose splsched() since that blocks essentially everything 1201 * except for interrupts from serial devices (which typically 1202 * lose data if their interrupt isn't serviced fast enough). 1203 * 1204 * XXX THIS CAN CAUSE CLOCK DRIFT! 1205 */ 1206 sh = splsched(); 1207 1208 txreg = ep_w1_reg(sc, ELINK_W1_TX_PIO_WR_1); 1209 1210 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1211 /* 1212 * Prime the FIFO buffer counter (number of 16-bit 1213 * words about to be written to the FIFO). 1214 * 1215 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1216 * COUNTER IS NON-ZERO! 1217 */ 1218 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 1219 (len + pad) >> 1); 1220 } 1221 1222 bus_space_write_2(iot, ioh, txreg, len); 1223 bus_space_write_2(iot, ioh, txreg, 0xffff); /* Second is meaningless */ 1224 if (ELINK_IS_BUS_32(sc->bustype)) { 1225 for (m = m0; m;) { 1226 if (m->m_len > 3) { 1227 /* align our reads from core */ 1228 if (mtod(m, u_long) & 3) { 1229 u_long count = 1230 4 - (mtod(m, u_long) & 3); 1231 bus_space_write_multi_1(iot, ioh, 1232 txreg, mtod(m, u_int8_t *), count); 1233 m->m_data = 1234 (void *)(mtod(m, u_long) + count); 1235 m->m_len -= count; 1236 } 1237 bus_space_write_multi_stream_4(iot, ioh, 1238 txreg, mtod(m, u_int32_t *), m->m_len >> 2); 1239 m->m_data = (void *)(mtod(m, u_long) + 1240 (u_long)(m->m_len & ~3)); 1241 m->m_len -= m->m_len & ~3; 1242 } 1243 if (m->m_len) { 1244 bus_space_write_multi_1(iot, ioh, 1245 txreg, mtod(m, u_int8_t *), m->m_len); 1246 } 1247 MFREE(m, m0); 1248 m = m0; 1249 } 1250 } else { 1251 for (m = m0; m;) { 1252 if (m->m_len > 1) { 1253 if (mtod(m, u_long) & 1) { 1254 bus_space_write_1(iot, ioh, 1255 txreg, *(mtod(m, u_int8_t *))); 1256 m->m_data = 1257 (void *)(mtod(m, u_long) + 1); 1258 m->m_len -= 1; 1259 } 1260 bus_space_write_multi_stream_2(iot, ioh, 1261 txreg, mtod(m, u_int16_t *), 1262 m->m_len >> 1); 1263 } 1264 if (m->m_len & 1) { 1265 bus_space_write_1(iot, ioh, txreg, 1266 *(mtod(m, u_int8_t *) + m->m_len - 1)); 1267 } 1268 MFREE(m, m0); 1269 m = m0; 1270 } 1271 } 1272 while (pad--) 1273 bus_space_write_1(iot, ioh, txreg, 0); 1274 1275 splx(sh); 1276 1277 ++ifp->if_opackets; 1278 1279 readcheck: 1280 if ((bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)) & 1281 ERR_INCOMPLETE) == 0) { 1282 /* We received a complete packet. */ 1283 u_int16_t status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1284 1285 if ((status & S_INTR_LATCH) == 0) { 1286 /* 1287 * No interrupt, read the packet and continue 1288 * Is this supposed to happen? Is my motherboard 1289 * completely busted? 1290 */ 1291 epread(sc); 1292 } else { 1293 /* Got an interrupt, return so that it gets serviced. */ 1294 return; 1295 } 1296 } else { 1297 /* Check if we are stuck and reset [see XXX comment] */ 1298 if (epstatus(sc)) { 1299 if (ifp->if_flags & IFF_DEBUG) 1300 printf("%s: adapter reset\n", 1301 sc->sc_dev.dv_xname); 1302 epreset(sc); 1303 } 1304 } 1305 1306 goto startagain; 1307 } 1308 1309 1310 /* 1311 * XXX: The 3c509 card can get in a mode where both the fifo status bit 1312 * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set 1313 * We detect this situation and we reset the adapter. 1314 * It happens at times when there is a lot of broadcast traffic 1315 * on the cable (once in a blue moon). 1316 */ 1317 static int 1318 epstatus(sc) 1319 struct ep_softc *sc; 1320 { 1321 bus_space_tag_t iot = sc->sc_iot; 1322 bus_space_handle_t ioh = sc->sc_ioh; 1323 u_int16_t fifost; 1324 1325 /* 1326 * Check the FIFO status and act accordingly 1327 */ 1328 GO_WINDOW(4); 1329 fifost = bus_space_read_2(iot, ioh, ELINK_W4_FIFO_DIAG); 1330 GO_WINDOW(1); 1331 1332 if (fifost & FIFOS_RX_UNDERRUN) { 1333 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1334 printf("%s: RX underrun\n", sc->sc_dev.dv_xname); 1335 epreset(sc); 1336 return 0; 1337 } 1338 1339 if (fifost & FIFOS_RX_STATUS_OVERRUN) { 1340 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1341 printf("%s: RX Status overrun\n", sc->sc_dev.dv_xname); 1342 return 1; 1343 } 1344 1345 if (fifost & FIFOS_RX_OVERRUN) { 1346 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1347 printf("%s: RX overrun\n", sc->sc_dev.dv_xname); 1348 return 1; 1349 } 1350 1351 if (fifost & FIFOS_TX_OVERRUN) { 1352 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1353 printf("%s: TX overrun\n", sc->sc_dev.dv_xname); 1354 epreset(sc); 1355 return 0; 1356 } 1357 1358 return 0; 1359 } 1360 1361 1362 static void 1363 eptxstat(sc) 1364 struct ep_softc *sc; 1365 { 1366 bus_space_tag_t iot = sc->sc_iot; 1367 bus_space_handle_t ioh = sc->sc_ioh; 1368 int i; 1369 1370 /* 1371 * We need to read+write TX_STATUS until we get a 0 status 1372 * in order to turn off the interrupt flag. 1373 */ 1374 while ((i = bus_space_read_1(iot, ioh, 1375 ep_w1_reg(sc, ELINK_W1_TX_STATUS))) & TXS_COMPLETE) { 1376 bus_space_write_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS), 1377 0x0); 1378 1379 if (i & TXS_JABBER) { 1380 ++sc->sc_ethercom.ec_if.if_oerrors; 1381 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1382 printf("%s: jabber (%x)\n", 1383 sc->sc_dev.dv_xname, i); 1384 epreset(sc); 1385 } else if (i & TXS_UNDERRUN) { 1386 ++sc->sc_ethercom.ec_if.if_oerrors; 1387 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1388 printf("%s: fifo underrun (%x) @%d\n", 1389 sc->sc_dev.dv_xname, i, 1390 sc->tx_start_thresh); 1391 if (sc->tx_succ_ok < 100) 1392 sc->tx_start_thresh = min(ETHER_MAX_LEN, 1393 sc->tx_start_thresh + 20); 1394 sc->tx_succ_ok = 0; 1395 epreset(sc); 1396 } else if (i & TXS_MAX_COLLISION) { 1397 ++sc->sc_ethercom.ec_if.if_collisions; 1398 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 1399 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1400 } else 1401 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 1402 } 1403 } 1404 1405 int 1406 epintr(arg) 1407 void *arg; 1408 { 1409 struct ep_softc *sc = arg; 1410 bus_space_tag_t iot = sc->sc_iot; 1411 bus_space_handle_t ioh = sc->sc_ioh; 1412 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1413 u_int16_t status; 1414 int ret = 0; 1415 int addrandom = 0; 1416 1417 if (sc->enabled == 0 || 1418 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1419 return (0); 1420 1421 for (;;) { 1422 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1423 1424 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1425 1426 if ((status & (S_TX_COMPLETE | S_TX_AVAIL | 1427 S_RX_COMPLETE | S_CARD_FAILURE)) == 0) { 1428 if ((status & S_INTR_LATCH) == 0) { 1429 #if 0 1430 printf("%s: intr latch cleared %d\n", 1431 sc->sc_dev.dv_xname, status); 1432 #endif 1433 break; 1434 } 1435 } 1436 1437 ret = 1; 1438 1439 /* 1440 * Acknowledge any interrupts. It's important that we do this 1441 * first, since there would otherwise be a race condition. 1442 * Due to the i386 interrupt queueing, we may get spurious 1443 * interrupts occasionally. 1444 */ 1445 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1446 (status & (C_INTR_LATCH | 1447 C_CARD_FAILURE | 1448 C_TX_COMPLETE | 1449 C_TX_AVAIL | 1450 C_RX_COMPLETE | 1451 C_RX_EARLY | 1452 C_INT_RQD | 1453 C_UPD_STATS))); 1454 1455 #if 0 1456 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1457 1458 printf("%s: intr%s%s%s%s\n", sc->sc_dev.dv_xname, 1459 (status & S_RX_COMPLETE)?" RX_COMPLETE":"", 1460 (status & S_TX_COMPLETE)?" TX_COMPLETE":"", 1461 (status & S_TX_AVAIL)?" TX_AVAIL":"", 1462 (status & S_CARD_FAILURE)?" CARD_FAILURE":""); 1463 #endif 1464 1465 if (status & S_RX_COMPLETE) { 1466 epread(sc); 1467 addrandom = 1; 1468 } 1469 if (status & S_TX_AVAIL) { 1470 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1471 epstart(&sc->sc_ethercom.ec_if); 1472 addrandom = 1; 1473 } 1474 if (status & S_CARD_FAILURE) { 1475 printf("%s: adapter failure (%x)\n", 1476 sc->sc_dev.dv_xname, status); 1477 #if 1 1478 epinit(ifp); 1479 #else 1480 epreset(sc); 1481 #endif 1482 return (1); 1483 } 1484 if (status & S_TX_COMPLETE) { 1485 eptxstat(sc); 1486 epstart(ifp); 1487 addrandom = 1; 1488 } 1489 1490 #if NRND > 0 1491 if (status) 1492 rnd_add_uint32(&sc->rnd_source, status); 1493 #endif 1494 } 1495 1496 /* no more interrupts */ 1497 return (ret); 1498 } 1499 1500 void 1501 epread(sc) 1502 struct ep_softc *sc; 1503 { 1504 bus_space_tag_t iot = sc->sc_iot; 1505 bus_space_handle_t ioh = sc->sc_ioh; 1506 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1507 struct mbuf *m; 1508 int len; 1509 1510 len = bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1511 1512 again: 1513 if (ifp->if_flags & IFF_DEBUG) { 1514 int err = len & ERR_MASK; 1515 char *s = NULL; 1516 1517 if (len & ERR_INCOMPLETE) 1518 s = "incomplete packet"; 1519 else if (err == ERR_OVERRUN) 1520 s = "packet overrun"; 1521 else if (err == ERR_RUNT) 1522 s = "runt packet"; 1523 else if (err == ERR_ALIGNMENT) 1524 s = "bad alignment"; 1525 else if (err == ERR_CRC) 1526 s = "bad crc"; 1527 else if (err == ERR_OVERSIZE) 1528 s = "oversized packet"; 1529 else if (err == ERR_DRIBBLE) 1530 s = "dribble bits"; 1531 1532 if (s) 1533 printf("%s: %s\n", sc->sc_dev.dv_xname, s); 1534 } 1535 1536 if (len & ERR_INCOMPLETE) 1537 return; 1538 1539 if (len & ERR_RX) { 1540 ++ifp->if_ierrors; 1541 goto abort; 1542 } 1543 1544 len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */ 1545 1546 /* Pull packet off interface. */ 1547 m = epget(sc, len); 1548 if (m == 0) { 1549 ifp->if_ierrors++; 1550 goto abort; 1551 } 1552 1553 ++ifp->if_ipackets; 1554 1555 #if NBPFILTER > 0 1556 /* 1557 * Check if there's a BPF listener on this interface. 1558 * If so, hand off the raw packet to BPF. 1559 */ 1560 if (ifp->if_bpf) 1561 bpf_mtap(ifp->if_bpf, m); 1562 #endif 1563 1564 (*ifp->if_input)(ifp, m); 1565 1566 /* 1567 * In periods of high traffic we can actually receive enough 1568 * packets so that the fifo overrun bit will be set at this point, 1569 * even though we just read a packet. In this case we 1570 * are not going to receive any more interrupts. We check for 1571 * this condition and read again until the fifo is not full. 1572 * We could simplify this test by not using epstatus(), but 1573 * rechecking the RX_STATUS register directly. This test could 1574 * result in unnecessary looping in cases where there is a new 1575 * packet but the fifo is not full, but it will not fix the 1576 * stuck behavior. 1577 * 1578 * Even with this improvement, we still get packet overrun errors 1579 * which are hurting performance. Maybe when I get some more time 1580 * I'll modify epread() so that it can handle RX_EARLY interrupts. 1581 */ 1582 if (epstatus(sc)) { 1583 len = bus_space_read_2(iot, ioh, 1584 ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1585 /* Check if we are stuck and reset [see XXX comment] */ 1586 if (len & ERR_INCOMPLETE) { 1587 if (ifp->if_flags & IFF_DEBUG) 1588 printf("%s: adapter reset\n", 1589 sc->sc_dev.dv_xname); 1590 epreset(sc); 1591 return; 1592 } 1593 goto again; 1594 } 1595 1596 return; 1597 1598 abort: 1599 ep_discard_rxtop(iot, ioh); 1600 1601 } 1602 1603 struct mbuf * 1604 epget(sc, totlen) 1605 struct ep_softc *sc; 1606 int totlen; 1607 { 1608 bus_space_tag_t iot = sc->sc_iot; 1609 bus_space_handle_t ioh = sc->sc_ioh; 1610 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1611 struct mbuf *top, **mp, *m, *rv = NULL; 1612 bus_addr_t rxreg; 1613 int len, remaining; 1614 int sh; 1615 1616 m = sc->mb[sc->next_mb]; 1617 sc->mb[sc->next_mb] = 0; 1618 if (m == 0) { 1619 MGETHDR(m, M_DONTWAIT, MT_DATA); 1620 if (m == 0) 1621 return 0; 1622 } else { 1623 /* If the queue is no longer full, refill. */ 1624 if (sc->last_mb == sc->next_mb) 1625 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1626 /* Convert one of our saved mbuf's. */ 1627 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1628 m->m_data = m->m_pktdat; 1629 m->m_flags = M_PKTHDR; 1630 bzero(&m->m_pkthdr, sizeof(m->m_pkthdr)); 1631 } 1632 m->m_pkthdr.rcvif = ifp; 1633 m->m_pkthdr.len = totlen; 1634 len = MHLEN; 1635 top = 0; 1636 mp = ⊤ 1637 1638 /* 1639 * We read the packet at a high interrupt priority level so that 1640 * an interrupt from another device won't cause the card's packet 1641 * buffer to overflow. We choose splsched() since that blocks 1642 * essentially everything except for interrupts from serial 1643 * devices (which typically lose data of their interrupt isn't 1644 * serviced fast enough). 1645 * 1646 * XXX THIS CAN CAUSE CLOCK DRIFT! 1647 */ 1648 sh = splsched(); 1649 1650 rxreg = ep_w1_reg(sc, ELINK_W1_RX_PIO_RD_1); 1651 1652 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1653 /* 1654 * Prime the FIFO buffer counter (number of 16-bit 1655 * words about to be read from the FIFO). 1656 * 1657 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1658 * COUNTER IS NON-ZERO! 1659 */ 1660 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, totlen >> 1); 1661 } 1662 1663 while (totlen > 0) { 1664 if (top) { 1665 m = sc->mb[sc->next_mb]; 1666 sc->mb[sc->next_mb] = 0; 1667 if (m == 0) { 1668 MGET(m, M_DONTWAIT, MT_DATA); 1669 if (m == 0) { 1670 m_freem(top); 1671 goto out; 1672 } 1673 } else { 1674 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1675 } 1676 len = MLEN; 1677 } 1678 if (totlen >= MINCLSIZE) { 1679 MCLGET(m, M_DONTWAIT); 1680 if ((m->m_flags & M_EXT) == 0) { 1681 m_free(m); 1682 m_freem(top); 1683 goto out; 1684 } 1685 len = MCLBYTES; 1686 } 1687 if (top == 0) { 1688 /* align the struct ip header */ 1689 caddr_t newdata = (caddr_t) 1690 ALIGN(m->m_data + sizeof(struct ether_header)) 1691 - sizeof(struct ether_header); 1692 len -= newdata - m->m_data; 1693 m->m_data = newdata; 1694 } 1695 remaining = len = min(totlen, len); 1696 if (ELINK_IS_BUS_32(sc->bustype)) { 1697 u_long offset = mtod(m, u_long); 1698 /* 1699 * Read bytes up to the point where we are aligned. 1700 * (We can align to 4 bytes, rather than ALIGNBYTES, 1701 * here because we're later reading 4-byte chunks.) 1702 */ 1703 if ((remaining > 3) && (offset & 3)) { 1704 int count = (4 - (offset & 3)); 1705 bus_space_read_multi_1(iot, ioh, 1706 rxreg, (u_int8_t *) offset, count); 1707 offset += count; 1708 remaining -= count; 1709 } 1710 if (remaining > 3) { 1711 bus_space_read_multi_stream_4(iot, ioh, 1712 rxreg, (u_int32_t *) offset, 1713 remaining >> 2); 1714 offset += remaining & ~3; 1715 remaining &= 3; 1716 } 1717 if (remaining) { 1718 bus_space_read_multi_1(iot, ioh, 1719 rxreg, (u_int8_t *) offset, remaining); 1720 } 1721 } else { 1722 u_long offset = mtod(m, u_long); 1723 if ((remaining > 1) && (offset & 1)) { 1724 bus_space_read_multi_1(iot, ioh, 1725 rxreg, (u_int8_t *) offset, 1); 1726 remaining -= 1; 1727 offset += 1; 1728 } 1729 if (remaining > 1) { 1730 bus_space_read_multi_stream_2(iot, ioh, 1731 rxreg, (u_int16_t *) offset, 1732 remaining >> 1); 1733 offset += remaining & ~1; 1734 } 1735 if (remaining & 1) { 1736 bus_space_read_multi_1(iot, ioh, 1737 rxreg, (u_int8_t *) offset, remaining & 1); 1738 } 1739 } 1740 m->m_len = len; 1741 totlen -= len; 1742 *mp = m; 1743 mp = &m->m_next; 1744 } 1745 1746 rv = top; 1747 1748 ep_discard_rxtop(iot, ioh); 1749 1750 out: 1751 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 1752 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1753 splx(sh); 1754 1755 return rv; 1756 } 1757 1758 int 1759 epioctl(ifp, cmd, data) 1760 struct ifnet *ifp; 1761 u_long cmd; 1762 caddr_t data; 1763 { 1764 struct ep_softc *sc = ifp->if_softc; 1765 struct ifreq *ifr = (struct ifreq *)data; 1766 int s, error = 0; 1767 1768 s = splnet(); 1769 1770 switch (cmd) { 1771 1772 case SIOCSIFMEDIA: 1773 case SIOCGIFMEDIA: 1774 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 1775 break; 1776 1777 case SIOCADDMULTI: 1778 case SIOCDELMULTI: 1779 if (sc->enabled == 0) { 1780 error = EIO; 1781 break; 1782 } 1783 1784 default: 1785 error = ether_ioctl(ifp, cmd, data); 1786 1787 if (error == ENETRESET) { 1788 /* 1789 * Multicast list has changed; set the hardware filter 1790 * accordingly. 1791 */ 1792 epreset(sc); 1793 error = 0; 1794 } 1795 break; 1796 } 1797 1798 splx(s); 1799 return (error); 1800 } 1801 1802 void 1803 epreset(sc) 1804 struct ep_softc *sc; 1805 { 1806 int s; 1807 1808 s = splnet(); 1809 epinit(&sc->sc_ethercom.ec_if); 1810 splx(s); 1811 } 1812 1813 void 1814 epwatchdog(ifp) 1815 struct ifnet *ifp; 1816 { 1817 struct ep_softc *sc = ifp->if_softc; 1818 1819 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1820 ++sc->sc_ethercom.ec_if.if_oerrors; 1821 1822 epreset(sc); 1823 } 1824 1825 void 1826 epstop(ifp, disable) 1827 struct ifnet *ifp; 1828 int disable; 1829 { 1830 struct ep_softc *sc = ifp->if_softc; 1831 bus_space_tag_t iot = sc->sc_iot; 1832 bus_space_handle_t ioh = sc->sc_ioh; 1833 1834 if (sc->ep_flags & ELINK_FLAGS_MII) { 1835 /* Stop the one second clock. */ 1836 callout_stop(&sc->sc_mbuf_callout); 1837 1838 /* Down the MII. */ 1839 mii_down(&sc->sc_mii); 1840 } 1841 1842 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 1843 /* 1844 * Clear the FIFO buffer count, thus halting 1845 * any currently-running transactions. 1846 */ 1847 GO_WINDOW(1); /* sanity */ 1848 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 1849 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1850 } 1851 1852 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1853 ep_discard_rxtop(iot, ioh); 1854 1855 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1856 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1857 1858 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 1859 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 1860 1861 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1862 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK); 1863 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK); 1864 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RX_FILTER); 1865 1866 epmbufempty(sc); 1867 1868 if (disable) 1869 epdisable(sc); 1870 1871 ifp->if_flags &= ~IFF_RUNNING; 1872 } 1873 1874 1875 /* 1876 * Before reboots, reset card completely. 1877 */ 1878 static void 1879 epshutdown(arg) 1880 void *arg; 1881 { 1882 struct ep_softc *sc = arg; 1883 int s = splnet(); 1884 1885 if (sc->enabled) { 1886 epstop(&sc->sc_ethercom.ec_if, 1); 1887 ep_reset_cmd(sc, ELINK_COMMAND, GLOBAL_RESET); 1888 sc->enabled = 0; 1889 } 1890 splx(s); 1891 } 1892 1893 /* 1894 * We get eeprom data from the id_port given an offset into the 1895 * eeprom. Basically; after the ID_sequence is sent to all of 1896 * the cards; they enter the ID_CMD state where they will accept 1897 * command requests. 0x80-0xbf loads the eeprom data. We then 1898 * read the port 16 times and with every read; the cards check 1899 * for contention (ie: if one card writes a 0 bit and another 1900 * writes a 1 bit then the host sees a 0. At the end of the cycle; 1901 * each card compares the data on the bus; if there is a difference 1902 * then that card goes into ID_WAIT state again). In the meantime; 1903 * one bit of data is returned in the AX register which is conveniently 1904 * returned to us by bus_space_read_1(). Hence; we read 16 times getting one 1905 * bit of data with each read. 1906 * 1907 * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT! 1908 */ 1909 u_int16_t 1910 epreadeeprom(iot, ioh, offset) 1911 bus_space_tag_t iot; 1912 bus_space_handle_t ioh; 1913 int offset; 1914 { 1915 u_int16_t data = 0; 1916 int i; 1917 1918 bus_space_write_1(iot, ioh, 0, 0x80 + offset); 1919 delay(1000); 1920 for (i = 0; i < 16; i++) 1921 data = (data << 1) | (bus_space_read_2(iot, ioh, 0) & 1); 1922 return (data); 1923 } 1924 1925 static int 1926 epbusyeeprom(sc) 1927 struct ep_softc *sc; 1928 { 1929 bus_space_tag_t iot = sc->sc_iot; 1930 bus_space_handle_t ioh = sc->sc_ioh; 1931 int i = 100, j; 1932 1933 if (sc->bustype == ELINK_BUS_PCMCIA) { 1934 delay(1000); 1935 return 0; 1936 } 1937 1938 j = 0; /* bad GCC flow analysis */ 1939 while (i--) { 1940 j = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND); 1941 if (j & EEPROM_BUSY) 1942 delay(100); 1943 else 1944 break; 1945 } 1946 if (!i) { 1947 printf("\n%s: eeprom failed to come ready\n", 1948 sc->sc_dev.dv_xname); 1949 return (1); 1950 } 1951 if (j & EEPROM_TST_MODE) { 1952 /* XXX PnP mode? */ 1953 printf("\n%s: erase pencil mark!\n", sc->sc_dev.dv_xname); 1954 return (1); 1955 } 1956 return (0); 1957 } 1958 1959 u_int16_t 1960 ep_read_eeprom(sc, offset) 1961 struct ep_softc *sc; 1962 u_int16_t offset; 1963 { 1964 u_int16_t readcmd; 1965 1966 /* 1967 * RoadRunner has a larger EEPROM, so a different read command 1968 * is required. 1969 */ 1970 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) 1971 readcmd = READ_EEPROM_RR; 1972 else 1973 readcmd = READ_EEPROM; 1974 1975 if (epbusyeeprom(sc)) 1976 return (0); /* XXX why is eeprom busy? */ 1977 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W0_EEPROM_COMMAND, 1978 readcmd | offset); 1979 if (epbusyeeprom(sc)) 1980 return (0); /* XXX why is eeprom busy? */ 1981 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W0_EEPROM_DATA)); 1982 } 1983 1984 void 1985 epmbuffill(v) 1986 void *v; 1987 { 1988 struct ep_softc *sc = v; 1989 struct mbuf *m; 1990 int s, i; 1991 1992 s = splnet(); 1993 i = sc->last_mb; 1994 do { 1995 if (sc->mb[i] == 0) { 1996 MGET(m, M_DONTWAIT, MT_DATA); 1997 if (m == 0) 1998 break; 1999 sc->mb[i] = m; 2000 } 2001 i = (i + 1) % MAX_MBS; 2002 } while (i != sc->next_mb); 2003 sc->last_mb = i; 2004 /* If the queue was not filled, try again. */ 2005 if (sc->last_mb != sc->next_mb) 2006 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 2007 splx(s); 2008 } 2009 2010 void 2011 epmbufempty(sc) 2012 struct ep_softc *sc; 2013 { 2014 int s, i; 2015 2016 s = splnet(); 2017 for (i = 0; i<MAX_MBS; i++) { 2018 if (sc->mb[i]) { 2019 m_freem(sc->mb[i]); 2020 sc->mb[i] = NULL; 2021 } 2022 } 2023 sc->last_mb = sc->next_mb = 0; 2024 callout_stop(&sc->sc_mbuf_callout); 2025 splx(s); 2026 } 2027 2028 int 2029 epenable(sc) 2030 struct ep_softc *sc; 2031 { 2032 2033 if (sc->enabled == 0 && sc->enable != NULL) { 2034 if ((*sc->enable)(sc) != 0) { 2035 printf("%s: device enable failed\n", 2036 sc->sc_dev.dv_xname); 2037 return (EIO); 2038 } 2039 } 2040 2041 sc->enabled = 1; 2042 return (0); 2043 } 2044 2045 void 2046 epdisable(sc) 2047 struct ep_softc *sc; 2048 { 2049 2050 if (sc->enabled != 0 && sc->disable != NULL) { 2051 (*sc->disable)(sc); 2052 sc->enabled = 0; 2053 } 2054 } 2055 2056 /* 2057 * ep_activate: 2058 * 2059 * Handle device activation/deactivation requests. 2060 */ 2061 int 2062 ep_activate(self, act) 2063 struct device *self; 2064 enum devact act; 2065 { 2066 struct ep_softc *sc = (struct ep_softc *)self; 2067 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2068 int error = 0, s; 2069 2070 s = splnet(); 2071 switch (act) { 2072 case DVACT_ACTIVATE: 2073 error = EOPNOTSUPP; 2074 break; 2075 2076 case DVACT_DEACTIVATE: 2077 if (sc->ep_flags & ELINK_FLAGS_MII) 2078 mii_activate(&sc->sc_mii, act, MII_PHY_ANY, 2079 MII_OFFSET_ANY); 2080 if_deactivate(ifp); 2081 break; 2082 } 2083 splx(s); 2084 return (error); 2085 } 2086 2087 /* 2088 * ep_detach: 2089 * 2090 * Detach a elink3 interface. 2091 */ 2092 int 2093 ep_detach(self, flags) 2094 struct device *self; 2095 int flags; 2096 { 2097 struct ep_softc *sc = (struct ep_softc *)self; 2098 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2099 2100 /* Succeed now if there's no work to do. */ 2101 if ((sc->sc_flags & ELINK_FLAGS_ATTACHED) == 0) 2102 return (0); 2103 2104 epdisable(sc); 2105 2106 callout_stop(&sc->sc_mii_callout); 2107 callout_stop(&sc->sc_mbuf_callout); 2108 2109 if (sc->ep_flags & ELINK_FLAGS_MII) { 2110 /* Detach all PHYs */ 2111 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 2112 } 2113 2114 /* Delete all remaining media. */ 2115 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 2116 2117 #if NRND > 0 2118 rnd_detach_source(&sc->rnd_source); 2119 #endif 2120 ether_ifdetach(ifp); 2121 if_detach(ifp); 2122 2123 shutdownhook_disestablish(sc->sd_hook); 2124 2125 return (0); 2126 } 2127 2128 u_int32_t 2129 ep_mii_bitbang_read(self) 2130 struct device *self; 2131 { 2132 struct ep_softc *sc = (void *) self; 2133 2134 /* We're already in Window 4. */ 2135 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 2136 ELINK_W4_BOOM_PHYSMGMT)); 2137 } 2138 2139 void 2140 ep_mii_bitbang_write(self, val) 2141 struct device *self; 2142 u_int32_t val; 2143 { 2144 struct ep_softc *sc = (void *) self; 2145 2146 /* We're already in Window 4. */ 2147 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 2148 ELINK_W4_BOOM_PHYSMGMT, val); 2149 } 2150 2151 int 2152 ep_mii_readreg(self, phy, reg) 2153 struct device *self; 2154 int phy, reg; 2155 { 2156 struct ep_softc *sc = (void *) self; 2157 int val; 2158 2159 GO_WINDOW(4); 2160 2161 val = mii_bitbang_readreg(self, &ep_mii_bitbang_ops, phy, reg); 2162 2163 GO_WINDOW(1); 2164 2165 return (val); 2166 } 2167 2168 void 2169 ep_mii_writereg(self, phy, reg, val) 2170 struct device *self; 2171 int phy, reg, val; 2172 { 2173 struct ep_softc *sc = (void *) self; 2174 2175 GO_WINDOW(4); 2176 2177 mii_bitbang_writereg(self, &ep_mii_bitbang_ops, phy, reg, val); 2178 2179 GO_WINDOW(1); 2180 } 2181 2182 void 2183 ep_statchg(self) 2184 struct device *self; 2185 { 2186 struct ep_softc *sc = (struct ep_softc *)self; 2187 bus_space_tag_t iot = sc->sc_iot; 2188 bus_space_handle_t ioh = sc->sc_ioh; 2189 int mctl; 2190 2191 GO_WINDOW(3); 2192 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 2193 if (sc->sc_mii.mii_media_active & IFM_FDX) 2194 mctl |= MAC_CONTROL_FDX; 2195 else 2196 mctl &= ~MAC_CONTROL_FDX; 2197 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 2198 GO_WINDOW(1); /* back to operating window */ 2199 } 2200
Indexes created Mon Sep 29 21:09:56 GMT 2025