elink3.c revision 1.89
1 /* $NetBSD: elink3.c,v 1.89 2001/03/22 16:54:46 jdolecek Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1996, 1997 Jonathan Stone <jonathan (at) NetBSD.org> 42 * Copyright (c) 1994 Herb Peyerl <hpeyerl (at) beer.org> 43 * All rights reserved. 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice, this list of conditions and the following disclaimer. 50 * 2. Redistributions in binary form must reproduce the above copyright 51 * notice, this list of conditions and the following disclaimer in the 52 * documentation and/or other materials provided with the distribution. 53 * 3. All advertising materials mentioning features or use of this software 54 * must display the following acknowledgement: 55 * This product includes software developed by Herb Peyerl. 56 * 4. The name of Herb Peyerl may not be used to endorse or promote products 57 * derived from this software without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 60 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 61 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 62 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 63 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 64 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 65 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 66 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 67 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 68 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 #include "opt_inet.h" 72 #include "opt_ns.h" 73 #include "bpfilter.h" 74 #include "rnd.h" 75 76 #include <sys/param.h> 77 #include <sys/systm.h> 78 #include <sys/callout.h> 79 #include <sys/kernel.h> 80 #include <sys/mbuf.h> 81 #include <sys/socket.h> 82 #include <sys/ioctl.h> 83 #include <sys/errno.h> 84 #include <sys/syslog.h> 85 #include <sys/select.h> 86 #include <sys/device.h> 87 #if NRND > 0 88 #include <sys/rnd.h> 89 #endif 90 91 #include <net/if.h> 92 #include <net/if_dl.h> 93 #include <net/if_ether.h> 94 #include <net/if_media.h> 95 96 #ifdef INET 97 #include <netinet/in.h> 98 #include <netinet/in_systm.h> 99 #include <netinet/in_var.h> 100 #include <netinet/ip.h> 101 #include <netinet/if_inarp.h> 102 #endif 103 104 #ifdef NS 105 #include <netns/ns.h> 106 #include <netns/ns_if.h> 107 #endif 108 109 #if NBPFILTER > 0 110 #include <net/bpf.h> 111 #include <net/bpfdesc.h> 112 #endif 113 114 #include <machine/cpu.h> 115 #include <machine/bus.h> 116 #include <machine/intr.h> 117 118 #include <dev/mii/mii.h> 119 #include <dev/mii/miivar.h> 120 #include <dev/mii/mii_bitbang.h> 121 122 #include <dev/ic/elink3var.h> 123 #include <dev/ic/elink3reg.h> 124 125 #ifdef DEBUG 126 int epdebug = 0; 127 #endif 128 129 /* 130 * XXX endian workaround for big-endian CPUs with pcmcia: 131 * if stream methods for bus_space_multi are not provided, define them 132 * using non-stream bus_space_{read,write}_multi_. 133 * Assumes host CPU is same endian-ness as bus. 134 */ 135 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 136 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 137 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 138 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 139 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 140 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 141 142 /* 143 * Structure to map media-present bits in boards to ifmedia codes and 144 * printable media names. Used for table-driven ifmedia initialization. 145 */ 146 struct ep_media { 147 int epm_mpbit; /* media present bit */ 148 const char *epm_name; /* name of medium */ 149 int epm_ifmedia; /* ifmedia word for medium */ 150 int epm_epmedia; /* ELINKMEDIA_* constant */ 151 }; 152 153 /* 154 * Media table for the Demon/Vortex/Boomerang chipsets. 155 * 156 * Note that MII on the Demon and Vortex (3c59x) indicates an external 157 * MII connector (for connecting an external PHY) ... I think. Treat 158 * it as `manual' on these chips. 159 * 160 * Any Boomerang (3c90x) chips with MII really do have an internal 161 * MII and real PHYs attached; no `native' media. 162 */ 163 const struct ep_media ep_vortex_media[] = { 164 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 165 ELINKMEDIA_10BASE_T }, 166 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 167 ELINKMEDIA_10BASE_T }, 168 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 169 ELINKMEDIA_AUI }, 170 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 171 ELINKMEDIA_10BASE_2 }, 172 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 173 ELINKMEDIA_100BASE_TX }, 174 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 175 ELINKMEDIA_100BASE_TX }, 176 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 177 ELINKMEDIA_100BASE_FX }, 178 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 179 ELINKMEDIA_MII }, 180 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 181 ELINKMEDIA_100BASE_T4 }, 182 { 0, NULL, 0, 183 0 }, 184 }; 185 186 /* 187 * Media table for the older 3Com Etherlink III chipset, used 188 * in the 3c509, 3c579, and 3c589. 189 */ 190 const struct ep_media ep_509_media[] = { 191 { ELINK_W0_CC_UTP, "10baseT", IFM_ETHER|IFM_10_T, 192 ELINKMEDIA_10BASE_T }, 193 { ELINK_W0_CC_AUI, "10base5", IFM_ETHER|IFM_10_5, 194 ELINKMEDIA_AUI }, 195 { ELINK_W0_CC_BNC, "10base2", IFM_ETHER|IFM_10_2, 196 ELINKMEDIA_10BASE_2 }, 197 { 0, NULL, 0, 198 0 }, 199 }; 200 201 void ep_internalconfig __P((struct ep_softc *sc)); 202 void ep_vortex_probemedia __P((struct ep_softc *sc)); 203 void ep_509_probemedia __P((struct ep_softc *sc)); 204 205 static void eptxstat __P((struct ep_softc *)); 206 static int epstatus __P((struct ep_softc *)); 207 int epinit __P((struct ifnet *)); 208 void epstop __P((struct ifnet *, int)); 209 int epioctl __P((struct ifnet *, u_long, caddr_t)); 210 void epstart __P((struct ifnet *)); 211 void epwatchdog __P((struct ifnet *)); 212 void epreset __P((struct ep_softc *)); 213 static void epshutdown __P((void *)); 214 void epread __P((struct ep_softc *)); 215 struct mbuf *epget __P((struct ep_softc *, int)); 216 void epmbuffill __P((void *)); 217 void epmbufempty __P((struct ep_softc *)); 218 void epsetfilter __P((struct ep_softc *)); 219 void ep_roadrunner_mii_enable __P((struct ep_softc *)); 220 void epsetmedia __P((struct ep_softc *)); 221 222 /* ifmedia callbacks */ 223 int ep_media_change __P((struct ifnet *ifp)); 224 void ep_media_status __P((struct ifnet *ifp, struct ifmediareq *req)); 225 226 /* MII callbacks */ 227 int ep_mii_readreg __P((struct device *, int, int)); 228 void ep_mii_writereg __P((struct device *, int, int, int)); 229 void ep_statchg __P((struct device *)); 230 231 void ep_tick __P((void *)); 232 233 static int epbusyeeprom __P((struct ep_softc *)); 234 u_int16_t ep_read_eeprom __P((struct ep_softc *, u_int16_t)); 235 static inline void ep_reset_cmd __P((struct ep_softc *sc, 236 u_int cmd, u_int arg)); 237 static inline void ep_finish_reset __P((bus_space_tag_t, bus_space_handle_t)); 238 static inline void ep_discard_rxtop __P((bus_space_tag_t, bus_space_handle_t)); 239 static __inline int ep_w1_reg __P((struct ep_softc *, int)); 240 241 /* 242 * MII bit-bang glue. 243 */ 244 u_int32_t ep_mii_bitbang_read __P((struct device *)); 245 void ep_mii_bitbang_write __P((struct device *, u_int32_t)); 246 247 const struct mii_bitbang_ops ep_mii_bitbang_ops = { 248 ep_mii_bitbang_read, 249 ep_mii_bitbang_write, 250 { 251 PHYSMGMT_DATA, /* MII_BIT_MDO */ 252 PHYSMGMT_DATA, /* MII_BIT_MDI */ 253 PHYSMGMT_CLK, /* MII_BIT_MDC */ 254 PHYSMGMT_DIR, /* MII_BIT_DIR_HOST_PHY */ 255 0, /* MII_BIT_DIR_PHY_HOST */ 256 } 257 }; 258 259 /* 260 * Some chips (3c515 [Corkscrew] and 3c574 [RoadRunner]) have 261 * Window 1 registers offset! 262 */ 263 static __inline int 264 ep_w1_reg(sc, reg) 265 struct ep_softc *sc; 266 int reg; 267 { 268 269 switch (sc->ep_chipset) { 270 case ELINK_CHIPSET_CORKSCREW: 271 return (reg + 0x10); 272 273 case ELINK_CHIPSET_ROADRUNNER: 274 switch (reg) { 275 case ELINK_W1_FREE_TX: 276 case ELINK_W1_RUNNER_RDCTL: 277 case ELINK_W1_RUNNER_WRCTL: 278 return (reg); 279 } 280 return (reg + 0x10); 281 } 282 283 return (reg); 284 } 285 286 /* 287 * Wait for any pending reset to complete. 288 * On newer hardware we could poll SC_COMMAND_IN_PROGRESS, 289 * but older hardware doesn't implement it and we must delay. 290 */ 291 static inline void 292 ep_finish_reset(iot, ioh) 293 bus_space_tag_t iot; 294 bus_space_handle_t ioh; 295 { 296 int i; 297 298 for (i = 0; i < 10000; i++) { 299 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 300 S_COMMAND_IN_PROGRESS) == 0) 301 break; 302 DELAY(10); 303 } 304 } 305 306 /* 307 * Issue a (reset) command, and be sure it has completed. 308 * Used for global reset, TX_RESET, RX_RESET. 309 */ 310 static inline void 311 ep_reset_cmd(sc, cmd, arg) 312 struct ep_softc *sc; 313 u_int cmd, arg; 314 { 315 bus_space_tag_t iot = sc->sc_iot; 316 bus_space_handle_t ioh = sc->sc_ioh; 317 318 bus_space_write_2(iot, ioh, cmd, arg); 319 ep_finish_reset(iot, ioh); 320 } 321 322 323 static inline void 324 ep_discard_rxtop(iot, ioh) 325 bus_space_tag_t iot; 326 bus_space_handle_t ioh; 327 { 328 int i; 329 330 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISCARD_TOP_PACK); 331 332 /* 333 * Spin for about 1 msec, to avoid forcing a DELAY() between 334 * every received packet (adding latency and limiting pkt-recv rate). 335 * On PCI, at 4 30-nsec PCI bus cycles for a read, 8000 iterations 336 * is about right. 337 */ 338 for (i = 0; i < 8000; i++) { 339 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 340 S_COMMAND_IN_PROGRESS) == 0) 341 return; 342 } 343 344 /* Didn't complete in a hurry. Do DELAY()s. */ 345 ep_finish_reset(iot, ioh); 346 } 347 348 /* 349 * Back-end attach and configure. 350 */ 351 int 352 epconfig(sc, chipset, enaddr) 353 struct ep_softc *sc; 354 u_short chipset; 355 u_int8_t *enaddr; 356 { 357 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 358 bus_space_tag_t iot = sc->sc_iot; 359 bus_space_handle_t ioh = sc->sc_ioh; 360 u_int16_t i; 361 u_int8_t myla[ETHER_ADDR_LEN]; 362 363 callout_init(&sc->sc_mii_callout); 364 callout_init(&sc->sc_mbuf_callout); 365 366 sc->ep_chipset = chipset; 367 368 /* 369 * We could have been groveling around in other register 370 * windows in the front-end; make sure we're in window 0 371 * to read the EEPROM. 372 */ 373 GO_WINDOW(0); 374 375 if (enaddr == NULL) { 376 /* 377 * Read the station address from the eeprom. 378 */ 379 for (i = 0; i < ETHER_ADDR_LEN / 2; i++) { 380 u_int16_t x = ep_read_eeprom(sc, i); 381 myla[(i << 1)] = x >> 8; 382 myla[(i << 1) + 1] = x; 383 } 384 enaddr = myla; 385 } 386 387 /* 388 * Vortex-based (3c59x pci,eisa) and Boomerang (3c900) cards 389 * allow FDDI-sized (4500) byte packets. Commands only take an 390 * 11-bit parameter, and 11 bits isn't enough to hold a full-size 391 * packet length. 392 * Commands to these cards implicitly upshift a packet size 393 * or threshold by 2 bits. 394 * To detect cards with large-packet support, we probe by setting 395 * the transmit threshold register, then change windows and 396 * read back the threshold register directly, and see if the 397 * threshold value was shifted or not. 398 */ 399 bus_space_write_2(iot, ioh, ELINK_COMMAND, 400 SET_TX_AVAIL_THRESH | ELINK_LARGEWIN_PROBE); 401 GO_WINDOW(5); 402 i = bus_space_read_2(iot, ioh, ELINK_W5_TX_AVAIL_THRESH); 403 GO_WINDOW(1); 404 switch (i) { 405 case ELINK_LARGEWIN_PROBE: 406 case (ELINK_LARGEWIN_PROBE & ELINK_LARGEWIN_MASK): 407 sc->ep_pktlenshift = 0; 408 break; 409 410 case (ELINK_LARGEWIN_PROBE << 2): 411 sc->ep_pktlenshift = 2; 412 break; 413 414 default: 415 printf("%s: wrote 0x%x to TX_AVAIL_THRESH, read back 0x%x. " 416 "Interface disabled\n", 417 sc->sc_dev.dv_xname, ELINK_LARGEWIN_PROBE, (int) i); 418 return (1); 419 } 420 421 /* 422 * Ensure Tx-available interrupts are enabled for 423 * start the interface. 424 * XXX should be in epinit()? 425 */ 426 bus_space_write_2(iot, ioh, ELINK_COMMAND, 427 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 428 429 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 430 ifp->if_softc = sc; 431 ifp->if_start = epstart; 432 ifp->if_ioctl = epioctl; 433 ifp->if_watchdog = epwatchdog; 434 ifp->if_init = epinit; 435 ifp->if_stop = epstop; 436 ifp->if_flags = 437 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 438 IFQ_SET_READY(&ifp->if_snd); 439 440 if_attach(ifp); 441 ether_ifattach(ifp, enaddr); 442 443 /* 444 * Finish configuration: 445 * determine chipset if the front-end couldn't do so, 446 * show board details, set media. 447 */ 448 449 /* 450 * Print RAM size. We also print the Ethernet address in here. 451 * It's extracted from the ifp, so we have to make sure it's 452 * been attached first. 453 */ 454 ep_internalconfig(sc); 455 GO_WINDOW(0); 456 457 /* 458 * Display some additional information, if pertinent. 459 */ 460 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 461 printf("%s: RoadRunner FIFO buffer enabled\n", 462 sc->sc_dev.dv_xname); 463 464 /* 465 * Initialize our media structures and MII info. We'll 466 * probe the MII if we discover that we have one. 467 */ 468 sc->sc_mii.mii_ifp = ifp; 469 sc->sc_mii.mii_readreg = ep_mii_readreg; 470 sc->sc_mii.mii_writereg = ep_mii_writereg; 471 sc->sc_mii.mii_statchg = ep_statchg; 472 ifmedia_init(&sc->sc_mii.mii_media, 0, ep_media_change, 473 ep_media_status); 474 475 /* 476 * Now, determine which media we have. 477 */ 478 switch (sc->ep_chipset) { 479 case ELINK_CHIPSET_ROADRUNNER: 480 if (sc->ep_flags & ELINK_FLAGS_MII) { 481 ep_roadrunner_mii_enable(sc); 482 GO_WINDOW(0); 483 } 484 /* FALLTHROUGH */ 485 486 case ELINK_CHIPSET_BOOMERANG: 487 /* 488 * If the device has MII, probe it. We won't be using 489 * any `native' media in this case, only PHYs. If 490 * we don't, just treat the Boomerang like the Vortex. 491 */ 492 if (sc->ep_flags & ELINK_FLAGS_MII) { 493 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 494 MII_PHY_ANY, MII_OFFSET_ANY, 0); 495 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 496 ifmedia_add(&sc->sc_mii.mii_media, 497 IFM_ETHER|IFM_NONE, 0, NULL); 498 ifmedia_set(&sc->sc_mii.mii_media, 499 IFM_ETHER|IFM_NONE); 500 } else { 501 ifmedia_set(&sc->sc_mii.mii_media, 502 IFM_ETHER|IFM_AUTO); 503 } 504 break; 505 } 506 /* FALLTHROUGH */ 507 508 case ELINK_CHIPSET_VORTEX: 509 ep_vortex_probemedia(sc); 510 break; 511 512 default: 513 ep_509_probemedia(sc); 514 break; 515 } 516 517 GO_WINDOW(1); /* Window 1 is operating window */ 518 519 #if NRND > 0 520 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 521 RND_TYPE_NET, 0); 522 #endif 523 524 sc->tx_start_thresh = 20; /* probably a good starting point. */ 525 526 /* Establish callback to reset card when we reboot. */ 527 sc->sd_hook = shutdownhook_establish(epshutdown, sc); 528 529 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 530 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 531 532 /* The attach is successful. */ 533 sc->sc_flags |= ELINK_FLAGS_ATTACHED; 534 return (0); 535 } 536 537 538 /* 539 * Show interface-model-independent info from window 3 540 * internal-configuration register. 541 */ 542 void 543 ep_internalconfig(sc) 544 struct ep_softc *sc; 545 { 546 bus_space_tag_t iot = sc->sc_iot; 547 bus_space_handle_t ioh = sc->sc_ioh; 548 549 u_int config0; 550 u_int config1; 551 552 int ram_size, ram_width, ram_speed, rom_size, ram_split; 553 /* 554 * NVRAM buffer Rx:Tx config names for busmastering cards 555 * (Demon, Vortex, and later). 556 */ 557 const char *onboard_ram_config[] = { 558 "5:3", "3:1", "1:1", "3:5" }; 559 560 GO_WINDOW(3); 561 config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 562 config1 = (u_int)bus_space_read_2(iot, ioh, 563 ELINK_W3_INTERNAL_CONFIG + 2); 564 GO_WINDOW(0); 565 566 ram_size = (config0 & CONFIG_RAMSIZE) >> CONFIG_RAMSIZE_SHIFT; 567 ram_width = (config0 & CONFIG_RAMWIDTH) >> CONFIG_RAMWIDTH_SHIFT; 568 ram_speed = (config0 & CONFIG_RAMSPEED) >> CONFIG_RAMSPEED_SHIFT; 569 rom_size = (config0 & CONFIG_ROMSIZE) >> CONFIG_ROMSIZE_SHIFT; 570 571 ram_split = (config1 & CONFIG_RAMSPLIT) >> CONFIG_RAMSPLIT_SHIFT; 572 573 printf("%s: address %s, %dKB %s-wide FIFO, %s Rx:Tx split\n", 574 sc->sc_dev.dv_xname, 575 ether_sprintf(LLADDR(sc->sc_ethercom.ec_if.if_sadl)), 576 8 << ram_size, 577 (ram_width) ? "word" : "byte", 578 onboard_ram_config[ram_split]); 579 } 580 581 582 /* 583 * Find supported media on 3c509-generation hardware that doesn't have 584 * a "reset_options" register in window 3. 585 * Use the config_cntrl register in window 0 instead. 586 * Used on original, 10Mbit ISA (3c509), 3c509B, and pre-Demon EISA cards 587 * that implement CONFIG_CTRL. We don't have a good way to set the 588 * default active medium; punt to ifconfig instead. 589 */ 590 void 591 ep_509_probemedia(sc) 592 struct ep_softc *sc; 593 { 594 bus_space_tag_t iot = sc->sc_iot; 595 bus_space_handle_t ioh = sc->sc_ioh; 596 struct ifmedia *ifm = &sc->sc_mii.mii_media; 597 u_int16_t ep_w0_config, port; 598 const struct ep_media *epm; 599 const char *sep = "", *defmedianame = NULL; 600 int defmedia = 0; 601 602 GO_WINDOW(0); 603 ep_w0_config = bus_space_read_2(iot, ioh, ELINK_W0_CONFIG_CTRL); 604 605 printf("%s: ", sc->sc_dev.dv_xname); 606 607 /* Sanity check that there are any media! */ 608 if ((ep_w0_config & ELINK_W0_CC_MEDIAMASK) == 0) { 609 printf("no media present!\n"); 610 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 611 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 612 return; 613 } 614 615 /* 616 * Get the default media from the EEPROM. 617 */ 618 port = ep_read_eeprom(sc, EEPROM_ADDR_CFG) >> 14; 619 620 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 621 622 for (epm = ep_509_media; epm->epm_name != NULL; epm++) { 623 if (ep_w0_config & epm->epm_mpbit) { 624 /* 625 * This simple test works because 509 chipsets 626 * don't do full-duplex. 627 */ 628 if (epm->epm_epmedia == port || defmedia == 0) { 629 defmedia = epm->epm_ifmedia; 630 defmedianame = epm->epm_name; 631 } 632 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 633 NULL); 634 PRINT(epm->epm_name); 635 } 636 } 637 638 #undef PRINT 639 640 #ifdef DIAGNOSTIC 641 if (defmedia == 0) 642 panic("ep_509_probemedia: impossible"); 643 #endif 644 645 printf(" (default %s)\n", defmedianame); 646 ifmedia_set(ifm, defmedia); 647 } 648 649 /* 650 * Find media present on large-packet-capable elink3 devices. 651 * Show onboard configuration of large-packet-capable elink3 devices 652 * (Demon, Vortex, Boomerang), which do not implement CONFIG_CTRL in window 0. 653 * Use media and card-version info in window 3 instead. 654 */ 655 void 656 ep_vortex_probemedia(sc) 657 struct ep_softc *sc; 658 { 659 bus_space_tag_t iot = sc->sc_iot; 660 bus_space_handle_t ioh = sc->sc_ioh; 661 struct ifmedia *ifm = &sc->sc_mii.mii_media; 662 const struct ep_media *epm; 663 u_int config1; 664 int reset_options; 665 int default_media; /* 3-bit encoding of default (EEPROM) media */ 666 int defmedia = 0; 667 const char *sep = "", *defmedianame = NULL; 668 669 GO_WINDOW(3); 670 config1 = (u_int)bus_space_read_2(iot, ioh, 671 ELINK_W3_INTERNAL_CONFIG + 2); 672 reset_options = (int)bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 673 GO_WINDOW(0); 674 675 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 676 677 printf("%s: ", sc->sc_dev.dv_xname); 678 679 /* Sanity check that there are any media! */ 680 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 681 printf("no media present!\n"); 682 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 683 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 684 return; 685 } 686 687 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 688 689 for (epm = ep_vortex_media; epm->epm_name != NULL; epm++) { 690 if (reset_options & epm->epm_mpbit) { 691 /* 692 * Default media is a little more complicated 693 * on the Vortex. We support full-duplex which 694 * uses the same reset options bit. 695 * 696 * XXX Check EEPROM for default to FDX? 697 */ 698 if (epm->epm_epmedia == default_media) { 699 if ((epm->epm_ifmedia & IFM_FDX) == 0) { 700 defmedia = epm->epm_ifmedia; 701 defmedianame = epm->epm_name; 702 } 703 } else if (defmedia == 0) { 704 defmedia = epm->epm_ifmedia; 705 defmedianame = epm->epm_name; 706 } 707 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 708 NULL); 709 PRINT(epm->epm_name); 710 } 711 } 712 713 #undef PRINT 714 715 #ifdef DIAGNOSTIC 716 if (defmedia == 0) 717 panic("ep_vortex_probemedia: impossible"); 718 #endif 719 720 printf(" (default %s)\n", defmedianame); 721 ifmedia_set(ifm, defmedia); 722 } 723 724 /* 725 * One second timer, used to tick the MII. 726 */ 727 void 728 ep_tick(arg) 729 void *arg; 730 { 731 struct ep_softc *sc = arg; 732 int s; 733 734 #ifdef DIAGNOSTIC 735 if ((sc->ep_flags & ELINK_FLAGS_MII) == 0) 736 panic("ep_tick"); 737 #endif 738 739 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 740 return; 741 742 s = splnet(); 743 mii_tick(&sc->sc_mii); 744 splx(s); 745 746 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 747 } 748 749 /* 750 * Bring device up. 751 * 752 * The order in here seems important. Otherwise we may not receive 753 * interrupts. ?! 754 */ 755 int 756 epinit(ifp) 757 struct ifnet *ifp; 758 { 759 struct ep_softc *sc = ifp->if_softc; 760 bus_space_tag_t iot = sc->sc_iot; 761 bus_space_handle_t ioh = sc->sc_ioh; 762 int i, error; 763 764 if (!sc->enabled && (error = epenable(sc)) != 0) 765 return (error); 766 767 /* Make sure any pending reset has completed before touching board */ 768 ep_finish_reset(iot, ioh); 769 770 /* 771 * Cancel any pending I/O. 772 */ 773 epstop(ifp, 0); 774 775 if (sc->bustype != ELINK_BUS_PCI && sc->bustype != ELINK_BUS_EISA 776 && sc->bustype != ELINK_BUS_MCA) { 777 GO_WINDOW(0); 778 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 0); 779 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 780 ENABLE_DRQ_IRQ); 781 } 782 783 if (sc->bustype == ELINK_BUS_PCMCIA) { 784 bus_space_write_2(iot, ioh, ELINK_W0_RESOURCE_CFG, 0x3f00); 785 } 786 787 if (sc->bustype == ELINK_BUS_MCA) { 788 /* use Synchronous Read mode of operation */ 789 GO_WINDOW(0); 790 bus_space_write_2(iot, ioh, ELINK_W0_RESOURCE_CFG, 1<<6); 791 } 792 793 GO_WINDOW(2); 794 for (i = 0; i < 6; i++) /* Reload the ether_addr. */ 795 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 796 LLADDR(ifp->if_sadl)[i]); 797 798 /* 799 * Reset the station-address receive filter. 800 * A bug workaround for busmastering (Vortex, Demon) cards. 801 */ 802 for (i = 0; i < 6; i++) 803 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 804 805 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 806 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 807 808 GO_WINDOW(1); /* Window 1 is operating window */ 809 for (i = 0; i < 31; i++) 810 bus_space_read_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS)); 811 812 /* Set threshold for Tx-space available interrupt. */ 813 bus_space_write_2(iot, ioh, ELINK_COMMAND, 814 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 815 816 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 817 /* 818 * Enable options in the PCMCIA LAN COR register, via 819 * RoadRunner Window 1. 820 * 821 * XXX MAGIC CONSTANTS! 822 */ 823 u_int16_t cor; 824 825 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, (1 << 11)); 826 827 cor = bus_space_read_2(iot, ioh, 0) & ~0x30; 828 if (sc->ep_flags & ELINK_FLAGS_USESHAREDMEM) 829 cor |= 0x10; 830 if (sc->ep_flags & ELINK_FLAGS_FORCENOWAIT) 831 cor |= 0x20; 832 bus_space_write_2(iot, ioh, 0, cor); 833 834 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 835 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 836 837 if (sc->ep_flags & ELINK_FLAGS_MII) { 838 ep_roadrunner_mii_enable(sc); 839 GO_WINDOW(1); 840 } 841 } 842 843 /* Enable interrupts. */ 844 bus_space_write_2(iot, ioh, ELINK_COMMAND, 845 SET_RD_0_MASK | S_CARD_FAILURE | S_RX_COMPLETE | S_TX_COMPLETE | 846 S_TX_AVAIL); 847 bus_space_write_2(iot, ioh, ELINK_COMMAND, 848 SET_INTR_MASK | S_CARD_FAILURE | S_RX_COMPLETE | S_TX_COMPLETE | 849 S_TX_AVAIL); 850 851 /* 852 * Attempt to get rid of any stray interrupts that occured during 853 * configuration. On the i386 this isn't possible because one may 854 * already be queued. However, a single stray interrupt is 855 * unimportant. 856 */ 857 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 858 859 epsetfilter(sc); 860 epsetmedia(sc); 861 862 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 863 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 864 865 epmbuffill(sc); 866 867 /* Interface is now `running', with no output active. */ 868 ifp->if_flags |= IFF_RUNNING; 869 ifp->if_flags &= ~IFF_OACTIVE; 870 871 if (sc->ep_flags & ELINK_FLAGS_MII) { 872 /* Start the one second clock. */ 873 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 874 } 875 876 /* Attempt to start output, if any. */ 877 epstart(ifp); 878 879 return (0); 880 } 881 882 883 /* 884 * Set multicast receive filter. 885 * elink3 hardware has no selective multicast filter in hardware. 886 * Enable reception of all multicasts and filter in software. 887 */ 888 void 889 epsetfilter(sc) 890 struct ep_softc *sc; 891 { 892 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 893 894 GO_WINDOW(1); /* Window 1 is operating window */ 895 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 896 SET_RX_FILTER | FIL_INDIVIDUAL | FIL_BRDCST | 897 ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0) | 898 ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0)); 899 } 900 901 int 902 ep_media_change(ifp) 903 struct ifnet *ifp; 904 { 905 struct ep_softc *sc = ifp->if_softc; 906 907 if (sc->enabled && (ifp->if_flags & IFF_UP) != 0) 908 epreset(sc); 909 910 return (0); 911 } 912 913 /* 914 * Reset and enable the MII on the RoadRunner. 915 */ 916 void 917 ep_roadrunner_mii_enable(sc) 918 struct ep_softc *sc; 919 { 920 bus_space_tag_t iot = sc->sc_iot; 921 bus_space_handle_t ioh = sc->sc_ioh; 922 923 GO_WINDOW(3); 924 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 925 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 926 delay(1000); 927 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 928 ELINK_PCI_100BASE_MII|ELINK_RUNNER_MII_RESET| 929 ELINK_RUNNER_ENABLE_MII); 930 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 931 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 932 delay(1000); 933 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 934 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 935 } 936 937 /* 938 * Set the card to use the specified media. 939 */ 940 void 941 epsetmedia(sc) 942 struct ep_softc *sc; 943 { 944 bus_space_tag_t iot = sc->sc_iot; 945 bus_space_handle_t ioh = sc->sc_ioh; 946 947 /* Turn everything off. First turn off linkbeat and UTP. */ 948 GO_WINDOW(4); 949 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0x0); 950 951 /* Turn off coax */ 952 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 953 delay(1000); 954 955 /* 956 * If the device has MII, select it, and then tell the 957 * PHY which media to use. 958 */ 959 if (sc->ep_flags & ELINK_FLAGS_MII) { 960 int config0, config1; 961 962 GO_WINDOW(3); 963 964 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 965 int resopt; 966 967 resopt = bus_space_read_2(iot, ioh, 968 ELINK_W3_RESET_OPTIONS); 969 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 970 resopt | ELINK_RUNNER_ENABLE_MII); 971 } 972 973 config0 = (u_int)bus_space_read_2(iot, ioh, 974 ELINK_W3_INTERNAL_CONFIG); 975 config1 = (u_int)bus_space_read_2(iot, ioh, 976 ELINK_W3_INTERNAL_CONFIG + 2); 977 978 config1 = config1 & ~CONFIG_MEDIAMASK; 979 config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT); 980 981 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 982 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 983 config1); 984 GO_WINDOW(1); /* back to operating window */ 985 986 mii_mediachg(&sc->sc_mii); 987 return; 988 } 989 990 /* 991 * Now turn on the selected media/transceiver. 992 */ 993 GO_WINDOW(4); 994 switch (IFM_SUBTYPE(sc->sc_mii.mii_media.ifm_cur->ifm_media)) { 995 case IFM_10_T: 996 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 997 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 998 break; 999 1000 case IFM_10_2: 1001 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 1002 DELAY(1000); /* 50ms not enmough? */ 1003 break; 1004 1005 case IFM_100_TX: 1006 case IFM_100_FX: 1007 case IFM_100_T4: /* XXX check documentation */ 1008 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 1009 LINKBEAT_ENABLE); 1010 DELAY(1000); /* not strictly necessary? */ 1011 break; 1012 1013 case IFM_10_5: 1014 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 1015 SQE_ENABLE); 1016 DELAY(1000); /* not strictly necessary? */ 1017 break; 1018 1019 case IFM_MANUAL: 1020 /* 1021 * Nothing to do here; we are actually enabling the 1022 * external PHY on the MII port. 1023 */ 1024 break; 1025 1026 case IFM_NONE: 1027 printf("%s: interface disabled\n", sc->sc_dev.dv_xname); 1028 return; 1029 1030 default: 1031 panic("epsetmedia: impossible"); 1032 } 1033 1034 /* 1035 * Tell the chip which port to use. 1036 */ 1037 switch (sc->ep_chipset) { 1038 case ELINK_CHIPSET_VORTEX: 1039 case ELINK_CHIPSET_BOOMERANG: 1040 { 1041 int mctl, config0, config1; 1042 1043 GO_WINDOW(3); 1044 config0 = (u_int)bus_space_read_2(iot, ioh, 1045 ELINK_W3_INTERNAL_CONFIG); 1046 config1 = (u_int)bus_space_read_2(iot, ioh, 1047 ELINK_W3_INTERNAL_CONFIG + 2); 1048 1049 config1 = config1 & ~CONFIG_MEDIAMASK; 1050 config1 |= (sc->sc_mii.mii_media.ifm_cur->ifm_data << 1051 CONFIG_MEDIAMASK_SHIFT); 1052 1053 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 1054 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 1055 config1); 1056 1057 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1058 if (sc->sc_mii.mii_media.ifm_cur->ifm_media & IFM_FDX) 1059 mctl |= MAC_CONTROL_FDX; 1060 else 1061 mctl &= ~MAC_CONTROL_FDX; 1062 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1063 break; 1064 } 1065 default: 1066 { 1067 int w0_addr_cfg; 1068 1069 GO_WINDOW(0); 1070 w0_addr_cfg = bus_space_read_2(iot, ioh, ELINK_W0_ADDRESS_CFG); 1071 w0_addr_cfg &= 0x3fff; 1072 bus_space_write_2(iot, ioh, ELINK_W0_ADDRESS_CFG, w0_addr_cfg | 1073 (sc->sc_mii.mii_media.ifm_cur->ifm_data << 14)); 1074 DELAY(1000); 1075 break; 1076 } 1077 } 1078 1079 GO_WINDOW(1); /* Window 1 is operating window */ 1080 } 1081 1082 /* 1083 * Get currently-selected media from card. 1084 * (if_media callback, may be called before interface is brought up). 1085 */ 1086 void 1087 ep_media_status(ifp, req) 1088 struct ifnet *ifp; 1089 struct ifmediareq *req; 1090 { 1091 struct ep_softc *sc = ifp->if_softc; 1092 bus_space_tag_t iot = sc->sc_iot; 1093 bus_space_handle_t ioh = sc->sc_ioh; 1094 1095 if (sc->enabled == 0) { 1096 req->ifm_active = IFM_ETHER|IFM_NONE; 1097 req->ifm_status = 0; 1098 return; 1099 } 1100 1101 /* 1102 * If we have MII, go ask the PHY what's going on. 1103 */ 1104 if (sc->ep_flags & ELINK_FLAGS_MII) { 1105 mii_pollstat(&sc->sc_mii); 1106 req->ifm_active = sc->sc_mii.mii_media_active; 1107 req->ifm_status = sc->sc_mii.mii_media_status; 1108 return; 1109 } 1110 1111 /* 1112 * Ok, at this point we claim that our active media is 1113 * the currently selected media. We'll update our status 1114 * if our chipset allows us to detect link. 1115 */ 1116 req->ifm_active = sc->sc_mii.mii_media.ifm_cur->ifm_media; 1117 req->ifm_status = 0; 1118 1119 switch (sc->ep_chipset) { 1120 case ELINK_CHIPSET_VORTEX: 1121 case ELINK_CHIPSET_BOOMERANG: 1122 GO_WINDOW(4); 1123 req->ifm_status = IFM_AVALID; 1124 if (bus_space_read_2(iot, ioh, ELINK_W4_MEDIA_TYPE) & 1125 LINKBEAT_DETECT) 1126 req->ifm_status |= IFM_ACTIVE; 1127 GO_WINDOW(1); /* back to operating window */ 1128 break; 1129 } 1130 } 1131 1132 1133 1134 /* 1135 * Start outputting on the interface. 1136 * Always called as splnet(). 1137 */ 1138 void 1139 epstart(ifp) 1140 struct ifnet *ifp; 1141 { 1142 struct ep_softc *sc = ifp->if_softc; 1143 bus_space_tag_t iot = sc->sc_iot; 1144 bus_space_handle_t ioh = sc->sc_ioh; 1145 struct mbuf *m, *m0; 1146 int sh, len, pad; 1147 bus_addr_t txreg; 1148 1149 /* Don't transmit if interface is busy or not running */ 1150 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1151 return; 1152 1153 startagain: 1154 /* Sneak a peek at the next packet */ 1155 IFQ_POLL(&ifp->if_snd, m0); 1156 if (m0 == 0) 1157 return; 1158 1159 /* We need to use m->m_pkthdr.len, so require the header */ 1160 if ((m0->m_flags & M_PKTHDR) == 0) 1161 panic("epstart: no header mbuf"); 1162 len = m0->m_pkthdr.len; 1163 1164 pad = (4 - len) & 3; 1165 1166 /* 1167 * The 3c509 automatically pads short packets to minimum ethernet 1168 * length, but we drop packets that are too large. Perhaps we should 1169 * truncate them instead? 1170 */ 1171 if (len + pad > ETHER_MAX_LEN) { 1172 /* packet is obviously too large: toss it */ 1173 ++ifp->if_oerrors; 1174 IFQ_DEQUEUE(&ifp->if_snd, m0); 1175 m_freem(m0); 1176 goto readcheck; 1177 } 1178 1179 if (bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_FREE_TX)) < 1180 len + pad + 4) { 1181 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1182 SET_TX_AVAIL_THRESH | 1183 ((len + pad + 4) >> sc->ep_pktlenshift)); 1184 /* not enough room in FIFO */ 1185 ifp->if_flags |= IFF_OACTIVE; 1186 return; 1187 } else { 1188 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1189 SET_TX_AVAIL_THRESH | ELINK_THRESH_DISABLE); 1190 } 1191 1192 IFQ_DEQUEUE(&ifp->if_snd, m0); 1193 if (m0 == 0) /* not really needed */ 1194 return; 1195 1196 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_TX_START_THRESH | 1197 ((len / 4 + sc->tx_start_thresh) /* >> sc->ep_pktlenshift*/)); 1198 1199 #if NBPFILTER > 0 1200 if (ifp->if_bpf) 1201 bpf_mtap(ifp->if_bpf, m0); 1202 #endif 1203 1204 /* 1205 * Do the output at a high interrupt priority level so that an 1206 * interrupt from another device won't cause a FIFO underrun. 1207 * We choose splsched() since that blocks essentially everything 1208 * except for interrupts from serial devices (which typically 1209 * lose data if their interrupt isn't serviced fast enough). 1210 * 1211 * XXX THIS CAN CAUSE CLOCK DRIFT! 1212 */ 1213 sh = splsched(); 1214 1215 txreg = ep_w1_reg(sc, ELINK_W1_TX_PIO_WR_1); 1216 1217 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1218 /* 1219 * Prime the FIFO buffer counter (number of 16-bit 1220 * words about to be written to the FIFO). 1221 * 1222 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1223 * COUNTER IS NON-ZERO! 1224 */ 1225 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 1226 (len + pad) >> 1); 1227 } 1228 1229 bus_space_write_2(iot, ioh, txreg, len); 1230 bus_space_write_2(iot, ioh, txreg, 0xffff); /* Second is meaningless */ 1231 if (ELINK_IS_BUS_32(sc->bustype)) { 1232 for (m = m0; m;) { 1233 if (m->m_len > 3) { 1234 /* align our reads from core */ 1235 if (mtod(m, u_long) & 3) { 1236 u_long count = 1237 4 - (mtod(m, u_long) & 3); 1238 bus_space_write_multi_1(iot, ioh, 1239 txreg, mtod(m, u_int8_t *), count); 1240 m->m_data = 1241 (void *)(mtod(m, u_long) + count); 1242 m->m_len -= count; 1243 } 1244 bus_space_write_multi_stream_4(iot, ioh, 1245 txreg, mtod(m, u_int32_t *), m->m_len >> 2); 1246 m->m_data = (void *)(mtod(m, u_long) + 1247 (u_long)(m->m_len & ~3)); 1248 m->m_len -= m->m_len & ~3; 1249 } 1250 if (m->m_len) { 1251 bus_space_write_multi_1(iot, ioh, 1252 txreg, mtod(m, u_int8_t *), m->m_len); 1253 } 1254 MFREE(m, m0); 1255 m = m0; 1256 } 1257 } else { 1258 for (m = m0; m;) { 1259 if (m->m_len > 1) { 1260 if (mtod(m, u_long) & 1) { 1261 bus_space_write_1(iot, ioh, 1262 txreg, *(mtod(m, u_int8_t *))); 1263 m->m_data = 1264 (void *)(mtod(m, u_long) + 1); 1265 m->m_len -= 1; 1266 } 1267 bus_space_write_multi_stream_2(iot, ioh, 1268 txreg, mtod(m, u_int16_t *), 1269 m->m_len >> 1); 1270 } 1271 if (m->m_len & 1) { 1272 bus_space_write_1(iot, ioh, txreg, 1273 *(mtod(m, u_int8_t *) + m->m_len - 1)); 1274 } 1275 MFREE(m, m0); 1276 m = m0; 1277 } 1278 } 1279 while (pad--) 1280 bus_space_write_1(iot, ioh, txreg, 0); 1281 1282 splx(sh); 1283 1284 ++ifp->if_opackets; 1285 1286 readcheck: 1287 if ((bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)) & 1288 ERR_INCOMPLETE) == 0) { 1289 /* We received a complete packet. */ 1290 u_int16_t status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1291 1292 if ((status & S_INTR_LATCH) == 0) { 1293 /* 1294 * No interrupt, read the packet and continue 1295 * Is this supposed to happen? Is my motherboard 1296 * completely busted? 1297 */ 1298 epread(sc); 1299 } else { 1300 /* Got an interrupt, return so that it gets serviced. */ 1301 return; 1302 } 1303 } else { 1304 /* Check if we are stuck and reset [see XXX comment] */ 1305 if (epstatus(sc)) { 1306 if (ifp->if_flags & IFF_DEBUG) 1307 printf("%s: adapter reset\n", 1308 sc->sc_dev.dv_xname); 1309 epreset(sc); 1310 } 1311 } 1312 1313 goto startagain; 1314 } 1315 1316 1317 /* 1318 * XXX: The 3c509 card can get in a mode where both the fifo status bit 1319 * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set 1320 * We detect this situation and we reset the adapter. 1321 * It happens at times when there is a lot of broadcast traffic 1322 * on the cable (once in a blue moon). 1323 */ 1324 static int 1325 epstatus(sc) 1326 struct ep_softc *sc; 1327 { 1328 bus_space_tag_t iot = sc->sc_iot; 1329 bus_space_handle_t ioh = sc->sc_ioh; 1330 u_int16_t fifost; 1331 1332 /* 1333 * Check the FIFO status and act accordingly 1334 */ 1335 GO_WINDOW(4); 1336 fifost = bus_space_read_2(iot, ioh, ELINK_W4_FIFO_DIAG); 1337 GO_WINDOW(1); 1338 1339 if (fifost & FIFOS_RX_UNDERRUN) { 1340 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1341 printf("%s: RX underrun\n", sc->sc_dev.dv_xname); 1342 epreset(sc); 1343 return 0; 1344 } 1345 1346 if (fifost & FIFOS_RX_STATUS_OVERRUN) { 1347 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1348 printf("%s: RX Status overrun\n", sc->sc_dev.dv_xname); 1349 return 1; 1350 } 1351 1352 if (fifost & FIFOS_RX_OVERRUN) { 1353 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1354 printf("%s: RX overrun\n", sc->sc_dev.dv_xname); 1355 return 1; 1356 } 1357 1358 if (fifost & FIFOS_TX_OVERRUN) { 1359 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1360 printf("%s: TX overrun\n", sc->sc_dev.dv_xname); 1361 epreset(sc); 1362 return 0; 1363 } 1364 1365 return 0; 1366 } 1367 1368 1369 static void 1370 eptxstat(sc) 1371 struct ep_softc *sc; 1372 { 1373 bus_space_tag_t iot = sc->sc_iot; 1374 bus_space_handle_t ioh = sc->sc_ioh; 1375 int i; 1376 1377 /* 1378 * We need to read+write TX_STATUS until we get a 0 status 1379 * in order to turn off the interrupt flag. 1380 */ 1381 while ((i = bus_space_read_1(iot, ioh, 1382 ep_w1_reg(sc, ELINK_W1_TX_STATUS))) & TXS_COMPLETE) { 1383 bus_space_write_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS), 1384 0x0); 1385 1386 if (i & TXS_JABBER) { 1387 ++sc->sc_ethercom.ec_if.if_oerrors; 1388 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1389 printf("%s: jabber (%x)\n", 1390 sc->sc_dev.dv_xname, i); 1391 epreset(sc); 1392 } else if (i & TXS_UNDERRUN) { 1393 ++sc->sc_ethercom.ec_if.if_oerrors; 1394 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1395 printf("%s: fifo underrun (%x) @%d\n", 1396 sc->sc_dev.dv_xname, i, 1397 sc->tx_start_thresh); 1398 if (sc->tx_succ_ok < 100) 1399 sc->tx_start_thresh = min(ETHER_MAX_LEN, 1400 sc->tx_start_thresh + 20); 1401 sc->tx_succ_ok = 0; 1402 epreset(sc); 1403 } else if (i & TXS_MAX_COLLISION) { 1404 ++sc->sc_ethercom.ec_if.if_collisions; 1405 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 1406 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1407 } else 1408 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 1409 } 1410 } 1411 1412 int 1413 epintr(arg) 1414 void *arg; 1415 { 1416 struct ep_softc *sc = arg; 1417 bus_space_tag_t iot = sc->sc_iot; 1418 bus_space_handle_t ioh = sc->sc_ioh; 1419 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1420 u_int16_t status; 1421 int ret = 0; 1422 int addrandom = 0; 1423 1424 if (sc->enabled == 0 || 1425 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1426 return (0); 1427 1428 for (;;) { 1429 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1430 1431 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1432 1433 if ((status & (S_TX_COMPLETE | S_TX_AVAIL | 1434 S_RX_COMPLETE | S_CARD_FAILURE)) == 0) { 1435 if ((status & S_INTR_LATCH) == 0) { 1436 #if 0 1437 printf("%s: intr latch cleared %d\n", 1438 sc->sc_dev.dv_xname, status); 1439 #endif 1440 break; 1441 } 1442 } 1443 1444 ret = 1; 1445 1446 /* 1447 * Acknowledge any interrupts. It's important that we do this 1448 * first, since there would otherwise be a race condition. 1449 * Due to the i386 interrupt queueing, we may get spurious 1450 * interrupts occasionally. 1451 */ 1452 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1453 (status & (C_INTR_LATCH | 1454 C_CARD_FAILURE | 1455 C_TX_COMPLETE | 1456 C_TX_AVAIL | 1457 C_RX_COMPLETE | 1458 C_RX_EARLY | 1459 C_INT_RQD | 1460 C_UPD_STATS))); 1461 1462 #if 0 1463 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1464 1465 printf("%s: intr%s%s%s%s\n", sc->sc_dev.dv_xname, 1466 (status & S_RX_COMPLETE)?" RX_COMPLETE":"", 1467 (status & S_TX_COMPLETE)?" TX_COMPLETE":"", 1468 (status & S_TX_AVAIL)?" TX_AVAIL":"", 1469 (status & S_CARD_FAILURE)?" CARD_FAILURE":""); 1470 #endif 1471 1472 if (status & S_RX_COMPLETE) { 1473 epread(sc); 1474 addrandom = 1; 1475 } 1476 if (status & S_TX_AVAIL) { 1477 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1478 epstart(&sc->sc_ethercom.ec_if); 1479 addrandom = 1; 1480 } 1481 if (status & S_CARD_FAILURE) { 1482 printf("%s: adapter failure (%x)\n", 1483 sc->sc_dev.dv_xname, status); 1484 #if 1 1485 epinit(ifp); 1486 #else 1487 epreset(sc); 1488 #endif 1489 return (1); 1490 } 1491 if (status & S_TX_COMPLETE) { 1492 eptxstat(sc); 1493 epstart(ifp); 1494 addrandom = 1; 1495 } 1496 1497 #if NRND > 0 1498 if (status) 1499 rnd_add_uint32(&sc->rnd_source, status); 1500 #endif 1501 } 1502 1503 /* no more interrupts */ 1504 return (ret); 1505 } 1506 1507 void 1508 epread(sc) 1509 struct ep_softc *sc; 1510 { 1511 bus_space_tag_t iot = sc->sc_iot; 1512 bus_space_handle_t ioh = sc->sc_ioh; 1513 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1514 struct mbuf *m; 1515 int len; 1516 1517 len = bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1518 1519 again: 1520 if (ifp->if_flags & IFF_DEBUG) { 1521 int err = len & ERR_MASK; 1522 char *s = NULL; 1523 1524 if (len & ERR_INCOMPLETE) 1525 s = "incomplete packet"; 1526 else if (err == ERR_OVERRUN) 1527 s = "packet overrun"; 1528 else if (err == ERR_RUNT) 1529 s = "runt packet"; 1530 else if (err == ERR_ALIGNMENT) 1531 s = "bad alignment"; 1532 else if (err == ERR_CRC) 1533 s = "bad crc"; 1534 else if (err == ERR_OVERSIZE) 1535 s = "oversized packet"; 1536 else if (err == ERR_DRIBBLE) 1537 s = "dribble bits"; 1538 1539 if (s) 1540 printf("%s: %s\n", sc->sc_dev.dv_xname, s); 1541 } 1542 1543 if (len & ERR_INCOMPLETE) 1544 return; 1545 1546 if (len & ERR_RX) { 1547 ++ifp->if_ierrors; 1548 goto abort; 1549 } 1550 1551 len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */ 1552 1553 /* Pull packet off interface. */ 1554 m = epget(sc, len); 1555 if (m == 0) { 1556 ifp->if_ierrors++; 1557 goto abort; 1558 } 1559 1560 ++ifp->if_ipackets; 1561 1562 #if NBPFILTER > 0 1563 /* 1564 * Check if there's a BPF listener on this interface. 1565 * If so, hand off the raw packet to BPF. 1566 */ 1567 if (ifp->if_bpf) 1568 bpf_mtap(ifp->if_bpf, m); 1569 #endif 1570 1571 (*ifp->if_input)(ifp, m); 1572 1573 /* 1574 * In periods of high traffic we can actually receive enough 1575 * packets so that the fifo overrun bit will be set at this point, 1576 * even though we just read a packet. In this case we 1577 * are not going to receive any more interrupts. We check for 1578 * this condition and read again until the fifo is not full. 1579 * We could simplify this test by not using epstatus(), but 1580 * rechecking the RX_STATUS register directly. This test could 1581 * result in unnecessary looping in cases where there is a new 1582 * packet but the fifo is not full, but it will not fix the 1583 * stuck behavior. 1584 * 1585 * Even with this improvement, we still get packet overrun errors 1586 * which are hurting performance. Maybe when I get some more time 1587 * I'll modify epread() so that it can handle RX_EARLY interrupts. 1588 */ 1589 if (epstatus(sc)) { 1590 len = bus_space_read_2(iot, ioh, 1591 ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1592 /* Check if we are stuck and reset [see XXX comment] */ 1593 if (len & ERR_INCOMPLETE) { 1594 if (ifp->if_flags & IFF_DEBUG) 1595 printf("%s: adapter reset\n", 1596 sc->sc_dev.dv_xname); 1597 epreset(sc); 1598 return; 1599 } 1600 goto again; 1601 } 1602 1603 return; 1604 1605 abort: 1606 ep_discard_rxtop(iot, ioh); 1607 1608 } 1609 1610 struct mbuf * 1611 epget(sc, totlen) 1612 struct ep_softc *sc; 1613 int totlen; 1614 { 1615 bus_space_tag_t iot = sc->sc_iot; 1616 bus_space_handle_t ioh = sc->sc_ioh; 1617 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1618 struct mbuf *top, **mp, *m, *rv = NULL; 1619 bus_addr_t rxreg; 1620 int len, remaining; 1621 int sh; 1622 1623 m = sc->mb[sc->next_mb]; 1624 sc->mb[sc->next_mb] = 0; 1625 if (m == 0) { 1626 MGETHDR(m, M_DONTWAIT, MT_DATA); 1627 if (m == 0) 1628 return 0; 1629 } else { 1630 /* If the queue is no longer full, refill. */ 1631 if (sc->last_mb == sc->next_mb) 1632 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1633 /* Convert one of our saved mbuf's. */ 1634 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1635 m->m_data = m->m_pktdat; 1636 m->m_flags = M_PKTHDR; 1637 bzero(&m->m_pkthdr, sizeof(m->m_pkthdr)); 1638 } 1639 m->m_pkthdr.rcvif = ifp; 1640 m->m_pkthdr.len = totlen; 1641 len = MHLEN; 1642 top = 0; 1643 mp = ⊤ 1644 1645 /* 1646 * We read the packet at a high interrupt priority level so that 1647 * an interrupt from another device won't cause the card's packet 1648 * buffer to overflow. We choose splsched() since that blocks 1649 * essentially everything except for interrupts from serial 1650 * devices (which typically lose data of their interrupt isn't 1651 * serviced fast enough). 1652 * 1653 * XXX THIS CAN CAUSE CLOCK DRIFT! 1654 */ 1655 sh = splsched(); 1656 1657 rxreg = ep_w1_reg(sc, ELINK_W1_RX_PIO_RD_1); 1658 1659 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1660 /* 1661 * Prime the FIFO buffer counter (number of 16-bit 1662 * words about to be read from the FIFO). 1663 * 1664 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1665 * COUNTER IS NON-ZERO! 1666 */ 1667 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, totlen >> 1); 1668 } 1669 1670 while (totlen > 0) { 1671 if (top) { 1672 m = sc->mb[sc->next_mb]; 1673 sc->mb[sc->next_mb] = 0; 1674 if (m == 0) { 1675 MGET(m, M_DONTWAIT, MT_DATA); 1676 if (m == 0) { 1677 m_freem(top); 1678 goto out; 1679 } 1680 } else { 1681 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1682 } 1683 len = MLEN; 1684 } 1685 if (totlen >= MINCLSIZE) { 1686 MCLGET(m, M_DONTWAIT); 1687 if ((m->m_flags & M_EXT) == 0) { 1688 m_free(m); 1689 m_freem(top); 1690 goto out; 1691 } 1692 len = MCLBYTES; 1693 } 1694 if (top == 0) { 1695 /* align the struct ip header */ 1696 caddr_t newdata = (caddr_t) 1697 ALIGN(m->m_data + sizeof(struct ether_header)) 1698 - sizeof(struct ether_header); 1699 len -= newdata - m->m_data; 1700 m->m_data = newdata; 1701 } 1702 remaining = len = min(totlen, len); 1703 if (ELINK_IS_BUS_32(sc->bustype)) { 1704 u_long offset = mtod(m, u_long); 1705 /* 1706 * Read bytes up to the point where we are aligned. 1707 * (We can align to 4 bytes, rather than ALIGNBYTES, 1708 * here because we're later reading 4-byte chunks.) 1709 */ 1710 if ((remaining > 3) && (offset & 3)) { 1711 int count = (4 - (offset & 3)); 1712 bus_space_read_multi_1(iot, ioh, 1713 rxreg, (u_int8_t *) offset, count); 1714 offset += count; 1715 remaining -= count; 1716 } 1717 if (remaining > 3) { 1718 bus_space_read_multi_stream_4(iot, ioh, 1719 rxreg, (u_int32_t *) offset, 1720 remaining >> 2); 1721 offset += remaining & ~3; 1722 remaining &= 3; 1723 } 1724 if (remaining) { 1725 bus_space_read_multi_1(iot, ioh, 1726 rxreg, (u_int8_t *) offset, remaining); 1727 } 1728 } else { 1729 u_long offset = mtod(m, u_long); 1730 if ((remaining > 1) && (offset & 1)) { 1731 bus_space_read_multi_1(iot, ioh, 1732 rxreg, (u_int8_t *) offset, 1); 1733 remaining -= 1; 1734 offset += 1; 1735 } 1736 if (remaining > 1) { 1737 bus_space_read_multi_stream_2(iot, ioh, 1738 rxreg, (u_int16_t *) offset, 1739 remaining >> 1); 1740 offset += remaining & ~1; 1741 } 1742 if (remaining & 1) { 1743 bus_space_read_multi_1(iot, ioh, 1744 rxreg, (u_int8_t *) offset, remaining & 1); 1745 } 1746 } 1747 m->m_len = len; 1748 totlen -= len; 1749 *mp = m; 1750 mp = &m->m_next; 1751 } 1752 1753 rv = top; 1754 1755 ep_discard_rxtop(iot, ioh); 1756 1757 out: 1758 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 1759 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1760 splx(sh); 1761 1762 return rv; 1763 } 1764 1765 int 1766 epioctl(ifp, cmd, data) 1767 struct ifnet *ifp; 1768 u_long cmd; 1769 caddr_t data; 1770 { 1771 struct ep_softc *sc = ifp->if_softc; 1772 struct ifreq *ifr = (struct ifreq *)data; 1773 int s, error = 0; 1774 1775 s = splnet(); 1776 1777 switch (cmd) { 1778 1779 case SIOCSIFMEDIA: 1780 case SIOCGIFMEDIA: 1781 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 1782 break; 1783 1784 case SIOCADDMULTI: 1785 case SIOCDELMULTI: 1786 if (sc->enabled == 0) { 1787 error = EIO; 1788 break; 1789 } 1790 1791 default: 1792 error = ether_ioctl(ifp, cmd, data); 1793 1794 if (error == ENETRESET) { 1795 /* 1796 * Multicast list has changed; set the hardware filter 1797 * accordingly. 1798 */ 1799 epreset(sc); 1800 error = 0; 1801 } 1802 break; 1803 } 1804 1805 splx(s); 1806 return (error); 1807 } 1808 1809 void 1810 epreset(sc) 1811 struct ep_softc *sc; 1812 { 1813 int s; 1814 1815 s = splnet(); 1816 epinit(&sc->sc_ethercom.ec_if); 1817 splx(s); 1818 } 1819 1820 void 1821 epwatchdog(ifp) 1822 struct ifnet *ifp; 1823 { 1824 struct ep_softc *sc = ifp->if_softc; 1825 1826 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1827 ++sc->sc_ethercom.ec_if.if_oerrors; 1828 1829 epreset(sc); 1830 } 1831 1832 void 1833 epstop(ifp, disable) 1834 struct ifnet *ifp; 1835 int disable; 1836 { 1837 struct ep_softc *sc = ifp->if_softc; 1838 bus_space_tag_t iot = sc->sc_iot; 1839 bus_space_handle_t ioh = sc->sc_ioh; 1840 1841 if (sc->ep_flags & ELINK_FLAGS_MII) { 1842 /* Stop the one second clock. */ 1843 callout_stop(&sc->sc_mbuf_callout); 1844 1845 /* Down the MII. */ 1846 mii_down(&sc->sc_mii); 1847 } 1848 1849 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 1850 /* 1851 * Clear the FIFO buffer count, thus halting 1852 * any currently-running transactions. 1853 */ 1854 GO_WINDOW(1); /* sanity */ 1855 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 1856 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1857 } 1858 1859 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1860 ep_discard_rxtop(iot, ioh); 1861 1862 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1863 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1864 1865 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 1866 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 1867 1868 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1869 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK); 1870 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK); 1871 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RX_FILTER); 1872 1873 epmbufempty(sc); 1874 1875 if (disable) 1876 epdisable(sc); 1877 1878 ifp->if_flags &= ~IFF_RUNNING; 1879 } 1880 1881 1882 /* 1883 * Before reboots, reset card completely. 1884 */ 1885 static void 1886 epshutdown(arg) 1887 void *arg; 1888 { 1889 struct ep_softc *sc = arg; 1890 int s = splnet(); 1891 1892 if (sc->enabled) { 1893 epstop(&sc->sc_ethercom.ec_if, 1); 1894 ep_reset_cmd(sc, ELINK_COMMAND, GLOBAL_RESET); 1895 sc->enabled = 0; 1896 } 1897 splx(s); 1898 } 1899 1900 /* 1901 * We get eeprom data from the id_port given an offset into the 1902 * eeprom. Basically; after the ID_sequence is sent to all of 1903 * the cards; they enter the ID_CMD state where they will accept 1904 * command requests. 0x80-0xbf loads the eeprom data. We then 1905 * read the port 16 times and with every read; the cards check 1906 * for contention (ie: if one card writes a 0 bit and another 1907 * writes a 1 bit then the host sees a 0. At the end of the cycle; 1908 * each card compares the data on the bus; if there is a difference 1909 * then that card goes into ID_WAIT state again). In the meantime; 1910 * one bit of data is returned in the AX register which is conveniently 1911 * returned to us by bus_space_read_1(). Hence; we read 16 times getting one 1912 * bit of data with each read. 1913 * 1914 * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT! 1915 */ 1916 u_int16_t 1917 epreadeeprom(iot, ioh, offset) 1918 bus_space_tag_t iot; 1919 bus_space_handle_t ioh; 1920 int offset; 1921 { 1922 u_int16_t data = 0; 1923 int i; 1924 1925 bus_space_write_1(iot, ioh, 0, 0x80 + offset); 1926 delay(1000); 1927 for (i = 0; i < 16; i++) 1928 data = (data << 1) | (bus_space_read_2(iot, ioh, 0) & 1); 1929 return (data); 1930 } 1931 1932 static int 1933 epbusyeeprom(sc) 1934 struct ep_softc *sc; 1935 { 1936 bus_space_tag_t iot = sc->sc_iot; 1937 bus_space_handle_t ioh = sc->sc_ioh; 1938 int i = 100, j; 1939 1940 if (sc->bustype == ELINK_BUS_PCMCIA) { 1941 delay(1000); 1942 return 0; 1943 } 1944 1945 j = 0; /* bad GCC flow analysis */ 1946 while (i--) { 1947 j = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND); 1948 if (j & EEPROM_BUSY) 1949 delay(100); 1950 else 1951 break; 1952 } 1953 if (!i) { 1954 printf("\n%s: eeprom failed to come ready\n", 1955 sc->sc_dev.dv_xname); 1956 return (1); 1957 } 1958 if (j & EEPROM_TST_MODE) { 1959 /* XXX PnP mode? */ 1960 printf("\n%s: erase pencil mark!\n", sc->sc_dev.dv_xname); 1961 return (1); 1962 } 1963 return (0); 1964 } 1965 1966 u_int16_t 1967 ep_read_eeprom(sc, offset) 1968 struct ep_softc *sc; 1969 u_int16_t offset; 1970 { 1971 u_int16_t readcmd; 1972 1973 /* 1974 * RoadRunner has a larger EEPROM, so a different read command 1975 * is required. 1976 */ 1977 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) 1978 readcmd = READ_EEPROM_RR; 1979 else 1980 readcmd = READ_EEPROM; 1981 1982 if (epbusyeeprom(sc)) 1983 return (0); /* XXX why is eeprom busy? */ 1984 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W0_EEPROM_COMMAND, 1985 readcmd | offset); 1986 if (epbusyeeprom(sc)) 1987 return (0); /* XXX why is eeprom busy? */ 1988 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W0_EEPROM_DATA)); 1989 } 1990 1991 void 1992 epmbuffill(v) 1993 void *v; 1994 { 1995 struct ep_softc *sc = v; 1996 struct mbuf *m; 1997 int s, i; 1998 1999 s = splnet(); 2000 i = sc->last_mb; 2001 do { 2002 if (sc->mb[i] == 0) { 2003 MGET(m, M_DONTWAIT, MT_DATA); 2004 if (m == 0) 2005 break; 2006 sc->mb[i] = m; 2007 } 2008 i = (i + 1) % MAX_MBS; 2009 } while (i != sc->next_mb); 2010 sc->last_mb = i; 2011 /* If the queue was not filled, try again. */ 2012 if (sc->last_mb != sc->next_mb) 2013 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 2014 splx(s); 2015 } 2016 2017 void 2018 epmbufempty(sc) 2019 struct ep_softc *sc; 2020 { 2021 int s, i; 2022 2023 s = splnet(); 2024 for (i = 0; i<MAX_MBS; i++) { 2025 if (sc->mb[i]) { 2026 m_freem(sc->mb[i]); 2027 sc->mb[i] = NULL; 2028 } 2029 } 2030 sc->last_mb = sc->next_mb = 0; 2031 callout_stop(&sc->sc_mbuf_callout); 2032 splx(s); 2033 } 2034 2035 int 2036 epenable(sc) 2037 struct ep_softc *sc; 2038 { 2039 2040 if (sc->enabled == 0 && sc->enable != NULL) { 2041 if ((*sc->enable)(sc) != 0) { 2042 printf("%s: device enable failed\n", 2043 sc->sc_dev.dv_xname); 2044 return (EIO); 2045 } 2046 } 2047 2048 sc->enabled = 1; 2049 return (0); 2050 } 2051 2052 void 2053 epdisable(sc) 2054 struct ep_softc *sc; 2055 { 2056 2057 if (sc->enabled != 0 && sc->disable != NULL) { 2058 (*sc->disable)(sc); 2059 sc->enabled = 0; 2060 } 2061 } 2062 2063 /* 2064 * ep_activate: 2065 * 2066 * Handle device activation/deactivation requests. 2067 */ 2068 int 2069 ep_activate(self, act) 2070 struct device *self; 2071 enum devact act; 2072 { 2073 struct ep_softc *sc = (struct ep_softc *)self; 2074 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2075 int error = 0, s; 2076 2077 s = splnet(); 2078 switch (act) { 2079 case DVACT_ACTIVATE: 2080 error = EOPNOTSUPP; 2081 break; 2082 2083 case DVACT_DEACTIVATE: 2084 if (sc->ep_flags & ELINK_FLAGS_MII) 2085 mii_activate(&sc->sc_mii, act, MII_PHY_ANY, 2086 MII_OFFSET_ANY); 2087 if_deactivate(ifp); 2088 break; 2089 } 2090 splx(s); 2091 return (error); 2092 } 2093 2094 /* 2095 * ep_detach: 2096 * 2097 * Detach a elink3 interface. 2098 */ 2099 int 2100 ep_detach(self, flags) 2101 struct device *self; 2102 int flags; 2103 { 2104 struct ep_softc *sc = (struct ep_softc *)self; 2105 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2106 2107 /* Succeed now if there's no work to do. */ 2108 if ((sc->sc_flags & ELINK_FLAGS_ATTACHED) == 0) 2109 return (0); 2110 2111 epdisable(sc); 2112 2113 callout_stop(&sc->sc_mii_callout); 2114 callout_stop(&sc->sc_mbuf_callout); 2115 2116 if (sc->ep_flags & ELINK_FLAGS_MII) { 2117 /* Detach all PHYs */ 2118 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 2119 } 2120 2121 /* Delete all remaining media. */ 2122 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 2123 2124 #if NRND > 0 2125 rnd_detach_source(&sc->rnd_source); 2126 #endif 2127 ether_ifdetach(ifp); 2128 if_detach(ifp); 2129 2130 shutdownhook_disestablish(sc->sd_hook); 2131 2132 return (0); 2133 } 2134 2135 u_int32_t 2136 ep_mii_bitbang_read(self) 2137 struct device *self; 2138 { 2139 struct ep_softc *sc = (void *) self; 2140 2141 /* We're already in Window 4. */ 2142 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 2143 ELINK_W4_BOOM_PHYSMGMT)); 2144 } 2145 2146 void 2147 ep_mii_bitbang_write(self, val) 2148 struct device *self; 2149 u_int32_t val; 2150 { 2151 struct ep_softc *sc = (void *) self; 2152 2153 /* We're already in Window 4. */ 2154 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 2155 ELINK_W4_BOOM_PHYSMGMT, val); 2156 } 2157 2158 int 2159 ep_mii_readreg(self, phy, reg) 2160 struct device *self; 2161 int phy, reg; 2162 { 2163 struct ep_softc *sc = (void *) self; 2164 int val; 2165 2166 GO_WINDOW(4); 2167 2168 val = mii_bitbang_readreg(self, &ep_mii_bitbang_ops, phy, reg); 2169 2170 GO_WINDOW(1); 2171 2172 return (val); 2173 } 2174 2175 void 2176 ep_mii_writereg(self, phy, reg, val) 2177 struct device *self; 2178 int phy, reg, val; 2179 { 2180 struct ep_softc *sc = (void *) self; 2181 2182 GO_WINDOW(4); 2183 2184 mii_bitbang_writereg(self, &ep_mii_bitbang_ops, phy, reg, val); 2185 2186 GO_WINDOW(1); 2187 } 2188 2189 void 2190 ep_statchg(self) 2191 struct device *self; 2192 { 2193 struct ep_softc *sc = (struct ep_softc *)self; 2194 bus_space_tag_t iot = sc->sc_iot; 2195 bus_space_handle_t ioh = sc->sc_ioh; 2196 int mctl; 2197 2198 GO_WINDOW(3); 2199 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 2200 if (sc->sc_mii.mii_media_active & IFM_FDX) 2201 mctl |= MAC_CONTROL_FDX; 2202 else 2203 mctl &= ~MAC_CONTROL_FDX; 2204 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 2205 GO_WINDOW(1); /* back to operating window */ 2206 } 2207
Indexes created Mon Sep 29 21:09:56 GMT 2025