elink3.c revision 1.91
1 /* $NetBSD: elink3.c,v 1.91 2001/05/14 08:01:23 jdolecek Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1996, 1997 Jonathan Stone <jonathan (at) NetBSD.org> 42 * Copyright (c) 1994 Herb Peyerl <hpeyerl (at) beer.org> 43 * All rights reserved. 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice, this list of conditions and the following disclaimer. 50 * 2. Redistributions in binary form must reproduce the above copyright 51 * notice, this list of conditions and the following disclaimer in the 52 * documentation and/or other materials provided with the distribution. 53 * 3. All advertising materials mentioning features or use of this software 54 * must display the following acknowledgement: 55 * This product includes software developed by Herb Peyerl. 56 * 4. The name of Herb Peyerl may not be used to endorse or promote products 57 * derived from this software without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 60 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 61 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 62 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 63 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 64 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 65 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 66 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 67 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 68 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 #include "opt_inet.h" 72 #include "opt_ns.h" 73 #include "bpfilter.h" 74 #include "rnd.h" 75 76 #include <sys/param.h> 77 #include <sys/systm.h> 78 #include <sys/callout.h> 79 #include <sys/kernel.h> 80 #include <sys/mbuf.h> 81 #include <sys/socket.h> 82 #include <sys/ioctl.h> 83 #include <sys/errno.h> 84 #include <sys/syslog.h> 85 #include <sys/select.h> 86 #include <sys/device.h> 87 #if NRND > 0 88 #include <sys/rnd.h> 89 #endif 90 91 #include <net/if.h> 92 #include <net/if_dl.h> 93 #include <net/if_ether.h> 94 #include <net/if_media.h> 95 96 #if NBPFILTER > 0 97 #include <net/bpf.h> 98 #include <net/bpfdesc.h> 99 #endif 100 101 #include <machine/cpu.h> 102 #include <machine/bus.h> 103 #include <machine/intr.h> 104 105 #include <dev/mii/mii.h> 106 #include <dev/mii/miivar.h> 107 #include <dev/mii/mii_bitbang.h> 108 109 #include <dev/ic/elink3var.h> 110 #include <dev/ic/elink3reg.h> 111 112 #ifdef DEBUG 113 int epdebug = 0; 114 #endif 115 116 /* 117 * XXX endian workaround for big-endian CPUs with pcmcia: 118 * if stream methods for bus_space_multi are not provided, define them 119 * using non-stream bus_space_{read,write}_multi_. 120 * Assumes host CPU is same endian-ness as bus. 121 */ 122 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 123 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 124 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 125 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 126 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 127 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 128 129 /* 130 * Structure to map media-present bits in boards to ifmedia codes and 131 * printable media names. Used for table-driven ifmedia initialization. 132 */ 133 struct ep_media { 134 int epm_mpbit; /* media present bit */ 135 const char *epm_name; /* name of medium */ 136 int epm_ifmedia; /* ifmedia word for medium */ 137 int epm_epmedia; /* ELINKMEDIA_* constant */ 138 }; 139 140 /* 141 * Media table for the Demon/Vortex/Boomerang chipsets. 142 * 143 * Note that MII on the Demon and Vortex (3c59x) indicates an external 144 * MII connector (for connecting an external PHY) ... I think. Treat 145 * it as `manual' on these chips. 146 * 147 * Any Boomerang (3c90x) chips with MII really do have an internal 148 * MII and real PHYs attached; no `native' media. 149 */ 150 const struct ep_media ep_vortex_media[] = { 151 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 152 ELINKMEDIA_10BASE_T }, 153 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 154 ELINKMEDIA_10BASE_T }, 155 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 156 ELINKMEDIA_AUI }, 157 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 158 ELINKMEDIA_10BASE_2 }, 159 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 160 ELINKMEDIA_100BASE_TX }, 161 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 162 ELINKMEDIA_100BASE_TX }, 163 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 164 ELINKMEDIA_100BASE_FX }, 165 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 166 ELINKMEDIA_MII }, 167 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 168 ELINKMEDIA_100BASE_T4 }, 169 { 0, NULL, 0, 170 0 }, 171 }; 172 173 /* 174 * Media table for the older 3Com Etherlink III chipset, used 175 * in the 3c509, 3c579, and 3c589. 176 */ 177 const struct ep_media ep_509_media[] = { 178 { ELINK_W0_CC_UTP, "10baseT", IFM_ETHER|IFM_10_T, 179 ELINKMEDIA_10BASE_T }, 180 { ELINK_W0_CC_AUI, "10base5", IFM_ETHER|IFM_10_5, 181 ELINKMEDIA_AUI }, 182 { ELINK_W0_CC_BNC, "10base2", IFM_ETHER|IFM_10_2, 183 ELINKMEDIA_10BASE_2 }, 184 { 0, NULL, 0, 185 0 }, 186 }; 187 188 void ep_internalconfig __P((struct ep_softc *sc)); 189 void ep_vortex_probemedia __P((struct ep_softc *sc)); 190 void ep_509_probemedia __P((struct ep_softc *sc)); 191 192 static void eptxstat __P((struct ep_softc *)); 193 static int epstatus __P((struct ep_softc *)); 194 int epinit __P((struct ifnet *)); 195 void epstop __P((struct ifnet *, int)); 196 int epioctl __P((struct ifnet *, u_long, caddr_t)); 197 void epstart __P((struct ifnet *)); 198 void epwatchdog __P((struct ifnet *)); 199 void epreset __P((struct ep_softc *)); 200 static void epshutdown __P((void *)); 201 void epread __P((struct ep_softc *)); 202 struct mbuf *epget __P((struct ep_softc *, int)); 203 void epmbuffill __P((void *)); 204 void epmbufempty __P((struct ep_softc *)); 205 void epsetfilter __P((struct ep_softc *)); 206 void ep_roadrunner_mii_enable __P((struct ep_softc *)); 207 void epsetmedia __P((struct ep_softc *)); 208 209 /* ifmedia callbacks */ 210 int ep_media_change __P((struct ifnet *ifp)); 211 void ep_media_status __P((struct ifnet *ifp, struct ifmediareq *req)); 212 213 /* MII callbacks */ 214 int ep_mii_readreg __P((struct device *, int, int)); 215 void ep_mii_writereg __P((struct device *, int, int, int)); 216 void ep_statchg __P((struct device *)); 217 218 void ep_tick __P((void *)); 219 220 static int epbusyeeprom __P((struct ep_softc *)); 221 u_int16_t ep_read_eeprom __P((struct ep_softc *, u_int16_t)); 222 static inline void ep_reset_cmd __P((struct ep_softc *sc, 223 u_int cmd, u_int arg)); 224 static inline void ep_finish_reset __P((bus_space_tag_t, bus_space_handle_t)); 225 static inline void ep_discard_rxtop __P((bus_space_tag_t, bus_space_handle_t)); 226 static __inline int ep_w1_reg __P((struct ep_softc *, int)); 227 228 /* 229 * MII bit-bang glue. 230 */ 231 u_int32_t ep_mii_bitbang_read __P((struct device *)); 232 void ep_mii_bitbang_write __P((struct device *, u_int32_t)); 233 234 const struct mii_bitbang_ops ep_mii_bitbang_ops = { 235 ep_mii_bitbang_read, 236 ep_mii_bitbang_write, 237 { 238 PHYSMGMT_DATA, /* MII_BIT_MDO */ 239 PHYSMGMT_DATA, /* MII_BIT_MDI */ 240 PHYSMGMT_CLK, /* MII_BIT_MDC */ 241 PHYSMGMT_DIR, /* MII_BIT_DIR_HOST_PHY */ 242 0, /* MII_BIT_DIR_PHY_HOST */ 243 } 244 }; 245 246 /* 247 * Some chips (3c515 [Corkscrew] and 3c574 [RoadRunner]) have 248 * Window 1 registers offset! 249 */ 250 static __inline int 251 ep_w1_reg(sc, reg) 252 struct ep_softc *sc; 253 int reg; 254 { 255 256 switch (sc->ep_chipset) { 257 case ELINK_CHIPSET_CORKSCREW: 258 return (reg + 0x10); 259 260 case ELINK_CHIPSET_ROADRUNNER: 261 switch (reg) { 262 case ELINK_W1_FREE_TX: 263 case ELINK_W1_RUNNER_RDCTL: 264 case ELINK_W1_RUNNER_WRCTL: 265 return (reg); 266 } 267 return (reg + 0x10); 268 } 269 270 return (reg); 271 } 272 273 /* 274 * Wait for any pending reset to complete. 275 * On newer hardware we could poll SC_COMMAND_IN_PROGRESS, 276 * but older hardware doesn't implement it and we must delay. 277 */ 278 static inline void 279 ep_finish_reset(iot, ioh) 280 bus_space_tag_t iot; 281 bus_space_handle_t ioh; 282 { 283 int i; 284 285 for (i = 0; i < 10000; i++) { 286 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 287 S_COMMAND_IN_PROGRESS) == 0) 288 break; 289 DELAY(10); 290 } 291 } 292 293 /* 294 * Issue a (reset) command, and be sure it has completed. 295 * Used for global reset, TX_RESET, RX_RESET. 296 */ 297 static inline void 298 ep_reset_cmd(sc, cmd, arg) 299 struct ep_softc *sc; 300 u_int cmd, arg; 301 { 302 bus_space_tag_t iot = sc->sc_iot; 303 bus_space_handle_t ioh = sc->sc_ioh; 304 305 bus_space_write_2(iot, ioh, cmd, arg); 306 ep_finish_reset(iot, ioh); 307 } 308 309 310 static inline void 311 ep_discard_rxtop(iot, ioh) 312 bus_space_tag_t iot; 313 bus_space_handle_t ioh; 314 { 315 int i; 316 317 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISCARD_TOP_PACK); 318 319 /* 320 * Spin for about 1 msec, to avoid forcing a DELAY() between 321 * every received packet (adding latency and limiting pkt-recv rate). 322 * On PCI, at 4 30-nsec PCI bus cycles for a read, 8000 iterations 323 * is about right. 324 */ 325 for (i = 0; i < 8000; i++) { 326 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 327 S_COMMAND_IN_PROGRESS) == 0) 328 return; 329 } 330 331 /* Didn't complete in a hurry. Do DELAY()s. */ 332 ep_finish_reset(iot, ioh); 333 } 334 335 /* 336 * Back-end attach and configure. 337 */ 338 int 339 epconfig(sc, chipset, enaddr) 340 struct ep_softc *sc; 341 u_short chipset; 342 u_int8_t *enaddr; 343 { 344 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 345 bus_space_tag_t iot = sc->sc_iot; 346 bus_space_handle_t ioh = sc->sc_ioh; 347 u_int16_t i; 348 u_int8_t myla[ETHER_ADDR_LEN]; 349 350 callout_init(&sc->sc_mii_callout); 351 callout_init(&sc->sc_mbuf_callout); 352 353 sc->ep_chipset = chipset; 354 355 /* 356 * We could have been groveling around in other register 357 * windows in the front-end; make sure we're in window 0 358 * to read the EEPROM. 359 */ 360 GO_WINDOW(0); 361 362 if (enaddr == NULL) { 363 /* 364 * Read the station address from the eeprom. 365 */ 366 for (i = 0; i < ETHER_ADDR_LEN / 2; i++) { 367 u_int16_t x = ep_read_eeprom(sc, i); 368 myla[(i << 1)] = x >> 8; 369 myla[(i << 1) + 1] = x; 370 } 371 enaddr = myla; 372 } 373 374 /* 375 * Vortex-based (3c59x pci,eisa) and Boomerang (3c900) cards 376 * allow FDDI-sized (4500) byte packets. Commands only take an 377 * 11-bit parameter, and 11 bits isn't enough to hold a full-size 378 * packet length. 379 * Commands to these cards implicitly upshift a packet size 380 * or threshold by 2 bits. 381 * To detect cards with large-packet support, we probe by setting 382 * the transmit threshold register, then change windows and 383 * read back the threshold register directly, and see if the 384 * threshold value was shifted or not. 385 */ 386 bus_space_write_2(iot, ioh, ELINK_COMMAND, 387 SET_TX_AVAIL_THRESH | ELINK_LARGEWIN_PROBE); 388 GO_WINDOW(5); 389 i = bus_space_read_2(iot, ioh, ELINK_W5_TX_AVAIL_THRESH); 390 GO_WINDOW(1); 391 switch (i) { 392 case ELINK_LARGEWIN_PROBE: 393 case (ELINK_LARGEWIN_PROBE & ELINK_LARGEWIN_MASK): 394 sc->ep_pktlenshift = 0; 395 break; 396 397 case (ELINK_LARGEWIN_PROBE << 2): 398 sc->ep_pktlenshift = 2; 399 break; 400 401 default: 402 printf("%s: wrote 0x%x to TX_AVAIL_THRESH, read back 0x%x. " 403 "Interface disabled\n", 404 sc->sc_dev.dv_xname, ELINK_LARGEWIN_PROBE, (int) i); 405 return (1); 406 } 407 408 /* 409 * Ensure Tx-available interrupts are enabled for 410 * start the interface. 411 * XXX should be in epinit()? 412 */ 413 bus_space_write_2(iot, ioh, ELINK_COMMAND, 414 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 415 416 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 417 ifp->if_softc = sc; 418 ifp->if_start = epstart; 419 ifp->if_ioctl = epioctl; 420 ifp->if_watchdog = epwatchdog; 421 ifp->if_init = epinit; 422 ifp->if_stop = epstop; 423 ifp->if_flags = 424 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 425 IFQ_SET_READY(&ifp->if_snd); 426 427 if_attach(ifp); 428 ether_ifattach(ifp, enaddr); 429 430 /* 431 * Finish configuration: 432 * determine chipset if the front-end couldn't do so, 433 * show board details, set media. 434 */ 435 436 /* 437 * Print RAM size. We also print the Ethernet address in here. 438 * It's extracted from the ifp, so we have to make sure it's 439 * been attached first. 440 */ 441 ep_internalconfig(sc); 442 GO_WINDOW(0); 443 444 /* 445 * Display some additional information, if pertinent. 446 */ 447 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 448 printf("%s: RoadRunner FIFO buffer enabled\n", 449 sc->sc_dev.dv_xname); 450 451 /* 452 * Initialize our media structures and MII info. We'll 453 * probe the MII if we discover that we have one. 454 */ 455 sc->sc_mii.mii_ifp = ifp; 456 sc->sc_mii.mii_readreg = ep_mii_readreg; 457 sc->sc_mii.mii_writereg = ep_mii_writereg; 458 sc->sc_mii.mii_statchg = ep_statchg; 459 ifmedia_init(&sc->sc_mii.mii_media, 0, ep_media_change, 460 ep_media_status); 461 462 /* 463 * Now, determine which media we have. 464 */ 465 switch (sc->ep_chipset) { 466 case ELINK_CHIPSET_ROADRUNNER: 467 if (sc->ep_flags & ELINK_FLAGS_MII) { 468 ep_roadrunner_mii_enable(sc); 469 GO_WINDOW(0); 470 } 471 /* FALLTHROUGH */ 472 473 case ELINK_CHIPSET_BOOMERANG: 474 /* 475 * If the device has MII, probe it. We won't be using 476 * any `native' media in this case, only PHYs. If 477 * we don't, just treat the Boomerang like the Vortex. 478 */ 479 if (sc->ep_flags & ELINK_FLAGS_MII) { 480 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 481 MII_PHY_ANY, MII_OFFSET_ANY, 0); 482 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 483 ifmedia_add(&sc->sc_mii.mii_media, 484 IFM_ETHER|IFM_NONE, 0, NULL); 485 ifmedia_set(&sc->sc_mii.mii_media, 486 IFM_ETHER|IFM_NONE); 487 } else { 488 ifmedia_set(&sc->sc_mii.mii_media, 489 IFM_ETHER|IFM_AUTO); 490 } 491 break; 492 } 493 /* FALLTHROUGH */ 494 495 case ELINK_CHIPSET_VORTEX: 496 ep_vortex_probemedia(sc); 497 break; 498 499 default: 500 ep_509_probemedia(sc); 501 break; 502 } 503 504 GO_WINDOW(1); /* Window 1 is operating window */ 505 506 #if NRND > 0 507 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 508 RND_TYPE_NET, 0); 509 #endif 510 511 sc->tx_start_thresh = 20; /* probably a good starting point. */ 512 513 /* Establish callback to reset card when we reboot. */ 514 sc->sd_hook = shutdownhook_establish(epshutdown, sc); 515 516 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 517 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 518 519 /* The attach is successful. */ 520 sc->sc_flags |= ELINK_FLAGS_ATTACHED; 521 return (0); 522 } 523 524 525 /* 526 * Show interface-model-independent info from window 3 527 * internal-configuration register. 528 */ 529 void 530 ep_internalconfig(sc) 531 struct ep_softc *sc; 532 { 533 bus_space_tag_t iot = sc->sc_iot; 534 bus_space_handle_t ioh = sc->sc_ioh; 535 536 u_int config0; 537 u_int config1; 538 539 int ram_size, ram_width, ram_speed, rom_size, ram_split; 540 /* 541 * NVRAM buffer Rx:Tx config names for busmastering cards 542 * (Demon, Vortex, and later). 543 */ 544 const char *onboard_ram_config[] = { 545 "5:3", "3:1", "1:1", "3:5" }; 546 547 GO_WINDOW(3); 548 config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 549 config1 = (u_int)bus_space_read_2(iot, ioh, 550 ELINK_W3_INTERNAL_CONFIG + 2); 551 GO_WINDOW(0); 552 553 ram_size = (config0 & CONFIG_RAMSIZE) >> CONFIG_RAMSIZE_SHIFT; 554 ram_width = (config0 & CONFIG_RAMWIDTH) >> CONFIG_RAMWIDTH_SHIFT; 555 ram_speed = (config0 & CONFIG_RAMSPEED) >> CONFIG_RAMSPEED_SHIFT; 556 rom_size = (config0 & CONFIG_ROMSIZE) >> CONFIG_ROMSIZE_SHIFT; 557 558 ram_split = (config1 & CONFIG_RAMSPLIT) >> CONFIG_RAMSPLIT_SHIFT; 559 560 printf("%s: address %s, %dKB %s-wide FIFO, %s Rx:Tx split\n", 561 sc->sc_dev.dv_xname, 562 ether_sprintf(LLADDR(sc->sc_ethercom.ec_if.if_sadl)), 563 8 << ram_size, 564 (ram_width) ? "word" : "byte", 565 onboard_ram_config[ram_split]); 566 } 567 568 569 /* 570 * Find supported media on 3c509-generation hardware that doesn't have 571 * a "reset_options" register in window 3. 572 * Use the config_cntrl register in window 0 instead. 573 * Used on original, 10Mbit ISA (3c509), 3c509B, and pre-Demon EISA cards 574 * that implement CONFIG_CTRL. We don't have a good way to set the 575 * default active medium; punt to ifconfig instead. 576 */ 577 void 578 ep_509_probemedia(sc) 579 struct ep_softc *sc; 580 { 581 bus_space_tag_t iot = sc->sc_iot; 582 bus_space_handle_t ioh = sc->sc_ioh; 583 struct ifmedia *ifm = &sc->sc_mii.mii_media; 584 u_int16_t ep_w0_config, port; 585 const struct ep_media *epm; 586 const char *sep = "", *defmedianame = NULL; 587 int defmedia = 0; 588 589 GO_WINDOW(0); 590 ep_w0_config = bus_space_read_2(iot, ioh, ELINK_W0_CONFIG_CTRL); 591 592 printf("%s: ", sc->sc_dev.dv_xname); 593 594 /* Sanity check that there are any media! */ 595 if ((ep_w0_config & ELINK_W0_CC_MEDIAMASK) == 0) { 596 printf("no media present!\n"); 597 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 598 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 599 return; 600 } 601 602 /* 603 * Get the default media from the EEPROM. 604 */ 605 port = ep_read_eeprom(sc, EEPROM_ADDR_CFG) >> 14; 606 607 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 608 609 for (epm = ep_509_media; epm->epm_name != NULL; epm++) { 610 if (ep_w0_config & epm->epm_mpbit) { 611 /* 612 * This simple test works because 509 chipsets 613 * don't do full-duplex. 614 */ 615 if (epm->epm_epmedia == port || defmedia == 0) { 616 defmedia = epm->epm_ifmedia; 617 defmedianame = epm->epm_name; 618 } 619 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 620 NULL); 621 PRINT(epm->epm_name); 622 } 623 } 624 625 #undef PRINT 626 627 #ifdef DIAGNOSTIC 628 if (defmedia == 0) 629 panic("ep_509_probemedia: impossible"); 630 #endif 631 632 printf(" (default %s)\n", defmedianame); 633 ifmedia_set(ifm, defmedia); 634 } 635 636 /* 637 * Find media present on large-packet-capable elink3 devices. 638 * Show onboard configuration of large-packet-capable elink3 devices 639 * (Demon, Vortex, Boomerang), which do not implement CONFIG_CTRL in window 0. 640 * Use media and card-version info in window 3 instead. 641 */ 642 void 643 ep_vortex_probemedia(sc) 644 struct ep_softc *sc; 645 { 646 bus_space_tag_t iot = sc->sc_iot; 647 bus_space_handle_t ioh = sc->sc_ioh; 648 struct ifmedia *ifm = &sc->sc_mii.mii_media; 649 const struct ep_media *epm; 650 u_int config1; 651 int reset_options; 652 int default_media; /* 3-bit encoding of default (EEPROM) media */ 653 int defmedia = 0; 654 const char *sep = "", *defmedianame = NULL; 655 656 GO_WINDOW(3); 657 config1 = (u_int)bus_space_read_2(iot, ioh, 658 ELINK_W3_INTERNAL_CONFIG + 2); 659 reset_options = (int)bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 660 GO_WINDOW(0); 661 662 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 663 664 printf("%s: ", sc->sc_dev.dv_xname); 665 666 /* Sanity check that there are any media! */ 667 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 668 printf("no media present!\n"); 669 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 670 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 671 return; 672 } 673 674 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 675 676 for (epm = ep_vortex_media; epm->epm_name != NULL; epm++) { 677 if (reset_options & epm->epm_mpbit) { 678 /* 679 * Default media is a little more complicated 680 * on the Vortex. We support full-duplex which 681 * uses the same reset options bit. 682 * 683 * XXX Check EEPROM for default to FDX? 684 */ 685 if (epm->epm_epmedia == default_media) { 686 if ((epm->epm_ifmedia & IFM_FDX) == 0) { 687 defmedia = epm->epm_ifmedia; 688 defmedianame = epm->epm_name; 689 } 690 } else if (defmedia == 0) { 691 defmedia = epm->epm_ifmedia; 692 defmedianame = epm->epm_name; 693 } 694 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 695 NULL); 696 PRINT(epm->epm_name); 697 } 698 } 699 700 #undef PRINT 701 702 #ifdef DIAGNOSTIC 703 if (defmedia == 0) 704 panic("ep_vortex_probemedia: impossible"); 705 #endif 706 707 printf(" (default %s)\n", defmedianame); 708 ifmedia_set(ifm, defmedia); 709 } 710 711 /* 712 * One second timer, used to tick the MII. 713 */ 714 void 715 ep_tick(arg) 716 void *arg; 717 { 718 struct ep_softc *sc = arg; 719 int s; 720 721 #ifdef DIAGNOSTIC 722 if ((sc->ep_flags & ELINK_FLAGS_MII) == 0) 723 panic("ep_tick"); 724 #endif 725 726 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 727 return; 728 729 s = splnet(); 730 mii_tick(&sc->sc_mii); 731 splx(s); 732 733 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 734 } 735 736 /* 737 * Bring device up. 738 * 739 * The order in here seems important. Otherwise we may not receive 740 * interrupts. ?! 741 */ 742 int 743 epinit(ifp) 744 struct ifnet *ifp; 745 { 746 struct ep_softc *sc = ifp->if_softc; 747 bus_space_tag_t iot = sc->sc_iot; 748 bus_space_handle_t ioh = sc->sc_ioh; 749 int i, error; 750 751 if (!sc->enabled && (error = epenable(sc)) != 0) 752 return (error); 753 754 /* Make sure any pending reset has completed before touching board */ 755 ep_finish_reset(iot, ioh); 756 757 /* 758 * Cancel any pending I/O. 759 */ 760 epstop(ifp, 0); 761 762 if (sc->bustype != ELINK_BUS_PCI && sc->bustype != ELINK_BUS_EISA 763 && sc->bustype != ELINK_BUS_MCA) { 764 GO_WINDOW(0); 765 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 0); 766 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 767 ENABLE_DRQ_IRQ); 768 } 769 770 if (sc->bustype == ELINK_BUS_PCMCIA) { 771 bus_space_write_2(iot, ioh, ELINK_W0_RESOURCE_CFG, 0x3f00); 772 } 773 774 GO_WINDOW(2); 775 for (i = 0; i < 6; i++) /* Reload the ether_addr. */ 776 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 777 LLADDR(ifp->if_sadl)[i]); 778 779 /* 780 * Reset the station-address receive filter. 781 * A bug workaround for busmastering (Vortex, Demon) cards. 782 */ 783 for (i = 0; i < 6; i++) 784 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 785 786 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 787 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 788 789 GO_WINDOW(1); /* Window 1 is operating window */ 790 for (i = 0; i < 31; i++) 791 bus_space_read_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS)); 792 793 /* Set threshold for Tx-space available interrupt. */ 794 bus_space_write_2(iot, ioh, ELINK_COMMAND, 795 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 796 797 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 798 /* 799 * Enable options in the PCMCIA LAN COR register, via 800 * RoadRunner Window 1. 801 * 802 * XXX MAGIC CONSTANTS! 803 */ 804 u_int16_t cor; 805 806 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, (1 << 11)); 807 808 cor = bus_space_read_2(iot, ioh, 0) & ~0x30; 809 if (sc->ep_flags & ELINK_FLAGS_USESHAREDMEM) 810 cor |= 0x10; 811 if (sc->ep_flags & ELINK_FLAGS_FORCENOWAIT) 812 cor |= 0x20; 813 bus_space_write_2(iot, ioh, 0, cor); 814 815 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 816 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 817 818 if (sc->ep_flags & ELINK_FLAGS_MII) { 819 ep_roadrunner_mii_enable(sc); 820 GO_WINDOW(1); 821 } 822 } 823 824 /* Enable interrupts. */ 825 bus_space_write_2(iot, ioh, ELINK_COMMAND, 826 SET_RD_0_MASK | S_CARD_FAILURE | S_RX_COMPLETE | S_TX_COMPLETE | 827 S_TX_AVAIL); 828 bus_space_write_2(iot, ioh, ELINK_COMMAND, 829 SET_INTR_MASK | S_CARD_FAILURE | S_RX_COMPLETE | S_TX_COMPLETE | 830 S_TX_AVAIL); 831 832 /* 833 * Attempt to get rid of any stray interrupts that occured during 834 * configuration. On the i386 this isn't possible because one may 835 * already be queued. However, a single stray interrupt is 836 * unimportant. 837 */ 838 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 839 840 epsetfilter(sc); 841 epsetmedia(sc); 842 843 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 844 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 845 846 epmbuffill(sc); 847 848 /* Interface is now `running', with no output active. */ 849 ifp->if_flags |= IFF_RUNNING; 850 ifp->if_flags &= ~IFF_OACTIVE; 851 852 if (sc->ep_flags & ELINK_FLAGS_MII) { 853 /* Start the one second clock. */ 854 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 855 } 856 857 /* Attempt to start output, if any. */ 858 epstart(ifp); 859 860 return (0); 861 } 862 863 864 /* 865 * Set multicast receive filter. 866 * elink3 hardware has no selective multicast filter in hardware. 867 * Enable reception of all multicasts and filter in software. 868 */ 869 void 870 epsetfilter(sc) 871 struct ep_softc *sc; 872 { 873 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 874 875 GO_WINDOW(1); /* Window 1 is operating window */ 876 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 877 SET_RX_FILTER | FIL_INDIVIDUAL | FIL_BRDCST | 878 ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0) | 879 ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0)); 880 } 881 882 int 883 ep_media_change(ifp) 884 struct ifnet *ifp; 885 { 886 struct ep_softc *sc = ifp->if_softc; 887 888 if (sc->enabled && (ifp->if_flags & IFF_UP) != 0) 889 epreset(sc); 890 891 return (0); 892 } 893 894 /* 895 * Reset and enable the MII on the RoadRunner. 896 */ 897 void 898 ep_roadrunner_mii_enable(sc) 899 struct ep_softc *sc; 900 { 901 bus_space_tag_t iot = sc->sc_iot; 902 bus_space_handle_t ioh = sc->sc_ioh; 903 904 GO_WINDOW(3); 905 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 906 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 907 delay(1000); 908 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 909 ELINK_PCI_100BASE_MII|ELINK_RUNNER_MII_RESET| 910 ELINK_RUNNER_ENABLE_MII); 911 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 912 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 913 delay(1000); 914 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 915 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 916 } 917 918 /* 919 * Set the card to use the specified media. 920 */ 921 void 922 epsetmedia(sc) 923 struct ep_softc *sc; 924 { 925 bus_space_tag_t iot = sc->sc_iot; 926 bus_space_handle_t ioh = sc->sc_ioh; 927 928 /* Turn everything off. First turn off linkbeat and UTP. */ 929 GO_WINDOW(4); 930 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0x0); 931 932 /* Turn off coax */ 933 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 934 delay(1000); 935 936 /* 937 * If the device has MII, select it, and then tell the 938 * PHY which media to use. 939 */ 940 if (sc->ep_flags & ELINK_FLAGS_MII) { 941 int config0, config1; 942 943 GO_WINDOW(3); 944 945 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 946 int resopt; 947 948 resopt = bus_space_read_2(iot, ioh, 949 ELINK_W3_RESET_OPTIONS); 950 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 951 resopt | ELINK_RUNNER_ENABLE_MII); 952 } 953 954 config0 = (u_int)bus_space_read_2(iot, ioh, 955 ELINK_W3_INTERNAL_CONFIG); 956 config1 = (u_int)bus_space_read_2(iot, ioh, 957 ELINK_W3_INTERNAL_CONFIG + 2); 958 959 config1 = config1 & ~CONFIG_MEDIAMASK; 960 config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT); 961 962 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 963 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 964 config1); 965 GO_WINDOW(1); /* back to operating window */ 966 967 mii_mediachg(&sc->sc_mii); 968 return; 969 } 970 971 /* 972 * Now turn on the selected media/transceiver. 973 */ 974 GO_WINDOW(4); 975 switch (IFM_SUBTYPE(sc->sc_mii.mii_media.ifm_cur->ifm_media)) { 976 case IFM_10_T: 977 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 978 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 979 break; 980 981 case IFM_10_2: 982 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 983 DELAY(1000); /* 50ms not enmough? */ 984 break; 985 986 case IFM_100_TX: 987 case IFM_100_FX: 988 case IFM_100_T4: /* XXX check documentation */ 989 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 990 LINKBEAT_ENABLE); 991 DELAY(1000); /* not strictly necessary? */ 992 break; 993 994 case IFM_10_5: 995 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 996 SQE_ENABLE); 997 DELAY(1000); /* not strictly necessary? */ 998 break; 999 1000 case IFM_MANUAL: 1001 /* 1002 * Nothing to do here; we are actually enabling the 1003 * external PHY on the MII port. 1004 */ 1005 break; 1006 1007 case IFM_NONE: 1008 printf("%s: interface disabled\n", sc->sc_dev.dv_xname); 1009 return; 1010 1011 default: 1012 panic("epsetmedia: impossible"); 1013 } 1014 1015 /* 1016 * Tell the chip which port to use. 1017 */ 1018 switch (sc->ep_chipset) { 1019 case ELINK_CHIPSET_VORTEX: 1020 case ELINK_CHIPSET_BOOMERANG: 1021 { 1022 int mctl, config0, config1; 1023 1024 GO_WINDOW(3); 1025 config0 = (u_int)bus_space_read_2(iot, ioh, 1026 ELINK_W3_INTERNAL_CONFIG); 1027 config1 = (u_int)bus_space_read_2(iot, ioh, 1028 ELINK_W3_INTERNAL_CONFIG + 2); 1029 1030 config1 = config1 & ~CONFIG_MEDIAMASK; 1031 config1 |= (sc->sc_mii.mii_media.ifm_cur->ifm_data << 1032 CONFIG_MEDIAMASK_SHIFT); 1033 1034 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 1035 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 1036 config1); 1037 1038 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1039 if (sc->sc_mii.mii_media.ifm_cur->ifm_media & IFM_FDX) 1040 mctl |= MAC_CONTROL_FDX; 1041 else 1042 mctl &= ~MAC_CONTROL_FDX; 1043 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1044 break; 1045 } 1046 default: 1047 { 1048 int w0_addr_cfg; 1049 1050 GO_WINDOW(0); 1051 w0_addr_cfg = bus_space_read_2(iot, ioh, ELINK_W0_ADDRESS_CFG); 1052 w0_addr_cfg &= 0x3fff; 1053 bus_space_write_2(iot, ioh, ELINK_W0_ADDRESS_CFG, w0_addr_cfg | 1054 (sc->sc_mii.mii_media.ifm_cur->ifm_data << 14)); 1055 DELAY(1000); 1056 break; 1057 } 1058 } 1059 1060 GO_WINDOW(1); /* Window 1 is operating window */ 1061 } 1062 1063 /* 1064 * Get currently-selected media from card. 1065 * (if_media callback, may be called before interface is brought up). 1066 */ 1067 void 1068 ep_media_status(ifp, req) 1069 struct ifnet *ifp; 1070 struct ifmediareq *req; 1071 { 1072 struct ep_softc *sc = ifp->if_softc; 1073 bus_space_tag_t iot = sc->sc_iot; 1074 bus_space_handle_t ioh = sc->sc_ioh; 1075 1076 if (sc->enabled == 0) { 1077 req->ifm_active = IFM_ETHER|IFM_NONE; 1078 req->ifm_status = 0; 1079 return; 1080 } 1081 1082 /* 1083 * If we have MII, go ask the PHY what's going on. 1084 */ 1085 if (sc->ep_flags & ELINK_FLAGS_MII) { 1086 mii_pollstat(&sc->sc_mii); 1087 req->ifm_active = sc->sc_mii.mii_media_active; 1088 req->ifm_status = sc->sc_mii.mii_media_status; 1089 return; 1090 } 1091 1092 /* 1093 * Ok, at this point we claim that our active media is 1094 * the currently selected media. We'll update our status 1095 * if our chipset allows us to detect link. 1096 */ 1097 req->ifm_active = sc->sc_mii.mii_media.ifm_cur->ifm_media; 1098 req->ifm_status = 0; 1099 1100 switch (sc->ep_chipset) { 1101 case ELINK_CHIPSET_VORTEX: 1102 case ELINK_CHIPSET_BOOMERANG: 1103 GO_WINDOW(4); 1104 req->ifm_status = IFM_AVALID; 1105 if (bus_space_read_2(iot, ioh, ELINK_W4_MEDIA_TYPE) & 1106 LINKBEAT_DETECT) 1107 req->ifm_status |= IFM_ACTIVE; 1108 GO_WINDOW(1); /* back to operating window */ 1109 break; 1110 } 1111 } 1112 1113 1114 1115 /* 1116 * Start outputting on the interface. 1117 * Always called as splnet(). 1118 */ 1119 void 1120 epstart(ifp) 1121 struct ifnet *ifp; 1122 { 1123 struct ep_softc *sc = ifp->if_softc; 1124 bus_space_tag_t iot = sc->sc_iot; 1125 bus_space_handle_t ioh = sc->sc_ioh; 1126 struct mbuf *m, *m0; 1127 int sh, len, pad; 1128 bus_addr_t txreg; 1129 1130 /* Don't transmit if interface is busy or not running */ 1131 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1132 return; 1133 1134 startagain: 1135 /* Sneak a peek at the next packet */ 1136 IFQ_POLL(&ifp->if_snd, m0); 1137 if (m0 == 0) 1138 return; 1139 1140 /* We need to use m->m_pkthdr.len, so require the header */ 1141 if ((m0->m_flags & M_PKTHDR) == 0) 1142 panic("epstart: no header mbuf"); 1143 len = m0->m_pkthdr.len; 1144 1145 pad = (4 - len) & 3; 1146 1147 /* 1148 * The 3c509 automatically pads short packets to minimum ethernet 1149 * length, but we drop packets that are too large. Perhaps we should 1150 * truncate them instead? 1151 */ 1152 if (len + pad > ETHER_MAX_LEN) { 1153 /* packet is obviously too large: toss it */ 1154 ++ifp->if_oerrors; 1155 IFQ_DEQUEUE(&ifp->if_snd, m0); 1156 m_freem(m0); 1157 goto readcheck; 1158 } 1159 1160 if (bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_FREE_TX)) < 1161 len + pad + 4) { 1162 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1163 SET_TX_AVAIL_THRESH | 1164 ((len + pad + 4) >> sc->ep_pktlenshift)); 1165 /* not enough room in FIFO */ 1166 ifp->if_flags |= IFF_OACTIVE; 1167 return; 1168 } else { 1169 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1170 SET_TX_AVAIL_THRESH | ELINK_THRESH_DISABLE); 1171 } 1172 1173 IFQ_DEQUEUE(&ifp->if_snd, m0); 1174 if (m0 == 0) /* not really needed */ 1175 return; 1176 1177 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_TX_START_THRESH | 1178 ((len / 4 + sc->tx_start_thresh) /* >> sc->ep_pktlenshift*/)); 1179 1180 #if NBPFILTER > 0 1181 if (ifp->if_bpf) 1182 bpf_mtap(ifp->if_bpf, m0); 1183 #endif 1184 1185 /* 1186 * Do the output at a high interrupt priority level so that an 1187 * interrupt from another device won't cause a FIFO underrun. 1188 * We choose splsched() since that blocks essentially everything 1189 * except for interrupts from serial devices (which typically 1190 * lose data if their interrupt isn't serviced fast enough). 1191 * 1192 * XXX THIS CAN CAUSE CLOCK DRIFT! 1193 */ 1194 sh = splsched(); 1195 1196 txreg = ep_w1_reg(sc, ELINK_W1_TX_PIO_WR_1); 1197 1198 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1199 /* 1200 * Prime the FIFO buffer counter (number of 16-bit 1201 * words about to be written to the FIFO). 1202 * 1203 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1204 * COUNTER IS NON-ZERO! 1205 */ 1206 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 1207 (len + pad) >> 1); 1208 } 1209 1210 bus_space_write_2(iot, ioh, txreg, len); 1211 bus_space_write_2(iot, ioh, txreg, 0xffff); /* Second is meaningless */ 1212 if (ELINK_IS_BUS_32(sc->bustype)) { 1213 for (m = m0; m;) { 1214 if (m->m_len > 3) { 1215 /* align our reads from core */ 1216 if (mtod(m, u_long) & 3) { 1217 u_long count = 1218 4 - (mtod(m, u_long) & 3); 1219 bus_space_write_multi_1(iot, ioh, 1220 txreg, mtod(m, u_int8_t *), count); 1221 m->m_data = 1222 (void *)(mtod(m, u_long) + count); 1223 m->m_len -= count; 1224 } 1225 bus_space_write_multi_stream_4(iot, ioh, 1226 txreg, mtod(m, u_int32_t *), m->m_len >> 2); 1227 m->m_data = (void *)(mtod(m, u_long) + 1228 (u_long)(m->m_len & ~3)); 1229 m->m_len -= m->m_len & ~3; 1230 } 1231 if (m->m_len) { 1232 bus_space_write_multi_1(iot, ioh, 1233 txreg, mtod(m, u_int8_t *), m->m_len); 1234 } 1235 MFREE(m, m0); 1236 m = m0; 1237 } 1238 } else { 1239 for (m = m0; m;) { 1240 if (m->m_len > 1) { 1241 if (mtod(m, u_long) & 1) { 1242 bus_space_write_1(iot, ioh, 1243 txreg, *(mtod(m, u_int8_t *))); 1244 m->m_data = 1245 (void *)(mtod(m, u_long) + 1); 1246 m->m_len -= 1; 1247 } 1248 bus_space_write_multi_stream_2(iot, ioh, 1249 txreg, mtod(m, u_int16_t *), 1250 m->m_len >> 1); 1251 } 1252 if (m->m_len & 1) { 1253 bus_space_write_1(iot, ioh, txreg, 1254 *(mtod(m, u_int8_t *) + m->m_len - 1)); 1255 } 1256 MFREE(m, m0); 1257 m = m0; 1258 } 1259 } 1260 while (pad--) 1261 bus_space_write_1(iot, ioh, txreg, 0); 1262 1263 splx(sh); 1264 1265 ++ifp->if_opackets; 1266 1267 readcheck: 1268 if ((bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)) & 1269 ERR_INCOMPLETE) == 0) { 1270 /* We received a complete packet. */ 1271 u_int16_t status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1272 1273 if ((status & S_INTR_LATCH) == 0) { 1274 /* 1275 * No interrupt, read the packet and continue 1276 * Is this supposed to happen? Is my motherboard 1277 * completely busted? 1278 */ 1279 epread(sc); 1280 } else { 1281 /* Got an interrupt, return so that it gets serviced. */ 1282 return; 1283 } 1284 } else { 1285 /* Check if we are stuck and reset [see XXX comment] */ 1286 if (epstatus(sc)) { 1287 if (ifp->if_flags & IFF_DEBUG) 1288 printf("%s: adapter reset\n", 1289 sc->sc_dev.dv_xname); 1290 epreset(sc); 1291 } 1292 } 1293 1294 goto startagain; 1295 } 1296 1297 1298 /* 1299 * XXX: The 3c509 card can get in a mode where both the fifo status bit 1300 * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set 1301 * We detect this situation and we reset the adapter. 1302 * It happens at times when there is a lot of broadcast traffic 1303 * on the cable (once in a blue moon). 1304 */ 1305 static int 1306 epstatus(sc) 1307 struct ep_softc *sc; 1308 { 1309 bus_space_tag_t iot = sc->sc_iot; 1310 bus_space_handle_t ioh = sc->sc_ioh; 1311 u_int16_t fifost; 1312 1313 /* 1314 * Check the FIFO status and act accordingly 1315 */ 1316 GO_WINDOW(4); 1317 fifost = bus_space_read_2(iot, ioh, ELINK_W4_FIFO_DIAG); 1318 GO_WINDOW(1); 1319 1320 if (fifost & FIFOS_RX_UNDERRUN) { 1321 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1322 printf("%s: RX underrun\n", sc->sc_dev.dv_xname); 1323 epreset(sc); 1324 return 0; 1325 } 1326 1327 if (fifost & FIFOS_RX_STATUS_OVERRUN) { 1328 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1329 printf("%s: RX Status overrun\n", sc->sc_dev.dv_xname); 1330 return 1; 1331 } 1332 1333 if (fifost & FIFOS_RX_OVERRUN) { 1334 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1335 printf("%s: RX overrun\n", sc->sc_dev.dv_xname); 1336 return 1; 1337 } 1338 1339 if (fifost & FIFOS_TX_OVERRUN) { 1340 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1341 printf("%s: TX overrun\n", sc->sc_dev.dv_xname); 1342 epreset(sc); 1343 return 0; 1344 } 1345 1346 return 0; 1347 } 1348 1349 1350 static void 1351 eptxstat(sc) 1352 struct ep_softc *sc; 1353 { 1354 bus_space_tag_t iot = sc->sc_iot; 1355 bus_space_handle_t ioh = sc->sc_ioh; 1356 int i; 1357 1358 /* 1359 * We need to read+write TX_STATUS until we get a 0 status 1360 * in order to turn off the interrupt flag. 1361 */ 1362 while ((i = bus_space_read_1(iot, ioh, 1363 ep_w1_reg(sc, ELINK_W1_TX_STATUS))) & TXS_COMPLETE) { 1364 bus_space_write_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS), 1365 0x0); 1366 1367 if (i & TXS_JABBER) { 1368 ++sc->sc_ethercom.ec_if.if_oerrors; 1369 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1370 printf("%s: jabber (%x)\n", 1371 sc->sc_dev.dv_xname, i); 1372 epreset(sc); 1373 } else if (i & TXS_UNDERRUN) { 1374 ++sc->sc_ethercom.ec_if.if_oerrors; 1375 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1376 printf("%s: fifo underrun (%x) @%d\n", 1377 sc->sc_dev.dv_xname, i, 1378 sc->tx_start_thresh); 1379 if (sc->tx_succ_ok < 100) 1380 sc->tx_start_thresh = min(ETHER_MAX_LEN, 1381 sc->tx_start_thresh + 20); 1382 sc->tx_succ_ok = 0; 1383 epreset(sc); 1384 } else if (i & TXS_MAX_COLLISION) { 1385 ++sc->sc_ethercom.ec_if.if_collisions; 1386 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 1387 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1388 } else 1389 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 1390 } 1391 } 1392 1393 int 1394 epintr(arg) 1395 void *arg; 1396 { 1397 struct ep_softc *sc = arg; 1398 bus_space_tag_t iot = sc->sc_iot; 1399 bus_space_handle_t ioh = sc->sc_ioh; 1400 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1401 u_int16_t status; 1402 int ret = 0; 1403 int addrandom = 0; 1404 1405 if (sc->enabled == 0 || 1406 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1407 return (0); 1408 1409 for (;;) { 1410 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1411 1412 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1413 1414 if ((status & (S_TX_COMPLETE | S_TX_AVAIL | 1415 S_RX_COMPLETE | S_CARD_FAILURE)) == 0) { 1416 if ((status & S_INTR_LATCH) == 0) { 1417 #if 0 1418 printf("%s: intr latch cleared %d\n", 1419 sc->sc_dev.dv_xname, status); 1420 #endif 1421 break; 1422 } 1423 } 1424 1425 ret = 1; 1426 1427 /* 1428 * Acknowledge any interrupts. It's important that we do this 1429 * first, since there would otherwise be a race condition. 1430 * Due to the i386 interrupt queueing, we may get spurious 1431 * interrupts occasionally. 1432 */ 1433 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1434 (status & (C_INTR_LATCH | 1435 C_CARD_FAILURE | 1436 C_TX_COMPLETE | 1437 C_TX_AVAIL | 1438 C_RX_COMPLETE | 1439 C_RX_EARLY | 1440 C_INT_RQD | 1441 C_UPD_STATS))); 1442 1443 #if 0 1444 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1445 1446 printf("%s: intr%s%s%s%s\n", sc->sc_dev.dv_xname, 1447 (status & S_RX_COMPLETE)?" RX_COMPLETE":"", 1448 (status & S_TX_COMPLETE)?" TX_COMPLETE":"", 1449 (status & S_TX_AVAIL)?" TX_AVAIL":"", 1450 (status & S_CARD_FAILURE)?" CARD_FAILURE":""); 1451 #endif 1452 1453 if (status & S_RX_COMPLETE) { 1454 epread(sc); 1455 addrandom = 1; 1456 } 1457 if (status & S_TX_AVAIL) { 1458 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1459 epstart(&sc->sc_ethercom.ec_if); 1460 addrandom = 1; 1461 } 1462 if (status & S_CARD_FAILURE) { 1463 printf("%s: adapter failure (%x)\n", 1464 sc->sc_dev.dv_xname, status); 1465 #if 1 1466 epinit(ifp); 1467 #else 1468 epreset(sc); 1469 #endif 1470 return (1); 1471 } 1472 if (status & S_TX_COMPLETE) { 1473 eptxstat(sc); 1474 epstart(ifp); 1475 addrandom = 1; 1476 } 1477 1478 #if NRND > 0 1479 if (status) 1480 rnd_add_uint32(&sc->rnd_source, status); 1481 #endif 1482 } 1483 1484 /* no more interrupts */ 1485 return (ret); 1486 } 1487 1488 void 1489 epread(sc) 1490 struct ep_softc *sc; 1491 { 1492 bus_space_tag_t iot = sc->sc_iot; 1493 bus_space_handle_t ioh = sc->sc_ioh; 1494 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1495 struct mbuf *m; 1496 int len; 1497 1498 len = bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1499 1500 again: 1501 if (ifp->if_flags & IFF_DEBUG) { 1502 int err = len & ERR_MASK; 1503 char *s = NULL; 1504 1505 if (len & ERR_INCOMPLETE) 1506 s = "incomplete packet"; 1507 else if (err == ERR_OVERRUN) 1508 s = "packet overrun"; 1509 else if (err == ERR_RUNT) 1510 s = "runt packet"; 1511 else if (err == ERR_ALIGNMENT) 1512 s = "bad alignment"; 1513 else if (err == ERR_CRC) 1514 s = "bad crc"; 1515 else if (err == ERR_OVERSIZE) 1516 s = "oversized packet"; 1517 else if (err == ERR_DRIBBLE) 1518 s = "dribble bits"; 1519 1520 if (s) 1521 printf("%s: %s\n", sc->sc_dev.dv_xname, s); 1522 } 1523 1524 if (len & ERR_INCOMPLETE) 1525 return; 1526 1527 if (len & ERR_RX) { 1528 ++ifp->if_ierrors; 1529 goto abort; 1530 } 1531 1532 len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */ 1533 1534 /* Pull packet off interface. */ 1535 m = epget(sc, len); 1536 if (m == 0) { 1537 ifp->if_ierrors++; 1538 goto abort; 1539 } 1540 1541 ++ifp->if_ipackets; 1542 1543 #if NBPFILTER > 0 1544 /* 1545 * Check if there's a BPF listener on this interface. 1546 * If so, hand off the raw packet to BPF. 1547 */ 1548 if (ifp->if_bpf) 1549 bpf_mtap(ifp->if_bpf, m); 1550 #endif 1551 1552 (*ifp->if_input)(ifp, m); 1553 1554 /* 1555 * In periods of high traffic we can actually receive enough 1556 * packets so that the fifo overrun bit will be set at this point, 1557 * even though we just read a packet. In this case we 1558 * are not going to receive any more interrupts. We check for 1559 * this condition and read again until the fifo is not full. 1560 * We could simplify this test by not using epstatus(), but 1561 * rechecking the RX_STATUS register directly. This test could 1562 * result in unnecessary looping in cases where there is a new 1563 * packet but the fifo is not full, but it will not fix the 1564 * stuck behavior. 1565 * 1566 * Even with this improvement, we still get packet overrun errors 1567 * which are hurting performance. Maybe when I get some more time 1568 * I'll modify epread() so that it can handle RX_EARLY interrupts. 1569 */ 1570 if (epstatus(sc)) { 1571 len = bus_space_read_2(iot, ioh, 1572 ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1573 /* Check if we are stuck and reset [see XXX comment] */ 1574 if (len & ERR_INCOMPLETE) { 1575 if (ifp->if_flags & IFF_DEBUG) 1576 printf("%s: adapter reset\n", 1577 sc->sc_dev.dv_xname); 1578 epreset(sc); 1579 return; 1580 } 1581 goto again; 1582 } 1583 1584 return; 1585 1586 abort: 1587 ep_discard_rxtop(iot, ioh); 1588 1589 } 1590 1591 struct mbuf * 1592 epget(sc, totlen) 1593 struct ep_softc *sc; 1594 int totlen; 1595 { 1596 bus_space_tag_t iot = sc->sc_iot; 1597 bus_space_handle_t ioh = sc->sc_ioh; 1598 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1599 struct mbuf *top, **mp, *m, *rv = NULL; 1600 bus_addr_t rxreg; 1601 int len, remaining; 1602 int sh; 1603 1604 m = sc->mb[sc->next_mb]; 1605 sc->mb[sc->next_mb] = 0; 1606 if (m == 0) { 1607 MGETHDR(m, M_DONTWAIT, MT_DATA); 1608 if (m == 0) 1609 return 0; 1610 } else { 1611 /* If the queue is no longer full, refill. */ 1612 if (sc->last_mb == sc->next_mb) 1613 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1614 /* Convert one of our saved mbuf's. */ 1615 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1616 m->m_data = m->m_pktdat; 1617 m->m_flags = M_PKTHDR; 1618 bzero(&m->m_pkthdr, sizeof(m->m_pkthdr)); 1619 } 1620 m->m_pkthdr.rcvif = ifp; 1621 m->m_pkthdr.len = totlen; 1622 len = MHLEN; 1623 top = 0; 1624 mp = ⊤ 1625 1626 /* 1627 * We read the packet at a high interrupt priority level so that 1628 * an interrupt from another device won't cause the card's packet 1629 * buffer to overflow. We choose splsched() since that blocks 1630 * essentially everything except for interrupts from serial 1631 * devices (which typically lose data if their interrupt isn't 1632 * serviced fast enough). 1633 * 1634 * XXX THIS CAN CAUSE CLOCK DRIFT! 1635 */ 1636 sh = splsched(); 1637 1638 rxreg = ep_w1_reg(sc, ELINK_W1_RX_PIO_RD_1); 1639 1640 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1641 /* 1642 * Prime the FIFO buffer counter (number of 16-bit 1643 * words about to be read from the FIFO). 1644 * 1645 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1646 * COUNTER IS NON-ZERO! 1647 */ 1648 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, totlen >> 1); 1649 } 1650 1651 while (totlen > 0) { 1652 if (top) { 1653 m = sc->mb[sc->next_mb]; 1654 sc->mb[sc->next_mb] = 0; 1655 if (m == 0) { 1656 MGET(m, M_DONTWAIT, MT_DATA); 1657 if (m == 0) { 1658 m_freem(top); 1659 goto out; 1660 } 1661 } else { 1662 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1663 } 1664 len = MLEN; 1665 } 1666 if (totlen >= MINCLSIZE) { 1667 MCLGET(m, M_DONTWAIT); 1668 if ((m->m_flags & M_EXT) == 0) { 1669 m_free(m); 1670 m_freem(top); 1671 goto out; 1672 } 1673 len = MCLBYTES; 1674 } 1675 if (top == 0) { 1676 /* align the struct ip header */ 1677 caddr_t newdata = (caddr_t) 1678 ALIGN(m->m_data + sizeof(struct ether_header)) 1679 - sizeof(struct ether_header); 1680 len -= newdata - m->m_data; 1681 m->m_data = newdata; 1682 } 1683 remaining = len = min(totlen, len); 1684 if (ELINK_IS_BUS_32(sc->bustype)) { 1685 u_long offset = mtod(m, u_long); 1686 /* 1687 * Read bytes up to the point where we are aligned. 1688 * (We can align to 4 bytes, rather than ALIGNBYTES, 1689 * here because we're later reading 4-byte chunks.) 1690 */ 1691 if ((remaining > 3) && (offset & 3)) { 1692 int count = (4 - (offset & 3)); 1693 bus_space_read_multi_1(iot, ioh, 1694 rxreg, (u_int8_t *) offset, count); 1695 offset += count; 1696 remaining -= count; 1697 } 1698 if (remaining > 3) { 1699 bus_space_read_multi_stream_4(iot, ioh, 1700 rxreg, (u_int32_t *) offset, 1701 remaining >> 2); 1702 offset += remaining & ~3; 1703 remaining &= 3; 1704 } 1705 if (remaining) { 1706 bus_space_read_multi_1(iot, ioh, 1707 rxreg, (u_int8_t *) offset, remaining); 1708 } 1709 } else { 1710 u_long offset = mtod(m, u_long); 1711 if ((remaining > 1) && (offset & 1)) { 1712 bus_space_read_multi_1(iot, ioh, 1713 rxreg, (u_int8_t *) offset, 1); 1714 remaining -= 1; 1715 offset += 1; 1716 } 1717 if (remaining > 1) { 1718 bus_space_read_multi_stream_2(iot, ioh, 1719 rxreg, (u_int16_t *) offset, 1720 remaining >> 1); 1721 offset += remaining & ~1; 1722 } 1723 if (remaining & 1) { 1724 bus_space_read_multi_1(iot, ioh, 1725 rxreg, (u_int8_t *) offset, remaining & 1); 1726 } 1727 } 1728 m->m_len = len; 1729 totlen -= len; 1730 *mp = m; 1731 mp = &m->m_next; 1732 } 1733 1734 rv = top; 1735 1736 ep_discard_rxtop(iot, ioh); 1737 1738 out: 1739 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 1740 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1741 splx(sh); 1742 1743 return rv; 1744 } 1745 1746 int 1747 epioctl(ifp, cmd, data) 1748 struct ifnet *ifp; 1749 u_long cmd; 1750 caddr_t data; 1751 { 1752 struct ep_softc *sc = ifp->if_softc; 1753 struct ifreq *ifr = (struct ifreq *)data; 1754 int s, error = 0; 1755 1756 s = splnet(); 1757 1758 switch (cmd) { 1759 1760 case SIOCSIFMEDIA: 1761 case SIOCGIFMEDIA: 1762 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 1763 break; 1764 1765 case SIOCADDMULTI: 1766 case SIOCDELMULTI: 1767 if (sc->enabled == 0) { 1768 error = EIO; 1769 break; 1770 } 1771 1772 default: 1773 error = ether_ioctl(ifp, cmd, data); 1774 1775 if (error == ENETRESET) { 1776 /* 1777 * Multicast list has changed; set the hardware filter 1778 * accordingly. 1779 */ 1780 epreset(sc); 1781 error = 0; 1782 } 1783 break; 1784 } 1785 1786 splx(s); 1787 return (error); 1788 } 1789 1790 void 1791 epreset(sc) 1792 struct ep_softc *sc; 1793 { 1794 int s; 1795 1796 s = splnet(); 1797 epinit(&sc->sc_ethercom.ec_if); 1798 splx(s); 1799 } 1800 1801 void 1802 epwatchdog(ifp) 1803 struct ifnet *ifp; 1804 { 1805 struct ep_softc *sc = ifp->if_softc; 1806 1807 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1808 ++sc->sc_ethercom.ec_if.if_oerrors; 1809 1810 epreset(sc); 1811 } 1812 1813 void 1814 epstop(ifp, disable) 1815 struct ifnet *ifp; 1816 int disable; 1817 { 1818 struct ep_softc *sc = ifp->if_softc; 1819 bus_space_tag_t iot = sc->sc_iot; 1820 bus_space_handle_t ioh = sc->sc_ioh; 1821 1822 if (sc->ep_flags & ELINK_FLAGS_MII) { 1823 /* Stop the one second clock. */ 1824 callout_stop(&sc->sc_mbuf_callout); 1825 1826 /* Down the MII. */ 1827 mii_down(&sc->sc_mii); 1828 } 1829 1830 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 1831 /* 1832 * Clear the FIFO buffer count, thus halting 1833 * any currently-running transactions. 1834 */ 1835 GO_WINDOW(1); /* sanity */ 1836 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 1837 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1838 } 1839 1840 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1841 ep_discard_rxtop(iot, ioh); 1842 1843 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1844 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1845 1846 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 1847 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 1848 1849 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1850 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK); 1851 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK); 1852 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RX_FILTER); 1853 1854 epmbufempty(sc); 1855 1856 if (disable) 1857 epdisable(sc); 1858 1859 ifp->if_flags &= ~IFF_RUNNING; 1860 } 1861 1862 1863 /* 1864 * Before reboots, reset card completely. 1865 */ 1866 static void 1867 epshutdown(arg) 1868 void *arg; 1869 { 1870 struct ep_softc *sc = arg; 1871 int s = splnet(); 1872 1873 if (sc->enabled) { 1874 epstop(&sc->sc_ethercom.ec_if, 1); 1875 ep_reset_cmd(sc, ELINK_COMMAND, GLOBAL_RESET); 1876 sc->enabled = 0; 1877 } 1878 splx(s); 1879 } 1880 1881 /* 1882 * We get eeprom data from the id_port given an offset into the 1883 * eeprom. Basically; after the ID_sequence is sent to all of 1884 * the cards; they enter the ID_CMD state where they will accept 1885 * command requests. 0x80-0xbf loads the eeprom data. We then 1886 * read the port 16 times and with every read; the cards check 1887 * for contention (ie: if one card writes a 0 bit and another 1888 * writes a 1 bit then the host sees a 0. At the end of the cycle; 1889 * each card compares the data on the bus; if there is a difference 1890 * then that card goes into ID_WAIT state again). In the meantime; 1891 * one bit of data is returned in the AX register which is conveniently 1892 * returned to us by bus_space_read_1(). Hence; we read 16 times getting one 1893 * bit of data with each read. 1894 * 1895 * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT! 1896 */ 1897 u_int16_t 1898 epreadeeprom(iot, ioh, offset) 1899 bus_space_tag_t iot; 1900 bus_space_handle_t ioh; 1901 int offset; 1902 { 1903 u_int16_t data = 0; 1904 int i; 1905 1906 bus_space_write_1(iot, ioh, 0, 0x80 + offset); 1907 delay(1000); 1908 for (i = 0; i < 16; i++) 1909 data = (data << 1) | (bus_space_read_2(iot, ioh, 0) & 1); 1910 return (data); 1911 } 1912 1913 static int 1914 epbusyeeprom(sc) 1915 struct ep_softc *sc; 1916 { 1917 bus_space_tag_t iot = sc->sc_iot; 1918 bus_space_handle_t ioh = sc->sc_ioh; 1919 int i = 100, j; 1920 1921 if (sc->bustype == ELINK_BUS_PCMCIA) { 1922 delay(1000); 1923 return 0; 1924 } 1925 1926 j = 0; /* bad GCC flow analysis */ 1927 while (i--) { 1928 j = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND); 1929 if (j & EEPROM_BUSY) 1930 delay(100); 1931 else 1932 break; 1933 } 1934 if (!i) { 1935 printf("\n%s: eeprom failed to come ready\n", 1936 sc->sc_dev.dv_xname); 1937 return (1); 1938 } 1939 if (j & EEPROM_TST_MODE) { 1940 /* XXX PnP mode? */ 1941 printf("\n%s: erase pencil mark!\n", sc->sc_dev.dv_xname); 1942 return (1); 1943 } 1944 return (0); 1945 } 1946 1947 u_int16_t 1948 ep_read_eeprom(sc, offset) 1949 struct ep_softc *sc; 1950 u_int16_t offset; 1951 { 1952 u_int16_t readcmd; 1953 1954 /* 1955 * RoadRunner has a larger EEPROM, so a different read command 1956 * is required. 1957 */ 1958 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) 1959 readcmd = READ_EEPROM_RR; 1960 else 1961 readcmd = READ_EEPROM; 1962 1963 if (epbusyeeprom(sc)) 1964 return (0); /* XXX why is eeprom busy? */ 1965 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W0_EEPROM_COMMAND, 1966 readcmd | offset); 1967 if (epbusyeeprom(sc)) 1968 return (0); /* XXX why is eeprom busy? */ 1969 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W0_EEPROM_DATA)); 1970 } 1971 1972 void 1973 epmbuffill(v) 1974 void *v; 1975 { 1976 struct ep_softc *sc = v; 1977 struct mbuf *m; 1978 int s, i; 1979 1980 s = splnet(); 1981 i = sc->last_mb; 1982 do { 1983 if (sc->mb[i] == 0) { 1984 MGET(m, M_DONTWAIT, MT_DATA); 1985 if (m == 0) 1986 break; 1987 sc->mb[i] = m; 1988 } 1989 i = (i + 1) % MAX_MBS; 1990 } while (i != sc->next_mb); 1991 sc->last_mb = i; 1992 /* If the queue was not filled, try again. */ 1993 if (sc->last_mb != sc->next_mb) 1994 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1995 splx(s); 1996 } 1997 1998 void 1999 epmbufempty(sc) 2000 struct ep_softc *sc; 2001 { 2002 int s, i; 2003 2004 s = splnet(); 2005 for (i = 0; i<MAX_MBS; i++) { 2006 if (sc->mb[i]) { 2007 m_freem(sc->mb[i]); 2008 sc->mb[i] = NULL; 2009 } 2010 } 2011 sc->last_mb = sc->next_mb = 0; 2012 callout_stop(&sc->sc_mbuf_callout); 2013 splx(s); 2014 } 2015 2016 int 2017 epenable(sc) 2018 struct ep_softc *sc; 2019 { 2020 2021 if (sc->enabled == 0 && sc->enable != NULL) { 2022 if ((*sc->enable)(sc) != 0) { 2023 printf("%s: device enable failed\n", 2024 sc->sc_dev.dv_xname); 2025 return (EIO); 2026 } 2027 } 2028 2029 sc->enabled = 1; 2030 return (0); 2031 } 2032 2033 void 2034 epdisable(sc) 2035 struct ep_softc *sc; 2036 { 2037 2038 if (sc->enabled != 0 && sc->disable != NULL) { 2039 (*sc->disable)(sc); 2040 sc->enabled = 0; 2041 } 2042 } 2043 2044 /* 2045 * ep_activate: 2046 * 2047 * Handle device activation/deactivation requests. 2048 */ 2049 int 2050 ep_activate(self, act) 2051 struct device *self; 2052 enum devact act; 2053 { 2054 struct ep_softc *sc = (struct ep_softc *)self; 2055 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2056 int error = 0, s; 2057 2058 s = splnet(); 2059 switch (act) { 2060 case DVACT_ACTIVATE: 2061 error = EOPNOTSUPP; 2062 break; 2063 2064 case DVACT_DEACTIVATE: 2065 if (sc->ep_flags & ELINK_FLAGS_MII) 2066 mii_activate(&sc->sc_mii, act, MII_PHY_ANY, 2067 MII_OFFSET_ANY); 2068 if_deactivate(ifp); 2069 break; 2070 } 2071 splx(s); 2072 return (error); 2073 } 2074 2075 /* 2076 * ep_detach: 2077 * 2078 * Detach a elink3 interface. 2079 */ 2080 int 2081 ep_detach(self, flags) 2082 struct device *self; 2083 int flags; 2084 { 2085 struct ep_softc *sc = (struct ep_softc *)self; 2086 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2087 2088 /* Succeed now if there's no work to do. */ 2089 if ((sc->sc_flags & ELINK_FLAGS_ATTACHED) == 0) 2090 return (0); 2091 2092 epdisable(sc); 2093 2094 callout_stop(&sc->sc_mii_callout); 2095 callout_stop(&sc->sc_mbuf_callout); 2096 2097 if (sc->ep_flags & ELINK_FLAGS_MII) { 2098 /* Detach all PHYs */ 2099 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 2100 } 2101 2102 /* Delete all remaining media. */ 2103 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 2104 2105 #if NRND > 0 2106 rnd_detach_source(&sc->rnd_source); 2107 #endif 2108 ether_ifdetach(ifp); 2109 if_detach(ifp); 2110 2111 shutdownhook_disestablish(sc->sd_hook); 2112 2113 return (0); 2114 } 2115 2116 u_int32_t 2117 ep_mii_bitbang_read(self) 2118 struct device *self; 2119 { 2120 struct ep_softc *sc = (void *) self; 2121 2122 /* We're already in Window 4. */ 2123 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 2124 ELINK_W4_BOOM_PHYSMGMT)); 2125 } 2126 2127 void 2128 ep_mii_bitbang_write(self, val) 2129 struct device *self; 2130 u_int32_t val; 2131 { 2132 struct ep_softc *sc = (void *) self; 2133 2134 /* We're already in Window 4. */ 2135 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 2136 ELINK_W4_BOOM_PHYSMGMT, val); 2137 } 2138 2139 int 2140 ep_mii_readreg(self, phy, reg) 2141 struct device *self; 2142 int phy, reg; 2143 { 2144 struct ep_softc *sc = (void *) self; 2145 int val; 2146 2147 GO_WINDOW(4); 2148 2149 val = mii_bitbang_readreg(self, &ep_mii_bitbang_ops, phy, reg); 2150 2151 GO_WINDOW(1); 2152 2153 return (val); 2154 } 2155 2156 void 2157 ep_mii_writereg(self, phy, reg, val) 2158 struct device *self; 2159 int phy, reg, val; 2160 { 2161 struct ep_softc *sc = (void *) self; 2162 2163 GO_WINDOW(4); 2164 2165 mii_bitbang_writereg(self, &ep_mii_bitbang_ops, phy, reg, val); 2166 2167 GO_WINDOW(1); 2168 } 2169 2170 void 2171 ep_statchg(self) 2172 struct device *self; 2173 { 2174 struct ep_softc *sc = (struct ep_softc *)self; 2175 bus_space_tag_t iot = sc->sc_iot; 2176 bus_space_handle_t ioh = sc->sc_ioh; 2177 int mctl; 2178 2179 GO_WINDOW(3); 2180 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 2181 if (sc->sc_mii.mii_media_active & IFM_FDX) 2182 mctl |= MAC_CONTROL_FDX; 2183 else 2184 mctl &= ~MAC_CONTROL_FDX; 2185 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 2186 GO_WINDOW(1); /* back to operating window */ 2187 } 2188
Indexes created Mon Sep 29 15:09:53 GMT 2025