elink3.c revision 1.97
1 /* $NetBSD: elink3.c,v 1.97 2001/07/27 02:33:34 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1996, 1997 Jonathan Stone <jonathan (at) NetBSD.org> 42 * Copyright (c) 1994 Herb Peyerl <hpeyerl (at) beer.org> 43 * All rights reserved. 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice, this list of conditions and the following disclaimer. 50 * 2. Redistributions in binary form must reproduce the above copyright 51 * notice, this list of conditions and the following disclaimer in the 52 * documentation and/or other materials provided with the distribution. 53 * 3. All advertising materials mentioning features or use of this software 54 * must display the following acknowledgement: 55 * This product includes software developed by Herb Peyerl. 56 * 4. The name of Herb Peyerl may not be used to endorse or promote products 57 * derived from this software without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 60 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 61 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 62 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 63 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 64 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 65 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 66 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 67 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 68 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 #include "opt_inet.h" 72 #include "opt_ns.h" 73 #include "bpfilter.h" 74 #include "rnd.h" 75 76 #include <sys/param.h> 77 #include <sys/systm.h> 78 #include <sys/callout.h> 79 #include <sys/kernel.h> 80 #include <sys/mbuf.h> 81 #include <sys/socket.h> 82 #include <sys/ioctl.h> 83 #include <sys/errno.h> 84 #include <sys/syslog.h> 85 #include <sys/select.h> 86 #include <sys/device.h> 87 #if NRND > 0 88 #include <sys/rnd.h> 89 #endif 90 91 #include <net/if.h> 92 #include <net/if_dl.h> 93 #include <net/if_ether.h> 94 #include <net/if_media.h> 95 96 #if NBPFILTER > 0 97 #include <net/bpf.h> 98 #include <net/bpfdesc.h> 99 #endif 100 101 #include <machine/cpu.h> 102 #include <machine/bus.h> 103 #include <machine/intr.h> 104 105 #include <dev/mii/mii.h> 106 #include <dev/mii/miivar.h> 107 #include <dev/mii/mii_bitbang.h> 108 109 #include <dev/ic/elink3var.h> 110 #include <dev/ic/elink3reg.h> 111 112 #ifdef DEBUG 113 int epdebug = 0; 114 #endif 115 116 /* 117 * XXX endian workaround for big-endian CPUs with pcmcia: 118 * if stream methods for bus_space_multi are not provided, define them 119 * using non-stream bus_space_{read,write}_multi_. 120 * Assumes host CPU is same endian-ness as bus. 121 */ 122 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 123 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 124 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 125 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 126 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 127 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 128 129 /* 130 * Structure to map media-present bits in boards to ifmedia codes and 131 * printable media names. Used for table-driven ifmedia initialization. 132 */ 133 struct ep_media { 134 int epm_mpbit; /* media present bit */ 135 const char *epm_name; /* name of medium */ 136 int epm_ifmedia; /* ifmedia word for medium */ 137 int epm_epmedia; /* ELINKMEDIA_* constant */ 138 }; 139 140 /* 141 * Media table for the Demon/Vortex/Boomerang chipsets. 142 * 143 * Note that MII on the Demon and Vortex (3c59x) indicates an external 144 * MII connector (for connecting an external PHY) ... I think. Treat 145 * it as `manual' on these chips. 146 * 147 * Any Boomerang (3c90x) chips with MII really do have an internal 148 * MII and real PHYs attached; no `native' media. 149 */ 150 const struct ep_media ep_vortex_media[] = { 151 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 152 ELINKMEDIA_10BASE_T }, 153 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 154 ELINKMEDIA_10BASE_T }, 155 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 156 ELINKMEDIA_AUI }, 157 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 158 ELINKMEDIA_10BASE_2 }, 159 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 160 ELINKMEDIA_100BASE_TX }, 161 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 162 ELINKMEDIA_100BASE_TX }, 163 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 164 ELINKMEDIA_100BASE_FX }, 165 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 166 ELINKMEDIA_MII }, 167 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 168 ELINKMEDIA_100BASE_T4 }, 169 { 0, NULL, 0, 170 0 }, 171 }; 172 173 /* 174 * Media table for the older 3Com Etherlink III chipset, used 175 * in the 3c509, 3c579, and 3c589. 176 */ 177 const struct ep_media ep_509_media[] = { 178 { ELINK_W0_CC_UTP, "10baseT", IFM_ETHER|IFM_10_T, 179 ELINKMEDIA_10BASE_T }, 180 { ELINK_W0_CC_AUI, "10base5", IFM_ETHER|IFM_10_5, 181 ELINKMEDIA_AUI }, 182 { ELINK_W0_CC_BNC, "10base2", IFM_ETHER|IFM_10_2, 183 ELINKMEDIA_10BASE_2 }, 184 { 0, NULL, 0, 185 0 }, 186 }; 187 188 void ep_internalconfig __P((struct ep_softc *sc)); 189 void ep_vortex_probemedia __P((struct ep_softc *sc)); 190 void ep_509_probemedia __P((struct ep_softc *sc)); 191 192 static void eptxstat __P((struct ep_softc *)); 193 static int epstatus __P((struct ep_softc *)); 194 int epinit __P((struct ifnet *)); 195 void epstop __P((struct ifnet *, int)); 196 int epioctl __P((struct ifnet *, u_long, caddr_t)); 197 void epstart __P((struct ifnet *)); 198 void epwatchdog __P((struct ifnet *)); 199 void epreset __P((struct ep_softc *)); 200 static void epshutdown __P((void *)); 201 void epread __P((struct ep_softc *)); 202 struct mbuf *epget __P((struct ep_softc *, int)); 203 void epmbuffill __P((void *)); 204 void epmbufempty __P((struct ep_softc *)); 205 void epsetfilter __P((struct ep_softc *)); 206 void ep_roadrunner_mii_enable __P((struct ep_softc *)); 207 void epsetmedia __P((struct ep_softc *)); 208 209 /* ifmedia callbacks */ 210 int ep_media_change __P((struct ifnet *ifp)); 211 void ep_media_status __P((struct ifnet *ifp, struct ifmediareq *req)); 212 213 /* MII callbacks */ 214 int ep_mii_readreg __P((struct device *, int, int)); 215 void ep_mii_writereg __P((struct device *, int, int, int)); 216 void ep_statchg __P((struct device *)); 217 218 void ep_tick __P((void *)); 219 220 static int epbusyeeprom __P((struct ep_softc *)); 221 u_int16_t ep_read_eeprom __P((struct ep_softc *, u_int16_t)); 222 static inline void ep_reset_cmd __P((struct ep_softc *sc, 223 u_int cmd, u_int arg)); 224 static inline void ep_finish_reset __P((bus_space_tag_t, bus_space_handle_t)); 225 static inline void ep_discard_rxtop __P((bus_space_tag_t, bus_space_handle_t)); 226 static __inline int ep_w1_reg __P((struct ep_softc *, int)); 227 228 /* 229 * MII bit-bang glue. 230 */ 231 u_int32_t ep_mii_bitbang_read __P((struct device *)); 232 void ep_mii_bitbang_write __P((struct device *, u_int32_t)); 233 234 const struct mii_bitbang_ops ep_mii_bitbang_ops = { 235 ep_mii_bitbang_read, 236 ep_mii_bitbang_write, 237 { 238 PHYSMGMT_DATA, /* MII_BIT_MDO */ 239 PHYSMGMT_DATA, /* MII_BIT_MDI */ 240 PHYSMGMT_CLK, /* MII_BIT_MDC */ 241 PHYSMGMT_DIR, /* MII_BIT_DIR_HOST_PHY */ 242 0, /* MII_BIT_DIR_PHY_HOST */ 243 } 244 }; 245 246 /* 247 * Some chips (3c515 [Corkscrew] and 3c574 [RoadRunner]) have 248 * Window 1 registers offset! 249 */ 250 static __inline int 251 ep_w1_reg(sc, reg) 252 struct ep_softc *sc; 253 int reg; 254 { 255 256 switch (sc->ep_chipset) { 257 case ELINK_CHIPSET_CORKSCREW: 258 return (reg + 0x10); 259 260 case ELINK_CHIPSET_ROADRUNNER: 261 switch (reg) { 262 case ELINK_W1_FREE_TX: 263 case ELINK_W1_RUNNER_RDCTL: 264 case ELINK_W1_RUNNER_WRCTL: 265 return (reg); 266 } 267 return (reg + 0x10); 268 } 269 270 return (reg); 271 } 272 273 /* 274 * Wait for any pending reset to complete. 275 * On newer hardware we could poll SC_COMMAND_IN_PROGRESS, 276 * but older hardware doesn't implement it and we must delay. 277 */ 278 static inline void 279 ep_finish_reset(iot, ioh) 280 bus_space_tag_t iot; 281 bus_space_handle_t ioh; 282 { 283 int i; 284 285 for (i = 0; i < 10000; i++) { 286 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 287 S_COMMAND_IN_PROGRESS) == 0) 288 break; 289 DELAY(10); 290 } 291 } 292 293 /* 294 * Issue a (reset) command, and be sure it has completed. 295 * Used for global reset, TX_RESET, RX_RESET. 296 */ 297 static inline void 298 ep_reset_cmd(sc, cmd, arg) 299 struct ep_softc *sc; 300 u_int cmd, arg; 301 { 302 bus_space_tag_t iot = sc->sc_iot; 303 bus_space_handle_t ioh = sc->sc_ioh; 304 305 bus_space_write_2(iot, ioh, cmd, arg); 306 ep_finish_reset(iot, ioh); 307 } 308 309 310 static inline void 311 ep_discard_rxtop(iot, ioh) 312 bus_space_tag_t iot; 313 bus_space_handle_t ioh; 314 { 315 int i; 316 317 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISCARD_TOP_PACK); 318 319 /* 320 * Spin for about 1 msec, to avoid forcing a DELAY() between 321 * every received packet (adding latency and limiting pkt-recv rate). 322 * On PCI, at 4 30-nsec PCI bus cycles for a read, 8000 iterations 323 * is about right. 324 */ 325 for (i = 0; i < 8000; i++) { 326 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 327 S_COMMAND_IN_PROGRESS) == 0) 328 return; 329 } 330 331 /* Didn't complete in a hurry. Do DELAY()s. */ 332 ep_finish_reset(iot, ioh); 333 } 334 335 /* 336 * Back-end attach and configure. 337 */ 338 int 339 epconfig(sc, chipset, enaddr) 340 struct ep_softc *sc; 341 u_short chipset; 342 u_int8_t *enaddr; 343 { 344 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 345 bus_space_tag_t iot = sc->sc_iot; 346 bus_space_handle_t ioh = sc->sc_ioh; 347 u_int16_t i; 348 u_int8_t myla[ETHER_ADDR_LEN]; 349 350 callout_init(&sc->sc_mii_callout); 351 callout_init(&sc->sc_mbuf_callout); 352 353 sc->ep_chipset = chipset; 354 355 /* 356 * We could have been groveling around in other register 357 * windows in the front-end; make sure we're in window 0 358 * to read the EEPROM. 359 */ 360 GO_WINDOW(0); 361 362 if (enaddr == NULL) { 363 /* 364 * Read the station address from the eeprom. 365 */ 366 for (i = 0; i < ETHER_ADDR_LEN / 2; i++) { 367 u_int16_t x = ep_read_eeprom(sc, i); 368 myla[(i << 1)] = x >> 8; 369 myla[(i << 1) + 1] = x; 370 } 371 enaddr = myla; 372 } 373 374 /* 375 * Vortex-based (3c59x pci,eisa) and Boomerang (3c900) cards 376 * allow FDDI-sized (4500) byte packets. Commands only take an 377 * 11-bit parameter, and 11 bits isn't enough to hold a full-size 378 * packet length. 379 * Commands to these cards implicitly upshift a packet size 380 * or threshold by 2 bits. 381 * To detect cards with large-packet support, we probe by setting 382 * the transmit threshold register, then change windows and 383 * read back the threshold register directly, and see if the 384 * threshold value was shifted or not. 385 */ 386 bus_space_write_2(iot, ioh, ELINK_COMMAND, 387 SET_TX_AVAIL_THRESH | ELINK_LARGEWIN_PROBE); 388 GO_WINDOW(5); 389 i = bus_space_read_2(iot, ioh, ELINK_W5_TX_AVAIL_THRESH); 390 GO_WINDOW(1); 391 switch (i) { 392 case ELINK_LARGEWIN_PROBE: 393 case (ELINK_LARGEWIN_PROBE & ELINK_LARGEWIN_MASK): 394 sc->ep_pktlenshift = 0; 395 break; 396 397 case (ELINK_LARGEWIN_PROBE << 2): 398 sc->ep_pktlenshift = 2; 399 break; 400 401 default: 402 printf("%s: wrote 0x%x to TX_AVAIL_THRESH, read back 0x%x. " 403 "Interface disabled\n", 404 sc->sc_dev.dv_xname, ELINK_LARGEWIN_PROBE, (int) i); 405 return (1); 406 } 407 408 /* 409 * Ensure Tx-available interrupts are enabled for 410 * start the interface. 411 * XXX should be in epinit()? 412 */ 413 bus_space_write_2(iot, ioh, ELINK_COMMAND, 414 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 415 416 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 417 ifp->if_softc = sc; 418 ifp->if_start = epstart; 419 ifp->if_ioctl = epioctl; 420 ifp->if_watchdog = epwatchdog; 421 ifp->if_init = epinit; 422 ifp->if_stop = epstop; 423 ifp->if_flags = 424 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 425 IFQ_SET_READY(&ifp->if_snd); 426 427 if_attach(ifp); 428 ether_ifattach(ifp, enaddr); 429 430 /* 431 * Finish configuration: 432 * determine chipset if the front-end couldn't do so, 433 * show board details, set media. 434 */ 435 436 /* 437 * Print RAM size. We also print the Ethernet address in here. 438 * It's extracted from the ifp, so we have to make sure it's 439 * been attached first. 440 */ 441 ep_internalconfig(sc); 442 GO_WINDOW(0); 443 444 /* 445 * Display some additional information, if pertinent. 446 */ 447 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 448 printf("%s: RoadRunner FIFO buffer enabled\n", 449 sc->sc_dev.dv_xname); 450 451 /* 452 * Initialize our media structures and MII info. We'll 453 * probe the MII if we discover that we have one. 454 */ 455 sc->sc_mii.mii_ifp = ifp; 456 sc->sc_mii.mii_readreg = ep_mii_readreg; 457 sc->sc_mii.mii_writereg = ep_mii_writereg; 458 sc->sc_mii.mii_statchg = ep_statchg; 459 ifmedia_init(&sc->sc_mii.mii_media, 0, ep_media_change, 460 ep_media_status); 461 462 /* 463 * All CORKSCREW chips have MII. 464 */ 465 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) 466 sc->ep_flags |= ELINK_FLAGS_MII; 467 468 /* 469 * Now, determine which media we have. 470 */ 471 switch (sc->ep_chipset) { 472 case ELINK_CHIPSET_ROADRUNNER: 473 if (sc->ep_flags & ELINK_FLAGS_MII) { 474 ep_roadrunner_mii_enable(sc); 475 GO_WINDOW(0); 476 } 477 /* FALLTHROUGH */ 478 479 case ELINK_CHIPSET_CORKSCREW: 480 case ELINK_CHIPSET_BOOMERANG: 481 /* 482 * If the device has MII, probe it. We won't be using 483 * any `native' media in this case, only PHYs. If 484 * we don't, just treat the Boomerang like the Vortex. 485 */ 486 if (sc->ep_flags & ELINK_FLAGS_MII) { 487 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 488 MII_PHY_ANY, MII_OFFSET_ANY, 0); 489 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 490 ifmedia_add(&sc->sc_mii.mii_media, 491 IFM_ETHER|IFM_NONE, 0, NULL); 492 ifmedia_set(&sc->sc_mii.mii_media, 493 IFM_ETHER|IFM_NONE); 494 } else { 495 ifmedia_set(&sc->sc_mii.mii_media, 496 IFM_ETHER|IFM_AUTO); 497 } 498 break; 499 } 500 /* FALLTHROUGH */ 501 502 case ELINK_CHIPSET_VORTEX: 503 ep_vortex_probemedia(sc); 504 break; 505 506 default: 507 ep_509_probemedia(sc); 508 break; 509 } 510 511 GO_WINDOW(1); /* Window 1 is operating window */ 512 513 #if NRND > 0 514 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 515 RND_TYPE_NET, 0); 516 #endif 517 518 sc->tx_start_thresh = 20; /* probably a good starting point. */ 519 520 /* Establish callback to reset card when we reboot. */ 521 sc->sd_hook = shutdownhook_establish(epshutdown, sc); 522 523 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 524 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 525 526 /* The attach is successful. */ 527 sc->sc_flags |= ELINK_FLAGS_ATTACHED; 528 return (0); 529 } 530 531 532 /* 533 * Show interface-model-independent info from window 3 534 * internal-configuration register. 535 */ 536 void 537 ep_internalconfig(sc) 538 struct ep_softc *sc; 539 { 540 bus_space_tag_t iot = sc->sc_iot; 541 bus_space_handle_t ioh = sc->sc_ioh; 542 543 u_int config0; 544 u_int config1; 545 546 int ram_size, ram_width, ram_speed, rom_size, ram_split; 547 /* 548 * NVRAM buffer Rx:Tx config names for busmastering cards 549 * (Demon, Vortex, and later). 550 */ 551 const char *onboard_ram_config[] = { 552 "5:3", "3:1", "1:1", "3:5" }; 553 554 GO_WINDOW(3); 555 config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 556 config1 = (u_int)bus_space_read_2(iot, ioh, 557 ELINK_W3_INTERNAL_CONFIG + 2); 558 GO_WINDOW(0); 559 560 ram_size = (config0 & CONFIG_RAMSIZE) >> CONFIG_RAMSIZE_SHIFT; 561 ram_width = (config0 & CONFIG_RAMWIDTH) >> CONFIG_RAMWIDTH_SHIFT; 562 ram_speed = (config0 & CONFIG_RAMSPEED) >> CONFIG_RAMSPEED_SHIFT; 563 rom_size = (config0 & CONFIG_ROMSIZE) >> CONFIG_ROMSIZE_SHIFT; 564 565 ram_split = (config1 & CONFIG_RAMSPLIT) >> CONFIG_RAMSPLIT_SHIFT; 566 567 printf("%s: address %s, %dKB %s-wide FIFO, %s Rx:Tx split\n", 568 sc->sc_dev.dv_xname, 569 ether_sprintf(LLADDR(sc->sc_ethercom.ec_if.if_sadl)), 570 8 << ram_size, 571 (ram_width) ? "word" : "byte", 572 onboard_ram_config[ram_split]); 573 } 574 575 576 /* 577 * Find supported media on 3c509-generation hardware that doesn't have 578 * a "reset_options" register in window 3. 579 * Use the config_cntrl register in window 0 instead. 580 * Used on original, 10Mbit ISA (3c509), 3c509B, and pre-Demon EISA cards 581 * that implement CONFIG_CTRL. We don't have a good way to set the 582 * default active medium; punt to ifconfig instead. 583 */ 584 void 585 ep_509_probemedia(sc) 586 struct ep_softc *sc; 587 { 588 bus_space_tag_t iot = sc->sc_iot; 589 bus_space_handle_t ioh = sc->sc_ioh; 590 struct ifmedia *ifm = &sc->sc_mii.mii_media; 591 u_int16_t ep_w0_config, port; 592 const struct ep_media *epm; 593 const char *sep = "", *defmedianame = NULL; 594 int defmedia = 0; 595 596 GO_WINDOW(0); 597 ep_w0_config = bus_space_read_2(iot, ioh, ELINK_W0_CONFIG_CTRL); 598 599 printf("%s: ", sc->sc_dev.dv_xname); 600 601 /* Sanity check that there are any media! */ 602 if ((ep_w0_config & ELINK_W0_CC_MEDIAMASK) == 0) { 603 printf("no media present!\n"); 604 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 605 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 606 return; 607 } 608 609 /* 610 * Get the default media from the EEPROM. 611 */ 612 port = ep_read_eeprom(sc, EEPROM_ADDR_CFG) >> 14; 613 614 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 615 616 for (epm = ep_509_media; epm->epm_name != NULL; epm++) { 617 if (ep_w0_config & epm->epm_mpbit) { 618 /* 619 * This simple test works because 509 chipsets 620 * don't do full-duplex. 621 */ 622 if (epm->epm_epmedia == port || defmedia == 0) { 623 defmedia = epm->epm_ifmedia; 624 defmedianame = epm->epm_name; 625 } 626 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 627 NULL); 628 PRINT(epm->epm_name); 629 } 630 } 631 632 #undef PRINT 633 634 #ifdef DIAGNOSTIC 635 if (defmedia == 0) 636 panic("ep_509_probemedia: impossible"); 637 #endif 638 639 printf(" (default %s)\n", defmedianame); 640 ifmedia_set(ifm, defmedia); 641 } 642 643 /* 644 * Find media present on large-packet-capable elink3 devices. 645 * Show onboard configuration of large-packet-capable elink3 devices 646 * (Demon, Vortex, Boomerang), which do not implement CONFIG_CTRL in window 0. 647 * Use media and card-version info in window 3 instead. 648 */ 649 void 650 ep_vortex_probemedia(sc) 651 struct ep_softc *sc; 652 { 653 bus_space_tag_t iot = sc->sc_iot; 654 bus_space_handle_t ioh = sc->sc_ioh; 655 struct ifmedia *ifm = &sc->sc_mii.mii_media; 656 const struct ep_media *epm; 657 u_int config1; 658 int reset_options; 659 int default_media; /* 3-bit encoding of default (EEPROM) media */ 660 int defmedia = 0; 661 const char *sep = "", *defmedianame = NULL; 662 663 GO_WINDOW(3); 664 config1 = (u_int)bus_space_read_2(iot, ioh, 665 ELINK_W3_INTERNAL_CONFIG + 2); 666 reset_options = (int)bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 667 GO_WINDOW(0); 668 669 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 670 671 printf("%s: ", sc->sc_dev.dv_xname); 672 673 /* Sanity check that there are any media! */ 674 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 675 printf("no media present!\n"); 676 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 677 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 678 return; 679 } 680 681 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 682 683 for (epm = ep_vortex_media; epm->epm_name != NULL; epm++) { 684 if (reset_options & epm->epm_mpbit) { 685 /* 686 * Default media is a little more complicated 687 * on the Vortex. We support full-duplex which 688 * uses the same reset options bit. 689 * 690 * XXX Check EEPROM for default to FDX? 691 */ 692 if (epm->epm_epmedia == default_media) { 693 if ((epm->epm_ifmedia & IFM_FDX) == 0) { 694 defmedia = epm->epm_ifmedia; 695 defmedianame = epm->epm_name; 696 } 697 } else if (defmedia == 0) { 698 defmedia = epm->epm_ifmedia; 699 defmedianame = epm->epm_name; 700 } 701 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 702 NULL); 703 PRINT(epm->epm_name); 704 } 705 } 706 707 #undef PRINT 708 709 #ifdef DIAGNOSTIC 710 if (defmedia == 0) 711 panic("ep_vortex_probemedia: impossible"); 712 #endif 713 714 printf(" (default %s)\n", defmedianame); 715 ifmedia_set(ifm, defmedia); 716 } 717 718 /* 719 * One second timer, used to tick the MII. 720 */ 721 void 722 ep_tick(arg) 723 void *arg; 724 { 725 struct ep_softc *sc = arg; 726 int s; 727 728 #ifdef DIAGNOSTIC 729 if ((sc->ep_flags & ELINK_FLAGS_MII) == 0) 730 panic("ep_tick"); 731 #endif 732 733 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 734 return; 735 736 s = splnet(); 737 mii_tick(&sc->sc_mii); 738 splx(s); 739 740 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 741 } 742 743 /* 744 * Bring device up. 745 * 746 * The order in here seems important. Otherwise we may not receive 747 * interrupts. ?! 748 */ 749 int 750 epinit(ifp) 751 struct ifnet *ifp; 752 { 753 struct ep_softc *sc = ifp->if_softc; 754 bus_space_tag_t iot = sc->sc_iot; 755 bus_space_handle_t ioh = sc->sc_ioh; 756 int i, error; 757 758 if (!sc->enabled && (error = epenable(sc)) != 0) 759 return (error); 760 761 /* Make sure any pending reset has completed before touching board */ 762 ep_finish_reset(iot, ioh); 763 764 /* 765 * Cancel any pending I/O. 766 */ 767 epstop(ifp, 0); 768 769 if (sc->bustype != ELINK_BUS_PCI && sc->bustype != ELINK_BUS_EISA 770 && sc->bustype != ELINK_BUS_MCA) { 771 GO_WINDOW(0); 772 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 0); 773 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 774 ENABLE_DRQ_IRQ); 775 } 776 777 if (sc->bustype == ELINK_BUS_PCMCIA) { 778 bus_space_write_2(iot, ioh, ELINK_W0_RESOURCE_CFG, 0x3f00); 779 } 780 781 GO_WINDOW(2); 782 for (i = 0; i < 6; i++) /* Reload the ether_addr. */ 783 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 784 LLADDR(ifp->if_sadl)[i]); 785 786 /* 787 * Reset the station-address receive filter. 788 * A bug workaround for busmastering (Vortex, Demon) cards. 789 */ 790 for (i = 0; i < 6; i++) 791 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 792 793 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 794 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 795 796 GO_WINDOW(1); /* Window 1 is operating window */ 797 for (i = 0; i < 31; i++) 798 bus_space_read_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS)); 799 800 /* Set threshold for Tx-space available interrupt. */ 801 bus_space_write_2(iot, ioh, ELINK_COMMAND, 802 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 803 804 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 805 /* 806 * Enable options in the PCMCIA LAN COR register, via 807 * RoadRunner Window 1. 808 * 809 * XXX MAGIC CONSTANTS! 810 */ 811 u_int16_t cor; 812 813 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, (1 << 11)); 814 815 cor = bus_space_read_2(iot, ioh, 0) & ~0x30; 816 if (sc->ep_flags & ELINK_FLAGS_USESHAREDMEM) 817 cor |= 0x10; 818 if (sc->ep_flags & ELINK_FLAGS_FORCENOWAIT) 819 cor |= 0x20; 820 bus_space_write_2(iot, ioh, 0, cor); 821 822 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 823 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 824 825 if (sc->ep_flags & ELINK_FLAGS_MII) { 826 ep_roadrunner_mii_enable(sc); 827 GO_WINDOW(1); 828 } 829 } 830 831 /* Enable interrupts. */ 832 bus_space_write_2(iot, ioh, ELINK_COMMAND, 833 SET_RD_0_MASK | S_CARD_FAILURE | S_RX_COMPLETE | S_TX_COMPLETE | 834 S_TX_AVAIL); 835 bus_space_write_2(iot, ioh, ELINK_COMMAND, 836 SET_INTR_MASK | S_CARD_FAILURE | S_RX_COMPLETE | S_TX_COMPLETE | 837 S_TX_AVAIL); 838 839 /* 840 * Attempt to get rid of any stray interrupts that occured during 841 * configuration. On the i386 this isn't possible because one may 842 * already be queued. However, a single stray interrupt is 843 * unimportant. 844 */ 845 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 846 847 epsetfilter(sc); 848 epsetmedia(sc); 849 850 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 851 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 852 853 epmbuffill(sc); 854 855 /* Interface is now `running', with no output active. */ 856 ifp->if_flags |= IFF_RUNNING; 857 ifp->if_flags &= ~IFF_OACTIVE; 858 859 if (sc->ep_flags & ELINK_FLAGS_MII) { 860 /* Start the one second clock. */ 861 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 862 } 863 864 /* Attempt to start output, if any. */ 865 epstart(ifp); 866 867 return (0); 868 } 869 870 871 /* 872 * Set multicast receive filter. 873 * elink3 hardware has no selective multicast filter in hardware. 874 * Enable reception of all multicasts and filter in software. 875 */ 876 void 877 epsetfilter(sc) 878 struct ep_softc *sc; 879 { 880 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 881 882 GO_WINDOW(1); /* Window 1 is operating window */ 883 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 884 SET_RX_FILTER | FIL_INDIVIDUAL | FIL_BRDCST | 885 ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0) | 886 ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0)); 887 } 888 889 int 890 ep_media_change(ifp) 891 struct ifnet *ifp; 892 { 893 struct ep_softc *sc = ifp->if_softc; 894 895 if (sc->enabled && (ifp->if_flags & IFF_UP) != 0) 896 epreset(sc); 897 898 return (0); 899 } 900 901 /* 902 * Reset and enable the MII on the RoadRunner. 903 */ 904 void 905 ep_roadrunner_mii_enable(sc) 906 struct ep_softc *sc; 907 { 908 bus_space_tag_t iot = sc->sc_iot; 909 bus_space_handle_t ioh = sc->sc_ioh; 910 911 GO_WINDOW(3); 912 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 913 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 914 delay(1000); 915 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 916 ELINK_PCI_100BASE_MII|ELINK_RUNNER_MII_RESET| 917 ELINK_RUNNER_ENABLE_MII); 918 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 919 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 920 delay(1000); 921 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 922 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 923 } 924 925 /* 926 * Set the card to use the specified media. 927 */ 928 void 929 epsetmedia(sc) 930 struct ep_softc *sc; 931 { 932 bus_space_tag_t iot = sc->sc_iot; 933 bus_space_handle_t ioh = sc->sc_ioh; 934 935 /* Turn everything off. First turn off linkbeat and UTP. */ 936 GO_WINDOW(4); 937 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0x0); 938 939 /* Turn off coax */ 940 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 941 delay(1000); 942 943 /* 944 * If the device has MII, select it, and then tell the 945 * PHY which media to use. 946 */ 947 if (sc->ep_flags & ELINK_FLAGS_MII) { 948 int config0, config1; 949 950 GO_WINDOW(3); 951 952 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 953 int resopt; 954 955 resopt = bus_space_read_2(iot, ioh, 956 ELINK_W3_RESET_OPTIONS); 957 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 958 resopt | ELINK_RUNNER_ENABLE_MII); 959 } 960 961 config0 = (u_int)bus_space_read_2(iot, ioh, 962 ELINK_W3_INTERNAL_CONFIG); 963 config1 = (u_int)bus_space_read_2(iot, ioh, 964 ELINK_W3_INTERNAL_CONFIG + 2); 965 966 config1 = config1 & ~CONFIG_MEDIAMASK; 967 config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT); 968 969 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 970 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 971 config1); 972 GO_WINDOW(1); /* back to operating window */ 973 974 mii_mediachg(&sc->sc_mii); 975 return; 976 } 977 978 /* 979 * Now turn on the selected media/transceiver. 980 */ 981 GO_WINDOW(4); 982 switch (IFM_SUBTYPE(sc->sc_mii.mii_media.ifm_cur->ifm_media)) { 983 case IFM_10_T: 984 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 985 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 986 break; 987 988 case IFM_10_2: 989 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 990 DELAY(1000); /* 50ms not enmough? */ 991 break; 992 993 case IFM_100_TX: 994 case IFM_100_FX: 995 case IFM_100_T4: /* XXX check documentation */ 996 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 997 LINKBEAT_ENABLE); 998 DELAY(1000); /* not strictly necessary? */ 999 break; 1000 1001 case IFM_10_5: 1002 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 1003 SQE_ENABLE); 1004 DELAY(1000); /* not strictly necessary? */ 1005 break; 1006 1007 case IFM_MANUAL: 1008 /* 1009 * Nothing to do here; we are actually enabling the 1010 * external PHY on the MII port. 1011 */ 1012 break; 1013 1014 case IFM_NONE: 1015 printf("%s: interface disabled\n", sc->sc_dev.dv_xname); 1016 return; 1017 1018 default: 1019 panic("epsetmedia: impossible"); 1020 } 1021 1022 /* 1023 * Tell the chip which port to use. 1024 */ 1025 switch (sc->ep_chipset) { 1026 case ELINK_CHIPSET_VORTEX: 1027 case ELINK_CHIPSET_BOOMERANG: 1028 { 1029 int mctl, config0, config1; 1030 1031 GO_WINDOW(3); 1032 config0 = (u_int)bus_space_read_2(iot, ioh, 1033 ELINK_W3_INTERNAL_CONFIG); 1034 config1 = (u_int)bus_space_read_2(iot, ioh, 1035 ELINK_W3_INTERNAL_CONFIG + 2); 1036 1037 config1 = config1 & ~CONFIG_MEDIAMASK; 1038 config1 |= (sc->sc_mii.mii_media.ifm_cur->ifm_data << 1039 CONFIG_MEDIAMASK_SHIFT); 1040 1041 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 1042 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 1043 config1); 1044 1045 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1046 if (sc->sc_mii.mii_media.ifm_cur->ifm_media & IFM_FDX) 1047 mctl |= MAC_CONTROL_FDX; 1048 else 1049 mctl &= ~MAC_CONTROL_FDX; 1050 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1051 break; 1052 } 1053 default: 1054 { 1055 int w0_addr_cfg; 1056 1057 GO_WINDOW(0); 1058 w0_addr_cfg = bus_space_read_2(iot, ioh, ELINK_W0_ADDRESS_CFG); 1059 w0_addr_cfg &= 0x3fff; 1060 bus_space_write_2(iot, ioh, ELINK_W0_ADDRESS_CFG, w0_addr_cfg | 1061 (sc->sc_mii.mii_media.ifm_cur->ifm_data << 14)); 1062 DELAY(1000); 1063 break; 1064 } 1065 } 1066 1067 GO_WINDOW(1); /* Window 1 is operating window */ 1068 } 1069 1070 /* 1071 * Get currently-selected media from card. 1072 * (if_media callback, may be called before interface is brought up). 1073 */ 1074 void 1075 ep_media_status(ifp, req) 1076 struct ifnet *ifp; 1077 struct ifmediareq *req; 1078 { 1079 struct ep_softc *sc = ifp->if_softc; 1080 bus_space_tag_t iot = sc->sc_iot; 1081 bus_space_handle_t ioh = sc->sc_ioh; 1082 1083 if (sc->enabled == 0) { 1084 req->ifm_active = IFM_ETHER|IFM_NONE; 1085 req->ifm_status = 0; 1086 return; 1087 } 1088 1089 /* 1090 * If we have MII, go ask the PHY what's going on. 1091 */ 1092 if (sc->ep_flags & ELINK_FLAGS_MII) { 1093 mii_pollstat(&sc->sc_mii); 1094 req->ifm_active = sc->sc_mii.mii_media_active; 1095 req->ifm_status = sc->sc_mii.mii_media_status; 1096 return; 1097 } 1098 1099 /* 1100 * Ok, at this point we claim that our active media is 1101 * the currently selected media. We'll update our status 1102 * if our chipset allows us to detect link. 1103 */ 1104 req->ifm_active = sc->sc_mii.mii_media.ifm_cur->ifm_media; 1105 req->ifm_status = 0; 1106 1107 switch (sc->ep_chipset) { 1108 case ELINK_CHIPSET_VORTEX: 1109 case ELINK_CHIPSET_BOOMERANG: 1110 GO_WINDOW(4); 1111 req->ifm_status = IFM_AVALID; 1112 if (bus_space_read_2(iot, ioh, ELINK_W4_MEDIA_TYPE) & 1113 LINKBEAT_DETECT) 1114 req->ifm_status |= IFM_ACTIVE; 1115 GO_WINDOW(1); /* back to operating window */ 1116 break; 1117 } 1118 } 1119 1120 1121 1122 /* 1123 * Start outputting on the interface. 1124 * Always called as splnet(). 1125 */ 1126 void 1127 epstart(ifp) 1128 struct ifnet *ifp; 1129 { 1130 struct ep_softc *sc = ifp->if_softc; 1131 bus_space_tag_t iot = sc->sc_iot; 1132 bus_space_handle_t ioh = sc->sc_ioh; 1133 struct mbuf *m, *m0; 1134 int sh, len, pad; 1135 bus_addr_t txreg; 1136 1137 /* Don't transmit if interface is busy or not running */ 1138 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1139 return; 1140 1141 startagain: 1142 /* Sneak a peek at the next packet */ 1143 IFQ_POLL(&ifp->if_snd, m0); 1144 if (m0 == 0) 1145 return; 1146 1147 /* We need to use m->m_pkthdr.len, so require the header */ 1148 if ((m0->m_flags & M_PKTHDR) == 0) 1149 panic("epstart: no header mbuf"); 1150 len = m0->m_pkthdr.len; 1151 1152 pad = (4 - len) & 3; 1153 1154 /* 1155 * The 3c509 automatically pads short packets to minimum ethernet 1156 * length, but we drop packets that are too large. Perhaps we should 1157 * truncate them instead? 1158 */ 1159 if (len + pad > ETHER_MAX_LEN) { 1160 /* packet is obviously too large: toss it */ 1161 ++ifp->if_oerrors; 1162 IFQ_DEQUEUE(&ifp->if_snd, m0); 1163 m_freem(m0); 1164 goto readcheck; 1165 } 1166 1167 if (bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_FREE_TX)) < 1168 len + pad + 4) { 1169 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1170 SET_TX_AVAIL_THRESH | 1171 ((len + pad + 4) >> sc->ep_pktlenshift)); 1172 /* not enough room in FIFO */ 1173 ifp->if_flags |= IFF_OACTIVE; 1174 return; 1175 } else { 1176 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1177 SET_TX_AVAIL_THRESH | ELINK_THRESH_DISABLE); 1178 } 1179 1180 IFQ_DEQUEUE(&ifp->if_snd, m0); 1181 if (m0 == 0) /* not really needed */ 1182 return; 1183 1184 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_TX_START_THRESH | 1185 ((len / 4 + sc->tx_start_thresh) /* >> sc->ep_pktlenshift*/)); 1186 1187 #if NBPFILTER > 0 1188 if (ifp->if_bpf) 1189 bpf_mtap(ifp->if_bpf, m0); 1190 #endif 1191 1192 /* 1193 * Do the output at a high interrupt priority level so that an 1194 * interrupt from another device won't cause a FIFO underrun. 1195 * We choose splsched() since that blocks essentially everything 1196 * except for interrupts from serial devices (which typically 1197 * lose data if their interrupt isn't serviced fast enough). 1198 * 1199 * XXX THIS CAN CAUSE CLOCK DRIFT! 1200 */ 1201 sh = splsched(); 1202 1203 txreg = ep_w1_reg(sc, ELINK_W1_TX_PIO_WR_1); 1204 1205 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1206 /* 1207 * Prime the FIFO buffer counter (number of 16-bit 1208 * words about to be written to the FIFO). 1209 * 1210 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1211 * COUNTER IS NON-ZERO! 1212 */ 1213 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 1214 (len + pad) >> 1); 1215 } 1216 1217 bus_space_write_2(iot, ioh, txreg, len); 1218 bus_space_write_2(iot, ioh, txreg, 0xffff); /* Second is meaningless */ 1219 if (ELINK_IS_BUS_32(sc->bustype)) { 1220 for (m = m0; m;) { 1221 if (m->m_len > 3) { 1222 /* align our reads from core */ 1223 if (mtod(m, u_long) & 3) { 1224 u_long count = 1225 4 - (mtod(m, u_long) & 3); 1226 bus_space_write_multi_1(iot, ioh, 1227 txreg, mtod(m, u_int8_t *), count); 1228 m->m_data = 1229 (void *)(mtod(m, u_long) + count); 1230 m->m_len -= count; 1231 } 1232 bus_space_write_multi_stream_4(iot, ioh, 1233 txreg, mtod(m, u_int32_t *), m->m_len >> 2); 1234 m->m_data = (void *)(mtod(m, u_long) + 1235 (u_long)(m->m_len & ~3)); 1236 m->m_len -= m->m_len & ~3; 1237 } 1238 if (m->m_len) { 1239 bus_space_write_multi_1(iot, ioh, 1240 txreg, mtod(m, u_int8_t *), m->m_len); 1241 } 1242 MFREE(m, m0); 1243 m = m0; 1244 } 1245 } else { 1246 for (m = m0; m;) { 1247 if (m->m_len > 1) { 1248 if (mtod(m, u_long) & 1) { 1249 bus_space_write_1(iot, ioh, 1250 txreg, *(mtod(m, u_int8_t *))); 1251 m->m_data = 1252 (void *)(mtod(m, u_long) + 1); 1253 m->m_len -= 1; 1254 } 1255 bus_space_write_multi_stream_2(iot, ioh, 1256 txreg, mtod(m, u_int16_t *), 1257 m->m_len >> 1); 1258 } 1259 if (m->m_len & 1) { 1260 bus_space_write_1(iot, ioh, txreg, 1261 *(mtod(m, u_int8_t *) + m->m_len - 1)); 1262 } 1263 MFREE(m, m0); 1264 m = m0; 1265 } 1266 } 1267 while (pad--) 1268 bus_space_write_1(iot, ioh, txreg, 0); 1269 1270 splx(sh); 1271 1272 ++ifp->if_opackets; 1273 1274 readcheck: 1275 if ((bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)) & 1276 ERR_INCOMPLETE) == 0) { 1277 /* We received a complete packet. */ 1278 u_int16_t status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1279 1280 if ((status & S_INTR_LATCH) == 0) { 1281 /* 1282 * No interrupt, read the packet and continue 1283 * Is this supposed to happen? Is my motherboard 1284 * completely busted? 1285 */ 1286 epread(sc); 1287 } else { 1288 /* Got an interrupt, return so that it gets serviced. */ 1289 return; 1290 } 1291 } else { 1292 /* Check if we are stuck and reset [see XXX comment] */ 1293 if (epstatus(sc)) { 1294 if (ifp->if_flags & IFF_DEBUG) 1295 printf("%s: adapter reset\n", 1296 sc->sc_dev.dv_xname); 1297 epreset(sc); 1298 } 1299 } 1300 1301 goto startagain; 1302 } 1303 1304 1305 /* 1306 * XXX: The 3c509 card can get in a mode where both the fifo status bit 1307 * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set 1308 * We detect this situation and we reset the adapter. 1309 * It happens at times when there is a lot of broadcast traffic 1310 * on the cable (once in a blue moon). 1311 */ 1312 static int 1313 epstatus(sc) 1314 struct ep_softc *sc; 1315 { 1316 bus_space_tag_t iot = sc->sc_iot; 1317 bus_space_handle_t ioh = sc->sc_ioh; 1318 u_int16_t fifost; 1319 1320 /* 1321 * Check the FIFO status and act accordingly 1322 */ 1323 GO_WINDOW(4); 1324 fifost = bus_space_read_2(iot, ioh, ELINK_W4_FIFO_DIAG); 1325 GO_WINDOW(1); 1326 1327 if (fifost & FIFOS_RX_UNDERRUN) { 1328 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1329 printf("%s: RX underrun\n", sc->sc_dev.dv_xname); 1330 epreset(sc); 1331 return 0; 1332 } 1333 1334 if (fifost & FIFOS_RX_STATUS_OVERRUN) { 1335 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1336 printf("%s: RX Status overrun\n", sc->sc_dev.dv_xname); 1337 return 1; 1338 } 1339 1340 if (fifost & FIFOS_RX_OVERRUN) { 1341 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1342 printf("%s: RX overrun\n", sc->sc_dev.dv_xname); 1343 return 1; 1344 } 1345 1346 if (fifost & FIFOS_TX_OVERRUN) { 1347 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1348 printf("%s: TX overrun\n", sc->sc_dev.dv_xname); 1349 epreset(sc); 1350 return 0; 1351 } 1352 1353 return 0; 1354 } 1355 1356 1357 static void 1358 eptxstat(sc) 1359 struct ep_softc *sc; 1360 { 1361 bus_space_tag_t iot = sc->sc_iot; 1362 bus_space_handle_t ioh = sc->sc_ioh; 1363 int i; 1364 1365 /* 1366 * We need to read+write TX_STATUS until we get a 0 status 1367 * in order to turn off the interrupt flag. 1368 */ 1369 while ((i = bus_space_read_1(iot, ioh, 1370 ep_w1_reg(sc, ELINK_W1_TX_STATUS))) & TXS_COMPLETE) { 1371 bus_space_write_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS), 1372 0x0); 1373 1374 if (i & TXS_JABBER) { 1375 ++sc->sc_ethercom.ec_if.if_oerrors; 1376 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1377 printf("%s: jabber (%x)\n", 1378 sc->sc_dev.dv_xname, i); 1379 epreset(sc); 1380 } else if (i & TXS_UNDERRUN) { 1381 ++sc->sc_ethercom.ec_if.if_oerrors; 1382 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1383 printf("%s: fifo underrun (%x) @%d\n", 1384 sc->sc_dev.dv_xname, i, 1385 sc->tx_start_thresh); 1386 if (sc->tx_succ_ok < 100) 1387 sc->tx_start_thresh = min(ETHER_MAX_LEN, 1388 sc->tx_start_thresh + 20); 1389 sc->tx_succ_ok = 0; 1390 epreset(sc); 1391 } else if (i & TXS_MAX_COLLISION) { 1392 ++sc->sc_ethercom.ec_if.if_collisions; 1393 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 1394 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1395 } else 1396 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 1397 } 1398 } 1399 1400 int 1401 epintr(arg) 1402 void *arg; 1403 { 1404 struct ep_softc *sc = arg; 1405 bus_space_tag_t iot = sc->sc_iot; 1406 bus_space_handle_t ioh = sc->sc_ioh; 1407 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1408 u_int16_t status; 1409 int ret = 0; 1410 1411 if (sc->enabled == 0 || 1412 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1413 return (0); 1414 1415 for (;;) { 1416 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1417 1418 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1419 1420 if ((status & (S_TX_COMPLETE | S_TX_AVAIL | 1421 S_RX_COMPLETE | S_CARD_FAILURE)) == 0) { 1422 if ((status & S_INTR_LATCH) == 0) { 1423 #if 0 1424 printf("%s: intr latch cleared %d\n", 1425 sc->sc_dev.dv_xname, status); 1426 #endif 1427 break; 1428 } 1429 } 1430 1431 ret = 1; 1432 1433 /* 1434 * Acknowledge any interrupts. It's important that we do this 1435 * first, since there would otherwise be a race condition. 1436 * Due to the i386 interrupt queueing, we may get spurious 1437 * interrupts occasionally. 1438 */ 1439 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1440 (status & (C_INTR_LATCH | 1441 C_CARD_FAILURE | 1442 C_TX_COMPLETE | 1443 C_TX_AVAIL | 1444 C_RX_COMPLETE | 1445 C_RX_EARLY | 1446 C_INT_RQD | 1447 C_UPD_STATS))); 1448 1449 #if 0 1450 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1451 1452 printf("%s: intr%s%s%s%s\n", sc->sc_dev.dv_xname, 1453 (status & S_RX_COMPLETE)?" RX_COMPLETE":"", 1454 (status & S_TX_COMPLETE)?" TX_COMPLETE":"", 1455 (status & S_TX_AVAIL)?" TX_AVAIL":"", 1456 (status & S_CARD_FAILURE)?" CARD_FAILURE":""); 1457 #endif 1458 1459 if (status & S_RX_COMPLETE) { 1460 epread(sc); 1461 } 1462 if (status & S_TX_AVAIL) { 1463 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1464 epstart(&sc->sc_ethercom.ec_if); 1465 } 1466 if (status & S_CARD_FAILURE) { 1467 printf("%s: adapter failure (%x)\n", 1468 sc->sc_dev.dv_xname, status); 1469 #if 1 1470 epinit(ifp); 1471 #else 1472 epreset(sc); 1473 #endif 1474 return (1); 1475 } 1476 if (status & S_TX_COMPLETE) { 1477 eptxstat(sc); 1478 epstart(ifp); 1479 } 1480 1481 #if NRND > 0 1482 if (status) 1483 rnd_add_uint32(&sc->rnd_source, status); 1484 #endif 1485 } 1486 1487 /* no more interrupts */ 1488 return (ret); 1489 } 1490 1491 void 1492 epread(sc) 1493 struct ep_softc *sc; 1494 { 1495 bus_space_tag_t iot = sc->sc_iot; 1496 bus_space_handle_t ioh = sc->sc_ioh; 1497 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1498 struct mbuf *m; 1499 int len; 1500 1501 len = bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1502 1503 again: 1504 if (ifp->if_flags & IFF_DEBUG) { 1505 int err = len & ERR_MASK; 1506 char *s = NULL; 1507 1508 if (len & ERR_INCOMPLETE) 1509 s = "incomplete packet"; 1510 else if (err == ERR_OVERRUN) 1511 s = "packet overrun"; 1512 else if (err == ERR_RUNT) 1513 s = "runt packet"; 1514 else if (err == ERR_ALIGNMENT) 1515 s = "bad alignment"; 1516 else if (err == ERR_CRC) 1517 s = "bad crc"; 1518 else if (err == ERR_OVERSIZE) 1519 s = "oversized packet"; 1520 else if (err == ERR_DRIBBLE) 1521 s = "dribble bits"; 1522 1523 if (s) 1524 printf("%s: %s\n", sc->sc_dev.dv_xname, s); 1525 } 1526 1527 if (len & ERR_INCOMPLETE) 1528 return; 1529 1530 if (len & ERR_RX) { 1531 ++ifp->if_ierrors; 1532 goto abort; 1533 } 1534 1535 len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */ 1536 1537 /* Pull packet off interface. */ 1538 m = epget(sc, len); 1539 if (m == 0) { 1540 ifp->if_ierrors++; 1541 goto abort; 1542 } 1543 1544 ++ifp->if_ipackets; 1545 1546 #if NBPFILTER > 0 1547 /* 1548 * Check if there's a BPF listener on this interface. 1549 * If so, hand off the raw packet to BPF. 1550 */ 1551 if (ifp->if_bpf) 1552 bpf_mtap(ifp->if_bpf, m); 1553 #endif 1554 1555 (*ifp->if_input)(ifp, m); 1556 1557 /* 1558 * In periods of high traffic we can actually receive enough 1559 * packets so that the fifo overrun bit will be set at this point, 1560 * even though we just read a packet. In this case we 1561 * are not going to receive any more interrupts. We check for 1562 * this condition and read again until the fifo is not full. 1563 * We could simplify this test by not using epstatus(), but 1564 * rechecking the RX_STATUS register directly. This test could 1565 * result in unnecessary looping in cases where there is a new 1566 * packet but the fifo is not full, but it will not fix the 1567 * stuck behavior. 1568 * 1569 * Even with this improvement, we still get packet overrun errors 1570 * which are hurting performance. Maybe when I get some more time 1571 * I'll modify epread() so that it can handle RX_EARLY interrupts. 1572 */ 1573 if (epstatus(sc)) { 1574 len = bus_space_read_2(iot, ioh, 1575 ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1576 /* Check if we are stuck and reset [see XXX comment] */ 1577 if (len & ERR_INCOMPLETE) { 1578 if (ifp->if_flags & IFF_DEBUG) 1579 printf("%s: adapter reset\n", 1580 sc->sc_dev.dv_xname); 1581 epreset(sc); 1582 return; 1583 } 1584 goto again; 1585 } 1586 1587 return; 1588 1589 abort: 1590 ep_discard_rxtop(iot, ioh); 1591 1592 } 1593 1594 struct mbuf * 1595 epget(sc, totlen) 1596 struct ep_softc *sc; 1597 int totlen; 1598 { 1599 bus_space_tag_t iot = sc->sc_iot; 1600 bus_space_handle_t ioh = sc->sc_ioh; 1601 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1602 struct mbuf *m; 1603 bus_addr_t rxreg; 1604 int len, remaining; 1605 int s; 1606 caddr_t newdata; 1607 u_long offset; 1608 1609 m = sc->mb[sc->next_mb]; 1610 sc->mb[sc->next_mb] = 0; 1611 if (m == 0) { 1612 MGETHDR(m, M_DONTWAIT, MT_DATA); 1613 if (m == 0) 1614 return 0; 1615 } else { 1616 /* If the queue is no longer full, refill. */ 1617 if (sc->last_mb == sc->next_mb) 1618 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1619 1620 /* Convert one of our saved mbuf's. */ 1621 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1622 m->m_data = m->m_pktdat; 1623 m->m_flags = M_PKTHDR; 1624 memset(&m->m_pkthdr, 0, sizeof(m->m_pkthdr)); 1625 } 1626 m->m_pkthdr.rcvif = ifp; 1627 m->m_pkthdr.len = totlen; 1628 len = MHLEN; 1629 1630 /* 1631 * Allocate big enough space to hold whole packet, to avoid 1632 * allocating new mbufs on splsched(). 1633 */ 1634 if (totlen + ALIGNBYTES > len) { 1635 if (totlen + ALIGNBYTES > MCLBYTES) { 1636 len = ALIGN(totlen + ALIGNBYTES); 1637 MEXTMALLOC(m, len, M_DONTWAIT); 1638 } else { 1639 len = MCLBYTES; 1640 MCLGET(m, M_DONTWAIT); 1641 } 1642 if ((m->m_flags & M_EXT) == 0) { 1643 m_free(m); 1644 return 0; 1645 } 1646 } 1647 1648 /* align the struct ip header */ 1649 newdata = (caddr_t) ALIGN(m->m_data + sizeof(struct ether_header)) 1650 - sizeof(struct ether_header); 1651 m->m_data = newdata; 1652 m->m_len = totlen; 1653 1654 rxreg = ep_w1_reg(sc, ELINK_W1_RX_PIO_RD_1); 1655 remaining = totlen; 1656 offset = mtod(m, u_long); 1657 1658 /* 1659 * We read the packet at a high interrupt priority level so that 1660 * an interrupt from another device won't cause the card's packet 1661 * buffer to overflow. We choose splsched() since that blocks 1662 * essentially everything except for interrupts from serial 1663 * devices (which typically lose data if their interrupt isn't 1664 * serviced fast enough). 1665 * 1666 * XXX THIS CAN CAUSE CLOCK DRIFT! 1667 */ 1668 s = splsched(); 1669 1670 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1671 /* 1672 * Prime the FIFO buffer counter (number of 16-bit 1673 * words about to be read from the FIFO). 1674 * 1675 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1676 * COUNTER IS NON-ZERO! 1677 */ 1678 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, totlen >> 1); 1679 } 1680 1681 if (ELINK_IS_BUS_32(sc->bustype)) { 1682 /* 1683 * Read bytes up to the point where we are aligned. 1684 * (We can align to 4 bytes, rather than ALIGNBYTES, 1685 * here because we're later reading 4-byte chunks.) 1686 */ 1687 if ((remaining > 3) && (offset & 3)) { 1688 int count = (4 - (offset & 3)); 1689 bus_space_read_multi_1(iot, ioh, 1690 rxreg, (u_int8_t *) offset, count); 1691 offset += count; 1692 remaining -= count; 1693 } 1694 if (remaining > 3) { 1695 bus_space_read_multi_stream_4(iot, ioh, 1696 rxreg, (u_int32_t *) offset, 1697 remaining >> 2); 1698 offset += remaining & ~3; 1699 remaining &= 3; 1700 } 1701 if (remaining) { 1702 bus_space_read_multi_1(iot, ioh, 1703 rxreg, (u_int8_t *) offset, remaining); 1704 } 1705 } else { 1706 if ((remaining > 1) && (offset & 1)) { 1707 bus_space_read_multi_1(iot, ioh, 1708 rxreg, (u_int8_t *) offset, 1); 1709 remaining -= 1; 1710 offset += 1; 1711 } 1712 if (remaining > 1) { 1713 bus_space_read_multi_stream_2(iot, ioh, 1714 rxreg, (u_int16_t *) offset, 1715 remaining >> 1); 1716 offset += remaining & ~1; 1717 } 1718 if (remaining & 1) { 1719 bus_space_read_multi_1(iot, ioh, 1720 rxreg, (u_int8_t *) offset, remaining & 1); 1721 } 1722 } 1723 1724 ep_discard_rxtop(iot, ioh); 1725 1726 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 1727 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1728 splx(s); 1729 1730 return (m); 1731 } 1732 1733 int 1734 epioctl(ifp, cmd, data) 1735 struct ifnet *ifp; 1736 u_long cmd; 1737 caddr_t data; 1738 { 1739 struct ep_softc *sc = ifp->if_softc; 1740 struct ifreq *ifr = (struct ifreq *)data; 1741 int s, error = 0; 1742 1743 s = splnet(); 1744 1745 switch (cmd) { 1746 1747 case SIOCSIFMEDIA: 1748 case SIOCGIFMEDIA: 1749 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 1750 break; 1751 1752 case SIOCADDMULTI: 1753 case SIOCDELMULTI: 1754 if (sc->enabled == 0) { 1755 error = EIO; 1756 break; 1757 } 1758 1759 default: 1760 error = ether_ioctl(ifp, cmd, data); 1761 1762 if (error == ENETRESET) { 1763 /* 1764 * Multicast list has changed; set the hardware filter 1765 * accordingly. 1766 */ 1767 epreset(sc); 1768 error = 0; 1769 } 1770 break; 1771 } 1772 1773 splx(s); 1774 return (error); 1775 } 1776 1777 void 1778 epreset(sc) 1779 struct ep_softc *sc; 1780 { 1781 int s; 1782 1783 s = splnet(); 1784 epinit(&sc->sc_ethercom.ec_if); 1785 splx(s); 1786 } 1787 1788 void 1789 epwatchdog(ifp) 1790 struct ifnet *ifp; 1791 { 1792 struct ep_softc *sc = ifp->if_softc; 1793 1794 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1795 ++sc->sc_ethercom.ec_if.if_oerrors; 1796 1797 epreset(sc); 1798 } 1799 1800 void 1801 epstop(ifp, disable) 1802 struct ifnet *ifp; 1803 int disable; 1804 { 1805 struct ep_softc *sc = ifp->if_softc; 1806 bus_space_tag_t iot = sc->sc_iot; 1807 bus_space_handle_t ioh = sc->sc_ioh; 1808 1809 if (sc->ep_flags & ELINK_FLAGS_MII) { 1810 /* Stop the one second clock. */ 1811 callout_stop(&sc->sc_mbuf_callout); 1812 1813 /* Down the MII. */ 1814 mii_down(&sc->sc_mii); 1815 } 1816 1817 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 1818 /* 1819 * Clear the FIFO buffer count, thus halting 1820 * any currently-running transactions. 1821 */ 1822 GO_WINDOW(1); /* sanity */ 1823 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 1824 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1825 } 1826 1827 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1828 ep_discard_rxtop(iot, ioh); 1829 1830 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1831 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1832 1833 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 1834 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 1835 1836 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1837 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK); 1838 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK); 1839 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RX_FILTER); 1840 1841 epmbufempty(sc); 1842 1843 if (disable) 1844 epdisable(sc); 1845 1846 ifp->if_flags &= ~IFF_RUNNING; 1847 } 1848 1849 1850 /* 1851 * Before reboots, reset card completely. 1852 */ 1853 static void 1854 epshutdown(arg) 1855 void *arg; 1856 { 1857 struct ep_softc *sc = arg; 1858 int s = splnet(); 1859 1860 if (sc->enabled) { 1861 epstop(&sc->sc_ethercom.ec_if, 1); 1862 ep_reset_cmd(sc, ELINK_COMMAND, GLOBAL_RESET); 1863 sc->enabled = 0; 1864 } 1865 splx(s); 1866 } 1867 1868 /* 1869 * We get eeprom data from the id_port given an offset into the 1870 * eeprom. Basically; after the ID_sequence is sent to all of 1871 * the cards; they enter the ID_CMD state where they will accept 1872 * command requests. 0x80-0xbf loads the eeprom data. We then 1873 * read the port 16 times and with every read; the cards check 1874 * for contention (ie: if one card writes a 0 bit and another 1875 * writes a 1 bit then the host sees a 0. At the end of the cycle; 1876 * each card compares the data on the bus; if there is a difference 1877 * then that card goes into ID_WAIT state again). In the meantime; 1878 * one bit of data is returned in the AX register which is conveniently 1879 * returned to us by bus_space_read_1(). Hence; we read 16 times getting one 1880 * bit of data with each read. 1881 * 1882 * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT! 1883 */ 1884 u_int16_t 1885 epreadeeprom(iot, ioh, offset) 1886 bus_space_tag_t iot; 1887 bus_space_handle_t ioh; 1888 int offset; 1889 { 1890 u_int16_t data = 0; 1891 int i; 1892 1893 bus_space_write_1(iot, ioh, 0, 0x80 + offset); 1894 delay(1000); 1895 for (i = 0; i < 16; i++) 1896 data = (data << 1) | (bus_space_read_2(iot, ioh, 0) & 1); 1897 return (data); 1898 } 1899 1900 static int 1901 epbusyeeprom(sc) 1902 struct ep_softc *sc; 1903 { 1904 bus_space_tag_t iot = sc->sc_iot; 1905 bus_space_handle_t ioh = sc->sc_ioh; 1906 bus_addr_t eecmd; 1907 int i = 100, j; 1908 uint16_t busybit; 1909 1910 if (sc->bustype == ELINK_BUS_PCMCIA) { 1911 delay(1000); 1912 return 0; 1913 } 1914 1915 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) { 1916 eecmd = CORK_ASIC_EEPROM_COMMAND; 1917 busybit = CORK_EEPROM_BUSY; 1918 } else { 1919 eecmd = ELINK_W0_EEPROM_COMMAND; 1920 busybit = EEPROM_BUSY; 1921 } 1922 1923 j = 0; /* bad GCC flow analysis */ 1924 while (i--) { 1925 j = bus_space_read_2(iot, ioh, eecmd); 1926 if (j & busybit) 1927 delay(100); 1928 else 1929 break; 1930 } 1931 if (i == 0) { 1932 printf("\n%s: eeprom failed to come ready\n", 1933 sc->sc_dev.dv_xname); 1934 return (1); 1935 } 1936 if (sc->ep_chipset != ELINK_CHIPSET_CORKSCREW && 1937 (j & EEPROM_TST_MODE) != 0) { 1938 /* XXX PnP mode? */ 1939 printf("\n%s: erase pencil mark!\n", sc->sc_dev.dv_xname); 1940 return (1); 1941 } 1942 return (0); 1943 } 1944 1945 u_int16_t 1946 ep_read_eeprom(sc, offset) 1947 struct ep_softc *sc; 1948 u_int16_t offset; 1949 { 1950 bus_addr_t eecmd, eedata; 1951 u_int16_t readcmd; 1952 1953 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) { 1954 eecmd = CORK_ASIC_EEPROM_COMMAND; 1955 eedata = CORK_ASIC_EEPROM_DATA; 1956 } else { 1957 eecmd = ELINK_W0_EEPROM_COMMAND; 1958 eedata = ELINK_W0_EEPROM_DATA; 1959 } 1960 1961 /* 1962 * RoadRunner has a larger EEPROM, so a different read command 1963 * is required. 1964 */ 1965 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) 1966 readcmd = READ_EEPROM_RR; 1967 else 1968 readcmd = READ_EEPROM; 1969 1970 if (epbusyeeprom(sc)) 1971 return (0); /* XXX why is eeprom busy? */ 1972 1973 bus_space_write_2(sc->sc_iot, sc->sc_ioh, eecmd, readcmd | offset); 1974 1975 if (epbusyeeprom(sc)) 1976 return (0); /* XXX why is eeprom busy? */ 1977 1978 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, eedata)); 1979 } 1980 1981 void 1982 epmbuffill(v) 1983 void *v; 1984 { 1985 struct ep_softc *sc = v; 1986 struct mbuf *m; 1987 int s, i; 1988 1989 s = splnet(); 1990 i = sc->last_mb; 1991 do { 1992 if (sc->mb[i] == 0) { 1993 MGET(m, M_DONTWAIT, MT_DATA); 1994 if (m == 0) 1995 break; 1996 sc->mb[i] = m; 1997 } 1998 i = (i + 1) % MAX_MBS; 1999 } while (i != sc->next_mb); 2000 sc->last_mb = i; 2001 /* If the queue was not filled, try again. */ 2002 if (sc->last_mb != sc->next_mb) 2003 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 2004 splx(s); 2005 } 2006 2007 void 2008 epmbufempty(sc) 2009 struct ep_softc *sc; 2010 { 2011 int s, i; 2012 2013 s = splnet(); 2014 for (i = 0; i<MAX_MBS; i++) { 2015 if (sc->mb[i]) { 2016 m_freem(sc->mb[i]); 2017 sc->mb[i] = NULL; 2018 } 2019 } 2020 sc->last_mb = sc->next_mb = 0; 2021 callout_stop(&sc->sc_mbuf_callout); 2022 splx(s); 2023 } 2024 2025 int 2026 epenable(sc) 2027 struct ep_softc *sc; 2028 { 2029 2030 if (sc->enabled == 0 && sc->enable != NULL) { 2031 if ((*sc->enable)(sc) != 0) { 2032 printf("%s: device enable failed\n", 2033 sc->sc_dev.dv_xname); 2034 return (EIO); 2035 } 2036 } 2037 2038 sc->enabled = 1; 2039 return (0); 2040 } 2041 2042 void 2043 epdisable(sc) 2044 struct ep_softc *sc; 2045 { 2046 2047 if (sc->enabled != 0 && sc->disable != NULL) { 2048 (*sc->disable)(sc); 2049 sc->enabled = 0; 2050 } 2051 } 2052 2053 /* 2054 * ep_activate: 2055 * 2056 * Handle device activation/deactivation requests. 2057 */ 2058 int 2059 ep_activate(self, act) 2060 struct device *self; 2061 enum devact act; 2062 { 2063 struct ep_softc *sc = (struct ep_softc *)self; 2064 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2065 int error = 0, s; 2066 2067 s = splnet(); 2068 switch (act) { 2069 case DVACT_ACTIVATE: 2070 error = EOPNOTSUPP; 2071 break; 2072 2073 case DVACT_DEACTIVATE: 2074 if (sc->ep_flags & ELINK_FLAGS_MII) 2075 mii_activate(&sc->sc_mii, act, MII_PHY_ANY, 2076 MII_OFFSET_ANY); 2077 if_deactivate(ifp); 2078 break; 2079 } 2080 splx(s); 2081 return (error); 2082 } 2083 2084 /* 2085 * ep_detach: 2086 * 2087 * Detach a elink3 interface. 2088 */ 2089 int 2090 ep_detach(self, flags) 2091 struct device *self; 2092 int flags; 2093 { 2094 struct ep_softc *sc = (struct ep_softc *)self; 2095 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2096 2097 /* Succeed now if there's no work to do. */ 2098 if ((sc->sc_flags & ELINK_FLAGS_ATTACHED) == 0) 2099 return (0); 2100 2101 epdisable(sc); 2102 2103 callout_stop(&sc->sc_mii_callout); 2104 callout_stop(&sc->sc_mbuf_callout); 2105 2106 if (sc->ep_flags & ELINK_FLAGS_MII) { 2107 /* Detach all PHYs */ 2108 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 2109 } 2110 2111 /* Delete all remaining media. */ 2112 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 2113 2114 #if NRND > 0 2115 rnd_detach_source(&sc->rnd_source); 2116 #endif 2117 ether_ifdetach(ifp); 2118 if_detach(ifp); 2119 2120 shutdownhook_disestablish(sc->sd_hook); 2121 2122 return (0); 2123 } 2124 2125 u_int32_t 2126 ep_mii_bitbang_read(self) 2127 struct device *self; 2128 { 2129 struct ep_softc *sc = (void *) self; 2130 2131 /* We're already in Window 4. */ 2132 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 2133 ELINK_W4_BOOM_PHYSMGMT)); 2134 } 2135 2136 void 2137 ep_mii_bitbang_write(self, val) 2138 struct device *self; 2139 u_int32_t val; 2140 { 2141 struct ep_softc *sc = (void *) self; 2142 2143 /* We're already in Window 4. */ 2144 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 2145 ELINK_W4_BOOM_PHYSMGMT, val); 2146 } 2147 2148 int 2149 ep_mii_readreg(self, phy, reg) 2150 struct device *self; 2151 int phy, reg; 2152 { 2153 struct ep_softc *sc = (void *) self; 2154 int val; 2155 2156 GO_WINDOW(4); 2157 2158 val = mii_bitbang_readreg(self, &ep_mii_bitbang_ops, phy, reg); 2159 2160 GO_WINDOW(1); 2161 2162 return (val); 2163 } 2164 2165 void 2166 ep_mii_writereg(self, phy, reg, val) 2167 struct device *self; 2168 int phy, reg, val; 2169 { 2170 struct ep_softc *sc = (void *) self; 2171 2172 GO_WINDOW(4); 2173 2174 mii_bitbang_writereg(self, &ep_mii_bitbang_ops, phy, reg, val); 2175 2176 GO_WINDOW(1); 2177 } 2178 2179 void 2180 ep_statchg(self) 2181 struct device *self; 2182 { 2183 struct ep_softc *sc = (struct ep_softc *)self; 2184 bus_space_tag_t iot = sc->sc_iot; 2185 bus_space_handle_t ioh = sc->sc_ioh; 2186 int mctl; 2187 2188 GO_WINDOW(3); 2189 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 2190 if (sc->sc_mii.mii_media_active & IFM_FDX) 2191 mctl |= MAC_CONTROL_FDX; 2192 else 2193 mctl &= ~MAC_CONTROL_FDX; 2194 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 2195 GO_WINDOW(1); /* back to operating window */ 2196 } 2197
Indexes created Sun Sep 28 16:09:52 GMT 2025