elinkxl.c revision 1.10 1 1.10 dean /* $NetBSD: elinkxl.c,v 1.10 1999/04/28 17:34:01 dean Exp $ */
2 1.1 fvdl
3 1.1 fvdl /*-
4 1.1 fvdl * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.1 fvdl * All rights reserved.
6 1.1 fvdl *
7 1.1 fvdl * This code is derived from software contributed to The NetBSD Foundation
8 1.1 fvdl * by Frank van der Linden.
9 1.1 fvdl *
10 1.1 fvdl * Redistribution and use in source and binary forms, with or without
11 1.1 fvdl * modification, are permitted provided that the following conditions
12 1.1 fvdl * are met:
13 1.1 fvdl * 1. Redistributions of source code must retain the above copyright
14 1.1 fvdl * notice, this list of conditions and the following disclaimer.
15 1.1 fvdl * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 fvdl * notice, this list of conditions and the following disclaimer in the
17 1.1 fvdl * documentation and/or other materials provided with the distribution.
18 1.1 fvdl * 3. All advertising materials mentioning features or use of this software
19 1.1 fvdl * must display the following acknowledgement:
20 1.1 fvdl * This product includes software developed by the NetBSD
21 1.1 fvdl * Foundation, Inc. and its contributors.
22 1.1 fvdl * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.1 fvdl * contributors may be used to endorse or promote products derived
24 1.1 fvdl * from this software without specific prior written permission.
25 1.1 fvdl *
26 1.1 fvdl * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.1 fvdl * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 fvdl * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1 fvdl * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.1 fvdl * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 fvdl * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 fvdl * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 fvdl * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 fvdl * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 fvdl * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 fvdl * POSSIBILITY OF SUCH DAMAGE.
37 1.1 fvdl */
38 1.1 fvdl
39 1.1 fvdl #include "opt_inet.h"
40 1.1 fvdl #include "opt_ns.h"
41 1.1 fvdl #include "bpfilter.h"
42 1.1 fvdl #include "rnd.h"
43 1.1 fvdl
44 1.1 fvdl #include <sys/param.h>
45 1.1 fvdl #include <sys/systm.h>
46 1.1 fvdl #include <sys/kernel.h>
47 1.1 fvdl #include <sys/mbuf.h>
48 1.1 fvdl #include <sys/socket.h>
49 1.1 fvdl #include <sys/ioctl.h>
50 1.1 fvdl #include <sys/errno.h>
51 1.1 fvdl #include <sys/syslog.h>
52 1.1 fvdl #include <sys/select.h>
53 1.1 fvdl #include <sys/device.h>
54 1.1 fvdl #if NRND > 0
55 1.1 fvdl #include <sys/rnd.h>
56 1.1 fvdl #endif
57 1.1 fvdl
58 1.1 fvdl #include <net/if.h>
59 1.1 fvdl #include <net/if_dl.h>
60 1.1 fvdl #include <net/if_ether.h>
61 1.1 fvdl #include <net/if_media.h>
62 1.1 fvdl
63 1.1 fvdl #ifdef INET
64 1.1 fvdl #include <netinet/in.h>
65 1.1 fvdl #include <netinet/in_systm.h>
66 1.1 fvdl #include <netinet/in_var.h>
67 1.1 fvdl #include <netinet/ip.h>
68 1.1 fvdl #include <netinet/if_inarp.h>
69 1.1 fvdl #endif
70 1.1 fvdl
71 1.1 fvdl #ifdef NS
72 1.1 fvdl #include <netns/ns.h>
73 1.1 fvdl #include <netns/ns_if.h>
74 1.1 fvdl #endif
75 1.1 fvdl
76 1.1 fvdl #if NBPFILTER > 0
77 1.1 fvdl #include <net/bpf.h>
78 1.1 fvdl #include <net/bpfdesc.h>
79 1.1 fvdl #endif
80 1.1 fvdl
81 1.1 fvdl #include <machine/cpu.h>
82 1.1 fvdl #include <machine/bus.h>
83 1.1 fvdl #include <machine/intr.h>
84 1.1 fvdl
85 1.9 thorpej #if BYTE_ORDER == BIG_ENDIAN
86 1.9 thorpej #include <machine/bswap.h>
87 1.9 thorpej #define htopci(x) bswap32(x)
88 1.9 thorpej #define pcitoh(x) bswap32(x)
89 1.9 thorpej #else
90 1.9 thorpej #define htopci(x) (x)
91 1.9 thorpej #define pcitoh(x) (x)
92 1.9 thorpej #endif
93 1.9 thorpej
94 1.1 fvdl #include <vm/vm.h>
95 1.1 fvdl #include <vm/pmap.h>
96 1.1 fvdl
97 1.1 fvdl #include <dev/mii/miivar.h>
98 1.1 fvdl #include <dev/mii/mii.h>
99 1.1 fvdl
100 1.1 fvdl #include <dev/ic/elink3reg.h>
101 1.1 fvdl /* #include <dev/ic/elink3var.h> */
102 1.1 fvdl #include <dev/ic/elinkxlreg.h>
103 1.1 fvdl #include <dev/ic/elinkxlvar.h>
104 1.1 fvdl
105 1.1 fvdl #ifdef DEBUG
106 1.1 fvdl int exdebug = 0;
107 1.1 fvdl #endif
108 1.1 fvdl
109 1.1 fvdl /* ifmedia callbacks */
110 1.1 fvdl int ex_media_chg __P((struct ifnet *ifp));
111 1.1 fvdl void ex_media_stat __P((struct ifnet *ifp, struct ifmediareq *req));
112 1.1 fvdl
113 1.1 fvdl void ex_probe_media __P((struct ex_softc *));
114 1.1 fvdl void ex_set_filter __P((struct ex_softc *));
115 1.1 fvdl void ex_set_media __P((struct ex_softc *));
116 1.1 fvdl struct mbuf *ex_get __P((struct ex_softc *, int));
117 1.1 fvdl u_int16_t ex_read_eeprom __P((struct ex_softc *, int));
118 1.1 fvdl void ex_init __P((struct ex_softc *));
119 1.1 fvdl void ex_read __P((struct ex_softc *));
120 1.1 fvdl void ex_reset __P((struct ex_softc *));
121 1.1 fvdl void ex_set_mc __P((struct ex_softc *));
122 1.1 fvdl void ex_getstats __P((struct ex_softc *));
123 1.1 fvdl void ex_printstats __P((struct ex_softc *));
124 1.1 fvdl void ex_tick __P((void *));
125 1.1 fvdl
126 1.1 fvdl static int ex_eeprom_busy __P((struct ex_softc *));
127 1.1 fvdl static int ex_add_rxbuf __P((struct ex_softc *, struct ex_rxdesc *));
128 1.1 fvdl static void ex_init_txdescs __P((struct ex_softc *));
129 1.1 fvdl
130 1.1 fvdl static void ex_shutdown __P((void *));
131 1.1 fvdl static void ex_start __P((struct ifnet *));
132 1.1 fvdl static void ex_txstat __P((struct ex_softc *));
133 1.1 fvdl static u_int16_t ex_mchash __P((u_char *));
134 1.1 fvdl static void ex_mii_writebits __P((struct ex_softc *, u_int, int));
135 1.1 fvdl
136 1.1 fvdl void ex_mii_setbit __P((void *, u_int16_t));
137 1.1 fvdl void ex_mii_clrbit __P((void *, u_int16_t));
138 1.1 fvdl u_int16_t ex_mii_readbit __P((void *, u_int16_t));
139 1.1 fvdl int ex_mii_readreg __P((struct device *, int, int));
140 1.1 fvdl void ex_mii_writereg __P((struct device *, int, int, int));
141 1.1 fvdl void ex_mii_statchg __P((struct device *));
142 1.1 fvdl
143 1.2 thorpej void ex_probemedia __P((struct ex_softc *));
144 1.2 thorpej
145 1.2 thorpej /*
146 1.2 thorpej * Structure to map media-present bits in boards to ifmedia codes and
147 1.2 thorpej * printable media names. Used for table-driven ifmedia initialization.
148 1.2 thorpej */
149 1.2 thorpej struct ex_media {
150 1.2 thorpej int exm_mpbit; /* media present bit */
151 1.2 thorpej const char *exm_name; /* name of medium */
152 1.2 thorpej int exm_ifmedia; /* ifmedia word for medium */
153 1.2 thorpej int exm_epmedia; /* ELINKMEDIA_* constant */
154 1.2 thorpej };
155 1.2 thorpej
156 1.2 thorpej /*
157 1.2 thorpej * Media table for 3c90x chips. Note that chips with MII have no
158 1.2 thorpej * `native' media.
159 1.2 thorpej */
160 1.2 thorpej struct ex_media ex_native_media[] = {
161 1.2 thorpej { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T,
162 1.2 thorpej ELINKMEDIA_10BASE_T },
163 1.2 thorpej { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX,
164 1.2 thorpej ELINKMEDIA_10BASE_T },
165 1.2 thorpej { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5,
166 1.2 thorpej ELINKMEDIA_AUI },
167 1.2 thorpej { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2,
168 1.2 thorpej ELINKMEDIA_10BASE_2 },
169 1.2 thorpej { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX,
170 1.2 thorpej ELINKMEDIA_100BASE_TX },
171 1.2 thorpej { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX,
172 1.2 thorpej ELINKMEDIA_100BASE_TX },
173 1.2 thorpej { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX,
174 1.2 thorpej ELINKMEDIA_100BASE_FX },
175 1.2 thorpej { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL,
176 1.2 thorpej ELINKMEDIA_MII },
177 1.2 thorpej { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4,
178 1.2 thorpej ELINKMEDIA_100BASE_T4 },
179 1.2 thorpej { 0, NULL, 0,
180 1.2 thorpej 0 },
181 1.2 thorpej };
182 1.2 thorpej
183 1.1 fvdl /*
184 1.1 fvdl * Back-end attach and configure.
185 1.1 fvdl */
186 1.1 fvdl void
187 1.1 fvdl ex_config(sc)
188 1.1 fvdl struct ex_softc *sc;
189 1.1 fvdl {
190 1.1 fvdl struct ifnet *ifp;
191 1.1 fvdl u_int16_t val;
192 1.1 fvdl u_int8_t macaddr[ETHER_ADDR_LEN] = {0};
193 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
194 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
195 1.1 fvdl bus_dma_segment_t useg, dseg;
196 1.1 fvdl int urseg, drseg, i, error, attach_stage;
197 1.1 fvdl
198 1.1 fvdl ex_reset(sc);
199 1.1 fvdl
200 1.1 fvdl val = ex_read_eeprom(sc, EEPROM_OEM_ADDR0);
201 1.1 fvdl macaddr[0] = val >> 8;
202 1.1 fvdl macaddr[1] = val & 0xff;
203 1.1 fvdl val = ex_read_eeprom(sc, EEPROM_OEM_ADDR1);
204 1.1 fvdl macaddr[2] = val >> 8;
205 1.1 fvdl macaddr[3] = val & 0xff;
206 1.1 fvdl val = ex_read_eeprom(sc, EEPROM_OEM_ADDR2);
207 1.1 fvdl macaddr[4] = val >> 8;
208 1.1 fvdl macaddr[5] = val & 0xff;
209 1.1 fvdl
210 1.1 fvdl printf("%s: MAC address %s\n", sc->sc_dev.dv_xname,
211 1.1 fvdl ether_sprintf(macaddr));
212 1.1 fvdl
213 1.1 fvdl attach_stage = 0;
214 1.1 fvdl
215 1.1 fvdl /*
216 1.1 fvdl * Allocate the upload descriptors, and create and load the DMA
217 1.1 fvdl * map for them.
218 1.1 fvdl */
219 1.1 fvdl if ((error = bus_dmamem_alloc(sc->sc_dmat,
220 1.1 fvdl EX_NUPD * sizeof (struct ex_upd), NBPG, 0, &useg, 1, &urseg,
221 1.1 fvdl BUS_DMA_NOWAIT)) != 0) {
222 1.1 fvdl printf("%s: can't allocate upload descriptors, error = %d\n",
223 1.1 fvdl sc->sc_dev.dv_xname, error);
224 1.1 fvdl goto fail;
225 1.1 fvdl }
226 1.1 fvdl
227 1.1 fvdl attach_stage = 1;
228 1.1 fvdl
229 1.1 fvdl if ((error = bus_dmamem_map(sc->sc_dmat, &useg, urseg,
230 1.1 fvdl EX_NUPD * sizeof (struct ex_upd), (caddr_t *)&sc->sc_upd,
231 1.1 fvdl BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
232 1.1 fvdl printf("%s: can't map upload descriptors, error = %d\n",
233 1.1 fvdl sc->sc_dev.dv_xname, error);
234 1.1 fvdl goto fail;
235 1.1 fvdl }
236 1.1 fvdl
237 1.1 fvdl attach_stage = 2;
238 1.1 fvdl
239 1.1 fvdl if ((error = bus_dmamap_create(sc->sc_dmat,
240 1.1 fvdl EX_NUPD * sizeof (struct ex_upd), 1,
241 1.1 fvdl EX_NUPD * sizeof (struct ex_upd), 0, BUS_DMA_NOWAIT,
242 1.1 fvdl &sc->sc_upd_dmamap)) != 0) {
243 1.1 fvdl printf("%s: can't create upload desc. DMA map, error = %d\n",
244 1.1 fvdl sc->sc_dev.dv_xname, error);
245 1.1 fvdl goto fail;
246 1.1 fvdl }
247 1.1 fvdl
248 1.1 fvdl attach_stage = 3;
249 1.1 fvdl
250 1.1 fvdl if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_upd_dmamap,
251 1.1 fvdl sc->sc_upd, EX_NUPD * sizeof (struct ex_upd), NULL,
252 1.1 fvdl BUS_DMA_NOWAIT)) != 0) {
253 1.1 fvdl printf("%s: can't load upload desc. DMA map, error = %d\n",
254 1.1 fvdl sc->sc_dev.dv_xname, error);
255 1.1 fvdl goto fail;
256 1.1 fvdl }
257 1.1 fvdl
258 1.1 fvdl attach_stage = 4;
259 1.1 fvdl
260 1.1 fvdl /*
261 1.1 fvdl * Allocate the download descriptors, and create and load the DMA
262 1.1 fvdl * map for them.
263 1.1 fvdl */
264 1.1 fvdl if ((error = bus_dmamem_alloc(sc->sc_dmat,
265 1.1 fvdl EX_NDPD * sizeof (struct ex_dpd), NBPG, 0, &dseg, 1, &drseg,
266 1.1 fvdl BUS_DMA_NOWAIT)) != 0) {
267 1.1 fvdl printf("%s: can't allocate download descriptors, error = %d\n",
268 1.1 fvdl sc->sc_dev.dv_xname, error);
269 1.1 fvdl goto fail;
270 1.1 fvdl }
271 1.1 fvdl
272 1.1 fvdl attach_stage = 5;
273 1.1 fvdl
274 1.1 fvdl if ((error = bus_dmamem_map(sc->sc_dmat, &dseg, drseg,
275 1.1 fvdl EX_NDPD * sizeof (struct ex_dpd), (caddr_t *)&sc->sc_dpd,
276 1.1 fvdl BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
277 1.1 fvdl printf("%s: can't map download descriptors, error = %d\n",
278 1.1 fvdl sc->sc_dev.dv_xname, error);
279 1.1 fvdl goto fail;
280 1.1 fvdl }
281 1.1 fvdl bzero(sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd));
282 1.1 fvdl
283 1.1 fvdl attach_stage = 6;
284 1.1 fvdl
285 1.1 fvdl if ((error = bus_dmamap_create(sc->sc_dmat,
286 1.1 fvdl EX_NDPD * sizeof (struct ex_dpd), 1,
287 1.1 fvdl EX_NDPD * sizeof (struct ex_dpd), 0, BUS_DMA_NOWAIT,
288 1.1 fvdl &sc->sc_dpd_dmamap)) != 0) {
289 1.1 fvdl printf("%s: can't create download desc. DMA map, error = %d\n",
290 1.1 fvdl sc->sc_dev.dv_xname, error);
291 1.1 fvdl goto fail;
292 1.1 fvdl }
293 1.1 fvdl
294 1.1 fvdl attach_stage = 7;
295 1.1 fvdl
296 1.1 fvdl if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dpd_dmamap,
297 1.1 fvdl sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd), NULL,
298 1.1 fvdl BUS_DMA_NOWAIT)) != 0) {
299 1.1 fvdl printf("%s: can't load download desc. DMA map, error = %d\n",
300 1.1 fvdl sc->sc_dev.dv_xname, error);
301 1.1 fvdl goto fail;
302 1.1 fvdl }
303 1.1 fvdl
304 1.1 fvdl attach_stage = 8;
305 1.1 fvdl
306 1.1 fvdl
307 1.1 fvdl /*
308 1.1 fvdl * Create the transmit buffer DMA maps.
309 1.1 fvdl */
310 1.1 fvdl for (i = 0; i < EX_NDPD; i++) {
311 1.1 fvdl if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
312 1.1 fvdl EX_NTFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT,
313 1.1 fvdl &sc->sc_tx_dmamaps[i])) != 0) {
314 1.1 fvdl printf("%s: can't create tx DMA map %d, error = %d\n",
315 1.1 fvdl sc->sc_dev.dv_xname, i, error);
316 1.1 fvdl goto fail;
317 1.1 fvdl }
318 1.1 fvdl }
319 1.1 fvdl
320 1.1 fvdl attach_stage = 9;
321 1.1 fvdl
322 1.1 fvdl /*
323 1.1 fvdl * Create the receive buffer DMA maps.
324 1.1 fvdl */
325 1.1 fvdl for (i = 0; i < EX_NUPD; i++) {
326 1.1 fvdl if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
327 1.1 fvdl EX_NRFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT,
328 1.1 fvdl &sc->sc_rx_dmamaps[i])) != 0) {
329 1.1 fvdl printf("%s: can't create rx DMA map %d, error = %d\n",
330 1.1 fvdl sc->sc_dev.dv_xname, i, error);
331 1.1 fvdl goto fail;
332 1.1 fvdl }
333 1.1 fvdl }
334 1.1 fvdl
335 1.1 fvdl attach_stage = 10;
336 1.1 fvdl
337 1.1 fvdl /*
338 1.1 fvdl * Create ring of upload descriptors, only once. The DMA engine
339 1.1 fvdl * will loop over this when receiving packets, stalling if it
340 1.1 fvdl * hits an UPD with a finished receive.
341 1.1 fvdl */
342 1.1 fvdl for (i = 0; i < EX_NUPD; i++) {
343 1.1 fvdl sc->sc_rxdescs[i].rx_dmamap = sc->sc_rx_dmamaps[i];
344 1.1 fvdl sc->sc_rxdescs[i].rx_upd = &sc->sc_upd[i];
345 1.9 thorpej sc->sc_upd[i].upd_frags[0].fr_len =
346 1.9 thorpej htopci((MCLBYTES - 2) | EX_FR_LAST);
347 1.1 fvdl if (ex_add_rxbuf(sc, &sc->sc_rxdescs[i]) != 0) {
348 1.1 fvdl printf("%s: can't allocate or map rx buffers\n",
349 1.1 fvdl sc->sc_dev.dv_xname);
350 1.1 fvdl goto fail;
351 1.1 fvdl }
352 1.1 fvdl }
353 1.1 fvdl
354 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 0,
355 1.1 fvdl EX_NUPD * sizeof (struct ex_upd),
356 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
357 1.1 fvdl
358 1.1 fvdl ex_init_txdescs(sc);
359 1.1 fvdl
360 1.1 fvdl attach_stage = 11;
361 1.1 fvdl
362 1.1 fvdl
363 1.1 fvdl GO_WINDOW(3);
364 1.1 fvdl val = bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS);
365 1.1 fvdl if (val & ELINK_MEDIACAP_MII)
366 1.1 fvdl sc->ex_conf |= EX_CONF_MII;
367 1.1 fvdl
368 1.1 fvdl ifp = &sc->sc_ethercom.ec_if;
369 1.1 fvdl
370 1.2 thorpej /*
371 1.2 thorpej * Initialize our media structures and MII info. We'll
372 1.2 thorpej * probe the MII if we discover that we have one.
373 1.2 thorpej */
374 1.2 thorpej sc->ex_mii.mii_ifp = ifp;
375 1.2 thorpej sc->ex_mii.mii_readreg = ex_mii_readreg;
376 1.2 thorpej sc->ex_mii.mii_writereg = ex_mii_writereg;
377 1.2 thorpej sc->ex_mii.mii_statchg = ex_mii_statchg;
378 1.2 thorpej ifmedia_init(&sc->ex_mii.mii_media, 0, ex_media_chg,
379 1.2 thorpej ex_media_stat);
380 1.2 thorpej
381 1.1 fvdl if (sc->ex_conf & EX_CONF_MII) {
382 1.1 fvdl /*
383 1.1 fvdl * Find PHY, extract media information from it.
384 1.1 fvdl */
385 1.1 fvdl mii_phy_probe(&sc->sc_dev, &sc->ex_mii, 0xffffffff);
386 1.1 fvdl if (LIST_FIRST(&sc->ex_mii.mii_phys) == NULL) {
387 1.1 fvdl ifmedia_add(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE,
388 1.1 fvdl 0, NULL);
389 1.1 fvdl ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE);
390 1.1 fvdl } else {
391 1.1 fvdl ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_AUTO);
392 1.1 fvdl }
393 1.2 thorpej } else
394 1.2 thorpej ex_probemedia(sc);
395 1.1 fvdl
396 1.1 fvdl bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
397 1.1 fvdl ifp->if_softc = sc;
398 1.1 fvdl ifp->if_start = ex_start;
399 1.1 fvdl ifp->if_ioctl = ex_ioctl;
400 1.1 fvdl ifp->if_watchdog = ex_watchdog;
401 1.1 fvdl ifp->if_flags =
402 1.1 fvdl IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
403 1.1 fvdl
404 1.1 fvdl if_attach(ifp);
405 1.1 fvdl ether_ifattach(ifp, macaddr);
406 1.1 fvdl
407 1.1 fvdl GO_WINDOW(1);
408 1.1 fvdl
409 1.1 fvdl sc->tx_start_thresh = 20;
410 1.1 fvdl sc->tx_succ_ok = 0;
411 1.1 fvdl
412 1.1 fvdl /* TODO: set queues to 0 */
413 1.1 fvdl
414 1.1 fvdl #if NBPFILTER > 0
415 1.1 fvdl bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB,
416 1.1 fvdl sizeof(struct ether_header));
417 1.1 fvdl #endif
418 1.1 fvdl
419 1.1 fvdl #if NRND > 0
420 1.5 explorer rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname,
421 1.5 explorer RND_TYPE_NET, 0);
422 1.1 fvdl #endif
423 1.1 fvdl
424 1.1 fvdl /* Establish callback to reset card when we reboot. */
425 1.1 fvdl shutdownhook_establish(ex_shutdown, sc);
426 1.1 fvdl return;
427 1.1 fvdl
428 1.1 fvdl fail:
429 1.1 fvdl /*
430 1.1 fvdl * Free any resources we've allocated during the failed attach
431 1.1 fvdl * attempt. Do this in reverse order and fall though.
432 1.1 fvdl */
433 1.1 fvdl switch (attach_stage) {
434 1.1 fvdl case 11:
435 1.1 fvdl {
436 1.1 fvdl struct ex_rxdesc *rxd;
437 1.1 fvdl
438 1.1 fvdl for (i = 0; i < EX_NUPD; i++) {
439 1.1 fvdl rxd = &sc->sc_rxdescs[i];
440 1.1 fvdl if (rxd->rx_mbhead != NULL) {
441 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap);
442 1.1 fvdl m_freem(rxd->rx_mbhead);
443 1.1 fvdl }
444 1.1 fvdl }
445 1.1 fvdl }
446 1.1 fvdl /* FALLTHROUGH */
447 1.1 fvdl
448 1.1 fvdl case 10:
449 1.1 fvdl for (i = 0; i < EX_NUPD; i++)
450 1.1 fvdl bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]);
451 1.1 fvdl /* FALLTHROUGH */
452 1.1 fvdl
453 1.1 fvdl case 9:
454 1.1 fvdl for (i = 0; i < EX_NDPD; i++)
455 1.1 fvdl bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]);
456 1.1 fvdl /* FALLTHROUGH */
457 1.1 fvdl case 8:
458 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap);
459 1.1 fvdl /* FALLTHROUGH */
460 1.1 fvdl
461 1.1 fvdl case 7:
462 1.1 fvdl bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap);
463 1.1 fvdl /* FALLTHROUGH */
464 1.1 fvdl
465 1.1 fvdl case 6:
466 1.1 fvdl bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd,
467 1.1 fvdl EX_NDPD * sizeof (struct ex_dpd));
468 1.1 fvdl /* FALLTHROUGH */
469 1.1 fvdl
470 1.1 fvdl case 5:
471 1.1 fvdl bus_dmamem_free(sc->sc_dmat, &dseg, drseg);
472 1.1 fvdl break;
473 1.1 fvdl
474 1.1 fvdl case 4:
475 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap);
476 1.1 fvdl /* FALLTHROUGH */
477 1.1 fvdl
478 1.1 fvdl case 3:
479 1.1 fvdl bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap);
480 1.1 fvdl /* FALLTHROUGH */
481 1.1 fvdl
482 1.1 fvdl case 2:
483 1.1 fvdl bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd,
484 1.1 fvdl EX_NUPD * sizeof (struct ex_upd));
485 1.1 fvdl /* FALLTHROUGH */
486 1.1 fvdl
487 1.1 fvdl case 1:
488 1.1 fvdl bus_dmamem_free(sc->sc_dmat, &useg, urseg);
489 1.1 fvdl break;
490 1.1 fvdl }
491 1.1 fvdl
492 1.2 thorpej }
493 1.2 thorpej
494 1.2 thorpej /*
495 1.2 thorpej * Find the media present on non-MII chips.
496 1.2 thorpej */
497 1.2 thorpej void
498 1.2 thorpej ex_probemedia(sc)
499 1.2 thorpej struct ex_softc *sc;
500 1.2 thorpej {
501 1.2 thorpej bus_space_tag_t iot = sc->sc_iot;
502 1.2 thorpej bus_space_handle_t ioh = sc->sc_ioh;
503 1.2 thorpej struct ifmedia *ifm = &sc->ex_mii.mii_media;
504 1.2 thorpej struct ex_media *exm;
505 1.2 thorpej u_int16_t config1, reset_options, default_media;
506 1.2 thorpej int defmedia = 0;
507 1.2 thorpej const char *sep = "", *defmedianame = NULL;
508 1.2 thorpej
509 1.2 thorpej GO_WINDOW(3);
510 1.2 thorpej config1 = bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2);
511 1.2 thorpej reset_options = bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS);
512 1.2 thorpej GO_WINDOW(0);
513 1.2 thorpej
514 1.2 thorpej default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT;
515 1.2 thorpej
516 1.2 thorpej printf("%s: ", sc->sc_dev.dv_xname);
517 1.2 thorpej
518 1.2 thorpej /* Sanity check that there are any media! */
519 1.2 thorpej if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) {
520 1.2 thorpej printf("no media present!\n");
521 1.2 thorpej ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL);
522 1.2 thorpej ifmedia_set(ifm, IFM_ETHER|IFM_NONE);
523 1.2 thorpej return;
524 1.2 thorpej }
525 1.2 thorpej
526 1.2 thorpej #define PRINT(s) printf("%s%s", sep, s); sep = ", "
527 1.2 thorpej
528 1.2 thorpej for (exm = ex_native_media; exm->exm_name != NULL; exm++) {
529 1.2 thorpej if (reset_options & exm->exm_mpbit) {
530 1.2 thorpej /*
531 1.2 thorpej * Default media is a little complicated. We
532 1.2 thorpej * support full-duplex which uses the same
533 1.2 thorpej * reset options bit.
534 1.2 thorpej *
535 1.2 thorpej * XXX Check EEPROM for default to FDX?
536 1.2 thorpej */
537 1.2 thorpej if (exm->exm_epmedia == default_media) {
538 1.2 thorpej if ((exm->exm_ifmedia & IFM_FDX) == 0) {
539 1.2 thorpej defmedia = exm->exm_ifmedia;
540 1.2 thorpej defmedianame = exm->exm_name;
541 1.2 thorpej }
542 1.2 thorpej } else if (defmedia == 0) {
543 1.2 thorpej defmedia = exm->exm_ifmedia;
544 1.2 thorpej defmedianame = exm->exm_name;
545 1.2 thorpej }
546 1.2 thorpej ifmedia_add(ifm, exm->exm_ifmedia, exm->exm_epmedia,
547 1.2 thorpej NULL);
548 1.2 thorpej PRINT(exm->exm_name);
549 1.2 thorpej }
550 1.2 thorpej }
551 1.2 thorpej
552 1.2 thorpej #undef PRINT
553 1.2 thorpej
554 1.2 thorpej #ifdef DIAGNOSTIC
555 1.2 thorpej if (defmedia == 0)
556 1.2 thorpej panic("ex_probemedia: impossible");
557 1.2 thorpej #endif
558 1.2 thorpej
559 1.2 thorpej printf(", default %s\n", defmedianame);
560 1.2 thorpej ifmedia_set(ifm, defmedia);
561 1.1 fvdl }
562 1.1 fvdl
563 1.1 fvdl /*
564 1.1 fvdl * Bring device up.
565 1.1 fvdl */
566 1.1 fvdl void
567 1.1 fvdl ex_init(sc)
568 1.1 fvdl struct ex_softc *sc;
569 1.1 fvdl {
570 1.1 fvdl struct ifnet *ifp = &sc->sc_ethercom.ec_if;
571 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
572 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
573 1.1 fvdl int s, i;
574 1.1 fvdl
575 1.1 fvdl s = splnet();
576 1.1 fvdl
577 1.1 fvdl ex_waitcmd(sc);
578 1.1 fvdl ex_stop(sc);
579 1.1 fvdl
580 1.1 fvdl /*
581 1.1 fvdl * Set the station address and clear the station mask. The latter
582 1.1 fvdl * is needed for 90x cards, 0 is the default for 90xB cards.
583 1.1 fvdl */
584 1.1 fvdl GO_WINDOW(2);
585 1.1 fvdl for (i = 0; i < ETHER_ADDR_LEN; i++) {
586 1.1 fvdl bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i,
587 1.1 fvdl LLADDR(ifp->if_sadl)[i]);
588 1.1 fvdl bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0);
589 1.1 fvdl }
590 1.1 fvdl
591 1.1 fvdl GO_WINDOW(3);
592 1.1 fvdl
593 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_RESET);
594 1.1 fvdl ex_waitcmd(sc);
595 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_RESET);
596 1.1 fvdl ex_waitcmd(sc);
597 1.1 fvdl
598 1.1 fvdl /*
599 1.1 fvdl * Disable reclaim threshold for 90xB, set free threshold to
600 1.1 fvdl * 6 * 256 = 1536 for 90x.
601 1.1 fvdl */
602 1.1 fvdl if (sc->ex_conf & EX_CONF_90XB)
603 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND,
604 1.1 fvdl ELINK_TXRECLTHRESH | 255);
605 1.1 fvdl else
606 1.1 fvdl bus_space_write_1(iot, ioh, ELINK_TXFREETHRESH, 6);
607 1.1 fvdl
608 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND,
609 1.1 fvdl SET_RX_EARLY_THRESH | ELINK_THRESH_DISABLE);
610 1.1 fvdl
611 1.1 fvdl bus_space_write_4(iot, ioh, ELINK_DMACTRL,
612 1.1 fvdl bus_space_read_4(iot, ioh, ELINK_DMACTRL) | ELINK_DMAC_UPRXEAREN);
613 1.1 fvdl
614 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK | S_MASK);
615 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK | S_MASK);
616 1.1 fvdl
617 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff);
618 1.1 fvdl
619 1.1 fvdl ex_set_media(sc);
620 1.1 fvdl ex_set_mc(sc);
621 1.1 fvdl
622 1.1 fvdl
623 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, STATS_ENABLE);
624 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE);
625 1.1 fvdl bus_space_write_4(iot, ioh, ELINK_UPLISTPTR, sc->sc_upddma);
626 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE);
627 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_UPUNSTALL);
628 1.1 fvdl
629 1.1 fvdl ifp->if_flags |= IFF_RUNNING;
630 1.1 fvdl ifp->if_flags &= ~IFF_OACTIVE;
631 1.1 fvdl ex_start(ifp);
632 1.1 fvdl
633 1.1 fvdl GO_WINDOW(1);
634 1.1 fvdl
635 1.1 fvdl splx(s);
636 1.1 fvdl
637 1.1 fvdl timeout(ex_tick, sc, hz);
638 1.1 fvdl }
639 1.1 fvdl
640 1.1 fvdl /*
641 1.1 fvdl * Multicast hash filter according to the 3Com spec.
642 1.1 fvdl */
643 1.1 fvdl static u_int16_t
644 1.1 fvdl ex_mchash(addr)
645 1.1 fvdl u_char *addr;
646 1.1 fvdl {
647 1.1 fvdl u_int32_t crc, carry;
648 1.1 fvdl int i, j;
649 1.1 fvdl u_char c;
650 1.1 fvdl
651 1.1 fvdl /* Compute CRC for the address value. */
652 1.1 fvdl crc = 0xffffffff; /* initial value */
653 1.1 fvdl
654 1.1 fvdl for (i = 0; i < 6; i++) {
655 1.1 fvdl c = addr[i];
656 1.7 fvdl for (j = 0; j < 8; j++) {
657 1.1 fvdl carry = ((crc & 0x80000000) ? 1 : 0) ^ (c & 0x01);
658 1.1 fvdl crc <<= 1;
659 1.1 fvdl c >>= 1;
660 1.1 fvdl if (carry)
661 1.1 fvdl crc = (crc ^ 0x04c11db6) | carry;
662 1.1 fvdl }
663 1.1 fvdl }
664 1.1 fvdl
665 1.1 fvdl /* Return the filter bit position. */
666 1.1 fvdl return(crc & 0x000000ff);
667 1.1 fvdl }
668 1.1 fvdl
669 1.1 fvdl
670 1.1 fvdl /*
671 1.1 fvdl * Set multicast receive filter. Also take care of promiscuous mode
672 1.1 fvdl * here (XXX).
673 1.1 fvdl */
674 1.1 fvdl void
675 1.1 fvdl ex_set_mc(sc)
676 1.1 fvdl register struct ex_softc *sc;
677 1.1 fvdl {
678 1.1 fvdl struct ifnet *ifp = &sc->sc_ethercom.ec_if;
679 1.1 fvdl struct ethercom *ec = &sc->sc_ethercom;
680 1.1 fvdl struct ether_multi *enm;
681 1.1 fvdl struct ether_multistep estep;
682 1.1 fvdl int i;
683 1.1 fvdl u_int16_t mask = FIL_INDIVIDUAL | FIL_BRDCST;
684 1.1 fvdl
685 1.1 fvdl if (ifp->if_flags & IFF_PROMISC)
686 1.1 fvdl mask |= FIL_PROMISC;
687 1.1 fvdl
688 1.1 fvdl if (!(ifp->if_flags & IFF_MULTICAST))
689 1.1 fvdl goto out;
690 1.1 fvdl
691 1.1 fvdl if (!(sc->ex_conf & EX_CONF_90XB) || ifp->if_flags & IFF_ALLMULTI) {
692 1.1 fvdl mask |= (ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0;
693 1.1 fvdl } else {
694 1.1 fvdl ETHER_FIRST_MULTI(estep, ec, enm);
695 1.1 fvdl while (enm != NULL) {
696 1.1 fvdl if (bcmp(enm->enm_addrlo, enm->enm_addrhi,
697 1.1 fvdl ETHER_ADDR_LEN) != 0)
698 1.1 fvdl goto out;
699 1.1 fvdl i = ex_mchash(enm->enm_addrlo);
700 1.1 fvdl bus_space_write_2(sc->sc_iot, sc->sc_ioh,
701 1.1 fvdl ELINK_COMMAND, ELINK_SETHASHFILBIT | i);
702 1.1 fvdl ETHER_NEXT_MULTI(estep, enm);
703 1.1 fvdl }
704 1.1 fvdl mask |= FIL_MULTIHASH;
705 1.1 fvdl }
706 1.1 fvdl out:
707 1.1 fvdl bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND,
708 1.1 fvdl SET_RX_FILTER | mask);
709 1.1 fvdl }
710 1.1 fvdl
711 1.1 fvdl
712 1.1 fvdl static void
713 1.1 fvdl ex_txstat(sc)
714 1.1 fvdl struct ex_softc *sc;
715 1.1 fvdl {
716 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
717 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
718 1.1 fvdl int i;
719 1.1 fvdl
720 1.1 fvdl /*
721 1.1 fvdl * We need to read+write TX_STATUS until we get a 0 status
722 1.1 fvdl * in order to turn off the interrupt flag.
723 1.1 fvdl */
724 1.1 fvdl while ((i = bus_space_read_1(iot, ioh, ELINK_TXSTATUS)) & TXS_COMPLETE) {
725 1.1 fvdl bus_space_write_1(iot, ioh, ELINK_TXSTATUS, 0x0);
726 1.1 fvdl
727 1.1 fvdl if (i & TXS_JABBER) {
728 1.1 fvdl ++sc->sc_ethercom.ec_if.if_oerrors;
729 1.1 fvdl if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG)
730 1.1 fvdl printf("%s: jabber (%x)\n",
731 1.1 fvdl sc->sc_dev.dv_xname, i);
732 1.1 fvdl ex_init(sc);
733 1.1 fvdl /* TODO: be more subtle here */
734 1.1 fvdl } else if (i & TXS_UNDERRUN) {
735 1.1 fvdl ++sc->sc_ethercom.ec_if.if_oerrors;
736 1.1 fvdl if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG)
737 1.1 fvdl printf("%s: fifo underrun (%x) @%d\n",
738 1.1 fvdl sc->sc_dev.dv_xname, i,
739 1.1 fvdl sc->tx_start_thresh);
740 1.1 fvdl if (sc->tx_succ_ok < 100)
741 1.1 fvdl sc->tx_start_thresh = min(ETHER_MAX_LEN,
742 1.1 fvdl sc->tx_start_thresh + 20);
743 1.1 fvdl sc->tx_succ_ok = 0;
744 1.1 fvdl ex_init(sc);
745 1.1 fvdl /* TODO: be more subtle here */
746 1.1 fvdl } else if (i & TXS_MAX_COLLISION) {
747 1.1 fvdl ++sc->sc_ethercom.ec_if.if_collisions;
748 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE);
749 1.1 fvdl sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE;
750 1.1 fvdl } else
751 1.1 fvdl sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127;
752 1.1 fvdl }
753 1.1 fvdl }
754 1.1 fvdl
755 1.1 fvdl int
756 1.1 fvdl ex_media_chg(ifp)
757 1.1 fvdl struct ifnet *ifp;
758 1.1 fvdl {
759 1.1 fvdl struct ex_softc *sc = ifp->if_softc;
760 1.1 fvdl
761 1.1 fvdl if (ifp->if_flags & IFF_UP)
762 1.1 fvdl ex_init(sc);
763 1.1 fvdl return 0;
764 1.1 fvdl }
765 1.1 fvdl
766 1.1 fvdl void
767 1.1 fvdl ex_set_media(sc)
768 1.1 fvdl struct ex_softc *sc;
769 1.1 fvdl {
770 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
771 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
772 1.1 fvdl int config0, config1;
773 1.1 fvdl
774 1.1 fvdl if (((sc->ex_conf & EX_CONF_MII) &&
775 1.1 fvdl (sc->ex_mii.mii_media_active & IFM_FDX))
776 1.1 fvdl || (!(sc->ex_conf & EX_CONF_MII) &&
777 1.1 fvdl (sc->ex_mii.mii_media.ifm_media & IFM_FDX))) {
778 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL,
779 1.1 fvdl MAC_CONTROL_FDX);
780 1.1 fvdl } else {
781 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 0);
782 1.1 fvdl }
783 1.1 fvdl
784 1.1 fvdl /*
785 1.1 fvdl * If the device has MII, select it, and then tell the
786 1.1 fvdl * PHY which media to use.
787 1.1 fvdl */
788 1.1 fvdl if (sc->ex_conf & EX_CONF_MII) {
789 1.1 fvdl GO_WINDOW(3);
790 1.1 fvdl
791 1.1 fvdl config0 = (u_int)bus_space_read_2(iot, ioh,
792 1.1 fvdl ELINK_W3_INTERNAL_CONFIG);
793 1.1 fvdl config1 = (u_int)bus_space_read_2(iot, ioh,
794 1.1 fvdl ELINK_W3_INTERNAL_CONFIG + 2);
795 1.1 fvdl
796 1.1 fvdl config1 = config1 & ~CONFIG_MEDIAMASK;
797 1.1 fvdl config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT);
798 1.1 fvdl
799 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0);
800 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, config1);
801 1.1 fvdl mii_mediachg(&sc->ex_mii);
802 1.1 fvdl return;
803 1.1 fvdl }
804 1.1 fvdl
805 1.1 fvdl GO_WINDOW(4);
806 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0);
807 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER);
808 1.1 fvdl delay(800);
809 1.1 fvdl
810 1.1 fvdl /*
811 1.1 fvdl * Now turn on the selected media/transceiver.
812 1.1 fvdl */
813 1.1 fvdl switch (IFM_SUBTYPE(sc->ex_mii.mii_media.ifm_cur->ifm_media)) {
814 1.1 fvdl case IFM_10_T:
815 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE,
816 1.1 fvdl JABBER_GUARD_ENABLE|LINKBEAT_ENABLE);
817 1.1 fvdl break;
818 1.1 fvdl
819 1.1 fvdl case IFM_10_2:
820 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER);
821 1.1 fvdl DELAY(800);
822 1.1 fvdl break;
823 1.1 fvdl
824 1.1 fvdl case IFM_100_TX:
825 1.1 fvdl case IFM_100_FX:
826 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE,
827 1.1 fvdl LINKBEAT_ENABLE);
828 1.1 fvdl DELAY(800);
829 1.1 fvdl break;
830 1.1 fvdl
831 1.1 fvdl case IFM_10_5:
832 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE,
833 1.1 fvdl SQE_ENABLE);
834 1.1 fvdl DELAY(800);
835 1.1 fvdl break;
836 1.1 fvdl
837 1.1 fvdl case IFM_MANUAL:
838 1.1 fvdl break;
839 1.1 fvdl
840 1.1 fvdl case IFM_NONE:
841 1.1 fvdl return;
842 1.1 fvdl
843 1.1 fvdl default:
844 1.1 fvdl panic("ex_set_media: impossible");
845 1.1 fvdl }
846 1.1 fvdl
847 1.1 fvdl GO_WINDOW(3);
848 1.1 fvdl config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG);
849 1.1 fvdl config1 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2);
850 1.1 fvdl
851 1.1 fvdl config1 = config1 & ~CONFIG_MEDIAMASK;
852 1.1 fvdl config1 |= (sc->ex_mii.mii_media.ifm_cur->ifm_data <<
853 1.1 fvdl CONFIG_MEDIAMASK_SHIFT);
854 1.1 fvdl
855 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0);
856 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, config1);
857 1.1 fvdl }
858 1.1 fvdl
859 1.1 fvdl /*
860 1.1 fvdl * Get currently-selected media from card.
861 1.1 fvdl * (if_media callback, may be called before interface is brought up).
862 1.1 fvdl */
863 1.1 fvdl void
864 1.1 fvdl ex_media_stat(ifp, req)
865 1.1 fvdl struct ifnet *ifp;
866 1.1 fvdl struct ifmediareq *req;
867 1.1 fvdl {
868 1.1 fvdl struct ex_softc *sc = ifp->if_softc;
869 1.1 fvdl
870 1.1 fvdl if (sc->ex_conf & EX_CONF_MII) {
871 1.1 fvdl mii_pollstat(&sc->ex_mii);
872 1.1 fvdl req->ifm_status = sc->ex_mii.mii_media_status;
873 1.1 fvdl req->ifm_active = sc->ex_mii.mii_media_active;
874 1.1 fvdl } else {
875 1.1 fvdl GO_WINDOW(4);
876 1.1 fvdl req->ifm_status = IFM_AVALID;
877 1.1 fvdl req->ifm_active = sc->ex_mii.mii_media.ifm_cur->ifm_media;
878 1.1 fvdl if (bus_space_read_2(sc->sc_iot, sc->sc_ioh,
879 1.1 fvdl ELINK_W4_MEDIA_TYPE) & LINKBEAT_DETECT)
880 1.1 fvdl req->ifm_status |= IFM_ACTIVE;
881 1.1 fvdl GO_WINDOW(1);
882 1.1 fvdl }
883 1.1 fvdl }
884 1.1 fvdl
885 1.1 fvdl
886 1.1 fvdl
887 1.1 fvdl /*
888 1.1 fvdl * Start outputting on the interface.
889 1.1 fvdl */
890 1.1 fvdl static void
891 1.1 fvdl ex_start(ifp)
892 1.1 fvdl struct ifnet *ifp;
893 1.1 fvdl {
894 1.1 fvdl struct ex_softc *sc = ifp->if_softc;
895 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
896 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
897 1.1 fvdl volatile struct ex_fraghdr *fr = NULL;
898 1.1 fvdl volatile struct ex_dpd *dpd = NULL, *prevdpd = NULL;
899 1.1 fvdl struct ex_txdesc *txp;
900 1.1 fvdl bus_dmamap_t dmamap;
901 1.1 fvdl int offset, totlen;
902 1.1 fvdl
903 1.1 fvdl if (sc->tx_head || sc->tx_free == NULL)
904 1.1 fvdl return;
905 1.1 fvdl
906 1.1 fvdl txp = NULL;
907 1.1 fvdl
908 1.1 fvdl /*
909 1.1 fvdl * We're finished if there is nothing more to add to the list or if
910 1.1 fvdl * we're all filled up with buffers to transmit.
911 1.1 fvdl */
912 1.1 fvdl while (ifp->if_snd.ifq_head != NULL && sc->tx_free != NULL) {
913 1.1 fvdl struct mbuf *mb_head;
914 1.1 fvdl int segment, error;
915 1.1 fvdl
916 1.1 fvdl /*
917 1.1 fvdl * Grab a packet to transmit.
918 1.1 fvdl */
919 1.1 fvdl IF_DEQUEUE(&ifp->if_snd, mb_head);
920 1.1 fvdl
921 1.1 fvdl /*
922 1.1 fvdl * Get pointer to next available tx desc.
923 1.1 fvdl */
924 1.1 fvdl txp = sc->tx_free;
925 1.1 fvdl sc->tx_free = txp->tx_next;
926 1.1 fvdl txp->tx_next = NULL;
927 1.1 fvdl dmamap = txp->tx_dmamap;
928 1.1 fvdl
929 1.1 fvdl /*
930 1.1 fvdl * Go through each of the mbufs in the chain and initialize
931 1.1 fvdl * the transmit buffer descriptors with the physical address
932 1.1 fvdl * and size of the mbuf.
933 1.1 fvdl */
934 1.1 fvdl reload:
935 1.1 fvdl error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap,
936 1.1 fvdl mb_head, BUS_DMA_NOWAIT);
937 1.1 fvdl switch (error) {
938 1.1 fvdl case 0:
939 1.1 fvdl /* Success. */
940 1.1 fvdl break;
941 1.1 fvdl
942 1.1 fvdl case EFBIG:
943 1.1 fvdl {
944 1.1 fvdl struct mbuf *mn;
945 1.1 fvdl
946 1.1 fvdl /*
947 1.1 fvdl * We ran out of segments. We have to recopy this
948 1.1 fvdl * mbuf chain first. Bail out if we can't get the
949 1.1 fvdl * new buffers.
950 1.1 fvdl */
951 1.1 fvdl printf("%s: too many segments, ", sc->sc_dev.dv_xname);
952 1.1 fvdl
953 1.1 fvdl MGETHDR(mn, M_DONTWAIT, MT_DATA);
954 1.1 fvdl if (mn == NULL) {
955 1.1 fvdl m_freem(mb_head);
956 1.1 fvdl printf("aborting\n");
957 1.1 fvdl goto out;
958 1.1 fvdl }
959 1.1 fvdl if (mb_head->m_pkthdr.len > MHLEN) {
960 1.1 fvdl MCLGET(mn, M_DONTWAIT);
961 1.1 fvdl if ((mn->m_flags & M_EXT) == 0) {
962 1.1 fvdl m_freem(mn);
963 1.1 fvdl m_freem(mb_head);
964 1.1 fvdl printf("aborting\n");
965 1.1 fvdl goto out;
966 1.1 fvdl }
967 1.1 fvdl }
968 1.1 fvdl m_copydata(mb_head, 0, mb_head->m_pkthdr.len,
969 1.1 fvdl mtod(mn, caddr_t));
970 1.1 fvdl mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len;
971 1.1 fvdl m_freem(mb_head);
972 1.1 fvdl mb_head = mn;
973 1.1 fvdl printf("retrying\n");
974 1.1 fvdl goto reload;
975 1.1 fvdl }
976 1.1 fvdl
977 1.1 fvdl default:
978 1.1 fvdl /*
979 1.1 fvdl * Some other problem; report it.
980 1.1 fvdl */
981 1.1 fvdl printf("%s: can't load mbuf chain, error = %d\n",
982 1.1 fvdl sc->sc_dev.dv_xname, error);
983 1.1 fvdl m_freem(mb_head);
984 1.1 fvdl goto out;
985 1.1 fvdl }
986 1.1 fvdl
987 1.1 fvdl fr = &txp->tx_dpd->dpd_frags[0];
988 1.1 fvdl totlen = 0;
989 1.1 fvdl for (segment = 0; segment < dmamap->dm_nsegs; segment++, fr++) {
990 1.9 thorpej fr->fr_addr = htopci(dmamap->dm_segs[segment].ds_addr);
991 1.9 thorpej fr->fr_len = htopci(dmamap->dm_segs[segment].ds_len);
992 1.9 thorpej totlen += dmamap->dm_segs[segment].ds_len;
993 1.1 fvdl }
994 1.1 fvdl fr--;
995 1.9 thorpej fr->fr_len |= htopci(EX_FR_LAST);
996 1.1 fvdl txp->tx_mbhead = mb_head;
997 1.1 fvdl
998 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize,
999 1.1 fvdl BUS_DMASYNC_PREWRITE);
1000 1.1 fvdl
1001 1.1 fvdl dpd = txp->tx_dpd;
1002 1.1 fvdl dpd->dpd_nextptr = 0;
1003 1.9 thorpej dpd->dpd_fsh = htopci(totlen);
1004 1.1 fvdl
1005 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1006 1.1 fvdl ((caddr_t)dpd - (caddr_t)sc->sc_dpd),
1007 1.1 fvdl sizeof (struct ex_dpd),
1008 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1009 1.1 fvdl
1010 1.1 fvdl /*
1011 1.1 fvdl * No need to stall the download engine, we know it's
1012 1.1 fvdl * not busy right now.
1013 1.1 fvdl *
1014 1.1 fvdl * Fix up pointers in both the "soft" tx and the physical
1015 1.1 fvdl * tx list.
1016 1.1 fvdl */
1017 1.1 fvdl if (sc->tx_head != NULL) {
1018 1.1 fvdl prevdpd = sc->tx_tail->tx_dpd;
1019 1.1 fvdl offset = ((caddr_t)prevdpd - (caddr_t)sc->sc_dpd);
1020 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1021 1.1 fvdl offset, sizeof (struct ex_dpd),
1022 1.1 fvdl BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1023 1.9 thorpej prevdpd->dpd_nextptr = htopci(DPD_DMADDR(sc, txp));
1024 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1025 1.1 fvdl offset, sizeof (struct ex_dpd),
1026 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1027 1.1 fvdl sc->tx_tail->tx_next = txp;
1028 1.1 fvdl sc->tx_tail = txp;
1029 1.1 fvdl } else {
1030 1.1 fvdl sc->tx_tail = sc->tx_head = txp;
1031 1.1 fvdl }
1032 1.1 fvdl
1033 1.1 fvdl #if NBPFILTER > 0
1034 1.1 fvdl /*
1035 1.1 fvdl * Pass packet to bpf if there is a listener.
1036 1.1 fvdl */
1037 1.1 fvdl if (ifp->if_bpf)
1038 1.1 fvdl bpf_mtap(ifp->if_bpf, mb_head);
1039 1.1 fvdl #endif
1040 1.1 fvdl }
1041 1.1 fvdl out:
1042 1.1 fvdl if (sc->tx_head) {
1043 1.9 thorpej sc->tx_tail->tx_dpd->dpd_fsh |= htopci(EX_DPD_DNIND);
1044 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1045 1.1 fvdl ((caddr_t)sc->tx_tail->tx_dpd - (caddr_t)sc->sc_dpd),
1046 1.1 fvdl sizeof (struct ex_dpd),
1047 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1048 1.1 fvdl ifp->if_flags |= IFF_OACTIVE;
1049 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_DNUNSTALL);
1050 1.1 fvdl bus_space_write_4(iot, ioh, ELINK_DNLISTPTR,
1051 1.1 fvdl DPD_DMADDR(sc, sc->tx_head));
1052 1.3 drochner
1053 1.3 drochner /* trigger watchdog */
1054 1.3 drochner ifp->if_timer = 5;
1055 1.1 fvdl }
1056 1.1 fvdl }
1057 1.1 fvdl
1058 1.1 fvdl
1059 1.1 fvdl int
1060 1.1 fvdl ex_intr(arg)
1061 1.1 fvdl void *arg;
1062 1.1 fvdl {
1063 1.1 fvdl struct ex_softc *sc = arg;
1064 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1065 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1066 1.1 fvdl u_int16_t stat;
1067 1.1 fvdl int ret = 0;
1068 1.1 fvdl struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1069 1.1 fvdl
1070 1.1 fvdl for (;;) {
1071 1.1 fvdl stat = bus_space_read_2(iot, ioh, ELINK_STATUS);
1072 1.1 fvdl if (!(stat & S_MASK))
1073 1.1 fvdl break;
1074 1.1 fvdl /*
1075 1.1 fvdl * Acknowledge interrupts.
1076 1.1 fvdl */
1077 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR |
1078 1.1 fvdl (stat & S_MASK));
1079 1.1 fvdl ret = 1;
1080 1.1 fvdl if (stat & S_HOST_ERROR) {
1081 1.1 fvdl printf("%s: adapter failure (%x)\n",
1082 1.1 fvdl sc->sc_dev.dv_xname, stat);
1083 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND,
1084 1.1 fvdl C_INTR_LATCH);
1085 1.1 fvdl ex_reset(sc);
1086 1.1 fvdl ex_init(sc);
1087 1.1 fvdl return 1;
1088 1.1 fvdl }
1089 1.1 fvdl if (stat & S_TX_COMPLETE) {
1090 1.1 fvdl ex_txstat(sc);
1091 1.1 fvdl }
1092 1.1 fvdl if (stat & S_UPD_STATS) {
1093 1.1 fvdl ex_getstats(sc);
1094 1.1 fvdl }
1095 1.1 fvdl if (stat & S_DN_COMPLETE) {
1096 1.1 fvdl struct ex_txdesc *txp, *ptxp = NULL;
1097 1.1 fvdl bus_dmamap_t txmap;
1098 1.3 drochner
1099 1.3 drochner /* reset watchdog timer, was set in ex_start() */
1100 1.3 drochner ifp->if_timer = 0;
1101 1.3 drochner
1102 1.1 fvdl for (txp = sc->tx_head; txp != NULL;
1103 1.1 fvdl txp = txp->tx_next) {
1104 1.1 fvdl bus_dmamap_sync(sc->sc_dmat,
1105 1.1 fvdl sc->sc_dpd_dmamap,
1106 1.1 fvdl (caddr_t)txp->tx_dpd - (caddr_t)sc->sc_dpd,
1107 1.1 fvdl sizeof (struct ex_dpd),
1108 1.1 fvdl BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1109 1.1 fvdl if (txp->tx_mbhead != NULL) {
1110 1.1 fvdl txmap = txp->tx_dmamap;
1111 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, txmap,
1112 1.1 fvdl 0, txmap->dm_mapsize,
1113 1.1 fvdl BUS_DMASYNC_POSTWRITE);
1114 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, txmap);
1115 1.1 fvdl m_freem(txp->tx_mbhead);
1116 1.1 fvdl txp->tx_mbhead = NULL;
1117 1.1 fvdl }
1118 1.1 fvdl ptxp = txp;
1119 1.1 fvdl }
1120 1.1 fvdl
1121 1.1 fvdl /*
1122 1.1 fvdl * Move finished tx buffers back to the tx free list.
1123 1.1 fvdl */
1124 1.1 fvdl if (sc->tx_free) {
1125 1.1 fvdl sc->tx_ftail->tx_next = sc->tx_head;
1126 1.1 fvdl sc->tx_ftail = ptxp;
1127 1.1 fvdl } else
1128 1.1 fvdl sc->tx_ftail = sc->tx_free = sc->tx_head;
1129 1.1 fvdl
1130 1.1 fvdl sc->tx_head = sc->tx_tail = NULL;
1131 1.1 fvdl ifp->if_flags &= ~IFF_OACTIVE;
1132 1.1 fvdl }
1133 1.1 fvdl
1134 1.1 fvdl if (stat & S_UP_COMPLETE) {
1135 1.1 fvdl struct ex_rxdesc *rxd;
1136 1.1 fvdl struct mbuf *m;
1137 1.1 fvdl struct ex_upd *upd;
1138 1.1 fvdl bus_dmamap_t rxmap;
1139 1.1 fvdl u_int32_t pktstat;
1140 1.1 fvdl
1141 1.1 fvdl rcvloop:
1142 1.1 fvdl rxd = sc->rx_head;
1143 1.1 fvdl rxmap = rxd->rx_dmamap;
1144 1.1 fvdl m = rxd->rx_mbhead;
1145 1.1 fvdl upd = rxd->rx_upd;
1146 1.9 thorpej pktstat = pcitoh(upd->upd_pktstatus);
1147 1.1 fvdl
1148 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, rxmap, 0,
1149 1.1 fvdl rxmap->dm_mapsize,
1150 1.1 fvdl BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1151 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap,
1152 1.1 fvdl ((caddr_t)upd - (caddr_t)sc->sc_upd),
1153 1.1 fvdl sizeof (struct ex_upd),
1154 1.1 fvdl BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1155 1.1 fvdl
1156 1.1 fvdl if (pktstat & EX_UPD_COMPLETE) {
1157 1.1 fvdl /*
1158 1.1 fvdl * Remove first packet from the chain.
1159 1.1 fvdl */
1160 1.1 fvdl sc->rx_head = rxd->rx_next;
1161 1.1 fvdl rxd->rx_next = NULL;
1162 1.1 fvdl
1163 1.1 fvdl /*
1164 1.1 fvdl * Add a new buffer to the receive chain.
1165 1.1 fvdl * If this fails, the old buffer is recycled
1166 1.1 fvdl * instead.
1167 1.1 fvdl */
1168 1.1 fvdl if (ex_add_rxbuf(sc, rxd) == 0) {
1169 1.1 fvdl struct ether_header *eh;
1170 1.1 fvdl u_int16_t total_len;
1171 1.1 fvdl
1172 1.1 fvdl
1173 1.1 fvdl if (pktstat & EX_UPD_ERR) {
1174 1.1 fvdl ifp->if_ierrors++;
1175 1.1 fvdl m_freem(m);
1176 1.1 fvdl goto rcvloop;
1177 1.1 fvdl }
1178 1.1 fvdl
1179 1.1 fvdl total_len = pktstat & EX_UPD_PKTLENMASK;
1180 1.1 fvdl if (total_len <
1181 1.1 fvdl sizeof(struct ether_header)) {
1182 1.1 fvdl m_freem(m);
1183 1.1 fvdl goto rcvloop;
1184 1.1 fvdl }
1185 1.1 fvdl m->m_pkthdr.rcvif = ifp;
1186 1.1 fvdl m->m_pkthdr.len = m->m_len =
1187 1.1 fvdl total_len -
1188 1.1 fvdl sizeof(struct ether_header);
1189 1.1 fvdl eh = mtod(m, struct ether_header *);
1190 1.1 fvdl #if NBPFILTER > 0
1191 1.1 fvdl if (ifp->if_bpf) {
1192 1.1 fvdl bpf_tap(ifp->if_bpf,
1193 1.1 fvdl mtod(m, caddr_t),
1194 1.1 fvdl total_len);
1195 1.1 fvdl /*
1196 1.1 fvdl * Only pass this packet up
1197 1.1 fvdl * if it is for us.
1198 1.1 fvdl */
1199 1.1 fvdl if ((ifp->if_flags &
1200 1.1 fvdl IFF_PROMISC) &&
1201 1.1 fvdl (eh->ether_dhost[0] & 1)
1202 1.1 fvdl == 0 &&
1203 1.1 fvdl bcmp(eh->ether_dhost,
1204 1.1 fvdl LLADDR(ifp->if_sadl),
1205 1.1 fvdl sizeof(eh->ether_dhost))
1206 1.1 fvdl != 0) {
1207 1.1 fvdl m_freem(m);
1208 1.1 fvdl goto rcvloop;
1209 1.1 fvdl }
1210 1.1 fvdl }
1211 1.1 fvdl #endif /* NBPFILTER > 0 */
1212 1.1 fvdl m->m_data +=
1213 1.1 fvdl sizeof(struct ether_header);
1214 1.1 fvdl ether_input(ifp, eh, m);
1215 1.1 fvdl }
1216 1.1 fvdl goto rcvloop;
1217 1.1 fvdl }
1218 1.1 fvdl /*
1219 1.1 fvdl * Just in case we filled up all UPDs and the DMA engine
1220 1.3 drochner * stalled. We could be more subtle about this.
1221 1.1 fvdl */
1222 1.3 drochner if (bus_space_read_4(iot, ioh, ELINK_UPLISTPTR) == 0) {
1223 1.3 drochner printf("%s: uplistptr was 0\n",
1224 1.3 drochner sc->sc_dev.dv_xname);
1225 1.3 drochner ex_init(sc);
1226 1.3 drochner } else if (bus_space_read_4(iot, ioh, ELINK_UPPKTSTATUS)
1227 1.3 drochner & 0x2000) {
1228 1.3 drochner printf("%s: receive stalled\n",
1229 1.3 drochner sc->sc_dev.dv_xname);
1230 1.3 drochner bus_space_write_2(iot, ioh, ELINK_COMMAND,
1231 1.3 drochner ELINK_UPUNSTALL);
1232 1.3 drochner }
1233 1.1 fvdl }
1234 1.1 fvdl }
1235 1.1 fvdl if (ret) {
1236 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH);
1237 1.1 fvdl if (ifp->if_snd.ifq_head != NULL)
1238 1.1 fvdl ex_start(ifp);
1239 1.1 fvdl }
1240 1.1 fvdl return ret;
1241 1.1 fvdl }
1242 1.1 fvdl
1243 1.1 fvdl int
1244 1.1 fvdl ex_ioctl(ifp, cmd, data)
1245 1.1 fvdl register struct ifnet *ifp;
1246 1.1 fvdl u_long cmd;
1247 1.1 fvdl caddr_t data;
1248 1.1 fvdl {
1249 1.1 fvdl struct ex_softc *sc = ifp->if_softc;
1250 1.1 fvdl struct ifaddr *ifa = (struct ifaddr *)data;
1251 1.1 fvdl struct ifreq *ifr = (struct ifreq *)data;
1252 1.1 fvdl int s, error = 0;
1253 1.1 fvdl
1254 1.1 fvdl s = splnet();
1255 1.1 fvdl
1256 1.1 fvdl switch (cmd) {
1257 1.1 fvdl
1258 1.1 fvdl case SIOCSIFADDR:
1259 1.1 fvdl ifp->if_flags |= IFF_UP;
1260 1.1 fvdl switch (ifa->ifa_addr->sa_family) {
1261 1.1 fvdl #ifdef INET
1262 1.1 fvdl case AF_INET:
1263 1.1 fvdl ex_init(sc);
1264 1.1 fvdl arp_ifinit(&sc->sc_ethercom.ec_if, ifa);
1265 1.1 fvdl break;
1266 1.1 fvdl #endif
1267 1.1 fvdl #ifdef NS
1268 1.1 fvdl case AF_NS:
1269 1.1 fvdl {
1270 1.1 fvdl register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
1271 1.1 fvdl
1272 1.1 fvdl if (ns_nullhost(*ina))
1273 1.1 fvdl ina->x_host = *(union ns_host *)
1274 1.1 fvdl LLADDR(ifp->if_sadl);
1275 1.1 fvdl else
1276 1.1 fvdl bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl),
1277 1.1 fvdl ifp->if_addrlen);
1278 1.1 fvdl /* Set new address. */
1279 1.1 fvdl ex_init(sc);
1280 1.1 fvdl break;
1281 1.1 fvdl }
1282 1.1 fvdl #endif
1283 1.1 fvdl default:
1284 1.1 fvdl ex_init(sc);
1285 1.1 fvdl break;
1286 1.1 fvdl }
1287 1.1 fvdl break;
1288 1.1 fvdl case SIOCSIFMEDIA:
1289 1.1 fvdl case SIOCGIFMEDIA:
1290 1.1 fvdl error = ifmedia_ioctl(ifp, ifr, &sc->ex_mii.mii_media, cmd);
1291 1.1 fvdl break;
1292 1.1 fvdl
1293 1.1 fvdl case SIOCSIFFLAGS:
1294 1.1 fvdl if ((ifp->if_flags & IFF_UP) == 0 &&
1295 1.1 fvdl (ifp->if_flags & IFF_RUNNING) != 0) {
1296 1.1 fvdl /*
1297 1.1 fvdl * If interface is marked down and it is running, then
1298 1.1 fvdl * stop it.
1299 1.1 fvdl */
1300 1.1 fvdl ex_stop(sc);
1301 1.1 fvdl ifp->if_flags &= ~IFF_RUNNING;
1302 1.1 fvdl } else if ((ifp->if_flags & IFF_UP) != 0 &&
1303 1.1 fvdl (ifp->if_flags & IFF_RUNNING) == 0) {
1304 1.1 fvdl /*
1305 1.1 fvdl * If interface is marked up and it is stopped, then
1306 1.1 fvdl * start it.
1307 1.1 fvdl */
1308 1.1 fvdl ex_init(sc);
1309 1.4 thorpej } else if ((ifp->if_flags & IFF_UP) != 0) {
1310 1.4 thorpej /*
1311 1.4 thorpej * Deal with other flags that change hardware
1312 1.4 thorpej * state, i.e. IFF_PROMISC.
1313 1.4 thorpej */
1314 1.1 fvdl ex_set_mc(sc);
1315 1.4 thorpej }
1316 1.1 fvdl break;
1317 1.1 fvdl
1318 1.1 fvdl case SIOCADDMULTI:
1319 1.1 fvdl case SIOCDELMULTI:
1320 1.1 fvdl error = (cmd == SIOCADDMULTI) ?
1321 1.1 fvdl ether_addmulti(ifr, &sc->sc_ethercom) :
1322 1.1 fvdl ether_delmulti(ifr, &sc->sc_ethercom);
1323 1.1 fvdl
1324 1.1 fvdl if (error == ENETRESET) {
1325 1.1 fvdl /*
1326 1.1 fvdl * Multicast list has changed; set the hardware filter
1327 1.1 fvdl * accordingly.
1328 1.1 fvdl */
1329 1.1 fvdl ex_set_mc(sc);
1330 1.1 fvdl error = 0;
1331 1.1 fvdl }
1332 1.1 fvdl break;
1333 1.1 fvdl
1334 1.1 fvdl default:
1335 1.1 fvdl error = EINVAL;
1336 1.1 fvdl break;
1337 1.1 fvdl }
1338 1.1 fvdl
1339 1.1 fvdl splx(s);
1340 1.1 fvdl return (error);
1341 1.1 fvdl }
1342 1.1 fvdl
1343 1.1 fvdl void
1344 1.1 fvdl ex_getstats(sc)
1345 1.1 fvdl struct ex_softc *sc;
1346 1.1 fvdl {
1347 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1348 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1349 1.1 fvdl struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1350 1.1 fvdl u_int8_t upperok;
1351 1.1 fvdl
1352 1.1 fvdl GO_WINDOW(6);
1353 1.1 fvdl upperok = bus_space_read_1(iot, ioh, UPPER_FRAMES_OK);
1354 1.1 fvdl ifp->if_ipackets += bus_space_read_1(iot, ioh, RX_FRAMES_OK);
1355 1.1 fvdl ifp->if_ipackets += (upperok & 0x03) << 8;
1356 1.1 fvdl ifp->if_opackets += bus_space_read_1(iot, ioh, TX_FRAMES_OK);
1357 1.1 fvdl ifp->if_opackets += (upperok & 0x30) << 4;
1358 1.1 fvdl ifp->if_ierrors += bus_space_read_1(iot, ioh, RX_OVERRUNS);
1359 1.1 fvdl ifp->if_oerrors += bus_space_read_1(iot, ioh, TX_DEFERRALS);
1360 1.1 fvdl ifp->if_collisions += bus_space_read_1(iot, ioh, TX_COLLISIONS);
1361 1.1 fvdl /*
1362 1.1 fvdl * There seems to be no way to get the exact number of collisions,
1363 1.1 fvdl * this is the number that occured at the very least.
1364 1.1 fvdl */
1365 1.1 fvdl ifp->if_collisions += 2 * bus_space_read_1(iot, ioh,
1366 1.1 fvdl TX_AFTER_X_COLLISIONS);
1367 1.1 fvdl ifp->if_ibytes += bus_space_read_2(iot, ioh, RX_TOTAL_OK);
1368 1.1 fvdl ifp->if_obytes += bus_space_read_2(iot, ioh, TX_TOTAL_OK);
1369 1.1 fvdl
1370 1.1 fvdl /*
1371 1.1 fvdl * Clear the following to avoid stats overflow interrupts
1372 1.1 fvdl */
1373 1.1 fvdl bus_space_read_1(iot, ioh, TX_AFTER_1_COLLISION);
1374 1.1 fvdl bus_space_read_1(iot, ioh, TX_NO_SQE);
1375 1.1 fvdl bus_space_read_1(iot, ioh, TX_CD_LOST);
1376 1.1 fvdl GO_WINDOW(4);
1377 1.1 fvdl bus_space_read_1(iot, ioh, ELINK_W4_BADSSD);
1378 1.1 fvdl upperok = bus_space_read_1(iot, ioh, ELINK_W4_UBYTESOK);
1379 1.1 fvdl ifp->if_ibytes += (upperok & 0x0f) << 16;
1380 1.1 fvdl ifp->if_obytes += (upperok & 0xf0) << 12;
1381 1.1 fvdl GO_WINDOW(1);
1382 1.1 fvdl }
1383 1.1 fvdl
1384 1.1 fvdl void
1385 1.1 fvdl ex_printstats(sc)
1386 1.1 fvdl struct ex_softc *sc;
1387 1.1 fvdl {
1388 1.1 fvdl struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1389 1.1 fvdl
1390 1.1 fvdl ex_getstats(sc);
1391 1.1 fvdl printf("in %ld out %ld ierror %ld oerror %ld ibytes %ld obytes %ld\n",
1392 1.1 fvdl ifp->if_ipackets, ifp->if_opackets, ifp->if_ierrors,
1393 1.1 fvdl ifp->if_oerrors, ifp->if_ibytes, ifp->if_obytes);
1394 1.1 fvdl }
1395 1.1 fvdl
1396 1.1 fvdl void
1397 1.1 fvdl ex_tick(arg)
1398 1.1 fvdl void *arg;
1399 1.1 fvdl {
1400 1.1 fvdl struct ex_softc *sc = arg;
1401 1.1 fvdl int s = splnet();
1402 1.1 fvdl
1403 1.1 fvdl if (sc->ex_conf & EX_CONF_MII)
1404 1.1 fvdl mii_tick(&sc->ex_mii);
1405 1.1 fvdl
1406 1.1 fvdl if (!(bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, ELINK_STATUS)
1407 1.1 fvdl & S_COMMAND_IN_PROGRESS))
1408 1.1 fvdl ex_getstats(sc);
1409 1.1 fvdl
1410 1.1 fvdl splx(s);
1411 1.1 fvdl
1412 1.1 fvdl timeout(ex_tick, sc, hz);
1413 1.1 fvdl }
1414 1.1 fvdl
1415 1.1 fvdl
1416 1.1 fvdl void
1417 1.1 fvdl ex_reset(sc)
1418 1.1 fvdl struct ex_softc *sc;
1419 1.1 fvdl {
1420 1.1 fvdl bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, GLOBAL_RESET);
1421 1.10 dean delay(400);
1422 1.1 fvdl ex_waitcmd(sc);
1423 1.1 fvdl }
1424 1.1 fvdl
1425 1.1 fvdl void
1426 1.1 fvdl ex_watchdog(ifp)
1427 1.1 fvdl struct ifnet *ifp;
1428 1.1 fvdl {
1429 1.1 fvdl struct ex_softc *sc = ifp->if_softc;
1430 1.1 fvdl
1431 1.1 fvdl log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
1432 1.1 fvdl ++sc->sc_ethercom.ec_if.if_oerrors;
1433 1.1 fvdl
1434 1.1 fvdl ex_reset(sc);
1435 1.1 fvdl ex_init(sc);
1436 1.1 fvdl }
1437 1.1 fvdl
1438 1.1 fvdl void
1439 1.1 fvdl ex_stop(sc)
1440 1.1 fvdl struct ex_softc *sc;
1441 1.1 fvdl {
1442 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1443 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1444 1.1 fvdl struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1445 1.1 fvdl struct ex_txdesc *tx;
1446 1.1 fvdl struct ex_rxdesc *rx;
1447 1.1 fvdl int i;
1448 1.1 fvdl
1449 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE);
1450 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE);
1451 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER);
1452 1.1 fvdl
1453 1.1 fvdl for (tx = sc->tx_head ; tx != NULL; tx = tx->tx_next) {
1454 1.1 fvdl if (tx->tx_mbhead == NULL)
1455 1.1 fvdl continue;
1456 1.1 fvdl m_freem(tx->tx_mbhead);
1457 1.1 fvdl tx->tx_mbhead = NULL;
1458 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, tx->tx_dmamap);
1459 1.1 fvdl tx->tx_dpd->dpd_fsh = tx->tx_dpd->dpd_nextptr = 0;
1460 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1461 1.1 fvdl ((caddr_t)tx->tx_dpd - (caddr_t)sc->sc_dpd),
1462 1.1 fvdl sizeof (struct ex_dpd),
1463 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1464 1.1 fvdl }
1465 1.1 fvdl sc->tx_tail = sc->tx_head = NULL;
1466 1.1 fvdl ex_init_txdescs(sc);
1467 1.1 fvdl
1468 1.1 fvdl sc->rx_tail = sc->rx_head = 0;
1469 1.1 fvdl for (i = 0; i < EX_NUPD; i++) {
1470 1.1 fvdl rx = &sc->sc_rxdescs[i];
1471 1.1 fvdl if (rx->rx_mbhead != NULL) {
1472 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, rx->rx_dmamap);
1473 1.1 fvdl m_freem(rx->rx_mbhead);
1474 1.1 fvdl rx->rx_mbhead = NULL;
1475 1.1 fvdl }
1476 1.1 fvdl ex_add_rxbuf(sc, rx);
1477 1.1 fvdl }
1478 1.1 fvdl
1479 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH);
1480 1.1 fvdl
1481 1.1 fvdl untimeout(ex_tick, sc);
1482 1.1 fvdl
1483 1.1 fvdl ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1484 1.1 fvdl ifp->if_timer = 0;
1485 1.1 fvdl }
1486 1.1 fvdl
1487 1.1 fvdl static void
1488 1.1 fvdl ex_init_txdescs(sc)
1489 1.1 fvdl struct ex_softc *sc;
1490 1.1 fvdl {
1491 1.1 fvdl int i;
1492 1.1 fvdl
1493 1.1 fvdl for (i = 0; i < EX_NDPD; i++) {
1494 1.1 fvdl sc->sc_txdescs[i].tx_dmamap = sc->sc_tx_dmamaps[i];
1495 1.1 fvdl sc->sc_txdescs[i].tx_dpd = &sc->sc_dpd[i];
1496 1.1 fvdl if (i < EX_NDPD - 1)
1497 1.1 fvdl sc->sc_txdescs[i].tx_next = &sc->sc_txdescs[i + 1];
1498 1.1 fvdl else
1499 1.1 fvdl sc->sc_txdescs[i].tx_next = NULL;
1500 1.1 fvdl }
1501 1.1 fvdl sc->tx_free = &sc->sc_txdescs[0];
1502 1.1 fvdl sc->tx_ftail = &sc->sc_txdescs[EX_NDPD-1];
1503 1.1 fvdl }
1504 1.1 fvdl
1505 1.1 fvdl
1506 1.1 fvdl /*
1507 1.1 fvdl * Before reboots, reset card completely.
1508 1.1 fvdl */
1509 1.1 fvdl static void
1510 1.1 fvdl ex_shutdown(arg)
1511 1.1 fvdl void *arg;
1512 1.1 fvdl {
1513 1.1 fvdl register struct ex_softc *sc = arg;
1514 1.1 fvdl
1515 1.1 fvdl ex_stop(sc);
1516 1.1 fvdl }
1517 1.1 fvdl
1518 1.1 fvdl /*
1519 1.1 fvdl * Read EEPROM data.
1520 1.1 fvdl * XXX what to do if EEPROM doesn't unbusy?
1521 1.1 fvdl */
1522 1.1 fvdl u_int16_t
1523 1.1 fvdl ex_read_eeprom(sc, offset)
1524 1.1 fvdl struct ex_softc *sc;
1525 1.1 fvdl int offset;
1526 1.1 fvdl {
1527 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1528 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1529 1.1 fvdl u_int16_t data = 0;
1530 1.1 fvdl
1531 1.1 fvdl GO_WINDOW(0);
1532 1.1 fvdl if (ex_eeprom_busy(sc))
1533 1.1 fvdl goto out;
1534 1.8 jonathan switch (sc->ex_bustype) {
1535 1.8 jonathan case EX_BUS_PCI:
1536 1.8 jonathan bus_space_write_1(iot, ioh, ELINK_W0_EEPROM_COMMAND,
1537 1.8 jonathan READ_EEPROM | (offset & 0x3f));
1538 1.8 jonathan break;
1539 1.8 jonathan case EX_BUS_CARDBUS:
1540 1.8 jonathan bus_space_write_2(iot, ioh, ELINK_W0_EEPROM_COMMAND,
1541 1.8 jonathan 0x230 + (offset & 0x3f));
1542 1.8 jonathan break;
1543 1.8 jonathan }
1544 1.1 fvdl if (ex_eeprom_busy(sc))
1545 1.1 fvdl goto out;
1546 1.1 fvdl data = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_DATA);
1547 1.1 fvdl out:
1548 1.1 fvdl return data;
1549 1.1 fvdl }
1550 1.1 fvdl
1551 1.1 fvdl static int
1552 1.1 fvdl ex_eeprom_busy(sc)
1553 1.1 fvdl struct ex_softc *sc;
1554 1.1 fvdl {
1555 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1556 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1557 1.1 fvdl int i = 100;
1558 1.1 fvdl
1559 1.1 fvdl while (i--) {
1560 1.1 fvdl if (!(bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND) &
1561 1.1 fvdl EEPROM_BUSY))
1562 1.1 fvdl return 0;
1563 1.1 fvdl delay(100);
1564 1.1 fvdl }
1565 1.1 fvdl printf("\n%s: eeprom stays busy.\n", sc->sc_dev.dv_xname);
1566 1.1 fvdl return (1);
1567 1.1 fvdl }
1568 1.1 fvdl
1569 1.1 fvdl /*
1570 1.1 fvdl * Create a new rx buffer and add it to the 'soft' rx list.
1571 1.1 fvdl */
1572 1.1 fvdl static int
1573 1.1 fvdl ex_add_rxbuf(sc, rxd)
1574 1.1 fvdl struct ex_softc *sc;
1575 1.1 fvdl struct ex_rxdesc *rxd;
1576 1.1 fvdl {
1577 1.1 fvdl struct mbuf *m, *oldm;
1578 1.1 fvdl bus_dmamap_t rxmap;
1579 1.1 fvdl int error, rval = 0;
1580 1.1 fvdl
1581 1.1 fvdl oldm = rxd->rx_mbhead;
1582 1.1 fvdl rxmap = rxd->rx_dmamap;
1583 1.1 fvdl
1584 1.1 fvdl MGETHDR(m, M_DONTWAIT, MT_DATA);
1585 1.1 fvdl if (m != NULL) {
1586 1.1 fvdl MCLGET(m, M_DONTWAIT);
1587 1.1 fvdl if ((m->m_flags & M_EXT) == 0) {
1588 1.1 fvdl m_freem(m);
1589 1.1 fvdl if (oldm == NULL)
1590 1.1 fvdl return 1;
1591 1.1 fvdl m = oldm;
1592 1.1 fvdl m->m_data = m->m_ext.ext_buf;
1593 1.1 fvdl rval = 1;
1594 1.1 fvdl }
1595 1.1 fvdl } else {
1596 1.1 fvdl if (oldm == NULL)
1597 1.1 fvdl return 1;
1598 1.1 fvdl m = oldm;
1599 1.1 fvdl m->m_data = m->m_ext.ext_buf;
1600 1.1 fvdl rval = 1;
1601 1.1 fvdl }
1602 1.1 fvdl
1603 1.1 fvdl /*
1604 1.1 fvdl * Setup the DMA map for this receive buffer.
1605 1.1 fvdl */
1606 1.1 fvdl if (m != oldm) {
1607 1.1 fvdl if (oldm != NULL)
1608 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, rxmap);
1609 1.1 fvdl error = bus_dmamap_load(sc->sc_dmat, rxmap,
1610 1.1 fvdl m->m_ext.ext_buf, MCLBYTES, NULL, BUS_DMA_NOWAIT);
1611 1.1 fvdl if (error) {
1612 1.1 fvdl printf("%s: can't load rx buffer, error = %d\n",
1613 1.1 fvdl sc->sc_dev.dv_xname, error);
1614 1.1 fvdl panic("ex_add_rxbuf"); /* XXX */
1615 1.1 fvdl }
1616 1.1 fvdl }
1617 1.1 fvdl
1618 1.1 fvdl /*
1619 1.1 fvdl * Align for data after 14 byte header.
1620 1.1 fvdl */
1621 1.1 fvdl m->m_data += 2;
1622 1.1 fvdl
1623 1.1 fvdl rxd->rx_mbhead = m;
1624 1.9 thorpej rxd->rx_upd->upd_pktstatus = htopci(MCLBYTES - 2);
1625 1.9 thorpej rxd->rx_upd->upd_frags[0].fr_addr =
1626 1.9 thorpej htopci(rxmap->dm_segs[0].ds_addr + 2);
1627 1.1 fvdl rxd->rx_upd->upd_nextptr = 0;
1628 1.1 fvdl
1629 1.1 fvdl /*
1630 1.1 fvdl * Attach it to the end of the list.
1631 1.1 fvdl */
1632 1.1 fvdl if (sc->rx_head != NULL) {
1633 1.1 fvdl sc->rx_tail->rx_next = rxd;
1634 1.9 thorpej sc->rx_tail->rx_upd->upd_nextptr = htopci(sc->sc_upddma +
1635 1.9 thorpej ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd));
1636 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap,
1637 1.1 fvdl (caddr_t)sc->rx_tail->rx_upd - (caddr_t)sc->sc_upd,
1638 1.1 fvdl sizeof (struct ex_upd),
1639 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1640 1.1 fvdl } else {
1641 1.1 fvdl sc->rx_head = rxd;
1642 1.1 fvdl }
1643 1.1 fvdl sc->rx_tail = rxd;
1644 1.1 fvdl
1645 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, rxmap, 0, rxmap->dm_mapsize,
1646 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1647 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap,
1648 1.1 fvdl ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd),
1649 1.1 fvdl sizeof (struct ex_upd), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1650 1.1 fvdl return (rval);
1651 1.1 fvdl }
1652 1.1 fvdl
1653 1.1 fvdl void
1654 1.1 fvdl ex_mii_setbit(v, bit)
1655 1.1 fvdl void *v;
1656 1.1 fvdl u_int16_t bit;
1657 1.1 fvdl {
1658 1.1 fvdl struct ex_softc *sc = v;
1659 1.1 fvdl u_int16_t val;
1660 1.1 fvdl
1661 1.1 fvdl val = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT);
1662 1.1 fvdl val |= bit;
1663 1.1 fvdl bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT, val);
1664 1.1 fvdl }
1665 1.1 fvdl
1666 1.1 fvdl void
1667 1.1 fvdl ex_mii_clrbit(v, bit)
1668 1.1 fvdl void *v;
1669 1.1 fvdl u_int16_t bit;
1670 1.1 fvdl {
1671 1.1 fvdl struct ex_softc *sc = v;
1672 1.1 fvdl u_int16_t val;
1673 1.1 fvdl
1674 1.1 fvdl val = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT);
1675 1.1 fvdl val &= ~bit;
1676 1.1 fvdl bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT, val);
1677 1.1 fvdl }
1678 1.1 fvdl
1679 1.1 fvdl u_int16_t
1680 1.1 fvdl ex_mii_readbit(v, bit)
1681 1.1 fvdl void *v;
1682 1.1 fvdl u_int16_t bit;
1683 1.1 fvdl {
1684 1.1 fvdl struct ex_softc *sc = v;
1685 1.1 fvdl u_int16_t val;
1686 1.1 fvdl
1687 1.1 fvdl val = bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT);
1688 1.1 fvdl return (val & bit);
1689 1.1 fvdl }
1690 1.1 fvdl
1691 1.1 fvdl /*
1692 1.1 fvdl * The reason why all this stuff below is here, is that we need a special
1693 1.1 fvdl * readreg function. It needs to check if we're accessing the internal
1694 1.1 fvdl * PHY on 905B-TX boards, or not. If so, the read must fail immediately,
1695 1.1 fvdl * because 905B-TX boards seem to return garbage from the MII if you
1696 1.1 fvdl * try to access non-existing PHYs.
1697 1.1 fvdl */
1698 1.1 fvdl
1699 1.1 fvdl int
1700 1.1 fvdl ex_mii_readreg(v, phy, reg)
1701 1.1 fvdl struct device *v;
1702 1.1 fvdl int phy;
1703 1.1 fvdl int reg;
1704 1.1 fvdl {
1705 1.1 fvdl struct ex_softc *sc = (struct ex_softc *)v;
1706 1.1 fvdl int val = 0;
1707 1.1 fvdl int err =0;
1708 1.1 fvdl int i;
1709 1.1 fvdl
1710 1.1 fvdl if ((sc->ex_conf & EX_CONF_INTPHY) && phy != ELINK_INTPHY_ID)
1711 1.1 fvdl return 0;
1712 1.1 fvdl
1713 1.1 fvdl GO_WINDOW(4);
1714 1.1 fvdl
1715 1.1 fvdl bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT, 0);
1716 1.1 fvdl
1717 1.1 fvdl ex_mii_clrbit(sc, ELINK_PHY_DIR);
1718 1.1 fvdl for (i = 0; i < 32; i++) {
1719 1.1 fvdl ex_mii_clrbit(sc, ELINK_PHY_CLK);
1720 1.1 fvdl ex_mii_setbit(sc, ELINK_PHY_CLK);
1721 1.1 fvdl }
1722 1.1 fvdl ex_mii_writebits(sc, MII_COMMAND_START, 2);
1723 1.1 fvdl ex_mii_writebits(sc, MII_COMMAND_READ, 2);
1724 1.1 fvdl ex_mii_writebits(sc, phy, 5);
1725 1.1 fvdl ex_mii_writebits(sc, reg, 5);
1726 1.1 fvdl
1727 1.1 fvdl ex_mii_clrbit(sc, ELINK_PHY_DIR);
1728 1.1 fvdl ex_mii_clrbit(sc, ELINK_PHY_CLK);
1729 1.1 fvdl ex_mii_setbit(sc, ELINK_PHY_CLK);
1730 1.1 fvdl ex_mii_clrbit(sc, ELINK_PHY_CLK);
1731 1.1 fvdl
1732 1.1 fvdl err = ex_mii_readbit(sc, ELINK_PHY_DATA);
1733 1.1 fvdl ex_mii_setbit(sc, ELINK_PHY_CLK);
1734 1.1 fvdl
1735 1.1 fvdl for (i = 0; i < 16; i++) {
1736 1.1 fvdl val <<= 1;
1737 1.1 fvdl ex_mii_clrbit(sc, ELINK_PHY_CLK);
1738 1.1 fvdl if (err == 0 && ex_mii_readbit(sc, ELINK_PHY_DATA))
1739 1.1 fvdl val |= 1;
1740 1.1 fvdl ex_mii_setbit(sc, ELINK_PHY_CLK);
1741 1.1 fvdl }
1742 1.1 fvdl ex_mii_clrbit(sc, ELINK_PHY_CLK);
1743 1.1 fvdl ex_mii_setbit(sc, ELINK_PHY_CLK);
1744 1.1 fvdl
1745 1.1 fvdl GO_WINDOW(1);
1746 1.1 fvdl
1747 1.1 fvdl return (err ? 0 : val);
1748 1.1 fvdl }
1749 1.1 fvdl
1750 1.1 fvdl static void
1751 1.1 fvdl ex_mii_writebits(sc, data, nbits)
1752 1.1 fvdl struct ex_softc *sc;
1753 1.1 fvdl unsigned int data;
1754 1.1 fvdl int nbits;
1755 1.1 fvdl {
1756 1.1 fvdl int i;
1757 1.1 fvdl
1758 1.1 fvdl ex_mii_setbit(sc, ELINK_PHY_DIR);
1759 1.1 fvdl for (i = 1 << (nbits -1); i; i = i >> 1) {
1760 1.1 fvdl ex_mii_clrbit(sc, ELINK_PHY_CLK);
1761 1.1 fvdl ex_mii_readbit(sc, ELINK_PHY_CLK);
1762 1.1 fvdl if (data & i)
1763 1.1 fvdl ex_mii_setbit(sc, ELINK_PHY_DATA);
1764 1.1 fvdl else
1765 1.1 fvdl ex_mii_clrbit(sc, ELINK_PHY_DATA);
1766 1.1 fvdl ex_mii_setbit(sc, ELINK_PHY_CLK);
1767 1.1 fvdl ex_mii_readbit(sc, ELINK_PHY_CLK);
1768 1.1 fvdl }
1769 1.1 fvdl }
1770 1.1 fvdl
1771 1.1 fvdl void
1772 1.1 fvdl ex_mii_writereg(v, phy, reg, data)
1773 1.1 fvdl struct device *v;
1774 1.1 fvdl int phy;
1775 1.1 fvdl int reg;
1776 1.1 fvdl int data;
1777 1.1 fvdl {
1778 1.1 fvdl struct ex_softc *sc = (struct ex_softc *)v;
1779 1.1 fvdl int i;
1780 1.1 fvdl
1781 1.1 fvdl GO_WINDOW(4);
1782 1.1 fvdl
1783 1.1 fvdl ex_mii_clrbit(sc, ELINK_PHY_DIR);
1784 1.1 fvdl for (i = 0; i < 32; i++) {
1785 1.1 fvdl ex_mii_clrbit(sc, ELINK_PHY_CLK);
1786 1.1 fvdl ex_mii_setbit(sc, ELINK_PHY_CLK);
1787 1.1 fvdl }
1788 1.1 fvdl ex_mii_writebits(sc, MII_COMMAND_START, 2);
1789 1.1 fvdl ex_mii_writebits(sc, MII_COMMAND_WRITE, 2);
1790 1.1 fvdl ex_mii_writebits(sc, phy, 5);
1791 1.1 fvdl ex_mii_writebits(sc, reg, 5);
1792 1.1 fvdl ex_mii_writebits(sc, MII_COMMAND_ACK, 2);
1793 1.1 fvdl ex_mii_writebits(sc, data, 16);
1794 1.1 fvdl
1795 1.1 fvdl ex_mii_clrbit(sc, ELINK_PHY_CLK);
1796 1.1 fvdl ex_mii_setbit(sc, ELINK_PHY_CLK);
1797 1.1 fvdl
1798 1.1 fvdl GO_WINDOW(1);
1799 1.1 fvdl }
1800 1.1 fvdl
1801 1.1 fvdl void
1802 1.1 fvdl ex_mii_statchg(v)
1803 1.1 fvdl struct device *v;
1804 1.1 fvdl {
1805 1.1 fvdl struct ex_softc *sc = (struct ex_softc *)v;
1806 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1807 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1808 1.1 fvdl int mctl;
1809 1.1 fvdl
1810 1.1 fvdl /* XXX Update ifp->if_baudrate */
1811 1.1 fvdl
1812 1.1 fvdl GO_WINDOW(3);
1813 1.1 fvdl mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL);
1814 1.1 fvdl if (sc->ex_mii.mii_media_active & IFM_FDX)
1815 1.1 fvdl mctl |= MAC_CONTROL_FDX;
1816 1.1 fvdl else
1817 1.1 fvdl mctl &= ~MAC_CONTROL_FDX;
1818 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl);
1819 1.1 fvdl GO_WINDOW(1); /* back to operating window */
1820 1.1 fvdl }
1821