elinkxl.c revision 1.15.2.1 1 1.15.2.1 bouyer /* $NetBSD: elinkxl.c,v 1.15.2.1 2000/11/20 11:40:33 bouyer Exp $ */
2 1.1 fvdl
3 1.1 fvdl /*-
4 1.1 fvdl * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.1 fvdl * All rights reserved.
6 1.1 fvdl *
7 1.1 fvdl * This code is derived from software contributed to The NetBSD Foundation
8 1.1 fvdl * by Frank van der Linden.
9 1.1 fvdl *
10 1.1 fvdl * Redistribution and use in source and binary forms, with or without
11 1.1 fvdl * modification, are permitted provided that the following conditions
12 1.1 fvdl * are met:
13 1.1 fvdl * 1. Redistributions of source code must retain the above copyright
14 1.1 fvdl * notice, this list of conditions and the following disclaimer.
15 1.1 fvdl * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 fvdl * notice, this list of conditions and the following disclaimer in the
17 1.1 fvdl * documentation and/or other materials provided with the distribution.
18 1.1 fvdl * 3. All advertising materials mentioning features or use of this software
19 1.1 fvdl * must display the following acknowledgement:
20 1.1 fvdl * This product includes software developed by the NetBSD
21 1.1 fvdl * Foundation, Inc. and its contributors.
22 1.1 fvdl * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.1 fvdl * contributors may be used to endorse or promote products derived
24 1.1 fvdl * from this software without specific prior written permission.
25 1.1 fvdl *
26 1.1 fvdl * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.1 fvdl * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 fvdl * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1 fvdl * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.1 fvdl * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 fvdl * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 fvdl * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 fvdl * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 fvdl * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 fvdl * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 fvdl * POSSIBILITY OF SUCH DAMAGE.
37 1.1 fvdl */
38 1.1 fvdl
39 1.1 fvdl #include "opt_inet.h"
40 1.1 fvdl #include "opt_ns.h"
41 1.1 fvdl #include "bpfilter.h"
42 1.1 fvdl #include "rnd.h"
43 1.1 fvdl
44 1.1 fvdl #include <sys/param.h>
45 1.1 fvdl #include <sys/systm.h>
46 1.15.2.1 bouyer #include <sys/callout.h>
47 1.1 fvdl #include <sys/kernel.h>
48 1.1 fvdl #include <sys/mbuf.h>
49 1.1 fvdl #include <sys/socket.h>
50 1.1 fvdl #include <sys/ioctl.h>
51 1.1 fvdl #include <sys/errno.h>
52 1.1 fvdl #include <sys/syslog.h>
53 1.1 fvdl #include <sys/select.h>
54 1.1 fvdl #include <sys/device.h>
55 1.1 fvdl #if NRND > 0
56 1.1 fvdl #include <sys/rnd.h>
57 1.1 fvdl #endif
58 1.1 fvdl
59 1.1 fvdl #include <net/if.h>
60 1.1 fvdl #include <net/if_dl.h>
61 1.1 fvdl #include <net/if_ether.h>
62 1.1 fvdl #include <net/if_media.h>
63 1.1 fvdl
64 1.1 fvdl #ifdef INET
65 1.1 fvdl #include <netinet/in.h>
66 1.1 fvdl #include <netinet/in_systm.h>
67 1.1 fvdl #include <netinet/in_var.h>
68 1.1 fvdl #include <netinet/ip.h>
69 1.1 fvdl #include <netinet/if_inarp.h>
70 1.1 fvdl #endif
71 1.1 fvdl
72 1.1 fvdl #ifdef NS
73 1.1 fvdl #include <netns/ns.h>
74 1.1 fvdl #include <netns/ns_if.h>
75 1.1 fvdl #endif
76 1.1 fvdl
77 1.1 fvdl #if NBPFILTER > 0
78 1.1 fvdl #include <net/bpf.h>
79 1.1 fvdl #include <net/bpfdesc.h>
80 1.1 fvdl #endif
81 1.1 fvdl
82 1.1 fvdl #include <machine/cpu.h>
83 1.1 fvdl #include <machine/bus.h>
84 1.1 fvdl #include <machine/intr.h>
85 1.15.2.1 bouyer #include <machine/endian.h>
86 1.1 fvdl
87 1.1 fvdl #include <dev/mii/miivar.h>
88 1.1 fvdl #include <dev/mii/mii.h>
89 1.15.2.1 bouyer #include <dev/mii/mii_bitbang.h>
90 1.1 fvdl
91 1.1 fvdl #include <dev/ic/elink3reg.h>
92 1.1 fvdl /* #include <dev/ic/elink3var.h> */
93 1.1 fvdl #include <dev/ic/elinkxlreg.h>
94 1.1 fvdl #include <dev/ic/elinkxlvar.h>
95 1.1 fvdl
96 1.1 fvdl #ifdef DEBUG
97 1.1 fvdl int exdebug = 0;
98 1.1 fvdl #endif
99 1.1 fvdl
100 1.1 fvdl /* ifmedia callbacks */
101 1.1 fvdl int ex_media_chg __P((struct ifnet *ifp));
102 1.1 fvdl void ex_media_stat __P((struct ifnet *ifp, struct ifmediareq *req));
103 1.1 fvdl
104 1.1 fvdl void ex_probe_media __P((struct ex_softc *));
105 1.1 fvdl void ex_set_filter __P((struct ex_softc *));
106 1.1 fvdl void ex_set_media __P((struct ex_softc *));
107 1.1 fvdl struct mbuf *ex_get __P((struct ex_softc *, int));
108 1.1 fvdl u_int16_t ex_read_eeprom __P((struct ex_softc *, int));
109 1.15.2.1 bouyer int ex_init __P((struct ifnet *));
110 1.1 fvdl void ex_read __P((struct ex_softc *));
111 1.1 fvdl void ex_reset __P((struct ex_softc *));
112 1.1 fvdl void ex_set_mc __P((struct ex_softc *));
113 1.1 fvdl void ex_getstats __P((struct ex_softc *));
114 1.1 fvdl void ex_printstats __P((struct ex_softc *));
115 1.1 fvdl void ex_tick __P((void *));
116 1.1 fvdl
117 1.1 fvdl static int ex_eeprom_busy __P((struct ex_softc *));
118 1.1 fvdl static int ex_add_rxbuf __P((struct ex_softc *, struct ex_rxdesc *));
119 1.1 fvdl static void ex_init_txdescs __P((struct ex_softc *));
120 1.1 fvdl
121 1.1 fvdl static void ex_shutdown __P((void *));
122 1.1 fvdl static void ex_start __P((struct ifnet *));
123 1.1 fvdl static void ex_txstat __P((struct ex_softc *));
124 1.1 fvdl
125 1.1 fvdl int ex_mii_readreg __P((struct device *, int, int));
126 1.1 fvdl void ex_mii_writereg __P((struct device *, int, int, int));
127 1.1 fvdl void ex_mii_statchg __P((struct device *));
128 1.1 fvdl
129 1.2 thorpej void ex_probemedia __P((struct ex_softc *));
130 1.2 thorpej
131 1.2 thorpej /*
132 1.2 thorpej * Structure to map media-present bits in boards to ifmedia codes and
133 1.2 thorpej * printable media names. Used for table-driven ifmedia initialization.
134 1.2 thorpej */
135 1.2 thorpej struct ex_media {
136 1.2 thorpej int exm_mpbit; /* media present bit */
137 1.2 thorpej const char *exm_name; /* name of medium */
138 1.2 thorpej int exm_ifmedia; /* ifmedia word for medium */
139 1.2 thorpej int exm_epmedia; /* ELINKMEDIA_* constant */
140 1.2 thorpej };
141 1.2 thorpej
142 1.2 thorpej /*
143 1.2 thorpej * Media table for 3c90x chips. Note that chips with MII have no
144 1.2 thorpej * `native' media.
145 1.2 thorpej */
146 1.2 thorpej struct ex_media ex_native_media[] = {
147 1.2 thorpej { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T,
148 1.2 thorpej ELINKMEDIA_10BASE_T },
149 1.2 thorpej { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX,
150 1.2 thorpej ELINKMEDIA_10BASE_T },
151 1.2 thorpej { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5,
152 1.2 thorpej ELINKMEDIA_AUI },
153 1.2 thorpej { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2,
154 1.2 thorpej ELINKMEDIA_10BASE_2 },
155 1.2 thorpej { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX,
156 1.2 thorpej ELINKMEDIA_100BASE_TX },
157 1.2 thorpej { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX,
158 1.2 thorpej ELINKMEDIA_100BASE_TX },
159 1.2 thorpej { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX,
160 1.2 thorpej ELINKMEDIA_100BASE_FX },
161 1.2 thorpej { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL,
162 1.2 thorpej ELINKMEDIA_MII },
163 1.2 thorpej { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4,
164 1.2 thorpej ELINKMEDIA_100BASE_T4 },
165 1.2 thorpej { 0, NULL, 0,
166 1.2 thorpej 0 },
167 1.2 thorpej };
168 1.2 thorpej
169 1.1 fvdl /*
170 1.15.2.1 bouyer * MII bit-bang glue.
171 1.15.2.1 bouyer */
172 1.15.2.1 bouyer u_int32_t ex_mii_bitbang_read __P((struct device *));
173 1.15.2.1 bouyer void ex_mii_bitbang_write __P((struct device *, u_int32_t));
174 1.15.2.1 bouyer
175 1.15.2.1 bouyer const struct mii_bitbang_ops ex_mii_bitbang_ops = {
176 1.15.2.1 bouyer ex_mii_bitbang_read,
177 1.15.2.1 bouyer ex_mii_bitbang_write,
178 1.15.2.1 bouyer {
179 1.15.2.1 bouyer ELINK_PHY_DATA, /* MII_BIT_MDO */
180 1.15.2.1 bouyer ELINK_PHY_DATA, /* MII_BIT_MDI */
181 1.15.2.1 bouyer ELINK_PHY_CLK, /* MII_BIT_MDC */
182 1.15.2.1 bouyer ELINK_PHY_DIR, /* MII_BIT_DIR_HOST_PHY */
183 1.15.2.1 bouyer 0, /* MII_BIT_DIR_PHY_HOST */
184 1.15.2.1 bouyer }
185 1.15.2.1 bouyer };
186 1.15.2.1 bouyer
187 1.15.2.1 bouyer /*
188 1.1 fvdl * Back-end attach and configure.
189 1.1 fvdl */
190 1.1 fvdl void
191 1.1 fvdl ex_config(sc)
192 1.1 fvdl struct ex_softc *sc;
193 1.1 fvdl {
194 1.1 fvdl struct ifnet *ifp;
195 1.1 fvdl u_int16_t val;
196 1.1 fvdl u_int8_t macaddr[ETHER_ADDR_LEN] = {0};
197 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
198 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
199 1.15.2.1 bouyer int i, error, attach_stage;
200 1.15.2.1 bouyer
201 1.15.2.1 bouyer callout_init(&sc->ex_mii_callout);
202 1.1 fvdl
203 1.1 fvdl ex_reset(sc);
204 1.1 fvdl
205 1.1 fvdl val = ex_read_eeprom(sc, EEPROM_OEM_ADDR0);
206 1.1 fvdl macaddr[0] = val >> 8;
207 1.1 fvdl macaddr[1] = val & 0xff;
208 1.1 fvdl val = ex_read_eeprom(sc, EEPROM_OEM_ADDR1);
209 1.1 fvdl macaddr[2] = val >> 8;
210 1.1 fvdl macaddr[3] = val & 0xff;
211 1.1 fvdl val = ex_read_eeprom(sc, EEPROM_OEM_ADDR2);
212 1.1 fvdl macaddr[4] = val >> 8;
213 1.1 fvdl macaddr[5] = val & 0xff;
214 1.1 fvdl
215 1.1 fvdl printf("%s: MAC address %s\n", sc->sc_dev.dv_xname,
216 1.1 fvdl ether_sprintf(macaddr));
217 1.1 fvdl
218 1.15.2.1 bouyer if (sc->ex_conf & (EX_CONF_INV_LED_POLARITY|EX_CONF_PHY_POWER)) {
219 1.15.2.1 bouyer GO_WINDOW(2);
220 1.15.2.1 bouyer val = bus_space_read_2(iot, ioh, ELINK_W2_RESET_OPTIONS);
221 1.15.2.1 bouyer if (sc->ex_conf & EX_CONF_INV_LED_POLARITY)
222 1.15.2.1 bouyer val |= ELINK_RESET_OPT_LEDPOLAR;
223 1.15.2.1 bouyer if (sc->ex_conf & EX_CONF_PHY_POWER)
224 1.15.2.1 bouyer val |= ELINK_RESET_OPT_PHYPOWER;
225 1.15.2.1 bouyer bus_space_write_2(iot, ioh, ELINK_W2_RESET_OPTIONS, val);
226 1.15 haya }
227 1.15 haya
228 1.1 fvdl attach_stage = 0;
229 1.1 fvdl
230 1.1 fvdl /*
231 1.1 fvdl * Allocate the upload descriptors, and create and load the DMA
232 1.1 fvdl * map for them.
233 1.1 fvdl */
234 1.1 fvdl if ((error = bus_dmamem_alloc(sc->sc_dmat,
235 1.15.2.1 bouyer EX_NUPD * sizeof (struct ex_upd), NBPG, 0, &sc->sc_useg, 1,
236 1.15.2.1 bouyer &sc->sc_urseg, BUS_DMA_NOWAIT)) != 0) {
237 1.1 fvdl printf("%s: can't allocate upload descriptors, error = %d\n",
238 1.1 fvdl sc->sc_dev.dv_xname, error);
239 1.1 fvdl goto fail;
240 1.1 fvdl }
241 1.1 fvdl
242 1.1 fvdl attach_stage = 1;
243 1.1 fvdl
244 1.15.2.1 bouyer if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg,
245 1.1 fvdl EX_NUPD * sizeof (struct ex_upd), (caddr_t *)&sc->sc_upd,
246 1.1 fvdl BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
247 1.1 fvdl printf("%s: can't map upload descriptors, error = %d\n",
248 1.1 fvdl sc->sc_dev.dv_xname, error);
249 1.1 fvdl goto fail;
250 1.1 fvdl }
251 1.1 fvdl
252 1.1 fvdl attach_stage = 2;
253 1.1 fvdl
254 1.1 fvdl if ((error = bus_dmamap_create(sc->sc_dmat,
255 1.1 fvdl EX_NUPD * sizeof (struct ex_upd), 1,
256 1.1 fvdl EX_NUPD * sizeof (struct ex_upd), 0, BUS_DMA_NOWAIT,
257 1.1 fvdl &sc->sc_upd_dmamap)) != 0) {
258 1.1 fvdl printf("%s: can't create upload desc. DMA map, error = %d\n",
259 1.1 fvdl sc->sc_dev.dv_xname, error);
260 1.1 fvdl goto fail;
261 1.1 fvdl }
262 1.1 fvdl
263 1.1 fvdl attach_stage = 3;
264 1.1 fvdl
265 1.1 fvdl if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_upd_dmamap,
266 1.1 fvdl sc->sc_upd, EX_NUPD * sizeof (struct ex_upd), NULL,
267 1.1 fvdl BUS_DMA_NOWAIT)) != 0) {
268 1.1 fvdl printf("%s: can't load upload desc. DMA map, error = %d\n",
269 1.1 fvdl sc->sc_dev.dv_xname, error);
270 1.1 fvdl goto fail;
271 1.1 fvdl }
272 1.1 fvdl
273 1.1 fvdl attach_stage = 4;
274 1.1 fvdl
275 1.1 fvdl /*
276 1.1 fvdl * Allocate the download descriptors, and create and load the DMA
277 1.1 fvdl * map for them.
278 1.1 fvdl */
279 1.1 fvdl if ((error = bus_dmamem_alloc(sc->sc_dmat,
280 1.15.2.1 bouyer EX_NDPD * sizeof (struct ex_dpd), NBPG, 0, &sc->sc_dseg, 1,
281 1.15.2.1 bouyer &sc->sc_drseg, BUS_DMA_NOWAIT)) != 0) {
282 1.1 fvdl printf("%s: can't allocate download descriptors, error = %d\n",
283 1.1 fvdl sc->sc_dev.dv_xname, error);
284 1.1 fvdl goto fail;
285 1.1 fvdl }
286 1.1 fvdl
287 1.1 fvdl attach_stage = 5;
288 1.1 fvdl
289 1.15.2.1 bouyer if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg,
290 1.1 fvdl EX_NDPD * sizeof (struct ex_dpd), (caddr_t *)&sc->sc_dpd,
291 1.1 fvdl BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
292 1.1 fvdl printf("%s: can't map download descriptors, error = %d\n",
293 1.1 fvdl sc->sc_dev.dv_xname, error);
294 1.1 fvdl goto fail;
295 1.1 fvdl }
296 1.1 fvdl bzero(sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd));
297 1.1 fvdl
298 1.1 fvdl attach_stage = 6;
299 1.1 fvdl
300 1.1 fvdl if ((error = bus_dmamap_create(sc->sc_dmat,
301 1.1 fvdl EX_NDPD * sizeof (struct ex_dpd), 1,
302 1.1 fvdl EX_NDPD * sizeof (struct ex_dpd), 0, BUS_DMA_NOWAIT,
303 1.1 fvdl &sc->sc_dpd_dmamap)) != 0) {
304 1.1 fvdl printf("%s: can't create download desc. DMA map, error = %d\n",
305 1.1 fvdl sc->sc_dev.dv_xname, error);
306 1.1 fvdl goto fail;
307 1.1 fvdl }
308 1.1 fvdl
309 1.1 fvdl attach_stage = 7;
310 1.1 fvdl
311 1.1 fvdl if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dpd_dmamap,
312 1.1 fvdl sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd), NULL,
313 1.1 fvdl BUS_DMA_NOWAIT)) != 0) {
314 1.1 fvdl printf("%s: can't load download desc. DMA map, error = %d\n",
315 1.1 fvdl sc->sc_dev.dv_xname, error);
316 1.1 fvdl goto fail;
317 1.1 fvdl }
318 1.1 fvdl
319 1.1 fvdl attach_stage = 8;
320 1.1 fvdl
321 1.1 fvdl
322 1.1 fvdl /*
323 1.1 fvdl * Create the transmit buffer DMA maps.
324 1.1 fvdl */
325 1.1 fvdl for (i = 0; i < EX_NDPD; i++) {
326 1.1 fvdl if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
327 1.1 fvdl EX_NTFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT,
328 1.1 fvdl &sc->sc_tx_dmamaps[i])) != 0) {
329 1.1 fvdl printf("%s: can't create tx DMA map %d, error = %d\n",
330 1.1 fvdl sc->sc_dev.dv_xname, i, error);
331 1.1 fvdl goto fail;
332 1.1 fvdl }
333 1.1 fvdl }
334 1.1 fvdl
335 1.1 fvdl attach_stage = 9;
336 1.1 fvdl
337 1.1 fvdl /*
338 1.1 fvdl * Create the receive buffer DMA maps.
339 1.1 fvdl */
340 1.1 fvdl for (i = 0; i < EX_NUPD; i++) {
341 1.1 fvdl if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
342 1.1 fvdl EX_NRFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT,
343 1.1 fvdl &sc->sc_rx_dmamaps[i])) != 0) {
344 1.1 fvdl printf("%s: can't create rx DMA map %d, error = %d\n",
345 1.1 fvdl sc->sc_dev.dv_xname, i, error);
346 1.1 fvdl goto fail;
347 1.1 fvdl }
348 1.1 fvdl }
349 1.1 fvdl
350 1.1 fvdl attach_stage = 10;
351 1.1 fvdl
352 1.1 fvdl /*
353 1.1 fvdl * Create ring of upload descriptors, only once. The DMA engine
354 1.1 fvdl * will loop over this when receiving packets, stalling if it
355 1.1 fvdl * hits an UPD with a finished receive.
356 1.1 fvdl */
357 1.1 fvdl for (i = 0; i < EX_NUPD; i++) {
358 1.1 fvdl sc->sc_rxdescs[i].rx_dmamap = sc->sc_rx_dmamaps[i];
359 1.1 fvdl sc->sc_rxdescs[i].rx_upd = &sc->sc_upd[i];
360 1.9 thorpej sc->sc_upd[i].upd_frags[0].fr_len =
361 1.15.2.1 bouyer htole32((MCLBYTES - 2) | EX_FR_LAST);
362 1.1 fvdl if (ex_add_rxbuf(sc, &sc->sc_rxdescs[i]) != 0) {
363 1.1 fvdl printf("%s: can't allocate or map rx buffers\n",
364 1.1 fvdl sc->sc_dev.dv_xname);
365 1.1 fvdl goto fail;
366 1.1 fvdl }
367 1.1 fvdl }
368 1.1 fvdl
369 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 0,
370 1.1 fvdl EX_NUPD * sizeof (struct ex_upd),
371 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
372 1.1 fvdl
373 1.1 fvdl ex_init_txdescs(sc);
374 1.1 fvdl
375 1.1 fvdl attach_stage = 11;
376 1.1 fvdl
377 1.1 fvdl
378 1.1 fvdl GO_WINDOW(3);
379 1.1 fvdl val = bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS);
380 1.1 fvdl if (val & ELINK_MEDIACAP_MII)
381 1.1 fvdl sc->ex_conf |= EX_CONF_MII;
382 1.1 fvdl
383 1.1 fvdl ifp = &sc->sc_ethercom.ec_if;
384 1.1 fvdl
385 1.2 thorpej /*
386 1.2 thorpej * Initialize our media structures and MII info. We'll
387 1.2 thorpej * probe the MII if we discover that we have one.
388 1.2 thorpej */
389 1.2 thorpej sc->ex_mii.mii_ifp = ifp;
390 1.2 thorpej sc->ex_mii.mii_readreg = ex_mii_readreg;
391 1.2 thorpej sc->ex_mii.mii_writereg = ex_mii_writereg;
392 1.2 thorpej sc->ex_mii.mii_statchg = ex_mii_statchg;
393 1.2 thorpej ifmedia_init(&sc->ex_mii.mii_media, 0, ex_media_chg,
394 1.2 thorpej ex_media_stat);
395 1.2 thorpej
396 1.1 fvdl if (sc->ex_conf & EX_CONF_MII) {
397 1.1 fvdl /*
398 1.1 fvdl * Find PHY, extract media information from it.
399 1.14 fvdl * First, select the right transceiver.
400 1.1 fvdl */
401 1.14 fvdl u_int32_t icfg;
402 1.14 fvdl
403 1.14 fvdl GO_WINDOW(3);
404 1.14 fvdl icfg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG);
405 1.14 fvdl icfg &= ~(CONFIG_XCVR_SEL << 16);
406 1.14 fvdl if (val & (ELINK_MEDIACAP_MII | ELINK_MEDIACAP_100BASET4))
407 1.14 fvdl icfg |= ELINKMEDIA_MII << (CONFIG_XCVR_SEL_SHIFT + 16);
408 1.14 fvdl if (val & ELINK_MEDIACAP_100BASETX)
409 1.14 fvdl icfg |= ELINKMEDIA_AUTO << (CONFIG_XCVR_SEL_SHIFT + 16);
410 1.14 fvdl if (val & ELINK_MEDIACAP_100BASEFX)
411 1.14 fvdl icfg |= ELINKMEDIA_100BASE_FX
412 1.14 fvdl << (CONFIG_XCVR_SEL_SHIFT + 16);
413 1.14 fvdl bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, icfg);
414 1.14 fvdl
415 1.15.2.1 bouyer mii_attach(&sc->sc_dev, &sc->ex_mii, 0xffffffff,
416 1.15.2.1 bouyer MII_PHY_ANY, MII_OFFSET_ANY, 0);
417 1.1 fvdl if (LIST_FIRST(&sc->ex_mii.mii_phys) == NULL) {
418 1.1 fvdl ifmedia_add(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE,
419 1.1 fvdl 0, NULL);
420 1.1 fvdl ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE);
421 1.1 fvdl } else {
422 1.1 fvdl ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_AUTO);
423 1.1 fvdl }
424 1.2 thorpej } else
425 1.2 thorpej ex_probemedia(sc);
426 1.1 fvdl
427 1.1 fvdl bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
428 1.1 fvdl ifp->if_softc = sc;
429 1.1 fvdl ifp->if_start = ex_start;
430 1.1 fvdl ifp->if_ioctl = ex_ioctl;
431 1.1 fvdl ifp->if_watchdog = ex_watchdog;
432 1.15.2.1 bouyer ifp->if_init = ex_init;
433 1.15.2.1 bouyer ifp->if_stop = ex_stop;
434 1.1 fvdl ifp->if_flags =
435 1.1 fvdl IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
436 1.1 fvdl
437 1.15.2.1 bouyer /*
438 1.15.2.1 bouyer * We can support 802.1Q VLAN-sized frames.
439 1.15.2.1 bouyer */
440 1.15.2.1 bouyer sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU;
441 1.15.2.1 bouyer
442 1.1 fvdl if_attach(ifp);
443 1.1 fvdl ether_ifattach(ifp, macaddr);
444 1.1 fvdl
445 1.1 fvdl GO_WINDOW(1);
446 1.1 fvdl
447 1.1 fvdl sc->tx_start_thresh = 20;
448 1.1 fvdl sc->tx_succ_ok = 0;
449 1.1 fvdl
450 1.1 fvdl /* TODO: set queues to 0 */
451 1.1 fvdl
452 1.1 fvdl #if NBPFILTER > 0
453 1.1 fvdl bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB,
454 1.1 fvdl sizeof(struct ether_header));
455 1.1 fvdl #endif
456 1.1 fvdl
457 1.1 fvdl #if NRND > 0
458 1.5 explorer rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname,
459 1.5 explorer RND_TYPE_NET, 0);
460 1.1 fvdl #endif
461 1.1 fvdl
462 1.1 fvdl /* Establish callback to reset card when we reboot. */
463 1.15.2.1 bouyer sc->sc_sdhook = shutdownhook_establish(ex_shutdown, sc);
464 1.15.2.1 bouyer
465 1.15.2.1 bouyer /* The attach is successful. */
466 1.15.2.1 bouyer sc->ex_flags |= EX_FLAGS_ATTACHED;
467 1.1 fvdl return;
468 1.1 fvdl
469 1.1 fvdl fail:
470 1.1 fvdl /*
471 1.1 fvdl * Free any resources we've allocated during the failed attach
472 1.1 fvdl * attempt. Do this in reverse order and fall though.
473 1.1 fvdl */
474 1.1 fvdl switch (attach_stage) {
475 1.1 fvdl case 11:
476 1.1 fvdl {
477 1.1 fvdl struct ex_rxdesc *rxd;
478 1.1 fvdl
479 1.1 fvdl for (i = 0; i < EX_NUPD; i++) {
480 1.1 fvdl rxd = &sc->sc_rxdescs[i];
481 1.1 fvdl if (rxd->rx_mbhead != NULL) {
482 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap);
483 1.1 fvdl m_freem(rxd->rx_mbhead);
484 1.1 fvdl }
485 1.1 fvdl }
486 1.1 fvdl }
487 1.1 fvdl /* FALLTHROUGH */
488 1.1 fvdl
489 1.1 fvdl case 10:
490 1.1 fvdl for (i = 0; i < EX_NUPD; i++)
491 1.1 fvdl bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]);
492 1.1 fvdl /* FALLTHROUGH */
493 1.1 fvdl
494 1.1 fvdl case 9:
495 1.1 fvdl for (i = 0; i < EX_NDPD; i++)
496 1.1 fvdl bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]);
497 1.1 fvdl /* FALLTHROUGH */
498 1.1 fvdl case 8:
499 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap);
500 1.1 fvdl /* FALLTHROUGH */
501 1.1 fvdl
502 1.1 fvdl case 7:
503 1.1 fvdl bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap);
504 1.1 fvdl /* FALLTHROUGH */
505 1.1 fvdl
506 1.1 fvdl case 6:
507 1.1 fvdl bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd,
508 1.1 fvdl EX_NDPD * sizeof (struct ex_dpd));
509 1.1 fvdl /* FALLTHROUGH */
510 1.1 fvdl
511 1.1 fvdl case 5:
512 1.15.2.1 bouyer bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg);
513 1.1 fvdl break;
514 1.1 fvdl
515 1.1 fvdl case 4:
516 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap);
517 1.1 fvdl /* FALLTHROUGH */
518 1.1 fvdl
519 1.1 fvdl case 3:
520 1.1 fvdl bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap);
521 1.1 fvdl /* FALLTHROUGH */
522 1.1 fvdl
523 1.1 fvdl case 2:
524 1.1 fvdl bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd,
525 1.1 fvdl EX_NUPD * sizeof (struct ex_upd));
526 1.1 fvdl /* FALLTHROUGH */
527 1.1 fvdl
528 1.1 fvdl case 1:
529 1.15.2.1 bouyer bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg);
530 1.1 fvdl break;
531 1.1 fvdl }
532 1.1 fvdl
533 1.2 thorpej }
534 1.2 thorpej
535 1.2 thorpej /*
536 1.2 thorpej * Find the media present on non-MII chips.
537 1.2 thorpej */
538 1.2 thorpej void
539 1.2 thorpej ex_probemedia(sc)
540 1.2 thorpej struct ex_softc *sc;
541 1.2 thorpej {
542 1.2 thorpej bus_space_tag_t iot = sc->sc_iot;
543 1.2 thorpej bus_space_handle_t ioh = sc->sc_ioh;
544 1.2 thorpej struct ifmedia *ifm = &sc->ex_mii.mii_media;
545 1.2 thorpej struct ex_media *exm;
546 1.2 thorpej u_int16_t config1, reset_options, default_media;
547 1.2 thorpej int defmedia = 0;
548 1.2 thorpej const char *sep = "", *defmedianame = NULL;
549 1.2 thorpej
550 1.2 thorpej GO_WINDOW(3);
551 1.2 thorpej config1 = bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2);
552 1.2 thorpej reset_options = bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS);
553 1.2 thorpej GO_WINDOW(0);
554 1.2 thorpej
555 1.2 thorpej default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT;
556 1.2 thorpej
557 1.2 thorpej printf("%s: ", sc->sc_dev.dv_xname);
558 1.2 thorpej
559 1.2 thorpej /* Sanity check that there are any media! */
560 1.2 thorpej if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) {
561 1.2 thorpej printf("no media present!\n");
562 1.2 thorpej ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL);
563 1.2 thorpej ifmedia_set(ifm, IFM_ETHER|IFM_NONE);
564 1.2 thorpej return;
565 1.2 thorpej }
566 1.2 thorpej
567 1.2 thorpej #define PRINT(s) printf("%s%s", sep, s); sep = ", "
568 1.2 thorpej
569 1.2 thorpej for (exm = ex_native_media; exm->exm_name != NULL; exm++) {
570 1.2 thorpej if (reset_options & exm->exm_mpbit) {
571 1.2 thorpej /*
572 1.2 thorpej * Default media is a little complicated. We
573 1.2 thorpej * support full-duplex which uses the same
574 1.2 thorpej * reset options bit.
575 1.2 thorpej *
576 1.2 thorpej * XXX Check EEPROM for default to FDX?
577 1.2 thorpej */
578 1.2 thorpej if (exm->exm_epmedia == default_media) {
579 1.2 thorpej if ((exm->exm_ifmedia & IFM_FDX) == 0) {
580 1.2 thorpej defmedia = exm->exm_ifmedia;
581 1.2 thorpej defmedianame = exm->exm_name;
582 1.2 thorpej }
583 1.2 thorpej } else if (defmedia == 0) {
584 1.2 thorpej defmedia = exm->exm_ifmedia;
585 1.2 thorpej defmedianame = exm->exm_name;
586 1.2 thorpej }
587 1.2 thorpej ifmedia_add(ifm, exm->exm_ifmedia, exm->exm_epmedia,
588 1.2 thorpej NULL);
589 1.2 thorpej PRINT(exm->exm_name);
590 1.2 thorpej }
591 1.2 thorpej }
592 1.2 thorpej
593 1.2 thorpej #undef PRINT
594 1.2 thorpej
595 1.2 thorpej #ifdef DIAGNOSTIC
596 1.2 thorpej if (defmedia == 0)
597 1.2 thorpej panic("ex_probemedia: impossible");
598 1.2 thorpej #endif
599 1.2 thorpej
600 1.2 thorpej printf(", default %s\n", defmedianame);
601 1.2 thorpej ifmedia_set(ifm, defmedia);
602 1.1 fvdl }
603 1.1 fvdl
604 1.1 fvdl /*
605 1.1 fvdl * Bring device up.
606 1.1 fvdl */
607 1.15.2.1 bouyer int
608 1.15.2.1 bouyer ex_init(ifp)
609 1.15.2.1 bouyer struct ifnet *ifp;
610 1.1 fvdl {
611 1.15.2.1 bouyer struct ex_softc *sc = ifp->if_softc;
612 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
613 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
614 1.1 fvdl int s, i;
615 1.1 fvdl
616 1.1 fvdl s = splnet();
617 1.1 fvdl
618 1.1 fvdl ex_waitcmd(sc);
619 1.15.2.1 bouyer ex_stop(ifp, 0);
620 1.1 fvdl
621 1.1 fvdl /*
622 1.1 fvdl * Set the station address and clear the station mask. The latter
623 1.1 fvdl * is needed for 90x cards, 0 is the default for 90xB cards.
624 1.1 fvdl */
625 1.1 fvdl GO_WINDOW(2);
626 1.1 fvdl for (i = 0; i < ETHER_ADDR_LEN; i++) {
627 1.1 fvdl bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i,
628 1.1 fvdl LLADDR(ifp->if_sadl)[i]);
629 1.1 fvdl bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0);
630 1.1 fvdl }
631 1.1 fvdl
632 1.1 fvdl GO_WINDOW(3);
633 1.1 fvdl
634 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_RESET);
635 1.1 fvdl ex_waitcmd(sc);
636 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_RESET);
637 1.1 fvdl ex_waitcmd(sc);
638 1.1 fvdl
639 1.1 fvdl /*
640 1.1 fvdl * Disable reclaim threshold for 90xB, set free threshold to
641 1.1 fvdl * 6 * 256 = 1536 for 90x.
642 1.1 fvdl */
643 1.1 fvdl if (sc->ex_conf & EX_CONF_90XB)
644 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND,
645 1.1 fvdl ELINK_TXRECLTHRESH | 255);
646 1.1 fvdl else
647 1.1 fvdl bus_space_write_1(iot, ioh, ELINK_TXFREETHRESH, 6);
648 1.1 fvdl
649 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND,
650 1.1 fvdl SET_RX_EARLY_THRESH | ELINK_THRESH_DISABLE);
651 1.1 fvdl
652 1.1 fvdl bus_space_write_4(iot, ioh, ELINK_DMACTRL,
653 1.1 fvdl bus_space_read_4(iot, ioh, ELINK_DMACTRL) | ELINK_DMAC_UPRXEAREN);
654 1.1 fvdl
655 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK | S_MASK);
656 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK | S_MASK);
657 1.1 fvdl
658 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff);
659 1.15 haya if (sc->intr_ack)
660 1.15 haya (* sc->intr_ack)(sc);
661 1.1 fvdl ex_set_media(sc);
662 1.1 fvdl ex_set_mc(sc);
663 1.1 fvdl
664 1.1 fvdl
665 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, STATS_ENABLE);
666 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE);
667 1.1 fvdl bus_space_write_4(iot, ioh, ELINK_UPLISTPTR, sc->sc_upddma);
668 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE);
669 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_UPUNSTALL);
670 1.1 fvdl
671 1.15.2.1 bouyer if (sc->ex_conf & (EX_CONF_PHY_POWER | EX_CONF_INV_LED_POLARITY)) {
672 1.15.2.1 bouyer u_int16_t cbcard_config;
673 1.15.2.1 bouyer
674 1.15.2.1 bouyer GO_WINDOW(2);
675 1.15.2.1 bouyer cbcard_config = bus_space_read_2(sc->sc_iot, sc->sc_ioh, 0x0c);
676 1.15.2.1 bouyer if (sc->ex_conf & EX_CONF_PHY_POWER) {
677 1.15.2.1 bouyer cbcard_config |= 0x4000; /* turn on PHY power */
678 1.15.2.1 bouyer }
679 1.15.2.1 bouyer if (sc->ex_conf & EX_CONF_INV_LED_POLARITY) {
680 1.15.2.1 bouyer cbcard_config |= 0x0010; /* invert LED polarity */
681 1.15.2.1 bouyer }
682 1.15.2.1 bouyer bus_space_write_2(sc->sc_iot, sc->sc_ioh, 0x0c, cbcard_config);
683 1.15.2.1 bouyer
684 1.15.2.1 bouyer GO_WINDOW(3);
685 1.15.2.1 bouyer }
686 1.15.2.1 bouyer
687 1.1 fvdl ifp->if_flags |= IFF_RUNNING;
688 1.1 fvdl ifp->if_flags &= ~IFF_OACTIVE;
689 1.1 fvdl ex_start(ifp);
690 1.1 fvdl
691 1.1 fvdl GO_WINDOW(1);
692 1.1 fvdl
693 1.1 fvdl splx(s);
694 1.1 fvdl
695 1.15.2.1 bouyer callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc);
696 1.1 fvdl
697 1.15.2.1 bouyer return (0);
698 1.1 fvdl }
699 1.1 fvdl
700 1.15.2.1 bouyer #define ex_mchash(addr) (ether_crc32_be((addr), ETHER_ADDR_LEN) & 0xff)
701 1.1 fvdl
702 1.1 fvdl /*
703 1.1 fvdl * Set multicast receive filter. Also take care of promiscuous mode
704 1.1 fvdl * here (XXX).
705 1.1 fvdl */
706 1.1 fvdl void
707 1.1 fvdl ex_set_mc(sc)
708 1.15.2.1 bouyer struct ex_softc *sc;
709 1.1 fvdl {
710 1.1 fvdl struct ifnet *ifp = &sc->sc_ethercom.ec_if;
711 1.1 fvdl struct ethercom *ec = &sc->sc_ethercom;
712 1.1 fvdl struct ether_multi *enm;
713 1.1 fvdl struct ether_multistep estep;
714 1.1 fvdl int i;
715 1.1 fvdl u_int16_t mask = FIL_INDIVIDUAL | FIL_BRDCST;
716 1.1 fvdl
717 1.1 fvdl if (ifp->if_flags & IFF_PROMISC)
718 1.1 fvdl mask |= FIL_PROMISC;
719 1.1 fvdl
720 1.1 fvdl if (!(ifp->if_flags & IFF_MULTICAST))
721 1.1 fvdl goto out;
722 1.1 fvdl
723 1.1 fvdl if (!(sc->ex_conf & EX_CONF_90XB) || ifp->if_flags & IFF_ALLMULTI) {
724 1.1 fvdl mask |= (ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0;
725 1.1 fvdl } else {
726 1.1 fvdl ETHER_FIRST_MULTI(estep, ec, enm);
727 1.1 fvdl while (enm != NULL) {
728 1.1 fvdl if (bcmp(enm->enm_addrlo, enm->enm_addrhi,
729 1.1 fvdl ETHER_ADDR_LEN) != 0)
730 1.1 fvdl goto out;
731 1.1 fvdl i = ex_mchash(enm->enm_addrlo);
732 1.1 fvdl bus_space_write_2(sc->sc_iot, sc->sc_ioh,
733 1.1 fvdl ELINK_COMMAND, ELINK_SETHASHFILBIT | i);
734 1.1 fvdl ETHER_NEXT_MULTI(estep, enm);
735 1.1 fvdl }
736 1.1 fvdl mask |= FIL_MULTIHASH;
737 1.1 fvdl }
738 1.1 fvdl out:
739 1.1 fvdl bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND,
740 1.1 fvdl SET_RX_FILTER | mask);
741 1.1 fvdl }
742 1.1 fvdl
743 1.1 fvdl
744 1.1 fvdl static void
745 1.1 fvdl ex_txstat(sc)
746 1.1 fvdl struct ex_softc *sc;
747 1.1 fvdl {
748 1.15.2.1 bouyer struct ifnet *ifp = &sc->sc_ethercom.ec_if;
749 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
750 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
751 1.1 fvdl int i;
752 1.1 fvdl
753 1.1 fvdl /*
754 1.1 fvdl * We need to read+write TX_STATUS until we get a 0 status
755 1.1 fvdl * in order to turn off the interrupt flag.
756 1.1 fvdl */
757 1.1 fvdl while ((i = bus_space_read_1(iot, ioh, ELINK_TXSTATUS)) & TXS_COMPLETE) {
758 1.1 fvdl bus_space_write_1(iot, ioh, ELINK_TXSTATUS, 0x0);
759 1.1 fvdl
760 1.1 fvdl if (i & TXS_JABBER) {
761 1.1 fvdl ++sc->sc_ethercom.ec_if.if_oerrors;
762 1.1 fvdl if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG)
763 1.1 fvdl printf("%s: jabber (%x)\n",
764 1.1 fvdl sc->sc_dev.dv_xname, i);
765 1.15.2.1 bouyer ex_init(ifp);
766 1.1 fvdl /* TODO: be more subtle here */
767 1.1 fvdl } else if (i & TXS_UNDERRUN) {
768 1.1 fvdl ++sc->sc_ethercom.ec_if.if_oerrors;
769 1.1 fvdl if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG)
770 1.1 fvdl printf("%s: fifo underrun (%x) @%d\n",
771 1.1 fvdl sc->sc_dev.dv_xname, i,
772 1.1 fvdl sc->tx_start_thresh);
773 1.1 fvdl if (sc->tx_succ_ok < 100)
774 1.1 fvdl sc->tx_start_thresh = min(ETHER_MAX_LEN,
775 1.1 fvdl sc->tx_start_thresh + 20);
776 1.1 fvdl sc->tx_succ_ok = 0;
777 1.15.2.1 bouyer ex_init(ifp);
778 1.1 fvdl /* TODO: be more subtle here */
779 1.1 fvdl } else if (i & TXS_MAX_COLLISION) {
780 1.1 fvdl ++sc->sc_ethercom.ec_if.if_collisions;
781 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE);
782 1.1 fvdl sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE;
783 1.1 fvdl } else
784 1.1 fvdl sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127;
785 1.1 fvdl }
786 1.1 fvdl }
787 1.1 fvdl
788 1.1 fvdl int
789 1.1 fvdl ex_media_chg(ifp)
790 1.1 fvdl struct ifnet *ifp;
791 1.1 fvdl {
792 1.1 fvdl
793 1.1 fvdl if (ifp->if_flags & IFF_UP)
794 1.15.2.1 bouyer ex_init(ifp);
795 1.1 fvdl return 0;
796 1.1 fvdl }
797 1.1 fvdl
798 1.1 fvdl void
799 1.1 fvdl ex_set_media(sc)
800 1.1 fvdl struct ex_softc *sc;
801 1.1 fvdl {
802 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
803 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
804 1.15.2.1 bouyer u_int32_t configreg;
805 1.1 fvdl
806 1.1 fvdl if (((sc->ex_conf & EX_CONF_MII) &&
807 1.1 fvdl (sc->ex_mii.mii_media_active & IFM_FDX))
808 1.1 fvdl || (!(sc->ex_conf & EX_CONF_MII) &&
809 1.1 fvdl (sc->ex_mii.mii_media.ifm_media & IFM_FDX))) {
810 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL,
811 1.1 fvdl MAC_CONTROL_FDX);
812 1.1 fvdl } else {
813 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 0);
814 1.1 fvdl }
815 1.1 fvdl
816 1.1 fvdl /*
817 1.1 fvdl * If the device has MII, select it, and then tell the
818 1.1 fvdl * PHY which media to use.
819 1.1 fvdl */
820 1.1 fvdl if (sc->ex_conf & EX_CONF_MII) {
821 1.1 fvdl GO_WINDOW(3);
822 1.1 fvdl
823 1.15.2.1 bouyer configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG);
824 1.1 fvdl
825 1.15.2.1 bouyer configreg &= ~(CONFIG_MEDIAMASK << 16);
826 1.15.2.1 bouyer configreg |= (ELINKMEDIA_MII << (CONFIG_MEDIAMASK_SHIFT + 16));
827 1.1 fvdl
828 1.15.2.1 bouyer bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg);
829 1.1 fvdl mii_mediachg(&sc->ex_mii);
830 1.1 fvdl return;
831 1.1 fvdl }
832 1.1 fvdl
833 1.1 fvdl GO_WINDOW(4);
834 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0);
835 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER);
836 1.1 fvdl delay(800);
837 1.1 fvdl
838 1.1 fvdl /*
839 1.1 fvdl * Now turn on the selected media/transceiver.
840 1.1 fvdl */
841 1.1 fvdl switch (IFM_SUBTYPE(sc->ex_mii.mii_media.ifm_cur->ifm_media)) {
842 1.1 fvdl case IFM_10_T:
843 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE,
844 1.1 fvdl JABBER_GUARD_ENABLE|LINKBEAT_ENABLE);
845 1.1 fvdl break;
846 1.1 fvdl
847 1.1 fvdl case IFM_10_2:
848 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER);
849 1.1 fvdl DELAY(800);
850 1.1 fvdl break;
851 1.1 fvdl
852 1.1 fvdl case IFM_100_TX:
853 1.1 fvdl case IFM_100_FX:
854 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE,
855 1.1 fvdl LINKBEAT_ENABLE);
856 1.1 fvdl DELAY(800);
857 1.1 fvdl break;
858 1.1 fvdl
859 1.1 fvdl case IFM_10_5:
860 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE,
861 1.1 fvdl SQE_ENABLE);
862 1.1 fvdl DELAY(800);
863 1.1 fvdl break;
864 1.1 fvdl
865 1.1 fvdl case IFM_MANUAL:
866 1.1 fvdl break;
867 1.1 fvdl
868 1.1 fvdl case IFM_NONE:
869 1.1 fvdl return;
870 1.1 fvdl
871 1.1 fvdl default:
872 1.1 fvdl panic("ex_set_media: impossible");
873 1.1 fvdl }
874 1.1 fvdl
875 1.1 fvdl GO_WINDOW(3);
876 1.15.2.1 bouyer configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG);
877 1.1 fvdl
878 1.15.2.1 bouyer configreg &= ~(CONFIG_MEDIAMASK << 16);
879 1.15.2.1 bouyer configreg |= (sc->ex_mii.mii_media.ifm_cur->ifm_data <<
880 1.15.2.1 bouyer (CONFIG_MEDIAMASK_SHIFT + 16));
881 1.1 fvdl
882 1.15.2.1 bouyer bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg);
883 1.1 fvdl }
884 1.1 fvdl
885 1.1 fvdl /*
886 1.1 fvdl * Get currently-selected media from card.
887 1.1 fvdl * (if_media callback, may be called before interface is brought up).
888 1.1 fvdl */
889 1.1 fvdl void
890 1.1 fvdl ex_media_stat(ifp, req)
891 1.1 fvdl struct ifnet *ifp;
892 1.1 fvdl struct ifmediareq *req;
893 1.1 fvdl {
894 1.1 fvdl struct ex_softc *sc = ifp->if_softc;
895 1.1 fvdl
896 1.1 fvdl if (sc->ex_conf & EX_CONF_MII) {
897 1.1 fvdl mii_pollstat(&sc->ex_mii);
898 1.1 fvdl req->ifm_status = sc->ex_mii.mii_media_status;
899 1.1 fvdl req->ifm_active = sc->ex_mii.mii_media_active;
900 1.1 fvdl } else {
901 1.1 fvdl GO_WINDOW(4);
902 1.1 fvdl req->ifm_status = IFM_AVALID;
903 1.1 fvdl req->ifm_active = sc->ex_mii.mii_media.ifm_cur->ifm_media;
904 1.1 fvdl if (bus_space_read_2(sc->sc_iot, sc->sc_ioh,
905 1.1 fvdl ELINK_W4_MEDIA_TYPE) & LINKBEAT_DETECT)
906 1.1 fvdl req->ifm_status |= IFM_ACTIVE;
907 1.1 fvdl GO_WINDOW(1);
908 1.1 fvdl }
909 1.1 fvdl }
910 1.1 fvdl
911 1.1 fvdl
912 1.1 fvdl
913 1.1 fvdl /*
914 1.1 fvdl * Start outputting on the interface.
915 1.1 fvdl */
916 1.1 fvdl static void
917 1.1 fvdl ex_start(ifp)
918 1.1 fvdl struct ifnet *ifp;
919 1.1 fvdl {
920 1.1 fvdl struct ex_softc *sc = ifp->if_softc;
921 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
922 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
923 1.1 fvdl volatile struct ex_fraghdr *fr = NULL;
924 1.1 fvdl volatile struct ex_dpd *dpd = NULL, *prevdpd = NULL;
925 1.1 fvdl struct ex_txdesc *txp;
926 1.1 fvdl bus_dmamap_t dmamap;
927 1.1 fvdl int offset, totlen;
928 1.1 fvdl
929 1.1 fvdl if (sc->tx_head || sc->tx_free == NULL)
930 1.1 fvdl return;
931 1.1 fvdl
932 1.1 fvdl txp = NULL;
933 1.1 fvdl
934 1.1 fvdl /*
935 1.1 fvdl * We're finished if there is nothing more to add to the list or if
936 1.1 fvdl * we're all filled up with buffers to transmit.
937 1.1 fvdl */
938 1.1 fvdl while (ifp->if_snd.ifq_head != NULL && sc->tx_free != NULL) {
939 1.1 fvdl struct mbuf *mb_head;
940 1.1 fvdl int segment, error;
941 1.1 fvdl
942 1.1 fvdl /*
943 1.1 fvdl * Grab a packet to transmit.
944 1.1 fvdl */
945 1.1 fvdl IF_DEQUEUE(&ifp->if_snd, mb_head);
946 1.1 fvdl
947 1.1 fvdl /*
948 1.1 fvdl * Get pointer to next available tx desc.
949 1.1 fvdl */
950 1.1 fvdl txp = sc->tx_free;
951 1.1 fvdl sc->tx_free = txp->tx_next;
952 1.1 fvdl txp->tx_next = NULL;
953 1.1 fvdl dmamap = txp->tx_dmamap;
954 1.1 fvdl
955 1.1 fvdl /*
956 1.1 fvdl * Go through each of the mbufs in the chain and initialize
957 1.1 fvdl * the transmit buffer descriptors with the physical address
958 1.1 fvdl * and size of the mbuf.
959 1.1 fvdl */
960 1.1 fvdl reload:
961 1.1 fvdl error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap,
962 1.1 fvdl mb_head, BUS_DMA_NOWAIT);
963 1.1 fvdl switch (error) {
964 1.1 fvdl case 0:
965 1.1 fvdl /* Success. */
966 1.1 fvdl break;
967 1.1 fvdl
968 1.1 fvdl case EFBIG:
969 1.1 fvdl {
970 1.1 fvdl struct mbuf *mn;
971 1.1 fvdl
972 1.1 fvdl /*
973 1.1 fvdl * We ran out of segments. We have to recopy this
974 1.1 fvdl * mbuf chain first. Bail out if we can't get the
975 1.1 fvdl * new buffers.
976 1.1 fvdl */
977 1.1 fvdl printf("%s: too many segments, ", sc->sc_dev.dv_xname);
978 1.1 fvdl
979 1.1 fvdl MGETHDR(mn, M_DONTWAIT, MT_DATA);
980 1.1 fvdl if (mn == NULL) {
981 1.1 fvdl m_freem(mb_head);
982 1.1 fvdl printf("aborting\n");
983 1.1 fvdl goto out;
984 1.1 fvdl }
985 1.1 fvdl if (mb_head->m_pkthdr.len > MHLEN) {
986 1.1 fvdl MCLGET(mn, M_DONTWAIT);
987 1.1 fvdl if ((mn->m_flags & M_EXT) == 0) {
988 1.1 fvdl m_freem(mn);
989 1.1 fvdl m_freem(mb_head);
990 1.1 fvdl printf("aborting\n");
991 1.1 fvdl goto out;
992 1.1 fvdl }
993 1.1 fvdl }
994 1.1 fvdl m_copydata(mb_head, 0, mb_head->m_pkthdr.len,
995 1.1 fvdl mtod(mn, caddr_t));
996 1.1 fvdl mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len;
997 1.1 fvdl m_freem(mb_head);
998 1.1 fvdl mb_head = mn;
999 1.1 fvdl printf("retrying\n");
1000 1.1 fvdl goto reload;
1001 1.1 fvdl }
1002 1.1 fvdl
1003 1.1 fvdl default:
1004 1.1 fvdl /*
1005 1.1 fvdl * Some other problem; report it.
1006 1.1 fvdl */
1007 1.1 fvdl printf("%s: can't load mbuf chain, error = %d\n",
1008 1.1 fvdl sc->sc_dev.dv_xname, error);
1009 1.1 fvdl m_freem(mb_head);
1010 1.1 fvdl goto out;
1011 1.1 fvdl }
1012 1.1 fvdl
1013 1.1 fvdl fr = &txp->tx_dpd->dpd_frags[0];
1014 1.1 fvdl totlen = 0;
1015 1.1 fvdl for (segment = 0; segment < dmamap->dm_nsegs; segment++, fr++) {
1016 1.15.2.1 bouyer fr->fr_addr = htole32(dmamap->dm_segs[segment].ds_addr);
1017 1.15.2.1 bouyer fr->fr_len = htole32(dmamap->dm_segs[segment].ds_len);
1018 1.9 thorpej totlen += dmamap->dm_segs[segment].ds_len;
1019 1.1 fvdl }
1020 1.1 fvdl fr--;
1021 1.15.2.1 bouyer fr->fr_len |= htole32(EX_FR_LAST);
1022 1.1 fvdl txp->tx_mbhead = mb_head;
1023 1.1 fvdl
1024 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize,
1025 1.1 fvdl BUS_DMASYNC_PREWRITE);
1026 1.1 fvdl
1027 1.1 fvdl dpd = txp->tx_dpd;
1028 1.1 fvdl dpd->dpd_nextptr = 0;
1029 1.15.2.1 bouyer dpd->dpd_fsh = htole32(totlen);
1030 1.1 fvdl
1031 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1032 1.1 fvdl ((caddr_t)dpd - (caddr_t)sc->sc_dpd),
1033 1.1 fvdl sizeof (struct ex_dpd),
1034 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1035 1.1 fvdl
1036 1.1 fvdl /*
1037 1.1 fvdl * No need to stall the download engine, we know it's
1038 1.1 fvdl * not busy right now.
1039 1.1 fvdl *
1040 1.1 fvdl * Fix up pointers in both the "soft" tx and the physical
1041 1.1 fvdl * tx list.
1042 1.1 fvdl */
1043 1.1 fvdl if (sc->tx_head != NULL) {
1044 1.1 fvdl prevdpd = sc->tx_tail->tx_dpd;
1045 1.1 fvdl offset = ((caddr_t)prevdpd - (caddr_t)sc->sc_dpd);
1046 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1047 1.1 fvdl offset, sizeof (struct ex_dpd),
1048 1.1 fvdl BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1049 1.15.2.1 bouyer prevdpd->dpd_nextptr = htole32(DPD_DMADDR(sc, txp));
1050 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1051 1.1 fvdl offset, sizeof (struct ex_dpd),
1052 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1053 1.1 fvdl sc->tx_tail->tx_next = txp;
1054 1.1 fvdl sc->tx_tail = txp;
1055 1.1 fvdl } else {
1056 1.1 fvdl sc->tx_tail = sc->tx_head = txp;
1057 1.1 fvdl }
1058 1.1 fvdl
1059 1.1 fvdl #if NBPFILTER > 0
1060 1.1 fvdl /*
1061 1.1 fvdl * Pass packet to bpf if there is a listener.
1062 1.1 fvdl */
1063 1.1 fvdl if (ifp->if_bpf)
1064 1.1 fvdl bpf_mtap(ifp->if_bpf, mb_head);
1065 1.1 fvdl #endif
1066 1.1 fvdl }
1067 1.1 fvdl out:
1068 1.1 fvdl if (sc->tx_head) {
1069 1.15.2.1 bouyer sc->tx_tail->tx_dpd->dpd_fsh |= htole32(EX_DPD_DNIND);
1070 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1071 1.1 fvdl ((caddr_t)sc->tx_tail->tx_dpd - (caddr_t)sc->sc_dpd),
1072 1.1 fvdl sizeof (struct ex_dpd),
1073 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1074 1.1 fvdl ifp->if_flags |= IFF_OACTIVE;
1075 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_DNUNSTALL);
1076 1.1 fvdl bus_space_write_4(iot, ioh, ELINK_DNLISTPTR,
1077 1.1 fvdl DPD_DMADDR(sc, sc->tx_head));
1078 1.3 drochner
1079 1.3 drochner /* trigger watchdog */
1080 1.3 drochner ifp->if_timer = 5;
1081 1.1 fvdl }
1082 1.1 fvdl }
1083 1.1 fvdl
1084 1.1 fvdl
1085 1.1 fvdl int
1086 1.1 fvdl ex_intr(arg)
1087 1.1 fvdl void *arg;
1088 1.1 fvdl {
1089 1.1 fvdl struct ex_softc *sc = arg;
1090 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1091 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1092 1.1 fvdl u_int16_t stat;
1093 1.1 fvdl int ret = 0;
1094 1.1 fvdl struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1095 1.1 fvdl
1096 1.15.2.1 bouyer if (sc->enabled == 0 ||
1097 1.15.2.1 bouyer (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0)
1098 1.15.2.1 bouyer return (0);
1099 1.15.2.1 bouyer
1100 1.1 fvdl for (;;) {
1101 1.15.2.1 bouyer bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH);
1102 1.15.2.1 bouyer
1103 1.1 fvdl stat = bus_space_read_2(iot, ioh, ELINK_STATUS);
1104 1.15.2.1 bouyer
1105 1.15.2.1 bouyer if ((stat & S_MASK) == 0) {
1106 1.15.2.1 bouyer if ((stat & S_INTR_LATCH) == 0) {
1107 1.15.2.1 bouyer #if 0
1108 1.15.2.1 bouyer printf("%s: intr latch cleared\n",
1109 1.15.2.1 bouyer sc->sc_dev.dv_xname);
1110 1.15.2.1 bouyer #endif
1111 1.15.2.1 bouyer break;
1112 1.15.2.1 bouyer }
1113 1.15.2.1 bouyer }
1114 1.15.2.1 bouyer
1115 1.15.2.1 bouyer ret = 1;
1116 1.15.2.1 bouyer
1117 1.1 fvdl /*
1118 1.1 fvdl * Acknowledge interrupts.
1119 1.1 fvdl */
1120 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR |
1121 1.15.2.1 bouyer (stat & S_MASK));
1122 1.15 haya if (sc->intr_ack)
1123 1.15.2.1 bouyer (*sc->intr_ack)(sc);
1124 1.15.2.1 bouyer
1125 1.1 fvdl if (stat & S_HOST_ERROR) {
1126 1.1 fvdl printf("%s: adapter failure (%x)\n",
1127 1.1 fvdl sc->sc_dev.dv_xname, stat);
1128 1.1 fvdl ex_reset(sc);
1129 1.15.2.1 bouyer ex_init(ifp);
1130 1.1 fvdl return 1;
1131 1.1 fvdl }
1132 1.1 fvdl if (stat & S_TX_COMPLETE) {
1133 1.1 fvdl ex_txstat(sc);
1134 1.1 fvdl }
1135 1.1 fvdl if (stat & S_UPD_STATS) {
1136 1.1 fvdl ex_getstats(sc);
1137 1.1 fvdl }
1138 1.1 fvdl if (stat & S_DN_COMPLETE) {
1139 1.1 fvdl struct ex_txdesc *txp, *ptxp = NULL;
1140 1.1 fvdl bus_dmamap_t txmap;
1141 1.3 drochner
1142 1.3 drochner /* reset watchdog timer, was set in ex_start() */
1143 1.3 drochner ifp->if_timer = 0;
1144 1.3 drochner
1145 1.1 fvdl for (txp = sc->tx_head; txp != NULL;
1146 1.1 fvdl txp = txp->tx_next) {
1147 1.1 fvdl bus_dmamap_sync(sc->sc_dmat,
1148 1.1 fvdl sc->sc_dpd_dmamap,
1149 1.1 fvdl (caddr_t)txp->tx_dpd - (caddr_t)sc->sc_dpd,
1150 1.1 fvdl sizeof (struct ex_dpd),
1151 1.1 fvdl BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1152 1.1 fvdl if (txp->tx_mbhead != NULL) {
1153 1.1 fvdl txmap = txp->tx_dmamap;
1154 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, txmap,
1155 1.1 fvdl 0, txmap->dm_mapsize,
1156 1.1 fvdl BUS_DMASYNC_POSTWRITE);
1157 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, txmap);
1158 1.1 fvdl m_freem(txp->tx_mbhead);
1159 1.1 fvdl txp->tx_mbhead = NULL;
1160 1.1 fvdl }
1161 1.1 fvdl ptxp = txp;
1162 1.1 fvdl }
1163 1.1 fvdl
1164 1.1 fvdl /*
1165 1.1 fvdl * Move finished tx buffers back to the tx free list.
1166 1.1 fvdl */
1167 1.1 fvdl if (sc->tx_free) {
1168 1.1 fvdl sc->tx_ftail->tx_next = sc->tx_head;
1169 1.1 fvdl sc->tx_ftail = ptxp;
1170 1.1 fvdl } else
1171 1.1 fvdl sc->tx_ftail = sc->tx_free = sc->tx_head;
1172 1.1 fvdl
1173 1.1 fvdl sc->tx_head = sc->tx_tail = NULL;
1174 1.1 fvdl ifp->if_flags &= ~IFF_OACTIVE;
1175 1.1 fvdl }
1176 1.1 fvdl
1177 1.1 fvdl if (stat & S_UP_COMPLETE) {
1178 1.1 fvdl struct ex_rxdesc *rxd;
1179 1.1 fvdl struct mbuf *m;
1180 1.1 fvdl struct ex_upd *upd;
1181 1.1 fvdl bus_dmamap_t rxmap;
1182 1.1 fvdl u_int32_t pktstat;
1183 1.1 fvdl
1184 1.1 fvdl rcvloop:
1185 1.1 fvdl rxd = sc->rx_head;
1186 1.1 fvdl rxmap = rxd->rx_dmamap;
1187 1.1 fvdl m = rxd->rx_mbhead;
1188 1.1 fvdl upd = rxd->rx_upd;
1189 1.1 fvdl
1190 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, rxmap, 0,
1191 1.1 fvdl rxmap->dm_mapsize,
1192 1.1 fvdl BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1193 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap,
1194 1.1 fvdl ((caddr_t)upd - (caddr_t)sc->sc_upd),
1195 1.1 fvdl sizeof (struct ex_upd),
1196 1.1 fvdl BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1197 1.15.2.1 bouyer pktstat = le32toh(upd->upd_pktstatus);
1198 1.1 fvdl
1199 1.1 fvdl if (pktstat & EX_UPD_COMPLETE) {
1200 1.1 fvdl /*
1201 1.1 fvdl * Remove first packet from the chain.
1202 1.1 fvdl */
1203 1.1 fvdl sc->rx_head = rxd->rx_next;
1204 1.1 fvdl rxd->rx_next = NULL;
1205 1.1 fvdl
1206 1.1 fvdl /*
1207 1.1 fvdl * Add a new buffer to the receive chain.
1208 1.1 fvdl * If this fails, the old buffer is recycled
1209 1.1 fvdl * instead.
1210 1.1 fvdl */
1211 1.1 fvdl if (ex_add_rxbuf(sc, rxd) == 0) {
1212 1.1 fvdl u_int16_t total_len;
1213 1.1 fvdl
1214 1.15.2.1 bouyer if (pktstat &
1215 1.15.2.1 bouyer ((sc->sc_ethercom.ec_capenable &
1216 1.15.2.1 bouyer ETHERCAP_VLAN_MTU) ?
1217 1.15.2.1 bouyer EX_UPD_ERR_VLAN : EX_UPD_ERR)) {
1218 1.1 fvdl ifp->if_ierrors++;
1219 1.1 fvdl m_freem(m);
1220 1.1 fvdl goto rcvloop;
1221 1.1 fvdl }
1222 1.1 fvdl
1223 1.1 fvdl total_len = pktstat & EX_UPD_PKTLENMASK;
1224 1.1 fvdl if (total_len <
1225 1.1 fvdl sizeof(struct ether_header)) {
1226 1.1 fvdl m_freem(m);
1227 1.1 fvdl goto rcvloop;
1228 1.1 fvdl }
1229 1.1 fvdl m->m_pkthdr.rcvif = ifp;
1230 1.13 thorpej m->m_pkthdr.len = m->m_len = total_len;
1231 1.1 fvdl #if NBPFILTER > 0
1232 1.15.2.1 bouyer if (ifp->if_bpf)
1233 1.15.2.1 bouyer bpf_mtap(ifp->if_bpf, m);
1234 1.15.2.1 bouyer #endif
1235 1.13 thorpej (*ifp->if_input)(ifp, m);
1236 1.1 fvdl }
1237 1.1 fvdl goto rcvloop;
1238 1.1 fvdl }
1239 1.1 fvdl /*
1240 1.1 fvdl * Just in case we filled up all UPDs and the DMA engine
1241 1.3 drochner * stalled. We could be more subtle about this.
1242 1.1 fvdl */
1243 1.3 drochner if (bus_space_read_4(iot, ioh, ELINK_UPLISTPTR) == 0) {
1244 1.3 drochner printf("%s: uplistptr was 0\n",
1245 1.3 drochner sc->sc_dev.dv_xname);
1246 1.15.2.1 bouyer ex_init(ifp);
1247 1.3 drochner } else if (bus_space_read_4(iot, ioh, ELINK_UPPKTSTATUS)
1248 1.3 drochner & 0x2000) {
1249 1.3 drochner printf("%s: receive stalled\n",
1250 1.3 drochner sc->sc_dev.dv_xname);
1251 1.3 drochner bus_space_write_2(iot, ioh, ELINK_COMMAND,
1252 1.3 drochner ELINK_UPUNSTALL);
1253 1.3 drochner }
1254 1.1 fvdl }
1255 1.1 fvdl }
1256 1.15.2.1 bouyer
1257 1.15.2.1 bouyer /* no more interrupts */
1258 1.15.2.1 bouyer if (ret && ifp->if_snd.ifq_head)
1259 1.15.2.1 bouyer ex_start(ifp);
1260 1.1 fvdl return ret;
1261 1.1 fvdl }
1262 1.1 fvdl
1263 1.1 fvdl int
1264 1.1 fvdl ex_ioctl(ifp, cmd, data)
1265 1.15.2.1 bouyer struct ifnet *ifp;
1266 1.1 fvdl u_long cmd;
1267 1.1 fvdl caddr_t data;
1268 1.1 fvdl {
1269 1.1 fvdl struct ex_softc *sc = ifp->if_softc;
1270 1.1 fvdl struct ifreq *ifr = (struct ifreq *)data;
1271 1.15.2.1 bouyer int s, error;
1272 1.1 fvdl
1273 1.1 fvdl s = splnet();
1274 1.1 fvdl
1275 1.1 fvdl switch (cmd) {
1276 1.1 fvdl case SIOCSIFMEDIA:
1277 1.1 fvdl case SIOCGIFMEDIA:
1278 1.1 fvdl error = ifmedia_ioctl(ifp, ifr, &sc->ex_mii.mii_media, cmd);
1279 1.1 fvdl break;
1280 1.1 fvdl
1281 1.15.2.1 bouyer default:
1282 1.15.2.1 bouyer error = ether_ioctl(ifp, cmd, data);
1283 1.1 fvdl if (error == ENETRESET) {
1284 1.1 fvdl /*
1285 1.1 fvdl * Multicast list has changed; set the hardware filter
1286 1.1 fvdl * accordingly.
1287 1.1 fvdl */
1288 1.1 fvdl ex_set_mc(sc);
1289 1.1 fvdl error = 0;
1290 1.1 fvdl }
1291 1.1 fvdl break;
1292 1.1 fvdl }
1293 1.1 fvdl
1294 1.1 fvdl splx(s);
1295 1.1 fvdl return (error);
1296 1.1 fvdl }
1297 1.1 fvdl
1298 1.1 fvdl void
1299 1.1 fvdl ex_getstats(sc)
1300 1.1 fvdl struct ex_softc *sc;
1301 1.1 fvdl {
1302 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1303 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1304 1.1 fvdl struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1305 1.1 fvdl u_int8_t upperok;
1306 1.1 fvdl
1307 1.1 fvdl GO_WINDOW(6);
1308 1.1 fvdl upperok = bus_space_read_1(iot, ioh, UPPER_FRAMES_OK);
1309 1.1 fvdl ifp->if_ipackets += bus_space_read_1(iot, ioh, RX_FRAMES_OK);
1310 1.1 fvdl ifp->if_ipackets += (upperok & 0x03) << 8;
1311 1.1 fvdl ifp->if_opackets += bus_space_read_1(iot, ioh, TX_FRAMES_OK);
1312 1.1 fvdl ifp->if_opackets += (upperok & 0x30) << 4;
1313 1.1 fvdl ifp->if_ierrors += bus_space_read_1(iot, ioh, RX_OVERRUNS);
1314 1.1 fvdl ifp->if_collisions += bus_space_read_1(iot, ioh, TX_COLLISIONS);
1315 1.1 fvdl /*
1316 1.1 fvdl * There seems to be no way to get the exact number of collisions,
1317 1.1 fvdl * this is the number that occured at the very least.
1318 1.1 fvdl */
1319 1.1 fvdl ifp->if_collisions += 2 * bus_space_read_1(iot, ioh,
1320 1.1 fvdl TX_AFTER_X_COLLISIONS);
1321 1.1 fvdl ifp->if_ibytes += bus_space_read_2(iot, ioh, RX_TOTAL_OK);
1322 1.1 fvdl ifp->if_obytes += bus_space_read_2(iot, ioh, TX_TOTAL_OK);
1323 1.1 fvdl
1324 1.1 fvdl /*
1325 1.1 fvdl * Clear the following to avoid stats overflow interrupts
1326 1.1 fvdl */
1327 1.12 drochner bus_space_read_1(iot, ioh, TX_DEFERRALS);
1328 1.1 fvdl bus_space_read_1(iot, ioh, TX_AFTER_1_COLLISION);
1329 1.1 fvdl bus_space_read_1(iot, ioh, TX_NO_SQE);
1330 1.1 fvdl bus_space_read_1(iot, ioh, TX_CD_LOST);
1331 1.1 fvdl GO_WINDOW(4);
1332 1.1 fvdl bus_space_read_1(iot, ioh, ELINK_W4_BADSSD);
1333 1.1 fvdl upperok = bus_space_read_1(iot, ioh, ELINK_W4_UBYTESOK);
1334 1.1 fvdl ifp->if_ibytes += (upperok & 0x0f) << 16;
1335 1.1 fvdl ifp->if_obytes += (upperok & 0xf0) << 12;
1336 1.1 fvdl GO_WINDOW(1);
1337 1.1 fvdl }
1338 1.1 fvdl
1339 1.1 fvdl void
1340 1.1 fvdl ex_printstats(sc)
1341 1.1 fvdl struct ex_softc *sc;
1342 1.1 fvdl {
1343 1.1 fvdl struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1344 1.1 fvdl
1345 1.1 fvdl ex_getstats(sc);
1346 1.15.2.1 bouyer printf("in %llu out %llu ierror %llu oerror %llu ibytes %llu obytes "
1347 1.15.2.1 bouyer "%llu\n", (unsigned long long)ifp->if_ipackets,
1348 1.15.2.1 bouyer (unsigned long long)ifp->if_opackets,
1349 1.15.2.1 bouyer (unsigned long long)ifp->if_ierrors,
1350 1.15.2.1 bouyer (unsigned long long)ifp->if_oerrors,
1351 1.15.2.1 bouyer (unsigned long long)ifp->if_ibytes,
1352 1.15.2.1 bouyer (unsigned long long)ifp->if_obytes);
1353 1.1 fvdl }
1354 1.1 fvdl
1355 1.1 fvdl void
1356 1.1 fvdl ex_tick(arg)
1357 1.1 fvdl void *arg;
1358 1.1 fvdl {
1359 1.1 fvdl struct ex_softc *sc = arg;
1360 1.15.2.1 bouyer int s;
1361 1.15.2.1 bouyer
1362 1.15.2.1 bouyer if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0)
1363 1.15.2.1 bouyer return;
1364 1.15.2.1 bouyer
1365 1.15.2.1 bouyer s = splnet();
1366 1.1 fvdl
1367 1.1 fvdl if (sc->ex_conf & EX_CONF_MII)
1368 1.1 fvdl mii_tick(&sc->ex_mii);
1369 1.1 fvdl
1370 1.1 fvdl if (!(bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, ELINK_STATUS)
1371 1.1 fvdl & S_COMMAND_IN_PROGRESS))
1372 1.1 fvdl ex_getstats(sc);
1373 1.1 fvdl
1374 1.1 fvdl splx(s);
1375 1.1 fvdl
1376 1.15.2.1 bouyer callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc);
1377 1.1 fvdl }
1378 1.1 fvdl
1379 1.1 fvdl void
1380 1.1 fvdl ex_reset(sc)
1381 1.1 fvdl struct ex_softc *sc;
1382 1.1 fvdl {
1383 1.15.2.1 bouyer u_int16_t val = GLOBAL_RESET;
1384 1.15.2.1 bouyer
1385 1.15.2.1 bouyer if (sc->ex_conf & EX_CONF_RESETHACK)
1386 1.15.2.1 bouyer val |= 0xff;
1387 1.15.2.1 bouyer bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, val);
1388 1.10 dean delay(400);
1389 1.1 fvdl ex_waitcmd(sc);
1390 1.1 fvdl }
1391 1.1 fvdl
1392 1.1 fvdl void
1393 1.1 fvdl ex_watchdog(ifp)
1394 1.1 fvdl struct ifnet *ifp;
1395 1.1 fvdl {
1396 1.1 fvdl struct ex_softc *sc = ifp->if_softc;
1397 1.1 fvdl
1398 1.1 fvdl log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
1399 1.1 fvdl ++sc->sc_ethercom.ec_if.if_oerrors;
1400 1.1 fvdl
1401 1.1 fvdl ex_reset(sc);
1402 1.15.2.1 bouyer ex_init(ifp);
1403 1.1 fvdl }
1404 1.1 fvdl
1405 1.1 fvdl void
1406 1.15.2.1 bouyer ex_stop(ifp, disable)
1407 1.15.2.1 bouyer struct ifnet *ifp;
1408 1.15.2.1 bouyer int disable;
1409 1.1 fvdl {
1410 1.15.2.1 bouyer struct ex_softc *sc = ifp->if_softc;
1411 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1412 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1413 1.1 fvdl struct ex_txdesc *tx;
1414 1.1 fvdl struct ex_rxdesc *rx;
1415 1.1 fvdl int i;
1416 1.1 fvdl
1417 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE);
1418 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE);
1419 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER);
1420 1.1 fvdl
1421 1.1 fvdl for (tx = sc->tx_head ; tx != NULL; tx = tx->tx_next) {
1422 1.1 fvdl if (tx->tx_mbhead == NULL)
1423 1.1 fvdl continue;
1424 1.1 fvdl m_freem(tx->tx_mbhead);
1425 1.1 fvdl tx->tx_mbhead = NULL;
1426 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, tx->tx_dmamap);
1427 1.1 fvdl tx->tx_dpd->dpd_fsh = tx->tx_dpd->dpd_nextptr = 0;
1428 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1429 1.1 fvdl ((caddr_t)tx->tx_dpd - (caddr_t)sc->sc_dpd),
1430 1.1 fvdl sizeof (struct ex_dpd),
1431 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1432 1.1 fvdl }
1433 1.1 fvdl sc->tx_tail = sc->tx_head = NULL;
1434 1.1 fvdl ex_init_txdescs(sc);
1435 1.1 fvdl
1436 1.1 fvdl sc->rx_tail = sc->rx_head = 0;
1437 1.1 fvdl for (i = 0; i < EX_NUPD; i++) {
1438 1.1 fvdl rx = &sc->sc_rxdescs[i];
1439 1.1 fvdl if (rx->rx_mbhead != NULL) {
1440 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, rx->rx_dmamap);
1441 1.1 fvdl m_freem(rx->rx_mbhead);
1442 1.1 fvdl rx->rx_mbhead = NULL;
1443 1.1 fvdl }
1444 1.1 fvdl ex_add_rxbuf(sc, rx);
1445 1.1 fvdl }
1446 1.1 fvdl
1447 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH);
1448 1.1 fvdl
1449 1.15.2.1 bouyer callout_stop(&sc->ex_mii_callout);
1450 1.15.2.1 bouyer if (sc->ex_conf & EX_CONF_MII)
1451 1.15.2.1 bouyer mii_down(&sc->ex_mii);
1452 1.1 fvdl
1453 1.1 fvdl ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1454 1.1 fvdl ifp->if_timer = 0;
1455 1.1 fvdl }
1456 1.1 fvdl
1457 1.1 fvdl static void
1458 1.1 fvdl ex_init_txdescs(sc)
1459 1.1 fvdl struct ex_softc *sc;
1460 1.1 fvdl {
1461 1.1 fvdl int i;
1462 1.1 fvdl
1463 1.1 fvdl for (i = 0; i < EX_NDPD; i++) {
1464 1.1 fvdl sc->sc_txdescs[i].tx_dmamap = sc->sc_tx_dmamaps[i];
1465 1.1 fvdl sc->sc_txdescs[i].tx_dpd = &sc->sc_dpd[i];
1466 1.1 fvdl if (i < EX_NDPD - 1)
1467 1.1 fvdl sc->sc_txdescs[i].tx_next = &sc->sc_txdescs[i + 1];
1468 1.1 fvdl else
1469 1.1 fvdl sc->sc_txdescs[i].tx_next = NULL;
1470 1.1 fvdl }
1471 1.1 fvdl sc->tx_free = &sc->sc_txdescs[0];
1472 1.1 fvdl sc->tx_ftail = &sc->sc_txdescs[EX_NDPD-1];
1473 1.1 fvdl }
1474 1.1 fvdl
1475 1.1 fvdl
1476 1.15.2.1 bouyer int
1477 1.15.2.1 bouyer ex_activate(self, act)
1478 1.15.2.1 bouyer struct device *self;
1479 1.15.2.1 bouyer enum devact act;
1480 1.15.2.1 bouyer {
1481 1.15.2.1 bouyer struct ex_softc *sc = (void *) self;
1482 1.15.2.1 bouyer int s, error = 0;
1483 1.15.2.1 bouyer
1484 1.15.2.1 bouyer s = splnet();
1485 1.15.2.1 bouyer switch (act) {
1486 1.15.2.1 bouyer case DVACT_ACTIVATE:
1487 1.15.2.1 bouyer error = EOPNOTSUPP;
1488 1.15.2.1 bouyer break;
1489 1.15.2.1 bouyer
1490 1.15.2.1 bouyer case DVACT_DEACTIVATE:
1491 1.15.2.1 bouyer if (sc->ex_conf & EX_CONF_MII)
1492 1.15.2.1 bouyer mii_activate(&sc->ex_mii, act, MII_PHY_ANY,
1493 1.15.2.1 bouyer MII_OFFSET_ANY);
1494 1.15.2.1 bouyer if_deactivate(&sc->sc_ethercom.ec_if);
1495 1.15.2.1 bouyer break;
1496 1.15.2.1 bouyer }
1497 1.15.2.1 bouyer splx(s);
1498 1.15.2.1 bouyer
1499 1.15.2.1 bouyer return (error);
1500 1.15.2.1 bouyer }
1501 1.15.2.1 bouyer
1502 1.15.2.1 bouyer int
1503 1.15.2.1 bouyer ex_detach(sc)
1504 1.15.2.1 bouyer struct ex_softc *sc;
1505 1.15.2.1 bouyer {
1506 1.15.2.1 bouyer struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1507 1.15.2.1 bouyer struct ex_rxdesc *rxd;
1508 1.15.2.1 bouyer int i;
1509 1.15.2.1 bouyer
1510 1.15.2.1 bouyer /* Succeed now if there's no work to do. */
1511 1.15.2.1 bouyer if ((sc->ex_flags & EX_FLAGS_ATTACHED) == 0)
1512 1.15.2.1 bouyer return (0);
1513 1.15.2.1 bouyer
1514 1.15.2.1 bouyer /* Unhook our tick handler. */
1515 1.15.2.1 bouyer callout_stop(&sc->ex_mii_callout);
1516 1.15.2.1 bouyer
1517 1.15.2.1 bouyer if (sc->ex_conf & EX_CONF_MII) {
1518 1.15.2.1 bouyer /* Detach all PHYs */
1519 1.15.2.1 bouyer mii_detach(&sc->ex_mii, MII_PHY_ANY, MII_OFFSET_ANY);
1520 1.15.2.1 bouyer }
1521 1.15.2.1 bouyer
1522 1.15.2.1 bouyer /* Delete all remaining media. */
1523 1.15.2.1 bouyer ifmedia_delete_instance(&sc->ex_mii.mii_media, IFM_INST_ANY);
1524 1.15.2.1 bouyer
1525 1.15.2.1 bouyer #if NRND > 0
1526 1.15.2.1 bouyer rnd_detach_source(&sc->rnd_source);
1527 1.15.2.1 bouyer #endif
1528 1.15.2.1 bouyer #if NBPFILTER > 0
1529 1.15.2.1 bouyer bpfdetach(ifp);
1530 1.15.2.1 bouyer #endif
1531 1.15.2.1 bouyer ether_ifdetach(ifp);
1532 1.15.2.1 bouyer if_detach(ifp);
1533 1.15.2.1 bouyer
1534 1.15.2.1 bouyer for (i = 0; i < EX_NUPD; i++) {
1535 1.15.2.1 bouyer rxd = &sc->sc_rxdescs[i];
1536 1.15.2.1 bouyer if (rxd->rx_mbhead != NULL) {
1537 1.15.2.1 bouyer bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap);
1538 1.15.2.1 bouyer m_freem(rxd->rx_mbhead);
1539 1.15.2.1 bouyer rxd->rx_mbhead = NULL;
1540 1.15.2.1 bouyer }
1541 1.15.2.1 bouyer }
1542 1.15.2.1 bouyer for (i = 0; i < EX_NUPD; i++)
1543 1.15.2.1 bouyer bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]);
1544 1.15.2.1 bouyer for (i = 0; i < EX_NDPD; i++)
1545 1.15.2.1 bouyer bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]);
1546 1.15.2.1 bouyer bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap);
1547 1.15.2.1 bouyer bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap);
1548 1.15.2.1 bouyer bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd,
1549 1.15.2.1 bouyer EX_NDPD * sizeof (struct ex_dpd));
1550 1.15.2.1 bouyer bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg);
1551 1.15.2.1 bouyer bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap);
1552 1.15.2.1 bouyer bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap);
1553 1.15.2.1 bouyer bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd,
1554 1.15.2.1 bouyer EX_NUPD * sizeof (struct ex_upd));
1555 1.15.2.1 bouyer bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg);
1556 1.15.2.1 bouyer
1557 1.15.2.1 bouyer shutdownhook_disestablish(sc->sc_sdhook);
1558 1.15.2.1 bouyer
1559 1.15.2.1 bouyer return (0);
1560 1.15.2.1 bouyer }
1561 1.15.2.1 bouyer
1562 1.1 fvdl /*
1563 1.1 fvdl * Before reboots, reset card completely.
1564 1.1 fvdl */
1565 1.1 fvdl static void
1566 1.1 fvdl ex_shutdown(arg)
1567 1.1 fvdl void *arg;
1568 1.1 fvdl {
1569 1.15.2.1 bouyer struct ex_softc *sc = arg;
1570 1.1 fvdl
1571 1.15.2.1 bouyer ex_stop(&sc->sc_ethercom.ec_if, 0);
1572 1.1 fvdl }
1573 1.1 fvdl
1574 1.1 fvdl /*
1575 1.1 fvdl * Read EEPROM data.
1576 1.1 fvdl * XXX what to do if EEPROM doesn't unbusy?
1577 1.1 fvdl */
1578 1.1 fvdl u_int16_t
1579 1.1 fvdl ex_read_eeprom(sc, offset)
1580 1.1 fvdl struct ex_softc *sc;
1581 1.1 fvdl int offset;
1582 1.1 fvdl {
1583 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1584 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1585 1.15.2.1 bouyer u_int16_t data = 0, cmd = READ_EEPROM;
1586 1.15.2.1 bouyer int off;
1587 1.15.2.1 bouyer
1588 1.15.2.1 bouyer off = sc->ex_conf & EX_CONF_EEPROM_OFF ? 0x30 : 0;
1589 1.15.2.1 bouyer cmd = sc->ex_conf & EX_CONF_EEPROM_8BIT ? READ_EEPROM8 : READ_EEPROM;
1590 1.1 fvdl
1591 1.1 fvdl GO_WINDOW(0);
1592 1.1 fvdl if (ex_eeprom_busy(sc))
1593 1.1 fvdl goto out;
1594 1.15.2.1 bouyer bus_space_write_2(iot, ioh, ELINK_W0_EEPROM_COMMAND,
1595 1.15.2.1 bouyer cmd | (off + (offset & 0x3f)));
1596 1.1 fvdl if (ex_eeprom_busy(sc))
1597 1.1 fvdl goto out;
1598 1.1 fvdl data = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_DATA);
1599 1.1 fvdl out:
1600 1.1 fvdl return data;
1601 1.1 fvdl }
1602 1.1 fvdl
1603 1.1 fvdl static int
1604 1.1 fvdl ex_eeprom_busy(sc)
1605 1.1 fvdl struct ex_softc *sc;
1606 1.1 fvdl {
1607 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1608 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1609 1.1 fvdl int i = 100;
1610 1.1 fvdl
1611 1.1 fvdl while (i--) {
1612 1.1 fvdl if (!(bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND) &
1613 1.1 fvdl EEPROM_BUSY))
1614 1.1 fvdl return 0;
1615 1.1 fvdl delay(100);
1616 1.1 fvdl }
1617 1.1 fvdl printf("\n%s: eeprom stays busy.\n", sc->sc_dev.dv_xname);
1618 1.1 fvdl return (1);
1619 1.1 fvdl }
1620 1.1 fvdl
1621 1.1 fvdl /*
1622 1.1 fvdl * Create a new rx buffer and add it to the 'soft' rx list.
1623 1.1 fvdl */
1624 1.1 fvdl static int
1625 1.1 fvdl ex_add_rxbuf(sc, rxd)
1626 1.1 fvdl struct ex_softc *sc;
1627 1.1 fvdl struct ex_rxdesc *rxd;
1628 1.1 fvdl {
1629 1.1 fvdl struct mbuf *m, *oldm;
1630 1.1 fvdl bus_dmamap_t rxmap;
1631 1.1 fvdl int error, rval = 0;
1632 1.1 fvdl
1633 1.1 fvdl oldm = rxd->rx_mbhead;
1634 1.1 fvdl rxmap = rxd->rx_dmamap;
1635 1.1 fvdl
1636 1.1 fvdl MGETHDR(m, M_DONTWAIT, MT_DATA);
1637 1.1 fvdl if (m != NULL) {
1638 1.1 fvdl MCLGET(m, M_DONTWAIT);
1639 1.1 fvdl if ((m->m_flags & M_EXT) == 0) {
1640 1.1 fvdl m_freem(m);
1641 1.1 fvdl if (oldm == NULL)
1642 1.1 fvdl return 1;
1643 1.1 fvdl m = oldm;
1644 1.1 fvdl m->m_data = m->m_ext.ext_buf;
1645 1.1 fvdl rval = 1;
1646 1.1 fvdl }
1647 1.1 fvdl } else {
1648 1.1 fvdl if (oldm == NULL)
1649 1.1 fvdl return 1;
1650 1.1 fvdl m = oldm;
1651 1.1 fvdl m->m_data = m->m_ext.ext_buf;
1652 1.1 fvdl rval = 1;
1653 1.1 fvdl }
1654 1.1 fvdl
1655 1.1 fvdl /*
1656 1.1 fvdl * Setup the DMA map for this receive buffer.
1657 1.1 fvdl */
1658 1.1 fvdl if (m != oldm) {
1659 1.1 fvdl if (oldm != NULL)
1660 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, rxmap);
1661 1.1 fvdl error = bus_dmamap_load(sc->sc_dmat, rxmap,
1662 1.1 fvdl m->m_ext.ext_buf, MCLBYTES, NULL, BUS_DMA_NOWAIT);
1663 1.1 fvdl if (error) {
1664 1.1 fvdl printf("%s: can't load rx buffer, error = %d\n",
1665 1.1 fvdl sc->sc_dev.dv_xname, error);
1666 1.1 fvdl panic("ex_add_rxbuf"); /* XXX */
1667 1.1 fvdl }
1668 1.1 fvdl }
1669 1.1 fvdl
1670 1.1 fvdl /*
1671 1.1 fvdl * Align for data after 14 byte header.
1672 1.1 fvdl */
1673 1.1 fvdl m->m_data += 2;
1674 1.1 fvdl
1675 1.1 fvdl rxd->rx_mbhead = m;
1676 1.15.2.1 bouyer rxd->rx_upd->upd_pktstatus = htole32(MCLBYTES - 2);
1677 1.9 thorpej rxd->rx_upd->upd_frags[0].fr_addr =
1678 1.15.2.1 bouyer htole32(rxmap->dm_segs[0].ds_addr + 2);
1679 1.1 fvdl rxd->rx_upd->upd_nextptr = 0;
1680 1.1 fvdl
1681 1.1 fvdl /*
1682 1.1 fvdl * Attach it to the end of the list.
1683 1.1 fvdl */
1684 1.1 fvdl if (sc->rx_head != NULL) {
1685 1.1 fvdl sc->rx_tail->rx_next = rxd;
1686 1.15.2.1 bouyer sc->rx_tail->rx_upd->upd_nextptr = htole32(sc->sc_upddma +
1687 1.9 thorpej ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd));
1688 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap,
1689 1.1 fvdl (caddr_t)sc->rx_tail->rx_upd - (caddr_t)sc->sc_upd,
1690 1.1 fvdl sizeof (struct ex_upd),
1691 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1692 1.1 fvdl } else {
1693 1.1 fvdl sc->rx_head = rxd;
1694 1.1 fvdl }
1695 1.1 fvdl sc->rx_tail = rxd;
1696 1.1 fvdl
1697 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, rxmap, 0, rxmap->dm_mapsize,
1698 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1699 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap,
1700 1.1 fvdl ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd),
1701 1.1 fvdl sizeof (struct ex_upd), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1702 1.1 fvdl return (rval);
1703 1.1 fvdl }
1704 1.1 fvdl
1705 1.15.2.1 bouyer u_int32_t
1706 1.15.2.1 bouyer ex_mii_bitbang_read(self)
1707 1.15.2.1 bouyer struct device *self;
1708 1.1 fvdl {
1709 1.15.2.1 bouyer struct ex_softc *sc = (void *) self;
1710 1.1 fvdl
1711 1.15.2.1 bouyer /* We're already in Window 4. */
1712 1.15.2.1 bouyer return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT));
1713 1.1 fvdl }
1714 1.1 fvdl
1715 1.1 fvdl void
1716 1.15.2.1 bouyer ex_mii_bitbang_write(self, val)
1717 1.15.2.1 bouyer struct device *self;
1718 1.15.2.1 bouyer u_int32_t val;
1719 1.1 fvdl {
1720 1.15.2.1 bouyer struct ex_softc *sc = (void *) self;
1721 1.1 fvdl
1722 1.15.2.1 bouyer /* We're already in Window 4. */
1723 1.1 fvdl bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT, val);
1724 1.1 fvdl }
1725 1.1 fvdl
1726 1.1 fvdl int
1727 1.1 fvdl ex_mii_readreg(v, phy, reg)
1728 1.1 fvdl struct device *v;
1729 1.15.2.1 bouyer int phy, reg;
1730 1.1 fvdl {
1731 1.1 fvdl struct ex_softc *sc = (struct ex_softc *)v;
1732 1.15.2.1 bouyer int val;
1733 1.1 fvdl
1734 1.1 fvdl if ((sc->ex_conf & EX_CONF_INTPHY) && phy != ELINK_INTPHY_ID)
1735 1.1 fvdl return 0;
1736 1.1 fvdl
1737 1.1 fvdl GO_WINDOW(4);
1738 1.1 fvdl
1739 1.15.2.1 bouyer val = mii_bitbang_readreg(v, &ex_mii_bitbang_ops, phy, reg);
1740 1.1 fvdl
1741 1.1 fvdl GO_WINDOW(1);
1742 1.1 fvdl
1743 1.15.2.1 bouyer return (val);
1744 1.1 fvdl }
1745 1.1 fvdl
1746 1.1 fvdl void
1747 1.1 fvdl ex_mii_writereg(v, phy, reg, data)
1748 1.1 fvdl struct device *v;
1749 1.1 fvdl int phy;
1750 1.1 fvdl int reg;
1751 1.1 fvdl int data;
1752 1.1 fvdl {
1753 1.1 fvdl struct ex_softc *sc = (struct ex_softc *)v;
1754 1.1 fvdl
1755 1.1 fvdl GO_WINDOW(4);
1756 1.1 fvdl
1757 1.15.2.1 bouyer mii_bitbang_writereg(v, &ex_mii_bitbang_ops, phy, reg, data);
1758 1.1 fvdl
1759 1.1 fvdl GO_WINDOW(1);
1760 1.1 fvdl }
1761 1.1 fvdl
1762 1.1 fvdl void
1763 1.1 fvdl ex_mii_statchg(v)
1764 1.1 fvdl struct device *v;
1765 1.1 fvdl {
1766 1.1 fvdl struct ex_softc *sc = (struct ex_softc *)v;
1767 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1768 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1769 1.1 fvdl int mctl;
1770 1.1 fvdl
1771 1.1 fvdl GO_WINDOW(3);
1772 1.1 fvdl mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL);
1773 1.1 fvdl if (sc->ex_mii.mii_media_active & IFM_FDX)
1774 1.1 fvdl mctl |= MAC_CONTROL_FDX;
1775 1.1 fvdl else
1776 1.1 fvdl mctl &= ~MAC_CONTROL_FDX;
1777 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl);
1778 1.1 fvdl GO_WINDOW(1); /* back to operating window */
1779 1.1 fvdl }
1780