elinkxl.c revision 1.15.2.4 1 1.15.2.4 bouyer /* $NetBSD: elinkxl.c,v 1.15.2.4 2001/02/11 19:15:29 bouyer Exp $ */
2 1.1 fvdl
3 1.1 fvdl /*-
4 1.1 fvdl * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.1 fvdl * All rights reserved.
6 1.1 fvdl *
7 1.1 fvdl * This code is derived from software contributed to The NetBSD Foundation
8 1.1 fvdl * by Frank van der Linden.
9 1.1 fvdl *
10 1.1 fvdl * Redistribution and use in source and binary forms, with or without
11 1.1 fvdl * modification, are permitted provided that the following conditions
12 1.1 fvdl * are met:
13 1.1 fvdl * 1. Redistributions of source code must retain the above copyright
14 1.1 fvdl * notice, this list of conditions and the following disclaimer.
15 1.1 fvdl * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 fvdl * notice, this list of conditions and the following disclaimer in the
17 1.1 fvdl * documentation and/or other materials provided with the distribution.
18 1.1 fvdl * 3. All advertising materials mentioning features or use of this software
19 1.1 fvdl * must display the following acknowledgement:
20 1.1 fvdl * This product includes software developed by the NetBSD
21 1.1 fvdl * Foundation, Inc. and its contributors.
22 1.1 fvdl * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.1 fvdl * contributors may be used to endorse or promote products derived
24 1.1 fvdl * from this software without specific prior written permission.
25 1.1 fvdl *
26 1.1 fvdl * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.1 fvdl * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 fvdl * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1 fvdl * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.1 fvdl * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 fvdl * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 fvdl * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 fvdl * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 fvdl * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 fvdl * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 fvdl * POSSIBILITY OF SUCH DAMAGE.
37 1.1 fvdl */
38 1.1 fvdl
39 1.1 fvdl #include "opt_inet.h"
40 1.1 fvdl #include "opt_ns.h"
41 1.1 fvdl #include "bpfilter.h"
42 1.1 fvdl #include "rnd.h"
43 1.1 fvdl
44 1.1 fvdl #include <sys/param.h>
45 1.1 fvdl #include <sys/systm.h>
46 1.15.2.1 bouyer #include <sys/callout.h>
47 1.1 fvdl #include <sys/kernel.h>
48 1.1 fvdl #include <sys/mbuf.h>
49 1.1 fvdl #include <sys/socket.h>
50 1.1 fvdl #include <sys/ioctl.h>
51 1.1 fvdl #include <sys/errno.h>
52 1.1 fvdl #include <sys/syslog.h>
53 1.1 fvdl #include <sys/select.h>
54 1.1 fvdl #include <sys/device.h>
55 1.1 fvdl #if NRND > 0
56 1.1 fvdl #include <sys/rnd.h>
57 1.1 fvdl #endif
58 1.1 fvdl
59 1.15.2.2 bouyer #include <uvm/uvm_extern.h>
60 1.15.2.2 bouyer
61 1.1 fvdl #include <net/if.h>
62 1.1 fvdl #include <net/if_dl.h>
63 1.1 fvdl #include <net/if_ether.h>
64 1.1 fvdl #include <net/if_media.h>
65 1.1 fvdl
66 1.1 fvdl #ifdef INET
67 1.1 fvdl #include <netinet/in.h>
68 1.1 fvdl #include <netinet/in_systm.h>
69 1.1 fvdl #include <netinet/in_var.h>
70 1.1 fvdl #include <netinet/ip.h>
71 1.1 fvdl #include <netinet/if_inarp.h>
72 1.1 fvdl #endif
73 1.1 fvdl
74 1.1 fvdl #ifdef NS
75 1.1 fvdl #include <netns/ns.h>
76 1.1 fvdl #include <netns/ns_if.h>
77 1.1 fvdl #endif
78 1.1 fvdl
79 1.1 fvdl #if NBPFILTER > 0
80 1.1 fvdl #include <net/bpf.h>
81 1.1 fvdl #include <net/bpfdesc.h>
82 1.1 fvdl #endif
83 1.1 fvdl
84 1.1 fvdl #include <machine/cpu.h>
85 1.1 fvdl #include <machine/bus.h>
86 1.1 fvdl #include <machine/intr.h>
87 1.15.2.1 bouyer #include <machine/endian.h>
88 1.1 fvdl
89 1.1 fvdl #include <dev/mii/miivar.h>
90 1.1 fvdl #include <dev/mii/mii.h>
91 1.15.2.1 bouyer #include <dev/mii/mii_bitbang.h>
92 1.1 fvdl
93 1.1 fvdl #include <dev/ic/elink3reg.h>
94 1.1 fvdl /* #include <dev/ic/elink3var.h> */
95 1.1 fvdl #include <dev/ic/elinkxlreg.h>
96 1.1 fvdl #include <dev/ic/elinkxlvar.h>
97 1.1 fvdl
98 1.1 fvdl #ifdef DEBUG
99 1.1 fvdl int exdebug = 0;
100 1.1 fvdl #endif
101 1.1 fvdl
102 1.1 fvdl /* ifmedia callbacks */
103 1.1 fvdl int ex_media_chg __P((struct ifnet *ifp));
104 1.1 fvdl void ex_media_stat __P((struct ifnet *ifp, struct ifmediareq *req));
105 1.1 fvdl
106 1.1 fvdl void ex_probe_media __P((struct ex_softc *));
107 1.1 fvdl void ex_set_filter __P((struct ex_softc *));
108 1.1 fvdl void ex_set_media __P((struct ex_softc *));
109 1.1 fvdl struct mbuf *ex_get __P((struct ex_softc *, int));
110 1.1 fvdl u_int16_t ex_read_eeprom __P((struct ex_softc *, int));
111 1.15.2.1 bouyer int ex_init __P((struct ifnet *));
112 1.1 fvdl void ex_read __P((struct ex_softc *));
113 1.1 fvdl void ex_reset __P((struct ex_softc *));
114 1.1 fvdl void ex_set_mc __P((struct ex_softc *));
115 1.1 fvdl void ex_getstats __P((struct ex_softc *));
116 1.1 fvdl void ex_printstats __P((struct ex_softc *));
117 1.1 fvdl void ex_tick __P((void *));
118 1.1 fvdl
119 1.15.2.4 bouyer int ex_enable __P((struct ex_softc *));
120 1.15.2.4 bouyer void ex_disable __P((struct ex_softc *));
121 1.15.2.4 bouyer void ex_power __P((int, void *));
122 1.15.2.4 bouyer
123 1.1 fvdl static int ex_eeprom_busy __P((struct ex_softc *));
124 1.1 fvdl static int ex_add_rxbuf __P((struct ex_softc *, struct ex_rxdesc *));
125 1.1 fvdl static void ex_init_txdescs __P((struct ex_softc *));
126 1.1 fvdl
127 1.1 fvdl static void ex_shutdown __P((void *));
128 1.1 fvdl static void ex_start __P((struct ifnet *));
129 1.1 fvdl static void ex_txstat __P((struct ex_softc *));
130 1.1 fvdl
131 1.1 fvdl int ex_mii_readreg __P((struct device *, int, int));
132 1.1 fvdl void ex_mii_writereg __P((struct device *, int, int, int));
133 1.1 fvdl void ex_mii_statchg __P((struct device *));
134 1.1 fvdl
135 1.2 thorpej void ex_probemedia __P((struct ex_softc *));
136 1.2 thorpej
137 1.2 thorpej /*
138 1.2 thorpej * Structure to map media-present bits in boards to ifmedia codes and
139 1.2 thorpej * printable media names. Used for table-driven ifmedia initialization.
140 1.2 thorpej */
141 1.2 thorpej struct ex_media {
142 1.2 thorpej int exm_mpbit; /* media present bit */
143 1.2 thorpej const char *exm_name; /* name of medium */
144 1.2 thorpej int exm_ifmedia; /* ifmedia word for medium */
145 1.2 thorpej int exm_epmedia; /* ELINKMEDIA_* constant */
146 1.2 thorpej };
147 1.2 thorpej
148 1.2 thorpej /*
149 1.2 thorpej * Media table for 3c90x chips. Note that chips with MII have no
150 1.2 thorpej * `native' media.
151 1.2 thorpej */
152 1.2 thorpej struct ex_media ex_native_media[] = {
153 1.2 thorpej { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T,
154 1.2 thorpej ELINKMEDIA_10BASE_T },
155 1.2 thorpej { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX,
156 1.2 thorpej ELINKMEDIA_10BASE_T },
157 1.2 thorpej { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5,
158 1.2 thorpej ELINKMEDIA_AUI },
159 1.2 thorpej { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2,
160 1.2 thorpej ELINKMEDIA_10BASE_2 },
161 1.2 thorpej { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX,
162 1.2 thorpej ELINKMEDIA_100BASE_TX },
163 1.2 thorpej { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX,
164 1.2 thorpej ELINKMEDIA_100BASE_TX },
165 1.2 thorpej { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX,
166 1.2 thorpej ELINKMEDIA_100BASE_FX },
167 1.2 thorpej { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL,
168 1.2 thorpej ELINKMEDIA_MII },
169 1.2 thorpej { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4,
170 1.2 thorpej ELINKMEDIA_100BASE_T4 },
171 1.2 thorpej { 0, NULL, 0,
172 1.2 thorpej 0 },
173 1.2 thorpej };
174 1.2 thorpej
175 1.1 fvdl /*
176 1.15.2.1 bouyer * MII bit-bang glue.
177 1.15.2.1 bouyer */
178 1.15.2.1 bouyer u_int32_t ex_mii_bitbang_read __P((struct device *));
179 1.15.2.1 bouyer void ex_mii_bitbang_write __P((struct device *, u_int32_t));
180 1.15.2.1 bouyer
181 1.15.2.1 bouyer const struct mii_bitbang_ops ex_mii_bitbang_ops = {
182 1.15.2.1 bouyer ex_mii_bitbang_read,
183 1.15.2.1 bouyer ex_mii_bitbang_write,
184 1.15.2.1 bouyer {
185 1.15.2.1 bouyer ELINK_PHY_DATA, /* MII_BIT_MDO */
186 1.15.2.1 bouyer ELINK_PHY_DATA, /* MII_BIT_MDI */
187 1.15.2.1 bouyer ELINK_PHY_CLK, /* MII_BIT_MDC */
188 1.15.2.1 bouyer ELINK_PHY_DIR, /* MII_BIT_DIR_HOST_PHY */
189 1.15.2.1 bouyer 0, /* MII_BIT_DIR_PHY_HOST */
190 1.15.2.1 bouyer }
191 1.15.2.1 bouyer };
192 1.15.2.1 bouyer
193 1.15.2.1 bouyer /*
194 1.1 fvdl * Back-end attach and configure.
195 1.1 fvdl */
196 1.1 fvdl void
197 1.1 fvdl ex_config(sc)
198 1.1 fvdl struct ex_softc *sc;
199 1.1 fvdl {
200 1.1 fvdl struct ifnet *ifp;
201 1.1 fvdl u_int16_t val;
202 1.1 fvdl u_int8_t macaddr[ETHER_ADDR_LEN] = {0};
203 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
204 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
205 1.15.2.1 bouyer int i, error, attach_stage;
206 1.15.2.1 bouyer
207 1.15.2.1 bouyer callout_init(&sc->ex_mii_callout);
208 1.1 fvdl
209 1.1 fvdl ex_reset(sc);
210 1.1 fvdl
211 1.1 fvdl val = ex_read_eeprom(sc, EEPROM_OEM_ADDR0);
212 1.1 fvdl macaddr[0] = val >> 8;
213 1.1 fvdl macaddr[1] = val & 0xff;
214 1.1 fvdl val = ex_read_eeprom(sc, EEPROM_OEM_ADDR1);
215 1.1 fvdl macaddr[2] = val >> 8;
216 1.1 fvdl macaddr[3] = val & 0xff;
217 1.1 fvdl val = ex_read_eeprom(sc, EEPROM_OEM_ADDR2);
218 1.1 fvdl macaddr[4] = val >> 8;
219 1.1 fvdl macaddr[5] = val & 0xff;
220 1.1 fvdl
221 1.1 fvdl printf("%s: MAC address %s\n", sc->sc_dev.dv_xname,
222 1.1 fvdl ether_sprintf(macaddr));
223 1.1 fvdl
224 1.15.2.1 bouyer if (sc->ex_conf & (EX_CONF_INV_LED_POLARITY|EX_CONF_PHY_POWER)) {
225 1.15.2.1 bouyer GO_WINDOW(2);
226 1.15.2.1 bouyer val = bus_space_read_2(iot, ioh, ELINK_W2_RESET_OPTIONS);
227 1.15.2.1 bouyer if (sc->ex_conf & EX_CONF_INV_LED_POLARITY)
228 1.15.2.1 bouyer val |= ELINK_RESET_OPT_LEDPOLAR;
229 1.15.2.1 bouyer if (sc->ex_conf & EX_CONF_PHY_POWER)
230 1.15.2.1 bouyer val |= ELINK_RESET_OPT_PHYPOWER;
231 1.15.2.1 bouyer bus_space_write_2(iot, ioh, ELINK_W2_RESET_OPTIONS, val);
232 1.15 haya }
233 1.15 haya
234 1.1 fvdl attach_stage = 0;
235 1.1 fvdl
236 1.1 fvdl /*
237 1.1 fvdl * Allocate the upload descriptors, and create and load the DMA
238 1.1 fvdl * map for them.
239 1.1 fvdl */
240 1.1 fvdl if ((error = bus_dmamem_alloc(sc->sc_dmat,
241 1.15.2.2 bouyer EX_NUPD * sizeof (struct ex_upd), PAGE_SIZE, 0, &sc->sc_useg, 1,
242 1.15.2.1 bouyer &sc->sc_urseg, BUS_DMA_NOWAIT)) != 0) {
243 1.1 fvdl printf("%s: can't allocate upload descriptors, error = %d\n",
244 1.1 fvdl sc->sc_dev.dv_xname, error);
245 1.1 fvdl goto fail;
246 1.1 fvdl }
247 1.1 fvdl
248 1.1 fvdl attach_stage = 1;
249 1.1 fvdl
250 1.15.2.1 bouyer if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg,
251 1.1 fvdl EX_NUPD * sizeof (struct ex_upd), (caddr_t *)&sc->sc_upd,
252 1.1 fvdl BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
253 1.1 fvdl printf("%s: can't map upload descriptors, error = %d\n",
254 1.1 fvdl sc->sc_dev.dv_xname, error);
255 1.1 fvdl goto fail;
256 1.1 fvdl }
257 1.1 fvdl
258 1.1 fvdl attach_stage = 2;
259 1.1 fvdl
260 1.1 fvdl if ((error = bus_dmamap_create(sc->sc_dmat,
261 1.1 fvdl EX_NUPD * sizeof (struct ex_upd), 1,
262 1.1 fvdl EX_NUPD * sizeof (struct ex_upd), 0, BUS_DMA_NOWAIT,
263 1.1 fvdl &sc->sc_upd_dmamap)) != 0) {
264 1.1 fvdl printf("%s: can't create upload desc. DMA map, error = %d\n",
265 1.1 fvdl sc->sc_dev.dv_xname, error);
266 1.1 fvdl goto fail;
267 1.1 fvdl }
268 1.1 fvdl
269 1.1 fvdl attach_stage = 3;
270 1.1 fvdl
271 1.1 fvdl if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_upd_dmamap,
272 1.1 fvdl sc->sc_upd, EX_NUPD * sizeof (struct ex_upd), NULL,
273 1.1 fvdl BUS_DMA_NOWAIT)) != 0) {
274 1.1 fvdl printf("%s: can't load upload desc. DMA map, error = %d\n",
275 1.1 fvdl sc->sc_dev.dv_xname, error);
276 1.1 fvdl goto fail;
277 1.1 fvdl }
278 1.1 fvdl
279 1.1 fvdl attach_stage = 4;
280 1.1 fvdl
281 1.1 fvdl /*
282 1.1 fvdl * Allocate the download descriptors, and create and load the DMA
283 1.1 fvdl * map for them.
284 1.1 fvdl */
285 1.1 fvdl if ((error = bus_dmamem_alloc(sc->sc_dmat,
286 1.15.2.2 bouyer EX_NDPD * sizeof (struct ex_dpd), PAGE_SIZE, 0, &sc->sc_dseg, 1,
287 1.15.2.1 bouyer &sc->sc_drseg, BUS_DMA_NOWAIT)) != 0) {
288 1.1 fvdl printf("%s: can't allocate download descriptors, error = %d\n",
289 1.1 fvdl sc->sc_dev.dv_xname, error);
290 1.1 fvdl goto fail;
291 1.1 fvdl }
292 1.1 fvdl
293 1.1 fvdl attach_stage = 5;
294 1.1 fvdl
295 1.15.2.1 bouyer if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg,
296 1.1 fvdl EX_NDPD * sizeof (struct ex_dpd), (caddr_t *)&sc->sc_dpd,
297 1.1 fvdl BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
298 1.1 fvdl printf("%s: can't map download descriptors, error = %d\n",
299 1.1 fvdl sc->sc_dev.dv_xname, error);
300 1.1 fvdl goto fail;
301 1.1 fvdl }
302 1.1 fvdl bzero(sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd));
303 1.1 fvdl
304 1.1 fvdl attach_stage = 6;
305 1.1 fvdl
306 1.1 fvdl if ((error = bus_dmamap_create(sc->sc_dmat,
307 1.1 fvdl EX_NDPD * sizeof (struct ex_dpd), 1,
308 1.1 fvdl EX_NDPD * sizeof (struct ex_dpd), 0, BUS_DMA_NOWAIT,
309 1.1 fvdl &sc->sc_dpd_dmamap)) != 0) {
310 1.1 fvdl printf("%s: can't create download desc. DMA map, error = %d\n",
311 1.1 fvdl sc->sc_dev.dv_xname, error);
312 1.1 fvdl goto fail;
313 1.1 fvdl }
314 1.1 fvdl
315 1.1 fvdl attach_stage = 7;
316 1.1 fvdl
317 1.1 fvdl if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dpd_dmamap,
318 1.1 fvdl sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd), NULL,
319 1.1 fvdl BUS_DMA_NOWAIT)) != 0) {
320 1.1 fvdl printf("%s: can't load download desc. DMA map, error = %d\n",
321 1.1 fvdl sc->sc_dev.dv_xname, error);
322 1.1 fvdl goto fail;
323 1.1 fvdl }
324 1.1 fvdl
325 1.1 fvdl attach_stage = 8;
326 1.1 fvdl
327 1.1 fvdl
328 1.1 fvdl /*
329 1.1 fvdl * Create the transmit buffer DMA maps.
330 1.1 fvdl */
331 1.1 fvdl for (i = 0; i < EX_NDPD; i++) {
332 1.1 fvdl if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
333 1.1 fvdl EX_NTFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT,
334 1.1 fvdl &sc->sc_tx_dmamaps[i])) != 0) {
335 1.1 fvdl printf("%s: can't create tx DMA map %d, error = %d\n",
336 1.1 fvdl sc->sc_dev.dv_xname, i, error);
337 1.1 fvdl goto fail;
338 1.1 fvdl }
339 1.1 fvdl }
340 1.1 fvdl
341 1.1 fvdl attach_stage = 9;
342 1.1 fvdl
343 1.1 fvdl /*
344 1.1 fvdl * Create the receive buffer DMA maps.
345 1.1 fvdl */
346 1.1 fvdl for (i = 0; i < EX_NUPD; i++) {
347 1.1 fvdl if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
348 1.1 fvdl EX_NRFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT,
349 1.1 fvdl &sc->sc_rx_dmamaps[i])) != 0) {
350 1.1 fvdl printf("%s: can't create rx DMA map %d, error = %d\n",
351 1.1 fvdl sc->sc_dev.dv_xname, i, error);
352 1.1 fvdl goto fail;
353 1.1 fvdl }
354 1.1 fvdl }
355 1.1 fvdl
356 1.1 fvdl attach_stage = 10;
357 1.1 fvdl
358 1.1 fvdl /*
359 1.1 fvdl * Create ring of upload descriptors, only once. The DMA engine
360 1.1 fvdl * will loop over this when receiving packets, stalling if it
361 1.1 fvdl * hits an UPD with a finished receive.
362 1.1 fvdl */
363 1.1 fvdl for (i = 0; i < EX_NUPD; i++) {
364 1.1 fvdl sc->sc_rxdescs[i].rx_dmamap = sc->sc_rx_dmamaps[i];
365 1.1 fvdl sc->sc_rxdescs[i].rx_upd = &sc->sc_upd[i];
366 1.9 thorpej sc->sc_upd[i].upd_frags[0].fr_len =
367 1.15.2.1 bouyer htole32((MCLBYTES - 2) | EX_FR_LAST);
368 1.1 fvdl if (ex_add_rxbuf(sc, &sc->sc_rxdescs[i]) != 0) {
369 1.1 fvdl printf("%s: can't allocate or map rx buffers\n",
370 1.1 fvdl sc->sc_dev.dv_xname);
371 1.1 fvdl goto fail;
372 1.1 fvdl }
373 1.1 fvdl }
374 1.1 fvdl
375 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 0,
376 1.1 fvdl EX_NUPD * sizeof (struct ex_upd),
377 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
378 1.1 fvdl
379 1.1 fvdl ex_init_txdescs(sc);
380 1.1 fvdl
381 1.1 fvdl attach_stage = 11;
382 1.1 fvdl
383 1.1 fvdl
384 1.1 fvdl GO_WINDOW(3);
385 1.1 fvdl val = bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS);
386 1.1 fvdl if (val & ELINK_MEDIACAP_MII)
387 1.1 fvdl sc->ex_conf |= EX_CONF_MII;
388 1.1 fvdl
389 1.1 fvdl ifp = &sc->sc_ethercom.ec_if;
390 1.1 fvdl
391 1.2 thorpej /*
392 1.2 thorpej * Initialize our media structures and MII info. We'll
393 1.2 thorpej * probe the MII if we discover that we have one.
394 1.2 thorpej */
395 1.2 thorpej sc->ex_mii.mii_ifp = ifp;
396 1.2 thorpej sc->ex_mii.mii_readreg = ex_mii_readreg;
397 1.2 thorpej sc->ex_mii.mii_writereg = ex_mii_writereg;
398 1.2 thorpej sc->ex_mii.mii_statchg = ex_mii_statchg;
399 1.2 thorpej ifmedia_init(&sc->ex_mii.mii_media, 0, ex_media_chg,
400 1.2 thorpej ex_media_stat);
401 1.2 thorpej
402 1.1 fvdl if (sc->ex_conf & EX_CONF_MII) {
403 1.1 fvdl /*
404 1.1 fvdl * Find PHY, extract media information from it.
405 1.14 fvdl * First, select the right transceiver.
406 1.1 fvdl */
407 1.14 fvdl u_int32_t icfg;
408 1.14 fvdl
409 1.14 fvdl GO_WINDOW(3);
410 1.14 fvdl icfg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG);
411 1.14 fvdl icfg &= ~(CONFIG_XCVR_SEL << 16);
412 1.14 fvdl if (val & (ELINK_MEDIACAP_MII | ELINK_MEDIACAP_100BASET4))
413 1.14 fvdl icfg |= ELINKMEDIA_MII << (CONFIG_XCVR_SEL_SHIFT + 16);
414 1.14 fvdl if (val & ELINK_MEDIACAP_100BASETX)
415 1.14 fvdl icfg |= ELINKMEDIA_AUTO << (CONFIG_XCVR_SEL_SHIFT + 16);
416 1.14 fvdl if (val & ELINK_MEDIACAP_100BASEFX)
417 1.14 fvdl icfg |= ELINKMEDIA_100BASE_FX
418 1.14 fvdl << (CONFIG_XCVR_SEL_SHIFT + 16);
419 1.14 fvdl bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, icfg);
420 1.14 fvdl
421 1.15.2.1 bouyer mii_attach(&sc->sc_dev, &sc->ex_mii, 0xffffffff,
422 1.15.2.1 bouyer MII_PHY_ANY, MII_OFFSET_ANY, 0);
423 1.1 fvdl if (LIST_FIRST(&sc->ex_mii.mii_phys) == NULL) {
424 1.1 fvdl ifmedia_add(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE,
425 1.1 fvdl 0, NULL);
426 1.1 fvdl ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE);
427 1.1 fvdl } else {
428 1.1 fvdl ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_AUTO);
429 1.1 fvdl }
430 1.2 thorpej } else
431 1.2 thorpej ex_probemedia(sc);
432 1.1 fvdl
433 1.1 fvdl bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
434 1.1 fvdl ifp->if_softc = sc;
435 1.1 fvdl ifp->if_start = ex_start;
436 1.1 fvdl ifp->if_ioctl = ex_ioctl;
437 1.1 fvdl ifp->if_watchdog = ex_watchdog;
438 1.15.2.1 bouyer ifp->if_init = ex_init;
439 1.15.2.1 bouyer ifp->if_stop = ex_stop;
440 1.1 fvdl ifp->if_flags =
441 1.1 fvdl IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
442 1.15.2.3 bouyer IFQ_SET_READY(&ifp->if_snd);
443 1.1 fvdl
444 1.15.2.1 bouyer /*
445 1.15.2.1 bouyer * We can support 802.1Q VLAN-sized frames.
446 1.15.2.1 bouyer */
447 1.15.2.1 bouyer sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU;
448 1.15.2.1 bouyer
449 1.1 fvdl if_attach(ifp);
450 1.1 fvdl ether_ifattach(ifp, macaddr);
451 1.1 fvdl
452 1.1 fvdl GO_WINDOW(1);
453 1.1 fvdl
454 1.1 fvdl sc->tx_start_thresh = 20;
455 1.1 fvdl sc->tx_succ_ok = 0;
456 1.1 fvdl
457 1.1 fvdl /* TODO: set queues to 0 */
458 1.1 fvdl
459 1.1 fvdl #if NRND > 0
460 1.5 explorer rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname,
461 1.5 explorer RND_TYPE_NET, 0);
462 1.1 fvdl #endif
463 1.1 fvdl
464 1.1 fvdl /* Establish callback to reset card when we reboot. */
465 1.15.2.1 bouyer sc->sc_sdhook = shutdownhook_establish(ex_shutdown, sc);
466 1.15.2.4 bouyer if (sc->sc_sdhook == NULL)
467 1.15.2.4 bouyer printf("%s: WARNING: unable to establish shutdown hook\n",
468 1.15.2.4 bouyer sc->sc_dev.dv_xname);
469 1.15.2.4 bouyer
470 1.15.2.4 bouyer /* Add a suspend hook to make sure we com back up after a resume. */
471 1.15.2.4 bouyer sc->sc_powerhook = powerhook_establish(ex_power, sc);
472 1.15.2.4 bouyer if (sc->sc_powerhook == NULL)
473 1.15.2.4 bouyer printf("%s: WARNING: unable to establish power hook\n",
474 1.15.2.4 bouyer sc->sc_dev.dv_xname);
475 1.15.2.1 bouyer
476 1.15.2.1 bouyer /* The attach is successful. */
477 1.15.2.1 bouyer sc->ex_flags |= EX_FLAGS_ATTACHED;
478 1.1 fvdl return;
479 1.1 fvdl
480 1.1 fvdl fail:
481 1.1 fvdl /*
482 1.1 fvdl * Free any resources we've allocated during the failed attach
483 1.1 fvdl * attempt. Do this in reverse order and fall though.
484 1.1 fvdl */
485 1.1 fvdl switch (attach_stage) {
486 1.1 fvdl case 11:
487 1.1 fvdl {
488 1.1 fvdl struct ex_rxdesc *rxd;
489 1.1 fvdl
490 1.1 fvdl for (i = 0; i < EX_NUPD; i++) {
491 1.1 fvdl rxd = &sc->sc_rxdescs[i];
492 1.1 fvdl if (rxd->rx_mbhead != NULL) {
493 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap);
494 1.1 fvdl m_freem(rxd->rx_mbhead);
495 1.1 fvdl }
496 1.1 fvdl }
497 1.1 fvdl }
498 1.1 fvdl /* FALLTHROUGH */
499 1.1 fvdl
500 1.1 fvdl case 10:
501 1.1 fvdl for (i = 0; i < EX_NUPD; i++)
502 1.1 fvdl bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]);
503 1.1 fvdl /* FALLTHROUGH */
504 1.1 fvdl
505 1.1 fvdl case 9:
506 1.1 fvdl for (i = 0; i < EX_NDPD; i++)
507 1.1 fvdl bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]);
508 1.1 fvdl /* FALLTHROUGH */
509 1.1 fvdl case 8:
510 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap);
511 1.1 fvdl /* FALLTHROUGH */
512 1.1 fvdl
513 1.1 fvdl case 7:
514 1.1 fvdl bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap);
515 1.1 fvdl /* FALLTHROUGH */
516 1.1 fvdl
517 1.1 fvdl case 6:
518 1.1 fvdl bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd,
519 1.1 fvdl EX_NDPD * sizeof (struct ex_dpd));
520 1.1 fvdl /* FALLTHROUGH */
521 1.1 fvdl
522 1.1 fvdl case 5:
523 1.15.2.1 bouyer bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg);
524 1.1 fvdl break;
525 1.1 fvdl
526 1.1 fvdl case 4:
527 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap);
528 1.1 fvdl /* FALLTHROUGH */
529 1.1 fvdl
530 1.1 fvdl case 3:
531 1.1 fvdl bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap);
532 1.1 fvdl /* FALLTHROUGH */
533 1.1 fvdl
534 1.1 fvdl case 2:
535 1.1 fvdl bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd,
536 1.1 fvdl EX_NUPD * sizeof (struct ex_upd));
537 1.1 fvdl /* FALLTHROUGH */
538 1.1 fvdl
539 1.1 fvdl case 1:
540 1.15.2.1 bouyer bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg);
541 1.1 fvdl break;
542 1.1 fvdl }
543 1.1 fvdl
544 1.2 thorpej }
545 1.2 thorpej
546 1.2 thorpej /*
547 1.2 thorpej * Find the media present on non-MII chips.
548 1.2 thorpej */
549 1.2 thorpej void
550 1.2 thorpej ex_probemedia(sc)
551 1.2 thorpej struct ex_softc *sc;
552 1.2 thorpej {
553 1.2 thorpej bus_space_tag_t iot = sc->sc_iot;
554 1.2 thorpej bus_space_handle_t ioh = sc->sc_ioh;
555 1.2 thorpej struct ifmedia *ifm = &sc->ex_mii.mii_media;
556 1.2 thorpej struct ex_media *exm;
557 1.2 thorpej u_int16_t config1, reset_options, default_media;
558 1.2 thorpej int defmedia = 0;
559 1.2 thorpej const char *sep = "", *defmedianame = NULL;
560 1.2 thorpej
561 1.2 thorpej GO_WINDOW(3);
562 1.2 thorpej config1 = bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2);
563 1.2 thorpej reset_options = bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS);
564 1.2 thorpej GO_WINDOW(0);
565 1.2 thorpej
566 1.2 thorpej default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT;
567 1.2 thorpej
568 1.2 thorpej printf("%s: ", sc->sc_dev.dv_xname);
569 1.2 thorpej
570 1.2 thorpej /* Sanity check that there are any media! */
571 1.2 thorpej if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) {
572 1.2 thorpej printf("no media present!\n");
573 1.2 thorpej ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL);
574 1.2 thorpej ifmedia_set(ifm, IFM_ETHER|IFM_NONE);
575 1.2 thorpej return;
576 1.2 thorpej }
577 1.2 thorpej
578 1.2 thorpej #define PRINT(s) printf("%s%s", sep, s); sep = ", "
579 1.2 thorpej
580 1.2 thorpej for (exm = ex_native_media; exm->exm_name != NULL; exm++) {
581 1.2 thorpej if (reset_options & exm->exm_mpbit) {
582 1.2 thorpej /*
583 1.2 thorpej * Default media is a little complicated. We
584 1.2 thorpej * support full-duplex which uses the same
585 1.2 thorpej * reset options bit.
586 1.2 thorpej *
587 1.2 thorpej * XXX Check EEPROM for default to FDX?
588 1.2 thorpej */
589 1.2 thorpej if (exm->exm_epmedia == default_media) {
590 1.2 thorpej if ((exm->exm_ifmedia & IFM_FDX) == 0) {
591 1.2 thorpej defmedia = exm->exm_ifmedia;
592 1.2 thorpej defmedianame = exm->exm_name;
593 1.2 thorpej }
594 1.2 thorpej } else if (defmedia == 0) {
595 1.2 thorpej defmedia = exm->exm_ifmedia;
596 1.2 thorpej defmedianame = exm->exm_name;
597 1.2 thorpej }
598 1.2 thorpej ifmedia_add(ifm, exm->exm_ifmedia, exm->exm_epmedia,
599 1.2 thorpej NULL);
600 1.2 thorpej PRINT(exm->exm_name);
601 1.2 thorpej }
602 1.2 thorpej }
603 1.2 thorpej
604 1.2 thorpej #undef PRINT
605 1.2 thorpej
606 1.2 thorpej #ifdef DIAGNOSTIC
607 1.2 thorpej if (defmedia == 0)
608 1.2 thorpej panic("ex_probemedia: impossible");
609 1.2 thorpej #endif
610 1.2 thorpej
611 1.2 thorpej printf(", default %s\n", defmedianame);
612 1.2 thorpej ifmedia_set(ifm, defmedia);
613 1.1 fvdl }
614 1.1 fvdl
615 1.1 fvdl /*
616 1.1 fvdl * Bring device up.
617 1.1 fvdl */
618 1.15.2.1 bouyer int
619 1.15.2.1 bouyer ex_init(ifp)
620 1.15.2.1 bouyer struct ifnet *ifp;
621 1.1 fvdl {
622 1.15.2.1 bouyer struct ex_softc *sc = ifp->if_softc;
623 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
624 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
625 1.15.2.4 bouyer int i;
626 1.15.2.4 bouyer int error = 0;
627 1.1 fvdl
628 1.15.2.4 bouyer if ((error = ex_enable(sc)) != 0)
629 1.15.2.4 bouyer goto out;
630 1.1 fvdl
631 1.1 fvdl ex_waitcmd(sc);
632 1.15.2.1 bouyer ex_stop(ifp, 0);
633 1.1 fvdl
634 1.1 fvdl /*
635 1.1 fvdl * Set the station address and clear the station mask. The latter
636 1.1 fvdl * is needed for 90x cards, 0 is the default for 90xB cards.
637 1.1 fvdl */
638 1.1 fvdl GO_WINDOW(2);
639 1.1 fvdl for (i = 0; i < ETHER_ADDR_LEN; i++) {
640 1.1 fvdl bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i,
641 1.1 fvdl LLADDR(ifp->if_sadl)[i]);
642 1.1 fvdl bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0);
643 1.1 fvdl }
644 1.1 fvdl
645 1.1 fvdl GO_WINDOW(3);
646 1.1 fvdl
647 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_RESET);
648 1.1 fvdl ex_waitcmd(sc);
649 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_RESET);
650 1.1 fvdl ex_waitcmd(sc);
651 1.1 fvdl
652 1.1 fvdl /*
653 1.1 fvdl * Disable reclaim threshold for 90xB, set free threshold to
654 1.1 fvdl * 6 * 256 = 1536 for 90x.
655 1.1 fvdl */
656 1.1 fvdl if (sc->ex_conf & EX_CONF_90XB)
657 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND,
658 1.1 fvdl ELINK_TXRECLTHRESH | 255);
659 1.1 fvdl else
660 1.1 fvdl bus_space_write_1(iot, ioh, ELINK_TXFREETHRESH, 6);
661 1.1 fvdl
662 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND,
663 1.1 fvdl SET_RX_EARLY_THRESH | ELINK_THRESH_DISABLE);
664 1.1 fvdl
665 1.1 fvdl bus_space_write_4(iot, ioh, ELINK_DMACTRL,
666 1.1 fvdl bus_space_read_4(iot, ioh, ELINK_DMACTRL) | ELINK_DMAC_UPRXEAREN);
667 1.1 fvdl
668 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK | S_MASK);
669 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK | S_MASK);
670 1.1 fvdl
671 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff);
672 1.15 haya if (sc->intr_ack)
673 1.15 haya (* sc->intr_ack)(sc);
674 1.1 fvdl ex_set_media(sc);
675 1.1 fvdl ex_set_mc(sc);
676 1.1 fvdl
677 1.1 fvdl
678 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, STATS_ENABLE);
679 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE);
680 1.1 fvdl bus_space_write_4(iot, ioh, ELINK_UPLISTPTR, sc->sc_upddma);
681 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE);
682 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_UPUNSTALL);
683 1.1 fvdl
684 1.15.2.1 bouyer if (sc->ex_conf & (EX_CONF_PHY_POWER | EX_CONF_INV_LED_POLARITY)) {
685 1.15.2.1 bouyer u_int16_t cbcard_config;
686 1.15.2.1 bouyer
687 1.15.2.1 bouyer GO_WINDOW(2);
688 1.15.2.1 bouyer cbcard_config = bus_space_read_2(sc->sc_iot, sc->sc_ioh, 0x0c);
689 1.15.2.1 bouyer if (sc->ex_conf & EX_CONF_PHY_POWER) {
690 1.15.2.1 bouyer cbcard_config |= 0x4000; /* turn on PHY power */
691 1.15.2.1 bouyer }
692 1.15.2.1 bouyer if (sc->ex_conf & EX_CONF_INV_LED_POLARITY) {
693 1.15.2.1 bouyer cbcard_config |= 0x0010; /* invert LED polarity */
694 1.15.2.1 bouyer }
695 1.15.2.1 bouyer bus_space_write_2(sc->sc_iot, sc->sc_ioh, 0x0c, cbcard_config);
696 1.15.2.1 bouyer
697 1.15.2.1 bouyer GO_WINDOW(3);
698 1.15.2.1 bouyer }
699 1.15.2.1 bouyer
700 1.1 fvdl ifp->if_flags |= IFF_RUNNING;
701 1.1 fvdl ifp->if_flags &= ~IFF_OACTIVE;
702 1.1 fvdl ex_start(ifp);
703 1.1 fvdl
704 1.1 fvdl GO_WINDOW(1);
705 1.1 fvdl
706 1.15.2.1 bouyer callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc);
707 1.1 fvdl
708 1.15.2.4 bouyer out:
709 1.15.2.4 bouyer if (error) {
710 1.15.2.4 bouyer ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
711 1.15.2.4 bouyer ifp->if_timer = 0;
712 1.15.2.4 bouyer printf("%s: interface not running\n", sc->sc_dev.dv_xname);
713 1.15.2.4 bouyer }
714 1.15.2.4 bouyer return (error);
715 1.1 fvdl }
716 1.1 fvdl
717 1.15.2.1 bouyer #define ex_mchash(addr) (ether_crc32_be((addr), ETHER_ADDR_LEN) & 0xff)
718 1.1 fvdl
719 1.1 fvdl /*
720 1.1 fvdl * Set multicast receive filter. Also take care of promiscuous mode
721 1.1 fvdl * here (XXX).
722 1.1 fvdl */
723 1.1 fvdl void
724 1.1 fvdl ex_set_mc(sc)
725 1.15.2.1 bouyer struct ex_softc *sc;
726 1.1 fvdl {
727 1.1 fvdl struct ifnet *ifp = &sc->sc_ethercom.ec_if;
728 1.1 fvdl struct ethercom *ec = &sc->sc_ethercom;
729 1.1 fvdl struct ether_multi *enm;
730 1.1 fvdl struct ether_multistep estep;
731 1.1 fvdl int i;
732 1.1 fvdl u_int16_t mask = FIL_INDIVIDUAL | FIL_BRDCST;
733 1.1 fvdl
734 1.1 fvdl if (ifp->if_flags & IFF_PROMISC)
735 1.1 fvdl mask |= FIL_PROMISC;
736 1.1 fvdl
737 1.1 fvdl if (!(ifp->if_flags & IFF_MULTICAST))
738 1.1 fvdl goto out;
739 1.1 fvdl
740 1.1 fvdl if (!(sc->ex_conf & EX_CONF_90XB) || ifp->if_flags & IFF_ALLMULTI) {
741 1.1 fvdl mask |= (ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0;
742 1.1 fvdl } else {
743 1.1 fvdl ETHER_FIRST_MULTI(estep, ec, enm);
744 1.1 fvdl while (enm != NULL) {
745 1.1 fvdl if (bcmp(enm->enm_addrlo, enm->enm_addrhi,
746 1.1 fvdl ETHER_ADDR_LEN) != 0)
747 1.1 fvdl goto out;
748 1.1 fvdl i = ex_mchash(enm->enm_addrlo);
749 1.1 fvdl bus_space_write_2(sc->sc_iot, sc->sc_ioh,
750 1.1 fvdl ELINK_COMMAND, ELINK_SETHASHFILBIT | i);
751 1.1 fvdl ETHER_NEXT_MULTI(estep, enm);
752 1.1 fvdl }
753 1.1 fvdl mask |= FIL_MULTIHASH;
754 1.1 fvdl }
755 1.1 fvdl out:
756 1.1 fvdl bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND,
757 1.1 fvdl SET_RX_FILTER | mask);
758 1.1 fvdl }
759 1.1 fvdl
760 1.1 fvdl
761 1.1 fvdl static void
762 1.1 fvdl ex_txstat(sc)
763 1.1 fvdl struct ex_softc *sc;
764 1.1 fvdl {
765 1.15.2.1 bouyer struct ifnet *ifp = &sc->sc_ethercom.ec_if;
766 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
767 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
768 1.1 fvdl int i;
769 1.1 fvdl
770 1.1 fvdl /*
771 1.1 fvdl * We need to read+write TX_STATUS until we get a 0 status
772 1.1 fvdl * in order to turn off the interrupt flag.
773 1.1 fvdl */
774 1.1 fvdl while ((i = bus_space_read_1(iot, ioh, ELINK_TXSTATUS)) & TXS_COMPLETE) {
775 1.1 fvdl bus_space_write_1(iot, ioh, ELINK_TXSTATUS, 0x0);
776 1.1 fvdl
777 1.1 fvdl if (i & TXS_JABBER) {
778 1.1 fvdl ++sc->sc_ethercom.ec_if.if_oerrors;
779 1.1 fvdl if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG)
780 1.1 fvdl printf("%s: jabber (%x)\n",
781 1.1 fvdl sc->sc_dev.dv_xname, i);
782 1.15.2.1 bouyer ex_init(ifp);
783 1.1 fvdl /* TODO: be more subtle here */
784 1.1 fvdl } else if (i & TXS_UNDERRUN) {
785 1.1 fvdl ++sc->sc_ethercom.ec_if.if_oerrors;
786 1.1 fvdl if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG)
787 1.1 fvdl printf("%s: fifo underrun (%x) @%d\n",
788 1.1 fvdl sc->sc_dev.dv_xname, i,
789 1.1 fvdl sc->tx_start_thresh);
790 1.1 fvdl if (sc->tx_succ_ok < 100)
791 1.1 fvdl sc->tx_start_thresh = min(ETHER_MAX_LEN,
792 1.1 fvdl sc->tx_start_thresh + 20);
793 1.1 fvdl sc->tx_succ_ok = 0;
794 1.15.2.1 bouyer ex_init(ifp);
795 1.1 fvdl /* TODO: be more subtle here */
796 1.1 fvdl } else if (i & TXS_MAX_COLLISION) {
797 1.1 fvdl ++sc->sc_ethercom.ec_if.if_collisions;
798 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE);
799 1.1 fvdl sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE;
800 1.1 fvdl } else
801 1.1 fvdl sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127;
802 1.1 fvdl }
803 1.1 fvdl }
804 1.1 fvdl
805 1.1 fvdl int
806 1.1 fvdl ex_media_chg(ifp)
807 1.1 fvdl struct ifnet *ifp;
808 1.1 fvdl {
809 1.1 fvdl
810 1.1 fvdl if (ifp->if_flags & IFF_UP)
811 1.15.2.1 bouyer ex_init(ifp);
812 1.1 fvdl return 0;
813 1.1 fvdl }
814 1.1 fvdl
815 1.1 fvdl void
816 1.1 fvdl ex_set_media(sc)
817 1.1 fvdl struct ex_softc *sc;
818 1.1 fvdl {
819 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
820 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
821 1.15.2.1 bouyer u_int32_t configreg;
822 1.1 fvdl
823 1.1 fvdl if (((sc->ex_conf & EX_CONF_MII) &&
824 1.1 fvdl (sc->ex_mii.mii_media_active & IFM_FDX))
825 1.1 fvdl || (!(sc->ex_conf & EX_CONF_MII) &&
826 1.1 fvdl (sc->ex_mii.mii_media.ifm_media & IFM_FDX))) {
827 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL,
828 1.1 fvdl MAC_CONTROL_FDX);
829 1.1 fvdl } else {
830 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 0);
831 1.1 fvdl }
832 1.1 fvdl
833 1.1 fvdl /*
834 1.1 fvdl * If the device has MII, select it, and then tell the
835 1.1 fvdl * PHY which media to use.
836 1.1 fvdl */
837 1.1 fvdl if (sc->ex_conf & EX_CONF_MII) {
838 1.1 fvdl GO_WINDOW(3);
839 1.1 fvdl
840 1.15.2.1 bouyer configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG);
841 1.1 fvdl
842 1.15.2.1 bouyer configreg &= ~(CONFIG_MEDIAMASK << 16);
843 1.15.2.1 bouyer configreg |= (ELINKMEDIA_MII << (CONFIG_MEDIAMASK_SHIFT + 16));
844 1.1 fvdl
845 1.15.2.1 bouyer bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg);
846 1.1 fvdl mii_mediachg(&sc->ex_mii);
847 1.1 fvdl return;
848 1.1 fvdl }
849 1.1 fvdl
850 1.1 fvdl GO_WINDOW(4);
851 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0);
852 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER);
853 1.1 fvdl delay(800);
854 1.1 fvdl
855 1.1 fvdl /*
856 1.1 fvdl * Now turn on the selected media/transceiver.
857 1.1 fvdl */
858 1.1 fvdl switch (IFM_SUBTYPE(sc->ex_mii.mii_media.ifm_cur->ifm_media)) {
859 1.1 fvdl case IFM_10_T:
860 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE,
861 1.1 fvdl JABBER_GUARD_ENABLE|LINKBEAT_ENABLE);
862 1.1 fvdl break;
863 1.1 fvdl
864 1.1 fvdl case IFM_10_2:
865 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER);
866 1.1 fvdl DELAY(800);
867 1.1 fvdl break;
868 1.1 fvdl
869 1.1 fvdl case IFM_100_TX:
870 1.1 fvdl case IFM_100_FX:
871 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE,
872 1.1 fvdl LINKBEAT_ENABLE);
873 1.1 fvdl DELAY(800);
874 1.1 fvdl break;
875 1.1 fvdl
876 1.1 fvdl case IFM_10_5:
877 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE,
878 1.1 fvdl SQE_ENABLE);
879 1.1 fvdl DELAY(800);
880 1.1 fvdl break;
881 1.1 fvdl
882 1.1 fvdl case IFM_MANUAL:
883 1.1 fvdl break;
884 1.1 fvdl
885 1.1 fvdl case IFM_NONE:
886 1.1 fvdl return;
887 1.1 fvdl
888 1.1 fvdl default:
889 1.1 fvdl panic("ex_set_media: impossible");
890 1.1 fvdl }
891 1.1 fvdl
892 1.1 fvdl GO_WINDOW(3);
893 1.15.2.1 bouyer configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG);
894 1.1 fvdl
895 1.15.2.1 bouyer configreg &= ~(CONFIG_MEDIAMASK << 16);
896 1.15.2.1 bouyer configreg |= (sc->ex_mii.mii_media.ifm_cur->ifm_data <<
897 1.15.2.1 bouyer (CONFIG_MEDIAMASK_SHIFT + 16));
898 1.1 fvdl
899 1.15.2.1 bouyer bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg);
900 1.1 fvdl }
901 1.1 fvdl
902 1.1 fvdl /*
903 1.1 fvdl * Get currently-selected media from card.
904 1.1 fvdl * (if_media callback, may be called before interface is brought up).
905 1.1 fvdl */
906 1.1 fvdl void
907 1.1 fvdl ex_media_stat(ifp, req)
908 1.1 fvdl struct ifnet *ifp;
909 1.1 fvdl struct ifmediareq *req;
910 1.1 fvdl {
911 1.1 fvdl struct ex_softc *sc = ifp->if_softc;
912 1.1 fvdl
913 1.1 fvdl if (sc->ex_conf & EX_CONF_MII) {
914 1.1 fvdl mii_pollstat(&sc->ex_mii);
915 1.1 fvdl req->ifm_status = sc->ex_mii.mii_media_status;
916 1.1 fvdl req->ifm_active = sc->ex_mii.mii_media_active;
917 1.1 fvdl } else {
918 1.1 fvdl GO_WINDOW(4);
919 1.1 fvdl req->ifm_status = IFM_AVALID;
920 1.1 fvdl req->ifm_active = sc->ex_mii.mii_media.ifm_cur->ifm_media;
921 1.1 fvdl if (bus_space_read_2(sc->sc_iot, sc->sc_ioh,
922 1.1 fvdl ELINK_W4_MEDIA_TYPE) & LINKBEAT_DETECT)
923 1.1 fvdl req->ifm_status |= IFM_ACTIVE;
924 1.1 fvdl GO_WINDOW(1);
925 1.1 fvdl }
926 1.1 fvdl }
927 1.1 fvdl
928 1.1 fvdl
929 1.1 fvdl
930 1.1 fvdl /*
931 1.1 fvdl * Start outputting on the interface.
932 1.1 fvdl */
933 1.1 fvdl static void
934 1.1 fvdl ex_start(ifp)
935 1.1 fvdl struct ifnet *ifp;
936 1.1 fvdl {
937 1.1 fvdl struct ex_softc *sc = ifp->if_softc;
938 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
939 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
940 1.1 fvdl volatile struct ex_fraghdr *fr = NULL;
941 1.1 fvdl volatile struct ex_dpd *dpd = NULL, *prevdpd = NULL;
942 1.1 fvdl struct ex_txdesc *txp;
943 1.15.2.3 bouyer struct mbuf *mb_head;
944 1.1 fvdl bus_dmamap_t dmamap;
945 1.15.2.3 bouyer int offset, totlen, segment, error;
946 1.1 fvdl
947 1.1 fvdl if (sc->tx_head || sc->tx_free == NULL)
948 1.1 fvdl return;
949 1.1 fvdl
950 1.1 fvdl txp = NULL;
951 1.1 fvdl
952 1.1 fvdl /*
953 1.1 fvdl * We're finished if there is nothing more to add to the list or if
954 1.1 fvdl * we're all filled up with buffers to transmit.
955 1.1 fvdl */
956 1.15.2.3 bouyer while (sc->tx_free != NULL) {
957 1.1 fvdl /*
958 1.1 fvdl * Grab a packet to transmit.
959 1.1 fvdl */
960 1.15.2.3 bouyer IFQ_DEQUEUE(&ifp->if_snd, mb_head);
961 1.15.2.3 bouyer if (mb_head == NULL)
962 1.15.2.3 bouyer break;
963 1.1 fvdl
964 1.1 fvdl /*
965 1.1 fvdl * Get pointer to next available tx desc.
966 1.1 fvdl */
967 1.1 fvdl txp = sc->tx_free;
968 1.1 fvdl sc->tx_free = txp->tx_next;
969 1.1 fvdl txp->tx_next = NULL;
970 1.1 fvdl dmamap = txp->tx_dmamap;
971 1.1 fvdl
972 1.1 fvdl /*
973 1.1 fvdl * Go through each of the mbufs in the chain and initialize
974 1.1 fvdl * the transmit buffer descriptors with the physical address
975 1.1 fvdl * and size of the mbuf.
976 1.1 fvdl */
977 1.1 fvdl reload:
978 1.1 fvdl error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap,
979 1.1 fvdl mb_head, BUS_DMA_NOWAIT);
980 1.1 fvdl switch (error) {
981 1.1 fvdl case 0:
982 1.1 fvdl /* Success. */
983 1.1 fvdl break;
984 1.1 fvdl
985 1.1 fvdl case EFBIG:
986 1.1 fvdl {
987 1.1 fvdl struct mbuf *mn;
988 1.1 fvdl
989 1.1 fvdl /*
990 1.1 fvdl * We ran out of segments. We have to recopy this
991 1.1 fvdl * mbuf chain first. Bail out if we can't get the
992 1.1 fvdl * new buffers.
993 1.1 fvdl */
994 1.1 fvdl printf("%s: too many segments, ", sc->sc_dev.dv_xname);
995 1.1 fvdl
996 1.1 fvdl MGETHDR(mn, M_DONTWAIT, MT_DATA);
997 1.1 fvdl if (mn == NULL) {
998 1.1 fvdl m_freem(mb_head);
999 1.1 fvdl printf("aborting\n");
1000 1.1 fvdl goto out;
1001 1.1 fvdl }
1002 1.1 fvdl if (mb_head->m_pkthdr.len > MHLEN) {
1003 1.1 fvdl MCLGET(mn, M_DONTWAIT);
1004 1.1 fvdl if ((mn->m_flags & M_EXT) == 0) {
1005 1.1 fvdl m_freem(mn);
1006 1.1 fvdl m_freem(mb_head);
1007 1.1 fvdl printf("aborting\n");
1008 1.1 fvdl goto out;
1009 1.1 fvdl }
1010 1.1 fvdl }
1011 1.1 fvdl m_copydata(mb_head, 0, mb_head->m_pkthdr.len,
1012 1.1 fvdl mtod(mn, caddr_t));
1013 1.1 fvdl mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len;
1014 1.1 fvdl m_freem(mb_head);
1015 1.1 fvdl mb_head = mn;
1016 1.1 fvdl printf("retrying\n");
1017 1.1 fvdl goto reload;
1018 1.1 fvdl }
1019 1.1 fvdl
1020 1.1 fvdl default:
1021 1.1 fvdl /*
1022 1.1 fvdl * Some other problem; report it.
1023 1.1 fvdl */
1024 1.1 fvdl printf("%s: can't load mbuf chain, error = %d\n",
1025 1.1 fvdl sc->sc_dev.dv_xname, error);
1026 1.1 fvdl m_freem(mb_head);
1027 1.1 fvdl goto out;
1028 1.1 fvdl }
1029 1.1 fvdl
1030 1.1 fvdl fr = &txp->tx_dpd->dpd_frags[0];
1031 1.1 fvdl totlen = 0;
1032 1.1 fvdl for (segment = 0; segment < dmamap->dm_nsegs; segment++, fr++) {
1033 1.15.2.1 bouyer fr->fr_addr = htole32(dmamap->dm_segs[segment].ds_addr);
1034 1.15.2.1 bouyer fr->fr_len = htole32(dmamap->dm_segs[segment].ds_len);
1035 1.9 thorpej totlen += dmamap->dm_segs[segment].ds_len;
1036 1.1 fvdl }
1037 1.1 fvdl fr--;
1038 1.15.2.1 bouyer fr->fr_len |= htole32(EX_FR_LAST);
1039 1.1 fvdl txp->tx_mbhead = mb_head;
1040 1.1 fvdl
1041 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize,
1042 1.1 fvdl BUS_DMASYNC_PREWRITE);
1043 1.1 fvdl
1044 1.1 fvdl dpd = txp->tx_dpd;
1045 1.1 fvdl dpd->dpd_nextptr = 0;
1046 1.15.2.1 bouyer dpd->dpd_fsh = htole32(totlen);
1047 1.1 fvdl
1048 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1049 1.1 fvdl ((caddr_t)dpd - (caddr_t)sc->sc_dpd),
1050 1.1 fvdl sizeof (struct ex_dpd),
1051 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1052 1.1 fvdl
1053 1.1 fvdl /*
1054 1.1 fvdl * No need to stall the download engine, we know it's
1055 1.1 fvdl * not busy right now.
1056 1.1 fvdl *
1057 1.1 fvdl * Fix up pointers in both the "soft" tx and the physical
1058 1.1 fvdl * tx list.
1059 1.1 fvdl */
1060 1.1 fvdl if (sc->tx_head != NULL) {
1061 1.1 fvdl prevdpd = sc->tx_tail->tx_dpd;
1062 1.1 fvdl offset = ((caddr_t)prevdpd - (caddr_t)sc->sc_dpd);
1063 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1064 1.1 fvdl offset, sizeof (struct ex_dpd),
1065 1.1 fvdl BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1066 1.15.2.1 bouyer prevdpd->dpd_nextptr = htole32(DPD_DMADDR(sc, txp));
1067 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1068 1.1 fvdl offset, sizeof (struct ex_dpd),
1069 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1070 1.1 fvdl sc->tx_tail->tx_next = txp;
1071 1.1 fvdl sc->tx_tail = txp;
1072 1.1 fvdl } else {
1073 1.1 fvdl sc->tx_tail = sc->tx_head = txp;
1074 1.1 fvdl }
1075 1.1 fvdl
1076 1.1 fvdl #if NBPFILTER > 0
1077 1.1 fvdl /*
1078 1.1 fvdl * Pass packet to bpf if there is a listener.
1079 1.1 fvdl */
1080 1.1 fvdl if (ifp->if_bpf)
1081 1.1 fvdl bpf_mtap(ifp->if_bpf, mb_head);
1082 1.1 fvdl #endif
1083 1.1 fvdl }
1084 1.1 fvdl out:
1085 1.1 fvdl if (sc->tx_head) {
1086 1.15.2.1 bouyer sc->tx_tail->tx_dpd->dpd_fsh |= htole32(EX_DPD_DNIND);
1087 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1088 1.1 fvdl ((caddr_t)sc->tx_tail->tx_dpd - (caddr_t)sc->sc_dpd),
1089 1.1 fvdl sizeof (struct ex_dpd),
1090 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1091 1.1 fvdl ifp->if_flags |= IFF_OACTIVE;
1092 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_DNUNSTALL);
1093 1.1 fvdl bus_space_write_4(iot, ioh, ELINK_DNLISTPTR,
1094 1.1 fvdl DPD_DMADDR(sc, sc->tx_head));
1095 1.3 drochner
1096 1.3 drochner /* trigger watchdog */
1097 1.3 drochner ifp->if_timer = 5;
1098 1.1 fvdl }
1099 1.1 fvdl }
1100 1.1 fvdl
1101 1.1 fvdl
1102 1.1 fvdl int
1103 1.1 fvdl ex_intr(arg)
1104 1.1 fvdl void *arg;
1105 1.1 fvdl {
1106 1.1 fvdl struct ex_softc *sc = arg;
1107 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1108 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1109 1.1 fvdl u_int16_t stat;
1110 1.1 fvdl int ret = 0;
1111 1.1 fvdl struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1112 1.1 fvdl
1113 1.15.2.4 bouyer if ((ifp->if_flags & IFF_RUNNING) == 0 ||
1114 1.15.2.1 bouyer (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0)
1115 1.15.2.1 bouyer return (0);
1116 1.15.2.1 bouyer
1117 1.1 fvdl for (;;) {
1118 1.15.2.1 bouyer bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH);
1119 1.15.2.1 bouyer
1120 1.1 fvdl stat = bus_space_read_2(iot, ioh, ELINK_STATUS);
1121 1.15.2.1 bouyer
1122 1.15.2.1 bouyer if ((stat & S_MASK) == 0) {
1123 1.15.2.1 bouyer if ((stat & S_INTR_LATCH) == 0) {
1124 1.15.2.1 bouyer #if 0
1125 1.15.2.1 bouyer printf("%s: intr latch cleared\n",
1126 1.15.2.1 bouyer sc->sc_dev.dv_xname);
1127 1.15.2.1 bouyer #endif
1128 1.15.2.1 bouyer break;
1129 1.15.2.1 bouyer }
1130 1.15.2.1 bouyer }
1131 1.15.2.1 bouyer
1132 1.15.2.1 bouyer ret = 1;
1133 1.15.2.1 bouyer
1134 1.1 fvdl /*
1135 1.1 fvdl * Acknowledge interrupts.
1136 1.1 fvdl */
1137 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR |
1138 1.15.2.1 bouyer (stat & S_MASK));
1139 1.15 haya if (sc->intr_ack)
1140 1.15.2.1 bouyer (*sc->intr_ack)(sc);
1141 1.15.2.1 bouyer
1142 1.1 fvdl if (stat & S_HOST_ERROR) {
1143 1.1 fvdl printf("%s: adapter failure (%x)\n",
1144 1.1 fvdl sc->sc_dev.dv_xname, stat);
1145 1.1 fvdl ex_reset(sc);
1146 1.15.2.1 bouyer ex_init(ifp);
1147 1.1 fvdl return 1;
1148 1.1 fvdl }
1149 1.1 fvdl if (stat & S_TX_COMPLETE) {
1150 1.1 fvdl ex_txstat(sc);
1151 1.1 fvdl }
1152 1.1 fvdl if (stat & S_UPD_STATS) {
1153 1.1 fvdl ex_getstats(sc);
1154 1.1 fvdl }
1155 1.1 fvdl if (stat & S_DN_COMPLETE) {
1156 1.1 fvdl struct ex_txdesc *txp, *ptxp = NULL;
1157 1.1 fvdl bus_dmamap_t txmap;
1158 1.3 drochner
1159 1.3 drochner /* reset watchdog timer, was set in ex_start() */
1160 1.3 drochner ifp->if_timer = 0;
1161 1.3 drochner
1162 1.1 fvdl for (txp = sc->tx_head; txp != NULL;
1163 1.1 fvdl txp = txp->tx_next) {
1164 1.1 fvdl bus_dmamap_sync(sc->sc_dmat,
1165 1.1 fvdl sc->sc_dpd_dmamap,
1166 1.1 fvdl (caddr_t)txp->tx_dpd - (caddr_t)sc->sc_dpd,
1167 1.1 fvdl sizeof (struct ex_dpd),
1168 1.1 fvdl BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1169 1.1 fvdl if (txp->tx_mbhead != NULL) {
1170 1.1 fvdl txmap = txp->tx_dmamap;
1171 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, txmap,
1172 1.1 fvdl 0, txmap->dm_mapsize,
1173 1.1 fvdl BUS_DMASYNC_POSTWRITE);
1174 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, txmap);
1175 1.1 fvdl m_freem(txp->tx_mbhead);
1176 1.1 fvdl txp->tx_mbhead = NULL;
1177 1.1 fvdl }
1178 1.1 fvdl ptxp = txp;
1179 1.1 fvdl }
1180 1.1 fvdl
1181 1.1 fvdl /*
1182 1.1 fvdl * Move finished tx buffers back to the tx free list.
1183 1.1 fvdl */
1184 1.1 fvdl if (sc->tx_free) {
1185 1.1 fvdl sc->tx_ftail->tx_next = sc->tx_head;
1186 1.1 fvdl sc->tx_ftail = ptxp;
1187 1.1 fvdl } else
1188 1.1 fvdl sc->tx_ftail = sc->tx_free = sc->tx_head;
1189 1.1 fvdl
1190 1.1 fvdl sc->tx_head = sc->tx_tail = NULL;
1191 1.1 fvdl ifp->if_flags &= ~IFF_OACTIVE;
1192 1.1 fvdl }
1193 1.1 fvdl
1194 1.1 fvdl if (stat & S_UP_COMPLETE) {
1195 1.1 fvdl struct ex_rxdesc *rxd;
1196 1.1 fvdl struct mbuf *m;
1197 1.1 fvdl struct ex_upd *upd;
1198 1.1 fvdl bus_dmamap_t rxmap;
1199 1.1 fvdl u_int32_t pktstat;
1200 1.1 fvdl
1201 1.1 fvdl rcvloop:
1202 1.1 fvdl rxd = sc->rx_head;
1203 1.1 fvdl rxmap = rxd->rx_dmamap;
1204 1.1 fvdl m = rxd->rx_mbhead;
1205 1.1 fvdl upd = rxd->rx_upd;
1206 1.1 fvdl
1207 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, rxmap, 0,
1208 1.1 fvdl rxmap->dm_mapsize,
1209 1.1 fvdl BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1210 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap,
1211 1.1 fvdl ((caddr_t)upd - (caddr_t)sc->sc_upd),
1212 1.1 fvdl sizeof (struct ex_upd),
1213 1.1 fvdl BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1214 1.15.2.1 bouyer pktstat = le32toh(upd->upd_pktstatus);
1215 1.1 fvdl
1216 1.1 fvdl if (pktstat & EX_UPD_COMPLETE) {
1217 1.1 fvdl /*
1218 1.1 fvdl * Remove first packet from the chain.
1219 1.1 fvdl */
1220 1.1 fvdl sc->rx_head = rxd->rx_next;
1221 1.1 fvdl rxd->rx_next = NULL;
1222 1.1 fvdl
1223 1.1 fvdl /*
1224 1.1 fvdl * Add a new buffer to the receive chain.
1225 1.1 fvdl * If this fails, the old buffer is recycled
1226 1.1 fvdl * instead.
1227 1.1 fvdl */
1228 1.1 fvdl if (ex_add_rxbuf(sc, rxd) == 0) {
1229 1.1 fvdl u_int16_t total_len;
1230 1.1 fvdl
1231 1.15.2.1 bouyer if (pktstat &
1232 1.15.2.1 bouyer ((sc->sc_ethercom.ec_capenable &
1233 1.15.2.1 bouyer ETHERCAP_VLAN_MTU) ?
1234 1.15.2.1 bouyer EX_UPD_ERR_VLAN : EX_UPD_ERR)) {
1235 1.1 fvdl ifp->if_ierrors++;
1236 1.1 fvdl m_freem(m);
1237 1.1 fvdl goto rcvloop;
1238 1.1 fvdl }
1239 1.1 fvdl
1240 1.1 fvdl total_len = pktstat & EX_UPD_PKTLENMASK;
1241 1.1 fvdl if (total_len <
1242 1.1 fvdl sizeof(struct ether_header)) {
1243 1.1 fvdl m_freem(m);
1244 1.1 fvdl goto rcvloop;
1245 1.1 fvdl }
1246 1.1 fvdl m->m_pkthdr.rcvif = ifp;
1247 1.13 thorpej m->m_pkthdr.len = m->m_len = total_len;
1248 1.1 fvdl #if NBPFILTER > 0
1249 1.15.2.1 bouyer if (ifp->if_bpf)
1250 1.15.2.1 bouyer bpf_mtap(ifp->if_bpf, m);
1251 1.15.2.1 bouyer #endif
1252 1.13 thorpej (*ifp->if_input)(ifp, m);
1253 1.1 fvdl }
1254 1.1 fvdl goto rcvloop;
1255 1.1 fvdl }
1256 1.1 fvdl /*
1257 1.1 fvdl * Just in case we filled up all UPDs and the DMA engine
1258 1.3 drochner * stalled. We could be more subtle about this.
1259 1.1 fvdl */
1260 1.3 drochner if (bus_space_read_4(iot, ioh, ELINK_UPLISTPTR) == 0) {
1261 1.3 drochner printf("%s: uplistptr was 0\n",
1262 1.3 drochner sc->sc_dev.dv_xname);
1263 1.15.2.1 bouyer ex_init(ifp);
1264 1.3 drochner } else if (bus_space_read_4(iot, ioh, ELINK_UPPKTSTATUS)
1265 1.3 drochner & 0x2000) {
1266 1.3 drochner printf("%s: receive stalled\n",
1267 1.3 drochner sc->sc_dev.dv_xname);
1268 1.3 drochner bus_space_write_2(iot, ioh, ELINK_COMMAND,
1269 1.3 drochner ELINK_UPUNSTALL);
1270 1.3 drochner }
1271 1.1 fvdl }
1272 1.1 fvdl }
1273 1.15.2.1 bouyer
1274 1.15.2.1 bouyer /* no more interrupts */
1275 1.15.2.3 bouyer if (ret && IFQ_IS_EMPTY(&ifp->if_snd) == 0)
1276 1.15.2.1 bouyer ex_start(ifp);
1277 1.1 fvdl return ret;
1278 1.1 fvdl }
1279 1.1 fvdl
1280 1.1 fvdl int
1281 1.1 fvdl ex_ioctl(ifp, cmd, data)
1282 1.15.2.1 bouyer struct ifnet *ifp;
1283 1.1 fvdl u_long cmd;
1284 1.1 fvdl caddr_t data;
1285 1.1 fvdl {
1286 1.1 fvdl struct ex_softc *sc = ifp->if_softc;
1287 1.1 fvdl struct ifreq *ifr = (struct ifreq *)data;
1288 1.15.2.1 bouyer int s, error;
1289 1.1 fvdl
1290 1.1 fvdl s = splnet();
1291 1.1 fvdl
1292 1.1 fvdl switch (cmd) {
1293 1.1 fvdl case SIOCSIFMEDIA:
1294 1.1 fvdl case SIOCGIFMEDIA:
1295 1.1 fvdl error = ifmedia_ioctl(ifp, ifr, &sc->ex_mii.mii_media, cmd);
1296 1.1 fvdl break;
1297 1.1 fvdl
1298 1.15.2.1 bouyer default:
1299 1.15.2.1 bouyer error = ether_ioctl(ifp, cmd, data);
1300 1.1 fvdl if (error == ENETRESET) {
1301 1.15.2.4 bouyer if (sc->enabled) {
1302 1.1 fvdl /*
1303 1.1 fvdl * Multicast list has changed; set the hardware filter
1304 1.1 fvdl * accordingly.
1305 1.1 fvdl */
1306 1.15.2.4 bouyer ex_set_mc(sc);
1307 1.15.2.4 bouyer }
1308 1.1 fvdl error = 0;
1309 1.1 fvdl }
1310 1.1 fvdl break;
1311 1.1 fvdl }
1312 1.1 fvdl
1313 1.1 fvdl splx(s);
1314 1.1 fvdl return (error);
1315 1.1 fvdl }
1316 1.1 fvdl
1317 1.1 fvdl void
1318 1.1 fvdl ex_getstats(sc)
1319 1.1 fvdl struct ex_softc *sc;
1320 1.1 fvdl {
1321 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1322 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1323 1.1 fvdl struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1324 1.1 fvdl u_int8_t upperok;
1325 1.1 fvdl
1326 1.1 fvdl GO_WINDOW(6);
1327 1.1 fvdl upperok = bus_space_read_1(iot, ioh, UPPER_FRAMES_OK);
1328 1.1 fvdl ifp->if_ipackets += bus_space_read_1(iot, ioh, RX_FRAMES_OK);
1329 1.1 fvdl ifp->if_ipackets += (upperok & 0x03) << 8;
1330 1.1 fvdl ifp->if_opackets += bus_space_read_1(iot, ioh, TX_FRAMES_OK);
1331 1.1 fvdl ifp->if_opackets += (upperok & 0x30) << 4;
1332 1.1 fvdl ifp->if_ierrors += bus_space_read_1(iot, ioh, RX_OVERRUNS);
1333 1.1 fvdl ifp->if_collisions += bus_space_read_1(iot, ioh, TX_COLLISIONS);
1334 1.1 fvdl /*
1335 1.1 fvdl * There seems to be no way to get the exact number of collisions,
1336 1.1 fvdl * this is the number that occured at the very least.
1337 1.1 fvdl */
1338 1.1 fvdl ifp->if_collisions += 2 * bus_space_read_1(iot, ioh,
1339 1.1 fvdl TX_AFTER_X_COLLISIONS);
1340 1.1 fvdl ifp->if_ibytes += bus_space_read_2(iot, ioh, RX_TOTAL_OK);
1341 1.1 fvdl ifp->if_obytes += bus_space_read_2(iot, ioh, TX_TOTAL_OK);
1342 1.1 fvdl
1343 1.1 fvdl /*
1344 1.1 fvdl * Clear the following to avoid stats overflow interrupts
1345 1.1 fvdl */
1346 1.12 drochner bus_space_read_1(iot, ioh, TX_DEFERRALS);
1347 1.1 fvdl bus_space_read_1(iot, ioh, TX_AFTER_1_COLLISION);
1348 1.1 fvdl bus_space_read_1(iot, ioh, TX_NO_SQE);
1349 1.1 fvdl bus_space_read_1(iot, ioh, TX_CD_LOST);
1350 1.1 fvdl GO_WINDOW(4);
1351 1.1 fvdl bus_space_read_1(iot, ioh, ELINK_W4_BADSSD);
1352 1.1 fvdl upperok = bus_space_read_1(iot, ioh, ELINK_W4_UBYTESOK);
1353 1.1 fvdl ifp->if_ibytes += (upperok & 0x0f) << 16;
1354 1.1 fvdl ifp->if_obytes += (upperok & 0xf0) << 12;
1355 1.1 fvdl GO_WINDOW(1);
1356 1.1 fvdl }
1357 1.1 fvdl
1358 1.1 fvdl void
1359 1.1 fvdl ex_printstats(sc)
1360 1.1 fvdl struct ex_softc *sc;
1361 1.1 fvdl {
1362 1.1 fvdl struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1363 1.1 fvdl
1364 1.1 fvdl ex_getstats(sc);
1365 1.15.2.1 bouyer printf("in %llu out %llu ierror %llu oerror %llu ibytes %llu obytes "
1366 1.15.2.1 bouyer "%llu\n", (unsigned long long)ifp->if_ipackets,
1367 1.15.2.1 bouyer (unsigned long long)ifp->if_opackets,
1368 1.15.2.1 bouyer (unsigned long long)ifp->if_ierrors,
1369 1.15.2.1 bouyer (unsigned long long)ifp->if_oerrors,
1370 1.15.2.1 bouyer (unsigned long long)ifp->if_ibytes,
1371 1.15.2.1 bouyer (unsigned long long)ifp->if_obytes);
1372 1.1 fvdl }
1373 1.1 fvdl
1374 1.1 fvdl void
1375 1.1 fvdl ex_tick(arg)
1376 1.1 fvdl void *arg;
1377 1.1 fvdl {
1378 1.1 fvdl struct ex_softc *sc = arg;
1379 1.15.2.1 bouyer int s;
1380 1.15.2.1 bouyer
1381 1.15.2.1 bouyer if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0)
1382 1.15.2.1 bouyer return;
1383 1.15.2.1 bouyer
1384 1.15.2.1 bouyer s = splnet();
1385 1.1 fvdl
1386 1.1 fvdl if (sc->ex_conf & EX_CONF_MII)
1387 1.1 fvdl mii_tick(&sc->ex_mii);
1388 1.1 fvdl
1389 1.1 fvdl if (!(bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, ELINK_STATUS)
1390 1.1 fvdl & S_COMMAND_IN_PROGRESS))
1391 1.1 fvdl ex_getstats(sc);
1392 1.1 fvdl
1393 1.1 fvdl splx(s);
1394 1.1 fvdl
1395 1.15.2.1 bouyer callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc);
1396 1.1 fvdl }
1397 1.1 fvdl
1398 1.1 fvdl void
1399 1.1 fvdl ex_reset(sc)
1400 1.1 fvdl struct ex_softc *sc;
1401 1.1 fvdl {
1402 1.15.2.1 bouyer u_int16_t val = GLOBAL_RESET;
1403 1.15.2.1 bouyer
1404 1.15.2.1 bouyer if (sc->ex_conf & EX_CONF_RESETHACK)
1405 1.15.2.1 bouyer val |= 0xff;
1406 1.15.2.1 bouyer bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, val);
1407 1.10 dean delay(400);
1408 1.1 fvdl ex_waitcmd(sc);
1409 1.1 fvdl }
1410 1.1 fvdl
1411 1.1 fvdl void
1412 1.1 fvdl ex_watchdog(ifp)
1413 1.1 fvdl struct ifnet *ifp;
1414 1.1 fvdl {
1415 1.1 fvdl struct ex_softc *sc = ifp->if_softc;
1416 1.1 fvdl
1417 1.1 fvdl log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
1418 1.1 fvdl ++sc->sc_ethercom.ec_if.if_oerrors;
1419 1.1 fvdl
1420 1.1 fvdl ex_reset(sc);
1421 1.15.2.1 bouyer ex_init(ifp);
1422 1.1 fvdl }
1423 1.1 fvdl
1424 1.1 fvdl void
1425 1.15.2.1 bouyer ex_stop(ifp, disable)
1426 1.15.2.1 bouyer struct ifnet *ifp;
1427 1.15.2.1 bouyer int disable;
1428 1.1 fvdl {
1429 1.15.2.1 bouyer struct ex_softc *sc = ifp->if_softc;
1430 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1431 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1432 1.1 fvdl struct ex_txdesc *tx;
1433 1.1 fvdl struct ex_rxdesc *rx;
1434 1.1 fvdl int i;
1435 1.1 fvdl
1436 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE);
1437 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE);
1438 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER);
1439 1.1 fvdl
1440 1.1 fvdl for (tx = sc->tx_head ; tx != NULL; tx = tx->tx_next) {
1441 1.1 fvdl if (tx->tx_mbhead == NULL)
1442 1.1 fvdl continue;
1443 1.1 fvdl m_freem(tx->tx_mbhead);
1444 1.1 fvdl tx->tx_mbhead = NULL;
1445 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, tx->tx_dmamap);
1446 1.1 fvdl tx->tx_dpd->dpd_fsh = tx->tx_dpd->dpd_nextptr = 0;
1447 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1448 1.1 fvdl ((caddr_t)tx->tx_dpd - (caddr_t)sc->sc_dpd),
1449 1.1 fvdl sizeof (struct ex_dpd),
1450 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1451 1.1 fvdl }
1452 1.1 fvdl sc->tx_tail = sc->tx_head = NULL;
1453 1.1 fvdl ex_init_txdescs(sc);
1454 1.1 fvdl
1455 1.1 fvdl sc->rx_tail = sc->rx_head = 0;
1456 1.1 fvdl for (i = 0; i < EX_NUPD; i++) {
1457 1.1 fvdl rx = &sc->sc_rxdescs[i];
1458 1.1 fvdl if (rx->rx_mbhead != NULL) {
1459 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, rx->rx_dmamap);
1460 1.1 fvdl m_freem(rx->rx_mbhead);
1461 1.1 fvdl rx->rx_mbhead = NULL;
1462 1.1 fvdl }
1463 1.1 fvdl ex_add_rxbuf(sc, rx);
1464 1.1 fvdl }
1465 1.1 fvdl
1466 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH);
1467 1.1 fvdl
1468 1.15.2.1 bouyer callout_stop(&sc->ex_mii_callout);
1469 1.15.2.1 bouyer if (sc->ex_conf & EX_CONF_MII)
1470 1.15.2.1 bouyer mii_down(&sc->ex_mii);
1471 1.1 fvdl
1472 1.15.2.4 bouyer if (disable)
1473 1.15.2.4 bouyer ex_disable(sc);
1474 1.15.2.4 bouyer
1475 1.1 fvdl ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1476 1.1 fvdl ifp->if_timer = 0;
1477 1.1 fvdl }
1478 1.1 fvdl
1479 1.1 fvdl static void
1480 1.1 fvdl ex_init_txdescs(sc)
1481 1.1 fvdl struct ex_softc *sc;
1482 1.1 fvdl {
1483 1.1 fvdl int i;
1484 1.1 fvdl
1485 1.1 fvdl for (i = 0; i < EX_NDPD; i++) {
1486 1.1 fvdl sc->sc_txdescs[i].tx_dmamap = sc->sc_tx_dmamaps[i];
1487 1.1 fvdl sc->sc_txdescs[i].tx_dpd = &sc->sc_dpd[i];
1488 1.1 fvdl if (i < EX_NDPD - 1)
1489 1.1 fvdl sc->sc_txdescs[i].tx_next = &sc->sc_txdescs[i + 1];
1490 1.1 fvdl else
1491 1.1 fvdl sc->sc_txdescs[i].tx_next = NULL;
1492 1.1 fvdl }
1493 1.1 fvdl sc->tx_free = &sc->sc_txdescs[0];
1494 1.1 fvdl sc->tx_ftail = &sc->sc_txdescs[EX_NDPD-1];
1495 1.1 fvdl }
1496 1.1 fvdl
1497 1.1 fvdl
1498 1.15.2.1 bouyer int
1499 1.15.2.1 bouyer ex_activate(self, act)
1500 1.15.2.1 bouyer struct device *self;
1501 1.15.2.1 bouyer enum devact act;
1502 1.15.2.1 bouyer {
1503 1.15.2.1 bouyer struct ex_softc *sc = (void *) self;
1504 1.15.2.1 bouyer int s, error = 0;
1505 1.15.2.1 bouyer
1506 1.15.2.1 bouyer s = splnet();
1507 1.15.2.1 bouyer switch (act) {
1508 1.15.2.1 bouyer case DVACT_ACTIVATE:
1509 1.15.2.1 bouyer error = EOPNOTSUPP;
1510 1.15.2.1 bouyer break;
1511 1.15.2.1 bouyer
1512 1.15.2.1 bouyer case DVACT_DEACTIVATE:
1513 1.15.2.1 bouyer if (sc->ex_conf & EX_CONF_MII)
1514 1.15.2.1 bouyer mii_activate(&sc->ex_mii, act, MII_PHY_ANY,
1515 1.15.2.1 bouyer MII_OFFSET_ANY);
1516 1.15.2.1 bouyer if_deactivate(&sc->sc_ethercom.ec_if);
1517 1.15.2.1 bouyer break;
1518 1.15.2.1 bouyer }
1519 1.15.2.1 bouyer splx(s);
1520 1.15.2.1 bouyer
1521 1.15.2.1 bouyer return (error);
1522 1.15.2.1 bouyer }
1523 1.15.2.1 bouyer
1524 1.15.2.1 bouyer int
1525 1.15.2.1 bouyer ex_detach(sc)
1526 1.15.2.1 bouyer struct ex_softc *sc;
1527 1.15.2.1 bouyer {
1528 1.15.2.1 bouyer struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1529 1.15.2.1 bouyer struct ex_rxdesc *rxd;
1530 1.15.2.1 bouyer int i;
1531 1.15.2.1 bouyer
1532 1.15.2.1 bouyer /* Succeed now if there's no work to do. */
1533 1.15.2.1 bouyer if ((sc->ex_flags & EX_FLAGS_ATTACHED) == 0)
1534 1.15.2.1 bouyer return (0);
1535 1.15.2.1 bouyer
1536 1.15.2.1 bouyer /* Unhook our tick handler. */
1537 1.15.2.1 bouyer callout_stop(&sc->ex_mii_callout);
1538 1.15.2.1 bouyer
1539 1.15.2.1 bouyer if (sc->ex_conf & EX_CONF_MII) {
1540 1.15.2.1 bouyer /* Detach all PHYs */
1541 1.15.2.1 bouyer mii_detach(&sc->ex_mii, MII_PHY_ANY, MII_OFFSET_ANY);
1542 1.15.2.1 bouyer }
1543 1.15.2.1 bouyer
1544 1.15.2.1 bouyer /* Delete all remaining media. */
1545 1.15.2.1 bouyer ifmedia_delete_instance(&sc->ex_mii.mii_media, IFM_INST_ANY);
1546 1.15.2.1 bouyer
1547 1.15.2.1 bouyer #if NRND > 0
1548 1.15.2.1 bouyer rnd_detach_source(&sc->rnd_source);
1549 1.15.2.1 bouyer #endif
1550 1.15.2.1 bouyer ether_ifdetach(ifp);
1551 1.15.2.1 bouyer if_detach(ifp);
1552 1.15.2.1 bouyer
1553 1.15.2.1 bouyer for (i = 0; i < EX_NUPD; i++) {
1554 1.15.2.1 bouyer rxd = &sc->sc_rxdescs[i];
1555 1.15.2.1 bouyer if (rxd->rx_mbhead != NULL) {
1556 1.15.2.1 bouyer bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap);
1557 1.15.2.1 bouyer m_freem(rxd->rx_mbhead);
1558 1.15.2.1 bouyer rxd->rx_mbhead = NULL;
1559 1.15.2.1 bouyer }
1560 1.15.2.1 bouyer }
1561 1.15.2.1 bouyer for (i = 0; i < EX_NUPD; i++)
1562 1.15.2.1 bouyer bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]);
1563 1.15.2.1 bouyer for (i = 0; i < EX_NDPD; i++)
1564 1.15.2.1 bouyer bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]);
1565 1.15.2.1 bouyer bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap);
1566 1.15.2.1 bouyer bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap);
1567 1.15.2.1 bouyer bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd,
1568 1.15.2.1 bouyer EX_NDPD * sizeof (struct ex_dpd));
1569 1.15.2.1 bouyer bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg);
1570 1.15.2.1 bouyer bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap);
1571 1.15.2.1 bouyer bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap);
1572 1.15.2.1 bouyer bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd,
1573 1.15.2.1 bouyer EX_NUPD * sizeof (struct ex_upd));
1574 1.15.2.1 bouyer bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg);
1575 1.15.2.1 bouyer
1576 1.15.2.1 bouyer shutdownhook_disestablish(sc->sc_sdhook);
1577 1.15.2.1 bouyer
1578 1.15.2.1 bouyer return (0);
1579 1.15.2.1 bouyer }
1580 1.15.2.1 bouyer
1581 1.1 fvdl /*
1582 1.1 fvdl * Before reboots, reset card completely.
1583 1.1 fvdl */
1584 1.1 fvdl static void
1585 1.1 fvdl ex_shutdown(arg)
1586 1.1 fvdl void *arg;
1587 1.1 fvdl {
1588 1.15.2.1 bouyer struct ex_softc *sc = arg;
1589 1.1 fvdl
1590 1.15.2.4 bouyer ex_stop(&sc->sc_ethercom.ec_if, 1);
1591 1.1 fvdl }
1592 1.1 fvdl
1593 1.1 fvdl /*
1594 1.1 fvdl * Read EEPROM data.
1595 1.1 fvdl * XXX what to do if EEPROM doesn't unbusy?
1596 1.1 fvdl */
1597 1.1 fvdl u_int16_t
1598 1.1 fvdl ex_read_eeprom(sc, offset)
1599 1.1 fvdl struct ex_softc *sc;
1600 1.1 fvdl int offset;
1601 1.1 fvdl {
1602 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1603 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1604 1.15.2.1 bouyer u_int16_t data = 0, cmd = READ_EEPROM;
1605 1.15.2.1 bouyer int off;
1606 1.15.2.1 bouyer
1607 1.15.2.1 bouyer off = sc->ex_conf & EX_CONF_EEPROM_OFF ? 0x30 : 0;
1608 1.15.2.1 bouyer cmd = sc->ex_conf & EX_CONF_EEPROM_8BIT ? READ_EEPROM8 : READ_EEPROM;
1609 1.1 fvdl
1610 1.1 fvdl GO_WINDOW(0);
1611 1.1 fvdl if (ex_eeprom_busy(sc))
1612 1.1 fvdl goto out;
1613 1.15.2.1 bouyer bus_space_write_2(iot, ioh, ELINK_W0_EEPROM_COMMAND,
1614 1.15.2.1 bouyer cmd | (off + (offset & 0x3f)));
1615 1.1 fvdl if (ex_eeprom_busy(sc))
1616 1.1 fvdl goto out;
1617 1.1 fvdl data = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_DATA);
1618 1.1 fvdl out:
1619 1.1 fvdl return data;
1620 1.1 fvdl }
1621 1.1 fvdl
1622 1.1 fvdl static int
1623 1.1 fvdl ex_eeprom_busy(sc)
1624 1.1 fvdl struct ex_softc *sc;
1625 1.1 fvdl {
1626 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1627 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1628 1.1 fvdl int i = 100;
1629 1.1 fvdl
1630 1.1 fvdl while (i--) {
1631 1.1 fvdl if (!(bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND) &
1632 1.1 fvdl EEPROM_BUSY))
1633 1.1 fvdl return 0;
1634 1.1 fvdl delay(100);
1635 1.1 fvdl }
1636 1.1 fvdl printf("\n%s: eeprom stays busy.\n", sc->sc_dev.dv_xname);
1637 1.1 fvdl return (1);
1638 1.1 fvdl }
1639 1.1 fvdl
1640 1.1 fvdl /*
1641 1.1 fvdl * Create a new rx buffer and add it to the 'soft' rx list.
1642 1.1 fvdl */
1643 1.1 fvdl static int
1644 1.1 fvdl ex_add_rxbuf(sc, rxd)
1645 1.1 fvdl struct ex_softc *sc;
1646 1.1 fvdl struct ex_rxdesc *rxd;
1647 1.1 fvdl {
1648 1.1 fvdl struct mbuf *m, *oldm;
1649 1.1 fvdl bus_dmamap_t rxmap;
1650 1.1 fvdl int error, rval = 0;
1651 1.1 fvdl
1652 1.1 fvdl oldm = rxd->rx_mbhead;
1653 1.1 fvdl rxmap = rxd->rx_dmamap;
1654 1.1 fvdl
1655 1.1 fvdl MGETHDR(m, M_DONTWAIT, MT_DATA);
1656 1.1 fvdl if (m != NULL) {
1657 1.1 fvdl MCLGET(m, M_DONTWAIT);
1658 1.1 fvdl if ((m->m_flags & M_EXT) == 0) {
1659 1.1 fvdl m_freem(m);
1660 1.1 fvdl if (oldm == NULL)
1661 1.1 fvdl return 1;
1662 1.1 fvdl m = oldm;
1663 1.1 fvdl m->m_data = m->m_ext.ext_buf;
1664 1.1 fvdl rval = 1;
1665 1.1 fvdl }
1666 1.1 fvdl } else {
1667 1.1 fvdl if (oldm == NULL)
1668 1.1 fvdl return 1;
1669 1.1 fvdl m = oldm;
1670 1.1 fvdl m->m_data = m->m_ext.ext_buf;
1671 1.1 fvdl rval = 1;
1672 1.1 fvdl }
1673 1.1 fvdl
1674 1.1 fvdl /*
1675 1.1 fvdl * Setup the DMA map for this receive buffer.
1676 1.1 fvdl */
1677 1.1 fvdl if (m != oldm) {
1678 1.1 fvdl if (oldm != NULL)
1679 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, rxmap);
1680 1.1 fvdl error = bus_dmamap_load(sc->sc_dmat, rxmap,
1681 1.1 fvdl m->m_ext.ext_buf, MCLBYTES, NULL, BUS_DMA_NOWAIT);
1682 1.1 fvdl if (error) {
1683 1.1 fvdl printf("%s: can't load rx buffer, error = %d\n",
1684 1.1 fvdl sc->sc_dev.dv_xname, error);
1685 1.1 fvdl panic("ex_add_rxbuf"); /* XXX */
1686 1.1 fvdl }
1687 1.1 fvdl }
1688 1.1 fvdl
1689 1.1 fvdl /*
1690 1.1 fvdl * Align for data after 14 byte header.
1691 1.1 fvdl */
1692 1.1 fvdl m->m_data += 2;
1693 1.1 fvdl
1694 1.1 fvdl rxd->rx_mbhead = m;
1695 1.15.2.1 bouyer rxd->rx_upd->upd_pktstatus = htole32(MCLBYTES - 2);
1696 1.9 thorpej rxd->rx_upd->upd_frags[0].fr_addr =
1697 1.15.2.1 bouyer htole32(rxmap->dm_segs[0].ds_addr + 2);
1698 1.1 fvdl rxd->rx_upd->upd_nextptr = 0;
1699 1.1 fvdl
1700 1.1 fvdl /*
1701 1.1 fvdl * Attach it to the end of the list.
1702 1.1 fvdl */
1703 1.1 fvdl if (sc->rx_head != NULL) {
1704 1.1 fvdl sc->rx_tail->rx_next = rxd;
1705 1.15.2.1 bouyer sc->rx_tail->rx_upd->upd_nextptr = htole32(sc->sc_upddma +
1706 1.9 thorpej ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd));
1707 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap,
1708 1.1 fvdl (caddr_t)sc->rx_tail->rx_upd - (caddr_t)sc->sc_upd,
1709 1.1 fvdl sizeof (struct ex_upd),
1710 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1711 1.1 fvdl } else {
1712 1.1 fvdl sc->rx_head = rxd;
1713 1.1 fvdl }
1714 1.1 fvdl sc->rx_tail = rxd;
1715 1.1 fvdl
1716 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, rxmap, 0, rxmap->dm_mapsize,
1717 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1718 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap,
1719 1.1 fvdl ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd),
1720 1.1 fvdl sizeof (struct ex_upd), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1721 1.1 fvdl return (rval);
1722 1.1 fvdl }
1723 1.1 fvdl
1724 1.15.2.1 bouyer u_int32_t
1725 1.15.2.1 bouyer ex_mii_bitbang_read(self)
1726 1.15.2.1 bouyer struct device *self;
1727 1.1 fvdl {
1728 1.15.2.1 bouyer struct ex_softc *sc = (void *) self;
1729 1.1 fvdl
1730 1.15.2.1 bouyer /* We're already in Window 4. */
1731 1.15.2.1 bouyer return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT));
1732 1.1 fvdl }
1733 1.1 fvdl
1734 1.1 fvdl void
1735 1.15.2.1 bouyer ex_mii_bitbang_write(self, val)
1736 1.15.2.1 bouyer struct device *self;
1737 1.15.2.1 bouyer u_int32_t val;
1738 1.1 fvdl {
1739 1.15.2.1 bouyer struct ex_softc *sc = (void *) self;
1740 1.1 fvdl
1741 1.15.2.1 bouyer /* We're already in Window 4. */
1742 1.1 fvdl bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT, val);
1743 1.1 fvdl }
1744 1.1 fvdl
1745 1.1 fvdl int
1746 1.1 fvdl ex_mii_readreg(v, phy, reg)
1747 1.1 fvdl struct device *v;
1748 1.15.2.1 bouyer int phy, reg;
1749 1.1 fvdl {
1750 1.1 fvdl struct ex_softc *sc = (struct ex_softc *)v;
1751 1.15.2.1 bouyer int val;
1752 1.1 fvdl
1753 1.1 fvdl if ((sc->ex_conf & EX_CONF_INTPHY) && phy != ELINK_INTPHY_ID)
1754 1.1 fvdl return 0;
1755 1.1 fvdl
1756 1.1 fvdl GO_WINDOW(4);
1757 1.1 fvdl
1758 1.15.2.1 bouyer val = mii_bitbang_readreg(v, &ex_mii_bitbang_ops, phy, reg);
1759 1.1 fvdl
1760 1.1 fvdl GO_WINDOW(1);
1761 1.1 fvdl
1762 1.15.2.1 bouyer return (val);
1763 1.1 fvdl }
1764 1.1 fvdl
1765 1.1 fvdl void
1766 1.1 fvdl ex_mii_writereg(v, phy, reg, data)
1767 1.1 fvdl struct device *v;
1768 1.1 fvdl int phy;
1769 1.1 fvdl int reg;
1770 1.1 fvdl int data;
1771 1.1 fvdl {
1772 1.1 fvdl struct ex_softc *sc = (struct ex_softc *)v;
1773 1.1 fvdl
1774 1.1 fvdl GO_WINDOW(4);
1775 1.1 fvdl
1776 1.15.2.1 bouyer mii_bitbang_writereg(v, &ex_mii_bitbang_ops, phy, reg, data);
1777 1.1 fvdl
1778 1.1 fvdl GO_WINDOW(1);
1779 1.1 fvdl }
1780 1.1 fvdl
1781 1.1 fvdl void
1782 1.1 fvdl ex_mii_statchg(v)
1783 1.1 fvdl struct device *v;
1784 1.1 fvdl {
1785 1.1 fvdl struct ex_softc *sc = (struct ex_softc *)v;
1786 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1787 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1788 1.1 fvdl int mctl;
1789 1.1 fvdl
1790 1.1 fvdl GO_WINDOW(3);
1791 1.1 fvdl mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL);
1792 1.1 fvdl if (sc->ex_mii.mii_media_active & IFM_FDX)
1793 1.1 fvdl mctl |= MAC_CONTROL_FDX;
1794 1.1 fvdl else
1795 1.1 fvdl mctl &= ~MAC_CONTROL_FDX;
1796 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl);
1797 1.1 fvdl GO_WINDOW(1); /* back to operating window */
1798 1.15.2.4 bouyer }
1799 1.15.2.4 bouyer
1800 1.15.2.4 bouyer int
1801 1.15.2.4 bouyer ex_enable(sc)
1802 1.15.2.4 bouyer struct ex_softc *sc;
1803 1.15.2.4 bouyer {
1804 1.15.2.4 bouyer if (sc->enabled == 0 && sc->enable != NULL) {
1805 1.15.2.4 bouyer if ((*sc->enable)(sc) != 0) {
1806 1.15.2.4 bouyer printf("%s: de/vice enable failed\n",
1807 1.15.2.4 bouyer sc->sc_dev.dv_xname);
1808 1.15.2.4 bouyer return (EIO);
1809 1.15.2.4 bouyer }
1810 1.15.2.4 bouyer sc->enabled = 1;
1811 1.15.2.4 bouyer }
1812 1.15.2.4 bouyer return (0);
1813 1.15.2.4 bouyer }
1814 1.15.2.4 bouyer
1815 1.15.2.4 bouyer void
1816 1.15.2.4 bouyer ex_disable(sc)
1817 1.15.2.4 bouyer struct ex_softc *sc;
1818 1.15.2.4 bouyer {
1819 1.15.2.4 bouyer if (sc->enabled == 1 && sc->disable != NULL) {
1820 1.15.2.4 bouyer (*sc->disable)(sc);
1821 1.15.2.4 bouyer sc->enabled = 0;
1822 1.15.2.4 bouyer }
1823 1.15.2.4 bouyer }
1824 1.15.2.4 bouyer
1825 1.15.2.4 bouyer void
1826 1.15.2.4 bouyer ex_power(why, arg)
1827 1.15.2.4 bouyer int why;
1828 1.15.2.4 bouyer void *arg;
1829 1.15.2.4 bouyer {
1830 1.15.2.4 bouyer struct ex_softc *sc = (void *)arg;
1831 1.15.2.4 bouyer struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1832 1.15.2.4 bouyer int s;
1833 1.15.2.4 bouyer
1834 1.15.2.4 bouyer s = splnet();
1835 1.15.2.4 bouyer if (why != PWR_RESUME) {
1836 1.15.2.4 bouyer ex_stop(ifp, 0);
1837 1.15.2.4 bouyer if (sc->power != NULL)
1838 1.15.2.4 bouyer (*sc->power)(sc, why);
1839 1.15.2.4 bouyer } else if (ifp->if_flags & IFF_UP) {
1840 1.15.2.4 bouyer if (sc->power != NULL)
1841 1.15.2.4 bouyer (*sc->power)(sc, why);
1842 1.15.2.4 bouyer ex_init(ifp);
1843 1.15.2.4 bouyer }
1844 1.15.2.4 bouyer splx(s);
1845 1.1 fvdl }
1846