elinkxl.c revision 1.37 1 1.37 haya /* $NetBSD: elinkxl.c,v 1.37 2000/08/25 09:01:59 haya Exp $ */
2 1.1 fvdl
3 1.1 fvdl /*-
4 1.1 fvdl * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.1 fvdl * All rights reserved.
6 1.1 fvdl *
7 1.1 fvdl * This code is derived from software contributed to The NetBSD Foundation
8 1.1 fvdl * by Frank van der Linden.
9 1.1 fvdl *
10 1.1 fvdl * Redistribution and use in source and binary forms, with or without
11 1.1 fvdl * modification, are permitted provided that the following conditions
12 1.1 fvdl * are met:
13 1.1 fvdl * 1. Redistributions of source code must retain the above copyright
14 1.1 fvdl * notice, this list of conditions and the following disclaimer.
15 1.1 fvdl * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 fvdl * notice, this list of conditions and the following disclaimer in the
17 1.1 fvdl * documentation and/or other materials provided with the distribution.
18 1.1 fvdl * 3. All advertising materials mentioning features or use of this software
19 1.1 fvdl * must display the following acknowledgement:
20 1.1 fvdl * This product includes software developed by the NetBSD
21 1.1 fvdl * Foundation, Inc. and its contributors.
22 1.1 fvdl * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.1 fvdl * contributors may be used to endorse or promote products derived
24 1.1 fvdl * from this software without specific prior written permission.
25 1.1 fvdl *
26 1.1 fvdl * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.1 fvdl * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 fvdl * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1 fvdl * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.1 fvdl * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 fvdl * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 fvdl * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 fvdl * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 fvdl * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 fvdl * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 fvdl * POSSIBILITY OF SUCH DAMAGE.
37 1.1 fvdl */
38 1.1 fvdl
39 1.1 fvdl #include "opt_inet.h"
40 1.1 fvdl #include "opt_ns.h"
41 1.1 fvdl #include "bpfilter.h"
42 1.1 fvdl #include "rnd.h"
43 1.1 fvdl
44 1.1 fvdl #include <sys/param.h>
45 1.1 fvdl #include <sys/systm.h>
46 1.30 thorpej #include <sys/callout.h>
47 1.1 fvdl #include <sys/kernel.h>
48 1.1 fvdl #include <sys/mbuf.h>
49 1.1 fvdl #include <sys/socket.h>
50 1.1 fvdl #include <sys/ioctl.h>
51 1.1 fvdl #include <sys/errno.h>
52 1.1 fvdl #include <sys/syslog.h>
53 1.1 fvdl #include <sys/select.h>
54 1.1 fvdl #include <sys/device.h>
55 1.1 fvdl #if NRND > 0
56 1.1 fvdl #include <sys/rnd.h>
57 1.1 fvdl #endif
58 1.1 fvdl
59 1.1 fvdl #include <net/if.h>
60 1.1 fvdl #include <net/if_dl.h>
61 1.1 fvdl #include <net/if_ether.h>
62 1.1 fvdl #include <net/if_media.h>
63 1.1 fvdl
64 1.1 fvdl #ifdef INET
65 1.1 fvdl #include <netinet/in.h>
66 1.1 fvdl #include <netinet/in_systm.h>
67 1.1 fvdl #include <netinet/in_var.h>
68 1.1 fvdl #include <netinet/ip.h>
69 1.1 fvdl #include <netinet/if_inarp.h>
70 1.1 fvdl #endif
71 1.1 fvdl
72 1.1 fvdl #ifdef NS
73 1.1 fvdl #include <netns/ns.h>
74 1.1 fvdl #include <netns/ns_if.h>
75 1.1 fvdl #endif
76 1.1 fvdl
77 1.1 fvdl #if NBPFILTER > 0
78 1.1 fvdl #include <net/bpf.h>
79 1.1 fvdl #include <net/bpfdesc.h>
80 1.1 fvdl #endif
81 1.1 fvdl
82 1.1 fvdl #include <machine/cpu.h>
83 1.1 fvdl #include <machine/bus.h>
84 1.1 fvdl #include <machine/intr.h>
85 1.21 thorpej #include <machine/endian.h>
86 1.1 fvdl
87 1.1 fvdl #include <dev/mii/miivar.h>
88 1.1 fvdl #include <dev/mii/mii.h>
89 1.19 thorpej #include <dev/mii/mii_bitbang.h>
90 1.1 fvdl
91 1.1 fvdl #include <dev/ic/elink3reg.h>
92 1.1 fvdl /* #include <dev/ic/elink3var.h> */
93 1.1 fvdl #include <dev/ic/elinkxlreg.h>
94 1.1 fvdl #include <dev/ic/elinkxlvar.h>
95 1.1 fvdl
96 1.1 fvdl #ifdef DEBUG
97 1.1 fvdl int exdebug = 0;
98 1.1 fvdl #endif
99 1.1 fvdl
100 1.1 fvdl /* ifmedia callbacks */
101 1.1 fvdl int ex_media_chg __P((struct ifnet *ifp));
102 1.1 fvdl void ex_media_stat __P((struct ifnet *ifp, struct ifmediareq *req));
103 1.1 fvdl
104 1.1 fvdl void ex_probe_media __P((struct ex_softc *));
105 1.1 fvdl void ex_set_filter __P((struct ex_softc *));
106 1.1 fvdl void ex_set_media __P((struct ex_softc *));
107 1.1 fvdl struct mbuf *ex_get __P((struct ex_softc *, int));
108 1.1 fvdl u_int16_t ex_read_eeprom __P((struct ex_softc *, int));
109 1.1 fvdl void ex_init __P((struct ex_softc *));
110 1.1 fvdl void ex_read __P((struct ex_softc *));
111 1.1 fvdl void ex_reset __P((struct ex_softc *));
112 1.1 fvdl void ex_set_mc __P((struct ex_softc *));
113 1.1 fvdl void ex_getstats __P((struct ex_softc *));
114 1.1 fvdl void ex_printstats __P((struct ex_softc *));
115 1.1 fvdl void ex_tick __P((void *));
116 1.1 fvdl
117 1.1 fvdl static int ex_eeprom_busy __P((struct ex_softc *));
118 1.1 fvdl static int ex_add_rxbuf __P((struct ex_softc *, struct ex_rxdesc *));
119 1.1 fvdl static void ex_init_txdescs __P((struct ex_softc *));
120 1.1 fvdl
121 1.1 fvdl static void ex_shutdown __P((void *));
122 1.1 fvdl static void ex_start __P((struct ifnet *));
123 1.1 fvdl static void ex_txstat __P((struct ex_softc *));
124 1.1 fvdl
125 1.1 fvdl int ex_mii_readreg __P((struct device *, int, int));
126 1.1 fvdl void ex_mii_writereg __P((struct device *, int, int, int));
127 1.1 fvdl void ex_mii_statchg __P((struct device *));
128 1.1 fvdl
129 1.2 thorpej void ex_probemedia __P((struct ex_softc *));
130 1.2 thorpej
131 1.2 thorpej /*
132 1.2 thorpej * Structure to map media-present bits in boards to ifmedia codes and
133 1.2 thorpej * printable media names. Used for table-driven ifmedia initialization.
134 1.2 thorpej */
135 1.2 thorpej struct ex_media {
136 1.2 thorpej int exm_mpbit; /* media present bit */
137 1.2 thorpej const char *exm_name; /* name of medium */
138 1.2 thorpej int exm_ifmedia; /* ifmedia word for medium */
139 1.2 thorpej int exm_epmedia; /* ELINKMEDIA_* constant */
140 1.2 thorpej };
141 1.2 thorpej
142 1.2 thorpej /*
143 1.2 thorpej * Media table for 3c90x chips. Note that chips with MII have no
144 1.2 thorpej * `native' media.
145 1.2 thorpej */
146 1.2 thorpej struct ex_media ex_native_media[] = {
147 1.2 thorpej { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T,
148 1.2 thorpej ELINKMEDIA_10BASE_T },
149 1.2 thorpej { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX,
150 1.2 thorpej ELINKMEDIA_10BASE_T },
151 1.2 thorpej { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5,
152 1.2 thorpej ELINKMEDIA_AUI },
153 1.2 thorpej { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2,
154 1.2 thorpej ELINKMEDIA_10BASE_2 },
155 1.2 thorpej { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX,
156 1.2 thorpej ELINKMEDIA_100BASE_TX },
157 1.2 thorpej { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX,
158 1.2 thorpej ELINKMEDIA_100BASE_TX },
159 1.2 thorpej { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX,
160 1.2 thorpej ELINKMEDIA_100BASE_FX },
161 1.2 thorpej { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL,
162 1.2 thorpej ELINKMEDIA_MII },
163 1.2 thorpej { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4,
164 1.2 thorpej ELINKMEDIA_100BASE_T4 },
165 1.2 thorpej { 0, NULL, 0,
166 1.2 thorpej 0 },
167 1.2 thorpej };
168 1.2 thorpej
169 1.1 fvdl /*
170 1.19 thorpej * MII bit-bang glue.
171 1.19 thorpej */
172 1.19 thorpej u_int32_t ex_mii_bitbang_read __P((struct device *));
173 1.19 thorpej void ex_mii_bitbang_write __P((struct device *, u_int32_t));
174 1.19 thorpej
175 1.19 thorpej const struct mii_bitbang_ops ex_mii_bitbang_ops = {
176 1.19 thorpej ex_mii_bitbang_read,
177 1.19 thorpej ex_mii_bitbang_write,
178 1.19 thorpej {
179 1.19 thorpej ELINK_PHY_DATA, /* MII_BIT_MDO */
180 1.19 thorpej ELINK_PHY_DATA, /* MII_BIT_MDI */
181 1.19 thorpej ELINK_PHY_CLK, /* MII_BIT_MDC */
182 1.19 thorpej ELINK_PHY_DIR, /* MII_BIT_DIR_HOST_PHY */
183 1.19 thorpej 0, /* MII_BIT_DIR_PHY_HOST */
184 1.19 thorpej }
185 1.19 thorpej };
186 1.19 thorpej
187 1.19 thorpej /*
188 1.1 fvdl * Back-end attach and configure.
189 1.1 fvdl */
190 1.1 fvdl void
191 1.1 fvdl ex_config(sc)
192 1.1 fvdl struct ex_softc *sc;
193 1.1 fvdl {
194 1.1 fvdl struct ifnet *ifp;
195 1.1 fvdl u_int16_t val;
196 1.1 fvdl u_int8_t macaddr[ETHER_ADDR_LEN] = {0};
197 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
198 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
199 1.25 augustss int i, error, attach_stage;
200 1.1 fvdl
201 1.30 thorpej callout_init(&sc->ex_mii_callout);
202 1.30 thorpej
203 1.1 fvdl ex_reset(sc);
204 1.1 fvdl
205 1.1 fvdl val = ex_read_eeprom(sc, EEPROM_OEM_ADDR0);
206 1.1 fvdl macaddr[0] = val >> 8;
207 1.1 fvdl macaddr[1] = val & 0xff;
208 1.1 fvdl val = ex_read_eeprom(sc, EEPROM_OEM_ADDR1);
209 1.1 fvdl macaddr[2] = val >> 8;
210 1.1 fvdl macaddr[3] = val & 0xff;
211 1.1 fvdl val = ex_read_eeprom(sc, EEPROM_OEM_ADDR2);
212 1.1 fvdl macaddr[4] = val >> 8;
213 1.1 fvdl macaddr[5] = val & 0xff;
214 1.1 fvdl
215 1.1 fvdl printf("%s: MAC address %s\n", sc->sc_dev.dv_xname,
216 1.1 fvdl ether_sprintf(macaddr));
217 1.1 fvdl
218 1.15 haya if (sc->intr_ack) { /* 3C575BTX specific */
219 1.15 haya GO_WINDOW(2);
220 1.15 haya bus_space_write_2(sc->sc_iot, ioh, 12, 0x10|bus_space_read_2(sc->sc_iot, ioh, 12));
221 1.15 haya }
222 1.15 haya
223 1.1 fvdl attach_stage = 0;
224 1.1 fvdl
225 1.1 fvdl /*
226 1.1 fvdl * Allocate the upload descriptors, and create and load the DMA
227 1.1 fvdl * map for them.
228 1.1 fvdl */
229 1.1 fvdl if ((error = bus_dmamem_alloc(sc->sc_dmat,
230 1.25 augustss EX_NUPD * sizeof (struct ex_upd), NBPG, 0, &sc->sc_useg, 1,
231 1.25 augustss &sc->sc_urseg, BUS_DMA_NOWAIT)) != 0) {
232 1.1 fvdl printf("%s: can't allocate upload descriptors, error = %d\n",
233 1.1 fvdl sc->sc_dev.dv_xname, error);
234 1.1 fvdl goto fail;
235 1.1 fvdl }
236 1.1 fvdl
237 1.1 fvdl attach_stage = 1;
238 1.1 fvdl
239 1.25 augustss if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg,
240 1.1 fvdl EX_NUPD * sizeof (struct ex_upd), (caddr_t *)&sc->sc_upd,
241 1.1 fvdl BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
242 1.1 fvdl printf("%s: can't map upload descriptors, error = %d\n",
243 1.1 fvdl sc->sc_dev.dv_xname, error);
244 1.1 fvdl goto fail;
245 1.1 fvdl }
246 1.1 fvdl
247 1.1 fvdl attach_stage = 2;
248 1.1 fvdl
249 1.1 fvdl if ((error = bus_dmamap_create(sc->sc_dmat,
250 1.1 fvdl EX_NUPD * sizeof (struct ex_upd), 1,
251 1.1 fvdl EX_NUPD * sizeof (struct ex_upd), 0, BUS_DMA_NOWAIT,
252 1.1 fvdl &sc->sc_upd_dmamap)) != 0) {
253 1.1 fvdl printf("%s: can't create upload desc. DMA map, error = %d\n",
254 1.1 fvdl sc->sc_dev.dv_xname, error);
255 1.1 fvdl goto fail;
256 1.1 fvdl }
257 1.1 fvdl
258 1.1 fvdl attach_stage = 3;
259 1.1 fvdl
260 1.1 fvdl if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_upd_dmamap,
261 1.1 fvdl sc->sc_upd, EX_NUPD * sizeof (struct ex_upd), NULL,
262 1.1 fvdl BUS_DMA_NOWAIT)) != 0) {
263 1.1 fvdl printf("%s: can't load upload desc. DMA map, error = %d\n",
264 1.1 fvdl sc->sc_dev.dv_xname, error);
265 1.1 fvdl goto fail;
266 1.1 fvdl }
267 1.1 fvdl
268 1.1 fvdl attach_stage = 4;
269 1.1 fvdl
270 1.1 fvdl /*
271 1.1 fvdl * Allocate the download descriptors, and create and load the DMA
272 1.1 fvdl * map for them.
273 1.1 fvdl */
274 1.1 fvdl if ((error = bus_dmamem_alloc(sc->sc_dmat,
275 1.25 augustss EX_NDPD * sizeof (struct ex_dpd), NBPG, 0, &sc->sc_dseg, 1,
276 1.25 augustss &sc->sc_drseg, BUS_DMA_NOWAIT)) != 0) {
277 1.1 fvdl printf("%s: can't allocate download descriptors, error = %d\n",
278 1.1 fvdl sc->sc_dev.dv_xname, error);
279 1.1 fvdl goto fail;
280 1.1 fvdl }
281 1.1 fvdl
282 1.1 fvdl attach_stage = 5;
283 1.1 fvdl
284 1.25 augustss if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg,
285 1.1 fvdl EX_NDPD * sizeof (struct ex_dpd), (caddr_t *)&sc->sc_dpd,
286 1.1 fvdl BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
287 1.1 fvdl printf("%s: can't map download descriptors, error = %d\n",
288 1.1 fvdl sc->sc_dev.dv_xname, error);
289 1.1 fvdl goto fail;
290 1.1 fvdl }
291 1.1 fvdl bzero(sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd));
292 1.1 fvdl
293 1.1 fvdl attach_stage = 6;
294 1.1 fvdl
295 1.1 fvdl if ((error = bus_dmamap_create(sc->sc_dmat,
296 1.1 fvdl EX_NDPD * sizeof (struct ex_dpd), 1,
297 1.1 fvdl EX_NDPD * sizeof (struct ex_dpd), 0, BUS_DMA_NOWAIT,
298 1.1 fvdl &sc->sc_dpd_dmamap)) != 0) {
299 1.1 fvdl printf("%s: can't create download desc. DMA map, error = %d\n",
300 1.1 fvdl sc->sc_dev.dv_xname, error);
301 1.1 fvdl goto fail;
302 1.1 fvdl }
303 1.1 fvdl
304 1.1 fvdl attach_stage = 7;
305 1.1 fvdl
306 1.1 fvdl if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dpd_dmamap,
307 1.1 fvdl sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd), NULL,
308 1.1 fvdl BUS_DMA_NOWAIT)) != 0) {
309 1.1 fvdl printf("%s: can't load download desc. DMA map, error = %d\n",
310 1.1 fvdl sc->sc_dev.dv_xname, error);
311 1.1 fvdl goto fail;
312 1.1 fvdl }
313 1.1 fvdl
314 1.1 fvdl attach_stage = 8;
315 1.1 fvdl
316 1.1 fvdl
317 1.1 fvdl /*
318 1.1 fvdl * Create the transmit buffer DMA maps.
319 1.1 fvdl */
320 1.1 fvdl for (i = 0; i < EX_NDPD; i++) {
321 1.1 fvdl if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
322 1.1 fvdl EX_NTFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT,
323 1.1 fvdl &sc->sc_tx_dmamaps[i])) != 0) {
324 1.1 fvdl printf("%s: can't create tx DMA map %d, error = %d\n",
325 1.1 fvdl sc->sc_dev.dv_xname, i, error);
326 1.1 fvdl goto fail;
327 1.1 fvdl }
328 1.1 fvdl }
329 1.1 fvdl
330 1.1 fvdl attach_stage = 9;
331 1.1 fvdl
332 1.1 fvdl /*
333 1.1 fvdl * Create the receive buffer DMA maps.
334 1.1 fvdl */
335 1.1 fvdl for (i = 0; i < EX_NUPD; i++) {
336 1.1 fvdl if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
337 1.1 fvdl EX_NRFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT,
338 1.1 fvdl &sc->sc_rx_dmamaps[i])) != 0) {
339 1.1 fvdl printf("%s: can't create rx DMA map %d, error = %d\n",
340 1.1 fvdl sc->sc_dev.dv_xname, i, error);
341 1.1 fvdl goto fail;
342 1.1 fvdl }
343 1.1 fvdl }
344 1.1 fvdl
345 1.1 fvdl attach_stage = 10;
346 1.1 fvdl
347 1.1 fvdl /*
348 1.1 fvdl * Create ring of upload descriptors, only once. The DMA engine
349 1.1 fvdl * will loop over this when receiving packets, stalling if it
350 1.1 fvdl * hits an UPD with a finished receive.
351 1.1 fvdl */
352 1.1 fvdl for (i = 0; i < EX_NUPD; i++) {
353 1.1 fvdl sc->sc_rxdescs[i].rx_dmamap = sc->sc_rx_dmamaps[i];
354 1.1 fvdl sc->sc_rxdescs[i].rx_upd = &sc->sc_upd[i];
355 1.9 thorpej sc->sc_upd[i].upd_frags[0].fr_len =
356 1.21 thorpej htole32((MCLBYTES - 2) | EX_FR_LAST);
357 1.1 fvdl if (ex_add_rxbuf(sc, &sc->sc_rxdescs[i]) != 0) {
358 1.1 fvdl printf("%s: can't allocate or map rx buffers\n",
359 1.1 fvdl sc->sc_dev.dv_xname);
360 1.1 fvdl goto fail;
361 1.1 fvdl }
362 1.1 fvdl }
363 1.1 fvdl
364 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 0,
365 1.1 fvdl EX_NUPD * sizeof (struct ex_upd),
366 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
367 1.1 fvdl
368 1.1 fvdl ex_init_txdescs(sc);
369 1.1 fvdl
370 1.1 fvdl attach_stage = 11;
371 1.1 fvdl
372 1.1 fvdl
373 1.1 fvdl GO_WINDOW(3);
374 1.1 fvdl val = bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS);
375 1.1 fvdl if (val & ELINK_MEDIACAP_MII)
376 1.1 fvdl sc->ex_conf |= EX_CONF_MII;
377 1.1 fvdl
378 1.1 fvdl ifp = &sc->sc_ethercom.ec_if;
379 1.1 fvdl
380 1.2 thorpej /*
381 1.2 thorpej * Initialize our media structures and MII info. We'll
382 1.2 thorpej * probe the MII if we discover that we have one.
383 1.2 thorpej */
384 1.2 thorpej sc->ex_mii.mii_ifp = ifp;
385 1.2 thorpej sc->ex_mii.mii_readreg = ex_mii_readreg;
386 1.2 thorpej sc->ex_mii.mii_writereg = ex_mii_writereg;
387 1.2 thorpej sc->ex_mii.mii_statchg = ex_mii_statchg;
388 1.2 thorpej ifmedia_init(&sc->ex_mii.mii_media, 0, ex_media_chg,
389 1.2 thorpej ex_media_stat);
390 1.2 thorpej
391 1.1 fvdl if (sc->ex_conf & EX_CONF_MII) {
392 1.1 fvdl /*
393 1.1 fvdl * Find PHY, extract media information from it.
394 1.14 fvdl * First, select the right transceiver.
395 1.1 fvdl */
396 1.14 fvdl u_int32_t icfg;
397 1.14 fvdl
398 1.14 fvdl GO_WINDOW(3);
399 1.14 fvdl icfg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG);
400 1.14 fvdl icfg &= ~(CONFIG_XCVR_SEL << 16);
401 1.14 fvdl if (val & (ELINK_MEDIACAP_MII | ELINK_MEDIACAP_100BASET4))
402 1.14 fvdl icfg |= ELINKMEDIA_MII << (CONFIG_XCVR_SEL_SHIFT + 16);
403 1.14 fvdl if (val & ELINK_MEDIACAP_100BASETX)
404 1.14 fvdl icfg |= ELINKMEDIA_AUTO << (CONFIG_XCVR_SEL_SHIFT + 16);
405 1.14 fvdl if (val & ELINK_MEDIACAP_100BASEFX)
406 1.14 fvdl icfg |= ELINKMEDIA_100BASE_FX
407 1.14 fvdl << (CONFIG_XCVR_SEL_SHIFT + 16);
408 1.14 fvdl bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, icfg);
409 1.14 fvdl
410 1.23 thorpej mii_attach(&sc->sc_dev, &sc->ex_mii, 0xffffffff,
411 1.24 thorpej MII_PHY_ANY, MII_OFFSET_ANY, 0);
412 1.1 fvdl if (LIST_FIRST(&sc->ex_mii.mii_phys) == NULL) {
413 1.1 fvdl ifmedia_add(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE,
414 1.1 fvdl 0, NULL);
415 1.1 fvdl ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE);
416 1.1 fvdl } else {
417 1.1 fvdl ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_AUTO);
418 1.1 fvdl }
419 1.2 thorpej } else
420 1.2 thorpej ex_probemedia(sc);
421 1.1 fvdl
422 1.1 fvdl bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
423 1.1 fvdl ifp->if_softc = sc;
424 1.1 fvdl ifp->if_start = ex_start;
425 1.1 fvdl ifp->if_ioctl = ex_ioctl;
426 1.1 fvdl ifp->if_watchdog = ex_watchdog;
427 1.1 fvdl ifp->if_flags =
428 1.1 fvdl IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
429 1.1 fvdl
430 1.1 fvdl if_attach(ifp);
431 1.1 fvdl ether_ifattach(ifp, macaddr);
432 1.1 fvdl
433 1.1 fvdl GO_WINDOW(1);
434 1.1 fvdl
435 1.1 fvdl sc->tx_start_thresh = 20;
436 1.1 fvdl sc->tx_succ_ok = 0;
437 1.1 fvdl
438 1.1 fvdl /* TODO: set queues to 0 */
439 1.1 fvdl
440 1.1 fvdl #if NBPFILTER > 0
441 1.1 fvdl bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB,
442 1.1 fvdl sizeof(struct ether_header));
443 1.1 fvdl #endif
444 1.1 fvdl
445 1.1 fvdl #if NRND > 0
446 1.5 explorer rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname,
447 1.5 explorer RND_TYPE_NET, 0);
448 1.1 fvdl #endif
449 1.1 fvdl
450 1.1 fvdl /* Establish callback to reset card when we reboot. */
451 1.25 augustss sc->sc_sdhook = shutdownhook_establish(ex_shutdown, sc);
452 1.34 jhawk
453 1.34 jhawk /* The attach is successful. */
454 1.34 jhawk sc->ex_flags |= EX_FLAGS_ATTACHED;
455 1.1 fvdl return;
456 1.1 fvdl
457 1.1 fvdl fail:
458 1.1 fvdl /*
459 1.1 fvdl * Free any resources we've allocated during the failed attach
460 1.1 fvdl * attempt. Do this in reverse order and fall though.
461 1.1 fvdl */
462 1.1 fvdl switch (attach_stage) {
463 1.1 fvdl case 11:
464 1.1 fvdl {
465 1.1 fvdl struct ex_rxdesc *rxd;
466 1.1 fvdl
467 1.1 fvdl for (i = 0; i < EX_NUPD; i++) {
468 1.1 fvdl rxd = &sc->sc_rxdescs[i];
469 1.1 fvdl if (rxd->rx_mbhead != NULL) {
470 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap);
471 1.1 fvdl m_freem(rxd->rx_mbhead);
472 1.1 fvdl }
473 1.1 fvdl }
474 1.1 fvdl }
475 1.1 fvdl /* FALLTHROUGH */
476 1.1 fvdl
477 1.1 fvdl case 10:
478 1.1 fvdl for (i = 0; i < EX_NUPD; i++)
479 1.1 fvdl bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]);
480 1.1 fvdl /* FALLTHROUGH */
481 1.1 fvdl
482 1.1 fvdl case 9:
483 1.1 fvdl for (i = 0; i < EX_NDPD; i++)
484 1.1 fvdl bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]);
485 1.1 fvdl /* FALLTHROUGH */
486 1.1 fvdl case 8:
487 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap);
488 1.1 fvdl /* FALLTHROUGH */
489 1.1 fvdl
490 1.1 fvdl case 7:
491 1.1 fvdl bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap);
492 1.1 fvdl /* FALLTHROUGH */
493 1.1 fvdl
494 1.1 fvdl case 6:
495 1.1 fvdl bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd,
496 1.1 fvdl EX_NDPD * sizeof (struct ex_dpd));
497 1.1 fvdl /* FALLTHROUGH */
498 1.1 fvdl
499 1.1 fvdl case 5:
500 1.25 augustss bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg);
501 1.1 fvdl break;
502 1.1 fvdl
503 1.1 fvdl case 4:
504 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap);
505 1.1 fvdl /* FALLTHROUGH */
506 1.1 fvdl
507 1.1 fvdl case 3:
508 1.1 fvdl bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap);
509 1.1 fvdl /* FALLTHROUGH */
510 1.1 fvdl
511 1.1 fvdl case 2:
512 1.1 fvdl bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd,
513 1.1 fvdl EX_NUPD * sizeof (struct ex_upd));
514 1.1 fvdl /* FALLTHROUGH */
515 1.1 fvdl
516 1.1 fvdl case 1:
517 1.25 augustss bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg);
518 1.1 fvdl break;
519 1.1 fvdl }
520 1.1 fvdl
521 1.2 thorpej }
522 1.2 thorpej
523 1.2 thorpej /*
524 1.2 thorpej * Find the media present on non-MII chips.
525 1.2 thorpej */
526 1.2 thorpej void
527 1.2 thorpej ex_probemedia(sc)
528 1.2 thorpej struct ex_softc *sc;
529 1.2 thorpej {
530 1.2 thorpej bus_space_tag_t iot = sc->sc_iot;
531 1.2 thorpej bus_space_handle_t ioh = sc->sc_ioh;
532 1.2 thorpej struct ifmedia *ifm = &sc->ex_mii.mii_media;
533 1.2 thorpej struct ex_media *exm;
534 1.2 thorpej u_int16_t config1, reset_options, default_media;
535 1.2 thorpej int defmedia = 0;
536 1.2 thorpej const char *sep = "", *defmedianame = NULL;
537 1.2 thorpej
538 1.2 thorpej GO_WINDOW(3);
539 1.2 thorpej config1 = bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2);
540 1.2 thorpej reset_options = bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS);
541 1.2 thorpej GO_WINDOW(0);
542 1.2 thorpej
543 1.2 thorpej default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT;
544 1.2 thorpej
545 1.2 thorpej printf("%s: ", sc->sc_dev.dv_xname);
546 1.2 thorpej
547 1.2 thorpej /* Sanity check that there are any media! */
548 1.2 thorpej if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) {
549 1.2 thorpej printf("no media present!\n");
550 1.2 thorpej ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL);
551 1.2 thorpej ifmedia_set(ifm, IFM_ETHER|IFM_NONE);
552 1.2 thorpej return;
553 1.2 thorpej }
554 1.2 thorpej
555 1.2 thorpej #define PRINT(s) printf("%s%s", sep, s); sep = ", "
556 1.2 thorpej
557 1.2 thorpej for (exm = ex_native_media; exm->exm_name != NULL; exm++) {
558 1.2 thorpej if (reset_options & exm->exm_mpbit) {
559 1.2 thorpej /*
560 1.2 thorpej * Default media is a little complicated. We
561 1.2 thorpej * support full-duplex which uses the same
562 1.2 thorpej * reset options bit.
563 1.2 thorpej *
564 1.2 thorpej * XXX Check EEPROM for default to FDX?
565 1.2 thorpej */
566 1.2 thorpej if (exm->exm_epmedia == default_media) {
567 1.2 thorpej if ((exm->exm_ifmedia & IFM_FDX) == 0) {
568 1.2 thorpej defmedia = exm->exm_ifmedia;
569 1.2 thorpej defmedianame = exm->exm_name;
570 1.2 thorpej }
571 1.2 thorpej } else if (defmedia == 0) {
572 1.2 thorpej defmedia = exm->exm_ifmedia;
573 1.2 thorpej defmedianame = exm->exm_name;
574 1.2 thorpej }
575 1.2 thorpej ifmedia_add(ifm, exm->exm_ifmedia, exm->exm_epmedia,
576 1.2 thorpej NULL);
577 1.2 thorpej PRINT(exm->exm_name);
578 1.2 thorpej }
579 1.2 thorpej }
580 1.2 thorpej
581 1.2 thorpej #undef PRINT
582 1.2 thorpej
583 1.2 thorpej #ifdef DIAGNOSTIC
584 1.2 thorpej if (defmedia == 0)
585 1.2 thorpej panic("ex_probemedia: impossible");
586 1.2 thorpej #endif
587 1.2 thorpej
588 1.2 thorpej printf(", default %s\n", defmedianame);
589 1.2 thorpej ifmedia_set(ifm, defmedia);
590 1.1 fvdl }
591 1.1 fvdl
592 1.1 fvdl /*
593 1.1 fvdl * Bring device up.
594 1.1 fvdl */
595 1.1 fvdl void
596 1.1 fvdl ex_init(sc)
597 1.1 fvdl struct ex_softc *sc;
598 1.1 fvdl {
599 1.1 fvdl struct ifnet *ifp = &sc->sc_ethercom.ec_if;
600 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
601 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
602 1.1 fvdl int s, i;
603 1.1 fvdl
604 1.1 fvdl s = splnet();
605 1.1 fvdl
606 1.1 fvdl ex_waitcmd(sc);
607 1.1 fvdl ex_stop(sc);
608 1.1 fvdl
609 1.1 fvdl /*
610 1.1 fvdl * Set the station address and clear the station mask. The latter
611 1.1 fvdl * is needed for 90x cards, 0 is the default for 90xB cards.
612 1.1 fvdl */
613 1.1 fvdl GO_WINDOW(2);
614 1.1 fvdl for (i = 0; i < ETHER_ADDR_LEN; i++) {
615 1.1 fvdl bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i,
616 1.1 fvdl LLADDR(ifp->if_sadl)[i]);
617 1.1 fvdl bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0);
618 1.1 fvdl }
619 1.1 fvdl
620 1.1 fvdl GO_WINDOW(3);
621 1.1 fvdl
622 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_RESET);
623 1.1 fvdl ex_waitcmd(sc);
624 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_RESET);
625 1.1 fvdl ex_waitcmd(sc);
626 1.1 fvdl
627 1.1 fvdl /*
628 1.1 fvdl * Disable reclaim threshold for 90xB, set free threshold to
629 1.1 fvdl * 6 * 256 = 1536 for 90x.
630 1.1 fvdl */
631 1.1 fvdl if (sc->ex_conf & EX_CONF_90XB)
632 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND,
633 1.1 fvdl ELINK_TXRECLTHRESH | 255);
634 1.1 fvdl else
635 1.1 fvdl bus_space_write_1(iot, ioh, ELINK_TXFREETHRESH, 6);
636 1.1 fvdl
637 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND,
638 1.1 fvdl SET_RX_EARLY_THRESH | ELINK_THRESH_DISABLE);
639 1.1 fvdl
640 1.1 fvdl bus_space_write_4(iot, ioh, ELINK_DMACTRL,
641 1.1 fvdl bus_space_read_4(iot, ioh, ELINK_DMACTRL) | ELINK_DMAC_UPRXEAREN);
642 1.1 fvdl
643 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK | S_MASK);
644 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK | S_MASK);
645 1.1 fvdl
646 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff);
647 1.15 haya if (sc->intr_ack)
648 1.15 haya (* sc->intr_ack)(sc);
649 1.1 fvdl ex_set_media(sc);
650 1.1 fvdl ex_set_mc(sc);
651 1.1 fvdl
652 1.1 fvdl
653 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, STATS_ENABLE);
654 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE);
655 1.1 fvdl bus_space_write_4(iot, ioh, ELINK_UPLISTPTR, sc->sc_upddma);
656 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE);
657 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_UPUNSTALL);
658 1.1 fvdl
659 1.1 fvdl ifp->if_flags |= IFF_RUNNING;
660 1.1 fvdl ifp->if_flags &= ~IFF_OACTIVE;
661 1.1 fvdl ex_start(ifp);
662 1.1 fvdl
663 1.1 fvdl GO_WINDOW(1);
664 1.1 fvdl
665 1.1 fvdl splx(s);
666 1.1 fvdl
667 1.30 thorpej callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc);
668 1.1 fvdl }
669 1.1 fvdl
670 1.33 thorpej #define ex_mchash(addr) (ether_crc32_be((addr), ETHER_ADDR_LEN) & 0xff)
671 1.1 fvdl
672 1.1 fvdl /*
673 1.1 fvdl * Set multicast receive filter. Also take care of promiscuous mode
674 1.1 fvdl * here (XXX).
675 1.1 fvdl */
676 1.1 fvdl void
677 1.1 fvdl ex_set_mc(sc)
678 1.31 augustss struct ex_softc *sc;
679 1.1 fvdl {
680 1.1 fvdl struct ifnet *ifp = &sc->sc_ethercom.ec_if;
681 1.1 fvdl struct ethercom *ec = &sc->sc_ethercom;
682 1.1 fvdl struct ether_multi *enm;
683 1.1 fvdl struct ether_multistep estep;
684 1.1 fvdl int i;
685 1.1 fvdl u_int16_t mask = FIL_INDIVIDUAL | FIL_BRDCST;
686 1.1 fvdl
687 1.1 fvdl if (ifp->if_flags & IFF_PROMISC)
688 1.1 fvdl mask |= FIL_PROMISC;
689 1.1 fvdl
690 1.1 fvdl if (!(ifp->if_flags & IFF_MULTICAST))
691 1.1 fvdl goto out;
692 1.1 fvdl
693 1.1 fvdl if (!(sc->ex_conf & EX_CONF_90XB) || ifp->if_flags & IFF_ALLMULTI) {
694 1.1 fvdl mask |= (ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0;
695 1.1 fvdl } else {
696 1.1 fvdl ETHER_FIRST_MULTI(estep, ec, enm);
697 1.1 fvdl while (enm != NULL) {
698 1.1 fvdl if (bcmp(enm->enm_addrlo, enm->enm_addrhi,
699 1.1 fvdl ETHER_ADDR_LEN) != 0)
700 1.1 fvdl goto out;
701 1.1 fvdl i = ex_mchash(enm->enm_addrlo);
702 1.1 fvdl bus_space_write_2(sc->sc_iot, sc->sc_ioh,
703 1.1 fvdl ELINK_COMMAND, ELINK_SETHASHFILBIT | i);
704 1.1 fvdl ETHER_NEXT_MULTI(estep, enm);
705 1.1 fvdl }
706 1.1 fvdl mask |= FIL_MULTIHASH;
707 1.1 fvdl }
708 1.1 fvdl out:
709 1.1 fvdl bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND,
710 1.1 fvdl SET_RX_FILTER | mask);
711 1.1 fvdl }
712 1.1 fvdl
713 1.1 fvdl
714 1.1 fvdl static void
715 1.1 fvdl ex_txstat(sc)
716 1.1 fvdl struct ex_softc *sc;
717 1.1 fvdl {
718 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
719 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
720 1.1 fvdl int i;
721 1.1 fvdl
722 1.1 fvdl /*
723 1.1 fvdl * We need to read+write TX_STATUS until we get a 0 status
724 1.1 fvdl * in order to turn off the interrupt flag.
725 1.1 fvdl */
726 1.1 fvdl while ((i = bus_space_read_1(iot, ioh, ELINK_TXSTATUS)) & TXS_COMPLETE) {
727 1.1 fvdl bus_space_write_1(iot, ioh, ELINK_TXSTATUS, 0x0);
728 1.1 fvdl
729 1.1 fvdl if (i & TXS_JABBER) {
730 1.1 fvdl ++sc->sc_ethercom.ec_if.if_oerrors;
731 1.1 fvdl if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG)
732 1.1 fvdl printf("%s: jabber (%x)\n",
733 1.1 fvdl sc->sc_dev.dv_xname, i);
734 1.1 fvdl ex_init(sc);
735 1.1 fvdl /* TODO: be more subtle here */
736 1.1 fvdl } else if (i & TXS_UNDERRUN) {
737 1.1 fvdl ++sc->sc_ethercom.ec_if.if_oerrors;
738 1.1 fvdl if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG)
739 1.1 fvdl printf("%s: fifo underrun (%x) @%d\n",
740 1.1 fvdl sc->sc_dev.dv_xname, i,
741 1.1 fvdl sc->tx_start_thresh);
742 1.1 fvdl if (sc->tx_succ_ok < 100)
743 1.1 fvdl sc->tx_start_thresh = min(ETHER_MAX_LEN,
744 1.1 fvdl sc->tx_start_thresh + 20);
745 1.1 fvdl sc->tx_succ_ok = 0;
746 1.1 fvdl ex_init(sc);
747 1.1 fvdl /* TODO: be more subtle here */
748 1.1 fvdl } else if (i & TXS_MAX_COLLISION) {
749 1.1 fvdl ++sc->sc_ethercom.ec_if.if_collisions;
750 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE);
751 1.1 fvdl sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE;
752 1.1 fvdl } else
753 1.1 fvdl sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127;
754 1.1 fvdl }
755 1.1 fvdl }
756 1.1 fvdl
757 1.1 fvdl int
758 1.1 fvdl ex_media_chg(ifp)
759 1.1 fvdl struct ifnet *ifp;
760 1.1 fvdl {
761 1.1 fvdl struct ex_softc *sc = ifp->if_softc;
762 1.1 fvdl
763 1.1 fvdl if (ifp->if_flags & IFF_UP)
764 1.1 fvdl ex_init(sc);
765 1.1 fvdl return 0;
766 1.1 fvdl }
767 1.1 fvdl
768 1.1 fvdl void
769 1.1 fvdl ex_set_media(sc)
770 1.1 fvdl struct ex_softc *sc;
771 1.1 fvdl {
772 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
773 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
774 1.37 haya u_int32_t configreg;
775 1.1 fvdl
776 1.1 fvdl if (((sc->ex_conf & EX_CONF_MII) &&
777 1.1 fvdl (sc->ex_mii.mii_media_active & IFM_FDX))
778 1.1 fvdl || (!(sc->ex_conf & EX_CONF_MII) &&
779 1.1 fvdl (sc->ex_mii.mii_media.ifm_media & IFM_FDX))) {
780 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL,
781 1.1 fvdl MAC_CONTROL_FDX);
782 1.1 fvdl } else {
783 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 0);
784 1.1 fvdl }
785 1.1 fvdl
786 1.1 fvdl /*
787 1.1 fvdl * If the device has MII, select it, and then tell the
788 1.1 fvdl * PHY which media to use.
789 1.1 fvdl */
790 1.1 fvdl if (sc->ex_conf & EX_CONF_MII) {
791 1.1 fvdl GO_WINDOW(3);
792 1.1 fvdl
793 1.37 haya configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG);
794 1.1 fvdl
795 1.37 haya configreg &= ~(CONFIG_MEDIAMASK << 16);
796 1.37 haya configreg |= (ELINKMEDIA_MII << (CONFIG_MEDIAMASK_SHIFT + 16));
797 1.1 fvdl
798 1.37 haya bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg);
799 1.1 fvdl mii_mediachg(&sc->ex_mii);
800 1.1 fvdl return;
801 1.1 fvdl }
802 1.1 fvdl
803 1.1 fvdl GO_WINDOW(4);
804 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0);
805 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER);
806 1.1 fvdl delay(800);
807 1.1 fvdl
808 1.1 fvdl /*
809 1.1 fvdl * Now turn on the selected media/transceiver.
810 1.1 fvdl */
811 1.1 fvdl switch (IFM_SUBTYPE(sc->ex_mii.mii_media.ifm_cur->ifm_media)) {
812 1.1 fvdl case IFM_10_T:
813 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE,
814 1.1 fvdl JABBER_GUARD_ENABLE|LINKBEAT_ENABLE);
815 1.1 fvdl break;
816 1.1 fvdl
817 1.1 fvdl case IFM_10_2:
818 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER);
819 1.1 fvdl DELAY(800);
820 1.1 fvdl break;
821 1.1 fvdl
822 1.1 fvdl case IFM_100_TX:
823 1.1 fvdl case IFM_100_FX:
824 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE,
825 1.1 fvdl LINKBEAT_ENABLE);
826 1.1 fvdl DELAY(800);
827 1.1 fvdl break;
828 1.1 fvdl
829 1.1 fvdl case IFM_10_5:
830 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE,
831 1.1 fvdl SQE_ENABLE);
832 1.1 fvdl DELAY(800);
833 1.1 fvdl break;
834 1.1 fvdl
835 1.1 fvdl case IFM_MANUAL:
836 1.1 fvdl break;
837 1.1 fvdl
838 1.1 fvdl case IFM_NONE:
839 1.1 fvdl return;
840 1.1 fvdl
841 1.1 fvdl default:
842 1.1 fvdl panic("ex_set_media: impossible");
843 1.1 fvdl }
844 1.1 fvdl
845 1.1 fvdl GO_WINDOW(3);
846 1.37 haya configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG);
847 1.1 fvdl
848 1.37 haya configreg &= ~(CONFIG_MEDIAMASK << 16);
849 1.37 haya configreg |= (sc->ex_mii.mii_media.ifm_cur->ifm_data <<
850 1.37 haya (CONFIG_MEDIAMASK_SHIFT + 16));
851 1.1 fvdl
852 1.37 haya bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg);
853 1.1 fvdl }
854 1.1 fvdl
855 1.1 fvdl /*
856 1.1 fvdl * Get currently-selected media from card.
857 1.1 fvdl * (if_media callback, may be called before interface is brought up).
858 1.1 fvdl */
859 1.1 fvdl void
860 1.1 fvdl ex_media_stat(ifp, req)
861 1.1 fvdl struct ifnet *ifp;
862 1.1 fvdl struct ifmediareq *req;
863 1.1 fvdl {
864 1.1 fvdl struct ex_softc *sc = ifp->if_softc;
865 1.1 fvdl
866 1.1 fvdl if (sc->ex_conf & EX_CONF_MII) {
867 1.1 fvdl mii_pollstat(&sc->ex_mii);
868 1.1 fvdl req->ifm_status = sc->ex_mii.mii_media_status;
869 1.1 fvdl req->ifm_active = sc->ex_mii.mii_media_active;
870 1.1 fvdl } else {
871 1.1 fvdl GO_WINDOW(4);
872 1.1 fvdl req->ifm_status = IFM_AVALID;
873 1.1 fvdl req->ifm_active = sc->ex_mii.mii_media.ifm_cur->ifm_media;
874 1.1 fvdl if (bus_space_read_2(sc->sc_iot, sc->sc_ioh,
875 1.1 fvdl ELINK_W4_MEDIA_TYPE) & LINKBEAT_DETECT)
876 1.1 fvdl req->ifm_status |= IFM_ACTIVE;
877 1.1 fvdl GO_WINDOW(1);
878 1.1 fvdl }
879 1.1 fvdl }
880 1.1 fvdl
881 1.1 fvdl
882 1.1 fvdl
883 1.1 fvdl /*
884 1.1 fvdl * Start outputting on the interface.
885 1.1 fvdl */
886 1.1 fvdl static void
887 1.1 fvdl ex_start(ifp)
888 1.1 fvdl struct ifnet *ifp;
889 1.1 fvdl {
890 1.1 fvdl struct ex_softc *sc = ifp->if_softc;
891 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
892 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
893 1.1 fvdl volatile struct ex_fraghdr *fr = NULL;
894 1.1 fvdl volatile struct ex_dpd *dpd = NULL, *prevdpd = NULL;
895 1.1 fvdl struct ex_txdesc *txp;
896 1.1 fvdl bus_dmamap_t dmamap;
897 1.1 fvdl int offset, totlen;
898 1.1 fvdl
899 1.1 fvdl if (sc->tx_head || sc->tx_free == NULL)
900 1.1 fvdl return;
901 1.1 fvdl
902 1.1 fvdl txp = NULL;
903 1.1 fvdl
904 1.1 fvdl /*
905 1.1 fvdl * We're finished if there is nothing more to add to the list or if
906 1.1 fvdl * we're all filled up with buffers to transmit.
907 1.1 fvdl */
908 1.1 fvdl while (ifp->if_snd.ifq_head != NULL && sc->tx_free != NULL) {
909 1.1 fvdl struct mbuf *mb_head;
910 1.1 fvdl int segment, error;
911 1.1 fvdl
912 1.1 fvdl /*
913 1.1 fvdl * Grab a packet to transmit.
914 1.1 fvdl */
915 1.1 fvdl IF_DEQUEUE(&ifp->if_snd, mb_head);
916 1.1 fvdl
917 1.1 fvdl /*
918 1.1 fvdl * Get pointer to next available tx desc.
919 1.1 fvdl */
920 1.1 fvdl txp = sc->tx_free;
921 1.1 fvdl sc->tx_free = txp->tx_next;
922 1.1 fvdl txp->tx_next = NULL;
923 1.1 fvdl dmamap = txp->tx_dmamap;
924 1.1 fvdl
925 1.1 fvdl /*
926 1.1 fvdl * Go through each of the mbufs in the chain and initialize
927 1.1 fvdl * the transmit buffer descriptors with the physical address
928 1.1 fvdl * and size of the mbuf.
929 1.1 fvdl */
930 1.1 fvdl reload:
931 1.1 fvdl error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap,
932 1.1 fvdl mb_head, BUS_DMA_NOWAIT);
933 1.1 fvdl switch (error) {
934 1.1 fvdl case 0:
935 1.1 fvdl /* Success. */
936 1.1 fvdl break;
937 1.1 fvdl
938 1.1 fvdl case EFBIG:
939 1.1 fvdl {
940 1.1 fvdl struct mbuf *mn;
941 1.1 fvdl
942 1.1 fvdl /*
943 1.1 fvdl * We ran out of segments. We have to recopy this
944 1.1 fvdl * mbuf chain first. Bail out if we can't get the
945 1.1 fvdl * new buffers.
946 1.1 fvdl */
947 1.1 fvdl printf("%s: too many segments, ", sc->sc_dev.dv_xname);
948 1.1 fvdl
949 1.1 fvdl MGETHDR(mn, M_DONTWAIT, MT_DATA);
950 1.1 fvdl if (mn == NULL) {
951 1.1 fvdl m_freem(mb_head);
952 1.1 fvdl printf("aborting\n");
953 1.1 fvdl goto out;
954 1.1 fvdl }
955 1.1 fvdl if (mb_head->m_pkthdr.len > MHLEN) {
956 1.1 fvdl MCLGET(mn, M_DONTWAIT);
957 1.1 fvdl if ((mn->m_flags & M_EXT) == 0) {
958 1.1 fvdl m_freem(mn);
959 1.1 fvdl m_freem(mb_head);
960 1.1 fvdl printf("aborting\n");
961 1.1 fvdl goto out;
962 1.1 fvdl }
963 1.1 fvdl }
964 1.1 fvdl m_copydata(mb_head, 0, mb_head->m_pkthdr.len,
965 1.1 fvdl mtod(mn, caddr_t));
966 1.1 fvdl mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len;
967 1.1 fvdl m_freem(mb_head);
968 1.1 fvdl mb_head = mn;
969 1.1 fvdl printf("retrying\n");
970 1.1 fvdl goto reload;
971 1.1 fvdl }
972 1.1 fvdl
973 1.1 fvdl default:
974 1.1 fvdl /*
975 1.1 fvdl * Some other problem; report it.
976 1.1 fvdl */
977 1.1 fvdl printf("%s: can't load mbuf chain, error = %d\n",
978 1.1 fvdl sc->sc_dev.dv_xname, error);
979 1.1 fvdl m_freem(mb_head);
980 1.1 fvdl goto out;
981 1.1 fvdl }
982 1.1 fvdl
983 1.1 fvdl fr = &txp->tx_dpd->dpd_frags[0];
984 1.1 fvdl totlen = 0;
985 1.1 fvdl for (segment = 0; segment < dmamap->dm_nsegs; segment++, fr++) {
986 1.21 thorpej fr->fr_addr = htole32(dmamap->dm_segs[segment].ds_addr);
987 1.21 thorpej fr->fr_len = htole32(dmamap->dm_segs[segment].ds_len);
988 1.9 thorpej totlen += dmamap->dm_segs[segment].ds_len;
989 1.1 fvdl }
990 1.1 fvdl fr--;
991 1.21 thorpej fr->fr_len |= htole32(EX_FR_LAST);
992 1.1 fvdl txp->tx_mbhead = mb_head;
993 1.1 fvdl
994 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize,
995 1.1 fvdl BUS_DMASYNC_PREWRITE);
996 1.1 fvdl
997 1.1 fvdl dpd = txp->tx_dpd;
998 1.1 fvdl dpd->dpd_nextptr = 0;
999 1.21 thorpej dpd->dpd_fsh = htole32(totlen);
1000 1.1 fvdl
1001 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1002 1.1 fvdl ((caddr_t)dpd - (caddr_t)sc->sc_dpd),
1003 1.1 fvdl sizeof (struct ex_dpd),
1004 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1005 1.1 fvdl
1006 1.1 fvdl /*
1007 1.1 fvdl * No need to stall the download engine, we know it's
1008 1.1 fvdl * not busy right now.
1009 1.1 fvdl *
1010 1.1 fvdl * Fix up pointers in both the "soft" tx and the physical
1011 1.1 fvdl * tx list.
1012 1.1 fvdl */
1013 1.1 fvdl if (sc->tx_head != NULL) {
1014 1.1 fvdl prevdpd = sc->tx_tail->tx_dpd;
1015 1.1 fvdl offset = ((caddr_t)prevdpd - (caddr_t)sc->sc_dpd);
1016 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1017 1.1 fvdl offset, sizeof (struct ex_dpd),
1018 1.1 fvdl BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1019 1.21 thorpej prevdpd->dpd_nextptr = htole32(DPD_DMADDR(sc, txp));
1020 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1021 1.1 fvdl offset, sizeof (struct ex_dpd),
1022 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1023 1.1 fvdl sc->tx_tail->tx_next = txp;
1024 1.1 fvdl sc->tx_tail = txp;
1025 1.1 fvdl } else {
1026 1.1 fvdl sc->tx_tail = sc->tx_head = txp;
1027 1.1 fvdl }
1028 1.1 fvdl
1029 1.1 fvdl #if NBPFILTER > 0
1030 1.1 fvdl /*
1031 1.1 fvdl * Pass packet to bpf if there is a listener.
1032 1.1 fvdl */
1033 1.1 fvdl if (ifp->if_bpf)
1034 1.1 fvdl bpf_mtap(ifp->if_bpf, mb_head);
1035 1.1 fvdl #endif
1036 1.1 fvdl }
1037 1.1 fvdl out:
1038 1.1 fvdl if (sc->tx_head) {
1039 1.21 thorpej sc->tx_tail->tx_dpd->dpd_fsh |= htole32(EX_DPD_DNIND);
1040 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1041 1.1 fvdl ((caddr_t)sc->tx_tail->tx_dpd - (caddr_t)sc->sc_dpd),
1042 1.1 fvdl sizeof (struct ex_dpd),
1043 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1044 1.1 fvdl ifp->if_flags |= IFF_OACTIVE;
1045 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_DNUNSTALL);
1046 1.1 fvdl bus_space_write_4(iot, ioh, ELINK_DNLISTPTR,
1047 1.1 fvdl DPD_DMADDR(sc, sc->tx_head));
1048 1.3 drochner
1049 1.3 drochner /* trigger watchdog */
1050 1.3 drochner ifp->if_timer = 5;
1051 1.1 fvdl }
1052 1.1 fvdl }
1053 1.1 fvdl
1054 1.1 fvdl
1055 1.1 fvdl int
1056 1.1 fvdl ex_intr(arg)
1057 1.1 fvdl void *arg;
1058 1.1 fvdl {
1059 1.1 fvdl struct ex_softc *sc = arg;
1060 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1061 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1062 1.1 fvdl u_int16_t stat;
1063 1.1 fvdl int ret = 0;
1064 1.1 fvdl struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1065 1.1 fvdl
1066 1.28 enami if (sc->enabled == 0 ||
1067 1.28 enami (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0)
1068 1.28 enami return (0);
1069 1.28 enami
1070 1.1 fvdl for (;;) {
1071 1.22 mycroft bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH);
1072 1.22 mycroft
1073 1.1 fvdl stat = bus_space_read_2(iot, ioh, ELINK_STATUS);
1074 1.22 mycroft
1075 1.22 mycroft if ((stat & S_MASK) == 0) {
1076 1.22 mycroft if ((stat & S_INTR_LATCH) == 0) {
1077 1.22 mycroft #if 0
1078 1.22 mycroft printf("%s: intr latch cleared\n",
1079 1.22 mycroft sc->sc_dev.dv_xname);
1080 1.22 mycroft #endif
1081 1.22 mycroft break;
1082 1.22 mycroft }
1083 1.22 mycroft }
1084 1.22 mycroft
1085 1.22 mycroft ret = 1;
1086 1.22 mycroft
1087 1.1 fvdl /*
1088 1.1 fvdl * Acknowledge interrupts.
1089 1.1 fvdl */
1090 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR |
1091 1.22 mycroft (stat & S_MASK));
1092 1.15 haya if (sc->intr_ack)
1093 1.22 mycroft (*sc->intr_ack)(sc);
1094 1.22 mycroft
1095 1.1 fvdl if (stat & S_HOST_ERROR) {
1096 1.1 fvdl printf("%s: adapter failure (%x)\n",
1097 1.1 fvdl sc->sc_dev.dv_xname, stat);
1098 1.1 fvdl ex_reset(sc);
1099 1.1 fvdl ex_init(sc);
1100 1.1 fvdl return 1;
1101 1.1 fvdl }
1102 1.1 fvdl if (stat & S_TX_COMPLETE) {
1103 1.1 fvdl ex_txstat(sc);
1104 1.1 fvdl }
1105 1.1 fvdl if (stat & S_UPD_STATS) {
1106 1.1 fvdl ex_getstats(sc);
1107 1.1 fvdl }
1108 1.1 fvdl if (stat & S_DN_COMPLETE) {
1109 1.1 fvdl struct ex_txdesc *txp, *ptxp = NULL;
1110 1.1 fvdl bus_dmamap_t txmap;
1111 1.3 drochner
1112 1.3 drochner /* reset watchdog timer, was set in ex_start() */
1113 1.3 drochner ifp->if_timer = 0;
1114 1.3 drochner
1115 1.1 fvdl for (txp = sc->tx_head; txp != NULL;
1116 1.1 fvdl txp = txp->tx_next) {
1117 1.1 fvdl bus_dmamap_sync(sc->sc_dmat,
1118 1.1 fvdl sc->sc_dpd_dmamap,
1119 1.1 fvdl (caddr_t)txp->tx_dpd - (caddr_t)sc->sc_dpd,
1120 1.1 fvdl sizeof (struct ex_dpd),
1121 1.1 fvdl BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1122 1.1 fvdl if (txp->tx_mbhead != NULL) {
1123 1.1 fvdl txmap = txp->tx_dmamap;
1124 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, txmap,
1125 1.1 fvdl 0, txmap->dm_mapsize,
1126 1.1 fvdl BUS_DMASYNC_POSTWRITE);
1127 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, txmap);
1128 1.1 fvdl m_freem(txp->tx_mbhead);
1129 1.1 fvdl txp->tx_mbhead = NULL;
1130 1.1 fvdl }
1131 1.1 fvdl ptxp = txp;
1132 1.1 fvdl }
1133 1.1 fvdl
1134 1.1 fvdl /*
1135 1.1 fvdl * Move finished tx buffers back to the tx free list.
1136 1.1 fvdl */
1137 1.1 fvdl if (sc->tx_free) {
1138 1.1 fvdl sc->tx_ftail->tx_next = sc->tx_head;
1139 1.1 fvdl sc->tx_ftail = ptxp;
1140 1.1 fvdl } else
1141 1.1 fvdl sc->tx_ftail = sc->tx_free = sc->tx_head;
1142 1.1 fvdl
1143 1.1 fvdl sc->tx_head = sc->tx_tail = NULL;
1144 1.1 fvdl ifp->if_flags &= ~IFF_OACTIVE;
1145 1.1 fvdl }
1146 1.1 fvdl
1147 1.1 fvdl if (stat & S_UP_COMPLETE) {
1148 1.1 fvdl struct ex_rxdesc *rxd;
1149 1.1 fvdl struct mbuf *m;
1150 1.1 fvdl struct ex_upd *upd;
1151 1.1 fvdl bus_dmamap_t rxmap;
1152 1.1 fvdl u_int32_t pktstat;
1153 1.1 fvdl
1154 1.1 fvdl rcvloop:
1155 1.1 fvdl rxd = sc->rx_head;
1156 1.1 fvdl rxmap = rxd->rx_dmamap;
1157 1.1 fvdl m = rxd->rx_mbhead;
1158 1.1 fvdl upd = rxd->rx_upd;
1159 1.1 fvdl
1160 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, rxmap, 0,
1161 1.1 fvdl rxmap->dm_mapsize,
1162 1.1 fvdl BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1163 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap,
1164 1.1 fvdl ((caddr_t)upd - (caddr_t)sc->sc_upd),
1165 1.1 fvdl sizeof (struct ex_upd),
1166 1.1 fvdl BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1167 1.32 tsutsui pktstat = le32toh(upd->upd_pktstatus);
1168 1.1 fvdl
1169 1.1 fvdl if (pktstat & EX_UPD_COMPLETE) {
1170 1.1 fvdl /*
1171 1.1 fvdl * Remove first packet from the chain.
1172 1.1 fvdl */
1173 1.1 fvdl sc->rx_head = rxd->rx_next;
1174 1.1 fvdl rxd->rx_next = NULL;
1175 1.1 fvdl
1176 1.1 fvdl /*
1177 1.1 fvdl * Add a new buffer to the receive chain.
1178 1.1 fvdl * If this fails, the old buffer is recycled
1179 1.1 fvdl * instead.
1180 1.1 fvdl */
1181 1.1 fvdl if (ex_add_rxbuf(sc, rxd) == 0) {
1182 1.1 fvdl struct ether_header *eh;
1183 1.1 fvdl u_int16_t total_len;
1184 1.1 fvdl
1185 1.1 fvdl
1186 1.1 fvdl if (pktstat & EX_UPD_ERR) {
1187 1.1 fvdl ifp->if_ierrors++;
1188 1.1 fvdl m_freem(m);
1189 1.1 fvdl goto rcvloop;
1190 1.1 fvdl }
1191 1.1 fvdl
1192 1.1 fvdl total_len = pktstat & EX_UPD_PKTLENMASK;
1193 1.1 fvdl if (total_len <
1194 1.1 fvdl sizeof(struct ether_header)) {
1195 1.1 fvdl m_freem(m);
1196 1.1 fvdl goto rcvloop;
1197 1.1 fvdl }
1198 1.1 fvdl m->m_pkthdr.rcvif = ifp;
1199 1.13 thorpej m->m_pkthdr.len = m->m_len = total_len;
1200 1.1 fvdl eh = mtod(m, struct ether_header *);
1201 1.1 fvdl #if NBPFILTER > 0
1202 1.1 fvdl if (ifp->if_bpf) {
1203 1.1 fvdl bpf_tap(ifp->if_bpf,
1204 1.1 fvdl mtod(m, caddr_t),
1205 1.1 fvdl total_len);
1206 1.1 fvdl /*
1207 1.1 fvdl * Only pass this packet up
1208 1.1 fvdl * if it is for us.
1209 1.1 fvdl */
1210 1.1 fvdl if ((ifp->if_flags &
1211 1.1 fvdl IFF_PROMISC) &&
1212 1.1 fvdl (eh->ether_dhost[0] & 1)
1213 1.1 fvdl == 0 &&
1214 1.1 fvdl bcmp(eh->ether_dhost,
1215 1.1 fvdl LLADDR(ifp->if_sadl),
1216 1.1 fvdl sizeof(eh->ether_dhost))
1217 1.1 fvdl != 0) {
1218 1.1 fvdl m_freem(m);
1219 1.1 fvdl goto rcvloop;
1220 1.1 fvdl }
1221 1.1 fvdl }
1222 1.1 fvdl #endif /* NBPFILTER > 0 */
1223 1.13 thorpej (*ifp->if_input)(ifp, m);
1224 1.1 fvdl }
1225 1.1 fvdl goto rcvloop;
1226 1.1 fvdl }
1227 1.1 fvdl /*
1228 1.1 fvdl * Just in case we filled up all UPDs and the DMA engine
1229 1.3 drochner * stalled. We could be more subtle about this.
1230 1.1 fvdl */
1231 1.3 drochner if (bus_space_read_4(iot, ioh, ELINK_UPLISTPTR) == 0) {
1232 1.3 drochner printf("%s: uplistptr was 0\n",
1233 1.3 drochner sc->sc_dev.dv_xname);
1234 1.3 drochner ex_init(sc);
1235 1.3 drochner } else if (bus_space_read_4(iot, ioh, ELINK_UPPKTSTATUS)
1236 1.3 drochner & 0x2000) {
1237 1.3 drochner printf("%s: receive stalled\n",
1238 1.3 drochner sc->sc_dev.dv_xname);
1239 1.3 drochner bus_space_write_2(iot, ioh, ELINK_COMMAND,
1240 1.3 drochner ELINK_UPUNSTALL);
1241 1.3 drochner }
1242 1.1 fvdl }
1243 1.1 fvdl }
1244 1.22 mycroft
1245 1.22 mycroft /* no more interrupts */
1246 1.22 mycroft if (ret && ifp->if_snd.ifq_head)
1247 1.22 mycroft ex_start(ifp);
1248 1.1 fvdl return ret;
1249 1.1 fvdl }
1250 1.1 fvdl
1251 1.1 fvdl int
1252 1.1 fvdl ex_ioctl(ifp, cmd, data)
1253 1.31 augustss struct ifnet *ifp;
1254 1.1 fvdl u_long cmd;
1255 1.1 fvdl caddr_t data;
1256 1.1 fvdl {
1257 1.1 fvdl struct ex_softc *sc = ifp->if_softc;
1258 1.1 fvdl struct ifaddr *ifa = (struct ifaddr *)data;
1259 1.1 fvdl struct ifreq *ifr = (struct ifreq *)data;
1260 1.1 fvdl int s, error = 0;
1261 1.1 fvdl
1262 1.1 fvdl s = splnet();
1263 1.1 fvdl
1264 1.1 fvdl switch (cmd) {
1265 1.1 fvdl
1266 1.1 fvdl case SIOCSIFADDR:
1267 1.1 fvdl ifp->if_flags |= IFF_UP;
1268 1.1 fvdl switch (ifa->ifa_addr->sa_family) {
1269 1.1 fvdl #ifdef INET
1270 1.1 fvdl case AF_INET:
1271 1.1 fvdl ex_init(sc);
1272 1.1 fvdl arp_ifinit(&sc->sc_ethercom.ec_if, ifa);
1273 1.1 fvdl break;
1274 1.1 fvdl #endif
1275 1.1 fvdl #ifdef NS
1276 1.1 fvdl case AF_NS:
1277 1.1 fvdl {
1278 1.31 augustss struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
1279 1.1 fvdl
1280 1.1 fvdl if (ns_nullhost(*ina))
1281 1.1 fvdl ina->x_host = *(union ns_host *)
1282 1.1 fvdl LLADDR(ifp->if_sadl);
1283 1.1 fvdl else
1284 1.1 fvdl bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl),
1285 1.1 fvdl ifp->if_addrlen);
1286 1.1 fvdl /* Set new address. */
1287 1.1 fvdl ex_init(sc);
1288 1.1 fvdl break;
1289 1.1 fvdl }
1290 1.1 fvdl #endif
1291 1.1 fvdl default:
1292 1.1 fvdl ex_init(sc);
1293 1.1 fvdl break;
1294 1.1 fvdl }
1295 1.1 fvdl break;
1296 1.1 fvdl case SIOCSIFMEDIA:
1297 1.1 fvdl case SIOCGIFMEDIA:
1298 1.1 fvdl error = ifmedia_ioctl(ifp, ifr, &sc->ex_mii.mii_media, cmd);
1299 1.1 fvdl break;
1300 1.1 fvdl
1301 1.1 fvdl case SIOCSIFFLAGS:
1302 1.1 fvdl if ((ifp->if_flags & IFF_UP) == 0 &&
1303 1.1 fvdl (ifp->if_flags & IFF_RUNNING) != 0) {
1304 1.1 fvdl /*
1305 1.1 fvdl * If interface is marked down and it is running, then
1306 1.1 fvdl * stop it.
1307 1.1 fvdl */
1308 1.1 fvdl ex_stop(sc);
1309 1.1 fvdl ifp->if_flags &= ~IFF_RUNNING;
1310 1.1 fvdl } else if ((ifp->if_flags & IFF_UP) != 0 &&
1311 1.1 fvdl (ifp->if_flags & IFF_RUNNING) == 0) {
1312 1.1 fvdl /*
1313 1.1 fvdl * If interface is marked up and it is stopped, then
1314 1.1 fvdl * start it.
1315 1.1 fvdl */
1316 1.1 fvdl ex_init(sc);
1317 1.4 thorpej } else if ((ifp->if_flags & IFF_UP) != 0) {
1318 1.4 thorpej /*
1319 1.4 thorpej * Deal with other flags that change hardware
1320 1.4 thorpej * state, i.e. IFF_PROMISC.
1321 1.4 thorpej */
1322 1.1 fvdl ex_set_mc(sc);
1323 1.4 thorpej }
1324 1.1 fvdl break;
1325 1.1 fvdl
1326 1.1 fvdl case SIOCADDMULTI:
1327 1.1 fvdl case SIOCDELMULTI:
1328 1.1 fvdl error = (cmd == SIOCADDMULTI) ?
1329 1.1 fvdl ether_addmulti(ifr, &sc->sc_ethercom) :
1330 1.1 fvdl ether_delmulti(ifr, &sc->sc_ethercom);
1331 1.1 fvdl
1332 1.1 fvdl if (error == ENETRESET) {
1333 1.1 fvdl /*
1334 1.1 fvdl * Multicast list has changed; set the hardware filter
1335 1.1 fvdl * accordingly.
1336 1.1 fvdl */
1337 1.1 fvdl ex_set_mc(sc);
1338 1.1 fvdl error = 0;
1339 1.1 fvdl }
1340 1.1 fvdl break;
1341 1.1 fvdl
1342 1.1 fvdl default:
1343 1.1 fvdl error = EINVAL;
1344 1.1 fvdl break;
1345 1.1 fvdl }
1346 1.1 fvdl
1347 1.1 fvdl splx(s);
1348 1.1 fvdl return (error);
1349 1.1 fvdl }
1350 1.1 fvdl
1351 1.1 fvdl void
1352 1.1 fvdl ex_getstats(sc)
1353 1.1 fvdl struct ex_softc *sc;
1354 1.1 fvdl {
1355 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1356 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1357 1.1 fvdl struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1358 1.1 fvdl u_int8_t upperok;
1359 1.1 fvdl
1360 1.1 fvdl GO_WINDOW(6);
1361 1.1 fvdl upperok = bus_space_read_1(iot, ioh, UPPER_FRAMES_OK);
1362 1.1 fvdl ifp->if_ipackets += bus_space_read_1(iot, ioh, RX_FRAMES_OK);
1363 1.1 fvdl ifp->if_ipackets += (upperok & 0x03) << 8;
1364 1.1 fvdl ifp->if_opackets += bus_space_read_1(iot, ioh, TX_FRAMES_OK);
1365 1.1 fvdl ifp->if_opackets += (upperok & 0x30) << 4;
1366 1.1 fvdl ifp->if_ierrors += bus_space_read_1(iot, ioh, RX_OVERRUNS);
1367 1.1 fvdl ifp->if_collisions += bus_space_read_1(iot, ioh, TX_COLLISIONS);
1368 1.1 fvdl /*
1369 1.1 fvdl * There seems to be no way to get the exact number of collisions,
1370 1.1 fvdl * this is the number that occured at the very least.
1371 1.1 fvdl */
1372 1.1 fvdl ifp->if_collisions += 2 * bus_space_read_1(iot, ioh,
1373 1.1 fvdl TX_AFTER_X_COLLISIONS);
1374 1.1 fvdl ifp->if_ibytes += bus_space_read_2(iot, ioh, RX_TOTAL_OK);
1375 1.1 fvdl ifp->if_obytes += bus_space_read_2(iot, ioh, TX_TOTAL_OK);
1376 1.1 fvdl
1377 1.1 fvdl /*
1378 1.1 fvdl * Clear the following to avoid stats overflow interrupts
1379 1.1 fvdl */
1380 1.12 drochner bus_space_read_1(iot, ioh, TX_DEFERRALS);
1381 1.1 fvdl bus_space_read_1(iot, ioh, TX_AFTER_1_COLLISION);
1382 1.1 fvdl bus_space_read_1(iot, ioh, TX_NO_SQE);
1383 1.1 fvdl bus_space_read_1(iot, ioh, TX_CD_LOST);
1384 1.1 fvdl GO_WINDOW(4);
1385 1.1 fvdl bus_space_read_1(iot, ioh, ELINK_W4_BADSSD);
1386 1.1 fvdl upperok = bus_space_read_1(iot, ioh, ELINK_W4_UBYTESOK);
1387 1.1 fvdl ifp->if_ibytes += (upperok & 0x0f) << 16;
1388 1.1 fvdl ifp->if_obytes += (upperok & 0xf0) << 12;
1389 1.1 fvdl GO_WINDOW(1);
1390 1.1 fvdl }
1391 1.1 fvdl
1392 1.1 fvdl void
1393 1.1 fvdl ex_printstats(sc)
1394 1.1 fvdl struct ex_softc *sc;
1395 1.1 fvdl {
1396 1.1 fvdl struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1397 1.1 fvdl
1398 1.1 fvdl ex_getstats(sc);
1399 1.20 bouyer printf("in %llu out %llu ierror %llu oerror %llu ibytes %llu obytes "
1400 1.20 bouyer "%llu\n", (unsigned long long)ifp->if_ipackets,
1401 1.20 bouyer (unsigned long long)ifp->if_opackets,
1402 1.20 bouyer (unsigned long long)ifp->if_ierrors,
1403 1.20 bouyer (unsigned long long)ifp->if_oerrors,
1404 1.20 bouyer (unsigned long long)ifp->if_ibytes,
1405 1.20 bouyer (unsigned long long)ifp->if_obytes);
1406 1.1 fvdl }
1407 1.1 fvdl
1408 1.1 fvdl void
1409 1.1 fvdl ex_tick(arg)
1410 1.1 fvdl void *arg;
1411 1.1 fvdl {
1412 1.1 fvdl struct ex_softc *sc = arg;
1413 1.28 enami int s;
1414 1.28 enami
1415 1.28 enami if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0)
1416 1.28 enami return;
1417 1.28 enami
1418 1.28 enami s = splnet();
1419 1.1 fvdl
1420 1.1 fvdl if (sc->ex_conf & EX_CONF_MII)
1421 1.1 fvdl mii_tick(&sc->ex_mii);
1422 1.1 fvdl
1423 1.1 fvdl if (!(bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, ELINK_STATUS)
1424 1.1 fvdl & S_COMMAND_IN_PROGRESS))
1425 1.1 fvdl ex_getstats(sc);
1426 1.1 fvdl
1427 1.1 fvdl splx(s);
1428 1.1 fvdl
1429 1.30 thorpej callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc);
1430 1.1 fvdl }
1431 1.1 fvdl
1432 1.1 fvdl void
1433 1.1 fvdl ex_reset(sc)
1434 1.1 fvdl struct ex_softc *sc;
1435 1.1 fvdl {
1436 1.1 fvdl bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, GLOBAL_RESET);
1437 1.10 dean delay(400);
1438 1.1 fvdl ex_waitcmd(sc);
1439 1.1 fvdl }
1440 1.1 fvdl
1441 1.1 fvdl void
1442 1.1 fvdl ex_watchdog(ifp)
1443 1.1 fvdl struct ifnet *ifp;
1444 1.1 fvdl {
1445 1.1 fvdl struct ex_softc *sc = ifp->if_softc;
1446 1.1 fvdl
1447 1.1 fvdl log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
1448 1.1 fvdl ++sc->sc_ethercom.ec_if.if_oerrors;
1449 1.1 fvdl
1450 1.1 fvdl ex_reset(sc);
1451 1.1 fvdl ex_init(sc);
1452 1.1 fvdl }
1453 1.1 fvdl
1454 1.1 fvdl void
1455 1.1 fvdl ex_stop(sc)
1456 1.1 fvdl struct ex_softc *sc;
1457 1.1 fvdl {
1458 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1459 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1460 1.1 fvdl struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1461 1.1 fvdl struct ex_txdesc *tx;
1462 1.1 fvdl struct ex_rxdesc *rx;
1463 1.1 fvdl int i;
1464 1.1 fvdl
1465 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE);
1466 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE);
1467 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER);
1468 1.1 fvdl
1469 1.1 fvdl for (tx = sc->tx_head ; tx != NULL; tx = tx->tx_next) {
1470 1.1 fvdl if (tx->tx_mbhead == NULL)
1471 1.1 fvdl continue;
1472 1.1 fvdl m_freem(tx->tx_mbhead);
1473 1.1 fvdl tx->tx_mbhead = NULL;
1474 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, tx->tx_dmamap);
1475 1.1 fvdl tx->tx_dpd->dpd_fsh = tx->tx_dpd->dpd_nextptr = 0;
1476 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1477 1.1 fvdl ((caddr_t)tx->tx_dpd - (caddr_t)sc->sc_dpd),
1478 1.1 fvdl sizeof (struct ex_dpd),
1479 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1480 1.1 fvdl }
1481 1.1 fvdl sc->tx_tail = sc->tx_head = NULL;
1482 1.1 fvdl ex_init_txdescs(sc);
1483 1.1 fvdl
1484 1.1 fvdl sc->rx_tail = sc->rx_head = 0;
1485 1.1 fvdl for (i = 0; i < EX_NUPD; i++) {
1486 1.1 fvdl rx = &sc->sc_rxdescs[i];
1487 1.1 fvdl if (rx->rx_mbhead != NULL) {
1488 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, rx->rx_dmamap);
1489 1.1 fvdl m_freem(rx->rx_mbhead);
1490 1.1 fvdl rx->rx_mbhead = NULL;
1491 1.1 fvdl }
1492 1.1 fvdl ex_add_rxbuf(sc, rx);
1493 1.1 fvdl }
1494 1.1 fvdl
1495 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH);
1496 1.1 fvdl
1497 1.30 thorpej callout_stop(&sc->ex_mii_callout);
1498 1.17 thorpej if (sc->ex_conf & EX_CONF_MII)
1499 1.17 thorpej mii_down(&sc->ex_mii);
1500 1.1 fvdl
1501 1.1 fvdl ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1502 1.1 fvdl ifp->if_timer = 0;
1503 1.1 fvdl }
1504 1.1 fvdl
1505 1.1 fvdl static void
1506 1.1 fvdl ex_init_txdescs(sc)
1507 1.1 fvdl struct ex_softc *sc;
1508 1.1 fvdl {
1509 1.1 fvdl int i;
1510 1.1 fvdl
1511 1.1 fvdl for (i = 0; i < EX_NDPD; i++) {
1512 1.1 fvdl sc->sc_txdescs[i].tx_dmamap = sc->sc_tx_dmamaps[i];
1513 1.1 fvdl sc->sc_txdescs[i].tx_dpd = &sc->sc_dpd[i];
1514 1.1 fvdl if (i < EX_NDPD - 1)
1515 1.1 fvdl sc->sc_txdescs[i].tx_next = &sc->sc_txdescs[i + 1];
1516 1.1 fvdl else
1517 1.1 fvdl sc->sc_txdescs[i].tx_next = NULL;
1518 1.1 fvdl }
1519 1.1 fvdl sc->tx_free = &sc->sc_txdescs[0];
1520 1.1 fvdl sc->tx_ftail = &sc->sc_txdescs[EX_NDPD-1];
1521 1.1 fvdl }
1522 1.1 fvdl
1523 1.25 augustss
1524 1.25 augustss int
1525 1.25 augustss ex_activate(self, act)
1526 1.25 augustss struct device *self;
1527 1.25 augustss enum devact act;
1528 1.25 augustss {
1529 1.25 augustss struct ex_softc *sc = (void *) self;
1530 1.25 augustss int s, error = 0;
1531 1.25 augustss
1532 1.25 augustss s = splnet();
1533 1.25 augustss switch (act) {
1534 1.25 augustss case DVACT_ACTIVATE:
1535 1.25 augustss error = EOPNOTSUPP;
1536 1.25 augustss break;
1537 1.25 augustss
1538 1.25 augustss case DVACT_DEACTIVATE:
1539 1.27 thorpej if (sc->ex_conf & EX_CONF_MII)
1540 1.27 thorpej mii_activate(&sc->ex_mii, act, MII_PHY_ANY,
1541 1.27 thorpej MII_OFFSET_ANY);
1542 1.25 augustss if_deactivate(&sc->sc_ethercom.ec_if);
1543 1.25 augustss break;
1544 1.25 augustss }
1545 1.25 augustss splx(s);
1546 1.25 augustss
1547 1.25 augustss return (error);
1548 1.25 augustss }
1549 1.25 augustss
1550 1.25 augustss int
1551 1.25 augustss ex_detach(sc)
1552 1.25 augustss struct ex_softc *sc;
1553 1.25 augustss {
1554 1.25 augustss struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1555 1.25 augustss struct ex_rxdesc *rxd;
1556 1.25 augustss int i;
1557 1.34 jhawk
1558 1.34 jhawk /* Succeed now if there's no work to do. */
1559 1.34 jhawk if ((sc->ex_flags & EX_FLAGS_ATTACHED) == 0)
1560 1.34 jhawk return (0);
1561 1.25 augustss
1562 1.25 augustss /* Unhook our tick handler. */
1563 1.30 thorpej callout_stop(&sc->ex_mii_callout);
1564 1.25 augustss
1565 1.26 thorpej if (sc->ex_conf & EX_CONF_MII) {
1566 1.26 thorpej /* Detach all PHYs */
1567 1.26 thorpej mii_detach(&sc->ex_mii, MII_PHY_ANY, MII_OFFSET_ANY);
1568 1.26 thorpej }
1569 1.25 augustss
1570 1.25 augustss /* Delete all remaining media. */
1571 1.25 augustss ifmedia_delete_instance(&sc->ex_mii.mii_media, IFM_INST_ANY);
1572 1.25 augustss
1573 1.25 augustss #if NRND > 0
1574 1.25 augustss rnd_detach_source(&sc->rnd_source);
1575 1.25 augustss #endif
1576 1.25 augustss #if NBPFILTER > 0
1577 1.25 augustss bpfdetach(ifp);
1578 1.25 augustss #endif
1579 1.25 augustss ether_ifdetach(ifp);
1580 1.25 augustss if_detach(ifp);
1581 1.25 augustss
1582 1.25 augustss for (i = 0; i < EX_NUPD; i++) {
1583 1.25 augustss rxd = &sc->sc_rxdescs[i];
1584 1.25 augustss if (rxd->rx_mbhead != NULL) {
1585 1.25 augustss bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap);
1586 1.25 augustss m_freem(rxd->rx_mbhead);
1587 1.25 augustss rxd->rx_mbhead = NULL;
1588 1.25 augustss }
1589 1.25 augustss }
1590 1.25 augustss for (i = 0; i < EX_NUPD; i++)
1591 1.25 augustss bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]);
1592 1.25 augustss for (i = 0; i < EX_NDPD; i++)
1593 1.25 augustss bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]);
1594 1.25 augustss bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap);
1595 1.25 augustss bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap);
1596 1.25 augustss bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd,
1597 1.25 augustss EX_NDPD * sizeof (struct ex_dpd));
1598 1.25 augustss bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg);
1599 1.25 augustss bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap);
1600 1.25 augustss bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap);
1601 1.25 augustss bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd,
1602 1.25 augustss EX_NUPD * sizeof (struct ex_upd));
1603 1.25 augustss bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg);
1604 1.25 augustss
1605 1.25 augustss shutdownhook_disestablish(sc->sc_sdhook);
1606 1.25 augustss
1607 1.25 augustss return (0);
1608 1.25 augustss }
1609 1.1 fvdl
1610 1.1 fvdl /*
1611 1.1 fvdl * Before reboots, reset card completely.
1612 1.1 fvdl */
1613 1.1 fvdl static void
1614 1.1 fvdl ex_shutdown(arg)
1615 1.1 fvdl void *arg;
1616 1.1 fvdl {
1617 1.31 augustss struct ex_softc *sc = arg;
1618 1.1 fvdl
1619 1.1 fvdl ex_stop(sc);
1620 1.1 fvdl }
1621 1.1 fvdl
1622 1.1 fvdl /*
1623 1.1 fvdl * Read EEPROM data.
1624 1.1 fvdl * XXX what to do if EEPROM doesn't unbusy?
1625 1.1 fvdl */
1626 1.1 fvdl u_int16_t
1627 1.1 fvdl ex_read_eeprom(sc, offset)
1628 1.1 fvdl struct ex_softc *sc;
1629 1.1 fvdl int offset;
1630 1.1 fvdl {
1631 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1632 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1633 1.1 fvdl u_int16_t data = 0;
1634 1.1 fvdl
1635 1.1 fvdl GO_WINDOW(0);
1636 1.1 fvdl if (ex_eeprom_busy(sc))
1637 1.1 fvdl goto out;
1638 1.8 jonathan switch (sc->ex_bustype) {
1639 1.8 jonathan case EX_BUS_PCI:
1640 1.8 jonathan bus_space_write_1(iot, ioh, ELINK_W0_EEPROM_COMMAND,
1641 1.8 jonathan READ_EEPROM | (offset & 0x3f));
1642 1.8 jonathan break;
1643 1.8 jonathan case EX_BUS_CARDBUS:
1644 1.8 jonathan bus_space_write_2(iot, ioh, ELINK_W0_EEPROM_COMMAND,
1645 1.8 jonathan 0x230 + (offset & 0x3f));
1646 1.8 jonathan break;
1647 1.8 jonathan }
1648 1.1 fvdl if (ex_eeprom_busy(sc))
1649 1.1 fvdl goto out;
1650 1.1 fvdl data = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_DATA);
1651 1.1 fvdl out:
1652 1.1 fvdl return data;
1653 1.1 fvdl }
1654 1.1 fvdl
1655 1.1 fvdl static int
1656 1.1 fvdl ex_eeprom_busy(sc)
1657 1.1 fvdl struct ex_softc *sc;
1658 1.1 fvdl {
1659 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1660 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1661 1.1 fvdl int i = 100;
1662 1.1 fvdl
1663 1.1 fvdl while (i--) {
1664 1.1 fvdl if (!(bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND) &
1665 1.1 fvdl EEPROM_BUSY))
1666 1.1 fvdl return 0;
1667 1.1 fvdl delay(100);
1668 1.1 fvdl }
1669 1.1 fvdl printf("\n%s: eeprom stays busy.\n", sc->sc_dev.dv_xname);
1670 1.1 fvdl return (1);
1671 1.1 fvdl }
1672 1.1 fvdl
1673 1.1 fvdl /*
1674 1.1 fvdl * Create a new rx buffer and add it to the 'soft' rx list.
1675 1.1 fvdl */
1676 1.1 fvdl static int
1677 1.1 fvdl ex_add_rxbuf(sc, rxd)
1678 1.1 fvdl struct ex_softc *sc;
1679 1.1 fvdl struct ex_rxdesc *rxd;
1680 1.1 fvdl {
1681 1.1 fvdl struct mbuf *m, *oldm;
1682 1.1 fvdl bus_dmamap_t rxmap;
1683 1.1 fvdl int error, rval = 0;
1684 1.1 fvdl
1685 1.1 fvdl oldm = rxd->rx_mbhead;
1686 1.1 fvdl rxmap = rxd->rx_dmamap;
1687 1.1 fvdl
1688 1.1 fvdl MGETHDR(m, M_DONTWAIT, MT_DATA);
1689 1.1 fvdl if (m != NULL) {
1690 1.1 fvdl MCLGET(m, M_DONTWAIT);
1691 1.1 fvdl if ((m->m_flags & M_EXT) == 0) {
1692 1.1 fvdl m_freem(m);
1693 1.1 fvdl if (oldm == NULL)
1694 1.1 fvdl return 1;
1695 1.1 fvdl m = oldm;
1696 1.1 fvdl m->m_data = m->m_ext.ext_buf;
1697 1.1 fvdl rval = 1;
1698 1.1 fvdl }
1699 1.1 fvdl } else {
1700 1.1 fvdl if (oldm == NULL)
1701 1.1 fvdl return 1;
1702 1.1 fvdl m = oldm;
1703 1.1 fvdl m->m_data = m->m_ext.ext_buf;
1704 1.1 fvdl rval = 1;
1705 1.1 fvdl }
1706 1.1 fvdl
1707 1.1 fvdl /*
1708 1.1 fvdl * Setup the DMA map for this receive buffer.
1709 1.1 fvdl */
1710 1.1 fvdl if (m != oldm) {
1711 1.1 fvdl if (oldm != NULL)
1712 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, rxmap);
1713 1.1 fvdl error = bus_dmamap_load(sc->sc_dmat, rxmap,
1714 1.1 fvdl m->m_ext.ext_buf, MCLBYTES, NULL, BUS_DMA_NOWAIT);
1715 1.1 fvdl if (error) {
1716 1.1 fvdl printf("%s: can't load rx buffer, error = %d\n",
1717 1.1 fvdl sc->sc_dev.dv_xname, error);
1718 1.1 fvdl panic("ex_add_rxbuf"); /* XXX */
1719 1.1 fvdl }
1720 1.1 fvdl }
1721 1.1 fvdl
1722 1.1 fvdl /*
1723 1.1 fvdl * Align for data after 14 byte header.
1724 1.1 fvdl */
1725 1.1 fvdl m->m_data += 2;
1726 1.1 fvdl
1727 1.1 fvdl rxd->rx_mbhead = m;
1728 1.21 thorpej rxd->rx_upd->upd_pktstatus = htole32(MCLBYTES - 2);
1729 1.9 thorpej rxd->rx_upd->upd_frags[0].fr_addr =
1730 1.21 thorpej htole32(rxmap->dm_segs[0].ds_addr + 2);
1731 1.1 fvdl rxd->rx_upd->upd_nextptr = 0;
1732 1.1 fvdl
1733 1.1 fvdl /*
1734 1.1 fvdl * Attach it to the end of the list.
1735 1.1 fvdl */
1736 1.1 fvdl if (sc->rx_head != NULL) {
1737 1.1 fvdl sc->rx_tail->rx_next = rxd;
1738 1.21 thorpej sc->rx_tail->rx_upd->upd_nextptr = htole32(sc->sc_upddma +
1739 1.9 thorpej ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd));
1740 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap,
1741 1.1 fvdl (caddr_t)sc->rx_tail->rx_upd - (caddr_t)sc->sc_upd,
1742 1.1 fvdl sizeof (struct ex_upd),
1743 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1744 1.1 fvdl } else {
1745 1.1 fvdl sc->rx_head = rxd;
1746 1.1 fvdl }
1747 1.1 fvdl sc->rx_tail = rxd;
1748 1.1 fvdl
1749 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, rxmap, 0, rxmap->dm_mapsize,
1750 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1751 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap,
1752 1.1 fvdl ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd),
1753 1.1 fvdl sizeof (struct ex_upd), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1754 1.1 fvdl return (rval);
1755 1.1 fvdl }
1756 1.1 fvdl
1757 1.19 thorpej u_int32_t
1758 1.19 thorpej ex_mii_bitbang_read(self)
1759 1.19 thorpej struct device *self;
1760 1.1 fvdl {
1761 1.19 thorpej struct ex_softc *sc = (void *) self;
1762 1.1 fvdl
1763 1.19 thorpej /* We're already in Window 4. */
1764 1.19 thorpej return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT));
1765 1.1 fvdl }
1766 1.1 fvdl
1767 1.1 fvdl void
1768 1.19 thorpej ex_mii_bitbang_write(self, val)
1769 1.19 thorpej struct device *self;
1770 1.19 thorpej u_int32_t val;
1771 1.1 fvdl {
1772 1.19 thorpej struct ex_softc *sc = (void *) self;
1773 1.1 fvdl
1774 1.19 thorpej /* We're already in Window 4. */
1775 1.1 fvdl bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT, val);
1776 1.1 fvdl }
1777 1.1 fvdl
1778 1.1 fvdl int
1779 1.1 fvdl ex_mii_readreg(v, phy, reg)
1780 1.1 fvdl struct device *v;
1781 1.18 thorpej int phy, reg;
1782 1.1 fvdl {
1783 1.1 fvdl struct ex_softc *sc = (struct ex_softc *)v;
1784 1.19 thorpej int val;
1785 1.1 fvdl
1786 1.1 fvdl if ((sc->ex_conf & EX_CONF_INTPHY) && phy != ELINK_INTPHY_ID)
1787 1.1 fvdl return 0;
1788 1.1 fvdl
1789 1.1 fvdl GO_WINDOW(4);
1790 1.1 fvdl
1791 1.19 thorpej val = mii_bitbang_readreg(v, &ex_mii_bitbang_ops, phy, reg);
1792 1.1 fvdl
1793 1.1 fvdl GO_WINDOW(1);
1794 1.1 fvdl
1795 1.19 thorpej return (val);
1796 1.1 fvdl }
1797 1.1 fvdl
1798 1.1 fvdl void
1799 1.1 fvdl ex_mii_writereg(v, phy, reg, data)
1800 1.1 fvdl struct device *v;
1801 1.1 fvdl int phy;
1802 1.1 fvdl int reg;
1803 1.1 fvdl int data;
1804 1.1 fvdl {
1805 1.1 fvdl struct ex_softc *sc = (struct ex_softc *)v;
1806 1.1 fvdl
1807 1.1 fvdl GO_WINDOW(4);
1808 1.1 fvdl
1809 1.19 thorpej mii_bitbang_writereg(v, &ex_mii_bitbang_ops, phy, reg, data);
1810 1.1 fvdl
1811 1.1 fvdl GO_WINDOW(1);
1812 1.1 fvdl }
1813 1.1 fvdl
1814 1.1 fvdl void
1815 1.1 fvdl ex_mii_statchg(v)
1816 1.1 fvdl struct device *v;
1817 1.1 fvdl {
1818 1.1 fvdl struct ex_softc *sc = (struct ex_softc *)v;
1819 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1820 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1821 1.1 fvdl int mctl;
1822 1.1 fvdl
1823 1.1 fvdl GO_WINDOW(3);
1824 1.1 fvdl mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL);
1825 1.1 fvdl if (sc->ex_mii.mii_media_active & IFM_FDX)
1826 1.1 fvdl mctl |= MAC_CONTROL_FDX;
1827 1.1 fvdl else
1828 1.1 fvdl mctl &= ~MAC_CONTROL_FDX;
1829 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl);
1830 1.1 fvdl GO_WINDOW(1); /* back to operating window */
1831 1.1 fvdl }
1832