elinkxl.c revision 1.46 1 1.46 thorpej /* $NetBSD: elinkxl.c,v 1.46 2000/12/14 06:27:25 thorpej Exp $ */
2 1.1 fvdl
3 1.1 fvdl /*-
4 1.1 fvdl * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.1 fvdl * All rights reserved.
6 1.1 fvdl *
7 1.1 fvdl * This code is derived from software contributed to The NetBSD Foundation
8 1.1 fvdl * by Frank van der Linden.
9 1.1 fvdl *
10 1.1 fvdl * Redistribution and use in source and binary forms, with or without
11 1.1 fvdl * modification, are permitted provided that the following conditions
12 1.1 fvdl * are met:
13 1.1 fvdl * 1. Redistributions of source code must retain the above copyright
14 1.1 fvdl * notice, this list of conditions and the following disclaimer.
15 1.1 fvdl * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 fvdl * notice, this list of conditions and the following disclaimer in the
17 1.1 fvdl * documentation and/or other materials provided with the distribution.
18 1.1 fvdl * 3. All advertising materials mentioning features or use of this software
19 1.1 fvdl * must display the following acknowledgement:
20 1.1 fvdl * This product includes software developed by the NetBSD
21 1.1 fvdl * Foundation, Inc. and its contributors.
22 1.1 fvdl * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.1 fvdl * contributors may be used to endorse or promote products derived
24 1.1 fvdl * from this software without specific prior written permission.
25 1.1 fvdl *
26 1.1 fvdl * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.1 fvdl * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 fvdl * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1 fvdl * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.1 fvdl * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 fvdl * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 fvdl * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 fvdl * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 fvdl * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 fvdl * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 fvdl * POSSIBILITY OF SUCH DAMAGE.
37 1.1 fvdl */
38 1.1 fvdl
39 1.1 fvdl #include "opt_inet.h"
40 1.1 fvdl #include "opt_ns.h"
41 1.1 fvdl #include "bpfilter.h"
42 1.1 fvdl #include "rnd.h"
43 1.1 fvdl
44 1.1 fvdl #include <sys/param.h>
45 1.1 fvdl #include <sys/systm.h>
46 1.30 thorpej #include <sys/callout.h>
47 1.1 fvdl #include <sys/kernel.h>
48 1.1 fvdl #include <sys/mbuf.h>
49 1.1 fvdl #include <sys/socket.h>
50 1.1 fvdl #include <sys/ioctl.h>
51 1.1 fvdl #include <sys/errno.h>
52 1.1 fvdl #include <sys/syslog.h>
53 1.1 fvdl #include <sys/select.h>
54 1.1 fvdl #include <sys/device.h>
55 1.1 fvdl #if NRND > 0
56 1.1 fvdl #include <sys/rnd.h>
57 1.1 fvdl #endif
58 1.1 fvdl
59 1.44 thorpej #include <uvm/uvm_extern.h>
60 1.44 thorpej
61 1.1 fvdl #include <net/if.h>
62 1.1 fvdl #include <net/if_dl.h>
63 1.1 fvdl #include <net/if_ether.h>
64 1.1 fvdl #include <net/if_media.h>
65 1.1 fvdl
66 1.1 fvdl #ifdef INET
67 1.1 fvdl #include <netinet/in.h>
68 1.1 fvdl #include <netinet/in_systm.h>
69 1.1 fvdl #include <netinet/in_var.h>
70 1.1 fvdl #include <netinet/ip.h>
71 1.1 fvdl #include <netinet/if_inarp.h>
72 1.1 fvdl #endif
73 1.1 fvdl
74 1.1 fvdl #ifdef NS
75 1.1 fvdl #include <netns/ns.h>
76 1.1 fvdl #include <netns/ns_if.h>
77 1.1 fvdl #endif
78 1.1 fvdl
79 1.1 fvdl #if NBPFILTER > 0
80 1.1 fvdl #include <net/bpf.h>
81 1.1 fvdl #include <net/bpfdesc.h>
82 1.1 fvdl #endif
83 1.1 fvdl
84 1.1 fvdl #include <machine/cpu.h>
85 1.1 fvdl #include <machine/bus.h>
86 1.1 fvdl #include <machine/intr.h>
87 1.21 thorpej #include <machine/endian.h>
88 1.1 fvdl
89 1.1 fvdl #include <dev/mii/miivar.h>
90 1.1 fvdl #include <dev/mii/mii.h>
91 1.19 thorpej #include <dev/mii/mii_bitbang.h>
92 1.1 fvdl
93 1.1 fvdl #include <dev/ic/elink3reg.h>
94 1.1 fvdl /* #include <dev/ic/elink3var.h> */
95 1.1 fvdl #include <dev/ic/elinkxlreg.h>
96 1.1 fvdl #include <dev/ic/elinkxlvar.h>
97 1.1 fvdl
98 1.1 fvdl #ifdef DEBUG
99 1.1 fvdl int exdebug = 0;
100 1.1 fvdl #endif
101 1.1 fvdl
102 1.1 fvdl /* ifmedia callbacks */
103 1.1 fvdl int ex_media_chg __P((struct ifnet *ifp));
104 1.1 fvdl void ex_media_stat __P((struct ifnet *ifp, struct ifmediareq *req));
105 1.1 fvdl
106 1.1 fvdl void ex_probe_media __P((struct ex_softc *));
107 1.1 fvdl void ex_set_filter __P((struct ex_softc *));
108 1.1 fvdl void ex_set_media __P((struct ex_softc *));
109 1.1 fvdl struct mbuf *ex_get __P((struct ex_softc *, int));
110 1.1 fvdl u_int16_t ex_read_eeprom __P((struct ex_softc *, int));
111 1.42 thorpej int ex_init __P((struct ifnet *));
112 1.1 fvdl void ex_read __P((struct ex_softc *));
113 1.1 fvdl void ex_reset __P((struct ex_softc *));
114 1.1 fvdl void ex_set_mc __P((struct ex_softc *));
115 1.1 fvdl void ex_getstats __P((struct ex_softc *));
116 1.1 fvdl void ex_printstats __P((struct ex_softc *));
117 1.1 fvdl void ex_tick __P((void *));
118 1.1 fvdl
119 1.1 fvdl static int ex_eeprom_busy __P((struct ex_softc *));
120 1.1 fvdl static int ex_add_rxbuf __P((struct ex_softc *, struct ex_rxdesc *));
121 1.1 fvdl static void ex_init_txdescs __P((struct ex_softc *));
122 1.1 fvdl
123 1.1 fvdl static void ex_shutdown __P((void *));
124 1.1 fvdl static void ex_start __P((struct ifnet *));
125 1.1 fvdl static void ex_txstat __P((struct ex_softc *));
126 1.1 fvdl
127 1.1 fvdl int ex_mii_readreg __P((struct device *, int, int));
128 1.1 fvdl void ex_mii_writereg __P((struct device *, int, int, int));
129 1.1 fvdl void ex_mii_statchg __P((struct device *));
130 1.1 fvdl
131 1.2 thorpej void ex_probemedia __P((struct ex_softc *));
132 1.2 thorpej
133 1.2 thorpej /*
134 1.2 thorpej * Structure to map media-present bits in boards to ifmedia codes and
135 1.2 thorpej * printable media names. Used for table-driven ifmedia initialization.
136 1.2 thorpej */
137 1.2 thorpej struct ex_media {
138 1.2 thorpej int exm_mpbit; /* media present bit */
139 1.2 thorpej const char *exm_name; /* name of medium */
140 1.2 thorpej int exm_ifmedia; /* ifmedia word for medium */
141 1.2 thorpej int exm_epmedia; /* ELINKMEDIA_* constant */
142 1.2 thorpej };
143 1.2 thorpej
144 1.2 thorpej /*
145 1.2 thorpej * Media table for 3c90x chips. Note that chips with MII have no
146 1.2 thorpej * `native' media.
147 1.2 thorpej */
148 1.2 thorpej struct ex_media ex_native_media[] = {
149 1.2 thorpej { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T,
150 1.2 thorpej ELINKMEDIA_10BASE_T },
151 1.2 thorpej { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX,
152 1.2 thorpej ELINKMEDIA_10BASE_T },
153 1.2 thorpej { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5,
154 1.2 thorpej ELINKMEDIA_AUI },
155 1.2 thorpej { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2,
156 1.2 thorpej ELINKMEDIA_10BASE_2 },
157 1.2 thorpej { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX,
158 1.2 thorpej ELINKMEDIA_100BASE_TX },
159 1.2 thorpej { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX,
160 1.2 thorpej ELINKMEDIA_100BASE_TX },
161 1.2 thorpej { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX,
162 1.2 thorpej ELINKMEDIA_100BASE_FX },
163 1.2 thorpej { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL,
164 1.2 thorpej ELINKMEDIA_MII },
165 1.2 thorpej { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4,
166 1.2 thorpej ELINKMEDIA_100BASE_T4 },
167 1.2 thorpej { 0, NULL, 0,
168 1.2 thorpej 0 },
169 1.2 thorpej };
170 1.2 thorpej
171 1.1 fvdl /*
172 1.19 thorpej * MII bit-bang glue.
173 1.19 thorpej */
174 1.19 thorpej u_int32_t ex_mii_bitbang_read __P((struct device *));
175 1.19 thorpej void ex_mii_bitbang_write __P((struct device *, u_int32_t));
176 1.19 thorpej
177 1.19 thorpej const struct mii_bitbang_ops ex_mii_bitbang_ops = {
178 1.19 thorpej ex_mii_bitbang_read,
179 1.19 thorpej ex_mii_bitbang_write,
180 1.19 thorpej {
181 1.19 thorpej ELINK_PHY_DATA, /* MII_BIT_MDO */
182 1.19 thorpej ELINK_PHY_DATA, /* MII_BIT_MDI */
183 1.19 thorpej ELINK_PHY_CLK, /* MII_BIT_MDC */
184 1.19 thorpej ELINK_PHY_DIR, /* MII_BIT_DIR_HOST_PHY */
185 1.19 thorpej 0, /* MII_BIT_DIR_PHY_HOST */
186 1.19 thorpej }
187 1.19 thorpej };
188 1.19 thorpej
189 1.19 thorpej /*
190 1.1 fvdl * Back-end attach and configure.
191 1.1 fvdl */
192 1.1 fvdl void
193 1.1 fvdl ex_config(sc)
194 1.1 fvdl struct ex_softc *sc;
195 1.1 fvdl {
196 1.1 fvdl struct ifnet *ifp;
197 1.1 fvdl u_int16_t val;
198 1.1 fvdl u_int8_t macaddr[ETHER_ADDR_LEN] = {0};
199 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
200 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
201 1.25 augustss int i, error, attach_stage;
202 1.1 fvdl
203 1.30 thorpej callout_init(&sc->ex_mii_callout);
204 1.30 thorpej
205 1.1 fvdl ex_reset(sc);
206 1.1 fvdl
207 1.1 fvdl val = ex_read_eeprom(sc, EEPROM_OEM_ADDR0);
208 1.1 fvdl macaddr[0] = val >> 8;
209 1.1 fvdl macaddr[1] = val & 0xff;
210 1.1 fvdl val = ex_read_eeprom(sc, EEPROM_OEM_ADDR1);
211 1.1 fvdl macaddr[2] = val >> 8;
212 1.1 fvdl macaddr[3] = val & 0xff;
213 1.1 fvdl val = ex_read_eeprom(sc, EEPROM_OEM_ADDR2);
214 1.1 fvdl macaddr[4] = val >> 8;
215 1.1 fvdl macaddr[5] = val & 0xff;
216 1.1 fvdl
217 1.1 fvdl printf("%s: MAC address %s\n", sc->sc_dev.dv_xname,
218 1.1 fvdl ether_sprintf(macaddr));
219 1.1 fvdl
220 1.40 fvdl if (sc->ex_conf & (EX_CONF_INV_LED_POLARITY|EX_CONF_PHY_POWER)) {
221 1.40 fvdl GO_WINDOW(2);
222 1.40 fvdl val = bus_space_read_2(iot, ioh, ELINK_W2_RESET_OPTIONS);
223 1.40 fvdl if (sc->ex_conf & EX_CONF_INV_LED_POLARITY)
224 1.40 fvdl val |= ELINK_RESET_OPT_LEDPOLAR;
225 1.40 fvdl if (sc->ex_conf & EX_CONF_PHY_POWER)
226 1.40 fvdl val |= ELINK_RESET_OPT_PHYPOWER;
227 1.40 fvdl bus_space_write_2(iot, ioh, ELINK_W2_RESET_OPTIONS, val);
228 1.15 haya }
229 1.15 haya
230 1.1 fvdl attach_stage = 0;
231 1.1 fvdl
232 1.1 fvdl /*
233 1.1 fvdl * Allocate the upload descriptors, and create and load the DMA
234 1.1 fvdl * map for them.
235 1.1 fvdl */
236 1.1 fvdl if ((error = bus_dmamem_alloc(sc->sc_dmat,
237 1.44 thorpej EX_NUPD * sizeof (struct ex_upd), PAGE_SIZE, 0, &sc->sc_useg, 1,
238 1.25 augustss &sc->sc_urseg, BUS_DMA_NOWAIT)) != 0) {
239 1.1 fvdl printf("%s: can't allocate upload descriptors, error = %d\n",
240 1.1 fvdl sc->sc_dev.dv_xname, error);
241 1.1 fvdl goto fail;
242 1.1 fvdl }
243 1.1 fvdl
244 1.1 fvdl attach_stage = 1;
245 1.1 fvdl
246 1.25 augustss if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg,
247 1.1 fvdl EX_NUPD * sizeof (struct ex_upd), (caddr_t *)&sc->sc_upd,
248 1.1 fvdl BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
249 1.1 fvdl printf("%s: can't map upload descriptors, error = %d\n",
250 1.1 fvdl sc->sc_dev.dv_xname, error);
251 1.1 fvdl goto fail;
252 1.1 fvdl }
253 1.1 fvdl
254 1.1 fvdl attach_stage = 2;
255 1.1 fvdl
256 1.1 fvdl if ((error = bus_dmamap_create(sc->sc_dmat,
257 1.1 fvdl EX_NUPD * sizeof (struct ex_upd), 1,
258 1.1 fvdl EX_NUPD * sizeof (struct ex_upd), 0, BUS_DMA_NOWAIT,
259 1.1 fvdl &sc->sc_upd_dmamap)) != 0) {
260 1.1 fvdl printf("%s: can't create upload desc. DMA map, error = %d\n",
261 1.1 fvdl sc->sc_dev.dv_xname, error);
262 1.1 fvdl goto fail;
263 1.1 fvdl }
264 1.1 fvdl
265 1.1 fvdl attach_stage = 3;
266 1.1 fvdl
267 1.1 fvdl if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_upd_dmamap,
268 1.1 fvdl sc->sc_upd, EX_NUPD * sizeof (struct ex_upd), NULL,
269 1.1 fvdl BUS_DMA_NOWAIT)) != 0) {
270 1.1 fvdl printf("%s: can't load upload desc. DMA map, error = %d\n",
271 1.1 fvdl sc->sc_dev.dv_xname, error);
272 1.1 fvdl goto fail;
273 1.1 fvdl }
274 1.1 fvdl
275 1.1 fvdl attach_stage = 4;
276 1.1 fvdl
277 1.1 fvdl /*
278 1.1 fvdl * Allocate the download descriptors, and create and load the DMA
279 1.1 fvdl * map for them.
280 1.1 fvdl */
281 1.1 fvdl if ((error = bus_dmamem_alloc(sc->sc_dmat,
282 1.44 thorpej EX_NDPD * sizeof (struct ex_dpd), PAGE_SIZE, 0, &sc->sc_dseg, 1,
283 1.25 augustss &sc->sc_drseg, BUS_DMA_NOWAIT)) != 0) {
284 1.1 fvdl printf("%s: can't allocate download descriptors, error = %d\n",
285 1.1 fvdl sc->sc_dev.dv_xname, error);
286 1.1 fvdl goto fail;
287 1.1 fvdl }
288 1.1 fvdl
289 1.1 fvdl attach_stage = 5;
290 1.1 fvdl
291 1.25 augustss if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg,
292 1.1 fvdl EX_NDPD * sizeof (struct ex_dpd), (caddr_t *)&sc->sc_dpd,
293 1.1 fvdl BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
294 1.1 fvdl printf("%s: can't map download descriptors, error = %d\n",
295 1.1 fvdl sc->sc_dev.dv_xname, error);
296 1.1 fvdl goto fail;
297 1.1 fvdl }
298 1.1 fvdl bzero(sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd));
299 1.1 fvdl
300 1.1 fvdl attach_stage = 6;
301 1.1 fvdl
302 1.1 fvdl if ((error = bus_dmamap_create(sc->sc_dmat,
303 1.1 fvdl EX_NDPD * sizeof (struct ex_dpd), 1,
304 1.1 fvdl EX_NDPD * sizeof (struct ex_dpd), 0, BUS_DMA_NOWAIT,
305 1.1 fvdl &sc->sc_dpd_dmamap)) != 0) {
306 1.1 fvdl printf("%s: can't create download desc. DMA map, error = %d\n",
307 1.1 fvdl sc->sc_dev.dv_xname, error);
308 1.1 fvdl goto fail;
309 1.1 fvdl }
310 1.1 fvdl
311 1.1 fvdl attach_stage = 7;
312 1.1 fvdl
313 1.1 fvdl if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dpd_dmamap,
314 1.1 fvdl sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd), NULL,
315 1.1 fvdl BUS_DMA_NOWAIT)) != 0) {
316 1.1 fvdl printf("%s: can't load download desc. DMA map, error = %d\n",
317 1.1 fvdl sc->sc_dev.dv_xname, error);
318 1.1 fvdl goto fail;
319 1.1 fvdl }
320 1.1 fvdl
321 1.1 fvdl attach_stage = 8;
322 1.1 fvdl
323 1.1 fvdl
324 1.1 fvdl /*
325 1.1 fvdl * Create the transmit buffer DMA maps.
326 1.1 fvdl */
327 1.1 fvdl for (i = 0; i < EX_NDPD; i++) {
328 1.1 fvdl if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
329 1.1 fvdl EX_NTFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT,
330 1.1 fvdl &sc->sc_tx_dmamaps[i])) != 0) {
331 1.1 fvdl printf("%s: can't create tx DMA map %d, error = %d\n",
332 1.1 fvdl sc->sc_dev.dv_xname, i, error);
333 1.1 fvdl goto fail;
334 1.1 fvdl }
335 1.1 fvdl }
336 1.1 fvdl
337 1.1 fvdl attach_stage = 9;
338 1.1 fvdl
339 1.1 fvdl /*
340 1.1 fvdl * Create the receive buffer DMA maps.
341 1.1 fvdl */
342 1.1 fvdl for (i = 0; i < EX_NUPD; i++) {
343 1.1 fvdl if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
344 1.1 fvdl EX_NRFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT,
345 1.1 fvdl &sc->sc_rx_dmamaps[i])) != 0) {
346 1.1 fvdl printf("%s: can't create rx DMA map %d, error = %d\n",
347 1.1 fvdl sc->sc_dev.dv_xname, i, error);
348 1.1 fvdl goto fail;
349 1.1 fvdl }
350 1.1 fvdl }
351 1.1 fvdl
352 1.1 fvdl attach_stage = 10;
353 1.1 fvdl
354 1.1 fvdl /*
355 1.1 fvdl * Create ring of upload descriptors, only once. The DMA engine
356 1.1 fvdl * will loop over this when receiving packets, stalling if it
357 1.1 fvdl * hits an UPD with a finished receive.
358 1.1 fvdl */
359 1.1 fvdl for (i = 0; i < EX_NUPD; i++) {
360 1.1 fvdl sc->sc_rxdescs[i].rx_dmamap = sc->sc_rx_dmamaps[i];
361 1.1 fvdl sc->sc_rxdescs[i].rx_upd = &sc->sc_upd[i];
362 1.9 thorpej sc->sc_upd[i].upd_frags[0].fr_len =
363 1.21 thorpej htole32((MCLBYTES - 2) | EX_FR_LAST);
364 1.1 fvdl if (ex_add_rxbuf(sc, &sc->sc_rxdescs[i]) != 0) {
365 1.1 fvdl printf("%s: can't allocate or map rx buffers\n",
366 1.1 fvdl sc->sc_dev.dv_xname);
367 1.1 fvdl goto fail;
368 1.1 fvdl }
369 1.1 fvdl }
370 1.1 fvdl
371 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 0,
372 1.1 fvdl EX_NUPD * sizeof (struct ex_upd),
373 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
374 1.1 fvdl
375 1.1 fvdl ex_init_txdescs(sc);
376 1.1 fvdl
377 1.1 fvdl attach_stage = 11;
378 1.1 fvdl
379 1.1 fvdl
380 1.1 fvdl GO_WINDOW(3);
381 1.1 fvdl val = bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS);
382 1.1 fvdl if (val & ELINK_MEDIACAP_MII)
383 1.1 fvdl sc->ex_conf |= EX_CONF_MII;
384 1.1 fvdl
385 1.1 fvdl ifp = &sc->sc_ethercom.ec_if;
386 1.1 fvdl
387 1.2 thorpej /*
388 1.2 thorpej * Initialize our media structures and MII info. We'll
389 1.2 thorpej * probe the MII if we discover that we have one.
390 1.2 thorpej */
391 1.2 thorpej sc->ex_mii.mii_ifp = ifp;
392 1.2 thorpej sc->ex_mii.mii_readreg = ex_mii_readreg;
393 1.2 thorpej sc->ex_mii.mii_writereg = ex_mii_writereg;
394 1.2 thorpej sc->ex_mii.mii_statchg = ex_mii_statchg;
395 1.2 thorpej ifmedia_init(&sc->ex_mii.mii_media, 0, ex_media_chg,
396 1.2 thorpej ex_media_stat);
397 1.2 thorpej
398 1.1 fvdl if (sc->ex_conf & EX_CONF_MII) {
399 1.1 fvdl /*
400 1.1 fvdl * Find PHY, extract media information from it.
401 1.14 fvdl * First, select the right transceiver.
402 1.1 fvdl */
403 1.14 fvdl u_int32_t icfg;
404 1.14 fvdl
405 1.14 fvdl GO_WINDOW(3);
406 1.14 fvdl icfg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG);
407 1.14 fvdl icfg &= ~(CONFIG_XCVR_SEL << 16);
408 1.14 fvdl if (val & (ELINK_MEDIACAP_MII | ELINK_MEDIACAP_100BASET4))
409 1.14 fvdl icfg |= ELINKMEDIA_MII << (CONFIG_XCVR_SEL_SHIFT + 16);
410 1.14 fvdl if (val & ELINK_MEDIACAP_100BASETX)
411 1.14 fvdl icfg |= ELINKMEDIA_AUTO << (CONFIG_XCVR_SEL_SHIFT + 16);
412 1.14 fvdl if (val & ELINK_MEDIACAP_100BASEFX)
413 1.14 fvdl icfg |= ELINKMEDIA_100BASE_FX
414 1.14 fvdl << (CONFIG_XCVR_SEL_SHIFT + 16);
415 1.14 fvdl bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, icfg);
416 1.14 fvdl
417 1.23 thorpej mii_attach(&sc->sc_dev, &sc->ex_mii, 0xffffffff,
418 1.24 thorpej MII_PHY_ANY, MII_OFFSET_ANY, 0);
419 1.1 fvdl if (LIST_FIRST(&sc->ex_mii.mii_phys) == NULL) {
420 1.1 fvdl ifmedia_add(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE,
421 1.1 fvdl 0, NULL);
422 1.1 fvdl ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE);
423 1.1 fvdl } else {
424 1.1 fvdl ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_AUTO);
425 1.1 fvdl }
426 1.2 thorpej } else
427 1.2 thorpej ex_probemedia(sc);
428 1.1 fvdl
429 1.1 fvdl bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
430 1.1 fvdl ifp->if_softc = sc;
431 1.1 fvdl ifp->if_start = ex_start;
432 1.1 fvdl ifp->if_ioctl = ex_ioctl;
433 1.1 fvdl ifp->if_watchdog = ex_watchdog;
434 1.42 thorpej ifp->if_init = ex_init;
435 1.42 thorpej ifp->if_stop = ex_stop;
436 1.1 fvdl ifp->if_flags =
437 1.1 fvdl IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
438 1.46 thorpej IFQ_SET_READY(&ifp->if_snd);
439 1.1 fvdl
440 1.43 bouyer /*
441 1.43 bouyer * We can support 802.1Q VLAN-sized frames.
442 1.43 bouyer */
443 1.43 bouyer sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU;
444 1.43 bouyer
445 1.1 fvdl if_attach(ifp);
446 1.1 fvdl ether_ifattach(ifp, macaddr);
447 1.1 fvdl
448 1.1 fvdl GO_WINDOW(1);
449 1.1 fvdl
450 1.1 fvdl sc->tx_start_thresh = 20;
451 1.1 fvdl sc->tx_succ_ok = 0;
452 1.1 fvdl
453 1.1 fvdl /* TODO: set queues to 0 */
454 1.1 fvdl
455 1.1 fvdl #if NRND > 0
456 1.5 explorer rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname,
457 1.5 explorer RND_TYPE_NET, 0);
458 1.1 fvdl #endif
459 1.1 fvdl
460 1.1 fvdl /* Establish callback to reset card when we reboot. */
461 1.25 augustss sc->sc_sdhook = shutdownhook_establish(ex_shutdown, sc);
462 1.34 jhawk
463 1.34 jhawk /* The attach is successful. */
464 1.34 jhawk sc->ex_flags |= EX_FLAGS_ATTACHED;
465 1.1 fvdl return;
466 1.1 fvdl
467 1.1 fvdl fail:
468 1.1 fvdl /*
469 1.1 fvdl * Free any resources we've allocated during the failed attach
470 1.1 fvdl * attempt. Do this in reverse order and fall though.
471 1.1 fvdl */
472 1.1 fvdl switch (attach_stage) {
473 1.1 fvdl case 11:
474 1.1 fvdl {
475 1.1 fvdl struct ex_rxdesc *rxd;
476 1.1 fvdl
477 1.1 fvdl for (i = 0; i < EX_NUPD; i++) {
478 1.1 fvdl rxd = &sc->sc_rxdescs[i];
479 1.1 fvdl if (rxd->rx_mbhead != NULL) {
480 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap);
481 1.1 fvdl m_freem(rxd->rx_mbhead);
482 1.1 fvdl }
483 1.1 fvdl }
484 1.1 fvdl }
485 1.1 fvdl /* FALLTHROUGH */
486 1.1 fvdl
487 1.1 fvdl case 10:
488 1.1 fvdl for (i = 0; i < EX_NUPD; i++)
489 1.1 fvdl bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]);
490 1.1 fvdl /* FALLTHROUGH */
491 1.1 fvdl
492 1.1 fvdl case 9:
493 1.1 fvdl for (i = 0; i < EX_NDPD; i++)
494 1.1 fvdl bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]);
495 1.1 fvdl /* FALLTHROUGH */
496 1.1 fvdl case 8:
497 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap);
498 1.1 fvdl /* FALLTHROUGH */
499 1.1 fvdl
500 1.1 fvdl case 7:
501 1.1 fvdl bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap);
502 1.1 fvdl /* FALLTHROUGH */
503 1.1 fvdl
504 1.1 fvdl case 6:
505 1.1 fvdl bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd,
506 1.1 fvdl EX_NDPD * sizeof (struct ex_dpd));
507 1.1 fvdl /* FALLTHROUGH */
508 1.1 fvdl
509 1.1 fvdl case 5:
510 1.25 augustss bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg);
511 1.1 fvdl break;
512 1.1 fvdl
513 1.1 fvdl case 4:
514 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap);
515 1.1 fvdl /* FALLTHROUGH */
516 1.1 fvdl
517 1.1 fvdl case 3:
518 1.1 fvdl bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap);
519 1.1 fvdl /* FALLTHROUGH */
520 1.1 fvdl
521 1.1 fvdl case 2:
522 1.1 fvdl bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd,
523 1.1 fvdl EX_NUPD * sizeof (struct ex_upd));
524 1.1 fvdl /* FALLTHROUGH */
525 1.1 fvdl
526 1.1 fvdl case 1:
527 1.25 augustss bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg);
528 1.1 fvdl break;
529 1.1 fvdl }
530 1.1 fvdl
531 1.2 thorpej }
532 1.2 thorpej
533 1.2 thorpej /*
534 1.2 thorpej * Find the media present on non-MII chips.
535 1.2 thorpej */
536 1.2 thorpej void
537 1.2 thorpej ex_probemedia(sc)
538 1.2 thorpej struct ex_softc *sc;
539 1.2 thorpej {
540 1.2 thorpej bus_space_tag_t iot = sc->sc_iot;
541 1.2 thorpej bus_space_handle_t ioh = sc->sc_ioh;
542 1.2 thorpej struct ifmedia *ifm = &sc->ex_mii.mii_media;
543 1.2 thorpej struct ex_media *exm;
544 1.2 thorpej u_int16_t config1, reset_options, default_media;
545 1.2 thorpej int defmedia = 0;
546 1.2 thorpej const char *sep = "", *defmedianame = NULL;
547 1.2 thorpej
548 1.2 thorpej GO_WINDOW(3);
549 1.2 thorpej config1 = bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2);
550 1.2 thorpej reset_options = bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS);
551 1.2 thorpej GO_WINDOW(0);
552 1.2 thorpej
553 1.2 thorpej default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT;
554 1.2 thorpej
555 1.2 thorpej printf("%s: ", sc->sc_dev.dv_xname);
556 1.2 thorpej
557 1.2 thorpej /* Sanity check that there are any media! */
558 1.2 thorpej if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) {
559 1.2 thorpej printf("no media present!\n");
560 1.2 thorpej ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL);
561 1.2 thorpej ifmedia_set(ifm, IFM_ETHER|IFM_NONE);
562 1.2 thorpej return;
563 1.2 thorpej }
564 1.2 thorpej
565 1.2 thorpej #define PRINT(s) printf("%s%s", sep, s); sep = ", "
566 1.2 thorpej
567 1.2 thorpej for (exm = ex_native_media; exm->exm_name != NULL; exm++) {
568 1.2 thorpej if (reset_options & exm->exm_mpbit) {
569 1.2 thorpej /*
570 1.2 thorpej * Default media is a little complicated. We
571 1.2 thorpej * support full-duplex which uses the same
572 1.2 thorpej * reset options bit.
573 1.2 thorpej *
574 1.2 thorpej * XXX Check EEPROM for default to FDX?
575 1.2 thorpej */
576 1.2 thorpej if (exm->exm_epmedia == default_media) {
577 1.2 thorpej if ((exm->exm_ifmedia & IFM_FDX) == 0) {
578 1.2 thorpej defmedia = exm->exm_ifmedia;
579 1.2 thorpej defmedianame = exm->exm_name;
580 1.2 thorpej }
581 1.2 thorpej } else if (defmedia == 0) {
582 1.2 thorpej defmedia = exm->exm_ifmedia;
583 1.2 thorpej defmedianame = exm->exm_name;
584 1.2 thorpej }
585 1.2 thorpej ifmedia_add(ifm, exm->exm_ifmedia, exm->exm_epmedia,
586 1.2 thorpej NULL);
587 1.2 thorpej PRINT(exm->exm_name);
588 1.2 thorpej }
589 1.2 thorpej }
590 1.2 thorpej
591 1.2 thorpej #undef PRINT
592 1.2 thorpej
593 1.2 thorpej #ifdef DIAGNOSTIC
594 1.2 thorpej if (defmedia == 0)
595 1.2 thorpej panic("ex_probemedia: impossible");
596 1.2 thorpej #endif
597 1.2 thorpej
598 1.2 thorpej printf(", default %s\n", defmedianame);
599 1.2 thorpej ifmedia_set(ifm, defmedia);
600 1.1 fvdl }
601 1.1 fvdl
602 1.1 fvdl /*
603 1.1 fvdl * Bring device up.
604 1.1 fvdl */
605 1.42 thorpej int
606 1.42 thorpej ex_init(ifp)
607 1.42 thorpej struct ifnet *ifp;
608 1.1 fvdl {
609 1.42 thorpej struct ex_softc *sc = ifp->if_softc;
610 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
611 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
612 1.1 fvdl int s, i;
613 1.1 fvdl
614 1.1 fvdl s = splnet();
615 1.1 fvdl
616 1.1 fvdl ex_waitcmd(sc);
617 1.42 thorpej ex_stop(ifp, 0);
618 1.1 fvdl
619 1.1 fvdl /*
620 1.1 fvdl * Set the station address and clear the station mask. The latter
621 1.1 fvdl * is needed for 90x cards, 0 is the default for 90xB cards.
622 1.1 fvdl */
623 1.1 fvdl GO_WINDOW(2);
624 1.1 fvdl for (i = 0; i < ETHER_ADDR_LEN; i++) {
625 1.1 fvdl bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i,
626 1.1 fvdl LLADDR(ifp->if_sadl)[i]);
627 1.1 fvdl bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0);
628 1.1 fvdl }
629 1.1 fvdl
630 1.1 fvdl GO_WINDOW(3);
631 1.1 fvdl
632 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_RESET);
633 1.1 fvdl ex_waitcmd(sc);
634 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_RESET);
635 1.1 fvdl ex_waitcmd(sc);
636 1.1 fvdl
637 1.1 fvdl /*
638 1.1 fvdl * Disable reclaim threshold for 90xB, set free threshold to
639 1.1 fvdl * 6 * 256 = 1536 for 90x.
640 1.1 fvdl */
641 1.1 fvdl if (sc->ex_conf & EX_CONF_90XB)
642 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND,
643 1.1 fvdl ELINK_TXRECLTHRESH | 255);
644 1.1 fvdl else
645 1.1 fvdl bus_space_write_1(iot, ioh, ELINK_TXFREETHRESH, 6);
646 1.1 fvdl
647 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND,
648 1.1 fvdl SET_RX_EARLY_THRESH | ELINK_THRESH_DISABLE);
649 1.1 fvdl
650 1.1 fvdl bus_space_write_4(iot, ioh, ELINK_DMACTRL,
651 1.1 fvdl bus_space_read_4(iot, ioh, ELINK_DMACTRL) | ELINK_DMAC_UPRXEAREN);
652 1.1 fvdl
653 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK | S_MASK);
654 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK | S_MASK);
655 1.1 fvdl
656 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff);
657 1.15 haya if (sc->intr_ack)
658 1.15 haya (* sc->intr_ack)(sc);
659 1.1 fvdl ex_set_media(sc);
660 1.1 fvdl ex_set_mc(sc);
661 1.1 fvdl
662 1.1 fvdl
663 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, STATS_ENABLE);
664 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE);
665 1.1 fvdl bus_space_write_4(iot, ioh, ELINK_UPLISTPTR, sc->sc_upddma);
666 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE);
667 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_UPUNSTALL);
668 1.38 haya
669 1.38 haya if (sc->ex_conf & (EX_CONF_PHY_POWER | EX_CONF_INV_LED_POLARITY)) {
670 1.38 haya u_int16_t cbcard_config;
671 1.38 haya
672 1.38 haya GO_WINDOW(2);
673 1.38 haya cbcard_config = bus_space_read_2(sc->sc_iot, sc->sc_ioh, 0x0c);
674 1.38 haya if (sc->ex_conf & EX_CONF_PHY_POWER) {
675 1.38 haya cbcard_config |= 0x4000; /* turn on PHY power */
676 1.38 haya }
677 1.38 haya if (sc->ex_conf & EX_CONF_INV_LED_POLARITY) {
678 1.39 haya cbcard_config |= 0x0010; /* invert LED polarity */
679 1.38 haya }
680 1.38 haya bus_space_write_2(sc->sc_iot, sc->sc_ioh, 0x0c, cbcard_config);
681 1.38 haya
682 1.38 haya GO_WINDOW(3);
683 1.38 haya }
684 1.1 fvdl
685 1.1 fvdl ifp->if_flags |= IFF_RUNNING;
686 1.1 fvdl ifp->if_flags &= ~IFF_OACTIVE;
687 1.1 fvdl ex_start(ifp);
688 1.1 fvdl
689 1.1 fvdl GO_WINDOW(1);
690 1.1 fvdl
691 1.1 fvdl splx(s);
692 1.1 fvdl
693 1.30 thorpej callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc);
694 1.42 thorpej
695 1.42 thorpej return (0);
696 1.1 fvdl }
697 1.1 fvdl
698 1.33 thorpej #define ex_mchash(addr) (ether_crc32_be((addr), ETHER_ADDR_LEN) & 0xff)
699 1.1 fvdl
700 1.1 fvdl /*
701 1.1 fvdl * Set multicast receive filter. Also take care of promiscuous mode
702 1.1 fvdl * here (XXX).
703 1.1 fvdl */
704 1.1 fvdl void
705 1.1 fvdl ex_set_mc(sc)
706 1.31 augustss struct ex_softc *sc;
707 1.1 fvdl {
708 1.1 fvdl struct ifnet *ifp = &sc->sc_ethercom.ec_if;
709 1.1 fvdl struct ethercom *ec = &sc->sc_ethercom;
710 1.1 fvdl struct ether_multi *enm;
711 1.1 fvdl struct ether_multistep estep;
712 1.1 fvdl int i;
713 1.1 fvdl u_int16_t mask = FIL_INDIVIDUAL | FIL_BRDCST;
714 1.1 fvdl
715 1.1 fvdl if (ifp->if_flags & IFF_PROMISC)
716 1.1 fvdl mask |= FIL_PROMISC;
717 1.1 fvdl
718 1.1 fvdl if (!(ifp->if_flags & IFF_MULTICAST))
719 1.1 fvdl goto out;
720 1.1 fvdl
721 1.1 fvdl if (!(sc->ex_conf & EX_CONF_90XB) || ifp->if_flags & IFF_ALLMULTI) {
722 1.1 fvdl mask |= (ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0;
723 1.1 fvdl } else {
724 1.1 fvdl ETHER_FIRST_MULTI(estep, ec, enm);
725 1.1 fvdl while (enm != NULL) {
726 1.1 fvdl if (bcmp(enm->enm_addrlo, enm->enm_addrhi,
727 1.1 fvdl ETHER_ADDR_LEN) != 0)
728 1.1 fvdl goto out;
729 1.1 fvdl i = ex_mchash(enm->enm_addrlo);
730 1.1 fvdl bus_space_write_2(sc->sc_iot, sc->sc_ioh,
731 1.1 fvdl ELINK_COMMAND, ELINK_SETHASHFILBIT | i);
732 1.1 fvdl ETHER_NEXT_MULTI(estep, enm);
733 1.1 fvdl }
734 1.1 fvdl mask |= FIL_MULTIHASH;
735 1.1 fvdl }
736 1.1 fvdl out:
737 1.1 fvdl bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND,
738 1.1 fvdl SET_RX_FILTER | mask);
739 1.1 fvdl }
740 1.1 fvdl
741 1.1 fvdl
742 1.1 fvdl static void
743 1.1 fvdl ex_txstat(sc)
744 1.1 fvdl struct ex_softc *sc;
745 1.1 fvdl {
746 1.42 thorpej struct ifnet *ifp = &sc->sc_ethercom.ec_if;
747 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
748 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
749 1.1 fvdl int i;
750 1.1 fvdl
751 1.1 fvdl /*
752 1.1 fvdl * We need to read+write TX_STATUS until we get a 0 status
753 1.1 fvdl * in order to turn off the interrupt flag.
754 1.1 fvdl */
755 1.1 fvdl while ((i = bus_space_read_1(iot, ioh, ELINK_TXSTATUS)) & TXS_COMPLETE) {
756 1.1 fvdl bus_space_write_1(iot, ioh, ELINK_TXSTATUS, 0x0);
757 1.1 fvdl
758 1.1 fvdl if (i & TXS_JABBER) {
759 1.1 fvdl ++sc->sc_ethercom.ec_if.if_oerrors;
760 1.1 fvdl if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG)
761 1.1 fvdl printf("%s: jabber (%x)\n",
762 1.1 fvdl sc->sc_dev.dv_xname, i);
763 1.42 thorpej ex_init(ifp);
764 1.1 fvdl /* TODO: be more subtle here */
765 1.1 fvdl } else if (i & TXS_UNDERRUN) {
766 1.1 fvdl ++sc->sc_ethercom.ec_if.if_oerrors;
767 1.1 fvdl if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG)
768 1.1 fvdl printf("%s: fifo underrun (%x) @%d\n",
769 1.1 fvdl sc->sc_dev.dv_xname, i,
770 1.1 fvdl sc->tx_start_thresh);
771 1.1 fvdl if (sc->tx_succ_ok < 100)
772 1.1 fvdl sc->tx_start_thresh = min(ETHER_MAX_LEN,
773 1.1 fvdl sc->tx_start_thresh + 20);
774 1.1 fvdl sc->tx_succ_ok = 0;
775 1.42 thorpej ex_init(ifp);
776 1.1 fvdl /* TODO: be more subtle here */
777 1.1 fvdl } else if (i & TXS_MAX_COLLISION) {
778 1.1 fvdl ++sc->sc_ethercom.ec_if.if_collisions;
779 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE);
780 1.1 fvdl sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE;
781 1.1 fvdl } else
782 1.1 fvdl sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127;
783 1.1 fvdl }
784 1.1 fvdl }
785 1.1 fvdl
786 1.1 fvdl int
787 1.1 fvdl ex_media_chg(ifp)
788 1.1 fvdl struct ifnet *ifp;
789 1.1 fvdl {
790 1.1 fvdl
791 1.1 fvdl if (ifp->if_flags & IFF_UP)
792 1.42 thorpej ex_init(ifp);
793 1.1 fvdl return 0;
794 1.1 fvdl }
795 1.1 fvdl
796 1.1 fvdl void
797 1.1 fvdl ex_set_media(sc)
798 1.1 fvdl struct ex_softc *sc;
799 1.1 fvdl {
800 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
801 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
802 1.37 haya u_int32_t configreg;
803 1.1 fvdl
804 1.1 fvdl if (((sc->ex_conf & EX_CONF_MII) &&
805 1.1 fvdl (sc->ex_mii.mii_media_active & IFM_FDX))
806 1.1 fvdl || (!(sc->ex_conf & EX_CONF_MII) &&
807 1.1 fvdl (sc->ex_mii.mii_media.ifm_media & IFM_FDX))) {
808 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL,
809 1.1 fvdl MAC_CONTROL_FDX);
810 1.1 fvdl } else {
811 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 0);
812 1.1 fvdl }
813 1.1 fvdl
814 1.1 fvdl /*
815 1.1 fvdl * If the device has MII, select it, and then tell the
816 1.1 fvdl * PHY which media to use.
817 1.1 fvdl */
818 1.1 fvdl if (sc->ex_conf & EX_CONF_MII) {
819 1.1 fvdl GO_WINDOW(3);
820 1.1 fvdl
821 1.37 haya configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG);
822 1.1 fvdl
823 1.37 haya configreg &= ~(CONFIG_MEDIAMASK << 16);
824 1.37 haya configreg |= (ELINKMEDIA_MII << (CONFIG_MEDIAMASK_SHIFT + 16));
825 1.1 fvdl
826 1.37 haya bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg);
827 1.1 fvdl mii_mediachg(&sc->ex_mii);
828 1.1 fvdl return;
829 1.1 fvdl }
830 1.1 fvdl
831 1.1 fvdl GO_WINDOW(4);
832 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0);
833 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER);
834 1.1 fvdl delay(800);
835 1.1 fvdl
836 1.1 fvdl /*
837 1.1 fvdl * Now turn on the selected media/transceiver.
838 1.1 fvdl */
839 1.1 fvdl switch (IFM_SUBTYPE(sc->ex_mii.mii_media.ifm_cur->ifm_media)) {
840 1.1 fvdl case IFM_10_T:
841 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE,
842 1.1 fvdl JABBER_GUARD_ENABLE|LINKBEAT_ENABLE);
843 1.1 fvdl break;
844 1.1 fvdl
845 1.1 fvdl case IFM_10_2:
846 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER);
847 1.1 fvdl DELAY(800);
848 1.1 fvdl break;
849 1.1 fvdl
850 1.1 fvdl case IFM_100_TX:
851 1.1 fvdl case IFM_100_FX:
852 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE,
853 1.1 fvdl LINKBEAT_ENABLE);
854 1.1 fvdl DELAY(800);
855 1.1 fvdl break;
856 1.1 fvdl
857 1.1 fvdl case IFM_10_5:
858 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE,
859 1.1 fvdl SQE_ENABLE);
860 1.1 fvdl DELAY(800);
861 1.1 fvdl break;
862 1.1 fvdl
863 1.1 fvdl case IFM_MANUAL:
864 1.1 fvdl break;
865 1.1 fvdl
866 1.1 fvdl case IFM_NONE:
867 1.1 fvdl return;
868 1.1 fvdl
869 1.1 fvdl default:
870 1.1 fvdl panic("ex_set_media: impossible");
871 1.1 fvdl }
872 1.1 fvdl
873 1.1 fvdl GO_WINDOW(3);
874 1.37 haya configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG);
875 1.1 fvdl
876 1.37 haya configreg &= ~(CONFIG_MEDIAMASK << 16);
877 1.37 haya configreg |= (sc->ex_mii.mii_media.ifm_cur->ifm_data <<
878 1.37 haya (CONFIG_MEDIAMASK_SHIFT + 16));
879 1.1 fvdl
880 1.37 haya bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg);
881 1.1 fvdl }
882 1.1 fvdl
883 1.1 fvdl /*
884 1.1 fvdl * Get currently-selected media from card.
885 1.1 fvdl * (if_media callback, may be called before interface is brought up).
886 1.1 fvdl */
887 1.1 fvdl void
888 1.1 fvdl ex_media_stat(ifp, req)
889 1.1 fvdl struct ifnet *ifp;
890 1.1 fvdl struct ifmediareq *req;
891 1.1 fvdl {
892 1.1 fvdl struct ex_softc *sc = ifp->if_softc;
893 1.1 fvdl
894 1.1 fvdl if (sc->ex_conf & EX_CONF_MII) {
895 1.1 fvdl mii_pollstat(&sc->ex_mii);
896 1.1 fvdl req->ifm_status = sc->ex_mii.mii_media_status;
897 1.1 fvdl req->ifm_active = sc->ex_mii.mii_media_active;
898 1.1 fvdl } else {
899 1.1 fvdl GO_WINDOW(4);
900 1.1 fvdl req->ifm_status = IFM_AVALID;
901 1.1 fvdl req->ifm_active = sc->ex_mii.mii_media.ifm_cur->ifm_media;
902 1.1 fvdl if (bus_space_read_2(sc->sc_iot, sc->sc_ioh,
903 1.1 fvdl ELINK_W4_MEDIA_TYPE) & LINKBEAT_DETECT)
904 1.1 fvdl req->ifm_status |= IFM_ACTIVE;
905 1.1 fvdl GO_WINDOW(1);
906 1.1 fvdl }
907 1.1 fvdl }
908 1.1 fvdl
909 1.1 fvdl
910 1.1 fvdl
911 1.1 fvdl /*
912 1.1 fvdl * Start outputting on the interface.
913 1.1 fvdl */
914 1.1 fvdl static void
915 1.1 fvdl ex_start(ifp)
916 1.1 fvdl struct ifnet *ifp;
917 1.1 fvdl {
918 1.1 fvdl struct ex_softc *sc = ifp->if_softc;
919 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
920 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
921 1.1 fvdl volatile struct ex_fraghdr *fr = NULL;
922 1.1 fvdl volatile struct ex_dpd *dpd = NULL, *prevdpd = NULL;
923 1.1 fvdl struct ex_txdesc *txp;
924 1.46 thorpej struct mbuf *mb_head;
925 1.1 fvdl bus_dmamap_t dmamap;
926 1.46 thorpej int offset, totlen, segment, error;
927 1.1 fvdl
928 1.1 fvdl if (sc->tx_head || sc->tx_free == NULL)
929 1.1 fvdl return;
930 1.1 fvdl
931 1.1 fvdl txp = NULL;
932 1.1 fvdl
933 1.1 fvdl /*
934 1.1 fvdl * We're finished if there is nothing more to add to the list or if
935 1.1 fvdl * we're all filled up with buffers to transmit.
936 1.1 fvdl */
937 1.46 thorpej while (sc->tx_free != NULL) {
938 1.1 fvdl /*
939 1.1 fvdl * Grab a packet to transmit.
940 1.1 fvdl */
941 1.46 thorpej IFQ_DEQUEUE(&ifp->if_snd, mb_head);
942 1.46 thorpej if (mb_head == NULL)
943 1.46 thorpej break;
944 1.1 fvdl
945 1.1 fvdl /*
946 1.1 fvdl * Get pointer to next available tx desc.
947 1.1 fvdl */
948 1.1 fvdl txp = sc->tx_free;
949 1.1 fvdl sc->tx_free = txp->tx_next;
950 1.1 fvdl txp->tx_next = NULL;
951 1.1 fvdl dmamap = txp->tx_dmamap;
952 1.1 fvdl
953 1.1 fvdl /*
954 1.1 fvdl * Go through each of the mbufs in the chain and initialize
955 1.1 fvdl * the transmit buffer descriptors with the physical address
956 1.1 fvdl * and size of the mbuf.
957 1.1 fvdl */
958 1.1 fvdl reload:
959 1.1 fvdl error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap,
960 1.1 fvdl mb_head, BUS_DMA_NOWAIT);
961 1.1 fvdl switch (error) {
962 1.1 fvdl case 0:
963 1.1 fvdl /* Success. */
964 1.1 fvdl break;
965 1.1 fvdl
966 1.1 fvdl case EFBIG:
967 1.1 fvdl {
968 1.1 fvdl struct mbuf *mn;
969 1.1 fvdl
970 1.1 fvdl /*
971 1.1 fvdl * We ran out of segments. We have to recopy this
972 1.1 fvdl * mbuf chain first. Bail out if we can't get the
973 1.1 fvdl * new buffers.
974 1.1 fvdl */
975 1.1 fvdl printf("%s: too many segments, ", sc->sc_dev.dv_xname);
976 1.1 fvdl
977 1.1 fvdl MGETHDR(mn, M_DONTWAIT, MT_DATA);
978 1.1 fvdl if (mn == NULL) {
979 1.1 fvdl m_freem(mb_head);
980 1.1 fvdl printf("aborting\n");
981 1.1 fvdl goto out;
982 1.1 fvdl }
983 1.1 fvdl if (mb_head->m_pkthdr.len > MHLEN) {
984 1.1 fvdl MCLGET(mn, M_DONTWAIT);
985 1.1 fvdl if ((mn->m_flags & M_EXT) == 0) {
986 1.1 fvdl m_freem(mn);
987 1.1 fvdl m_freem(mb_head);
988 1.1 fvdl printf("aborting\n");
989 1.1 fvdl goto out;
990 1.1 fvdl }
991 1.1 fvdl }
992 1.1 fvdl m_copydata(mb_head, 0, mb_head->m_pkthdr.len,
993 1.1 fvdl mtod(mn, caddr_t));
994 1.1 fvdl mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len;
995 1.1 fvdl m_freem(mb_head);
996 1.1 fvdl mb_head = mn;
997 1.1 fvdl printf("retrying\n");
998 1.1 fvdl goto reload;
999 1.1 fvdl }
1000 1.1 fvdl
1001 1.1 fvdl default:
1002 1.1 fvdl /*
1003 1.1 fvdl * Some other problem; report it.
1004 1.1 fvdl */
1005 1.1 fvdl printf("%s: can't load mbuf chain, error = %d\n",
1006 1.1 fvdl sc->sc_dev.dv_xname, error);
1007 1.1 fvdl m_freem(mb_head);
1008 1.1 fvdl goto out;
1009 1.1 fvdl }
1010 1.1 fvdl
1011 1.1 fvdl fr = &txp->tx_dpd->dpd_frags[0];
1012 1.1 fvdl totlen = 0;
1013 1.1 fvdl for (segment = 0; segment < dmamap->dm_nsegs; segment++, fr++) {
1014 1.21 thorpej fr->fr_addr = htole32(dmamap->dm_segs[segment].ds_addr);
1015 1.21 thorpej fr->fr_len = htole32(dmamap->dm_segs[segment].ds_len);
1016 1.9 thorpej totlen += dmamap->dm_segs[segment].ds_len;
1017 1.1 fvdl }
1018 1.1 fvdl fr--;
1019 1.21 thorpej fr->fr_len |= htole32(EX_FR_LAST);
1020 1.1 fvdl txp->tx_mbhead = mb_head;
1021 1.1 fvdl
1022 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize,
1023 1.1 fvdl BUS_DMASYNC_PREWRITE);
1024 1.1 fvdl
1025 1.1 fvdl dpd = txp->tx_dpd;
1026 1.1 fvdl dpd->dpd_nextptr = 0;
1027 1.21 thorpej dpd->dpd_fsh = htole32(totlen);
1028 1.1 fvdl
1029 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1030 1.1 fvdl ((caddr_t)dpd - (caddr_t)sc->sc_dpd),
1031 1.1 fvdl sizeof (struct ex_dpd),
1032 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1033 1.1 fvdl
1034 1.1 fvdl /*
1035 1.1 fvdl * No need to stall the download engine, we know it's
1036 1.1 fvdl * not busy right now.
1037 1.1 fvdl *
1038 1.1 fvdl * Fix up pointers in both the "soft" tx and the physical
1039 1.1 fvdl * tx list.
1040 1.1 fvdl */
1041 1.1 fvdl if (sc->tx_head != NULL) {
1042 1.1 fvdl prevdpd = sc->tx_tail->tx_dpd;
1043 1.1 fvdl offset = ((caddr_t)prevdpd - (caddr_t)sc->sc_dpd);
1044 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1045 1.1 fvdl offset, sizeof (struct ex_dpd),
1046 1.1 fvdl BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1047 1.21 thorpej prevdpd->dpd_nextptr = htole32(DPD_DMADDR(sc, txp));
1048 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1049 1.1 fvdl offset, sizeof (struct ex_dpd),
1050 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1051 1.1 fvdl sc->tx_tail->tx_next = txp;
1052 1.1 fvdl sc->tx_tail = txp;
1053 1.1 fvdl } else {
1054 1.1 fvdl sc->tx_tail = sc->tx_head = txp;
1055 1.1 fvdl }
1056 1.1 fvdl
1057 1.1 fvdl #if NBPFILTER > 0
1058 1.1 fvdl /*
1059 1.1 fvdl * Pass packet to bpf if there is a listener.
1060 1.1 fvdl */
1061 1.1 fvdl if (ifp->if_bpf)
1062 1.1 fvdl bpf_mtap(ifp->if_bpf, mb_head);
1063 1.1 fvdl #endif
1064 1.1 fvdl }
1065 1.1 fvdl out:
1066 1.1 fvdl if (sc->tx_head) {
1067 1.21 thorpej sc->tx_tail->tx_dpd->dpd_fsh |= htole32(EX_DPD_DNIND);
1068 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1069 1.1 fvdl ((caddr_t)sc->tx_tail->tx_dpd - (caddr_t)sc->sc_dpd),
1070 1.1 fvdl sizeof (struct ex_dpd),
1071 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1072 1.1 fvdl ifp->if_flags |= IFF_OACTIVE;
1073 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_DNUNSTALL);
1074 1.1 fvdl bus_space_write_4(iot, ioh, ELINK_DNLISTPTR,
1075 1.1 fvdl DPD_DMADDR(sc, sc->tx_head));
1076 1.3 drochner
1077 1.3 drochner /* trigger watchdog */
1078 1.3 drochner ifp->if_timer = 5;
1079 1.1 fvdl }
1080 1.1 fvdl }
1081 1.1 fvdl
1082 1.1 fvdl
1083 1.1 fvdl int
1084 1.1 fvdl ex_intr(arg)
1085 1.1 fvdl void *arg;
1086 1.1 fvdl {
1087 1.1 fvdl struct ex_softc *sc = arg;
1088 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1089 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1090 1.1 fvdl u_int16_t stat;
1091 1.1 fvdl int ret = 0;
1092 1.1 fvdl struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1093 1.1 fvdl
1094 1.28 enami if (sc->enabled == 0 ||
1095 1.28 enami (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0)
1096 1.28 enami return (0);
1097 1.28 enami
1098 1.1 fvdl for (;;) {
1099 1.22 mycroft bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH);
1100 1.22 mycroft
1101 1.1 fvdl stat = bus_space_read_2(iot, ioh, ELINK_STATUS);
1102 1.22 mycroft
1103 1.22 mycroft if ((stat & S_MASK) == 0) {
1104 1.22 mycroft if ((stat & S_INTR_LATCH) == 0) {
1105 1.22 mycroft #if 0
1106 1.22 mycroft printf("%s: intr latch cleared\n",
1107 1.22 mycroft sc->sc_dev.dv_xname);
1108 1.22 mycroft #endif
1109 1.22 mycroft break;
1110 1.22 mycroft }
1111 1.22 mycroft }
1112 1.22 mycroft
1113 1.22 mycroft ret = 1;
1114 1.22 mycroft
1115 1.1 fvdl /*
1116 1.1 fvdl * Acknowledge interrupts.
1117 1.1 fvdl */
1118 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR |
1119 1.22 mycroft (stat & S_MASK));
1120 1.15 haya if (sc->intr_ack)
1121 1.22 mycroft (*sc->intr_ack)(sc);
1122 1.22 mycroft
1123 1.1 fvdl if (stat & S_HOST_ERROR) {
1124 1.1 fvdl printf("%s: adapter failure (%x)\n",
1125 1.1 fvdl sc->sc_dev.dv_xname, stat);
1126 1.1 fvdl ex_reset(sc);
1127 1.42 thorpej ex_init(ifp);
1128 1.1 fvdl return 1;
1129 1.1 fvdl }
1130 1.1 fvdl if (stat & S_TX_COMPLETE) {
1131 1.1 fvdl ex_txstat(sc);
1132 1.1 fvdl }
1133 1.1 fvdl if (stat & S_UPD_STATS) {
1134 1.1 fvdl ex_getstats(sc);
1135 1.1 fvdl }
1136 1.1 fvdl if (stat & S_DN_COMPLETE) {
1137 1.1 fvdl struct ex_txdesc *txp, *ptxp = NULL;
1138 1.1 fvdl bus_dmamap_t txmap;
1139 1.3 drochner
1140 1.3 drochner /* reset watchdog timer, was set in ex_start() */
1141 1.3 drochner ifp->if_timer = 0;
1142 1.3 drochner
1143 1.1 fvdl for (txp = sc->tx_head; txp != NULL;
1144 1.1 fvdl txp = txp->tx_next) {
1145 1.1 fvdl bus_dmamap_sync(sc->sc_dmat,
1146 1.1 fvdl sc->sc_dpd_dmamap,
1147 1.1 fvdl (caddr_t)txp->tx_dpd - (caddr_t)sc->sc_dpd,
1148 1.1 fvdl sizeof (struct ex_dpd),
1149 1.1 fvdl BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1150 1.1 fvdl if (txp->tx_mbhead != NULL) {
1151 1.1 fvdl txmap = txp->tx_dmamap;
1152 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, txmap,
1153 1.1 fvdl 0, txmap->dm_mapsize,
1154 1.1 fvdl BUS_DMASYNC_POSTWRITE);
1155 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, txmap);
1156 1.1 fvdl m_freem(txp->tx_mbhead);
1157 1.1 fvdl txp->tx_mbhead = NULL;
1158 1.1 fvdl }
1159 1.1 fvdl ptxp = txp;
1160 1.1 fvdl }
1161 1.1 fvdl
1162 1.1 fvdl /*
1163 1.1 fvdl * Move finished tx buffers back to the tx free list.
1164 1.1 fvdl */
1165 1.1 fvdl if (sc->tx_free) {
1166 1.1 fvdl sc->tx_ftail->tx_next = sc->tx_head;
1167 1.1 fvdl sc->tx_ftail = ptxp;
1168 1.1 fvdl } else
1169 1.1 fvdl sc->tx_ftail = sc->tx_free = sc->tx_head;
1170 1.1 fvdl
1171 1.1 fvdl sc->tx_head = sc->tx_tail = NULL;
1172 1.1 fvdl ifp->if_flags &= ~IFF_OACTIVE;
1173 1.1 fvdl }
1174 1.1 fvdl
1175 1.1 fvdl if (stat & S_UP_COMPLETE) {
1176 1.1 fvdl struct ex_rxdesc *rxd;
1177 1.1 fvdl struct mbuf *m;
1178 1.1 fvdl struct ex_upd *upd;
1179 1.1 fvdl bus_dmamap_t rxmap;
1180 1.1 fvdl u_int32_t pktstat;
1181 1.1 fvdl
1182 1.1 fvdl rcvloop:
1183 1.1 fvdl rxd = sc->rx_head;
1184 1.1 fvdl rxmap = rxd->rx_dmamap;
1185 1.1 fvdl m = rxd->rx_mbhead;
1186 1.1 fvdl upd = rxd->rx_upd;
1187 1.1 fvdl
1188 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, rxmap, 0,
1189 1.1 fvdl rxmap->dm_mapsize,
1190 1.1 fvdl BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1191 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap,
1192 1.1 fvdl ((caddr_t)upd - (caddr_t)sc->sc_upd),
1193 1.1 fvdl sizeof (struct ex_upd),
1194 1.1 fvdl BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1195 1.32 tsutsui pktstat = le32toh(upd->upd_pktstatus);
1196 1.1 fvdl
1197 1.1 fvdl if (pktstat & EX_UPD_COMPLETE) {
1198 1.1 fvdl /*
1199 1.1 fvdl * Remove first packet from the chain.
1200 1.1 fvdl */
1201 1.1 fvdl sc->rx_head = rxd->rx_next;
1202 1.1 fvdl rxd->rx_next = NULL;
1203 1.1 fvdl
1204 1.1 fvdl /*
1205 1.1 fvdl * Add a new buffer to the receive chain.
1206 1.1 fvdl * If this fails, the old buffer is recycled
1207 1.1 fvdl * instead.
1208 1.1 fvdl */
1209 1.1 fvdl if (ex_add_rxbuf(sc, rxd) == 0) {
1210 1.1 fvdl u_int16_t total_len;
1211 1.1 fvdl
1212 1.43 bouyer if (pktstat &
1213 1.43 bouyer ((sc->sc_ethercom.ec_capenable &
1214 1.43 bouyer ETHERCAP_VLAN_MTU) ?
1215 1.43 bouyer EX_UPD_ERR_VLAN : EX_UPD_ERR)) {
1216 1.1 fvdl ifp->if_ierrors++;
1217 1.1 fvdl m_freem(m);
1218 1.1 fvdl goto rcvloop;
1219 1.1 fvdl }
1220 1.1 fvdl
1221 1.1 fvdl total_len = pktstat & EX_UPD_PKTLENMASK;
1222 1.1 fvdl if (total_len <
1223 1.1 fvdl sizeof(struct ether_header)) {
1224 1.1 fvdl m_freem(m);
1225 1.1 fvdl goto rcvloop;
1226 1.1 fvdl }
1227 1.1 fvdl m->m_pkthdr.rcvif = ifp;
1228 1.13 thorpej m->m_pkthdr.len = m->m_len = total_len;
1229 1.1 fvdl #if NBPFILTER > 0
1230 1.41 thorpej if (ifp->if_bpf)
1231 1.41 thorpej bpf_mtap(ifp->if_bpf, m);
1232 1.41 thorpej #endif
1233 1.13 thorpej (*ifp->if_input)(ifp, m);
1234 1.1 fvdl }
1235 1.1 fvdl goto rcvloop;
1236 1.1 fvdl }
1237 1.1 fvdl /*
1238 1.1 fvdl * Just in case we filled up all UPDs and the DMA engine
1239 1.3 drochner * stalled. We could be more subtle about this.
1240 1.1 fvdl */
1241 1.3 drochner if (bus_space_read_4(iot, ioh, ELINK_UPLISTPTR) == 0) {
1242 1.3 drochner printf("%s: uplistptr was 0\n",
1243 1.3 drochner sc->sc_dev.dv_xname);
1244 1.42 thorpej ex_init(ifp);
1245 1.3 drochner } else if (bus_space_read_4(iot, ioh, ELINK_UPPKTSTATUS)
1246 1.3 drochner & 0x2000) {
1247 1.3 drochner printf("%s: receive stalled\n",
1248 1.3 drochner sc->sc_dev.dv_xname);
1249 1.3 drochner bus_space_write_2(iot, ioh, ELINK_COMMAND,
1250 1.3 drochner ELINK_UPUNSTALL);
1251 1.3 drochner }
1252 1.1 fvdl }
1253 1.1 fvdl }
1254 1.22 mycroft
1255 1.22 mycroft /* no more interrupts */
1256 1.46 thorpej if (ret && IFQ_IS_EMPTY(&ifp->if_snd) == 0)
1257 1.22 mycroft ex_start(ifp);
1258 1.1 fvdl return ret;
1259 1.1 fvdl }
1260 1.1 fvdl
1261 1.1 fvdl int
1262 1.1 fvdl ex_ioctl(ifp, cmd, data)
1263 1.31 augustss struct ifnet *ifp;
1264 1.1 fvdl u_long cmd;
1265 1.1 fvdl caddr_t data;
1266 1.1 fvdl {
1267 1.1 fvdl struct ex_softc *sc = ifp->if_softc;
1268 1.1 fvdl struct ifreq *ifr = (struct ifreq *)data;
1269 1.42 thorpej int s, error;
1270 1.1 fvdl
1271 1.1 fvdl s = splnet();
1272 1.1 fvdl
1273 1.1 fvdl switch (cmd) {
1274 1.1 fvdl case SIOCSIFMEDIA:
1275 1.1 fvdl case SIOCGIFMEDIA:
1276 1.1 fvdl error = ifmedia_ioctl(ifp, ifr, &sc->ex_mii.mii_media, cmd);
1277 1.1 fvdl break;
1278 1.1 fvdl
1279 1.42 thorpej default:
1280 1.42 thorpej error = ether_ioctl(ifp, cmd, data);
1281 1.1 fvdl if (error == ENETRESET) {
1282 1.1 fvdl /*
1283 1.1 fvdl * Multicast list has changed; set the hardware filter
1284 1.1 fvdl * accordingly.
1285 1.1 fvdl */
1286 1.1 fvdl ex_set_mc(sc);
1287 1.1 fvdl error = 0;
1288 1.1 fvdl }
1289 1.1 fvdl break;
1290 1.1 fvdl }
1291 1.1 fvdl
1292 1.1 fvdl splx(s);
1293 1.1 fvdl return (error);
1294 1.1 fvdl }
1295 1.1 fvdl
1296 1.1 fvdl void
1297 1.1 fvdl ex_getstats(sc)
1298 1.1 fvdl struct ex_softc *sc;
1299 1.1 fvdl {
1300 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1301 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1302 1.1 fvdl struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1303 1.1 fvdl u_int8_t upperok;
1304 1.1 fvdl
1305 1.1 fvdl GO_WINDOW(6);
1306 1.1 fvdl upperok = bus_space_read_1(iot, ioh, UPPER_FRAMES_OK);
1307 1.1 fvdl ifp->if_ipackets += bus_space_read_1(iot, ioh, RX_FRAMES_OK);
1308 1.1 fvdl ifp->if_ipackets += (upperok & 0x03) << 8;
1309 1.1 fvdl ifp->if_opackets += bus_space_read_1(iot, ioh, TX_FRAMES_OK);
1310 1.1 fvdl ifp->if_opackets += (upperok & 0x30) << 4;
1311 1.1 fvdl ifp->if_ierrors += bus_space_read_1(iot, ioh, RX_OVERRUNS);
1312 1.1 fvdl ifp->if_collisions += bus_space_read_1(iot, ioh, TX_COLLISIONS);
1313 1.1 fvdl /*
1314 1.1 fvdl * There seems to be no way to get the exact number of collisions,
1315 1.1 fvdl * this is the number that occured at the very least.
1316 1.1 fvdl */
1317 1.1 fvdl ifp->if_collisions += 2 * bus_space_read_1(iot, ioh,
1318 1.1 fvdl TX_AFTER_X_COLLISIONS);
1319 1.1 fvdl ifp->if_ibytes += bus_space_read_2(iot, ioh, RX_TOTAL_OK);
1320 1.1 fvdl ifp->if_obytes += bus_space_read_2(iot, ioh, TX_TOTAL_OK);
1321 1.1 fvdl
1322 1.1 fvdl /*
1323 1.1 fvdl * Clear the following to avoid stats overflow interrupts
1324 1.1 fvdl */
1325 1.12 drochner bus_space_read_1(iot, ioh, TX_DEFERRALS);
1326 1.1 fvdl bus_space_read_1(iot, ioh, TX_AFTER_1_COLLISION);
1327 1.1 fvdl bus_space_read_1(iot, ioh, TX_NO_SQE);
1328 1.1 fvdl bus_space_read_1(iot, ioh, TX_CD_LOST);
1329 1.1 fvdl GO_WINDOW(4);
1330 1.1 fvdl bus_space_read_1(iot, ioh, ELINK_W4_BADSSD);
1331 1.1 fvdl upperok = bus_space_read_1(iot, ioh, ELINK_W4_UBYTESOK);
1332 1.1 fvdl ifp->if_ibytes += (upperok & 0x0f) << 16;
1333 1.1 fvdl ifp->if_obytes += (upperok & 0xf0) << 12;
1334 1.1 fvdl GO_WINDOW(1);
1335 1.1 fvdl }
1336 1.1 fvdl
1337 1.1 fvdl void
1338 1.1 fvdl ex_printstats(sc)
1339 1.1 fvdl struct ex_softc *sc;
1340 1.1 fvdl {
1341 1.1 fvdl struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1342 1.1 fvdl
1343 1.1 fvdl ex_getstats(sc);
1344 1.20 bouyer printf("in %llu out %llu ierror %llu oerror %llu ibytes %llu obytes "
1345 1.20 bouyer "%llu\n", (unsigned long long)ifp->if_ipackets,
1346 1.20 bouyer (unsigned long long)ifp->if_opackets,
1347 1.20 bouyer (unsigned long long)ifp->if_ierrors,
1348 1.20 bouyer (unsigned long long)ifp->if_oerrors,
1349 1.20 bouyer (unsigned long long)ifp->if_ibytes,
1350 1.20 bouyer (unsigned long long)ifp->if_obytes);
1351 1.1 fvdl }
1352 1.1 fvdl
1353 1.1 fvdl void
1354 1.1 fvdl ex_tick(arg)
1355 1.1 fvdl void *arg;
1356 1.1 fvdl {
1357 1.1 fvdl struct ex_softc *sc = arg;
1358 1.28 enami int s;
1359 1.28 enami
1360 1.28 enami if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0)
1361 1.28 enami return;
1362 1.28 enami
1363 1.28 enami s = splnet();
1364 1.1 fvdl
1365 1.1 fvdl if (sc->ex_conf & EX_CONF_MII)
1366 1.1 fvdl mii_tick(&sc->ex_mii);
1367 1.1 fvdl
1368 1.1 fvdl if (!(bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, ELINK_STATUS)
1369 1.1 fvdl & S_COMMAND_IN_PROGRESS))
1370 1.1 fvdl ex_getstats(sc);
1371 1.1 fvdl
1372 1.1 fvdl splx(s);
1373 1.1 fvdl
1374 1.30 thorpej callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc);
1375 1.1 fvdl }
1376 1.1 fvdl
1377 1.1 fvdl void
1378 1.1 fvdl ex_reset(sc)
1379 1.1 fvdl struct ex_softc *sc;
1380 1.1 fvdl {
1381 1.40 fvdl u_int16_t val = GLOBAL_RESET;
1382 1.40 fvdl
1383 1.40 fvdl if (sc->ex_conf & EX_CONF_RESETHACK)
1384 1.40 fvdl val |= 0xff;
1385 1.40 fvdl bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, val);
1386 1.10 dean delay(400);
1387 1.1 fvdl ex_waitcmd(sc);
1388 1.1 fvdl }
1389 1.1 fvdl
1390 1.1 fvdl void
1391 1.1 fvdl ex_watchdog(ifp)
1392 1.1 fvdl struct ifnet *ifp;
1393 1.1 fvdl {
1394 1.1 fvdl struct ex_softc *sc = ifp->if_softc;
1395 1.1 fvdl
1396 1.1 fvdl log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
1397 1.1 fvdl ++sc->sc_ethercom.ec_if.if_oerrors;
1398 1.1 fvdl
1399 1.1 fvdl ex_reset(sc);
1400 1.42 thorpej ex_init(ifp);
1401 1.1 fvdl }
1402 1.1 fvdl
1403 1.1 fvdl void
1404 1.42 thorpej ex_stop(ifp, disable)
1405 1.42 thorpej struct ifnet *ifp;
1406 1.42 thorpej int disable;
1407 1.1 fvdl {
1408 1.42 thorpej struct ex_softc *sc = ifp->if_softc;
1409 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1410 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1411 1.1 fvdl struct ex_txdesc *tx;
1412 1.1 fvdl struct ex_rxdesc *rx;
1413 1.1 fvdl int i;
1414 1.1 fvdl
1415 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE);
1416 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE);
1417 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER);
1418 1.1 fvdl
1419 1.1 fvdl for (tx = sc->tx_head ; tx != NULL; tx = tx->tx_next) {
1420 1.1 fvdl if (tx->tx_mbhead == NULL)
1421 1.1 fvdl continue;
1422 1.1 fvdl m_freem(tx->tx_mbhead);
1423 1.1 fvdl tx->tx_mbhead = NULL;
1424 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, tx->tx_dmamap);
1425 1.1 fvdl tx->tx_dpd->dpd_fsh = tx->tx_dpd->dpd_nextptr = 0;
1426 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap,
1427 1.1 fvdl ((caddr_t)tx->tx_dpd - (caddr_t)sc->sc_dpd),
1428 1.1 fvdl sizeof (struct ex_dpd),
1429 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1430 1.1 fvdl }
1431 1.1 fvdl sc->tx_tail = sc->tx_head = NULL;
1432 1.1 fvdl ex_init_txdescs(sc);
1433 1.1 fvdl
1434 1.1 fvdl sc->rx_tail = sc->rx_head = 0;
1435 1.1 fvdl for (i = 0; i < EX_NUPD; i++) {
1436 1.1 fvdl rx = &sc->sc_rxdescs[i];
1437 1.1 fvdl if (rx->rx_mbhead != NULL) {
1438 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, rx->rx_dmamap);
1439 1.1 fvdl m_freem(rx->rx_mbhead);
1440 1.1 fvdl rx->rx_mbhead = NULL;
1441 1.1 fvdl }
1442 1.1 fvdl ex_add_rxbuf(sc, rx);
1443 1.1 fvdl }
1444 1.1 fvdl
1445 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH);
1446 1.1 fvdl
1447 1.30 thorpej callout_stop(&sc->ex_mii_callout);
1448 1.17 thorpej if (sc->ex_conf & EX_CONF_MII)
1449 1.17 thorpej mii_down(&sc->ex_mii);
1450 1.1 fvdl
1451 1.1 fvdl ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1452 1.1 fvdl ifp->if_timer = 0;
1453 1.1 fvdl }
1454 1.1 fvdl
1455 1.1 fvdl static void
1456 1.1 fvdl ex_init_txdescs(sc)
1457 1.1 fvdl struct ex_softc *sc;
1458 1.1 fvdl {
1459 1.1 fvdl int i;
1460 1.1 fvdl
1461 1.1 fvdl for (i = 0; i < EX_NDPD; i++) {
1462 1.1 fvdl sc->sc_txdescs[i].tx_dmamap = sc->sc_tx_dmamaps[i];
1463 1.1 fvdl sc->sc_txdescs[i].tx_dpd = &sc->sc_dpd[i];
1464 1.1 fvdl if (i < EX_NDPD - 1)
1465 1.1 fvdl sc->sc_txdescs[i].tx_next = &sc->sc_txdescs[i + 1];
1466 1.1 fvdl else
1467 1.1 fvdl sc->sc_txdescs[i].tx_next = NULL;
1468 1.1 fvdl }
1469 1.1 fvdl sc->tx_free = &sc->sc_txdescs[0];
1470 1.1 fvdl sc->tx_ftail = &sc->sc_txdescs[EX_NDPD-1];
1471 1.1 fvdl }
1472 1.1 fvdl
1473 1.25 augustss
1474 1.25 augustss int
1475 1.25 augustss ex_activate(self, act)
1476 1.25 augustss struct device *self;
1477 1.25 augustss enum devact act;
1478 1.25 augustss {
1479 1.25 augustss struct ex_softc *sc = (void *) self;
1480 1.25 augustss int s, error = 0;
1481 1.25 augustss
1482 1.25 augustss s = splnet();
1483 1.25 augustss switch (act) {
1484 1.25 augustss case DVACT_ACTIVATE:
1485 1.25 augustss error = EOPNOTSUPP;
1486 1.25 augustss break;
1487 1.25 augustss
1488 1.25 augustss case DVACT_DEACTIVATE:
1489 1.27 thorpej if (sc->ex_conf & EX_CONF_MII)
1490 1.27 thorpej mii_activate(&sc->ex_mii, act, MII_PHY_ANY,
1491 1.27 thorpej MII_OFFSET_ANY);
1492 1.25 augustss if_deactivate(&sc->sc_ethercom.ec_if);
1493 1.25 augustss break;
1494 1.25 augustss }
1495 1.25 augustss splx(s);
1496 1.25 augustss
1497 1.25 augustss return (error);
1498 1.25 augustss }
1499 1.25 augustss
1500 1.25 augustss int
1501 1.25 augustss ex_detach(sc)
1502 1.25 augustss struct ex_softc *sc;
1503 1.25 augustss {
1504 1.25 augustss struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1505 1.25 augustss struct ex_rxdesc *rxd;
1506 1.25 augustss int i;
1507 1.34 jhawk
1508 1.34 jhawk /* Succeed now if there's no work to do. */
1509 1.34 jhawk if ((sc->ex_flags & EX_FLAGS_ATTACHED) == 0)
1510 1.34 jhawk return (0);
1511 1.25 augustss
1512 1.25 augustss /* Unhook our tick handler. */
1513 1.30 thorpej callout_stop(&sc->ex_mii_callout);
1514 1.25 augustss
1515 1.26 thorpej if (sc->ex_conf & EX_CONF_MII) {
1516 1.26 thorpej /* Detach all PHYs */
1517 1.26 thorpej mii_detach(&sc->ex_mii, MII_PHY_ANY, MII_OFFSET_ANY);
1518 1.26 thorpej }
1519 1.25 augustss
1520 1.25 augustss /* Delete all remaining media. */
1521 1.25 augustss ifmedia_delete_instance(&sc->ex_mii.mii_media, IFM_INST_ANY);
1522 1.25 augustss
1523 1.25 augustss #if NRND > 0
1524 1.25 augustss rnd_detach_source(&sc->rnd_source);
1525 1.25 augustss #endif
1526 1.25 augustss ether_ifdetach(ifp);
1527 1.25 augustss if_detach(ifp);
1528 1.25 augustss
1529 1.25 augustss for (i = 0; i < EX_NUPD; i++) {
1530 1.25 augustss rxd = &sc->sc_rxdescs[i];
1531 1.25 augustss if (rxd->rx_mbhead != NULL) {
1532 1.25 augustss bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap);
1533 1.25 augustss m_freem(rxd->rx_mbhead);
1534 1.25 augustss rxd->rx_mbhead = NULL;
1535 1.25 augustss }
1536 1.25 augustss }
1537 1.25 augustss for (i = 0; i < EX_NUPD; i++)
1538 1.25 augustss bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]);
1539 1.25 augustss for (i = 0; i < EX_NDPD; i++)
1540 1.25 augustss bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]);
1541 1.25 augustss bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap);
1542 1.25 augustss bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap);
1543 1.25 augustss bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd,
1544 1.25 augustss EX_NDPD * sizeof (struct ex_dpd));
1545 1.25 augustss bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg);
1546 1.25 augustss bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap);
1547 1.25 augustss bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap);
1548 1.25 augustss bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd,
1549 1.25 augustss EX_NUPD * sizeof (struct ex_upd));
1550 1.25 augustss bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg);
1551 1.25 augustss
1552 1.25 augustss shutdownhook_disestablish(sc->sc_sdhook);
1553 1.25 augustss
1554 1.25 augustss return (0);
1555 1.25 augustss }
1556 1.1 fvdl
1557 1.1 fvdl /*
1558 1.1 fvdl * Before reboots, reset card completely.
1559 1.1 fvdl */
1560 1.1 fvdl static void
1561 1.1 fvdl ex_shutdown(arg)
1562 1.1 fvdl void *arg;
1563 1.1 fvdl {
1564 1.31 augustss struct ex_softc *sc = arg;
1565 1.1 fvdl
1566 1.42 thorpej ex_stop(&sc->sc_ethercom.ec_if, 0);
1567 1.1 fvdl }
1568 1.1 fvdl
1569 1.1 fvdl /*
1570 1.1 fvdl * Read EEPROM data.
1571 1.1 fvdl * XXX what to do if EEPROM doesn't unbusy?
1572 1.1 fvdl */
1573 1.1 fvdl u_int16_t
1574 1.1 fvdl ex_read_eeprom(sc, offset)
1575 1.1 fvdl struct ex_softc *sc;
1576 1.1 fvdl int offset;
1577 1.1 fvdl {
1578 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1579 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1580 1.40 fvdl u_int16_t data = 0, cmd = READ_EEPROM;
1581 1.40 fvdl int off;
1582 1.40 fvdl
1583 1.40 fvdl off = sc->ex_conf & EX_CONF_EEPROM_OFF ? 0x30 : 0;
1584 1.40 fvdl cmd = sc->ex_conf & EX_CONF_EEPROM_8BIT ? READ_EEPROM8 : READ_EEPROM;
1585 1.1 fvdl
1586 1.1 fvdl GO_WINDOW(0);
1587 1.1 fvdl if (ex_eeprom_busy(sc))
1588 1.1 fvdl goto out;
1589 1.40 fvdl bus_space_write_2(iot, ioh, ELINK_W0_EEPROM_COMMAND,
1590 1.40 fvdl cmd | (off + (offset & 0x3f)));
1591 1.1 fvdl if (ex_eeprom_busy(sc))
1592 1.1 fvdl goto out;
1593 1.1 fvdl data = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_DATA);
1594 1.1 fvdl out:
1595 1.1 fvdl return data;
1596 1.1 fvdl }
1597 1.1 fvdl
1598 1.1 fvdl static int
1599 1.1 fvdl ex_eeprom_busy(sc)
1600 1.1 fvdl struct ex_softc *sc;
1601 1.1 fvdl {
1602 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1603 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1604 1.1 fvdl int i = 100;
1605 1.1 fvdl
1606 1.1 fvdl while (i--) {
1607 1.1 fvdl if (!(bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND) &
1608 1.1 fvdl EEPROM_BUSY))
1609 1.1 fvdl return 0;
1610 1.1 fvdl delay(100);
1611 1.1 fvdl }
1612 1.1 fvdl printf("\n%s: eeprom stays busy.\n", sc->sc_dev.dv_xname);
1613 1.1 fvdl return (1);
1614 1.1 fvdl }
1615 1.1 fvdl
1616 1.1 fvdl /*
1617 1.1 fvdl * Create a new rx buffer and add it to the 'soft' rx list.
1618 1.1 fvdl */
1619 1.1 fvdl static int
1620 1.1 fvdl ex_add_rxbuf(sc, rxd)
1621 1.1 fvdl struct ex_softc *sc;
1622 1.1 fvdl struct ex_rxdesc *rxd;
1623 1.1 fvdl {
1624 1.1 fvdl struct mbuf *m, *oldm;
1625 1.1 fvdl bus_dmamap_t rxmap;
1626 1.1 fvdl int error, rval = 0;
1627 1.1 fvdl
1628 1.1 fvdl oldm = rxd->rx_mbhead;
1629 1.1 fvdl rxmap = rxd->rx_dmamap;
1630 1.1 fvdl
1631 1.1 fvdl MGETHDR(m, M_DONTWAIT, MT_DATA);
1632 1.1 fvdl if (m != NULL) {
1633 1.1 fvdl MCLGET(m, M_DONTWAIT);
1634 1.1 fvdl if ((m->m_flags & M_EXT) == 0) {
1635 1.1 fvdl m_freem(m);
1636 1.1 fvdl if (oldm == NULL)
1637 1.1 fvdl return 1;
1638 1.1 fvdl m = oldm;
1639 1.1 fvdl m->m_data = m->m_ext.ext_buf;
1640 1.1 fvdl rval = 1;
1641 1.1 fvdl }
1642 1.1 fvdl } else {
1643 1.1 fvdl if (oldm == NULL)
1644 1.1 fvdl return 1;
1645 1.1 fvdl m = oldm;
1646 1.1 fvdl m->m_data = m->m_ext.ext_buf;
1647 1.1 fvdl rval = 1;
1648 1.1 fvdl }
1649 1.1 fvdl
1650 1.1 fvdl /*
1651 1.1 fvdl * Setup the DMA map for this receive buffer.
1652 1.1 fvdl */
1653 1.1 fvdl if (m != oldm) {
1654 1.1 fvdl if (oldm != NULL)
1655 1.1 fvdl bus_dmamap_unload(sc->sc_dmat, rxmap);
1656 1.1 fvdl error = bus_dmamap_load(sc->sc_dmat, rxmap,
1657 1.1 fvdl m->m_ext.ext_buf, MCLBYTES, NULL, BUS_DMA_NOWAIT);
1658 1.1 fvdl if (error) {
1659 1.1 fvdl printf("%s: can't load rx buffer, error = %d\n",
1660 1.1 fvdl sc->sc_dev.dv_xname, error);
1661 1.1 fvdl panic("ex_add_rxbuf"); /* XXX */
1662 1.1 fvdl }
1663 1.1 fvdl }
1664 1.1 fvdl
1665 1.1 fvdl /*
1666 1.1 fvdl * Align for data after 14 byte header.
1667 1.1 fvdl */
1668 1.1 fvdl m->m_data += 2;
1669 1.1 fvdl
1670 1.1 fvdl rxd->rx_mbhead = m;
1671 1.21 thorpej rxd->rx_upd->upd_pktstatus = htole32(MCLBYTES - 2);
1672 1.9 thorpej rxd->rx_upd->upd_frags[0].fr_addr =
1673 1.21 thorpej htole32(rxmap->dm_segs[0].ds_addr + 2);
1674 1.1 fvdl rxd->rx_upd->upd_nextptr = 0;
1675 1.1 fvdl
1676 1.1 fvdl /*
1677 1.1 fvdl * Attach it to the end of the list.
1678 1.1 fvdl */
1679 1.1 fvdl if (sc->rx_head != NULL) {
1680 1.1 fvdl sc->rx_tail->rx_next = rxd;
1681 1.21 thorpej sc->rx_tail->rx_upd->upd_nextptr = htole32(sc->sc_upddma +
1682 1.9 thorpej ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd));
1683 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap,
1684 1.1 fvdl (caddr_t)sc->rx_tail->rx_upd - (caddr_t)sc->sc_upd,
1685 1.1 fvdl sizeof (struct ex_upd),
1686 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1687 1.1 fvdl } else {
1688 1.1 fvdl sc->rx_head = rxd;
1689 1.1 fvdl }
1690 1.1 fvdl sc->rx_tail = rxd;
1691 1.1 fvdl
1692 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, rxmap, 0, rxmap->dm_mapsize,
1693 1.1 fvdl BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1694 1.1 fvdl bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap,
1695 1.1 fvdl ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd),
1696 1.1 fvdl sizeof (struct ex_upd), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1697 1.1 fvdl return (rval);
1698 1.1 fvdl }
1699 1.1 fvdl
1700 1.19 thorpej u_int32_t
1701 1.19 thorpej ex_mii_bitbang_read(self)
1702 1.19 thorpej struct device *self;
1703 1.1 fvdl {
1704 1.19 thorpej struct ex_softc *sc = (void *) self;
1705 1.1 fvdl
1706 1.19 thorpej /* We're already in Window 4. */
1707 1.19 thorpej return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT));
1708 1.1 fvdl }
1709 1.1 fvdl
1710 1.1 fvdl void
1711 1.19 thorpej ex_mii_bitbang_write(self, val)
1712 1.19 thorpej struct device *self;
1713 1.19 thorpej u_int32_t val;
1714 1.1 fvdl {
1715 1.19 thorpej struct ex_softc *sc = (void *) self;
1716 1.1 fvdl
1717 1.19 thorpej /* We're already in Window 4. */
1718 1.1 fvdl bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT, val);
1719 1.1 fvdl }
1720 1.1 fvdl
1721 1.1 fvdl int
1722 1.1 fvdl ex_mii_readreg(v, phy, reg)
1723 1.1 fvdl struct device *v;
1724 1.18 thorpej int phy, reg;
1725 1.1 fvdl {
1726 1.1 fvdl struct ex_softc *sc = (struct ex_softc *)v;
1727 1.19 thorpej int val;
1728 1.1 fvdl
1729 1.1 fvdl if ((sc->ex_conf & EX_CONF_INTPHY) && phy != ELINK_INTPHY_ID)
1730 1.1 fvdl return 0;
1731 1.1 fvdl
1732 1.1 fvdl GO_WINDOW(4);
1733 1.1 fvdl
1734 1.19 thorpej val = mii_bitbang_readreg(v, &ex_mii_bitbang_ops, phy, reg);
1735 1.1 fvdl
1736 1.1 fvdl GO_WINDOW(1);
1737 1.1 fvdl
1738 1.19 thorpej return (val);
1739 1.1 fvdl }
1740 1.1 fvdl
1741 1.1 fvdl void
1742 1.1 fvdl ex_mii_writereg(v, phy, reg, data)
1743 1.1 fvdl struct device *v;
1744 1.1 fvdl int phy;
1745 1.1 fvdl int reg;
1746 1.1 fvdl int data;
1747 1.1 fvdl {
1748 1.1 fvdl struct ex_softc *sc = (struct ex_softc *)v;
1749 1.1 fvdl
1750 1.1 fvdl GO_WINDOW(4);
1751 1.1 fvdl
1752 1.19 thorpej mii_bitbang_writereg(v, &ex_mii_bitbang_ops, phy, reg, data);
1753 1.1 fvdl
1754 1.1 fvdl GO_WINDOW(1);
1755 1.1 fvdl }
1756 1.1 fvdl
1757 1.1 fvdl void
1758 1.1 fvdl ex_mii_statchg(v)
1759 1.1 fvdl struct device *v;
1760 1.1 fvdl {
1761 1.1 fvdl struct ex_softc *sc = (struct ex_softc *)v;
1762 1.1 fvdl bus_space_tag_t iot = sc->sc_iot;
1763 1.1 fvdl bus_space_handle_t ioh = sc->sc_ioh;
1764 1.1 fvdl int mctl;
1765 1.1 fvdl
1766 1.1 fvdl GO_WINDOW(3);
1767 1.1 fvdl mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL);
1768 1.1 fvdl if (sc->ex_mii.mii_media_active & IFM_FDX)
1769 1.1 fvdl mctl |= MAC_CONTROL_FDX;
1770 1.1 fvdl else
1771 1.1 fvdl mctl &= ~MAC_CONTROL_FDX;
1772 1.1 fvdl bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl);
1773 1.1 fvdl GO_WINDOW(1); /* back to operating window */
1774 1.1 fvdl }
1775