elinkxl.c revision 1.15.2.2
1 /* $NetBSD: elinkxl.c,v 1.15.2.2 2000/11/22 16:03:18 bouyer Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Frank van der Linden. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include "opt_inet.h" 40 #include "opt_ns.h" 41 #include "bpfilter.h" 42 #include "rnd.h" 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/callout.h> 47 #include <sys/kernel.h> 48 #include <sys/mbuf.h> 49 #include <sys/socket.h> 50 #include <sys/ioctl.h> 51 #include <sys/errno.h> 52 #include <sys/syslog.h> 53 #include <sys/select.h> 54 #include <sys/device.h> 55 #if NRND > 0 56 #include <sys/rnd.h> 57 #endif 58 59 #include <uvm/uvm_extern.h> 60 61 #include <net/if.h> 62 #include <net/if_dl.h> 63 #include <net/if_ether.h> 64 #include <net/if_media.h> 65 66 #ifdef INET 67 #include <netinet/in.h> 68 #include <netinet/in_systm.h> 69 #include <netinet/in_var.h> 70 #include <netinet/ip.h> 71 #include <netinet/if_inarp.h> 72 #endif 73 74 #ifdef NS 75 #include <netns/ns.h> 76 #include <netns/ns_if.h> 77 #endif 78 79 #if NBPFILTER > 0 80 #include <net/bpf.h> 81 #include <net/bpfdesc.h> 82 #endif 83 84 #include <machine/cpu.h> 85 #include <machine/bus.h> 86 #include <machine/intr.h> 87 #include <machine/endian.h> 88 89 #include <dev/mii/miivar.h> 90 #include <dev/mii/mii.h> 91 #include <dev/mii/mii_bitbang.h> 92 93 #include <dev/ic/elink3reg.h> 94 /* #include <dev/ic/elink3var.h> */ 95 #include <dev/ic/elinkxlreg.h> 96 #include <dev/ic/elinkxlvar.h> 97 98 #ifdef DEBUG 99 int exdebug = 0; 100 #endif 101 102 /* ifmedia callbacks */ 103 int ex_media_chg __P((struct ifnet *ifp)); 104 void ex_media_stat __P((struct ifnet *ifp, struct ifmediareq *req)); 105 106 void ex_probe_media __P((struct ex_softc *)); 107 void ex_set_filter __P((struct ex_softc *)); 108 void ex_set_media __P((struct ex_softc *)); 109 struct mbuf *ex_get __P((struct ex_softc *, int)); 110 u_int16_t ex_read_eeprom __P((struct ex_softc *, int)); 111 int ex_init __P((struct ifnet *)); 112 void ex_read __P((struct ex_softc *)); 113 void ex_reset __P((struct ex_softc *)); 114 void ex_set_mc __P((struct ex_softc *)); 115 void ex_getstats __P((struct ex_softc *)); 116 void ex_printstats __P((struct ex_softc *)); 117 void ex_tick __P((void *)); 118 119 static int ex_eeprom_busy __P((struct ex_softc *)); 120 static int ex_add_rxbuf __P((struct ex_softc *, struct ex_rxdesc *)); 121 static void ex_init_txdescs __P((struct ex_softc *)); 122 123 static void ex_shutdown __P((void *)); 124 static void ex_start __P((struct ifnet *)); 125 static void ex_txstat __P((struct ex_softc *)); 126 127 int ex_mii_readreg __P((struct device *, int, int)); 128 void ex_mii_writereg __P((struct device *, int, int, int)); 129 void ex_mii_statchg __P((struct device *)); 130 131 void ex_probemedia __P((struct ex_softc *)); 132 133 /* 134 * Structure to map media-present bits in boards to ifmedia codes and 135 * printable media names. Used for table-driven ifmedia initialization. 136 */ 137 struct ex_media { 138 int exm_mpbit; /* media present bit */ 139 const char *exm_name; /* name of medium */ 140 int exm_ifmedia; /* ifmedia word for medium */ 141 int exm_epmedia; /* ELINKMEDIA_* constant */ 142 }; 143 144 /* 145 * Media table for 3c90x chips. Note that chips with MII have no 146 * `native' media. 147 */ 148 struct ex_media ex_native_media[] = { 149 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 150 ELINKMEDIA_10BASE_T }, 151 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 152 ELINKMEDIA_10BASE_T }, 153 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 154 ELINKMEDIA_AUI }, 155 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 156 ELINKMEDIA_10BASE_2 }, 157 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 158 ELINKMEDIA_100BASE_TX }, 159 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 160 ELINKMEDIA_100BASE_TX }, 161 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 162 ELINKMEDIA_100BASE_FX }, 163 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 164 ELINKMEDIA_MII }, 165 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 166 ELINKMEDIA_100BASE_T4 }, 167 { 0, NULL, 0, 168 0 }, 169 }; 170 171 /* 172 * MII bit-bang glue. 173 */ 174 u_int32_t ex_mii_bitbang_read __P((struct device *)); 175 void ex_mii_bitbang_write __P((struct device *, u_int32_t)); 176 177 const struct mii_bitbang_ops ex_mii_bitbang_ops = { 178 ex_mii_bitbang_read, 179 ex_mii_bitbang_write, 180 { 181 ELINK_PHY_DATA, /* MII_BIT_MDO */ 182 ELINK_PHY_DATA, /* MII_BIT_MDI */ 183 ELINK_PHY_CLK, /* MII_BIT_MDC */ 184 ELINK_PHY_DIR, /* MII_BIT_DIR_HOST_PHY */ 185 0, /* MII_BIT_DIR_PHY_HOST */ 186 } 187 }; 188 189 /* 190 * Back-end attach and configure. 191 */ 192 void 193 ex_config(sc) 194 struct ex_softc *sc; 195 { 196 struct ifnet *ifp; 197 u_int16_t val; 198 u_int8_t macaddr[ETHER_ADDR_LEN] = {0}; 199 bus_space_tag_t iot = sc->sc_iot; 200 bus_space_handle_t ioh = sc->sc_ioh; 201 int i, error, attach_stage; 202 203 callout_init(&sc->ex_mii_callout); 204 205 ex_reset(sc); 206 207 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR0); 208 macaddr[0] = val >> 8; 209 macaddr[1] = val & 0xff; 210 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR1); 211 macaddr[2] = val >> 8; 212 macaddr[3] = val & 0xff; 213 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR2); 214 macaddr[4] = val >> 8; 215 macaddr[5] = val & 0xff; 216 217 printf("%s: MAC address %s\n", sc->sc_dev.dv_xname, 218 ether_sprintf(macaddr)); 219 220 if (sc->ex_conf & (EX_CONF_INV_LED_POLARITY|EX_CONF_PHY_POWER)) { 221 GO_WINDOW(2); 222 val = bus_space_read_2(iot, ioh, ELINK_W2_RESET_OPTIONS); 223 if (sc->ex_conf & EX_CONF_INV_LED_POLARITY) 224 val |= ELINK_RESET_OPT_LEDPOLAR; 225 if (sc->ex_conf & EX_CONF_PHY_POWER) 226 val |= ELINK_RESET_OPT_PHYPOWER; 227 bus_space_write_2(iot, ioh, ELINK_W2_RESET_OPTIONS, val); 228 } 229 230 attach_stage = 0; 231 232 /* 233 * Allocate the upload descriptors, and create and load the DMA 234 * map for them. 235 */ 236 if ((error = bus_dmamem_alloc(sc->sc_dmat, 237 EX_NUPD * sizeof (struct ex_upd), PAGE_SIZE, 0, &sc->sc_useg, 1, 238 &sc->sc_urseg, BUS_DMA_NOWAIT)) != 0) { 239 printf("%s: can't allocate upload descriptors, error = %d\n", 240 sc->sc_dev.dv_xname, error); 241 goto fail; 242 } 243 244 attach_stage = 1; 245 246 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg, 247 EX_NUPD * sizeof (struct ex_upd), (caddr_t *)&sc->sc_upd, 248 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 249 printf("%s: can't map upload descriptors, error = %d\n", 250 sc->sc_dev.dv_xname, error); 251 goto fail; 252 } 253 254 attach_stage = 2; 255 256 if ((error = bus_dmamap_create(sc->sc_dmat, 257 EX_NUPD * sizeof (struct ex_upd), 1, 258 EX_NUPD * sizeof (struct ex_upd), 0, BUS_DMA_NOWAIT, 259 &sc->sc_upd_dmamap)) != 0) { 260 printf("%s: can't create upload desc. DMA map, error = %d\n", 261 sc->sc_dev.dv_xname, error); 262 goto fail; 263 } 264 265 attach_stage = 3; 266 267 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_upd_dmamap, 268 sc->sc_upd, EX_NUPD * sizeof (struct ex_upd), NULL, 269 BUS_DMA_NOWAIT)) != 0) { 270 printf("%s: can't load upload desc. DMA map, error = %d\n", 271 sc->sc_dev.dv_xname, error); 272 goto fail; 273 } 274 275 attach_stage = 4; 276 277 /* 278 * Allocate the download descriptors, and create and load the DMA 279 * map for them. 280 */ 281 if ((error = bus_dmamem_alloc(sc->sc_dmat, 282 EX_NDPD * sizeof (struct ex_dpd), PAGE_SIZE, 0, &sc->sc_dseg, 1, 283 &sc->sc_drseg, BUS_DMA_NOWAIT)) != 0) { 284 printf("%s: can't allocate download descriptors, error = %d\n", 285 sc->sc_dev.dv_xname, error); 286 goto fail; 287 } 288 289 attach_stage = 5; 290 291 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg, 292 EX_NDPD * sizeof (struct ex_dpd), (caddr_t *)&sc->sc_dpd, 293 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 294 printf("%s: can't map download descriptors, error = %d\n", 295 sc->sc_dev.dv_xname, error); 296 goto fail; 297 } 298 bzero(sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd)); 299 300 attach_stage = 6; 301 302 if ((error = bus_dmamap_create(sc->sc_dmat, 303 EX_NDPD * sizeof (struct ex_dpd), 1, 304 EX_NDPD * sizeof (struct ex_dpd), 0, BUS_DMA_NOWAIT, 305 &sc->sc_dpd_dmamap)) != 0) { 306 printf("%s: can't create download desc. DMA map, error = %d\n", 307 sc->sc_dev.dv_xname, error); 308 goto fail; 309 } 310 311 attach_stage = 7; 312 313 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dpd_dmamap, 314 sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd), NULL, 315 BUS_DMA_NOWAIT)) != 0) { 316 printf("%s: can't load download desc. DMA map, error = %d\n", 317 sc->sc_dev.dv_xname, error); 318 goto fail; 319 } 320 321 attach_stage = 8; 322 323 324 /* 325 * Create the transmit buffer DMA maps. 326 */ 327 for (i = 0; i < EX_NDPD; i++) { 328 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 329 EX_NTFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 330 &sc->sc_tx_dmamaps[i])) != 0) { 331 printf("%s: can't create tx DMA map %d, error = %d\n", 332 sc->sc_dev.dv_xname, i, error); 333 goto fail; 334 } 335 } 336 337 attach_stage = 9; 338 339 /* 340 * Create the receive buffer DMA maps. 341 */ 342 for (i = 0; i < EX_NUPD; i++) { 343 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 344 EX_NRFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 345 &sc->sc_rx_dmamaps[i])) != 0) { 346 printf("%s: can't create rx DMA map %d, error = %d\n", 347 sc->sc_dev.dv_xname, i, error); 348 goto fail; 349 } 350 } 351 352 attach_stage = 10; 353 354 /* 355 * Create ring of upload descriptors, only once. The DMA engine 356 * will loop over this when receiving packets, stalling if it 357 * hits an UPD with a finished receive. 358 */ 359 for (i = 0; i < EX_NUPD; i++) { 360 sc->sc_rxdescs[i].rx_dmamap = sc->sc_rx_dmamaps[i]; 361 sc->sc_rxdescs[i].rx_upd = &sc->sc_upd[i]; 362 sc->sc_upd[i].upd_frags[0].fr_len = 363 htole32((MCLBYTES - 2) | EX_FR_LAST); 364 if (ex_add_rxbuf(sc, &sc->sc_rxdescs[i]) != 0) { 365 printf("%s: can't allocate or map rx buffers\n", 366 sc->sc_dev.dv_xname); 367 goto fail; 368 } 369 } 370 371 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 0, 372 EX_NUPD * sizeof (struct ex_upd), 373 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 374 375 ex_init_txdescs(sc); 376 377 attach_stage = 11; 378 379 380 GO_WINDOW(3); 381 val = bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS); 382 if (val & ELINK_MEDIACAP_MII) 383 sc->ex_conf |= EX_CONF_MII; 384 385 ifp = &sc->sc_ethercom.ec_if; 386 387 /* 388 * Initialize our media structures and MII info. We'll 389 * probe the MII if we discover that we have one. 390 */ 391 sc->ex_mii.mii_ifp = ifp; 392 sc->ex_mii.mii_readreg = ex_mii_readreg; 393 sc->ex_mii.mii_writereg = ex_mii_writereg; 394 sc->ex_mii.mii_statchg = ex_mii_statchg; 395 ifmedia_init(&sc->ex_mii.mii_media, 0, ex_media_chg, 396 ex_media_stat); 397 398 if (sc->ex_conf & EX_CONF_MII) { 399 /* 400 * Find PHY, extract media information from it. 401 * First, select the right transceiver. 402 */ 403 u_int32_t icfg; 404 405 GO_WINDOW(3); 406 icfg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 407 icfg &= ~(CONFIG_XCVR_SEL << 16); 408 if (val & (ELINK_MEDIACAP_MII | ELINK_MEDIACAP_100BASET4)) 409 icfg |= ELINKMEDIA_MII << (CONFIG_XCVR_SEL_SHIFT + 16); 410 if (val & ELINK_MEDIACAP_100BASETX) 411 icfg |= ELINKMEDIA_AUTO << (CONFIG_XCVR_SEL_SHIFT + 16); 412 if (val & ELINK_MEDIACAP_100BASEFX) 413 icfg |= ELINKMEDIA_100BASE_FX 414 << (CONFIG_XCVR_SEL_SHIFT + 16); 415 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, icfg); 416 417 mii_attach(&sc->sc_dev, &sc->ex_mii, 0xffffffff, 418 MII_PHY_ANY, MII_OFFSET_ANY, 0); 419 if (LIST_FIRST(&sc->ex_mii.mii_phys) == NULL) { 420 ifmedia_add(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE, 421 0, NULL); 422 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE); 423 } else { 424 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_AUTO); 425 } 426 } else 427 ex_probemedia(sc); 428 429 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 430 ifp->if_softc = sc; 431 ifp->if_start = ex_start; 432 ifp->if_ioctl = ex_ioctl; 433 ifp->if_watchdog = ex_watchdog; 434 ifp->if_init = ex_init; 435 ifp->if_stop = ex_stop; 436 ifp->if_flags = 437 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 438 439 /* 440 * We can support 802.1Q VLAN-sized frames. 441 */ 442 sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU; 443 444 if_attach(ifp); 445 ether_ifattach(ifp, macaddr); 446 447 GO_WINDOW(1); 448 449 sc->tx_start_thresh = 20; 450 sc->tx_succ_ok = 0; 451 452 /* TODO: set queues to 0 */ 453 454 #if NRND > 0 455 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 456 RND_TYPE_NET, 0); 457 #endif 458 459 /* Establish callback to reset card when we reboot. */ 460 sc->sc_sdhook = shutdownhook_establish(ex_shutdown, sc); 461 462 /* The attach is successful. */ 463 sc->ex_flags |= EX_FLAGS_ATTACHED; 464 return; 465 466 fail: 467 /* 468 * Free any resources we've allocated during the failed attach 469 * attempt. Do this in reverse order and fall though. 470 */ 471 switch (attach_stage) { 472 case 11: 473 { 474 struct ex_rxdesc *rxd; 475 476 for (i = 0; i < EX_NUPD; i++) { 477 rxd = &sc->sc_rxdescs[i]; 478 if (rxd->rx_mbhead != NULL) { 479 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap); 480 m_freem(rxd->rx_mbhead); 481 } 482 } 483 } 484 /* FALLTHROUGH */ 485 486 case 10: 487 for (i = 0; i < EX_NUPD; i++) 488 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]); 489 /* FALLTHROUGH */ 490 491 case 9: 492 for (i = 0; i < EX_NDPD; i++) 493 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]); 494 /* FALLTHROUGH */ 495 case 8: 496 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap); 497 /* FALLTHROUGH */ 498 499 case 7: 500 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap); 501 /* FALLTHROUGH */ 502 503 case 6: 504 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd, 505 EX_NDPD * sizeof (struct ex_dpd)); 506 /* FALLTHROUGH */ 507 508 case 5: 509 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg); 510 break; 511 512 case 4: 513 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap); 514 /* FALLTHROUGH */ 515 516 case 3: 517 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap); 518 /* FALLTHROUGH */ 519 520 case 2: 521 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd, 522 EX_NUPD * sizeof (struct ex_upd)); 523 /* FALLTHROUGH */ 524 525 case 1: 526 bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg); 527 break; 528 } 529 530 } 531 532 /* 533 * Find the media present on non-MII chips. 534 */ 535 void 536 ex_probemedia(sc) 537 struct ex_softc *sc; 538 { 539 bus_space_tag_t iot = sc->sc_iot; 540 bus_space_handle_t ioh = sc->sc_ioh; 541 struct ifmedia *ifm = &sc->ex_mii.mii_media; 542 struct ex_media *exm; 543 u_int16_t config1, reset_options, default_media; 544 int defmedia = 0; 545 const char *sep = "", *defmedianame = NULL; 546 547 GO_WINDOW(3); 548 config1 = bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2); 549 reset_options = bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 550 GO_WINDOW(0); 551 552 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 553 554 printf("%s: ", sc->sc_dev.dv_xname); 555 556 /* Sanity check that there are any media! */ 557 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 558 printf("no media present!\n"); 559 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 560 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 561 return; 562 } 563 564 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 565 566 for (exm = ex_native_media; exm->exm_name != NULL; exm++) { 567 if (reset_options & exm->exm_mpbit) { 568 /* 569 * Default media is a little complicated. We 570 * support full-duplex which uses the same 571 * reset options bit. 572 * 573 * XXX Check EEPROM for default to FDX? 574 */ 575 if (exm->exm_epmedia == default_media) { 576 if ((exm->exm_ifmedia & IFM_FDX) == 0) { 577 defmedia = exm->exm_ifmedia; 578 defmedianame = exm->exm_name; 579 } 580 } else if (defmedia == 0) { 581 defmedia = exm->exm_ifmedia; 582 defmedianame = exm->exm_name; 583 } 584 ifmedia_add(ifm, exm->exm_ifmedia, exm->exm_epmedia, 585 NULL); 586 PRINT(exm->exm_name); 587 } 588 } 589 590 #undef PRINT 591 592 #ifdef DIAGNOSTIC 593 if (defmedia == 0) 594 panic("ex_probemedia: impossible"); 595 #endif 596 597 printf(", default %s\n", defmedianame); 598 ifmedia_set(ifm, defmedia); 599 } 600 601 /* 602 * Bring device up. 603 */ 604 int 605 ex_init(ifp) 606 struct ifnet *ifp; 607 { 608 struct ex_softc *sc = ifp->if_softc; 609 bus_space_tag_t iot = sc->sc_iot; 610 bus_space_handle_t ioh = sc->sc_ioh; 611 int s, i; 612 613 s = splnet(); 614 615 ex_waitcmd(sc); 616 ex_stop(ifp, 0); 617 618 /* 619 * Set the station address and clear the station mask. The latter 620 * is needed for 90x cards, 0 is the default for 90xB cards. 621 */ 622 GO_WINDOW(2); 623 for (i = 0; i < ETHER_ADDR_LEN; i++) { 624 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 625 LLADDR(ifp->if_sadl)[i]); 626 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 627 } 628 629 GO_WINDOW(3); 630 631 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_RESET); 632 ex_waitcmd(sc); 633 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_RESET); 634 ex_waitcmd(sc); 635 636 /* 637 * Disable reclaim threshold for 90xB, set free threshold to 638 * 6 * 256 = 1536 for 90x. 639 */ 640 if (sc->ex_conf & EX_CONF_90XB) 641 bus_space_write_2(iot, ioh, ELINK_COMMAND, 642 ELINK_TXRECLTHRESH | 255); 643 else 644 bus_space_write_1(iot, ioh, ELINK_TXFREETHRESH, 6); 645 646 bus_space_write_2(iot, ioh, ELINK_COMMAND, 647 SET_RX_EARLY_THRESH | ELINK_THRESH_DISABLE); 648 649 bus_space_write_4(iot, ioh, ELINK_DMACTRL, 650 bus_space_read_4(iot, ioh, ELINK_DMACTRL) | ELINK_DMAC_UPRXEAREN); 651 652 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK | S_MASK); 653 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK | S_MASK); 654 655 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 656 if (sc->intr_ack) 657 (* sc->intr_ack)(sc); 658 ex_set_media(sc); 659 ex_set_mc(sc); 660 661 662 bus_space_write_2(iot, ioh, ELINK_COMMAND, STATS_ENABLE); 663 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 664 bus_space_write_4(iot, ioh, ELINK_UPLISTPTR, sc->sc_upddma); 665 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 666 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_UPUNSTALL); 667 668 if (sc->ex_conf & (EX_CONF_PHY_POWER | EX_CONF_INV_LED_POLARITY)) { 669 u_int16_t cbcard_config; 670 671 GO_WINDOW(2); 672 cbcard_config = bus_space_read_2(sc->sc_iot, sc->sc_ioh, 0x0c); 673 if (sc->ex_conf & EX_CONF_PHY_POWER) { 674 cbcard_config |= 0x4000; /* turn on PHY power */ 675 } 676 if (sc->ex_conf & EX_CONF_INV_LED_POLARITY) { 677 cbcard_config |= 0x0010; /* invert LED polarity */ 678 } 679 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 0x0c, cbcard_config); 680 681 GO_WINDOW(3); 682 } 683 684 ifp->if_flags |= IFF_RUNNING; 685 ifp->if_flags &= ~IFF_OACTIVE; 686 ex_start(ifp); 687 688 GO_WINDOW(1); 689 690 splx(s); 691 692 callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc); 693 694 return (0); 695 } 696 697 #define ex_mchash(addr) (ether_crc32_be((addr), ETHER_ADDR_LEN) & 0xff) 698 699 /* 700 * Set multicast receive filter. Also take care of promiscuous mode 701 * here (XXX). 702 */ 703 void 704 ex_set_mc(sc) 705 struct ex_softc *sc; 706 { 707 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 708 struct ethercom *ec = &sc->sc_ethercom; 709 struct ether_multi *enm; 710 struct ether_multistep estep; 711 int i; 712 u_int16_t mask = FIL_INDIVIDUAL | FIL_BRDCST; 713 714 if (ifp->if_flags & IFF_PROMISC) 715 mask |= FIL_PROMISC; 716 717 if (!(ifp->if_flags & IFF_MULTICAST)) 718 goto out; 719 720 if (!(sc->ex_conf & EX_CONF_90XB) || ifp->if_flags & IFF_ALLMULTI) { 721 mask |= (ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0; 722 } else { 723 ETHER_FIRST_MULTI(estep, ec, enm); 724 while (enm != NULL) { 725 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 726 ETHER_ADDR_LEN) != 0) 727 goto out; 728 i = ex_mchash(enm->enm_addrlo); 729 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 730 ELINK_COMMAND, ELINK_SETHASHFILBIT | i); 731 ETHER_NEXT_MULTI(estep, enm); 732 } 733 mask |= FIL_MULTIHASH; 734 } 735 out: 736 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 737 SET_RX_FILTER | mask); 738 } 739 740 741 static void 742 ex_txstat(sc) 743 struct ex_softc *sc; 744 { 745 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 746 bus_space_tag_t iot = sc->sc_iot; 747 bus_space_handle_t ioh = sc->sc_ioh; 748 int i; 749 750 /* 751 * We need to read+write TX_STATUS until we get a 0 status 752 * in order to turn off the interrupt flag. 753 */ 754 while ((i = bus_space_read_1(iot, ioh, ELINK_TXSTATUS)) & TXS_COMPLETE) { 755 bus_space_write_1(iot, ioh, ELINK_TXSTATUS, 0x0); 756 757 if (i & TXS_JABBER) { 758 ++sc->sc_ethercom.ec_if.if_oerrors; 759 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 760 printf("%s: jabber (%x)\n", 761 sc->sc_dev.dv_xname, i); 762 ex_init(ifp); 763 /* TODO: be more subtle here */ 764 } else if (i & TXS_UNDERRUN) { 765 ++sc->sc_ethercom.ec_if.if_oerrors; 766 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 767 printf("%s: fifo underrun (%x) @%d\n", 768 sc->sc_dev.dv_xname, i, 769 sc->tx_start_thresh); 770 if (sc->tx_succ_ok < 100) 771 sc->tx_start_thresh = min(ETHER_MAX_LEN, 772 sc->tx_start_thresh + 20); 773 sc->tx_succ_ok = 0; 774 ex_init(ifp); 775 /* TODO: be more subtle here */ 776 } else if (i & TXS_MAX_COLLISION) { 777 ++sc->sc_ethercom.ec_if.if_collisions; 778 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 779 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 780 } else 781 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 782 } 783 } 784 785 int 786 ex_media_chg(ifp) 787 struct ifnet *ifp; 788 { 789 790 if (ifp->if_flags & IFF_UP) 791 ex_init(ifp); 792 return 0; 793 } 794 795 void 796 ex_set_media(sc) 797 struct ex_softc *sc; 798 { 799 bus_space_tag_t iot = sc->sc_iot; 800 bus_space_handle_t ioh = sc->sc_ioh; 801 u_int32_t configreg; 802 803 if (((sc->ex_conf & EX_CONF_MII) && 804 (sc->ex_mii.mii_media_active & IFM_FDX)) 805 || (!(sc->ex_conf & EX_CONF_MII) && 806 (sc->ex_mii.mii_media.ifm_media & IFM_FDX))) { 807 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 808 MAC_CONTROL_FDX); 809 } else { 810 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 0); 811 } 812 813 /* 814 * If the device has MII, select it, and then tell the 815 * PHY which media to use. 816 */ 817 if (sc->ex_conf & EX_CONF_MII) { 818 GO_WINDOW(3); 819 820 configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 821 822 configreg &= ~(CONFIG_MEDIAMASK << 16); 823 configreg |= (ELINKMEDIA_MII << (CONFIG_MEDIAMASK_SHIFT + 16)); 824 825 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg); 826 mii_mediachg(&sc->ex_mii); 827 return; 828 } 829 830 GO_WINDOW(4); 831 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0); 832 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 833 delay(800); 834 835 /* 836 * Now turn on the selected media/transceiver. 837 */ 838 switch (IFM_SUBTYPE(sc->ex_mii.mii_media.ifm_cur->ifm_media)) { 839 case IFM_10_T: 840 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 841 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 842 break; 843 844 case IFM_10_2: 845 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 846 DELAY(800); 847 break; 848 849 case IFM_100_TX: 850 case IFM_100_FX: 851 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 852 LINKBEAT_ENABLE); 853 DELAY(800); 854 break; 855 856 case IFM_10_5: 857 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 858 SQE_ENABLE); 859 DELAY(800); 860 break; 861 862 case IFM_MANUAL: 863 break; 864 865 case IFM_NONE: 866 return; 867 868 default: 869 panic("ex_set_media: impossible"); 870 } 871 872 GO_WINDOW(3); 873 configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 874 875 configreg &= ~(CONFIG_MEDIAMASK << 16); 876 configreg |= (sc->ex_mii.mii_media.ifm_cur->ifm_data << 877 (CONFIG_MEDIAMASK_SHIFT + 16)); 878 879 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg); 880 } 881 882 /* 883 * Get currently-selected media from card. 884 * (if_media callback, may be called before interface is brought up). 885 */ 886 void 887 ex_media_stat(ifp, req) 888 struct ifnet *ifp; 889 struct ifmediareq *req; 890 { 891 struct ex_softc *sc = ifp->if_softc; 892 893 if (sc->ex_conf & EX_CONF_MII) { 894 mii_pollstat(&sc->ex_mii); 895 req->ifm_status = sc->ex_mii.mii_media_status; 896 req->ifm_active = sc->ex_mii.mii_media_active; 897 } else { 898 GO_WINDOW(4); 899 req->ifm_status = IFM_AVALID; 900 req->ifm_active = sc->ex_mii.mii_media.ifm_cur->ifm_media; 901 if (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 902 ELINK_W4_MEDIA_TYPE) & LINKBEAT_DETECT) 903 req->ifm_status |= IFM_ACTIVE; 904 GO_WINDOW(1); 905 } 906 } 907 908 909 910 /* 911 * Start outputting on the interface. 912 */ 913 static void 914 ex_start(ifp) 915 struct ifnet *ifp; 916 { 917 struct ex_softc *sc = ifp->if_softc; 918 bus_space_tag_t iot = sc->sc_iot; 919 bus_space_handle_t ioh = sc->sc_ioh; 920 volatile struct ex_fraghdr *fr = NULL; 921 volatile struct ex_dpd *dpd = NULL, *prevdpd = NULL; 922 struct ex_txdesc *txp; 923 bus_dmamap_t dmamap; 924 int offset, totlen; 925 926 if (sc->tx_head || sc->tx_free == NULL) 927 return; 928 929 txp = NULL; 930 931 /* 932 * We're finished if there is nothing more to add to the list or if 933 * we're all filled up with buffers to transmit. 934 */ 935 while (ifp->if_snd.ifq_head != NULL && sc->tx_free != NULL) { 936 struct mbuf *mb_head; 937 int segment, error; 938 939 /* 940 * Grab a packet to transmit. 941 */ 942 IF_DEQUEUE(&ifp->if_snd, mb_head); 943 944 /* 945 * Get pointer to next available tx desc. 946 */ 947 txp = sc->tx_free; 948 sc->tx_free = txp->tx_next; 949 txp->tx_next = NULL; 950 dmamap = txp->tx_dmamap; 951 952 /* 953 * Go through each of the mbufs in the chain and initialize 954 * the transmit buffer descriptors with the physical address 955 * and size of the mbuf. 956 */ 957 reload: 958 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 959 mb_head, BUS_DMA_NOWAIT); 960 switch (error) { 961 case 0: 962 /* Success. */ 963 break; 964 965 case EFBIG: 966 { 967 struct mbuf *mn; 968 969 /* 970 * We ran out of segments. We have to recopy this 971 * mbuf chain first. Bail out if we can't get the 972 * new buffers. 973 */ 974 printf("%s: too many segments, ", sc->sc_dev.dv_xname); 975 976 MGETHDR(mn, M_DONTWAIT, MT_DATA); 977 if (mn == NULL) { 978 m_freem(mb_head); 979 printf("aborting\n"); 980 goto out; 981 } 982 if (mb_head->m_pkthdr.len > MHLEN) { 983 MCLGET(mn, M_DONTWAIT); 984 if ((mn->m_flags & M_EXT) == 0) { 985 m_freem(mn); 986 m_freem(mb_head); 987 printf("aborting\n"); 988 goto out; 989 } 990 } 991 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, 992 mtod(mn, caddr_t)); 993 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; 994 m_freem(mb_head); 995 mb_head = mn; 996 printf("retrying\n"); 997 goto reload; 998 } 999 1000 default: 1001 /* 1002 * Some other problem; report it. 1003 */ 1004 printf("%s: can't load mbuf chain, error = %d\n", 1005 sc->sc_dev.dv_xname, error); 1006 m_freem(mb_head); 1007 goto out; 1008 } 1009 1010 fr = &txp->tx_dpd->dpd_frags[0]; 1011 totlen = 0; 1012 for (segment = 0; segment < dmamap->dm_nsegs; segment++, fr++) { 1013 fr->fr_addr = htole32(dmamap->dm_segs[segment].ds_addr); 1014 fr->fr_len = htole32(dmamap->dm_segs[segment].ds_len); 1015 totlen += dmamap->dm_segs[segment].ds_len; 1016 } 1017 fr--; 1018 fr->fr_len |= htole32(EX_FR_LAST); 1019 txp->tx_mbhead = mb_head; 1020 1021 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 1022 BUS_DMASYNC_PREWRITE); 1023 1024 dpd = txp->tx_dpd; 1025 dpd->dpd_nextptr = 0; 1026 dpd->dpd_fsh = htole32(totlen); 1027 1028 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1029 ((caddr_t)dpd - (caddr_t)sc->sc_dpd), 1030 sizeof (struct ex_dpd), 1031 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1032 1033 /* 1034 * No need to stall the download engine, we know it's 1035 * not busy right now. 1036 * 1037 * Fix up pointers in both the "soft" tx and the physical 1038 * tx list. 1039 */ 1040 if (sc->tx_head != NULL) { 1041 prevdpd = sc->tx_tail->tx_dpd; 1042 offset = ((caddr_t)prevdpd - (caddr_t)sc->sc_dpd); 1043 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1044 offset, sizeof (struct ex_dpd), 1045 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1046 prevdpd->dpd_nextptr = htole32(DPD_DMADDR(sc, txp)); 1047 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1048 offset, sizeof (struct ex_dpd), 1049 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1050 sc->tx_tail->tx_next = txp; 1051 sc->tx_tail = txp; 1052 } else { 1053 sc->tx_tail = sc->tx_head = txp; 1054 } 1055 1056 #if NBPFILTER > 0 1057 /* 1058 * Pass packet to bpf if there is a listener. 1059 */ 1060 if (ifp->if_bpf) 1061 bpf_mtap(ifp->if_bpf, mb_head); 1062 #endif 1063 } 1064 out: 1065 if (sc->tx_head) { 1066 sc->tx_tail->tx_dpd->dpd_fsh |= htole32(EX_DPD_DNIND); 1067 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1068 ((caddr_t)sc->tx_tail->tx_dpd - (caddr_t)sc->sc_dpd), 1069 sizeof (struct ex_dpd), 1070 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1071 ifp->if_flags |= IFF_OACTIVE; 1072 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_DNUNSTALL); 1073 bus_space_write_4(iot, ioh, ELINK_DNLISTPTR, 1074 DPD_DMADDR(sc, sc->tx_head)); 1075 1076 /* trigger watchdog */ 1077 ifp->if_timer = 5; 1078 } 1079 } 1080 1081 1082 int 1083 ex_intr(arg) 1084 void *arg; 1085 { 1086 struct ex_softc *sc = arg; 1087 bus_space_tag_t iot = sc->sc_iot; 1088 bus_space_handle_t ioh = sc->sc_ioh; 1089 u_int16_t stat; 1090 int ret = 0; 1091 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1092 1093 if (sc->enabled == 0 || 1094 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1095 return (0); 1096 1097 for (;;) { 1098 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1099 1100 stat = bus_space_read_2(iot, ioh, ELINK_STATUS); 1101 1102 if ((stat & S_MASK) == 0) { 1103 if ((stat & S_INTR_LATCH) == 0) { 1104 #if 0 1105 printf("%s: intr latch cleared\n", 1106 sc->sc_dev.dv_xname); 1107 #endif 1108 break; 1109 } 1110 } 1111 1112 ret = 1; 1113 1114 /* 1115 * Acknowledge interrupts. 1116 */ 1117 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1118 (stat & S_MASK)); 1119 if (sc->intr_ack) 1120 (*sc->intr_ack)(sc); 1121 1122 if (stat & S_HOST_ERROR) { 1123 printf("%s: adapter failure (%x)\n", 1124 sc->sc_dev.dv_xname, stat); 1125 ex_reset(sc); 1126 ex_init(ifp); 1127 return 1; 1128 } 1129 if (stat & S_TX_COMPLETE) { 1130 ex_txstat(sc); 1131 } 1132 if (stat & S_UPD_STATS) { 1133 ex_getstats(sc); 1134 } 1135 if (stat & S_DN_COMPLETE) { 1136 struct ex_txdesc *txp, *ptxp = NULL; 1137 bus_dmamap_t txmap; 1138 1139 /* reset watchdog timer, was set in ex_start() */ 1140 ifp->if_timer = 0; 1141 1142 for (txp = sc->tx_head; txp != NULL; 1143 txp = txp->tx_next) { 1144 bus_dmamap_sync(sc->sc_dmat, 1145 sc->sc_dpd_dmamap, 1146 (caddr_t)txp->tx_dpd - (caddr_t)sc->sc_dpd, 1147 sizeof (struct ex_dpd), 1148 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1149 if (txp->tx_mbhead != NULL) { 1150 txmap = txp->tx_dmamap; 1151 bus_dmamap_sync(sc->sc_dmat, txmap, 1152 0, txmap->dm_mapsize, 1153 BUS_DMASYNC_POSTWRITE); 1154 bus_dmamap_unload(sc->sc_dmat, txmap); 1155 m_freem(txp->tx_mbhead); 1156 txp->tx_mbhead = NULL; 1157 } 1158 ptxp = txp; 1159 } 1160 1161 /* 1162 * Move finished tx buffers back to the tx free list. 1163 */ 1164 if (sc->tx_free) { 1165 sc->tx_ftail->tx_next = sc->tx_head; 1166 sc->tx_ftail = ptxp; 1167 } else 1168 sc->tx_ftail = sc->tx_free = sc->tx_head; 1169 1170 sc->tx_head = sc->tx_tail = NULL; 1171 ifp->if_flags &= ~IFF_OACTIVE; 1172 } 1173 1174 if (stat & S_UP_COMPLETE) { 1175 struct ex_rxdesc *rxd; 1176 struct mbuf *m; 1177 struct ex_upd *upd; 1178 bus_dmamap_t rxmap; 1179 u_int32_t pktstat; 1180 1181 rcvloop: 1182 rxd = sc->rx_head; 1183 rxmap = rxd->rx_dmamap; 1184 m = rxd->rx_mbhead; 1185 upd = rxd->rx_upd; 1186 1187 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, 1188 rxmap->dm_mapsize, 1189 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1190 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1191 ((caddr_t)upd - (caddr_t)sc->sc_upd), 1192 sizeof (struct ex_upd), 1193 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1194 pktstat = le32toh(upd->upd_pktstatus); 1195 1196 if (pktstat & EX_UPD_COMPLETE) { 1197 /* 1198 * Remove first packet from the chain. 1199 */ 1200 sc->rx_head = rxd->rx_next; 1201 rxd->rx_next = NULL; 1202 1203 /* 1204 * Add a new buffer to the receive chain. 1205 * If this fails, the old buffer is recycled 1206 * instead. 1207 */ 1208 if (ex_add_rxbuf(sc, rxd) == 0) { 1209 u_int16_t total_len; 1210 1211 if (pktstat & 1212 ((sc->sc_ethercom.ec_capenable & 1213 ETHERCAP_VLAN_MTU) ? 1214 EX_UPD_ERR_VLAN : EX_UPD_ERR)) { 1215 ifp->if_ierrors++; 1216 m_freem(m); 1217 goto rcvloop; 1218 } 1219 1220 total_len = pktstat & EX_UPD_PKTLENMASK; 1221 if (total_len < 1222 sizeof(struct ether_header)) { 1223 m_freem(m); 1224 goto rcvloop; 1225 } 1226 m->m_pkthdr.rcvif = ifp; 1227 m->m_pkthdr.len = m->m_len = total_len; 1228 #if NBPFILTER > 0 1229 if (ifp->if_bpf) 1230 bpf_mtap(ifp->if_bpf, m); 1231 #endif 1232 (*ifp->if_input)(ifp, m); 1233 } 1234 goto rcvloop; 1235 } 1236 /* 1237 * Just in case we filled up all UPDs and the DMA engine 1238 * stalled. We could be more subtle about this. 1239 */ 1240 if (bus_space_read_4(iot, ioh, ELINK_UPLISTPTR) == 0) { 1241 printf("%s: uplistptr was 0\n", 1242 sc->sc_dev.dv_xname); 1243 ex_init(ifp); 1244 } else if (bus_space_read_4(iot, ioh, ELINK_UPPKTSTATUS) 1245 & 0x2000) { 1246 printf("%s: receive stalled\n", 1247 sc->sc_dev.dv_xname); 1248 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1249 ELINK_UPUNSTALL); 1250 } 1251 } 1252 } 1253 1254 /* no more interrupts */ 1255 if (ret && ifp->if_snd.ifq_head) 1256 ex_start(ifp); 1257 return ret; 1258 } 1259 1260 int 1261 ex_ioctl(ifp, cmd, data) 1262 struct ifnet *ifp; 1263 u_long cmd; 1264 caddr_t data; 1265 { 1266 struct ex_softc *sc = ifp->if_softc; 1267 struct ifreq *ifr = (struct ifreq *)data; 1268 int s, error; 1269 1270 s = splnet(); 1271 1272 switch (cmd) { 1273 case SIOCSIFMEDIA: 1274 case SIOCGIFMEDIA: 1275 error = ifmedia_ioctl(ifp, ifr, &sc->ex_mii.mii_media, cmd); 1276 break; 1277 1278 default: 1279 error = ether_ioctl(ifp, cmd, data); 1280 if (error == ENETRESET) { 1281 /* 1282 * Multicast list has changed; set the hardware filter 1283 * accordingly. 1284 */ 1285 ex_set_mc(sc); 1286 error = 0; 1287 } 1288 break; 1289 } 1290 1291 splx(s); 1292 return (error); 1293 } 1294 1295 void 1296 ex_getstats(sc) 1297 struct ex_softc *sc; 1298 { 1299 bus_space_handle_t ioh = sc->sc_ioh; 1300 bus_space_tag_t iot = sc->sc_iot; 1301 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1302 u_int8_t upperok; 1303 1304 GO_WINDOW(6); 1305 upperok = bus_space_read_1(iot, ioh, UPPER_FRAMES_OK); 1306 ifp->if_ipackets += bus_space_read_1(iot, ioh, RX_FRAMES_OK); 1307 ifp->if_ipackets += (upperok & 0x03) << 8; 1308 ifp->if_opackets += bus_space_read_1(iot, ioh, TX_FRAMES_OK); 1309 ifp->if_opackets += (upperok & 0x30) << 4; 1310 ifp->if_ierrors += bus_space_read_1(iot, ioh, RX_OVERRUNS); 1311 ifp->if_collisions += bus_space_read_1(iot, ioh, TX_COLLISIONS); 1312 /* 1313 * There seems to be no way to get the exact number of collisions, 1314 * this is the number that occured at the very least. 1315 */ 1316 ifp->if_collisions += 2 * bus_space_read_1(iot, ioh, 1317 TX_AFTER_X_COLLISIONS); 1318 ifp->if_ibytes += bus_space_read_2(iot, ioh, RX_TOTAL_OK); 1319 ifp->if_obytes += bus_space_read_2(iot, ioh, TX_TOTAL_OK); 1320 1321 /* 1322 * Clear the following to avoid stats overflow interrupts 1323 */ 1324 bus_space_read_1(iot, ioh, TX_DEFERRALS); 1325 bus_space_read_1(iot, ioh, TX_AFTER_1_COLLISION); 1326 bus_space_read_1(iot, ioh, TX_NO_SQE); 1327 bus_space_read_1(iot, ioh, TX_CD_LOST); 1328 GO_WINDOW(4); 1329 bus_space_read_1(iot, ioh, ELINK_W4_BADSSD); 1330 upperok = bus_space_read_1(iot, ioh, ELINK_W4_UBYTESOK); 1331 ifp->if_ibytes += (upperok & 0x0f) << 16; 1332 ifp->if_obytes += (upperok & 0xf0) << 12; 1333 GO_WINDOW(1); 1334 } 1335 1336 void 1337 ex_printstats(sc) 1338 struct ex_softc *sc; 1339 { 1340 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1341 1342 ex_getstats(sc); 1343 printf("in %llu out %llu ierror %llu oerror %llu ibytes %llu obytes " 1344 "%llu\n", (unsigned long long)ifp->if_ipackets, 1345 (unsigned long long)ifp->if_opackets, 1346 (unsigned long long)ifp->if_ierrors, 1347 (unsigned long long)ifp->if_oerrors, 1348 (unsigned long long)ifp->if_ibytes, 1349 (unsigned long long)ifp->if_obytes); 1350 } 1351 1352 void 1353 ex_tick(arg) 1354 void *arg; 1355 { 1356 struct ex_softc *sc = arg; 1357 int s; 1358 1359 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1360 return; 1361 1362 s = splnet(); 1363 1364 if (sc->ex_conf & EX_CONF_MII) 1365 mii_tick(&sc->ex_mii); 1366 1367 if (!(bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, ELINK_STATUS) 1368 & S_COMMAND_IN_PROGRESS)) 1369 ex_getstats(sc); 1370 1371 splx(s); 1372 1373 callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc); 1374 } 1375 1376 void 1377 ex_reset(sc) 1378 struct ex_softc *sc; 1379 { 1380 u_int16_t val = GLOBAL_RESET; 1381 1382 if (sc->ex_conf & EX_CONF_RESETHACK) 1383 val |= 0xff; 1384 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, val); 1385 delay(400); 1386 ex_waitcmd(sc); 1387 } 1388 1389 void 1390 ex_watchdog(ifp) 1391 struct ifnet *ifp; 1392 { 1393 struct ex_softc *sc = ifp->if_softc; 1394 1395 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1396 ++sc->sc_ethercom.ec_if.if_oerrors; 1397 1398 ex_reset(sc); 1399 ex_init(ifp); 1400 } 1401 1402 void 1403 ex_stop(ifp, disable) 1404 struct ifnet *ifp; 1405 int disable; 1406 { 1407 struct ex_softc *sc = ifp->if_softc; 1408 bus_space_tag_t iot = sc->sc_iot; 1409 bus_space_handle_t ioh = sc->sc_ioh; 1410 struct ex_txdesc *tx; 1411 struct ex_rxdesc *rx; 1412 int i; 1413 1414 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1415 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1416 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1417 1418 for (tx = sc->tx_head ; tx != NULL; tx = tx->tx_next) { 1419 if (tx->tx_mbhead == NULL) 1420 continue; 1421 m_freem(tx->tx_mbhead); 1422 tx->tx_mbhead = NULL; 1423 bus_dmamap_unload(sc->sc_dmat, tx->tx_dmamap); 1424 tx->tx_dpd->dpd_fsh = tx->tx_dpd->dpd_nextptr = 0; 1425 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1426 ((caddr_t)tx->tx_dpd - (caddr_t)sc->sc_dpd), 1427 sizeof (struct ex_dpd), 1428 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1429 } 1430 sc->tx_tail = sc->tx_head = NULL; 1431 ex_init_txdescs(sc); 1432 1433 sc->rx_tail = sc->rx_head = 0; 1434 for (i = 0; i < EX_NUPD; i++) { 1435 rx = &sc->sc_rxdescs[i]; 1436 if (rx->rx_mbhead != NULL) { 1437 bus_dmamap_unload(sc->sc_dmat, rx->rx_dmamap); 1438 m_freem(rx->rx_mbhead); 1439 rx->rx_mbhead = NULL; 1440 } 1441 ex_add_rxbuf(sc, rx); 1442 } 1443 1444 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1445 1446 callout_stop(&sc->ex_mii_callout); 1447 if (sc->ex_conf & EX_CONF_MII) 1448 mii_down(&sc->ex_mii); 1449 1450 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1451 ifp->if_timer = 0; 1452 } 1453 1454 static void 1455 ex_init_txdescs(sc) 1456 struct ex_softc *sc; 1457 { 1458 int i; 1459 1460 for (i = 0; i < EX_NDPD; i++) { 1461 sc->sc_txdescs[i].tx_dmamap = sc->sc_tx_dmamaps[i]; 1462 sc->sc_txdescs[i].tx_dpd = &sc->sc_dpd[i]; 1463 if (i < EX_NDPD - 1) 1464 sc->sc_txdescs[i].tx_next = &sc->sc_txdescs[i + 1]; 1465 else 1466 sc->sc_txdescs[i].tx_next = NULL; 1467 } 1468 sc->tx_free = &sc->sc_txdescs[0]; 1469 sc->tx_ftail = &sc->sc_txdescs[EX_NDPD-1]; 1470 } 1471 1472 1473 int 1474 ex_activate(self, act) 1475 struct device *self; 1476 enum devact act; 1477 { 1478 struct ex_softc *sc = (void *) self; 1479 int s, error = 0; 1480 1481 s = splnet(); 1482 switch (act) { 1483 case DVACT_ACTIVATE: 1484 error = EOPNOTSUPP; 1485 break; 1486 1487 case DVACT_DEACTIVATE: 1488 if (sc->ex_conf & EX_CONF_MII) 1489 mii_activate(&sc->ex_mii, act, MII_PHY_ANY, 1490 MII_OFFSET_ANY); 1491 if_deactivate(&sc->sc_ethercom.ec_if); 1492 break; 1493 } 1494 splx(s); 1495 1496 return (error); 1497 } 1498 1499 int 1500 ex_detach(sc) 1501 struct ex_softc *sc; 1502 { 1503 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1504 struct ex_rxdesc *rxd; 1505 int i; 1506 1507 /* Succeed now if there's no work to do. */ 1508 if ((sc->ex_flags & EX_FLAGS_ATTACHED) == 0) 1509 return (0); 1510 1511 /* Unhook our tick handler. */ 1512 callout_stop(&sc->ex_mii_callout); 1513 1514 if (sc->ex_conf & EX_CONF_MII) { 1515 /* Detach all PHYs */ 1516 mii_detach(&sc->ex_mii, MII_PHY_ANY, MII_OFFSET_ANY); 1517 } 1518 1519 /* Delete all remaining media. */ 1520 ifmedia_delete_instance(&sc->ex_mii.mii_media, IFM_INST_ANY); 1521 1522 #if NRND > 0 1523 rnd_detach_source(&sc->rnd_source); 1524 #endif 1525 ether_ifdetach(ifp); 1526 if_detach(ifp); 1527 1528 for (i = 0; i < EX_NUPD; i++) { 1529 rxd = &sc->sc_rxdescs[i]; 1530 if (rxd->rx_mbhead != NULL) { 1531 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap); 1532 m_freem(rxd->rx_mbhead); 1533 rxd->rx_mbhead = NULL; 1534 } 1535 } 1536 for (i = 0; i < EX_NUPD; i++) 1537 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]); 1538 for (i = 0; i < EX_NDPD; i++) 1539 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]); 1540 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap); 1541 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap); 1542 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd, 1543 EX_NDPD * sizeof (struct ex_dpd)); 1544 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg); 1545 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap); 1546 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap); 1547 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd, 1548 EX_NUPD * sizeof (struct ex_upd)); 1549 bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg); 1550 1551 shutdownhook_disestablish(sc->sc_sdhook); 1552 1553 return (0); 1554 } 1555 1556 /* 1557 * Before reboots, reset card completely. 1558 */ 1559 static void 1560 ex_shutdown(arg) 1561 void *arg; 1562 { 1563 struct ex_softc *sc = arg; 1564 1565 ex_stop(&sc->sc_ethercom.ec_if, 0); 1566 } 1567 1568 /* 1569 * Read EEPROM data. 1570 * XXX what to do if EEPROM doesn't unbusy? 1571 */ 1572 u_int16_t 1573 ex_read_eeprom(sc, offset) 1574 struct ex_softc *sc; 1575 int offset; 1576 { 1577 bus_space_tag_t iot = sc->sc_iot; 1578 bus_space_handle_t ioh = sc->sc_ioh; 1579 u_int16_t data = 0, cmd = READ_EEPROM; 1580 int off; 1581 1582 off = sc->ex_conf & EX_CONF_EEPROM_OFF ? 0x30 : 0; 1583 cmd = sc->ex_conf & EX_CONF_EEPROM_8BIT ? READ_EEPROM8 : READ_EEPROM; 1584 1585 GO_WINDOW(0); 1586 if (ex_eeprom_busy(sc)) 1587 goto out; 1588 bus_space_write_2(iot, ioh, ELINK_W0_EEPROM_COMMAND, 1589 cmd | (off + (offset & 0x3f))); 1590 if (ex_eeprom_busy(sc)) 1591 goto out; 1592 data = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_DATA); 1593 out: 1594 return data; 1595 } 1596 1597 static int 1598 ex_eeprom_busy(sc) 1599 struct ex_softc *sc; 1600 { 1601 bus_space_tag_t iot = sc->sc_iot; 1602 bus_space_handle_t ioh = sc->sc_ioh; 1603 int i = 100; 1604 1605 while (i--) { 1606 if (!(bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND) & 1607 EEPROM_BUSY)) 1608 return 0; 1609 delay(100); 1610 } 1611 printf("\n%s: eeprom stays busy.\n", sc->sc_dev.dv_xname); 1612 return (1); 1613 } 1614 1615 /* 1616 * Create a new rx buffer and add it to the 'soft' rx list. 1617 */ 1618 static int 1619 ex_add_rxbuf(sc, rxd) 1620 struct ex_softc *sc; 1621 struct ex_rxdesc *rxd; 1622 { 1623 struct mbuf *m, *oldm; 1624 bus_dmamap_t rxmap; 1625 int error, rval = 0; 1626 1627 oldm = rxd->rx_mbhead; 1628 rxmap = rxd->rx_dmamap; 1629 1630 MGETHDR(m, M_DONTWAIT, MT_DATA); 1631 if (m != NULL) { 1632 MCLGET(m, M_DONTWAIT); 1633 if ((m->m_flags & M_EXT) == 0) { 1634 m_freem(m); 1635 if (oldm == NULL) 1636 return 1; 1637 m = oldm; 1638 m->m_data = m->m_ext.ext_buf; 1639 rval = 1; 1640 } 1641 } else { 1642 if (oldm == NULL) 1643 return 1; 1644 m = oldm; 1645 m->m_data = m->m_ext.ext_buf; 1646 rval = 1; 1647 } 1648 1649 /* 1650 * Setup the DMA map for this receive buffer. 1651 */ 1652 if (m != oldm) { 1653 if (oldm != NULL) 1654 bus_dmamap_unload(sc->sc_dmat, rxmap); 1655 error = bus_dmamap_load(sc->sc_dmat, rxmap, 1656 m->m_ext.ext_buf, MCLBYTES, NULL, BUS_DMA_NOWAIT); 1657 if (error) { 1658 printf("%s: can't load rx buffer, error = %d\n", 1659 sc->sc_dev.dv_xname, error); 1660 panic("ex_add_rxbuf"); /* XXX */ 1661 } 1662 } 1663 1664 /* 1665 * Align for data after 14 byte header. 1666 */ 1667 m->m_data += 2; 1668 1669 rxd->rx_mbhead = m; 1670 rxd->rx_upd->upd_pktstatus = htole32(MCLBYTES - 2); 1671 rxd->rx_upd->upd_frags[0].fr_addr = 1672 htole32(rxmap->dm_segs[0].ds_addr + 2); 1673 rxd->rx_upd->upd_nextptr = 0; 1674 1675 /* 1676 * Attach it to the end of the list. 1677 */ 1678 if (sc->rx_head != NULL) { 1679 sc->rx_tail->rx_next = rxd; 1680 sc->rx_tail->rx_upd->upd_nextptr = htole32(sc->sc_upddma + 1681 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd)); 1682 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1683 (caddr_t)sc->rx_tail->rx_upd - (caddr_t)sc->sc_upd, 1684 sizeof (struct ex_upd), 1685 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1686 } else { 1687 sc->rx_head = rxd; 1688 } 1689 sc->rx_tail = rxd; 1690 1691 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, rxmap->dm_mapsize, 1692 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1693 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1694 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd), 1695 sizeof (struct ex_upd), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1696 return (rval); 1697 } 1698 1699 u_int32_t 1700 ex_mii_bitbang_read(self) 1701 struct device *self; 1702 { 1703 struct ex_softc *sc = (void *) self; 1704 1705 /* We're already in Window 4. */ 1706 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT)); 1707 } 1708 1709 void 1710 ex_mii_bitbang_write(self, val) 1711 struct device *self; 1712 u_int32_t val; 1713 { 1714 struct ex_softc *sc = (void *) self; 1715 1716 /* We're already in Window 4. */ 1717 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT, val); 1718 } 1719 1720 int 1721 ex_mii_readreg(v, phy, reg) 1722 struct device *v; 1723 int phy, reg; 1724 { 1725 struct ex_softc *sc = (struct ex_softc *)v; 1726 int val; 1727 1728 if ((sc->ex_conf & EX_CONF_INTPHY) && phy != ELINK_INTPHY_ID) 1729 return 0; 1730 1731 GO_WINDOW(4); 1732 1733 val = mii_bitbang_readreg(v, &ex_mii_bitbang_ops, phy, reg); 1734 1735 GO_WINDOW(1); 1736 1737 return (val); 1738 } 1739 1740 void 1741 ex_mii_writereg(v, phy, reg, data) 1742 struct device *v; 1743 int phy; 1744 int reg; 1745 int data; 1746 { 1747 struct ex_softc *sc = (struct ex_softc *)v; 1748 1749 GO_WINDOW(4); 1750 1751 mii_bitbang_writereg(v, &ex_mii_bitbang_ops, phy, reg, data); 1752 1753 GO_WINDOW(1); 1754 } 1755 1756 void 1757 ex_mii_statchg(v) 1758 struct device *v; 1759 { 1760 struct ex_softc *sc = (struct ex_softc *)v; 1761 bus_space_tag_t iot = sc->sc_iot; 1762 bus_space_handle_t ioh = sc->sc_ioh; 1763 int mctl; 1764 1765 GO_WINDOW(3); 1766 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1767 if (sc->ex_mii.mii_media_active & IFM_FDX) 1768 mctl |= MAC_CONTROL_FDX; 1769 else 1770 mctl &= ~MAC_CONTROL_FDX; 1771 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1772 GO_WINDOW(1); /* back to operating window */ 1773 } 1774
Indexes created Wed Oct 22 13:09:56 GMT 2025