elinkxl.c revision 1.20
1 /* $NetBSD: elinkxl.c,v 1.20 1999/11/19 10:42:48 bouyer Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Frank van der Linden. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include "opt_inet.h" 40 #include "opt_ns.h" 41 #include "bpfilter.h" 42 #include "rnd.h" 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/kernel.h> 47 #include <sys/mbuf.h> 48 #include <sys/socket.h> 49 #include <sys/ioctl.h> 50 #include <sys/errno.h> 51 #include <sys/syslog.h> 52 #include <sys/select.h> 53 #include <sys/device.h> 54 #if NRND > 0 55 #include <sys/rnd.h> 56 #endif 57 58 #include <net/if.h> 59 #include <net/if_dl.h> 60 #include <net/if_ether.h> 61 #include <net/if_media.h> 62 63 #ifdef INET 64 #include <netinet/in.h> 65 #include <netinet/in_systm.h> 66 #include <netinet/in_var.h> 67 #include <netinet/ip.h> 68 #include <netinet/if_inarp.h> 69 #endif 70 71 #ifdef NS 72 #include <netns/ns.h> 73 #include <netns/ns_if.h> 74 #endif 75 76 #if NBPFILTER > 0 77 #include <net/bpf.h> 78 #include <net/bpfdesc.h> 79 #endif 80 81 #include <machine/cpu.h> 82 #include <machine/bus.h> 83 #include <machine/intr.h> 84 85 #if BYTE_ORDER == BIG_ENDIAN 86 #include <machine/bswap.h> 87 #define htopci(x) bswap32(x) 88 #define pcitoh(x) bswap32(x) 89 #else 90 #define htopci(x) (x) 91 #define pcitoh(x) (x) 92 #endif 93 94 #include <vm/vm.h> 95 #include <vm/pmap.h> 96 97 #include <dev/mii/miivar.h> 98 #include <dev/mii/mii.h> 99 #include <dev/mii/mii_bitbang.h> 100 101 #include <dev/ic/elink3reg.h> 102 /* #include <dev/ic/elink3var.h> */ 103 #include <dev/ic/elinkxlreg.h> 104 #include <dev/ic/elinkxlvar.h> 105 106 #ifdef DEBUG 107 int exdebug = 0; 108 #endif 109 110 /* ifmedia callbacks */ 111 int ex_media_chg __P((struct ifnet *ifp)); 112 void ex_media_stat __P((struct ifnet *ifp, struct ifmediareq *req)); 113 114 void ex_probe_media __P((struct ex_softc *)); 115 void ex_set_filter __P((struct ex_softc *)); 116 void ex_set_media __P((struct ex_softc *)); 117 struct mbuf *ex_get __P((struct ex_softc *, int)); 118 u_int16_t ex_read_eeprom __P((struct ex_softc *, int)); 119 void ex_init __P((struct ex_softc *)); 120 void ex_read __P((struct ex_softc *)); 121 void ex_reset __P((struct ex_softc *)); 122 void ex_set_mc __P((struct ex_softc *)); 123 void ex_getstats __P((struct ex_softc *)); 124 void ex_printstats __P((struct ex_softc *)); 125 void ex_tick __P((void *)); 126 127 static int ex_eeprom_busy __P((struct ex_softc *)); 128 static int ex_add_rxbuf __P((struct ex_softc *, struct ex_rxdesc *)); 129 static void ex_init_txdescs __P((struct ex_softc *)); 130 131 static void ex_shutdown __P((void *)); 132 static void ex_start __P((struct ifnet *)); 133 static void ex_txstat __P((struct ex_softc *)); 134 static u_int16_t ex_mchash __P((u_char *)); 135 136 int ex_mii_readreg __P((struct device *, int, int)); 137 void ex_mii_writereg __P((struct device *, int, int, int)); 138 void ex_mii_statchg __P((struct device *)); 139 140 void ex_probemedia __P((struct ex_softc *)); 141 142 /* 143 * Structure to map media-present bits in boards to ifmedia codes and 144 * printable media names. Used for table-driven ifmedia initialization. 145 */ 146 struct ex_media { 147 int exm_mpbit; /* media present bit */ 148 const char *exm_name; /* name of medium */ 149 int exm_ifmedia; /* ifmedia word for medium */ 150 int exm_epmedia; /* ELINKMEDIA_* constant */ 151 }; 152 153 /* 154 * Media table for 3c90x chips. Note that chips with MII have no 155 * `native' media. 156 */ 157 struct ex_media ex_native_media[] = { 158 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 159 ELINKMEDIA_10BASE_T }, 160 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 161 ELINKMEDIA_10BASE_T }, 162 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 163 ELINKMEDIA_AUI }, 164 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 165 ELINKMEDIA_10BASE_2 }, 166 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 167 ELINKMEDIA_100BASE_TX }, 168 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 169 ELINKMEDIA_100BASE_TX }, 170 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 171 ELINKMEDIA_100BASE_FX }, 172 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 173 ELINKMEDIA_MII }, 174 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 175 ELINKMEDIA_100BASE_T4 }, 176 { 0, NULL, 0, 177 0 }, 178 }; 179 180 /* 181 * MII bit-bang glue. 182 */ 183 u_int32_t ex_mii_bitbang_read __P((struct device *)); 184 void ex_mii_bitbang_write __P((struct device *, u_int32_t)); 185 186 const struct mii_bitbang_ops ex_mii_bitbang_ops = { 187 ex_mii_bitbang_read, 188 ex_mii_bitbang_write, 189 { 190 ELINK_PHY_DATA, /* MII_BIT_MDO */ 191 ELINK_PHY_DATA, /* MII_BIT_MDI */ 192 ELINK_PHY_CLK, /* MII_BIT_MDC */ 193 ELINK_PHY_DIR, /* MII_BIT_DIR_HOST_PHY */ 194 0, /* MII_BIT_DIR_PHY_HOST */ 195 } 196 }; 197 198 /* 199 * Back-end attach and configure. 200 */ 201 void 202 ex_config(sc) 203 struct ex_softc *sc; 204 { 205 struct ifnet *ifp; 206 u_int16_t val; 207 u_int8_t macaddr[ETHER_ADDR_LEN] = {0}; 208 bus_space_tag_t iot = sc->sc_iot; 209 bus_space_handle_t ioh = sc->sc_ioh; 210 bus_dma_segment_t useg, dseg; 211 int urseg, drseg, i, error, attach_stage; 212 213 ex_reset(sc); 214 215 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR0); 216 macaddr[0] = val >> 8; 217 macaddr[1] = val & 0xff; 218 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR1); 219 macaddr[2] = val >> 8; 220 macaddr[3] = val & 0xff; 221 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR2); 222 macaddr[4] = val >> 8; 223 macaddr[5] = val & 0xff; 224 225 printf("%s: MAC address %s\n", sc->sc_dev.dv_xname, 226 ether_sprintf(macaddr)); 227 228 if (sc->intr_ack) { /* 3C575BTX specific */ 229 GO_WINDOW(2); 230 bus_space_write_2(sc->sc_iot, ioh, 12, 0x10|bus_space_read_2(sc->sc_iot, ioh, 12)); 231 } 232 233 attach_stage = 0; 234 235 /* 236 * Allocate the upload descriptors, and create and load the DMA 237 * map for them. 238 */ 239 if ((error = bus_dmamem_alloc(sc->sc_dmat, 240 EX_NUPD * sizeof (struct ex_upd), NBPG, 0, &useg, 1, &urseg, 241 BUS_DMA_NOWAIT)) != 0) { 242 printf("%s: can't allocate upload descriptors, error = %d\n", 243 sc->sc_dev.dv_xname, error); 244 goto fail; 245 } 246 247 attach_stage = 1; 248 249 if ((error = bus_dmamem_map(sc->sc_dmat, &useg, urseg, 250 EX_NUPD * sizeof (struct ex_upd), (caddr_t *)&sc->sc_upd, 251 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 252 printf("%s: can't map upload descriptors, error = %d\n", 253 sc->sc_dev.dv_xname, error); 254 goto fail; 255 } 256 257 attach_stage = 2; 258 259 if ((error = bus_dmamap_create(sc->sc_dmat, 260 EX_NUPD * sizeof (struct ex_upd), 1, 261 EX_NUPD * sizeof (struct ex_upd), 0, BUS_DMA_NOWAIT, 262 &sc->sc_upd_dmamap)) != 0) { 263 printf("%s: can't create upload desc. DMA map, error = %d\n", 264 sc->sc_dev.dv_xname, error); 265 goto fail; 266 } 267 268 attach_stage = 3; 269 270 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_upd_dmamap, 271 sc->sc_upd, EX_NUPD * sizeof (struct ex_upd), NULL, 272 BUS_DMA_NOWAIT)) != 0) { 273 printf("%s: can't load upload desc. DMA map, error = %d\n", 274 sc->sc_dev.dv_xname, error); 275 goto fail; 276 } 277 278 attach_stage = 4; 279 280 /* 281 * Allocate the download descriptors, and create and load the DMA 282 * map for them. 283 */ 284 if ((error = bus_dmamem_alloc(sc->sc_dmat, 285 EX_NDPD * sizeof (struct ex_dpd), NBPG, 0, &dseg, 1, &drseg, 286 BUS_DMA_NOWAIT)) != 0) { 287 printf("%s: can't allocate download descriptors, error = %d\n", 288 sc->sc_dev.dv_xname, error); 289 goto fail; 290 } 291 292 attach_stage = 5; 293 294 if ((error = bus_dmamem_map(sc->sc_dmat, &dseg, drseg, 295 EX_NDPD * sizeof (struct ex_dpd), (caddr_t *)&sc->sc_dpd, 296 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 297 printf("%s: can't map download descriptors, error = %d\n", 298 sc->sc_dev.dv_xname, error); 299 goto fail; 300 } 301 bzero(sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd)); 302 303 attach_stage = 6; 304 305 if ((error = bus_dmamap_create(sc->sc_dmat, 306 EX_NDPD * sizeof (struct ex_dpd), 1, 307 EX_NDPD * sizeof (struct ex_dpd), 0, BUS_DMA_NOWAIT, 308 &sc->sc_dpd_dmamap)) != 0) { 309 printf("%s: can't create download desc. DMA map, error = %d\n", 310 sc->sc_dev.dv_xname, error); 311 goto fail; 312 } 313 314 attach_stage = 7; 315 316 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dpd_dmamap, 317 sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd), NULL, 318 BUS_DMA_NOWAIT)) != 0) { 319 printf("%s: can't load download desc. DMA map, error = %d\n", 320 sc->sc_dev.dv_xname, error); 321 goto fail; 322 } 323 324 attach_stage = 8; 325 326 327 /* 328 * Create the transmit buffer DMA maps. 329 */ 330 for (i = 0; i < EX_NDPD; i++) { 331 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 332 EX_NTFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 333 &sc->sc_tx_dmamaps[i])) != 0) { 334 printf("%s: can't create tx DMA map %d, error = %d\n", 335 sc->sc_dev.dv_xname, i, error); 336 goto fail; 337 } 338 } 339 340 attach_stage = 9; 341 342 /* 343 * Create the receive buffer DMA maps. 344 */ 345 for (i = 0; i < EX_NUPD; i++) { 346 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 347 EX_NRFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 348 &sc->sc_rx_dmamaps[i])) != 0) { 349 printf("%s: can't create rx DMA map %d, error = %d\n", 350 sc->sc_dev.dv_xname, i, error); 351 goto fail; 352 } 353 } 354 355 attach_stage = 10; 356 357 /* 358 * Create ring of upload descriptors, only once. The DMA engine 359 * will loop over this when receiving packets, stalling if it 360 * hits an UPD with a finished receive. 361 */ 362 for (i = 0; i < EX_NUPD; i++) { 363 sc->sc_rxdescs[i].rx_dmamap = sc->sc_rx_dmamaps[i]; 364 sc->sc_rxdescs[i].rx_upd = &sc->sc_upd[i]; 365 sc->sc_upd[i].upd_frags[0].fr_len = 366 htopci((MCLBYTES - 2) | EX_FR_LAST); 367 if (ex_add_rxbuf(sc, &sc->sc_rxdescs[i]) != 0) { 368 printf("%s: can't allocate or map rx buffers\n", 369 sc->sc_dev.dv_xname); 370 goto fail; 371 } 372 } 373 374 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 0, 375 EX_NUPD * sizeof (struct ex_upd), 376 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 377 378 ex_init_txdescs(sc); 379 380 attach_stage = 11; 381 382 383 GO_WINDOW(3); 384 val = bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS); 385 if (val & ELINK_MEDIACAP_MII) 386 sc->ex_conf |= EX_CONF_MII; 387 388 ifp = &sc->sc_ethercom.ec_if; 389 390 /* 391 * Initialize our media structures and MII info. We'll 392 * probe the MII if we discover that we have one. 393 */ 394 sc->ex_mii.mii_ifp = ifp; 395 sc->ex_mii.mii_readreg = ex_mii_readreg; 396 sc->ex_mii.mii_writereg = ex_mii_writereg; 397 sc->ex_mii.mii_statchg = ex_mii_statchg; 398 ifmedia_init(&sc->ex_mii.mii_media, 0, ex_media_chg, 399 ex_media_stat); 400 401 if (sc->ex_conf & EX_CONF_MII) { 402 /* 403 * Find PHY, extract media information from it. 404 * First, select the right transceiver. 405 */ 406 u_int32_t icfg; 407 408 GO_WINDOW(3); 409 icfg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 410 icfg &= ~(CONFIG_XCVR_SEL << 16); 411 if (val & (ELINK_MEDIACAP_MII | ELINK_MEDIACAP_100BASET4)) 412 icfg |= ELINKMEDIA_MII << (CONFIG_XCVR_SEL_SHIFT + 16); 413 if (val & ELINK_MEDIACAP_100BASETX) 414 icfg |= ELINKMEDIA_AUTO << (CONFIG_XCVR_SEL_SHIFT + 16); 415 if (val & ELINK_MEDIACAP_100BASEFX) 416 icfg |= ELINKMEDIA_100BASE_FX 417 << (CONFIG_XCVR_SEL_SHIFT + 16); 418 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, icfg); 419 420 mii_phy_probe(&sc->sc_dev, &sc->ex_mii, 0xffffffff, 421 MII_PHY_ANY, MII_OFFSET_ANY); 422 if (LIST_FIRST(&sc->ex_mii.mii_phys) == NULL) { 423 ifmedia_add(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE, 424 0, NULL); 425 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE); 426 } else { 427 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_AUTO); 428 } 429 } else 430 ex_probemedia(sc); 431 432 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 433 ifp->if_softc = sc; 434 ifp->if_start = ex_start; 435 ifp->if_ioctl = ex_ioctl; 436 ifp->if_watchdog = ex_watchdog; 437 ifp->if_flags = 438 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 439 440 if_attach(ifp); 441 ether_ifattach(ifp, macaddr); 442 443 GO_WINDOW(1); 444 445 sc->tx_start_thresh = 20; 446 sc->tx_succ_ok = 0; 447 448 /* TODO: set queues to 0 */ 449 450 #if NBPFILTER > 0 451 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB, 452 sizeof(struct ether_header)); 453 #endif 454 455 #if NRND > 0 456 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 457 RND_TYPE_NET, 0); 458 #endif 459 460 /* Establish callback to reset card when we reboot. */ 461 shutdownhook_establish(ex_shutdown, sc); 462 return; 463 464 fail: 465 /* 466 * Free any resources we've allocated during the failed attach 467 * attempt. Do this in reverse order and fall though. 468 */ 469 switch (attach_stage) { 470 case 11: 471 { 472 struct ex_rxdesc *rxd; 473 474 for (i = 0; i < EX_NUPD; i++) { 475 rxd = &sc->sc_rxdescs[i]; 476 if (rxd->rx_mbhead != NULL) { 477 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap); 478 m_freem(rxd->rx_mbhead); 479 } 480 } 481 } 482 /* FALLTHROUGH */ 483 484 case 10: 485 for (i = 0; i < EX_NUPD; i++) 486 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]); 487 /* FALLTHROUGH */ 488 489 case 9: 490 for (i = 0; i < EX_NDPD; i++) 491 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]); 492 /* FALLTHROUGH */ 493 case 8: 494 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap); 495 /* FALLTHROUGH */ 496 497 case 7: 498 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap); 499 /* FALLTHROUGH */ 500 501 case 6: 502 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd, 503 EX_NDPD * sizeof (struct ex_dpd)); 504 /* FALLTHROUGH */ 505 506 case 5: 507 bus_dmamem_free(sc->sc_dmat, &dseg, drseg); 508 break; 509 510 case 4: 511 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap); 512 /* FALLTHROUGH */ 513 514 case 3: 515 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap); 516 /* FALLTHROUGH */ 517 518 case 2: 519 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd, 520 EX_NUPD * sizeof (struct ex_upd)); 521 /* FALLTHROUGH */ 522 523 case 1: 524 bus_dmamem_free(sc->sc_dmat, &useg, urseg); 525 break; 526 } 527 528 } 529 530 /* 531 * Find the media present on non-MII chips. 532 */ 533 void 534 ex_probemedia(sc) 535 struct ex_softc *sc; 536 { 537 bus_space_tag_t iot = sc->sc_iot; 538 bus_space_handle_t ioh = sc->sc_ioh; 539 struct ifmedia *ifm = &sc->ex_mii.mii_media; 540 struct ex_media *exm; 541 u_int16_t config1, reset_options, default_media; 542 int defmedia = 0; 543 const char *sep = "", *defmedianame = NULL; 544 545 GO_WINDOW(3); 546 config1 = bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2); 547 reset_options = bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 548 GO_WINDOW(0); 549 550 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 551 552 printf("%s: ", sc->sc_dev.dv_xname); 553 554 /* Sanity check that there are any media! */ 555 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 556 printf("no media present!\n"); 557 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 558 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 559 return; 560 } 561 562 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 563 564 for (exm = ex_native_media; exm->exm_name != NULL; exm++) { 565 if (reset_options & exm->exm_mpbit) { 566 /* 567 * Default media is a little complicated. We 568 * support full-duplex which uses the same 569 * reset options bit. 570 * 571 * XXX Check EEPROM for default to FDX? 572 */ 573 if (exm->exm_epmedia == default_media) { 574 if ((exm->exm_ifmedia & IFM_FDX) == 0) { 575 defmedia = exm->exm_ifmedia; 576 defmedianame = exm->exm_name; 577 } 578 } else if (defmedia == 0) { 579 defmedia = exm->exm_ifmedia; 580 defmedianame = exm->exm_name; 581 } 582 ifmedia_add(ifm, exm->exm_ifmedia, exm->exm_epmedia, 583 NULL); 584 PRINT(exm->exm_name); 585 } 586 } 587 588 #undef PRINT 589 590 #ifdef DIAGNOSTIC 591 if (defmedia == 0) 592 panic("ex_probemedia: impossible"); 593 #endif 594 595 printf(", default %s\n", defmedianame); 596 ifmedia_set(ifm, defmedia); 597 } 598 599 /* 600 * Bring device up. 601 */ 602 void 603 ex_init(sc) 604 struct ex_softc *sc; 605 { 606 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 607 bus_space_tag_t iot = sc->sc_iot; 608 bus_space_handle_t ioh = sc->sc_ioh; 609 int s, i; 610 611 s = splnet(); 612 613 ex_waitcmd(sc); 614 ex_stop(sc); 615 616 /* 617 * Set the station address and clear the station mask. The latter 618 * is needed for 90x cards, 0 is the default for 90xB cards. 619 */ 620 GO_WINDOW(2); 621 for (i = 0; i < ETHER_ADDR_LEN; i++) { 622 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 623 LLADDR(ifp->if_sadl)[i]); 624 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 625 } 626 627 GO_WINDOW(3); 628 629 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_RESET); 630 ex_waitcmd(sc); 631 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_RESET); 632 ex_waitcmd(sc); 633 634 /* 635 * Disable reclaim threshold for 90xB, set free threshold to 636 * 6 * 256 = 1536 for 90x. 637 */ 638 if (sc->ex_conf & EX_CONF_90XB) 639 bus_space_write_2(iot, ioh, ELINK_COMMAND, 640 ELINK_TXRECLTHRESH | 255); 641 else 642 bus_space_write_1(iot, ioh, ELINK_TXFREETHRESH, 6); 643 644 bus_space_write_2(iot, ioh, ELINK_COMMAND, 645 SET_RX_EARLY_THRESH | ELINK_THRESH_DISABLE); 646 647 bus_space_write_4(iot, ioh, ELINK_DMACTRL, 648 bus_space_read_4(iot, ioh, ELINK_DMACTRL) | ELINK_DMAC_UPRXEAREN); 649 650 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK | S_MASK); 651 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK | S_MASK); 652 653 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 654 if (sc->intr_ack) 655 (* sc->intr_ack)(sc); 656 ex_set_media(sc); 657 ex_set_mc(sc); 658 659 660 bus_space_write_2(iot, ioh, ELINK_COMMAND, STATS_ENABLE); 661 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 662 bus_space_write_4(iot, ioh, ELINK_UPLISTPTR, sc->sc_upddma); 663 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 664 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_UPUNSTALL); 665 666 ifp->if_flags |= IFF_RUNNING; 667 ifp->if_flags &= ~IFF_OACTIVE; 668 ex_start(ifp); 669 670 GO_WINDOW(1); 671 672 splx(s); 673 674 timeout(ex_tick, sc, hz); 675 } 676 677 /* 678 * Multicast hash filter according to the 3Com spec. 679 */ 680 static u_int16_t 681 ex_mchash(addr) 682 u_char *addr; 683 { 684 u_int32_t crc, carry; 685 int i, j; 686 u_char c; 687 688 /* Compute CRC for the address value. */ 689 crc = 0xffffffff; /* initial value */ 690 691 for (i = 0; i < 6; i++) { 692 c = addr[i]; 693 for (j = 0; j < 8; j++) { 694 carry = ((crc & 0x80000000) ? 1 : 0) ^ (c & 0x01); 695 crc <<= 1; 696 c >>= 1; 697 if (carry) 698 crc = (crc ^ 0x04c11db6) | carry; 699 } 700 } 701 702 /* Return the filter bit position. */ 703 return(crc & 0x000000ff); 704 } 705 706 707 /* 708 * Set multicast receive filter. Also take care of promiscuous mode 709 * here (XXX). 710 */ 711 void 712 ex_set_mc(sc) 713 register struct ex_softc *sc; 714 { 715 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 716 struct ethercom *ec = &sc->sc_ethercom; 717 struct ether_multi *enm; 718 struct ether_multistep estep; 719 int i; 720 u_int16_t mask = FIL_INDIVIDUAL | FIL_BRDCST; 721 722 if (ifp->if_flags & IFF_PROMISC) 723 mask |= FIL_PROMISC; 724 725 if (!(ifp->if_flags & IFF_MULTICAST)) 726 goto out; 727 728 if (!(sc->ex_conf & EX_CONF_90XB) || ifp->if_flags & IFF_ALLMULTI) { 729 mask |= (ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0; 730 } else { 731 ETHER_FIRST_MULTI(estep, ec, enm); 732 while (enm != NULL) { 733 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 734 ETHER_ADDR_LEN) != 0) 735 goto out; 736 i = ex_mchash(enm->enm_addrlo); 737 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 738 ELINK_COMMAND, ELINK_SETHASHFILBIT | i); 739 ETHER_NEXT_MULTI(estep, enm); 740 } 741 mask |= FIL_MULTIHASH; 742 } 743 out: 744 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 745 SET_RX_FILTER | mask); 746 } 747 748 749 static void 750 ex_txstat(sc) 751 struct ex_softc *sc; 752 { 753 bus_space_tag_t iot = sc->sc_iot; 754 bus_space_handle_t ioh = sc->sc_ioh; 755 int i; 756 757 /* 758 * We need to read+write TX_STATUS until we get a 0 status 759 * in order to turn off the interrupt flag. 760 */ 761 while ((i = bus_space_read_1(iot, ioh, ELINK_TXSTATUS)) & TXS_COMPLETE) { 762 bus_space_write_1(iot, ioh, ELINK_TXSTATUS, 0x0); 763 764 if (i & TXS_JABBER) { 765 ++sc->sc_ethercom.ec_if.if_oerrors; 766 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 767 printf("%s: jabber (%x)\n", 768 sc->sc_dev.dv_xname, i); 769 ex_init(sc); 770 /* TODO: be more subtle here */ 771 } else if (i & TXS_UNDERRUN) { 772 ++sc->sc_ethercom.ec_if.if_oerrors; 773 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 774 printf("%s: fifo underrun (%x) @%d\n", 775 sc->sc_dev.dv_xname, i, 776 sc->tx_start_thresh); 777 if (sc->tx_succ_ok < 100) 778 sc->tx_start_thresh = min(ETHER_MAX_LEN, 779 sc->tx_start_thresh + 20); 780 sc->tx_succ_ok = 0; 781 ex_init(sc); 782 /* TODO: be more subtle here */ 783 } else if (i & TXS_MAX_COLLISION) { 784 ++sc->sc_ethercom.ec_if.if_collisions; 785 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 786 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 787 } else 788 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 789 } 790 } 791 792 int 793 ex_media_chg(ifp) 794 struct ifnet *ifp; 795 { 796 struct ex_softc *sc = ifp->if_softc; 797 798 if (ifp->if_flags & IFF_UP) 799 ex_init(sc); 800 return 0; 801 } 802 803 void 804 ex_set_media(sc) 805 struct ex_softc *sc; 806 { 807 bus_space_tag_t iot = sc->sc_iot; 808 bus_space_handle_t ioh = sc->sc_ioh; 809 int config0, config1; 810 811 if (((sc->ex_conf & EX_CONF_MII) && 812 (sc->ex_mii.mii_media_active & IFM_FDX)) 813 || (!(sc->ex_conf & EX_CONF_MII) && 814 (sc->ex_mii.mii_media.ifm_media & IFM_FDX))) { 815 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 816 MAC_CONTROL_FDX); 817 } else { 818 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 0); 819 } 820 821 /* 822 * If the device has MII, select it, and then tell the 823 * PHY which media to use. 824 */ 825 if (sc->ex_conf & EX_CONF_MII) { 826 GO_WINDOW(3); 827 828 config0 = (u_int)bus_space_read_2(iot, ioh, 829 ELINK_W3_INTERNAL_CONFIG); 830 config1 = (u_int)bus_space_read_2(iot, ioh, 831 ELINK_W3_INTERNAL_CONFIG + 2); 832 833 config1 = config1 & ~CONFIG_MEDIAMASK; 834 config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT); 835 836 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 837 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, config1); 838 mii_mediachg(&sc->ex_mii); 839 return; 840 } 841 842 GO_WINDOW(4); 843 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0); 844 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 845 delay(800); 846 847 /* 848 * Now turn on the selected media/transceiver. 849 */ 850 switch (IFM_SUBTYPE(sc->ex_mii.mii_media.ifm_cur->ifm_media)) { 851 case IFM_10_T: 852 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 853 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 854 break; 855 856 case IFM_10_2: 857 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 858 DELAY(800); 859 break; 860 861 case IFM_100_TX: 862 case IFM_100_FX: 863 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 864 LINKBEAT_ENABLE); 865 DELAY(800); 866 break; 867 868 case IFM_10_5: 869 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 870 SQE_ENABLE); 871 DELAY(800); 872 break; 873 874 case IFM_MANUAL: 875 break; 876 877 case IFM_NONE: 878 return; 879 880 default: 881 panic("ex_set_media: impossible"); 882 } 883 884 GO_WINDOW(3); 885 config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 886 config1 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2); 887 888 config1 = config1 & ~CONFIG_MEDIAMASK; 889 config1 |= (sc->ex_mii.mii_media.ifm_cur->ifm_data << 890 CONFIG_MEDIAMASK_SHIFT); 891 892 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 893 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, config1); 894 } 895 896 /* 897 * Get currently-selected media from card. 898 * (if_media callback, may be called before interface is brought up). 899 */ 900 void 901 ex_media_stat(ifp, req) 902 struct ifnet *ifp; 903 struct ifmediareq *req; 904 { 905 struct ex_softc *sc = ifp->if_softc; 906 907 if (sc->ex_conf & EX_CONF_MII) { 908 mii_pollstat(&sc->ex_mii); 909 req->ifm_status = sc->ex_mii.mii_media_status; 910 req->ifm_active = sc->ex_mii.mii_media_active; 911 } else { 912 GO_WINDOW(4); 913 req->ifm_status = IFM_AVALID; 914 req->ifm_active = sc->ex_mii.mii_media.ifm_cur->ifm_media; 915 if (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 916 ELINK_W4_MEDIA_TYPE) & LINKBEAT_DETECT) 917 req->ifm_status |= IFM_ACTIVE; 918 GO_WINDOW(1); 919 } 920 } 921 922 923 924 /* 925 * Start outputting on the interface. 926 */ 927 static void 928 ex_start(ifp) 929 struct ifnet *ifp; 930 { 931 struct ex_softc *sc = ifp->if_softc; 932 bus_space_tag_t iot = sc->sc_iot; 933 bus_space_handle_t ioh = sc->sc_ioh; 934 volatile struct ex_fraghdr *fr = NULL; 935 volatile struct ex_dpd *dpd = NULL, *prevdpd = NULL; 936 struct ex_txdesc *txp; 937 bus_dmamap_t dmamap; 938 int offset, totlen; 939 940 if (sc->tx_head || sc->tx_free == NULL) 941 return; 942 943 txp = NULL; 944 945 /* 946 * We're finished if there is nothing more to add to the list or if 947 * we're all filled up with buffers to transmit. 948 */ 949 while (ifp->if_snd.ifq_head != NULL && sc->tx_free != NULL) { 950 struct mbuf *mb_head; 951 int segment, error; 952 953 /* 954 * Grab a packet to transmit. 955 */ 956 IF_DEQUEUE(&ifp->if_snd, mb_head); 957 958 /* 959 * Get pointer to next available tx desc. 960 */ 961 txp = sc->tx_free; 962 sc->tx_free = txp->tx_next; 963 txp->tx_next = NULL; 964 dmamap = txp->tx_dmamap; 965 966 /* 967 * Go through each of the mbufs in the chain and initialize 968 * the transmit buffer descriptors with the physical address 969 * and size of the mbuf. 970 */ 971 reload: 972 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 973 mb_head, BUS_DMA_NOWAIT); 974 switch (error) { 975 case 0: 976 /* Success. */ 977 break; 978 979 case EFBIG: 980 { 981 struct mbuf *mn; 982 983 /* 984 * We ran out of segments. We have to recopy this 985 * mbuf chain first. Bail out if we can't get the 986 * new buffers. 987 */ 988 printf("%s: too many segments, ", sc->sc_dev.dv_xname); 989 990 MGETHDR(mn, M_DONTWAIT, MT_DATA); 991 if (mn == NULL) { 992 m_freem(mb_head); 993 printf("aborting\n"); 994 goto out; 995 } 996 if (mb_head->m_pkthdr.len > MHLEN) { 997 MCLGET(mn, M_DONTWAIT); 998 if ((mn->m_flags & M_EXT) == 0) { 999 m_freem(mn); 1000 m_freem(mb_head); 1001 printf("aborting\n"); 1002 goto out; 1003 } 1004 } 1005 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, 1006 mtod(mn, caddr_t)); 1007 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; 1008 m_freem(mb_head); 1009 mb_head = mn; 1010 printf("retrying\n"); 1011 goto reload; 1012 } 1013 1014 default: 1015 /* 1016 * Some other problem; report it. 1017 */ 1018 printf("%s: can't load mbuf chain, error = %d\n", 1019 sc->sc_dev.dv_xname, error); 1020 m_freem(mb_head); 1021 goto out; 1022 } 1023 1024 fr = &txp->tx_dpd->dpd_frags[0]; 1025 totlen = 0; 1026 for (segment = 0; segment < dmamap->dm_nsegs; segment++, fr++) { 1027 fr->fr_addr = htopci(dmamap->dm_segs[segment].ds_addr); 1028 fr->fr_len = htopci(dmamap->dm_segs[segment].ds_len); 1029 totlen += dmamap->dm_segs[segment].ds_len; 1030 } 1031 fr--; 1032 fr->fr_len |= htopci(EX_FR_LAST); 1033 txp->tx_mbhead = mb_head; 1034 1035 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 1036 BUS_DMASYNC_PREWRITE); 1037 1038 dpd = txp->tx_dpd; 1039 dpd->dpd_nextptr = 0; 1040 dpd->dpd_fsh = htopci(totlen); 1041 1042 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1043 ((caddr_t)dpd - (caddr_t)sc->sc_dpd), 1044 sizeof (struct ex_dpd), 1045 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1046 1047 /* 1048 * No need to stall the download engine, we know it's 1049 * not busy right now. 1050 * 1051 * Fix up pointers in both the "soft" tx and the physical 1052 * tx list. 1053 */ 1054 if (sc->tx_head != NULL) { 1055 prevdpd = sc->tx_tail->tx_dpd; 1056 offset = ((caddr_t)prevdpd - (caddr_t)sc->sc_dpd); 1057 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1058 offset, sizeof (struct ex_dpd), 1059 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1060 prevdpd->dpd_nextptr = htopci(DPD_DMADDR(sc, txp)); 1061 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1062 offset, sizeof (struct ex_dpd), 1063 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1064 sc->tx_tail->tx_next = txp; 1065 sc->tx_tail = txp; 1066 } else { 1067 sc->tx_tail = sc->tx_head = txp; 1068 } 1069 1070 #if NBPFILTER > 0 1071 /* 1072 * Pass packet to bpf if there is a listener. 1073 */ 1074 if (ifp->if_bpf) 1075 bpf_mtap(ifp->if_bpf, mb_head); 1076 #endif 1077 } 1078 out: 1079 if (sc->tx_head) { 1080 sc->tx_tail->tx_dpd->dpd_fsh |= htopci(EX_DPD_DNIND); 1081 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1082 ((caddr_t)sc->tx_tail->tx_dpd - (caddr_t)sc->sc_dpd), 1083 sizeof (struct ex_dpd), 1084 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1085 ifp->if_flags |= IFF_OACTIVE; 1086 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_DNUNSTALL); 1087 bus_space_write_4(iot, ioh, ELINK_DNLISTPTR, 1088 DPD_DMADDR(sc, sc->tx_head)); 1089 1090 /* trigger watchdog */ 1091 ifp->if_timer = 5; 1092 } 1093 } 1094 1095 1096 int 1097 ex_intr(arg) 1098 void *arg; 1099 { 1100 struct ex_softc *sc = arg; 1101 bus_space_tag_t iot = sc->sc_iot; 1102 bus_space_handle_t ioh = sc->sc_ioh; 1103 u_int16_t stat; 1104 int ret = 0; 1105 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1106 1107 if (sc->enabled == 0) { 1108 return ret; 1109 } 1110 for (;;) { 1111 stat = bus_space_read_2(iot, ioh, ELINK_STATUS); 1112 if (!(stat & S_MASK)) 1113 break; 1114 /* 1115 * Acknowledge interrupts. 1116 */ 1117 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1118 (stat & S_MASK)); 1119 if (sc->intr_ack) 1120 (*sc->intr_ack)(sc); 1121 ret = 1; 1122 if (stat & S_HOST_ERROR) { 1123 printf("%s: adapter failure (%x)\n", 1124 sc->sc_dev.dv_xname, stat); 1125 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1126 C_INTR_LATCH); 1127 ex_reset(sc); 1128 ex_init(sc); 1129 return 1; 1130 } 1131 if (stat & S_TX_COMPLETE) { 1132 ex_txstat(sc); 1133 } 1134 if (stat & S_UPD_STATS) { 1135 ex_getstats(sc); 1136 } 1137 if (stat & S_DN_COMPLETE) { 1138 struct ex_txdesc *txp, *ptxp = NULL; 1139 bus_dmamap_t txmap; 1140 1141 /* reset watchdog timer, was set in ex_start() */ 1142 ifp->if_timer = 0; 1143 1144 for (txp = sc->tx_head; txp != NULL; 1145 txp = txp->tx_next) { 1146 bus_dmamap_sync(sc->sc_dmat, 1147 sc->sc_dpd_dmamap, 1148 (caddr_t)txp->tx_dpd - (caddr_t)sc->sc_dpd, 1149 sizeof (struct ex_dpd), 1150 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1151 if (txp->tx_mbhead != NULL) { 1152 txmap = txp->tx_dmamap; 1153 bus_dmamap_sync(sc->sc_dmat, txmap, 1154 0, txmap->dm_mapsize, 1155 BUS_DMASYNC_POSTWRITE); 1156 bus_dmamap_unload(sc->sc_dmat, txmap); 1157 m_freem(txp->tx_mbhead); 1158 txp->tx_mbhead = NULL; 1159 } 1160 ptxp = txp; 1161 } 1162 1163 /* 1164 * Move finished tx buffers back to the tx free list. 1165 */ 1166 if (sc->tx_free) { 1167 sc->tx_ftail->tx_next = sc->tx_head; 1168 sc->tx_ftail = ptxp; 1169 } else 1170 sc->tx_ftail = sc->tx_free = sc->tx_head; 1171 1172 sc->tx_head = sc->tx_tail = NULL; 1173 ifp->if_flags &= ~IFF_OACTIVE; 1174 } 1175 1176 if (stat & S_UP_COMPLETE) { 1177 struct ex_rxdesc *rxd; 1178 struct mbuf *m; 1179 struct ex_upd *upd; 1180 bus_dmamap_t rxmap; 1181 u_int32_t pktstat; 1182 1183 rcvloop: 1184 rxd = sc->rx_head; 1185 rxmap = rxd->rx_dmamap; 1186 m = rxd->rx_mbhead; 1187 upd = rxd->rx_upd; 1188 pktstat = pcitoh(upd->upd_pktstatus); 1189 1190 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, 1191 rxmap->dm_mapsize, 1192 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1193 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1194 ((caddr_t)upd - (caddr_t)sc->sc_upd), 1195 sizeof (struct ex_upd), 1196 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1197 1198 if (pktstat & EX_UPD_COMPLETE) { 1199 /* 1200 * Remove first packet from the chain. 1201 */ 1202 sc->rx_head = rxd->rx_next; 1203 rxd->rx_next = NULL; 1204 1205 /* 1206 * Add a new buffer to the receive chain. 1207 * If this fails, the old buffer is recycled 1208 * instead. 1209 */ 1210 if (ex_add_rxbuf(sc, rxd) == 0) { 1211 struct ether_header *eh; 1212 u_int16_t total_len; 1213 1214 1215 if (pktstat & EX_UPD_ERR) { 1216 ifp->if_ierrors++; 1217 m_freem(m); 1218 goto rcvloop; 1219 } 1220 1221 total_len = pktstat & EX_UPD_PKTLENMASK; 1222 if (total_len < 1223 sizeof(struct ether_header)) { 1224 m_freem(m); 1225 goto rcvloop; 1226 } 1227 m->m_pkthdr.rcvif = ifp; 1228 m->m_pkthdr.len = m->m_len = total_len; 1229 eh = mtod(m, struct ether_header *); 1230 #if NBPFILTER > 0 1231 if (ifp->if_bpf) { 1232 bpf_tap(ifp->if_bpf, 1233 mtod(m, caddr_t), 1234 total_len); 1235 /* 1236 * Only pass this packet up 1237 * if it is for us. 1238 */ 1239 if ((ifp->if_flags & 1240 IFF_PROMISC) && 1241 (eh->ether_dhost[0] & 1) 1242 == 0 && 1243 bcmp(eh->ether_dhost, 1244 LLADDR(ifp->if_sadl), 1245 sizeof(eh->ether_dhost)) 1246 != 0) { 1247 m_freem(m); 1248 goto rcvloop; 1249 } 1250 } 1251 #endif /* NBPFILTER > 0 */ 1252 (*ifp->if_input)(ifp, m); 1253 } 1254 goto rcvloop; 1255 } 1256 /* 1257 * Just in case we filled up all UPDs and the DMA engine 1258 * stalled. We could be more subtle about this. 1259 */ 1260 if (bus_space_read_4(iot, ioh, ELINK_UPLISTPTR) == 0) { 1261 printf("%s: uplistptr was 0\n", 1262 sc->sc_dev.dv_xname); 1263 ex_init(sc); 1264 } else if (bus_space_read_4(iot, ioh, ELINK_UPPKTSTATUS) 1265 & 0x2000) { 1266 printf("%s: receive stalled\n", 1267 sc->sc_dev.dv_xname); 1268 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1269 ELINK_UPUNSTALL); 1270 } 1271 } 1272 } 1273 if (ret) { 1274 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1275 if (ifp->if_snd.ifq_head != NULL) 1276 ex_start(ifp); 1277 } 1278 return ret; 1279 } 1280 1281 int 1282 ex_ioctl(ifp, cmd, data) 1283 register struct ifnet *ifp; 1284 u_long cmd; 1285 caddr_t data; 1286 { 1287 struct ex_softc *sc = ifp->if_softc; 1288 struct ifaddr *ifa = (struct ifaddr *)data; 1289 struct ifreq *ifr = (struct ifreq *)data; 1290 int s, error = 0; 1291 1292 s = splnet(); 1293 1294 switch (cmd) { 1295 1296 case SIOCSIFADDR: 1297 ifp->if_flags |= IFF_UP; 1298 switch (ifa->ifa_addr->sa_family) { 1299 #ifdef INET 1300 case AF_INET: 1301 ex_init(sc); 1302 arp_ifinit(&sc->sc_ethercom.ec_if, ifa); 1303 break; 1304 #endif 1305 #ifdef NS 1306 case AF_NS: 1307 { 1308 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1309 1310 if (ns_nullhost(*ina)) 1311 ina->x_host = *(union ns_host *) 1312 LLADDR(ifp->if_sadl); 1313 else 1314 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl), 1315 ifp->if_addrlen); 1316 /* Set new address. */ 1317 ex_init(sc); 1318 break; 1319 } 1320 #endif 1321 default: 1322 ex_init(sc); 1323 break; 1324 } 1325 break; 1326 case SIOCSIFMEDIA: 1327 case SIOCGIFMEDIA: 1328 error = ifmedia_ioctl(ifp, ifr, &sc->ex_mii.mii_media, cmd); 1329 break; 1330 1331 case SIOCSIFFLAGS: 1332 if ((ifp->if_flags & IFF_UP) == 0 && 1333 (ifp->if_flags & IFF_RUNNING) != 0) { 1334 /* 1335 * If interface is marked down and it is running, then 1336 * stop it. 1337 */ 1338 ex_stop(sc); 1339 ifp->if_flags &= ~IFF_RUNNING; 1340 } else if ((ifp->if_flags & IFF_UP) != 0 && 1341 (ifp->if_flags & IFF_RUNNING) == 0) { 1342 /* 1343 * If interface is marked up and it is stopped, then 1344 * start it. 1345 */ 1346 ex_init(sc); 1347 } else if ((ifp->if_flags & IFF_UP) != 0) { 1348 /* 1349 * Deal with other flags that change hardware 1350 * state, i.e. IFF_PROMISC. 1351 */ 1352 ex_set_mc(sc); 1353 } 1354 break; 1355 1356 case SIOCADDMULTI: 1357 case SIOCDELMULTI: 1358 error = (cmd == SIOCADDMULTI) ? 1359 ether_addmulti(ifr, &sc->sc_ethercom) : 1360 ether_delmulti(ifr, &sc->sc_ethercom); 1361 1362 if (error == ENETRESET) { 1363 /* 1364 * Multicast list has changed; set the hardware filter 1365 * accordingly. 1366 */ 1367 ex_set_mc(sc); 1368 error = 0; 1369 } 1370 break; 1371 1372 default: 1373 error = EINVAL; 1374 break; 1375 } 1376 1377 splx(s); 1378 return (error); 1379 } 1380 1381 void 1382 ex_getstats(sc) 1383 struct ex_softc *sc; 1384 { 1385 bus_space_handle_t ioh = sc->sc_ioh; 1386 bus_space_tag_t iot = sc->sc_iot; 1387 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1388 u_int8_t upperok; 1389 1390 GO_WINDOW(6); 1391 upperok = bus_space_read_1(iot, ioh, UPPER_FRAMES_OK); 1392 ifp->if_ipackets += bus_space_read_1(iot, ioh, RX_FRAMES_OK); 1393 ifp->if_ipackets += (upperok & 0x03) << 8; 1394 ifp->if_opackets += bus_space_read_1(iot, ioh, TX_FRAMES_OK); 1395 ifp->if_opackets += (upperok & 0x30) << 4; 1396 ifp->if_ierrors += bus_space_read_1(iot, ioh, RX_OVERRUNS); 1397 ifp->if_collisions += bus_space_read_1(iot, ioh, TX_COLLISIONS); 1398 /* 1399 * There seems to be no way to get the exact number of collisions, 1400 * this is the number that occured at the very least. 1401 */ 1402 ifp->if_collisions += 2 * bus_space_read_1(iot, ioh, 1403 TX_AFTER_X_COLLISIONS); 1404 ifp->if_ibytes += bus_space_read_2(iot, ioh, RX_TOTAL_OK); 1405 ifp->if_obytes += bus_space_read_2(iot, ioh, TX_TOTAL_OK); 1406 1407 /* 1408 * Clear the following to avoid stats overflow interrupts 1409 */ 1410 bus_space_read_1(iot, ioh, TX_DEFERRALS); 1411 bus_space_read_1(iot, ioh, TX_AFTER_1_COLLISION); 1412 bus_space_read_1(iot, ioh, TX_NO_SQE); 1413 bus_space_read_1(iot, ioh, TX_CD_LOST); 1414 GO_WINDOW(4); 1415 bus_space_read_1(iot, ioh, ELINK_W4_BADSSD); 1416 upperok = bus_space_read_1(iot, ioh, ELINK_W4_UBYTESOK); 1417 ifp->if_ibytes += (upperok & 0x0f) << 16; 1418 ifp->if_obytes += (upperok & 0xf0) << 12; 1419 GO_WINDOW(1); 1420 } 1421 1422 void 1423 ex_printstats(sc) 1424 struct ex_softc *sc; 1425 { 1426 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1427 1428 ex_getstats(sc); 1429 printf("in %llu out %llu ierror %llu oerror %llu ibytes %llu obytes " 1430 "%llu\n", (unsigned long long)ifp->if_ipackets, 1431 (unsigned long long)ifp->if_opackets, 1432 (unsigned long long)ifp->if_ierrors, 1433 (unsigned long long)ifp->if_oerrors, 1434 (unsigned long long)ifp->if_ibytes, 1435 (unsigned long long)ifp->if_obytes); 1436 } 1437 1438 void 1439 ex_tick(arg) 1440 void *arg; 1441 { 1442 struct ex_softc *sc = arg; 1443 int s = splnet(); 1444 1445 if (sc->ex_conf & EX_CONF_MII) 1446 mii_tick(&sc->ex_mii); 1447 1448 if (!(bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, ELINK_STATUS) 1449 & S_COMMAND_IN_PROGRESS)) 1450 ex_getstats(sc); 1451 1452 splx(s); 1453 1454 timeout(ex_tick, sc, hz); 1455 } 1456 1457 1458 void 1459 ex_reset(sc) 1460 struct ex_softc *sc; 1461 { 1462 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, GLOBAL_RESET); 1463 delay(400); 1464 ex_waitcmd(sc); 1465 } 1466 1467 void 1468 ex_watchdog(ifp) 1469 struct ifnet *ifp; 1470 { 1471 struct ex_softc *sc = ifp->if_softc; 1472 1473 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1474 ++sc->sc_ethercom.ec_if.if_oerrors; 1475 1476 ex_reset(sc); 1477 ex_init(sc); 1478 } 1479 1480 void 1481 ex_stop(sc) 1482 struct ex_softc *sc; 1483 { 1484 bus_space_tag_t iot = sc->sc_iot; 1485 bus_space_handle_t ioh = sc->sc_ioh; 1486 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1487 struct ex_txdesc *tx; 1488 struct ex_rxdesc *rx; 1489 int i; 1490 1491 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1492 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1493 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1494 1495 for (tx = sc->tx_head ; tx != NULL; tx = tx->tx_next) { 1496 if (tx->tx_mbhead == NULL) 1497 continue; 1498 m_freem(tx->tx_mbhead); 1499 tx->tx_mbhead = NULL; 1500 bus_dmamap_unload(sc->sc_dmat, tx->tx_dmamap); 1501 tx->tx_dpd->dpd_fsh = tx->tx_dpd->dpd_nextptr = 0; 1502 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1503 ((caddr_t)tx->tx_dpd - (caddr_t)sc->sc_dpd), 1504 sizeof (struct ex_dpd), 1505 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1506 } 1507 sc->tx_tail = sc->tx_head = NULL; 1508 ex_init_txdescs(sc); 1509 1510 sc->rx_tail = sc->rx_head = 0; 1511 for (i = 0; i < EX_NUPD; i++) { 1512 rx = &sc->sc_rxdescs[i]; 1513 if (rx->rx_mbhead != NULL) { 1514 bus_dmamap_unload(sc->sc_dmat, rx->rx_dmamap); 1515 m_freem(rx->rx_mbhead); 1516 rx->rx_mbhead = NULL; 1517 } 1518 ex_add_rxbuf(sc, rx); 1519 } 1520 1521 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1522 1523 untimeout(ex_tick, sc); 1524 if (sc->ex_conf & EX_CONF_MII) 1525 mii_down(&sc->ex_mii); 1526 1527 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1528 ifp->if_timer = 0; 1529 } 1530 1531 static void 1532 ex_init_txdescs(sc) 1533 struct ex_softc *sc; 1534 { 1535 int i; 1536 1537 for (i = 0; i < EX_NDPD; i++) { 1538 sc->sc_txdescs[i].tx_dmamap = sc->sc_tx_dmamaps[i]; 1539 sc->sc_txdescs[i].tx_dpd = &sc->sc_dpd[i]; 1540 if (i < EX_NDPD - 1) 1541 sc->sc_txdescs[i].tx_next = &sc->sc_txdescs[i + 1]; 1542 else 1543 sc->sc_txdescs[i].tx_next = NULL; 1544 } 1545 sc->tx_free = &sc->sc_txdescs[0]; 1546 sc->tx_ftail = &sc->sc_txdescs[EX_NDPD-1]; 1547 } 1548 1549 1550 /* 1551 * Before reboots, reset card completely. 1552 */ 1553 static void 1554 ex_shutdown(arg) 1555 void *arg; 1556 { 1557 register struct ex_softc *sc = arg; 1558 1559 ex_stop(sc); 1560 } 1561 1562 /* 1563 * Read EEPROM data. 1564 * XXX what to do if EEPROM doesn't unbusy? 1565 */ 1566 u_int16_t 1567 ex_read_eeprom(sc, offset) 1568 struct ex_softc *sc; 1569 int offset; 1570 { 1571 bus_space_tag_t iot = sc->sc_iot; 1572 bus_space_handle_t ioh = sc->sc_ioh; 1573 u_int16_t data = 0; 1574 1575 GO_WINDOW(0); 1576 if (ex_eeprom_busy(sc)) 1577 goto out; 1578 switch (sc->ex_bustype) { 1579 case EX_BUS_PCI: 1580 bus_space_write_1(iot, ioh, ELINK_W0_EEPROM_COMMAND, 1581 READ_EEPROM | (offset & 0x3f)); 1582 break; 1583 case EX_BUS_CARDBUS: 1584 bus_space_write_2(iot, ioh, ELINK_W0_EEPROM_COMMAND, 1585 0x230 + (offset & 0x3f)); 1586 break; 1587 } 1588 if (ex_eeprom_busy(sc)) 1589 goto out; 1590 data = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_DATA); 1591 out: 1592 return data; 1593 } 1594 1595 static int 1596 ex_eeprom_busy(sc) 1597 struct ex_softc *sc; 1598 { 1599 bus_space_tag_t iot = sc->sc_iot; 1600 bus_space_handle_t ioh = sc->sc_ioh; 1601 int i = 100; 1602 1603 while (i--) { 1604 if (!(bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND) & 1605 EEPROM_BUSY)) 1606 return 0; 1607 delay(100); 1608 } 1609 printf("\n%s: eeprom stays busy.\n", sc->sc_dev.dv_xname); 1610 return (1); 1611 } 1612 1613 /* 1614 * Create a new rx buffer and add it to the 'soft' rx list. 1615 */ 1616 static int 1617 ex_add_rxbuf(sc, rxd) 1618 struct ex_softc *sc; 1619 struct ex_rxdesc *rxd; 1620 { 1621 struct mbuf *m, *oldm; 1622 bus_dmamap_t rxmap; 1623 int error, rval = 0; 1624 1625 oldm = rxd->rx_mbhead; 1626 rxmap = rxd->rx_dmamap; 1627 1628 MGETHDR(m, M_DONTWAIT, MT_DATA); 1629 if (m != NULL) { 1630 MCLGET(m, M_DONTWAIT); 1631 if ((m->m_flags & M_EXT) == 0) { 1632 m_freem(m); 1633 if (oldm == NULL) 1634 return 1; 1635 m = oldm; 1636 m->m_data = m->m_ext.ext_buf; 1637 rval = 1; 1638 } 1639 } else { 1640 if (oldm == NULL) 1641 return 1; 1642 m = oldm; 1643 m->m_data = m->m_ext.ext_buf; 1644 rval = 1; 1645 } 1646 1647 /* 1648 * Setup the DMA map for this receive buffer. 1649 */ 1650 if (m != oldm) { 1651 if (oldm != NULL) 1652 bus_dmamap_unload(sc->sc_dmat, rxmap); 1653 error = bus_dmamap_load(sc->sc_dmat, rxmap, 1654 m->m_ext.ext_buf, MCLBYTES, NULL, BUS_DMA_NOWAIT); 1655 if (error) { 1656 printf("%s: can't load rx buffer, error = %d\n", 1657 sc->sc_dev.dv_xname, error); 1658 panic("ex_add_rxbuf"); /* XXX */ 1659 } 1660 } 1661 1662 /* 1663 * Align for data after 14 byte header. 1664 */ 1665 m->m_data += 2; 1666 1667 rxd->rx_mbhead = m; 1668 rxd->rx_upd->upd_pktstatus = htopci(MCLBYTES - 2); 1669 rxd->rx_upd->upd_frags[0].fr_addr = 1670 htopci(rxmap->dm_segs[0].ds_addr + 2); 1671 rxd->rx_upd->upd_nextptr = 0; 1672 1673 /* 1674 * Attach it to the end of the list. 1675 */ 1676 if (sc->rx_head != NULL) { 1677 sc->rx_tail->rx_next = rxd; 1678 sc->rx_tail->rx_upd->upd_nextptr = htopci(sc->sc_upddma + 1679 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd)); 1680 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1681 (caddr_t)sc->rx_tail->rx_upd - (caddr_t)sc->sc_upd, 1682 sizeof (struct ex_upd), 1683 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1684 } else { 1685 sc->rx_head = rxd; 1686 } 1687 sc->rx_tail = rxd; 1688 1689 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, rxmap->dm_mapsize, 1690 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1691 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1692 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd), 1693 sizeof (struct ex_upd), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1694 return (rval); 1695 } 1696 1697 u_int32_t 1698 ex_mii_bitbang_read(self) 1699 struct device *self; 1700 { 1701 struct ex_softc *sc = (void *) self; 1702 1703 /* We're already in Window 4. */ 1704 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT)); 1705 } 1706 1707 void 1708 ex_mii_bitbang_write(self, val) 1709 struct device *self; 1710 u_int32_t val; 1711 { 1712 struct ex_softc *sc = (void *) self; 1713 1714 /* We're already in Window 4. */ 1715 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT, val); 1716 } 1717 1718 int 1719 ex_mii_readreg(v, phy, reg) 1720 struct device *v; 1721 int phy, reg; 1722 { 1723 struct ex_softc *sc = (struct ex_softc *)v; 1724 int val; 1725 1726 if ((sc->ex_conf & EX_CONF_INTPHY) && phy != ELINK_INTPHY_ID) 1727 return 0; 1728 1729 GO_WINDOW(4); 1730 1731 val = mii_bitbang_readreg(v, &ex_mii_bitbang_ops, phy, reg); 1732 1733 GO_WINDOW(1); 1734 1735 return (val); 1736 } 1737 1738 void 1739 ex_mii_writereg(v, phy, reg, data) 1740 struct device *v; 1741 int phy; 1742 int reg; 1743 int data; 1744 { 1745 struct ex_softc *sc = (struct ex_softc *)v; 1746 1747 GO_WINDOW(4); 1748 1749 mii_bitbang_writereg(v, &ex_mii_bitbang_ops, phy, reg, data); 1750 1751 GO_WINDOW(1); 1752 } 1753 1754 void 1755 ex_mii_statchg(v) 1756 struct device *v; 1757 { 1758 struct ex_softc *sc = (struct ex_softc *)v; 1759 bus_space_tag_t iot = sc->sc_iot; 1760 bus_space_handle_t ioh = sc->sc_ioh; 1761 int mctl; 1762 1763 /* XXX Update ifp->if_baudrate */ 1764 1765 GO_WINDOW(3); 1766 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1767 if (sc->ex_mii.mii_media_active & IFM_FDX) 1768 mctl |= MAC_CONTROL_FDX; 1769 else 1770 mctl &= ~MAC_CONTROL_FDX; 1771 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1772 GO_WINDOW(1); /* back to operating window */ 1773 } 1774
Indexes created Wed Oct 22 13:09:56 GMT 2025