elinkxl.c revision 1.23
1 /* $NetBSD: elinkxl.c,v 1.23 2000/02/02 08:05:26 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Frank van der Linden. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include "opt_inet.h" 40 #include "opt_ns.h" 41 #include "bpfilter.h" 42 #include "rnd.h" 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/kernel.h> 47 #include <sys/mbuf.h> 48 #include <sys/socket.h> 49 #include <sys/ioctl.h> 50 #include <sys/errno.h> 51 #include <sys/syslog.h> 52 #include <sys/select.h> 53 #include <sys/device.h> 54 #if NRND > 0 55 #include <sys/rnd.h> 56 #endif 57 58 #include <net/if.h> 59 #include <net/if_dl.h> 60 #include <net/if_ether.h> 61 #include <net/if_media.h> 62 63 #ifdef INET 64 #include <netinet/in.h> 65 #include <netinet/in_systm.h> 66 #include <netinet/in_var.h> 67 #include <netinet/ip.h> 68 #include <netinet/if_inarp.h> 69 #endif 70 71 #ifdef NS 72 #include <netns/ns.h> 73 #include <netns/ns_if.h> 74 #endif 75 76 #if NBPFILTER > 0 77 #include <net/bpf.h> 78 #include <net/bpfdesc.h> 79 #endif 80 81 #include <machine/cpu.h> 82 #include <machine/bus.h> 83 #include <machine/intr.h> 84 #include <machine/endian.h> 85 86 #include <vm/vm.h> 87 #include <vm/pmap.h> 88 89 #include <dev/mii/miivar.h> 90 #include <dev/mii/mii.h> 91 #include <dev/mii/mii_bitbang.h> 92 93 #include <dev/ic/elink3reg.h> 94 /* #include <dev/ic/elink3var.h> */ 95 #include <dev/ic/elinkxlreg.h> 96 #include <dev/ic/elinkxlvar.h> 97 98 #ifdef DEBUG 99 int exdebug = 0; 100 #endif 101 102 /* ifmedia callbacks */ 103 int ex_media_chg __P((struct ifnet *ifp)); 104 void ex_media_stat __P((struct ifnet *ifp, struct ifmediareq *req)); 105 106 void ex_probe_media __P((struct ex_softc *)); 107 void ex_set_filter __P((struct ex_softc *)); 108 void ex_set_media __P((struct ex_softc *)); 109 struct mbuf *ex_get __P((struct ex_softc *, int)); 110 u_int16_t ex_read_eeprom __P((struct ex_softc *, int)); 111 void ex_init __P((struct ex_softc *)); 112 void ex_read __P((struct ex_softc *)); 113 void ex_reset __P((struct ex_softc *)); 114 void ex_set_mc __P((struct ex_softc *)); 115 void ex_getstats __P((struct ex_softc *)); 116 void ex_printstats __P((struct ex_softc *)); 117 void ex_tick __P((void *)); 118 119 static int ex_eeprom_busy __P((struct ex_softc *)); 120 static int ex_add_rxbuf __P((struct ex_softc *, struct ex_rxdesc *)); 121 static void ex_init_txdescs __P((struct ex_softc *)); 122 123 static void ex_shutdown __P((void *)); 124 static void ex_start __P((struct ifnet *)); 125 static void ex_txstat __P((struct ex_softc *)); 126 static u_int16_t ex_mchash __P((u_char *)); 127 128 int ex_mii_readreg __P((struct device *, int, int)); 129 void ex_mii_writereg __P((struct device *, int, int, int)); 130 void ex_mii_statchg __P((struct device *)); 131 132 void ex_probemedia __P((struct ex_softc *)); 133 134 /* 135 * Structure to map media-present bits in boards to ifmedia codes and 136 * printable media names. Used for table-driven ifmedia initialization. 137 */ 138 struct ex_media { 139 int exm_mpbit; /* media present bit */ 140 const char *exm_name; /* name of medium */ 141 int exm_ifmedia; /* ifmedia word for medium */ 142 int exm_epmedia; /* ELINKMEDIA_* constant */ 143 }; 144 145 /* 146 * Media table for 3c90x chips. Note that chips with MII have no 147 * `native' media. 148 */ 149 struct ex_media ex_native_media[] = { 150 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 151 ELINKMEDIA_10BASE_T }, 152 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 153 ELINKMEDIA_10BASE_T }, 154 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 155 ELINKMEDIA_AUI }, 156 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 157 ELINKMEDIA_10BASE_2 }, 158 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 159 ELINKMEDIA_100BASE_TX }, 160 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 161 ELINKMEDIA_100BASE_TX }, 162 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 163 ELINKMEDIA_100BASE_FX }, 164 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 165 ELINKMEDIA_MII }, 166 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 167 ELINKMEDIA_100BASE_T4 }, 168 { 0, NULL, 0, 169 0 }, 170 }; 171 172 /* 173 * MII bit-bang glue. 174 */ 175 u_int32_t ex_mii_bitbang_read __P((struct device *)); 176 void ex_mii_bitbang_write __P((struct device *, u_int32_t)); 177 178 const struct mii_bitbang_ops ex_mii_bitbang_ops = { 179 ex_mii_bitbang_read, 180 ex_mii_bitbang_write, 181 { 182 ELINK_PHY_DATA, /* MII_BIT_MDO */ 183 ELINK_PHY_DATA, /* MII_BIT_MDI */ 184 ELINK_PHY_CLK, /* MII_BIT_MDC */ 185 ELINK_PHY_DIR, /* MII_BIT_DIR_HOST_PHY */ 186 0, /* MII_BIT_DIR_PHY_HOST */ 187 } 188 }; 189 190 /* 191 * Back-end attach and configure. 192 */ 193 void 194 ex_config(sc) 195 struct ex_softc *sc; 196 { 197 struct ifnet *ifp; 198 u_int16_t val; 199 u_int8_t macaddr[ETHER_ADDR_LEN] = {0}; 200 bus_space_tag_t iot = sc->sc_iot; 201 bus_space_handle_t ioh = sc->sc_ioh; 202 bus_dma_segment_t useg, dseg; 203 int urseg, drseg, i, error, attach_stage; 204 205 ex_reset(sc); 206 207 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR0); 208 macaddr[0] = val >> 8; 209 macaddr[1] = val & 0xff; 210 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR1); 211 macaddr[2] = val >> 8; 212 macaddr[3] = val & 0xff; 213 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR2); 214 macaddr[4] = val >> 8; 215 macaddr[5] = val & 0xff; 216 217 printf("%s: MAC address %s\n", sc->sc_dev.dv_xname, 218 ether_sprintf(macaddr)); 219 220 if (sc->intr_ack) { /* 3C575BTX specific */ 221 GO_WINDOW(2); 222 bus_space_write_2(sc->sc_iot, ioh, 12, 0x10|bus_space_read_2(sc->sc_iot, ioh, 12)); 223 } 224 225 attach_stage = 0; 226 227 /* 228 * Allocate the upload descriptors, and create and load the DMA 229 * map for them. 230 */ 231 if ((error = bus_dmamem_alloc(sc->sc_dmat, 232 EX_NUPD * sizeof (struct ex_upd), NBPG, 0, &useg, 1, &urseg, 233 BUS_DMA_NOWAIT)) != 0) { 234 printf("%s: can't allocate upload descriptors, error = %d\n", 235 sc->sc_dev.dv_xname, error); 236 goto fail; 237 } 238 239 attach_stage = 1; 240 241 if ((error = bus_dmamem_map(sc->sc_dmat, &useg, urseg, 242 EX_NUPD * sizeof (struct ex_upd), (caddr_t *)&sc->sc_upd, 243 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 244 printf("%s: can't map upload descriptors, error = %d\n", 245 sc->sc_dev.dv_xname, error); 246 goto fail; 247 } 248 249 attach_stage = 2; 250 251 if ((error = bus_dmamap_create(sc->sc_dmat, 252 EX_NUPD * sizeof (struct ex_upd), 1, 253 EX_NUPD * sizeof (struct ex_upd), 0, BUS_DMA_NOWAIT, 254 &sc->sc_upd_dmamap)) != 0) { 255 printf("%s: can't create upload desc. DMA map, error = %d\n", 256 sc->sc_dev.dv_xname, error); 257 goto fail; 258 } 259 260 attach_stage = 3; 261 262 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_upd_dmamap, 263 sc->sc_upd, EX_NUPD * sizeof (struct ex_upd), NULL, 264 BUS_DMA_NOWAIT)) != 0) { 265 printf("%s: can't load upload desc. DMA map, error = %d\n", 266 sc->sc_dev.dv_xname, error); 267 goto fail; 268 } 269 270 attach_stage = 4; 271 272 /* 273 * Allocate the download descriptors, and create and load the DMA 274 * map for them. 275 */ 276 if ((error = bus_dmamem_alloc(sc->sc_dmat, 277 EX_NDPD * sizeof (struct ex_dpd), NBPG, 0, &dseg, 1, &drseg, 278 BUS_DMA_NOWAIT)) != 0) { 279 printf("%s: can't allocate download descriptors, error = %d\n", 280 sc->sc_dev.dv_xname, error); 281 goto fail; 282 } 283 284 attach_stage = 5; 285 286 if ((error = bus_dmamem_map(sc->sc_dmat, &dseg, drseg, 287 EX_NDPD * sizeof (struct ex_dpd), (caddr_t *)&sc->sc_dpd, 288 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 289 printf("%s: can't map download descriptors, error = %d\n", 290 sc->sc_dev.dv_xname, error); 291 goto fail; 292 } 293 bzero(sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd)); 294 295 attach_stage = 6; 296 297 if ((error = bus_dmamap_create(sc->sc_dmat, 298 EX_NDPD * sizeof (struct ex_dpd), 1, 299 EX_NDPD * sizeof (struct ex_dpd), 0, BUS_DMA_NOWAIT, 300 &sc->sc_dpd_dmamap)) != 0) { 301 printf("%s: can't create download desc. DMA map, error = %d\n", 302 sc->sc_dev.dv_xname, error); 303 goto fail; 304 } 305 306 attach_stage = 7; 307 308 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dpd_dmamap, 309 sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd), NULL, 310 BUS_DMA_NOWAIT)) != 0) { 311 printf("%s: can't load download desc. DMA map, error = %d\n", 312 sc->sc_dev.dv_xname, error); 313 goto fail; 314 } 315 316 attach_stage = 8; 317 318 319 /* 320 * Create the transmit buffer DMA maps. 321 */ 322 for (i = 0; i < EX_NDPD; i++) { 323 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 324 EX_NTFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 325 &sc->sc_tx_dmamaps[i])) != 0) { 326 printf("%s: can't create tx DMA map %d, error = %d\n", 327 sc->sc_dev.dv_xname, i, error); 328 goto fail; 329 } 330 } 331 332 attach_stage = 9; 333 334 /* 335 * Create the receive buffer DMA maps. 336 */ 337 for (i = 0; i < EX_NUPD; i++) { 338 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 339 EX_NRFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 340 &sc->sc_rx_dmamaps[i])) != 0) { 341 printf("%s: can't create rx DMA map %d, error = %d\n", 342 sc->sc_dev.dv_xname, i, error); 343 goto fail; 344 } 345 } 346 347 attach_stage = 10; 348 349 /* 350 * Create ring of upload descriptors, only once. The DMA engine 351 * will loop over this when receiving packets, stalling if it 352 * hits an UPD with a finished receive. 353 */ 354 for (i = 0; i < EX_NUPD; i++) { 355 sc->sc_rxdescs[i].rx_dmamap = sc->sc_rx_dmamaps[i]; 356 sc->sc_rxdescs[i].rx_upd = &sc->sc_upd[i]; 357 sc->sc_upd[i].upd_frags[0].fr_len = 358 htole32((MCLBYTES - 2) | EX_FR_LAST); 359 if (ex_add_rxbuf(sc, &sc->sc_rxdescs[i]) != 0) { 360 printf("%s: can't allocate or map rx buffers\n", 361 sc->sc_dev.dv_xname); 362 goto fail; 363 } 364 } 365 366 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 0, 367 EX_NUPD * sizeof (struct ex_upd), 368 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 369 370 ex_init_txdescs(sc); 371 372 attach_stage = 11; 373 374 375 GO_WINDOW(3); 376 val = bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS); 377 if (val & ELINK_MEDIACAP_MII) 378 sc->ex_conf |= EX_CONF_MII; 379 380 ifp = &sc->sc_ethercom.ec_if; 381 382 /* 383 * Initialize our media structures and MII info. We'll 384 * probe the MII if we discover that we have one. 385 */ 386 sc->ex_mii.mii_ifp = ifp; 387 sc->ex_mii.mii_readreg = ex_mii_readreg; 388 sc->ex_mii.mii_writereg = ex_mii_writereg; 389 sc->ex_mii.mii_statchg = ex_mii_statchg; 390 ifmedia_init(&sc->ex_mii.mii_media, 0, ex_media_chg, 391 ex_media_stat); 392 393 if (sc->ex_conf & EX_CONF_MII) { 394 /* 395 * Find PHY, extract media information from it. 396 * First, select the right transceiver. 397 */ 398 u_int32_t icfg; 399 400 GO_WINDOW(3); 401 icfg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 402 icfg &= ~(CONFIG_XCVR_SEL << 16); 403 if (val & (ELINK_MEDIACAP_MII | ELINK_MEDIACAP_100BASET4)) 404 icfg |= ELINKMEDIA_MII << (CONFIG_XCVR_SEL_SHIFT + 16); 405 if (val & ELINK_MEDIACAP_100BASETX) 406 icfg |= ELINKMEDIA_AUTO << (CONFIG_XCVR_SEL_SHIFT + 16); 407 if (val & ELINK_MEDIACAP_100BASEFX) 408 icfg |= ELINKMEDIA_100BASE_FX 409 << (CONFIG_XCVR_SEL_SHIFT + 16); 410 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, icfg); 411 412 mii_attach(&sc->sc_dev, &sc->ex_mii, 0xffffffff, 413 MII_PHY_ANY, MII_OFFSET_ANY); 414 if (LIST_FIRST(&sc->ex_mii.mii_phys) == NULL) { 415 ifmedia_add(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE, 416 0, NULL); 417 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE); 418 } else { 419 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_AUTO); 420 } 421 } else 422 ex_probemedia(sc); 423 424 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 425 ifp->if_softc = sc; 426 ifp->if_start = ex_start; 427 ifp->if_ioctl = ex_ioctl; 428 ifp->if_watchdog = ex_watchdog; 429 ifp->if_flags = 430 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 431 432 if_attach(ifp); 433 ether_ifattach(ifp, macaddr); 434 435 GO_WINDOW(1); 436 437 sc->tx_start_thresh = 20; 438 sc->tx_succ_ok = 0; 439 440 /* TODO: set queues to 0 */ 441 442 #if NBPFILTER > 0 443 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB, 444 sizeof(struct ether_header)); 445 #endif 446 447 #if NRND > 0 448 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 449 RND_TYPE_NET, 0); 450 #endif 451 452 /* Establish callback to reset card when we reboot. */ 453 shutdownhook_establish(ex_shutdown, sc); 454 return; 455 456 fail: 457 /* 458 * Free any resources we've allocated during the failed attach 459 * attempt. Do this in reverse order and fall though. 460 */ 461 switch (attach_stage) { 462 case 11: 463 { 464 struct ex_rxdesc *rxd; 465 466 for (i = 0; i < EX_NUPD; i++) { 467 rxd = &sc->sc_rxdescs[i]; 468 if (rxd->rx_mbhead != NULL) { 469 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap); 470 m_freem(rxd->rx_mbhead); 471 } 472 } 473 } 474 /* FALLTHROUGH */ 475 476 case 10: 477 for (i = 0; i < EX_NUPD; i++) 478 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]); 479 /* FALLTHROUGH */ 480 481 case 9: 482 for (i = 0; i < EX_NDPD; i++) 483 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]); 484 /* FALLTHROUGH */ 485 case 8: 486 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap); 487 /* FALLTHROUGH */ 488 489 case 7: 490 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap); 491 /* FALLTHROUGH */ 492 493 case 6: 494 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd, 495 EX_NDPD * sizeof (struct ex_dpd)); 496 /* FALLTHROUGH */ 497 498 case 5: 499 bus_dmamem_free(sc->sc_dmat, &dseg, drseg); 500 break; 501 502 case 4: 503 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap); 504 /* FALLTHROUGH */ 505 506 case 3: 507 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap); 508 /* FALLTHROUGH */ 509 510 case 2: 511 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd, 512 EX_NUPD * sizeof (struct ex_upd)); 513 /* FALLTHROUGH */ 514 515 case 1: 516 bus_dmamem_free(sc->sc_dmat, &useg, urseg); 517 break; 518 } 519 520 } 521 522 /* 523 * Find the media present on non-MII chips. 524 */ 525 void 526 ex_probemedia(sc) 527 struct ex_softc *sc; 528 { 529 bus_space_tag_t iot = sc->sc_iot; 530 bus_space_handle_t ioh = sc->sc_ioh; 531 struct ifmedia *ifm = &sc->ex_mii.mii_media; 532 struct ex_media *exm; 533 u_int16_t config1, reset_options, default_media; 534 int defmedia = 0; 535 const char *sep = "", *defmedianame = NULL; 536 537 GO_WINDOW(3); 538 config1 = bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2); 539 reset_options = bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 540 GO_WINDOW(0); 541 542 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 543 544 printf("%s: ", sc->sc_dev.dv_xname); 545 546 /* Sanity check that there are any media! */ 547 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 548 printf("no media present!\n"); 549 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 550 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 551 return; 552 } 553 554 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 555 556 for (exm = ex_native_media; exm->exm_name != NULL; exm++) { 557 if (reset_options & exm->exm_mpbit) { 558 /* 559 * Default media is a little complicated. We 560 * support full-duplex which uses the same 561 * reset options bit. 562 * 563 * XXX Check EEPROM for default to FDX? 564 */ 565 if (exm->exm_epmedia == default_media) { 566 if ((exm->exm_ifmedia & IFM_FDX) == 0) { 567 defmedia = exm->exm_ifmedia; 568 defmedianame = exm->exm_name; 569 } 570 } else if (defmedia == 0) { 571 defmedia = exm->exm_ifmedia; 572 defmedianame = exm->exm_name; 573 } 574 ifmedia_add(ifm, exm->exm_ifmedia, exm->exm_epmedia, 575 NULL); 576 PRINT(exm->exm_name); 577 } 578 } 579 580 #undef PRINT 581 582 #ifdef DIAGNOSTIC 583 if (defmedia == 0) 584 panic("ex_probemedia: impossible"); 585 #endif 586 587 printf(", default %s\n", defmedianame); 588 ifmedia_set(ifm, defmedia); 589 } 590 591 /* 592 * Bring device up. 593 */ 594 void 595 ex_init(sc) 596 struct ex_softc *sc; 597 { 598 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 599 bus_space_tag_t iot = sc->sc_iot; 600 bus_space_handle_t ioh = sc->sc_ioh; 601 int s, i; 602 603 s = splnet(); 604 605 ex_waitcmd(sc); 606 ex_stop(sc); 607 608 /* 609 * Set the station address and clear the station mask. The latter 610 * is needed for 90x cards, 0 is the default for 90xB cards. 611 */ 612 GO_WINDOW(2); 613 for (i = 0; i < ETHER_ADDR_LEN; i++) { 614 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 615 LLADDR(ifp->if_sadl)[i]); 616 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 617 } 618 619 GO_WINDOW(3); 620 621 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_RESET); 622 ex_waitcmd(sc); 623 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_RESET); 624 ex_waitcmd(sc); 625 626 /* 627 * Disable reclaim threshold for 90xB, set free threshold to 628 * 6 * 256 = 1536 for 90x. 629 */ 630 if (sc->ex_conf & EX_CONF_90XB) 631 bus_space_write_2(iot, ioh, ELINK_COMMAND, 632 ELINK_TXRECLTHRESH | 255); 633 else 634 bus_space_write_1(iot, ioh, ELINK_TXFREETHRESH, 6); 635 636 bus_space_write_2(iot, ioh, ELINK_COMMAND, 637 SET_RX_EARLY_THRESH | ELINK_THRESH_DISABLE); 638 639 bus_space_write_4(iot, ioh, ELINK_DMACTRL, 640 bus_space_read_4(iot, ioh, ELINK_DMACTRL) | ELINK_DMAC_UPRXEAREN); 641 642 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK | S_MASK); 643 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK | S_MASK); 644 645 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 646 if (sc->intr_ack) 647 (* sc->intr_ack)(sc); 648 ex_set_media(sc); 649 ex_set_mc(sc); 650 651 652 bus_space_write_2(iot, ioh, ELINK_COMMAND, STATS_ENABLE); 653 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 654 bus_space_write_4(iot, ioh, ELINK_UPLISTPTR, sc->sc_upddma); 655 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 656 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_UPUNSTALL); 657 658 ifp->if_flags |= IFF_RUNNING; 659 ifp->if_flags &= ~IFF_OACTIVE; 660 ex_start(ifp); 661 662 GO_WINDOW(1); 663 664 splx(s); 665 666 timeout(ex_tick, sc, hz); 667 } 668 669 /* 670 * Multicast hash filter according to the 3Com spec. 671 */ 672 static u_int16_t 673 ex_mchash(addr) 674 u_char *addr; 675 { 676 u_int32_t crc, carry; 677 int i, j; 678 u_char c; 679 680 /* Compute CRC for the address value. */ 681 crc = 0xffffffff; /* initial value */ 682 683 for (i = 0; i < 6; i++) { 684 c = addr[i]; 685 for (j = 0; j < 8; j++) { 686 carry = ((crc & 0x80000000) ? 1 : 0) ^ (c & 0x01); 687 crc <<= 1; 688 c >>= 1; 689 if (carry) 690 crc = (crc ^ 0x04c11db6) | carry; 691 } 692 } 693 694 /* Return the filter bit position. */ 695 return(crc & 0x000000ff); 696 } 697 698 699 /* 700 * Set multicast receive filter. Also take care of promiscuous mode 701 * here (XXX). 702 */ 703 void 704 ex_set_mc(sc) 705 register struct ex_softc *sc; 706 { 707 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 708 struct ethercom *ec = &sc->sc_ethercom; 709 struct ether_multi *enm; 710 struct ether_multistep estep; 711 int i; 712 u_int16_t mask = FIL_INDIVIDUAL | FIL_BRDCST; 713 714 if (ifp->if_flags & IFF_PROMISC) 715 mask |= FIL_PROMISC; 716 717 if (!(ifp->if_flags & IFF_MULTICAST)) 718 goto out; 719 720 if (!(sc->ex_conf & EX_CONF_90XB) || ifp->if_flags & IFF_ALLMULTI) { 721 mask |= (ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0; 722 } else { 723 ETHER_FIRST_MULTI(estep, ec, enm); 724 while (enm != NULL) { 725 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 726 ETHER_ADDR_LEN) != 0) 727 goto out; 728 i = ex_mchash(enm->enm_addrlo); 729 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 730 ELINK_COMMAND, ELINK_SETHASHFILBIT | i); 731 ETHER_NEXT_MULTI(estep, enm); 732 } 733 mask |= FIL_MULTIHASH; 734 } 735 out: 736 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 737 SET_RX_FILTER | mask); 738 } 739 740 741 static void 742 ex_txstat(sc) 743 struct ex_softc *sc; 744 { 745 bus_space_tag_t iot = sc->sc_iot; 746 bus_space_handle_t ioh = sc->sc_ioh; 747 int i; 748 749 /* 750 * We need to read+write TX_STATUS until we get a 0 status 751 * in order to turn off the interrupt flag. 752 */ 753 while ((i = bus_space_read_1(iot, ioh, ELINK_TXSTATUS)) & TXS_COMPLETE) { 754 bus_space_write_1(iot, ioh, ELINK_TXSTATUS, 0x0); 755 756 if (i & TXS_JABBER) { 757 ++sc->sc_ethercom.ec_if.if_oerrors; 758 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 759 printf("%s: jabber (%x)\n", 760 sc->sc_dev.dv_xname, i); 761 ex_init(sc); 762 /* TODO: be more subtle here */ 763 } else if (i & TXS_UNDERRUN) { 764 ++sc->sc_ethercom.ec_if.if_oerrors; 765 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 766 printf("%s: fifo underrun (%x) @%d\n", 767 sc->sc_dev.dv_xname, i, 768 sc->tx_start_thresh); 769 if (sc->tx_succ_ok < 100) 770 sc->tx_start_thresh = min(ETHER_MAX_LEN, 771 sc->tx_start_thresh + 20); 772 sc->tx_succ_ok = 0; 773 ex_init(sc); 774 /* TODO: be more subtle here */ 775 } else if (i & TXS_MAX_COLLISION) { 776 ++sc->sc_ethercom.ec_if.if_collisions; 777 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 778 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 779 } else 780 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 781 } 782 } 783 784 int 785 ex_media_chg(ifp) 786 struct ifnet *ifp; 787 { 788 struct ex_softc *sc = ifp->if_softc; 789 790 if (ifp->if_flags & IFF_UP) 791 ex_init(sc); 792 return 0; 793 } 794 795 void 796 ex_set_media(sc) 797 struct ex_softc *sc; 798 { 799 bus_space_tag_t iot = sc->sc_iot; 800 bus_space_handle_t ioh = sc->sc_ioh; 801 int config0, config1; 802 803 if (((sc->ex_conf & EX_CONF_MII) && 804 (sc->ex_mii.mii_media_active & IFM_FDX)) 805 || (!(sc->ex_conf & EX_CONF_MII) && 806 (sc->ex_mii.mii_media.ifm_media & IFM_FDX))) { 807 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 808 MAC_CONTROL_FDX); 809 } else { 810 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 0); 811 } 812 813 /* 814 * If the device has MII, select it, and then tell the 815 * PHY which media to use. 816 */ 817 if (sc->ex_conf & EX_CONF_MII) { 818 GO_WINDOW(3); 819 820 config0 = (u_int)bus_space_read_2(iot, ioh, 821 ELINK_W3_INTERNAL_CONFIG); 822 config1 = (u_int)bus_space_read_2(iot, ioh, 823 ELINK_W3_INTERNAL_CONFIG + 2); 824 825 config1 = config1 & ~CONFIG_MEDIAMASK; 826 config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT); 827 828 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 829 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, config1); 830 mii_mediachg(&sc->ex_mii); 831 return; 832 } 833 834 GO_WINDOW(4); 835 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0); 836 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 837 delay(800); 838 839 /* 840 * Now turn on the selected media/transceiver. 841 */ 842 switch (IFM_SUBTYPE(sc->ex_mii.mii_media.ifm_cur->ifm_media)) { 843 case IFM_10_T: 844 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 845 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 846 break; 847 848 case IFM_10_2: 849 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 850 DELAY(800); 851 break; 852 853 case IFM_100_TX: 854 case IFM_100_FX: 855 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 856 LINKBEAT_ENABLE); 857 DELAY(800); 858 break; 859 860 case IFM_10_5: 861 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 862 SQE_ENABLE); 863 DELAY(800); 864 break; 865 866 case IFM_MANUAL: 867 break; 868 869 case IFM_NONE: 870 return; 871 872 default: 873 panic("ex_set_media: impossible"); 874 } 875 876 GO_WINDOW(3); 877 config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 878 config1 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2); 879 880 config1 = config1 & ~CONFIG_MEDIAMASK; 881 config1 |= (sc->ex_mii.mii_media.ifm_cur->ifm_data << 882 CONFIG_MEDIAMASK_SHIFT); 883 884 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 885 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, config1); 886 } 887 888 /* 889 * Get currently-selected media from card. 890 * (if_media callback, may be called before interface is brought up). 891 */ 892 void 893 ex_media_stat(ifp, req) 894 struct ifnet *ifp; 895 struct ifmediareq *req; 896 { 897 struct ex_softc *sc = ifp->if_softc; 898 899 if (sc->ex_conf & EX_CONF_MII) { 900 mii_pollstat(&sc->ex_mii); 901 req->ifm_status = sc->ex_mii.mii_media_status; 902 req->ifm_active = sc->ex_mii.mii_media_active; 903 } else { 904 GO_WINDOW(4); 905 req->ifm_status = IFM_AVALID; 906 req->ifm_active = sc->ex_mii.mii_media.ifm_cur->ifm_media; 907 if (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 908 ELINK_W4_MEDIA_TYPE) & LINKBEAT_DETECT) 909 req->ifm_status |= IFM_ACTIVE; 910 GO_WINDOW(1); 911 } 912 } 913 914 915 916 /* 917 * Start outputting on the interface. 918 */ 919 static void 920 ex_start(ifp) 921 struct ifnet *ifp; 922 { 923 struct ex_softc *sc = ifp->if_softc; 924 bus_space_tag_t iot = sc->sc_iot; 925 bus_space_handle_t ioh = sc->sc_ioh; 926 volatile struct ex_fraghdr *fr = NULL; 927 volatile struct ex_dpd *dpd = NULL, *prevdpd = NULL; 928 struct ex_txdesc *txp; 929 bus_dmamap_t dmamap; 930 int offset, totlen; 931 932 if (sc->tx_head || sc->tx_free == NULL) 933 return; 934 935 txp = NULL; 936 937 /* 938 * We're finished if there is nothing more to add to the list or if 939 * we're all filled up with buffers to transmit. 940 */ 941 while (ifp->if_snd.ifq_head != NULL && sc->tx_free != NULL) { 942 struct mbuf *mb_head; 943 int segment, error; 944 945 /* 946 * Grab a packet to transmit. 947 */ 948 IF_DEQUEUE(&ifp->if_snd, mb_head); 949 950 /* 951 * Get pointer to next available tx desc. 952 */ 953 txp = sc->tx_free; 954 sc->tx_free = txp->tx_next; 955 txp->tx_next = NULL; 956 dmamap = txp->tx_dmamap; 957 958 /* 959 * Go through each of the mbufs in the chain and initialize 960 * the transmit buffer descriptors with the physical address 961 * and size of the mbuf. 962 */ 963 reload: 964 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 965 mb_head, BUS_DMA_NOWAIT); 966 switch (error) { 967 case 0: 968 /* Success. */ 969 break; 970 971 case EFBIG: 972 { 973 struct mbuf *mn; 974 975 /* 976 * We ran out of segments. We have to recopy this 977 * mbuf chain first. Bail out if we can't get the 978 * new buffers. 979 */ 980 printf("%s: too many segments, ", sc->sc_dev.dv_xname); 981 982 MGETHDR(mn, M_DONTWAIT, MT_DATA); 983 if (mn == NULL) { 984 m_freem(mb_head); 985 printf("aborting\n"); 986 goto out; 987 } 988 if (mb_head->m_pkthdr.len > MHLEN) { 989 MCLGET(mn, M_DONTWAIT); 990 if ((mn->m_flags & M_EXT) == 0) { 991 m_freem(mn); 992 m_freem(mb_head); 993 printf("aborting\n"); 994 goto out; 995 } 996 } 997 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, 998 mtod(mn, caddr_t)); 999 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; 1000 m_freem(mb_head); 1001 mb_head = mn; 1002 printf("retrying\n"); 1003 goto reload; 1004 } 1005 1006 default: 1007 /* 1008 * Some other problem; report it. 1009 */ 1010 printf("%s: can't load mbuf chain, error = %d\n", 1011 sc->sc_dev.dv_xname, error); 1012 m_freem(mb_head); 1013 goto out; 1014 } 1015 1016 fr = &txp->tx_dpd->dpd_frags[0]; 1017 totlen = 0; 1018 for (segment = 0; segment < dmamap->dm_nsegs; segment++, fr++) { 1019 fr->fr_addr = htole32(dmamap->dm_segs[segment].ds_addr); 1020 fr->fr_len = htole32(dmamap->dm_segs[segment].ds_len); 1021 totlen += dmamap->dm_segs[segment].ds_len; 1022 } 1023 fr--; 1024 fr->fr_len |= htole32(EX_FR_LAST); 1025 txp->tx_mbhead = mb_head; 1026 1027 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 1028 BUS_DMASYNC_PREWRITE); 1029 1030 dpd = txp->tx_dpd; 1031 dpd->dpd_nextptr = 0; 1032 dpd->dpd_fsh = htole32(totlen); 1033 1034 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1035 ((caddr_t)dpd - (caddr_t)sc->sc_dpd), 1036 sizeof (struct ex_dpd), 1037 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1038 1039 /* 1040 * No need to stall the download engine, we know it's 1041 * not busy right now. 1042 * 1043 * Fix up pointers in both the "soft" tx and the physical 1044 * tx list. 1045 */ 1046 if (sc->tx_head != NULL) { 1047 prevdpd = sc->tx_tail->tx_dpd; 1048 offset = ((caddr_t)prevdpd - (caddr_t)sc->sc_dpd); 1049 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1050 offset, sizeof (struct ex_dpd), 1051 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1052 prevdpd->dpd_nextptr = htole32(DPD_DMADDR(sc, txp)); 1053 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1054 offset, sizeof (struct ex_dpd), 1055 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1056 sc->tx_tail->tx_next = txp; 1057 sc->tx_tail = txp; 1058 } else { 1059 sc->tx_tail = sc->tx_head = txp; 1060 } 1061 1062 #if NBPFILTER > 0 1063 /* 1064 * Pass packet to bpf if there is a listener. 1065 */ 1066 if (ifp->if_bpf) 1067 bpf_mtap(ifp->if_bpf, mb_head); 1068 #endif 1069 } 1070 out: 1071 if (sc->tx_head) { 1072 sc->tx_tail->tx_dpd->dpd_fsh |= htole32(EX_DPD_DNIND); 1073 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1074 ((caddr_t)sc->tx_tail->tx_dpd - (caddr_t)sc->sc_dpd), 1075 sizeof (struct ex_dpd), 1076 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1077 ifp->if_flags |= IFF_OACTIVE; 1078 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_DNUNSTALL); 1079 bus_space_write_4(iot, ioh, ELINK_DNLISTPTR, 1080 DPD_DMADDR(sc, sc->tx_head)); 1081 1082 /* trigger watchdog */ 1083 ifp->if_timer = 5; 1084 } 1085 } 1086 1087 1088 int 1089 ex_intr(arg) 1090 void *arg; 1091 { 1092 struct ex_softc *sc = arg; 1093 bus_space_tag_t iot = sc->sc_iot; 1094 bus_space_handle_t ioh = sc->sc_ioh; 1095 u_int16_t stat; 1096 int ret = 0; 1097 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1098 1099 if (sc->enabled == 0) { 1100 return ret; 1101 } 1102 for (;;) { 1103 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1104 1105 stat = bus_space_read_2(iot, ioh, ELINK_STATUS); 1106 1107 if ((stat & S_MASK) == 0) { 1108 if ((stat & S_INTR_LATCH) == 0) { 1109 #if 0 1110 printf("%s: intr latch cleared\n", 1111 sc->sc_dev.dv_xname); 1112 #endif 1113 break; 1114 } 1115 } 1116 1117 ret = 1; 1118 1119 /* 1120 * Acknowledge interrupts. 1121 */ 1122 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1123 (stat & S_MASK)); 1124 if (sc->intr_ack) 1125 (*sc->intr_ack)(sc); 1126 1127 if (stat & S_HOST_ERROR) { 1128 printf("%s: adapter failure (%x)\n", 1129 sc->sc_dev.dv_xname, stat); 1130 ex_reset(sc); 1131 ex_init(sc); 1132 return 1; 1133 } 1134 if (stat & S_TX_COMPLETE) { 1135 ex_txstat(sc); 1136 } 1137 if (stat & S_UPD_STATS) { 1138 ex_getstats(sc); 1139 } 1140 if (stat & S_DN_COMPLETE) { 1141 struct ex_txdesc *txp, *ptxp = NULL; 1142 bus_dmamap_t txmap; 1143 1144 /* reset watchdog timer, was set in ex_start() */ 1145 ifp->if_timer = 0; 1146 1147 for (txp = sc->tx_head; txp != NULL; 1148 txp = txp->tx_next) { 1149 bus_dmamap_sync(sc->sc_dmat, 1150 sc->sc_dpd_dmamap, 1151 (caddr_t)txp->tx_dpd - (caddr_t)sc->sc_dpd, 1152 sizeof (struct ex_dpd), 1153 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1154 if (txp->tx_mbhead != NULL) { 1155 txmap = txp->tx_dmamap; 1156 bus_dmamap_sync(sc->sc_dmat, txmap, 1157 0, txmap->dm_mapsize, 1158 BUS_DMASYNC_POSTWRITE); 1159 bus_dmamap_unload(sc->sc_dmat, txmap); 1160 m_freem(txp->tx_mbhead); 1161 txp->tx_mbhead = NULL; 1162 } 1163 ptxp = txp; 1164 } 1165 1166 /* 1167 * Move finished tx buffers back to the tx free list. 1168 */ 1169 if (sc->tx_free) { 1170 sc->tx_ftail->tx_next = sc->tx_head; 1171 sc->tx_ftail = ptxp; 1172 } else 1173 sc->tx_ftail = sc->tx_free = sc->tx_head; 1174 1175 sc->tx_head = sc->tx_tail = NULL; 1176 ifp->if_flags &= ~IFF_OACTIVE; 1177 } 1178 1179 if (stat & S_UP_COMPLETE) { 1180 struct ex_rxdesc *rxd; 1181 struct mbuf *m; 1182 struct ex_upd *upd; 1183 bus_dmamap_t rxmap; 1184 u_int32_t pktstat; 1185 1186 rcvloop: 1187 rxd = sc->rx_head; 1188 rxmap = rxd->rx_dmamap; 1189 m = rxd->rx_mbhead; 1190 upd = rxd->rx_upd; 1191 pktstat = le32toh(upd->upd_pktstatus); 1192 1193 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, 1194 rxmap->dm_mapsize, 1195 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1196 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1197 ((caddr_t)upd - (caddr_t)sc->sc_upd), 1198 sizeof (struct ex_upd), 1199 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1200 1201 if (pktstat & EX_UPD_COMPLETE) { 1202 /* 1203 * Remove first packet from the chain. 1204 */ 1205 sc->rx_head = rxd->rx_next; 1206 rxd->rx_next = NULL; 1207 1208 /* 1209 * Add a new buffer to the receive chain. 1210 * If this fails, the old buffer is recycled 1211 * instead. 1212 */ 1213 if (ex_add_rxbuf(sc, rxd) == 0) { 1214 struct ether_header *eh; 1215 u_int16_t total_len; 1216 1217 1218 if (pktstat & EX_UPD_ERR) { 1219 ifp->if_ierrors++; 1220 m_freem(m); 1221 goto rcvloop; 1222 } 1223 1224 total_len = pktstat & EX_UPD_PKTLENMASK; 1225 if (total_len < 1226 sizeof(struct ether_header)) { 1227 m_freem(m); 1228 goto rcvloop; 1229 } 1230 m->m_pkthdr.rcvif = ifp; 1231 m->m_pkthdr.len = m->m_len = total_len; 1232 eh = mtod(m, struct ether_header *); 1233 #if NBPFILTER > 0 1234 if (ifp->if_bpf) { 1235 bpf_tap(ifp->if_bpf, 1236 mtod(m, caddr_t), 1237 total_len); 1238 /* 1239 * Only pass this packet up 1240 * if it is for us. 1241 */ 1242 if ((ifp->if_flags & 1243 IFF_PROMISC) && 1244 (eh->ether_dhost[0] & 1) 1245 == 0 && 1246 bcmp(eh->ether_dhost, 1247 LLADDR(ifp->if_sadl), 1248 sizeof(eh->ether_dhost)) 1249 != 0) { 1250 m_freem(m); 1251 goto rcvloop; 1252 } 1253 } 1254 #endif /* NBPFILTER > 0 */ 1255 (*ifp->if_input)(ifp, m); 1256 } 1257 goto rcvloop; 1258 } 1259 /* 1260 * Just in case we filled up all UPDs and the DMA engine 1261 * stalled. We could be more subtle about this. 1262 */ 1263 if (bus_space_read_4(iot, ioh, ELINK_UPLISTPTR) == 0) { 1264 printf("%s: uplistptr was 0\n", 1265 sc->sc_dev.dv_xname); 1266 ex_init(sc); 1267 } else if (bus_space_read_4(iot, ioh, ELINK_UPPKTSTATUS) 1268 & 0x2000) { 1269 printf("%s: receive stalled\n", 1270 sc->sc_dev.dv_xname); 1271 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1272 ELINK_UPUNSTALL); 1273 } 1274 } 1275 } 1276 1277 /* no more interrupts */ 1278 if (ret && ifp->if_snd.ifq_head) 1279 ex_start(ifp); 1280 return ret; 1281 } 1282 1283 int 1284 ex_ioctl(ifp, cmd, data) 1285 register struct ifnet *ifp; 1286 u_long cmd; 1287 caddr_t data; 1288 { 1289 struct ex_softc *sc = ifp->if_softc; 1290 struct ifaddr *ifa = (struct ifaddr *)data; 1291 struct ifreq *ifr = (struct ifreq *)data; 1292 int s, error = 0; 1293 1294 s = splnet(); 1295 1296 switch (cmd) { 1297 1298 case SIOCSIFADDR: 1299 ifp->if_flags |= IFF_UP; 1300 switch (ifa->ifa_addr->sa_family) { 1301 #ifdef INET 1302 case AF_INET: 1303 ex_init(sc); 1304 arp_ifinit(&sc->sc_ethercom.ec_if, ifa); 1305 break; 1306 #endif 1307 #ifdef NS 1308 case AF_NS: 1309 { 1310 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1311 1312 if (ns_nullhost(*ina)) 1313 ina->x_host = *(union ns_host *) 1314 LLADDR(ifp->if_sadl); 1315 else 1316 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl), 1317 ifp->if_addrlen); 1318 /* Set new address. */ 1319 ex_init(sc); 1320 break; 1321 } 1322 #endif 1323 default: 1324 ex_init(sc); 1325 break; 1326 } 1327 break; 1328 case SIOCSIFMEDIA: 1329 case SIOCGIFMEDIA: 1330 error = ifmedia_ioctl(ifp, ifr, &sc->ex_mii.mii_media, cmd); 1331 break; 1332 1333 case SIOCSIFFLAGS: 1334 if ((ifp->if_flags & IFF_UP) == 0 && 1335 (ifp->if_flags & IFF_RUNNING) != 0) { 1336 /* 1337 * If interface is marked down and it is running, then 1338 * stop it. 1339 */ 1340 ex_stop(sc); 1341 ifp->if_flags &= ~IFF_RUNNING; 1342 } else if ((ifp->if_flags & IFF_UP) != 0 && 1343 (ifp->if_flags & IFF_RUNNING) == 0) { 1344 /* 1345 * If interface is marked up and it is stopped, then 1346 * start it. 1347 */ 1348 ex_init(sc); 1349 } else if ((ifp->if_flags & IFF_UP) != 0) { 1350 /* 1351 * Deal with other flags that change hardware 1352 * state, i.e. IFF_PROMISC. 1353 */ 1354 ex_set_mc(sc); 1355 } 1356 break; 1357 1358 case SIOCADDMULTI: 1359 case SIOCDELMULTI: 1360 error = (cmd == SIOCADDMULTI) ? 1361 ether_addmulti(ifr, &sc->sc_ethercom) : 1362 ether_delmulti(ifr, &sc->sc_ethercom); 1363 1364 if (error == ENETRESET) { 1365 /* 1366 * Multicast list has changed; set the hardware filter 1367 * accordingly. 1368 */ 1369 ex_set_mc(sc); 1370 error = 0; 1371 } 1372 break; 1373 1374 default: 1375 error = EINVAL; 1376 break; 1377 } 1378 1379 splx(s); 1380 return (error); 1381 } 1382 1383 void 1384 ex_getstats(sc) 1385 struct ex_softc *sc; 1386 { 1387 bus_space_handle_t ioh = sc->sc_ioh; 1388 bus_space_tag_t iot = sc->sc_iot; 1389 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1390 u_int8_t upperok; 1391 1392 GO_WINDOW(6); 1393 upperok = bus_space_read_1(iot, ioh, UPPER_FRAMES_OK); 1394 ifp->if_ipackets += bus_space_read_1(iot, ioh, RX_FRAMES_OK); 1395 ifp->if_ipackets += (upperok & 0x03) << 8; 1396 ifp->if_opackets += bus_space_read_1(iot, ioh, TX_FRAMES_OK); 1397 ifp->if_opackets += (upperok & 0x30) << 4; 1398 ifp->if_ierrors += bus_space_read_1(iot, ioh, RX_OVERRUNS); 1399 ifp->if_collisions += bus_space_read_1(iot, ioh, TX_COLLISIONS); 1400 /* 1401 * There seems to be no way to get the exact number of collisions, 1402 * this is the number that occured at the very least. 1403 */ 1404 ifp->if_collisions += 2 * bus_space_read_1(iot, ioh, 1405 TX_AFTER_X_COLLISIONS); 1406 ifp->if_ibytes += bus_space_read_2(iot, ioh, RX_TOTAL_OK); 1407 ifp->if_obytes += bus_space_read_2(iot, ioh, TX_TOTAL_OK); 1408 1409 /* 1410 * Clear the following to avoid stats overflow interrupts 1411 */ 1412 bus_space_read_1(iot, ioh, TX_DEFERRALS); 1413 bus_space_read_1(iot, ioh, TX_AFTER_1_COLLISION); 1414 bus_space_read_1(iot, ioh, TX_NO_SQE); 1415 bus_space_read_1(iot, ioh, TX_CD_LOST); 1416 GO_WINDOW(4); 1417 bus_space_read_1(iot, ioh, ELINK_W4_BADSSD); 1418 upperok = bus_space_read_1(iot, ioh, ELINK_W4_UBYTESOK); 1419 ifp->if_ibytes += (upperok & 0x0f) << 16; 1420 ifp->if_obytes += (upperok & 0xf0) << 12; 1421 GO_WINDOW(1); 1422 } 1423 1424 void 1425 ex_printstats(sc) 1426 struct ex_softc *sc; 1427 { 1428 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1429 1430 ex_getstats(sc); 1431 printf("in %llu out %llu ierror %llu oerror %llu ibytes %llu obytes " 1432 "%llu\n", (unsigned long long)ifp->if_ipackets, 1433 (unsigned long long)ifp->if_opackets, 1434 (unsigned long long)ifp->if_ierrors, 1435 (unsigned long long)ifp->if_oerrors, 1436 (unsigned long long)ifp->if_ibytes, 1437 (unsigned long long)ifp->if_obytes); 1438 } 1439 1440 void 1441 ex_tick(arg) 1442 void *arg; 1443 { 1444 struct ex_softc *sc = arg; 1445 int s = splnet(); 1446 1447 if (sc->ex_conf & EX_CONF_MII) 1448 mii_tick(&sc->ex_mii); 1449 1450 if (!(bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, ELINK_STATUS) 1451 & S_COMMAND_IN_PROGRESS)) 1452 ex_getstats(sc); 1453 1454 splx(s); 1455 1456 timeout(ex_tick, sc, hz); 1457 } 1458 1459 1460 void 1461 ex_reset(sc) 1462 struct ex_softc *sc; 1463 { 1464 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, GLOBAL_RESET); 1465 delay(400); 1466 ex_waitcmd(sc); 1467 } 1468 1469 void 1470 ex_watchdog(ifp) 1471 struct ifnet *ifp; 1472 { 1473 struct ex_softc *sc = ifp->if_softc; 1474 1475 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1476 ++sc->sc_ethercom.ec_if.if_oerrors; 1477 1478 ex_reset(sc); 1479 ex_init(sc); 1480 } 1481 1482 void 1483 ex_stop(sc) 1484 struct ex_softc *sc; 1485 { 1486 bus_space_tag_t iot = sc->sc_iot; 1487 bus_space_handle_t ioh = sc->sc_ioh; 1488 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1489 struct ex_txdesc *tx; 1490 struct ex_rxdesc *rx; 1491 int i; 1492 1493 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1494 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1495 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1496 1497 for (tx = sc->tx_head ; tx != NULL; tx = tx->tx_next) { 1498 if (tx->tx_mbhead == NULL) 1499 continue; 1500 m_freem(tx->tx_mbhead); 1501 tx->tx_mbhead = NULL; 1502 bus_dmamap_unload(sc->sc_dmat, tx->tx_dmamap); 1503 tx->tx_dpd->dpd_fsh = tx->tx_dpd->dpd_nextptr = 0; 1504 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1505 ((caddr_t)tx->tx_dpd - (caddr_t)sc->sc_dpd), 1506 sizeof (struct ex_dpd), 1507 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1508 } 1509 sc->tx_tail = sc->tx_head = NULL; 1510 ex_init_txdescs(sc); 1511 1512 sc->rx_tail = sc->rx_head = 0; 1513 for (i = 0; i < EX_NUPD; i++) { 1514 rx = &sc->sc_rxdescs[i]; 1515 if (rx->rx_mbhead != NULL) { 1516 bus_dmamap_unload(sc->sc_dmat, rx->rx_dmamap); 1517 m_freem(rx->rx_mbhead); 1518 rx->rx_mbhead = NULL; 1519 } 1520 ex_add_rxbuf(sc, rx); 1521 } 1522 1523 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1524 1525 untimeout(ex_tick, sc); 1526 if (sc->ex_conf & EX_CONF_MII) 1527 mii_down(&sc->ex_mii); 1528 1529 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1530 ifp->if_timer = 0; 1531 } 1532 1533 static void 1534 ex_init_txdescs(sc) 1535 struct ex_softc *sc; 1536 { 1537 int i; 1538 1539 for (i = 0; i < EX_NDPD; i++) { 1540 sc->sc_txdescs[i].tx_dmamap = sc->sc_tx_dmamaps[i]; 1541 sc->sc_txdescs[i].tx_dpd = &sc->sc_dpd[i]; 1542 if (i < EX_NDPD - 1) 1543 sc->sc_txdescs[i].tx_next = &sc->sc_txdescs[i + 1]; 1544 else 1545 sc->sc_txdescs[i].tx_next = NULL; 1546 } 1547 sc->tx_free = &sc->sc_txdescs[0]; 1548 sc->tx_ftail = &sc->sc_txdescs[EX_NDPD-1]; 1549 } 1550 1551 1552 /* 1553 * Before reboots, reset card completely. 1554 */ 1555 static void 1556 ex_shutdown(arg) 1557 void *arg; 1558 { 1559 register struct ex_softc *sc = arg; 1560 1561 ex_stop(sc); 1562 } 1563 1564 /* 1565 * Read EEPROM data. 1566 * XXX what to do if EEPROM doesn't unbusy? 1567 */ 1568 u_int16_t 1569 ex_read_eeprom(sc, offset) 1570 struct ex_softc *sc; 1571 int offset; 1572 { 1573 bus_space_tag_t iot = sc->sc_iot; 1574 bus_space_handle_t ioh = sc->sc_ioh; 1575 u_int16_t data = 0; 1576 1577 GO_WINDOW(0); 1578 if (ex_eeprom_busy(sc)) 1579 goto out; 1580 switch (sc->ex_bustype) { 1581 case EX_BUS_PCI: 1582 bus_space_write_1(iot, ioh, ELINK_W0_EEPROM_COMMAND, 1583 READ_EEPROM | (offset & 0x3f)); 1584 break; 1585 case EX_BUS_CARDBUS: 1586 bus_space_write_2(iot, ioh, ELINK_W0_EEPROM_COMMAND, 1587 0x230 + (offset & 0x3f)); 1588 break; 1589 } 1590 if (ex_eeprom_busy(sc)) 1591 goto out; 1592 data = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_DATA); 1593 out: 1594 return data; 1595 } 1596 1597 static int 1598 ex_eeprom_busy(sc) 1599 struct ex_softc *sc; 1600 { 1601 bus_space_tag_t iot = sc->sc_iot; 1602 bus_space_handle_t ioh = sc->sc_ioh; 1603 int i = 100; 1604 1605 while (i--) { 1606 if (!(bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND) & 1607 EEPROM_BUSY)) 1608 return 0; 1609 delay(100); 1610 } 1611 printf("\n%s: eeprom stays busy.\n", sc->sc_dev.dv_xname); 1612 return (1); 1613 } 1614 1615 /* 1616 * Create a new rx buffer and add it to the 'soft' rx list. 1617 */ 1618 static int 1619 ex_add_rxbuf(sc, rxd) 1620 struct ex_softc *sc; 1621 struct ex_rxdesc *rxd; 1622 { 1623 struct mbuf *m, *oldm; 1624 bus_dmamap_t rxmap; 1625 int error, rval = 0; 1626 1627 oldm = rxd->rx_mbhead; 1628 rxmap = rxd->rx_dmamap; 1629 1630 MGETHDR(m, M_DONTWAIT, MT_DATA); 1631 if (m != NULL) { 1632 MCLGET(m, M_DONTWAIT); 1633 if ((m->m_flags & M_EXT) == 0) { 1634 m_freem(m); 1635 if (oldm == NULL) 1636 return 1; 1637 m = oldm; 1638 m->m_data = m->m_ext.ext_buf; 1639 rval = 1; 1640 } 1641 } else { 1642 if (oldm == NULL) 1643 return 1; 1644 m = oldm; 1645 m->m_data = m->m_ext.ext_buf; 1646 rval = 1; 1647 } 1648 1649 /* 1650 * Setup the DMA map for this receive buffer. 1651 */ 1652 if (m != oldm) { 1653 if (oldm != NULL) 1654 bus_dmamap_unload(sc->sc_dmat, rxmap); 1655 error = bus_dmamap_load(sc->sc_dmat, rxmap, 1656 m->m_ext.ext_buf, MCLBYTES, NULL, BUS_DMA_NOWAIT); 1657 if (error) { 1658 printf("%s: can't load rx buffer, error = %d\n", 1659 sc->sc_dev.dv_xname, error); 1660 panic("ex_add_rxbuf"); /* XXX */ 1661 } 1662 } 1663 1664 /* 1665 * Align for data after 14 byte header. 1666 */ 1667 m->m_data += 2; 1668 1669 rxd->rx_mbhead = m; 1670 rxd->rx_upd->upd_pktstatus = htole32(MCLBYTES - 2); 1671 rxd->rx_upd->upd_frags[0].fr_addr = 1672 htole32(rxmap->dm_segs[0].ds_addr + 2); 1673 rxd->rx_upd->upd_nextptr = 0; 1674 1675 /* 1676 * Attach it to the end of the list. 1677 */ 1678 if (sc->rx_head != NULL) { 1679 sc->rx_tail->rx_next = rxd; 1680 sc->rx_tail->rx_upd->upd_nextptr = htole32(sc->sc_upddma + 1681 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd)); 1682 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1683 (caddr_t)sc->rx_tail->rx_upd - (caddr_t)sc->sc_upd, 1684 sizeof (struct ex_upd), 1685 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1686 } else { 1687 sc->rx_head = rxd; 1688 } 1689 sc->rx_tail = rxd; 1690 1691 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, rxmap->dm_mapsize, 1692 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1693 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1694 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd), 1695 sizeof (struct ex_upd), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1696 return (rval); 1697 } 1698 1699 u_int32_t 1700 ex_mii_bitbang_read(self) 1701 struct device *self; 1702 { 1703 struct ex_softc *sc = (void *) self; 1704 1705 /* We're already in Window 4. */ 1706 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT)); 1707 } 1708 1709 void 1710 ex_mii_bitbang_write(self, val) 1711 struct device *self; 1712 u_int32_t val; 1713 { 1714 struct ex_softc *sc = (void *) self; 1715 1716 /* We're already in Window 4. */ 1717 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT, val); 1718 } 1719 1720 int 1721 ex_mii_readreg(v, phy, reg) 1722 struct device *v; 1723 int phy, reg; 1724 { 1725 struct ex_softc *sc = (struct ex_softc *)v; 1726 int val; 1727 1728 if ((sc->ex_conf & EX_CONF_INTPHY) && phy != ELINK_INTPHY_ID) 1729 return 0; 1730 1731 GO_WINDOW(4); 1732 1733 val = mii_bitbang_readreg(v, &ex_mii_bitbang_ops, phy, reg); 1734 1735 GO_WINDOW(1); 1736 1737 return (val); 1738 } 1739 1740 void 1741 ex_mii_writereg(v, phy, reg, data) 1742 struct device *v; 1743 int phy; 1744 int reg; 1745 int data; 1746 { 1747 struct ex_softc *sc = (struct ex_softc *)v; 1748 1749 GO_WINDOW(4); 1750 1751 mii_bitbang_writereg(v, &ex_mii_bitbang_ops, phy, reg, data); 1752 1753 GO_WINDOW(1); 1754 } 1755 1756 void 1757 ex_mii_statchg(v) 1758 struct device *v; 1759 { 1760 struct ex_softc *sc = (struct ex_softc *)v; 1761 bus_space_tag_t iot = sc->sc_iot; 1762 bus_space_handle_t ioh = sc->sc_ioh; 1763 int mctl; 1764 1765 /* XXX Update ifp->if_baudrate */ 1766 1767 GO_WINDOW(3); 1768 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1769 if (sc->ex_mii.mii_media_active & IFM_FDX) 1770 mctl |= MAC_CONTROL_FDX; 1771 else 1772 mctl &= ~MAC_CONTROL_FDX; 1773 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1774 GO_WINDOW(1); /* back to operating window */ 1775 } 1776
Indexes created Wed Oct 22 13:09:56 GMT 2025