elinkxl.c revision 1.29
1 /* $NetBSD: elinkxl.c,v 1.29 2000/03/06 21:02:00 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Frank van der Linden. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include "opt_inet.h" 40 #include "opt_ns.h" 41 #include "bpfilter.h" 42 #include "rnd.h" 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/kernel.h> 47 #include <sys/mbuf.h> 48 #include <sys/socket.h> 49 #include <sys/ioctl.h> 50 #include <sys/errno.h> 51 #include <sys/syslog.h> 52 #include <sys/select.h> 53 #include <sys/device.h> 54 #if NRND > 0 55 #include <sys/rnd.h> 56 #endif 57 58 #include <net/if.h> 59 #include <net/if_dl.h> 60 #include <net/if_ether.h> 61 #include <net/if_media.h> 62 63 #ifdef INET 64 #include <netinet/in.h> 65 #include <netinet/in_systm.h> 66 #include <netinet/in_var.h> 67 #include <netinet/ip.h> 68 #include <netinet/if_inarp.h> 69 #endif 70 71 #ifdef NS 72 #include <netns/ns.h> 73 #include <netns/ns_if.h> 74 #endif 75 76 #if NBPFILTER > 0 77 #include <net/bpf.h> 78 #include <net/bpfdesc.h> 79 #endif 80 81 #include <machine/cpu.h> 82 #include <machine/bus.h> 83 #include <machine/intr.h> 84 #include <machine/endian.h> 85 86 #include <vm/vm.h> 87 #include <vm/pmap.h> 88 89 #include <dev/mii/miivar.h> 90 #include <dev/mii/mii.h> 91 #include <dev/mii/mii_bitbang.h> 92 93 #include <dev/ic/elink3reg.h> 94 /* #include <dev/ic/elink3var.h> */ 95 #include <dev/ic/elinkxlreg.h> 96 #include <dev/ic/elinkxlvar.h> 97 98 #ifdef DEBUG 99 int exdebug = 0; 100 #endif 101 102 /* ifmedia callbacks */ 103 int ex_media_chg __P((struct ifnet *ifp)); 104 void ex_media_stat __P((struct ifnet *ifp, struct ifmediareq *req)); 105 106 void ex_probe_media __P((struct ex_softc *)); 107 void ex_set_filter __P((struct ex_softc *)); 108 void ex_set_media __P((struct ex_softc *)); 109 struct mbuf *ex_get __P((struct ex_softc *, int)); 110 u_int16_t ex_read_eeprom __P((struct ex_softc *, int)); 111 void ex_init __P((struct ex_softc *)); 112 void ex_read __P((struct ex_softc *)); 113 void ex_reset __P((struct ex_softc *)); 114 void ex_set_mc __P((struct ex_softc *)); 115 void ex_getstats __P((struct ex_softc *)); 116 void ex_printstats __P((struct ex_softc *)); 117 void ex_tick __P((void *)); 118 119 static int ex_eeprom_busy __P((struct ex_softc *)); 120 static int ex_add_rxbuf __P((struct ex_softc *, struct ex_rxdesc *)); 121 static void ex_init_txdescs __P((struct ex_softc *)); 122 123 static void ex_shutdown __P((void *)); 124 static void ex_start __P((struct ifnet *)); 125 static void ex_txstat __P((struct ex_softc *)); 126 static u_int16_t ex_mchash __P((u_char *)); 127 128 int ex_mii_readreg __P((struct device *, int, int)); 129 void ex_mii_writereg __P((struct device *, int, int, int)); 130 void ex_mii_statchg __P((struct device *)); 131 132 void ex_probemedia __P((struct ex_softc *)); 133 134 /* 135 * Structure to map media-present bits in boards to ifmedia codes and 136 * printable media names. Used for table-driven ifmedia initialization. 137 */ 138 struct ex_media { 139 int exm_mpbit; /* media present bit */ 140 const char *exm_name; /* name of medium */ 141 int exm_ifmedia; /* ifmedia word for medium */ 142 int exm_epmedia; /* ELINKMEDIA_* constant */ 143 }; 144 145 /* 146 * Media table for 3c90x chips. Note that chips with MII have no 147 * `native' media. 148 */ 149 struct ex_media ex_native_media[] = { 150 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 151 ELINKMEDIA_10BASE_T }, 152 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 153 ELINKMEDIA_10BASE_T }, 154 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 155 ELINKMEDIA_AUI }, 156 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 157 ELINKMEDIA_10BASE_2 }, 158 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 159 ELINKMEDIA_100BASE_TX }, 160 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 161 ELINKMEDIA_100BASE_TX }, 162 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 163 ELINKMEDIA_100BASE_FX }, 164 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 165 ELINKMEDIA_MII }, 166 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 167 ELINKMEDIA_100BASE_T4 }, 168 { 0, NULL, 0, 169 0 }, 170 }; 171 172 /* 173 * MII bit-bang glue. 174 */ 175 u_int32_t ex_mii_bitbang_read __P((struct device *)); 176 void ex_mii_bitbang_write __P((struct device *, u_int32_t)); 177 178 const struct mii_bitbang_ops ex_mii_bitbang_ops = { 179 ex_mii_bitbang_read, 180 ex_mii_bitbang_write, 181 { 182 ELINK_PHY_DATA, /* MII_BIT_MDO */ 183 ELINK_PHY_DATA, /* MII_BIT_MDI */ 184 ELINK_PHY_CLK, /* MII_BIT_MDC */ 185 ELINK_PHY_DIR, /* MII_BIT_DIR_HOST_PHY */ 186 0, /* MII_BIT_DIR_PHY_HOST */ 187 } 188 }; 189 190 /* 191 * Back-end attach and configure. 192 */ 193 void 194 ex_config(sc) 195 struct ex_softc *sc; 196 { 197 struct ifnet *ifp; 198 u_int16_t val; 199 u_int8_t macaddr[ETHER_ADDR_LEN] = {0}; 200 bus_space_tag_t iot = sc->sc_iot; 201 bus_space_handle_t ioh = sc->sc_ioh; 202 int i, error, attach_stage; 203 204 ex_reset(sc); 205 206 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR0); 207 macaddr[0] = val >> 8; 208 macaddr[1] = val & 0xff; 209 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR1); 210 macaddr[2] = val >> 8; 211 macaddr[3] = val & 0xff; 212 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR2); 213 macaddr[4] = val >> 8; 214 macaddr[5] = val & 0xff; 215 216 printf("%s: MAC address %s\n", sc->sc_dev.dv_xname, 217 ether_sprintf(macaddr)); 218 219 if (sc->intr_ack) { /* 3C575BTX specific */ 220 GO_WINDOW(2); 221 bus_space_write_2(sc->sc_iot, ioh, 12, 0x10|bus_space_read_2(sc->sc_iot, ioh, 12)); 222 } 223 224 attach_stage = 0; 225 226 /* 227 * Allocate the upload descriptors, and create and load the DMA 228 * map for them. 229 */ 230 if ((error = bus_dmamem_alloc(sc->sc_dmat, 231 EX_NUPD * sizeof (struct ex_upd), NBPG, 0, &sc->sc_useg, 1, 232 &sc->sc_urseg, BUS_DMA_NOWAIT)) != 0) { 233 printf("%s: can't allocate upload descriptors, error = %d\n", 234 sc->sc_dev.dv_xname, error); 235 goto fail; 236 } 237 238 attach_stage = 1; 239 240 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg, 241 EX_NUPD * sizeof (struct ex_upd), (caddr_t *)&sc->sc_upd, 242 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 243 printf("%s: can't map upload descriptors, error = %d\n", 244 sc->sc_dev.dv_xname, error); 245 goto fail; 246 } 247 248 attach_stage = 2; 249 250 if ((error = bus_dmamap_create(sc->sc_dmat, 251 EX_NUPD * sizeof (struct ex_upd), 1, 252 EX_NUPD * sizeof (struct ex_upd), 0, BUS_DMA_NOWAIT, 253 &sc->sc_upd_dmamap)) != 0) { 254 printf("%s: can't create upload desc. DMA map, error = %d\n", 255 sc->sc_dev.dv_xname, error); 256 goto fail; 257 } 258 259 attach_stage = 3; 260 261 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_upd_dmamap, 262 sc->sc_upd, EX_NUPD * sizeof (struct ex_upd), NULL, 263 BUS_DMA_NOWAIT)) != 0) { 264 printf("%s: can't load upload desc. DMA map, error = %d\n", 265 sc->sc_dev.dv_xname, error); 266 goto fail; 267 } 268 269 attach_stage = 4; 270 271 /* 272 * Allocate the download descriptors, and create and load the DMA 273 * map for them. 274 */ 275 if ((error = bus_dmamem_alloc(sc->sc_dmat, 276 EX_NDPD * sizeof (struct ex_dpd), NBPG, 0, &sc->sc_dseg, 1, 277 &sc->sc_drseg, BUS_DMA_NOWAIT)) != 0) { 278 printf("%s: can't allocate download descriptors, error = %d\n", 279 sc->sc_dev.dv_xname, error); 280 goto fail; 281 } 282 283 attach_stage = 5; 284 285 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg, 286 EX_NDPD * sizeof (struct ex_dpd), (caddr_t *)&sc->sc_dpd, 287 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 288 printf("%s: can't map download descriptors, error = %d\n", 289 sc->sc_dev.dv_xname, error); 290 goto fail; 291 } 292 bzero(sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd)); 293 294 attach_stage = 6; 295 296 if ((error = bus_dmamap_create(sc->sc_dmat, 297 EX_NDPD * sizeof (struct ex_dpd), 1, 298 EX_NDPD * sizeof (struct ex_dpd), 0, BUS_DMA_NOWAIT, 299 &sc->sc_dpd_dmamap)) != 0) { 300 printf("%s: can't create download desc. DMA map, error = %d\n", 301 sc->sc_dev.dv_xname, error); 302 goto fail; 303 } 304 305 attach_stage = 7; 306 307 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dpd_dmamap, 308 sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd), NULL, 309 BUS_DMA_NOWAIT)) != 0) { 310 printf("%s: can't load download desc. DMA map, error = %d\n", 311 sc->sc_dev.dv_xname, error); 312 goto fail; 313 } 314 315 attach_stage = 8; 316 317 318 /* 319 * Create the transmit buffer DMA maps. 320 */ 321 for (i = 0; i < EX_NDPD; i++) { 322 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 323 EX_NTFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 324 &sc->sc_tx_dmamaps[i])) != 0) { 325 printf("%s: can't create tx DMA map %d, error = %d\n", 326 sc->sc_dev.dv_xname, i, error); 327 goto fail; 328 } 329 } 330 331 attach_stage = 9; 332 333 /* 334 * Create the receive buffer DMA maps. 335 */ 336 for (i = 0; i < EX_NUPD; i++) { 337 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 338 EX_NRFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 339 &sc->sc_rx_dmamaps[i])) != 0) { 340 printf("%s: can't create rx DMA map %d, error = %d\n", 341 sc->sc_dev.dv_xname, i, error); 342 goto fail; 343 } 344 } 345 346 attach_stage = 10; 347 348 /* 349 * Create ring of upload descriptors, only once. The DMA engine 350 * will loop over this when receiving packets, stalling if it 351 * hits an UPD with a finished receive. 352 */ 353 for (i = 0; i < EX_NUPD; i++) { 354 sc->sc_rxdescs[i].rx_dmamap = sc->sc_rx_dmamaps[i]; 355 sc->sc_rxdescs[i].rx_upd = &sc->sc_upd[i]; 356 sc->sc_upd[i].upd_frags[0].fr_len = 357 htole32((MCLBYTES - 2) | EX_FR_LAST); 358 if (ex_add_rxbuf(sc, &sc->sc_rxdescs[i]) != 0) { 359 printf("%s: can't allocate or map rx buffers\n", 360 sc->sc_dev.dv_xname); 361 goto fail; 362 } 363 } 364 365 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 0, 366 EX_NUPD * sizeof (struct ex_upd), 367 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 368 369 ex_init_txdescs(sc); 370 371 attach_stage = 11; 372 373 374 GO_WINDOW(3); 375 val = bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS); 376 if (val & ELINK_MEDIACAP_MII) 377 sc->ex_conf |= EX_CONF_MII; 378 379 ifp = &sc->sc_ethercom.ec_if; 380 381 /* 382 * Initialize our media structures and MII info. We'll 383 * probe the MII if we discover that we have one. 384 */ 385 sc->ex_mii.mii_ifp = ifp; 386 sc->ex_mii.mii_readreg = ex_mii_readreg; 387 sc->ex_mii.mii_writereg = ex_mii_writereg; 388 sc->ex_mii.mii_statchg = ex_mii_statchg; 389 ifmedia_init(&sc->ex_mii.mii_media, 0, ex_media_chg, 390 ex_media_stat); 391 392 if (sc->ex_conf & EX_CONF_MII) { 393 /* 394 * Find PHY, extract media information from it. 395 * First, select the right transceiver. 396 */ 397 u_int32_t icfg; 398 399 GO_WINDOW(3); 400 icfg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 401 icfg &= ~(CONFIG_XCVR_SEL << 16); 402 if (val & (ELINK_MEDIACAP_MII | ELINK_MEDIACAP_100BASET4)) 403 icfg |= ELINKMEDIA_MII << (CONFIG_XCVR_SEL_SHIFT + 16); 404 if (val & ELINK_MEDIACAP_100BASETX) 405 icfg |= ELINKMEDIA_AUTO << (CONFIG_XCVR_SEL_SHIFT + 16); 406 if (val & ELINK_MEDIACAP_100BASEFX) 407 icfg |= ELINKMEDIA_100BASE_FX 408 << (CONFIG_XCVR_SEL_SHIFT + 16); 409 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, icfg); 410 411 mii_attach(&sc->sc_dev, &sc->ex_mii, 0xffffffff, 412 MII_PHY_ANY, MII_OFFSET_ANY, 0); 413 if (LIST_FIRST(&sc->ex_mii.mii_phys) == NULL) { 414 ifmedia_add(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE, 415 0, NULL); 416 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE); 417 } else { 418 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_AUTO); 419 } 420 } else 421 ex_probemedia(sc); 422 423 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 424 ifp->if_softc = sc; 425 ifp->if_start = ex_start; 426 ifp->if_ioctl = ex_ioctl; 427 ifp->if_watchdog = ex_watchdog; 428 ifp->if_flags = 429 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 430 431 if_attach(ifp); 432 ether_ifattach(ifp, macaddr); 433 434 GO_WINDOW(1); 435 436 sc->tx_start_thresh = 20; 437 sc->tx_succ_ok = 0; 438 439 /* TODO: set queues to 0 */ 440 441 #if NBPFILTER > 0 442 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB, 443 sizeof(struct ether_header)); 444 #endif 445 446 #if NRND > 0 447 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 448 RND_TYPE_NET, 0); 449 #endif 450 451 /* Establish callback to reset card when we reboot. */ 452 sc->sc_sdhook = shutdownhook_establish(ex_shutdown, sc); 453 return; 454 455 fail: 456 /* 457 * Free any resources we've allocated during the failed attach 458 * attempt. Do this in reverse order and fall though. 459 */ 460 switch (attach_stage) { 461 case 11: 462 { 463 struct ex_rxdesc *rxd; 464 465 for (i = 0; i < EX_NUPD; i++) { 466 rxd = &sc->sc_rxdescs[i]; 467 if (rxd->rx_mbhead != NULL) { 468 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap); 469 m_freem(rxd->rx_mbhead); 470 } 471 } 472 } 473 /* FALLTHROUGH */ 474 475 case 10: 476 for (i = 0; i < EX_NUPD; i++) 477 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]); 478 /* FALLTHROUGH */ 479 480 case 9: 481 for (i = 0; i < EX_NDPD; i++) 482 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]); 483 /* FALLTHROUGH */ 484 case 8: 485 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap); 486 /* FALLTHROUGH */ 487 488 case 7: 489 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap); 490 /* FALLTHROUGH */ 491 492 case 6: 493 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd, 494 EX_NDPD * sizeof (struct ex_dpd)); 495 /* FALLTHROUGH */ 496 497 case 5: 498 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg); 499 break; 500 501 case 4: 502 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap); 503 /* FALLTHROUGH */ 504 505 case 3: 506 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap); 507 /* FALLTHROUGH */ 508 509 case 2: 510 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd, 511 EX_NUPD * sizeof (struct ex_upd)); 512 /* FALLTHROUGH */ 513 514 case 1: 515 bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg); 516 break; 517 } 518 519 } 520 521 /* 522 * Find the media present on non-MII chips. 523 */ 524 void 525 ex_probemedia(sc) 526 struct ex_softc *sc; 527 { 528 bus_space_tag_t iot = sc->sc_iot; 529 bus_space_handle_t ioh = sc->sc_ioh; 530 struct ifmedia *ifm = &sc->ex_mii.mii_media; 531 struct ex_media *exm; 532 u_int16_t config1, reset_options, default_media; 533 int defmedia = 0; 534 const char *sep = "", *defmedianame = NULL; 535 536 GO_WINDOW(3); 537 config1 = bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2); 538 reset_options = bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 539 GO_WINDOW(0); 540 541 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 542 543 printf("%s: ", sc->sc_dev.dv_xname); 544 545 /* Sanity check that there are any media! */ 546 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 547 printf("no media present!\n"); 548 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 549 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 550 return; 551 } 552 553 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 554 555 for (exm = ex_native_media; exm->exm_name != NULL; exm++) { 556 if (reset_options & exm->exm_mpbit) { 557 /* 558 * Default media is a little complicated. We 559 * support full-duplex which uses the same 560 * reset options bit. 561 * 562 * XXX Check EEPROM for default to FDX? 563 */ 564 if (exm->exm_epmedia == default_media) { 565 if ((exm->exm_ifmedia & IFM_FDX) == 0) { 566 defmedia = exm->exm_ifmedia; 567 defmedianame = exm->exm_name; 568 } 569 } else if (defmedia == 0) { 570 defmedia = exm->exm_ifmedia; 571 defmedianame = exm->exm_name; 572 } 573 ifmedia_add(ifm, exm->exm_ifmedia, exm->exm_epmedia, 574 NULL); 575 PRINT(exm->exm_name); 576 } 577 } 578 579 #undef PRINT 580 581 #ifdef DIAGNOSTIC 582 if (defmedia == 0) 583 panic("ex_probemedia: impossible"); 584 #endif 585 586 printf(", default %s\n", defmedianame); 587 ifmedia_set(ifm, defmedia); 588 } 589 590 /* 591 * Bring device up. 592 */ 593 void 594 ex_init(sc) 595 struct ex_softc *sc; 596 { 597 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 598 bus_space_tag_t iot = sc->sc_iot; 599 bus_space_handle_t ioh = sc->sc_ioh; 600 int s, i; 601 602 s = splnet(); 603 604 ex_waitcmd(sc); 605 ex_stop(sc); 606 607 /* 608 * Set the station address and clear the station mask. The latter 609 * is needed for 90x cards, 0 is the default for 90xB cards. 610 */ 611 GO_WINDOW(2); 612 for (i = 0; i < ETHER_ADDR_LEN; i++) { 613 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 614 LLADDR(ifp->if_sadl)[i]); 615 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 616 } 617 618 GO_WINDOW(3); 619 620 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_RESET); 621 ex_waitcmd(sc); 622 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_RESET); 623 ex_waitcmd(sc); 624 625 /* 626 * Disable reclaim threshold for 90xB, set free threshold to 627 * 6 * 256 = 1536 for 90x. 628 */ 629 if (sc->ex_conf & EX_CONF_90XB) 630 bus_space_write_2(iot, ioh, ELINK_COMMAND, 631 ELINK_TXRECLTHRESH | 255); 632 else 633 bus_space_write_1(iot, ioh, ELINK_TXFREETHRESH, 6); 634 635 bus_space_write_2(iot, ioh, ELINK_COMMAND, 636 SET_RX_EARLY_THRESH | ELINK_THRESH_DISABLE); 637 638 bus_space_write_4(iot, ioh, ELINK_DMACTRL, 639 bus_space_read_4(iot, ioh, ELINK_DMACTRL) | ELINK_DMAC_UPRXEAREN); 640 641 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK | S_MASK); 642 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK | S_MASK); 643 644 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 645 if (sc->intr_ack) 646 (* sc->intr_ack)(sc); 647 ex_set_media(sc); 648 ex_set_mc(sc); 649 650 651 bus_space_write_2(iot, ioh, ELINK_COMMAND, STATS_ENABLE); 652 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 653 bus_space_write_4(iot, ioh, ELINK_UPLISTPTR, sc->sc_upddma); 654 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 655 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_UPUNSTALL); 656 657 ifp->if_flags |= IFF_RUNNING; 658 ifp->if_flags &= ~IFF_OACTIVE; 659 ex_start(ifp); 660 661 GO_WINDOW(1); 662 663 splx(s); 664 665 timeout(ex_tick, sc, hz); 666 } 667 668 /* 669 * Multicast hash filter according to the 3Com spec. 670 */ 671 static u_int16_t 672 ex_mchash(addr) 673 u_char *addr; 674 { 675 u_int32_t crc, carry; 676 int i, j; 677 u_char c; 678 679 /* Compute CRC for the address value. */ 680 crc = 0xffffffff; /* initial value */ 681 682 for (i = 0; i < 6; i++) { 683 c = addr[i]; 684 for (j = 0; j < 8; j++) { 685 carry = ((crc & 0x80000000) ? 1 : 0) ^ (c & 0x01); 686 crc <<= 1; 687 c >>= 1; 688 if (carry) 689 crc = (crc ^ 0x04c11db6) | carry; 690 } 691 } 692 693 /* Return the filter bit position. */ 694 return(crc & 0x000000ff); 695 } 696 697 698 /* 699 * Set multicast receive filter. Also take care of promiscuous mode 700 * here (XXX). 701 */ 702 void 703 ex_set_mc(sc) 704 register struct ex_softc *sc; 705 { 706 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 707 struct ethercom *ec = &sc->sc_ethercom; 708 struct ether_multi *enm; 709 struct ether_multistep estep; 710 int i; 711 u_int16_t mask = FIL_INDIVIDUAL | FIL_BRDCST; 712 713 if (ifp->if_flags & IFF_PROMISC) 714 mask |= FIL_PROMISC; 715 716 if (!(ifp->if_flags & IFF_MULTICAST)) 717 goto out; 718 719 if (!(sc->ex_conf & EX_CONF_90XB) || ifp->if_flags & IFF_ALLMULTI) { 720 mask |= (ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0; 721 } else { 722 ETHER_FIRST_MULTI(estep, ec, enm); 723 while (enm != NULL) { 724 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 725 ETHER_ADDR_LEN) != 0) 726 goto out; 727 i = ex_mchash(enm->enm_addrlo); 728 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 729 ELINK_COMMAND, ELINK_SETHASHFILBIT | i); 730 ETHER_NEXT_MULTI(estep, enm); 731 } 732 mask |= FIL_MULTIHASH; 733 } 734 out: 735 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 736 SET_RX_FILTER | mask); 737 } 738 739 740 static void 741 ex_txstat(sc) 742 struct ex_softc *sc; 743 { 744 bus_space_tag_t iot = sc->sc_iot; 745 bus_space_handle_t ioh = sc->sc_ioh; 746 int i; 747 748 /* 749 * We need to read+write TX_STATUS until we get a 0 status 750 * in order to turn off the interrupt flag. 751 */ 752 while ((i = bus_space_read_1(iot, ioh, ELINK_TXSTATUS)) & TXS_COMPLETE) { 753 bus_space_write_1(iot, ioh, ELINK_TXSTATUS, 0x0); 754 755 if (i & TXS_JABBER) { 756 ++sc->sc_ethercom.ec_if.if_oerrors; 757 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 758 printf("%s: jabber (%x)\n", 759 sc->sc_dev.dv_xname, i); 760 ex_init(sc); 761 /* TODO: be more subtle here */ 762 } else if (i & TXS_UNDERRUN) { 763 ++sc->sc_ethercom.ec_if.if_oerrors; 764 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 765 printf("%s: fifo underrun (%x) @%d\n", 766 sc->sc_dev.dv_xname, i, 767 sc->tx_start_thresh); 768 if (sc->tx_succ_ok < 100) 769 sc->tx_start_thresh = min(ETHER_MAX_LEN, 770 sc->tx_start_thresh + 20); 771 sc->tx_succ_ok = 0; 772 ex_init(sc); 773 /* TODO: be more subtle here */ 774 } else if (i & TXS_MAX_COLLISION) { 775 ++sc->sc_ethercom.ec_if.if_collisions; 776 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 777 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 778 } else 779 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 780 } 781 } 782 783 int 784 ex_media_chg(ifp) 785 struct ifnet *ifp; 786 { 787 struct ex_softc *sc = ifp->if_softc; 788 789 if (ifp->if_flags & IFF_UP) 790 ex_init(sc); 791 return 0; 792 } 793 794 void 795 ex_set_media(sc) 796 struct ex_softc *sc; 797 { 798 bus_space_tag_t iot = sc->sc_iot; 799 bus_space_handle_t ioh = sc->sc_ioh; 800 int config0, config1; 801 802 if (((sc->ex_conf & EX_CONF_MII) && 803 (sc->ex_mii.mii_media_active & IFM_FDX)) 804 || (!(sc->ex_conf & EX_CONF_MII) && 805 (sc->ex_mii.mii_media.ifm_media & IFM_FDX))) { 806 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 807 MAC_CONTROL_FDX); 808 } else { 809 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 0); 810 } 811 812 /* 813 * If the device has MII, select it, and then tell the 814 * PHY which media to use. 815 */ 816 if (sc->ex_conf & EX_CONF_MII) { 817 GO_WINDOW(3); 818 819 config0 = (u_int)bus_space_read_2(iot, ioh, 820 ELINK_W3_INTERNAL_CONFIG); 821 config1 = (u_int)bus_space_read_2(iot, ioh, 822 ELINK_W3_INTERNAL_CONFIG + 2); 823 824 config1 = config1 & ~CONFIG_MEDIAMASK; 825 config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT); 826 827 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 828 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, config1); 829 mii_mediachg(&sc->ex_mii); 830 return; 831 } 832 833 GO_WINDOW(4); 834 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0); 835 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 836 delay(800); 837 838 /* 839 * Now turn on the selected media/transceiver. 840 */ 841 switch (IFM_SUBTYPE(sc->ex_mii.mii_media.ifm_cur->ifm_media)) { 842 case IFM_10_T: 843 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 844 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 845 break; 846 847 case IFM_10_2: 848 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 849 DELAY(800); 850 break; 851 852 case IFM_100_TX: 853 case IFM_100_FX: 854 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 855 LINKBEAT_ENABLE); 856 DELAY(800); 857 break; 858 859 case IFM_10_5: 860 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 861 SQE_ENABLE); 862 DELAY(800); 863 break; 864 865 case IFM_MANUAL: 866 break; 867 868 case IFM_NONE: 869 return; 870 871 default: 872 panic("ex_set_media: impossible"); 873 } 874 875 GO_WINDOW(3); 876 config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 877 config1 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2); 878 879 config1 = config1 & ~CONFIG_MEDIAMASK; 880 config1 |= (sc->ex_mii.mii_media.ifm_cur->ifm_data << 881 CONFIG_MEDIAMASK_SHIFT); 882 883 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 884 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, config1); 885 } 886 887 /* 888 * Get currently-selected media from card. 889 * (if_media callback, may be called before interface is brought up). 890 */ 891 void 892 ex_media_stat(ifp, req) 893 struct ifnet *ifp; 894 struct ifmediareq *req; 895 { 896 struct ex_softc *sc = ifp->if_softc; 897 898 if (sc->ex_conf & EX_CONF_MII) { 899 mii_pollstat(&sc->ex_mii); 900 req->ifm_status = sc->ex_mii.mii_media_status; 901 req->ifm_active = sc->ex_mii.mii_media_active; 902 } else { 903 GO_WINDOW(4); 904 req->ifm_status = IFM_AVALID; 905 req->ifm_active = sc->ex_mii.mii_media.ifm_cur->ifm_media; 906 if (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 907 ELINK_W4_MEDIA_TYPE) & LINKBEAT_DETECT) 908 req->ifm_status |= IFM_ACTIVE; 909 GO_WINDOW(1); 910 } 911 } 912 913 914 915 /* 916 * Start outputting on the interface. 917 */ 918 static void 919 ex_start(ifp) 920 struct ifnet *ifp; 921 { 922 struct ex_softc *sc = ifp->if_softc; 923 bus_space_tag_t iot = sc->sc_iot; 924 bus_space_handle_t ioh = sc->sc_ioh; 925 volatile struct ex_fraghdr *fr = NULL; 926 volatile struct ex_dpd *dpd = NULL, *prevdpd = NULL; 927 struct ex_txdesc *txp; 928 bus_dmamap_t dmamap; 929 int offset, totlen; 930 931 if (sc->tx_head || sc->tx_free == NULL) 932 return; 933 934 txp = NULL; 935 936 /* 937 * We're finished if there is nothing more to add to the list or if 938 * we're all filled up with buffers to transmit. 939 */ 940 while (ifp->if_snd.ifq_head != NULL && sc->tx_free != NULL) { 941 struct mbuf *mb_head; 942 int segment, error; 943 944 /* 945 * Grab a packet to transmit. 946 */ 947 IF_DEQUEUE(&ifp->if_snd, mb_head); 948 949 /* 950 * Get pointer to next available tx desc. 951 */ 952 txp = sc->tx_free; 953 sc->tx_free = txp->tx_next; 954 txp->tx_next = NULL; 955 dmamap = txp->tx_dmamap; 956 957 /* 958 * Go through each of the mbufs in the chain and initialize 959 * the transmit buffer descriptors with the physical address 960 * and size of the mbuf. 961 */ 962 reload: 963 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 964 mb_head, BUS_DMA_NOWAIT); 965 switch (error) { 966 case 0: 967 /* Success. */ 968 break; 969 970 case EFBIG: 971 { 972 struct mbuf *mn; 973 974 /* 975 * We ran out of segments. We have to recopy this 976 * mbuf chain first. Bail out if we can't get the 977 * new buffers. 978 */ 979 printf("%s: too many segments, ", sc->sc_dev.dv_xname); 980 981 MGETHDR(mn, M_DONTWAIT, MT_DATA); 982 if (mn == NULL) { 983 m_freem(mb_head); 984 printf("aborting\n"); 985 goto out; 986 } 987 if (mb_head->m_pkthdr.len > MHLEN) { 988 MCLGET(mn, M_DONTWAIT); 989 if ((mn->m_flags & M_EXT) == 0) { 990 m_freem(mn); 991 m_freem(mb_head); 992 printf("aborting\n"); 993 goto out; 994 } 995 } 996 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, 997 mtod(mn, caddr_t)); 998 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; 999 m_freem(mb_head); 1000 mb_head = mn; 1001 printf("retrying\n"); 1002 goto reload; 1003 } 1004 1005 default: 1006 /* 1007 * Some other problem; report it. 1008 */ 1009 printf("%s: can't load mbuf chain, error = %d\n", 1010 sc->sc_dev.dv_xname, error); 1011 m_freem(mb_head); 1012 goto out; 1013 } 1014 1015 fr = &txp->tx_dpd->dpd_frags[0]; 1016 totlen = 0; 1017 for (segment = 0; segment < dmamap->dm_nsegs; segment++, fr++) { 1018 fr->fr_addr = htole32(dmamap->dm_segs[segment].ds_addr); 1019 fr->fr_len = htole32(dmamap->dm_segs[segment].ds_len); 1020 totlen += dmamap->dm_segs[segment].ds_len; 1021 } 1022 fr--; 1023 fr->fr_len |= htole32(EX_FR_LAST); 1024 txp->tx_mbhead = mb_head; 1025 1026 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 1027 BUS_DMASYNC_PREWRITE); 1028 1029 dpd = txp->tx_dpd; 1030 dpd->dpd_nextptr = 0; 1031 dpd->dpd_fsh = htole32(totlen); 1032 1033 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1034 ((caddr_t)dpd - (caddr_t)sc->sc_dpd), 1035 sizeof (struct ex_dpd), 1036 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1037 1038 /* 1039 * No need to stall the download engine, we know it's 1040 * not busy right now. 1041 * 1042 * Fix up pointers in both the "soft" tx and the physical 1043 * tx list. 1044 */ 1045 if (sc->tx_head != NULL) { 1046 prevdpd = sc->tx_tail->tx_dpd; 1047 offset = ((caddr_t)prevdpd - (caddr_t)sc->sc_dpd); 1048 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1049 offset, sizeof (struct ex_dpd), 1050 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1051 prevdpd->dpd_nextptr = htole32(DPD_DMADDR(sc, txp)); 1052 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1053 offset, sizeof (struct ex_dpd), 1054 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1055 sc->tx_tail->tx_next = txp; 1056 sc->tx_tail = txp; 1057 } else { 1058 sc->tx_tail = sc->tx_head = txp; 1059 } 1060 1061 #if NBPFILTER > 0 1062 /* 1063 * Pass packet to bpf if there is a listener. 1064 */ 1065 if (ifp->if_bpf) 1066 bpf_mtap(ifp->if_bpf, mb_head); 1067 #endif 1068 } 1069 out: 1070 if (sc->tx_head) { 1071 sc->tx_tail->tx_dpd->dpd_fsh |= htole32(EX_DPD_DNIND); 1072 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1073 ((caddr_t)sc->tx_tail->tx_dpd - (caddr_t)sc->sc_dpd), 1074 sizeof (struct ex_dpd), 1075 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1076 ifp->if_flags |= IFF_OACTIVE; 1077 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_DNUNSTALL); 1078 bus_space_write_4(iot, ioh, ELINK_DNLISTPTR, 1079 DPD_DMADDR(sc, sc->tx_head)); 1080 1081 /* trigger watchdog */ 1082 ifp->if_timer = 5; 1083 } 1084 } 1085 1086 1087 int 1088 ex_intr(arg) 1089 void *arg; 1090 { 1091 struct ex_softc *sc = arg; 1092 bus_space_tag_t iot = sc->sc_iot; 1093 bus_space_handle_t ioh = sc->sc_ioh; 1094 u_int16_t stat; 1095 int ret = 0; 1096 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1097 1098 if (sc->enabled == 0 || 1099 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1100 return (0); 1101 1102 for (;;) { 1103 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1104 1105 stat = bus_space_read_2(iot, ioh, ELINK_STATUS); 1106 1107 if ((stat & S_MASK) == 0) { 1108 if ((stat & S_INTR_LATCH) == 0) { 1109 #if 0 1110 printf("%s: intr latch cleared\n", 1111 sc->sc_dev.dv_xname); 1112 #endif 1113 break; 1114 } 1115 } 1116 1117 ret = 1; 1118 1119 /* 1120 * Acknowledge interrupts. 1121 */ 1122 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1123 (stat & S_MASK)); 1124 if (sc->intr_ack) 1125 (*sc->intr_ack)(sc); 1126 1127 if (stat & S_HOST_ERROR) { 1128 printf("%s: adapter failure (%x)\n", 1129 sc->sc_dev.dv_xname, stat); 1130 ex_reset(sc); 1131 ex_init(sc); 1132 return 1; 1133 } 1134 if (stat & S_TX_COMPLETE) { 1135 ex_txstat(sc); 1136 } 1137 if (stat & S_UPD_STATS) { 1138 ex_getstats(sc); 1139 } 1140 if (stat & S_DN_COMPLETE) { 1141 struct ex_txdesc *txp, *ptxp = NULL; 1142 bus_dmamap_t txmap; 1143 1144 /* reset watchdog timer, was set in ex_start() */ 1145 ifp->if_timer = 0; 1146 1147 for (txp = sc->tx_head; txp != NULL; 1148 txp = txp->tx_next) { 1149 bus_dmamap_sync(sc->sc_dmat, 1150 sc->sc_dpd_dmamap, 1151 (caddr_t)txp->tx_dpd - (caddr_t)sc->sc_dpd, 1152 sizeof (struct ex_dpd), 1153 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1154 if (txp->tx_mbhead != NULL) { 1155 txmap = txp->tx_dmamap; 1156 bus_dmamap_sync(sc->sc_dmat, txmap, 1157 0, txmap->dm_mapsize, 1158 BUS_DMASYNC_POSTWRITE); 1159 bus_dmamap_unload(sc->sc_dmat, txmap); 1160 m_freem(txp->tx_mbhead); 1161 txp->tx_mbhead = NULL; 1162 } 1163 ptxp = txp; 1164 } 1165 1166 /* 1167 * Move finished tx buffers back to the tx free list. 1168 */ 1169 if (sc->tx_free) { 1170 sc->tx_ftail->tx_next = sc->tx_head; 1171 sc->tx_ftail = ptxp; 1172 } else 1173 sc->tx_ftail = sc->tx_free = sc->tx_head; 1174 1175 sc->tx_head = sc->tx_tail = NULL; 1176 ifp->if_flags &= ~IFF_OACTIVE; 1177 } 1178 1179 if (stat & S_UP_COMPLETE) { 1180 struct ex_rxdesc *rxd; 1181 struct mbuf *m; 1182 struct ex_upd *upd; 1183 bus_dmamap_t rxmap; 1184 u_int32_t pktstat; 1185 1186 rcvloop: 1187 rxd = sc->rx_head; 1188 rxmap = rxd->rx_dmamap; 1189 m = rxd->rx_mbhead; 1190 upd = rxd->rx_upd; 1191 pktstat = le32toh(upd->upd_pktstatus); 1192 1193 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, 1194 rxmap->dm_mapsize, 1195 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1196 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1197 ((caddr_t)upd - (caddr_t)sc->sc_upd), 1198 sizeof (struct ex_upd), 1199 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1200 1201 if (pktstat & EX_UPD_COMPLETE) { 1202 /* 1203 * Remove first packet from the chain. 1204 */ 1205 sc->rx_head = rxd->rx_next; 1206 rxd->rx_next = NULL; 1207 1208 /* 1209 * Add a new buffer to the receive chain. 1210 * If this fails, the old buffer is recycled 1211 * instead. 1212 */ 1213 if (ex_add_rxbuf(sc, rxd) == 0) { 1214 struct ether_header *eh; 1215 u_int16_t total_len; 1216 1217 1218 if (pktstat & EX_UPD_ERR) { 1219 ifp->if_ierrors++; 1220 m_freem(m); 1221 goto rcvloop; 1222 } 1223 1224 total_len = pktstat & EX_UPD_PKTLENMASK; 1225 if (total_len < 1226 sizeof(struct ether_header)) { 1227 m_freem(m); 1228 goto rcvloop; 1229 } 1230 m->m_pkthdr.rcvif = ifp; 1231 m->m_pkthdr.len = m->m_len = total_len; 1232 eh = mtod(m, struct ether_header *); 1233 #if NBPFILTER > 0 1234 if (ifp->if_bpf) { 1235 bpf_tap(ifp->if_bpf, 1236 mtod(m, caddr_t), 1237 total_len); 1238 /* 1239 * Only pass this packet up 1240 * if it is for us. 1241 */ 1242 if ((ifp->if_flags & 1243 IFF_PROMISC) && 1244 (eh->ether_dhost[0] & 1) 1245 == 0 && 1246 bcmp(eh->ether_dhost, 1247 LLADDR(ifp->if_sadl), 1248 sizeof(eh->ether_dhost)) 1249 != 0) { 1250 m_freem(m); 1251 goto rcvloop; 1252 } 1253 } 1254 #endif /* NBPFILTER > 0 */ 1255 (*ifp->if_input)(ifp, m); 1256 } 1257 goto rcvloop; 1258 } 1259 /* 1260 * Just in case we filled up all UPDs and the DMA engine 1261 * stalled. We could be more subtle about this. 1262 */ 1263 if (bus_space_read_4(iot, ioh, ELINK_UPLISTPTR) == 0) { 1264 printf("%s: uplistptr was 0\n", 1265 sc->sc_dev.dv_xname); 1266 ex_init(sc); 1267 } else if (bus_space_read_4(iot, ioh, ELINK_UPPKTSTATUS) 1268 & 0x2000) { 1269 printf("%s: receive stalled\n", 1270 sc->sc_dev.dv_xname); 1271 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1272 ELINK_UPUNSTALL); 1273 } 1274 } 1275 } 1276 1277 /* no more interrupts */ 1278 if (ret && ifp->if_snd.ifq_head) 1279 ex_start(ifp); 1280 return ret; 1281 } 1282 1283 int 1284 ex_ioctl(ifp, cmd, data) 1285 register struct ifnet *ifp; 1286 u_long cmd; 1287 caddr_t data; 1288 { 1289 struct ex_softc *sc = ifp->if_softc; 1290 struct ifaddr *ifa = (struct ifaddr *)data; 1291 struct ifreq *ifr = (struct ifreq *)data; 1292 int s, error = 0; 1293 1294 s = splnet(); 1295 1296 switch (cmd) { 1297 1298 case SIOCSIFADDR: 1299 ifp->if_flags |= IFF_UP; 1300 switch (ifa->ifa_addr->sa_family) { 1301 #ifdef INET 1302 case AF_INET: 1303 ex_init(sc); 1304 arp_ifinit(&sc->sc_ethercom.ec_if, ifa); 1305 break; 1306 #endif 1307 #ifdef NS 1308 case AF_NS: 1309 { 1310 register struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1311 1312 if (ns_nullhost(*ina)) 1313 ina->x_host = *(union ns_host *) 1314 LLADDR(ifp->if_sadl); 1315 else 1316 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl), 1317 ifp->if_addrlen); 1318 /* Set new address. */ 1319 ex_init(sc); 1320 break; 1321 } 1322 #endif 1323 default: 1324 ex_init(sc); 1325 break; 1326 } 1327 break; 1328 case SIOCSIFMEDIA: 1329 case SIOCGIFMEDIA: 1330 error = ifmedia_ioctl(ifp, ifr, &sc->ex_mii.mii_media, cmd); 1331 break; 1332 1333 case SIOCSIFFLAGS: 1334 if ((ifp->if_flags & IFF_UP) == 0 && 1335 (ifp->if_flags & IFF_RUNNING) != 0) { 1336 /* 1337 * If interface is marked down and it is running, then 1338 * stop it. 1339 */ 1340 ex_stop(sc); 1341 ifp->if_flags &= ~IFF_RUNNING; 1342 } else if ((ifp->if_flags & IFF_UP) != 0 && 1343 (ifp->if_flags & IFF_RUNNING) == 0) { 1344 /* 1345 * If interface is marked up and it is stopped, then 1346 * start it. 1347 */ 1348 ex_init(sc); 1349 } else if ((ifp->if_flags & IFF_UP) != 0) { 1350 /* 1351 * Deal with other flags that change hardware 1352 * state, i.e. IFF_PROMISC. 1353 */ 1354 ex_set_mc(sc); 1355 } 1356 break; 1357 1358 case SIOCADDMULTI: 1359 case SIOCDELMULTI: 1360 error = (cmd == SIOCADDMULTI) ? 1361 ether_addmulti(ifr, &sc->sc_ethercom) : 1362 ether_delmulti(ifr, &sc->sc_ethercom); 1363 1364 if (error == ENETRESET) { 1365 /* 1366 * Multicast list has changed; set the hardware filter 1367 * accordingly. 1368 */ 1369 ex_set_mc(sc); 1370 error = 0; 1371 } 1372 break; 1373 1374 default: 1375 error = EINVAL; 1376 break; 1377 } 1378 1379 splx(s); 1380 return (error); 1381 } 1382 1383 void 1384 ex_getstats(sc) 1385 struct ex_softc *sc; 1386 { 1387 bus_space_handle_t ioh = sc->sc_ioh; 1388 bus_space_tag_t iot = sc->sc_iot; 1389 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1390 u_int8_t upperok; 1391 1392 GO_WINDOW(6); 1393 upperok = bus_space_read_1(iot, ioh, UPPER_FRAMES_OK); 1394 ifp->if_ipackets += bus_space_read_1(iot, ioh, RX_FRAMES_OK); 1395 ifp->if_ipackets += (upperok & 0x03) << 8; 1396 ifp->if_opackets += bus_space_read_1(iot, ioh, TX_FRAMES_OK); 1397 ifp->if_opackets += (upperok & 0x30) << 4; 1398 ifp->if_ierrors += bus_space_read_1(iot, ioh, RX_OVERRUNS); 1399 ifp->if_collisions += bus_space_read_1(iot, ioh, TX_COLLISIONS); 1400 /* 1401 * There seems to be no way to get the exact number of collisions, 1402 * this is the number that occured at the very least. 1403 */ 1404 ifp->if_collisions += 2 * bus_space_read_1(iot, ioh, 1405 TX_AFTER_X_COLLISIONS); 1406 ifp->if_ibytes += bus_space_read_2(iot, ioh, RX_TOTAL_OK); 1407 ifp->if_obytes += bus_space_read_2(iot, ioh, TX_TOTAL_OK); 1408 1409 /* 1410 * Clear the following to avoid stats overflow interrupts 1411 */ 1412 bus_space_read_1(iot, ioh, TX_DEFERRALS); 1413 bus_space_read_1(iot, ioh, TX_AFTER_1_COLLISION); 1414 bus_space_read_1(iot, ioh, TX_NO_SQE); 1415 bus_space_read_1(iot, ioh, TX_CD_LOST); 1416 GO_WINDOW(4); 1417 bus_space_read_1(iot, ioh, ELINK_W4_BADSSD); 1418 upperok = bus_space_read_1(iot, ioh, ELINK_W4_UBYTESOK); 1419 ifp->if_ibytes += (upperok & 0x0f) << 16; 1420 ifp->if_obytes += (upperok & 0xf0) << 12; 1421 GO_WINDOW(1); 1422 } 1423 1424 void 1425 ex_printstats(sc) 1426 struct ex_softc *sc; 1427 { 1428 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1429 1430 ex_getstats(sc); 1431 printf("in %llu out %llu ierror %llu oerror %llu ibytes %llu obytes " 1432 "%llu\n", (unsigned long long)ifp->if_ipackets, 1433 (unsigned long long)ifp->if_opackets, 1434 (unsigned long long)ifp->if_ierrors, 1435 (unsigned long long)ifp->if_oerrors, 1436 (unsigned long long)ifp->if_ibytes, 1437 (unsigned long long)ifp->if_obytes); 1438 } 1439 1440 void 1441 ex_tick(arg) 1442 void *arg; 1443 { 1444 struct ex_softc *sc = arg; 1445 int s; 1446 1447 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1448 return; 1449 1450 s = splnet(); 1451 1452 if (sc->ex_conf & EX_CONF_MII) 1453 mii_tick(&sc->ex_mii); 1454 1455 if (!(bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, ELINK_STATUS) 1456 & S_COMMAND_IN_PROGRESS)) 1457 ex_getstats(sc); 1458 1459 splx(s); 1460 1461 timeout(ex_tick, sc, hz); 1462 } 1463 1464 void 1465 ex_reset(sc) 1466 struct ex_softc *sc; 1467 { 1468 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, GLOBAL_RESET); 1469 delay(400); 1470 ex_waitcmd(sc); 1471 } 1472 1473 void 1474 ex_watchdog(ifp) 1475 struct ifnet *ifp; 1476 { 1477 struct ex_softc *sc = ifp->if_softc; 1478 1479 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1480 ++sc->sc_ethercom.ec_if.if_oerrors; 1481 1482 ex_reset(sc); 1483 ex_init(sc); 1484 } 1485 1486 void 1487 ex_stop(sc) 1488 struct ex_softc *sc; 1489 { 1490 bus_space_tag_t iot = sc->sc_iot; 1491 bus_space_handle_t ioh = sc->sc_ioh; 1492 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1493 struct ex_txdesc *tx; 1494 struct ex_rxdesc *rx; 1495 int i; 1496 1497 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1498 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1499 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1500 1501 for (tx = sc->tx_head ; tx != NULL; tx = tx->tx_next) { 1502 if (tx->tx_mbhead == NULL) 1503 continue; 1504 m_freem(tx->tx_mbhead); 1505 tx->tx_mbhead = NULL; 1506 bus_dmamap_unload(sc->sc_dmat, tx->tx_dmamap); 1507 tx->tx_dpd->dpd_fsh = tx->tx_dpd->dpd_nextptr = 0; 1508 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1509 ((caddr_t)tx->tx_dpd - (caddr_t)sc->sc_dpd), 1510 sizeof (struct ex_dpd), 1511 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1512 } 1513 sc->tx_tail = sc->tx_head = NULL; 1514 ex_init_txdescs(sc); 1515 1516 sc->rx_tail = sc->rx_head = 0; 1517 for (i = 0; i < EX_NUPD; i++) { 1518 rx = &sc->sc_rxdescs[i]; 1519 if (rx->rx_mbhead != NULL) { 1520 bus_dmamap_unload(sc->sc_dmat, rx->rx_dmamap); 1521 m_freem(rx->rx_mbhead); 1522 rx->rx_mbhead = NULL; 1523 } 1524 ex_add_rxbuf(sc, rx); 1525 } 1526 1527 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1528 1529 untimeout(ex_tick, sc); 1530 if (sc->ex_conf & EX_CONF_MII) 1531 mii_down(&sc->ex_mii); 1532 1533 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1534 ifp->if_timer = 0; 1535 } 1536 1537 static void 1538 ex_init_txdescs(sc) 1539 struct ex_softc *sc; 1540 { 1541 int i; 1542 1543 for (i = 0; i < EX_NDPD; i++) { 1544 sc->sc_txdescs[i].tx_dmamap = sc->sc_tx_dmamaps[i]; 1545 sc->sc_txdescs[i].tx_dpd = &sc->sc_dpd[i]; 1546 if (i < EX_NDPD - 1) 1547 sc->sc_txdescs[i].tx_next = &sc->sc_txdescs[i + 1]; 1548 else 1549 sc->sc_txdescs[i].tx_next = NULL; 1550 } 1551 sc->tx_free = &sc->sc_txdescs[0]; 1552 sc->tx_ftail = &sc->sc_txdescs[EX_NDPD-1]; 1553 } 1554 1555 1556 int 1557 ex_activate(self, act) 1558 struct device *self; 1559 enum devact act; 1560 { 1561 struct ex_softc *sc = (void *) self; 1562 int s, error = 0; 1563 1564 s = splnet(); 1565 switch (act) { 1566 case DVACT_ACTIVATE: 1567 error = EOPNOTSUPP; 1568 break; 1569 1570 case DVACT_DEACTIVATE: 1571 if (sc->ex_conf & EX_CONF_MII) 1572 mii_activate(&sc->ex_mii, act, MII_PHY_ANY, 1573 MII_OFFSET_ANY); 1574 if_deactivate(&sc->sc_ethercom.ec_if); 1575 break; 1576 } 1577 splx(s); 1578 1579 return (error); 1580 } 1581 1582 int 1583 ex_detach(sc) 1584 struct ex_softc *sc; 1585 { 1586 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1587 struct ex_rxdesc *rxd; 1588 int i; 1589 1590 /* Unhook our tick handler. */ 1591 untimeout(ex_tick, sc); 1592 1593 if (sc->ex_conf & EX_CONF_MII) { 1594 /* Detach all PHYs */ 1595 mii_detach(&sc->ex_mii, MII_PHY_ANY, MII_OFFSET_ANY); 1596 } 1597 1598 /* Delete all remaining media. */ 1599 ifmedia_delete_instance(&sc->ex_mii.mii_media, IFM_INST_ANY); 1600 1601 #if NRND > 0 1602 rnd_detach_source(&sc->rnd_source); 1603 #endif 1604 #if NBPFILTER > 0 1605 bpfdetach(ifp); 1606 #endif 1607 ether_ifdetach(ifp); 1608 if_detach(ifp); 1609 1610 for (i = 0; i < EX_NUPD; i++) { 1611 rxd = &sc->sc_rxdescs[i]; 1612 if (rxd->rx_mbhead != NULL) { 1613 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap); 1614 m_freem(rxd->rx_mbhead); 1615 rxd->rx_mbhead = NULL; 1616 } 1617 } 1618 for (i = 0; i < EX_NUPD; i++) 1619 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]); 1620 for (i = 0; i < EX_NDPD; i++) 1621 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]); 1622 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap); 1623 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap); 1624 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd, 1625 EX_NDPD * sizeof (struct ex_dpd)); 1626 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg); 1627 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap); 1628 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap); 1629 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd, 1630 EX_NUPD * sizeof (struct ex_upd)); 1631 bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg); 1632 1633 shutdownhook_disestablish(sc->sc_sdhook); 1634 1635 return (0); 1636 } 1637 1638 /* 1639 * Before reboots, reset card completely. 1640 */ 1641 static void 1642 ex_shutdown(arg) 1643 void *arg; 1644 { 1645 register struct ex_softc *sc = arg; 1646 1647 ex_stop(sc); 1648 } 1649 1650 /* 1651 * Read EEPROM data. 1652 * XXX what to do if EEPROM doesn't unbusy? 1653 */ 1654 u_int16_t 1655 ex_read_eeprom(sc, offset) 1656 struct ex_softc *sc; 1657 int offset; 1658 { 1659 bus_space_tag_t iot = sc->sc_iot; 1660 bus_space_handle_t ioh = sc->sc_ioh; 1661 u_int16_t data = 0; 1662 1663 GO_WINDOW(0); 1664 if (ex_eeprom_busy(sc)) 1665 goto out; 1666 switch (sc->ex_bustype) { 1667 case EX_BUS_PCI: 1668 bus_space_write_1(iot, ioh, ELINK_W0_EEPROM_COMMAND, 1669 READ_EEPROM | (offset & 0x3f)); 1670 break; 1671 case EX_BUS_CARDBUS: 1672 bus_space_write_2(iot, ioh, ELINK_W0_EEPROM_COMMAND, 1673 0x230 + (offset & 0x3f)); 1674 break; 1675 } 1676 if (ex_eeprom_busy(sc)) 1677 goto out; 1678 data = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_DATA); 1679 out: 1680 return data; 1681 } 1682 1683 static int 1684 ex_eeprom_busy(sc) 1685 struct ex_softc *sc; 1686 { 1687 bus_space_tag_t iot = sc->sc_iot; 1688 bus_space_handle_t ioh = sc->sc_ioh; 1689 int i = 100; 1690 1691 while (i--) { 1692 if (!(bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND) & 1693 EEPROM_BUSY)) 1694 return 0; 1695 delay(100); 1696 } 1697 printf("\n%s: eeprom stays busy.\n", sc->sc_dev.dv_xname); 1698 return (1); 1699 } 1700 1701 /* 1702 * Create a new rx buffer and add it to the 'soft' rx list. 1703 */ 1704 static int 1705 ex_add_rxbuf(sc, rxd) 1706 struct ex_softc *sc; 1707 struct ex_rxdesc *rxd; 1708 { 1709 struct mbuf *m, *oldm; 1710 bus_dmamap_t rxmap; 1711 int error, rval = 0; 1712 1713 oldm = rxd->rx_mbhead; 1714 rxmap = rxd->rx_dmamap; 1715 1716 MGETHDR(m, M_DONTWAIT, MT_DATA); 1717 if (m != NULL) { 1718 MCLGET(m, M_DONTWAIT); 1719 if ((m->m_flags & M_EXT) == 0) { 1720 m_freem(m); 1721 if (oldm == NULL) 1722 return 1; 1723 m = oldm; 1724 m->m_data = m->m_ext.ext_buf; 1725 rval = 1; 1726 } 1727 } else { 1728 if (oldm == NULL) 1729 return 1; 1730 m = oldm; 1731 m->m_data = m->m_ext.ext_buf; 1732 rval = 1; 1733 } 1734 1735 /* 1736 * Setup the DMA map for this receive buffer. 1737 */ 1738 if (m != oldm) { 1739 if (oldm != NULL) 1740 bus_dmamap_unload(sc->sc_dmat, rxmap); 1741 error = bus_dmamap_load(sc->sc_dmat, rxmap, 1742 m->m_ext.ext_buf, MCLBYTES, NULL, BUS_DMA_NOWAIT); 1743 if (error) { 1744 printf("%s: can't load rx buffer, error = %d\n", 1745 sc->sc_dev.dv_xname, error); 1746 panic("ex_add_rxbuf"); /* XXX */ 1747 } 1748 } 1749 1750 /* 1751 * Align for data after 14 byte header. 1752 */ 1753 m->m_data += 2; 1754 1755 rxd->rx_mbhead = m; 1756 rxd->rx_upd->upd_pktstatus = htole32(MCLBYTES - 2); 1757 rxd->rx_upd->upd_frags[0].fr_addr = 1758 htole32(rxmap->dm_segs[0].ds_addr + 2); 1759 rxd->rx_upd->upd_nextptr = 0; 1760 1761 /* 1762 * Attach it to the end of the list. 1763 */ 1764 if (sc->rx_head != NULL) { 1765 sc->rx_tail->rx_next = rxd; 1766 sc->rx_tail->rx_upd->upd_nextptr = htole32(sc->sc_upddma + 1767 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd)); 1768 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1769 (caddr_t)sc->rx_tail->rx_upd - (caddr_t)sc->sc_upd, 1770 sizeof (struct ex_upd), 1771 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1772 } else { 1773 sc->rx_head = rxd; 1774 } 1775 sc->rx_tail = rxd; 1776 1777 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, rxmap->dm_mapsize, 1778 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1779 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1780 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd), 1781 sizeof (struct ex_upd), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1782 return (rval); 1783 } 1784 1785 u_int32_t 1786 ex_mii_bitbang_read(self) 1787 struct device *self; 1788 { 1789 struct ex_softc *sc = (void *) self; 1790 1791 /* We're already in Window 4. */ 1792 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT)); 1793 } 1794 1795 void 1796 ex_mii_bitbang_write(self, val) 1797 struct device *self; 1798 u_int32_t val; 1799 { 1800 struct ex_softc *sc = (void *) self; 1801 1802 /* We're already in Window 4. */ 1803 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT, val); 1804 } 1805 1806 int 1807 ex_mii_readreg(v, phy, reg) 1808 struct device *v; 1809 int phy, reg; 1810 { 1811 struct ex_softc *sc = (struct ex_softc *)v; 1812 int val; 1813 1814 if ((sc->ex_conf & EX_CONF_INTPHY) && phy != ELINK_INTPHY_ID) 1815 return 0; 1816 1817 GO_WINDOW(4); 1818 1819 val = mii_bitbang_readreg(v, &ex_mii_bitbang_ops, phy, reg); 1820 1821 GO_WINDOW(1); 1822 1823 return (val); 1824 } 1825 1826 void 1827 ex_mii_writereg(v, phy, reg, data) 1828 struct device *v; 1829 int phy; 1830 int reg; 1831 int data; 1832 { 1833 struct ex_softc *sc = (struct ex_softc *)v; 1834 1835 GO_WINDOW(4); 1836 1837 mii_bitbang_writereg(v, &ex_mii_bitbang_ops, phy, reg, data); 1838 1839 GO_WINDOW(1); 1840 } 1841 1842 void 1843 ex_mii_statchg(v) 1844 struct device *v; 1845 { 1846 struct ex_softc *sc = (struct ex_softc *)v; 1847 bus_space_tag_t iot = sc->sc_iot; 1848 bus_space_handle_t ioh = sc->sc_ioh; 1849 int mctl; 1850 1851 GO_WINDOW(3); 1852 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1853 if (sc->ex_mii.mii_media_active & IFM_FDX) 1854 mctl |= MAC_CONTROL_FDX; 1855 else 1856 mctl &= ~MAC_CONTROL_FDX; 1857 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1858 GO_WINDOW(1); /* back to operating window */ 1859 } 1860
Indexes created Mon Oct 27 20:09:55 GMT 2025