elinkxl.c revision 1.34.2.4
1 /* $NetBSD: elinkxl.c,v 1.34.2.4 2001/05/15 21:34:06 he Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Frank van der Linden. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include "opt_inet.h" 40 #include "opt_ns.h" 41 #include "bpfilter.h" 42 #include "rnd.h" 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/callout.h> 47 #include <sys/kernel.h> 48 #include <sys/mbuf.h> 49 #include <sys/socket.h> 50 #include <sys/ioctl.h> 51 #include <sys/errno.h> 52 #include <sys/syslog.h> 53 #include <sys/select.h> 54 #include <sys/device.h> 55 #if NRND > 0 56 #include <sys/rnd.h> 57 #endif 58 59 #include <net/if.h> 60 #include <net/if_dl.h> 61 #include <net/if_ether.h> 62 #include <net/if_media.h> 63 64 #ifdef INET 65 #include <netinet/in.h> 66 #include <netinet/in_systm.h> 67 #include <netinet/in_var.h> 68 #include <netinet/ip.h> 69 #include <netinet/if_inarp.h> 70 #endif 71 72 #ifdef NS 73 #include <netns/ns.h> 74 #include <netns/ns_if.h> 75 #endif 76 77 #if NBPFILTER > 0 78 #include <net/bpf.h> 79 #include <net/bpfdesc.h> 80 #endif 81 82 #include <machine/cpu.h> 83 #include <machine/bus.h> 84 #include <machine/intr.h> 85 #include <machine/endian.h> 86 87 #include <vm/vm.h> 88 #include <vm/pmap.h> 89 90 #include <dev/mii/miivar.h> 91 #include <dev/mii/mii.h> 92 #include <dev/mii/mii_bitbang.h> 93 94 #include <dev/ic/elink3reg.h> 95 /* #include <dev/ic/elink3var.h> */ 96 #include <dev/ic/elinkxlreg.h> 97 #include <dev/ic/elinkxlvar.h> 98 99 #ifdef DEBUG 100 int exdebug = 0; 101 #endif 102 103 /* ifmedia callbacks */ 104 int ex_media_chg __P((struct ifnet *ifp)); 105 void ex_media_stat __P((struct ifnet *ifp, struct ifmediareq *req)); 106 107 void ex_probe_media __P((struct ex_softc *)); 108 void ex_set_filter __P((struct ex_softc *)); 109 void ex_set_media __P((struct ex_softc *)); 110 struct mbuf *ex_get __P((struct ex_softc *, int)); 111 u_int16_t ex_read_eeprom __P((struct ex_softc *, int)); 112 void ex_init __P((struct ex_softc *)); 113 void ex_read __P((struct ex_softc *)); 114 void ex_reset __P((struct ex_softc *)); 115 void ex_set_mc __P((struct ex_softc *)); 116 void ex_getstats __P((struct ex_softc *)); 117 void ex_printstats __P((struct ex_softc *)); 118 void ex_tick __P((void *)); 119 120 static int ex_eeprom_busy __P((struct ex_softc *)); 121 static int ex_add_rxbuf __P((struct ex_softc *, struct ex_rxdesc *)); 122 static void ex_init_txdescs __P((struct ex_softc *)); 123 124 static void ex_shutdown __P((void *)); 125 static void ex_start __P((struct ifnet *)); 126 static void ex_txstat __P((struct ex_softc *)); 127 128 int ex_mii_readreg __P((struct device *, int, int)); 129 void ex_mii_writereg __P((struct device *, int, int, int)); 130 void ex_mii_statchg __P((struct device *)); 131 132 void ex_probemedia __P((struct ex_softc *)); 133 134 /* 135 * Structure to map media-present bits in boards to ifmedia codes and 136 * printable media names. Used for table-driven ifmedia initialization. 137 */ 138 struct ex_media { 139 int exm_mpbit; /* media present bit */ 140 const char *exm_name; /* name of medium */ 141 int exm_ifmedia; /* ifmedia word for medium */ 142 int exm_epmedia; /* ELINKMEDIA_* constant */ 143 }; 144 145 /* 146 * Media table for 3c90x chips. Note that chips with MII have no 147 * `native' media. 148 */ 149 struct ex_media ex_native_media[] = { 150 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 151 ELINKMEDIA_10BASE_T }, 152 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 153 ELINKMEDIA_10BASE_T }, 154 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 155 ELINKMEDIA_AUI }, 156 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 157 ELINKMEDIA_10BASE_2 }, 158 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 159 ELINKMEDIA_100BASE_TX }, 160 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 161 ELINKMEDIA_100BASE_TX }, 162 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 163 ELINKMEDIA_100BASE_FX }, 164 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 165 ELINKMEDIA_MII }, 166 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 167 ELINKMEDIA_100BASE_T4 }, 168 { 0, NULL, 0, 169 0 }, 170 }; 171 172 /* 173 * MII bit-bang glue. 174 */ 175 u_int32_t ex_mii_bitbang_read __P((struct device *)); 176 void ex_mii_bitbang_write __P((struct device *, u_int32_t)); 177 178 const struct mii_bitbang_ops ex_mii_bitbang_ops = { 179 ex_mii_bitbang_read, 180 ex_mii_bitbang_write, 181 { 182 ELINK_PHY_DATA, /* MII_BIT_MDO */ 183 ELINK_PHY_DATA, /* MII_BIT_MDI */ 184 ELINK_PHY_CLK, /* MII_BIT_MDC */ 185 ELINK_PHY_DIR, /* MII_BIT_DIR_HOST_PHY */ 186 0, /* MII_BIT_DIR_PHY_HOST */ 187 } 188 }; 189 190 /* 191 * Back-end attach and configure. 192 */ 193 void 194 ex_config(sc) 195 struct ex_softc *sc; 196 { 197 struct ifnet *ifp; 198 u_int16_t val; 199 u_int8_t macaddr[ETHER_ADDR_LEN] = {0}; 200 bus_space_tag_t iot = sc->sc_iot; 201 bus_space_handle_t ioh = sc->sc_ioh; 202 int i, error, attach_stage; 203 204 callout_init(&sc->ex_mii_callout); 205 206 ex_reset(sc); 207 208 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR0); 209 macaddr[0] = val >> 8; 210 macaddr[1] = val & 0xff; 211 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR1); 212 macaddr[2] = val >> 8; 213 macaddr[3] = val & 0xff; 214 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR2); 215 macaddr[4] = val >> 8; 216 macaddr[5] = val & 0xff; 217 218 printf("%s: MAC address %s\n", sc->sc_dev.dv_xname, 219 ether_sprintf(macaddr)); 220 221 if (sc->ex_conf & (EX_CONF_INV_LED_POLARITY|EX_CONF_PHY_POWER)) { 222 GO_WINDOW(2); 223 val = bus_space_read_2(iot, ioh, ELINK_W2_RESET_OPTIONS); 224 if (sc->ex_conf & EX_CONF_INV_LED_POLARITY) 225 val |= ELINK_RESET_OPT_LEDPOLAR; 226 if (sc->ex_conf & EX_CONF_PHY_POWER) 227 val |= ELINK_RESET_OPT_PHYPOWER; 228 bus_space_write_2(iot, ioh, ELINK_W2_RESET_OPTIONS, val); 229 } 230 231 attach_stage = 0; 232 233 /* 234 * Allocate the upload descriptors, and create and load the DMA 235 * map for them. 236 */ 237 if ((error = bus_dmamem_alloc(sc->sc_dmat, 238 EX_NUPD * sizeof (struct ex_upd), NBPG, 0, &sc->sc_useg, 1, 239 &sc->sc_urseg, BUS_DMA_NOWAIT)) != 0) { 240 printf("%s: can't allocate upload descriptors, error = %d\n", 241 sc->sc_dev.dv_xname, error); 242 goto fail; 243 } 244 245 attach_stage = 1; 246 247 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg, 248 EX_NUPD * sizeof (struct ex_upd), (caddr_t *)&sc->sc_upd, 249 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 250 printf("%s: can't map upload descriptors, error = %d\n", 251 sc->sc_dev.dv_xname, error); 252 goto fail; 253 } 254 255 attach_stage = 2; 256 257 if ((error = bus_dmamap_create(sc->sc_dmat, 258 EX_NUPD * sizeof (struct ex_upd), 1, 259 EX_NUPD * sizeof (struct ex_upd), 0, BUS_DMA_NOWAIT, 260 &sc->sc_upd_dmamap)) != 0) { 261 printf("%s: can't create upload desc. DMA map, error = %d\n", 262 sc->sc_dev.dv_xname, error); 263 goto fail; 264 } 265 266 attach_stage = 3; 267 268 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_upd_dmamap, 269 sc->sc_upd, EX_NUPD * sizeof (struct ex_upd), NULL, 270 BUS_DMA_NOWAIT)) != 0) { 271 printf("%s: can't load upload desc. DMA map, error = %d\n", 272 sc->sc_dev.dv_xname, error); 273 goto fail; 274 } 275 276 attach_stage = 4; 277 278 /* 279 * Allocate the download descriptors, and create and load the DMA 280 * map for them. 281 */ 282 if ((error = bus_dmamem_alloc(sc->sc_dmat, 283 EX_NDPD * sizeof (struct ex_dpd), NBPG, 0, &sc->sc_dseg, 1, 284 &sc->sc_drseg, BUS_DMA_NOWAIT)) != 0) { 285 printf("%s: can't allocate download descriptors, error = %d\n", 286 sc->sc_dev.dv_xname, error); 287 goto fail; 288 } 289 290 attach_stage = 5; 291 292 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg, 293 EX_NDPD * sizeof (struct ex_dpd), (caddr_t *)&sc->sc_dpd, 294 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 295 printf("%s: can't map download descriptors, error = %d\n", 296 sc->sc_dev.dv_xname, error); 297 goto fail; 298 } 299 bzero(sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd)); 300 301 attach_stage = 6; 302 303 if ((error = bus_dmamap_create(sc->sc_dmat, 304 EX_NDPD * sizeof (struct ex_dpd), 1, 305 EX_NDPD * sizeof (struct ex_dpd), 0, BUS_DMA_NOWAIT, 306 &sc->sc_dpd_dmamap)) != 0) { 307 printf("%s: can't create download desc. DMA map, error = %d\n", 308 sc->sc_dev.dv_xname, error); 309 goto fail; 310 } 311 312 attach_stage = 7; 313 314 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dpd_dmamap, 315 sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd), NULL, 316 BUS_DMA_NOWAIT)) != 0) { 317 printf("%s: can't load download desc. DMA map, error = %d\n", 318 sc->sc_dev.dv_xname, error); 319 goto fail; 320 } 321 322 attach_stage = 8; 323 324 325 /* 326 * Create the transmit buffer DMA maps. 327 */ 328 for (i = 0; i < EX_NDPD; i++) { 329 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 330 EX_NTFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 331 &sc->sc_tx_dmamaps[i])) != 0) { 332 printf("%s: can't create tx DMA map %d, error = %d\n", 333 sc->sc_dev.dv_xname, i, error); 334 goto fail; 335 } 336 } 337 338 attach_stage = 9; 339 340 /* 341 * Create the receive buffer DMA maps. 342 */ 343 for (i = 0; i < EX_NUPD; i++) { 344 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 345 EX_NRFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 346 &sc->sc_rx_dmamaps[i])) != 0) { 347 printf("%s: can't create rx DMA map %d, error = %d\n", 348 sc->sc_dev.dv_xname, i, error); 349 goto fail; 350 } 351 } 352 353 attach_stage = 10; 354 355 /* 356 * Create ring of upload descriptors, only once. The DMA engine 357 * will loop over this when receiving packets, stalling if it 358 * hits an UPD with a finished receive. 359 */ 360 for (i = 0; i < EX_NUPD; i++) { 361 sc->sc_rxdescs[i].rx_dmamap = sc->sc_rx_dmamaps[i]; 362 sc->sc_rxdescs[i].rx_upd = &sc->sc_upd[i]; 363 sc->sc_upd[i].upd_frags[0].fr_len = 364 htole32((MCLBYTES - 2) | EX_FR_LAST); 365 if (ex_add_rxbuf(sc, &sc->sc_rxdescs[i]) != 0) { 366 printf("%s: can't allocate or map rx buffers\n", 367 sc->sc_dev.dv_xname); 368 goto fail; 369 } 370 } 371 372 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 0, 373 EX_NUPD * sizeof (struct ex_upd), 374 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 375 376 ex_init_txdescs(sc); 377 378 attach_stage = 11; 379 380 381 GO_WINDOW(3); 382 val = bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS); 383 if (val & ELINK_MEDIACAP_MII) 384 sc->ex_conf |= EX_CONF_MII; 385 386 ifp = &sc->sc_ethercom.ec_if; 387 388 /* 389 * Initialize our media structures and MII info. We'll 390 * probe the MII if we discover that we have one. 391 */ 392 sc->ex_mii.mii_ifp = ifp; 393 sc->ex_mii.mii_readreg = ex_mii_readreg; 394 sc->ex_mii.mii_writereg = ex_mii_writereg; 395 sc->ex_mii.mii_statchg = ex_mii_statchg; 396 ifmedia_init(&sc->ex_mii.mii_media, 0, ex_media_chg, 397 ex_media_stat); 398 399 if (sc->ex_conf & EX_CONF_MII) { 400 /* 401 * Find PHY, extract media information from it. 402 * First, select the right transceiver. 403 */ 404 u_int32_t icfg; 405 406 GO_WINDOW(3); 407 icfg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 408 icfg &= ~(CONFIG_XCVR_SEL << 16); 409 if (val & (ELINK_MEDIACAP_MII | ELINK_MEDIACAP_100BASET4)) 410 icfg |= ELINKMEDIA_MII << (CONFIG_XCVR_SEL_SHIFT + 16); 411 if (val & ELINK_MEDIACAP_100BASETX) 412 icfg |= ELINKMEDIA_AUTO << (CONFIG_XCVR_SEL_SHIFT + 16); 413 if (val & ELINK_MEDIACAP_100BASEFX) 414 icfg |= ELINKMEDIA_100BASE_FX 415 << (CONFIG_XCVR_SEL_SHIFT + 16); 416 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, icfg); 417 418 mii_attach(&sc->sc_dev, &sc->ex_mii, 0xffffffff, 419 MII_PHY_ANY, MII_OFFSET_ANY, 0); 420 if (LIST_FIRST(&sc->ex_mii.mii_phys) == NULL) { 421 ifmedia_add(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE, 422 0, NULL); 423 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE); 424 } else { 425 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_AUTO); 426 } 427 } else 428 ex_probemedia(sc); 429 430 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 431 ifp->if_softc = sc; 432 ifp->if_start = ex_start; 433 ifp->if_ioctl = ex_ioctl; 434 ifp->if_watchdog = ex_watchdog; 435 ifp->if_flags = 436 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 437 438 /* 439 * We can support 802.1Q VLAN-sized frames. 440 */ 441 sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU; 442 443 if_attach(ifp); 444 ether_ifattach(ifp, macaddr); 445 446 GO_WINDOW(1); 447 448 sc->tx_start_thresh = 20; 449 sc->tx_succ_ok = 0; 450 451 /* TODO: set queues to 0 */ 452 453 #if NBPFILTER > 0 454 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB, 455 sizeof(struct ether_header)); 456 #endif 457 458 #if NRND > 0 459 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 460 RND_TYPE_NET, 0); 461 #endif 462 463 /* Establish callback to reset card when we reboot. */ 464 sc->sc_sdhook = shutdownhook_establish(ex_shutdown, sc); 465 466 /* The attach is successful. */ 467 sc->ex_flags |= EX_FLAGS_ATTACHED; 468 return; 469 470 fail: 471 /* 472 * Free any resources we've allocated during the failed attach 473 * attempt. Do this in reverse order and fall though. 474 */ 475 switch (attach_stage) { 476 case 11: 477 { 478 struct ex_rxdesc *rxd; 479 480 for (i = 0; i < EX_NUPD; i++) { 481 rxd = &sc->sc_rxdescs[i]; 482 if (rxd->rx_mbhead != NULL) { 483 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap); 484 m_freem(rxd->rx_mbhead); 485 } 486 } 487 } 488 /* FALLTHROUGH */ 489 490 case 10: 491 for (i = 0; i < EX_NUPD; i++) 492 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]); 493 /* FALLTHROUGH */ 494 495 case 9: 496 for (i = 0; i < EX_NDPD; i++) 497 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]); 498 /* FALLTHROUGH */ 499 case 8: 500 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap); 501 /* FALLTHROUGH */ 502 503 case 7: 504 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap); 505 /* FALLTHROUGH */ 506 507 case 6: 508 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd, 509 EX_NDPD * sizeof (struct ex_dpd)); 510 /* FALLTHROUGH */ 511 512 case 5: 513 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg); 514 break; 515 516 case 4: 517 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap); 518 /* FALLTHROUGH */ 519 520 case 3: 521 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap); 522 /* FALLTHROUGH */ 523 524 case 2: 525 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd, 526 EX_NUPD * sizeof (struct ex_upd)); 527 /* FALLTHROUGH */ 528 529 case 1: 530 bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg); 531 break; 532 } 533 534 } 535 536 /* 537 * Find the media present on non-MII chips. 538 */ 539 void 540 ex_probemedia(sc) 541 struct ex_softc *sc; 542 { 543 bus_space_tag_t iot = sc->sc_iot; 544 bus_space_handle_t ioh = sc->sc_ioh; 545 struct ifmedia *ifm = &sc->ex_mii.mii_media; 546 struct ex_media *exm; 547 u_int16_t config1, reset_options, default_media; 548 int defmedia = 0; 549 const char *sep = "", *defmedianame = NULL; 550 551 GO_WINDOW(3); 552 config1 = bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2); 553 reset_options = bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 554 GO_WINDOW(0); 555 556 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 557 558 printf("%s: ", sc->sc_dev.dv_xname); 559 560 /* Sanity check that there are any media! */ 561 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 562 printf("no media present!\n"); 563 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 564 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 565 return; 566 } 567 568 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 569 570 for (exm = ex_native_media; exm->exm_name != NULL; exm++) { 571 if (reset_options & exm->exm_mpbit) { 572 /* 573 * Default media is a little complicated. We 574 * support full-duplex which uses the same 575 * reset options bit. 576 * 577 * XXX Check EEPROM for default to FDX? 578 */ 579 if (exm->exm_epmedia == default_media) { 580 if ((exm->exm_ifmedia & IFM_FDX) == 0) { 581 defmedia = exm->exm_ifmedia; 582 defmedianame = exm->exm_name; 583 } 584 } else if (defmedia == 0) { 585 defmedia = exm->exm_ifmedia; 586 defmedianame = exm->exm_name; 587 } 588 ifmedia_add(ifm, exm->exm_ifmedia, exm->exm_epmedia, 589 NULL); 590 PRINT(exm->exm_name); 591 } 592 } 593 594 #undef PRINT 595 596 #ifdef DIAGNOSTIC 597 if (defmedia == 0) 598 panic("ex_probemedia: impossible"); 599 #endif 600 601 printf(", default %s\n", defmedianame); 602 ifmedia_set(ifm, defmedia); 603 } 604 605 /* 606 * Bring device up. 607 */ 608 void 609 ex_init(sc) 610 struct ex_softc *sc; 611 { 612 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 613 bus_space_tag_t iot = sc->sc_iot; 614 bus_space_handle_t ioh = sc->sc_ioh; 615 int s, i; 616 617 s = splnet(); 618 619 ex_waitcmd(sc); 620 ex_stop(sc); 621 622 /* 623 * Set the station address and clear the station mask. The latter 624 * is needed for 90x cards, 0 is the default for 90xB cards. 625 */ 626 GO_WINDOW(2); 627 for (i = 0; i < ETHER_ADDR_LEN; i++) { 628 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 629 LLADDR(ifp->if_sadl)[i]); 630 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 631 } 632 633 GO_WINDOW(3); 634 635 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_RESET); 636 ex_waitcmd(sc); 637 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_RESET); 638 ex_waitcmd(sc); 639 640 /* 641 * Disable reclaim threshold for 90xB, set free threshold to 642 * 6 * 256 = 1536 for 90x. 643 */ 644 if (sc->ex_conf & EX_CONF_90XB) 645 bus_space_write_2(iot, ioh, ELINK_COMMAND, 646 ELINK_TXRECLTHRESH | 255); 647 else 648 bus_space_write_1(iot, ioh, ELINK_TXFREETHRESH, 6); 649 650 bus_space_write_2(iot, ioh, ELINK_COMMAND, 651 SET_RX_EARLY_THRESH | ELINK_THRESH_DISABLE); 652 653 bus_space_write_4(iot, ioh, ELINK_DMACTRL, 654 bus_space_read_4(iot, ioh, ELINK_DMACTRL) | ELINK_DMAC_UPRXEAREN); 655 656 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK | S_MASK); 657 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK | S_MASK); 658 659 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 660 if (sc->intr_ack) 661 (* sc->intr_ack)(sc); 662 ex_set_media(sc); 663 ex_set_mc(sc); 664 665 666 bus_space_write_2(iot, ioh, ELINK_COMMAND, STATS_ENABLE); 667 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 668 bus_space_write_4(iot, ioh, ELINK_UPLISTPTR, sc->sc_upddma); 669 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 670 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_UPUNSTALL); 671 672 if (sc->ex_conf & (EX_CONF_PHY_POWER | EX_CONF_INV_LED_POLARITY)) { 673 u_int16_t cbcard_config; 674 675 GO_WINDOW(2); 676 cbcard_config = bus_space_read_2(sc->sc_iot, sc->sc_ioh, 0x0c); 677 if (sc->ex_conf & EX_CONF_PHY_POWER) { 678 cbcard_config |= 0x4000; /* turn on PHY power */ 679 } 680 if (sc->ex_conf & EX_CONF_INV_LED_POLARITY) { 681 cbcard_config |= 0x0020; /* invert LED polarity */ 682 } 683 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 0x0c, cbcard_config); 684 685 GO_WINDOW(3); 686 } 687 688 ifp->if_flags |= IFF_RUNNING; 689 ifp->if_flags &= ~IFF_OACTIVE; 690 ex_start(ifp); 691 692 GO_WINDOW(1); 693 694 splx(s); 695 696 callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc); 697 } 698 699 #define ex_mchash(addr) (ether_crc32_be((addr), ETHER_ADDR_LEN) & 0xff) 700 701 /* 702 * Set multicast receive filter. Also take care of promiscuous mode 703 * here (XXX). 704 */ 705 void 706 ex_set_mc(sc) 707 struct ex_softc *sc; 708 { 709 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 710 struct ethercom *ec = &sc->sc_ethercom; 711 struct ether_multi *enm; 712 struct ether_multistep estep; 713 int i; 714 u_int16_t mask = FIL_INDIVIDUAL | FIL_BRDCST; 715 716 if (ifp->if_flags & IFF_PROMISC) 717 mask |= FIL_PROMISC; 718 719 if (!(ifp->if_flags & IFF_MULTICAST)) 720 goto out; 721 722 if (!(sc->ex_conf & EX_CONF_90XB) || ifp->if_flags & IFF_ALLMULTI) { 723 mask |= (ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0; 724 } else { 725 ETHER_FIRST_MULTI(estep, ec, enm); 726 while (enm != NULL) { 727 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 728 ETHER_ADDR_LEN) != 0) 729 goto out; 730 i = ex_mchash(enm->enm_addrlo); 731 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 732 ELINK_COMMAND, ELINK_SETHASHFILBIT | i); 733 ETHER_NEXT_MULTI(estep, enm); 734 } 735 mask |= FIL_MULTIHASH; 736 } 737 out: 738 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 739 SET_RX_FILTER | mask); 740 } 741 742 743 static void 744 ex_txstat(sc) 745 struct ex_softc *sc; 746 { 747 bus_space_tag_t iot = sc->sc_iot; 748 bus_space_handle_t ioh = sc->sc_ioh; 749 int i; 750 751 /* 752 * We need to read+write TX_STATUS until we get a 0 status 753 * in order to turn off the interrupt flag. 754 */ 755 while ((i = bus_space_read_1(iot, ioh, ELINK_TXSTATUS)) & TXS_COMPLETE) { 756 bus_space_write_1(iot, ioh, ELINK_TXSTATUS, 0x0); 757 758 if (i & TXS_JABBER) { 759 ++sc->sc_ethercom.ec_if.if_oerrors; 760 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 761 printf("%s: jabber (%x)\n", 762 sc->sc_dev.dv_xname, i); 763 ex_init(sc); 764 /* TODO: be more subtle here */ 765 } else if (i & TXS_UNDERRUN) { 766 ++sc->sc_ethercom.ec_if.if_oerrors; 767 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 768 printf("%s: fifo underrun (%x) @%d\n", 769 sc->sc_dev.dv_xname, i, 770 sc->tx_start_thresh); 771 if (sc->tx_succ_ok < 100) 772 sc->tx_start_thresh = min(ETHER_MAX_LEN, 773 sc->tx_start_thresh + 20); 774 sc->tx_succ_ok = 0; 775 ex_init(sc); 776 /* TODO: be more subtle here */ 777 } else if (i & TXS_MAX_COLLISION) { 778 ++sc->sc_ethercom.ec_if.if_collisions; 779 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 780 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 781 } else 782 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 783 } 784 } 785 786 int 787 ex_media_chg(ifp) 788 struct ifnet *ifp; 789 { 790 struct ex_softc *sc = ifp->if_softc; 791 792 if (ifp->if_flags & IFF_UP) 793 ex_init(sc); 794 return 0; 795 } 796 797 void 798 ex_set_media(sc) 799 struct ex_softc *sc; 800 { 801 bus_space_tag_t iot = sc->sc_iot; 802 bus_space_handle_t ioh = sc->sc_ioh; 803 u_int32_t configreg; 804 805 if (((sc->ex_conf & EX_CONF_MII) && 806 (sc->ex_mii.mii_media_active & IFM_FDX)) 807 || (!(sc->ex_conf & EX_CONF_MII) && 808 (sc->ex_mii.mii_media.ifm_media & IFM_FDX))) { 809 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 810 MAC_CONTROL_FDX); 811 } else { 812 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 0); 813 } 814 815 /* 816 * If the device has MII, select it, and then tell the 817 * PHY which media to use. 818 */ 819 if (sc->ex_conf & EX_CONF_MII) { 820 GO_WINDOW(3); 821 822 configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 823 824 configreg &= ~(CONFIG_MEDIAMASK << 16); 825 configreg |= (ELINKMEDIA_MII << (CONFIG_MEDIAMASK_SHIFT + 16)); 826 827 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg); 828 mii_mediachg(&sc->ex_mii); 829 return; 830 } 831 832 GO_WINDOW(4); 833 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0); 834 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 835 delay(800); 836 837 /* 838 * Now turn on the selected media/transceiver. 839 */ 840 switch (IFM_SUBTYPE(sc->ex_mii.mii_media.ifm_cur->ifm_media)) { 841 case IFM_10_T: 842 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 843 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 844 break; 845 846 case IFM_10_2: 847 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 848 DELAY(800); 849 break; 850 851 case IFM_100_TX: 852 case IFM_100_FX: 853 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 854 LINKBEAT_ENABLE); 855 DELAY(800); 856 break; 857 858 case IFM_10_5: 859 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 860 SQE_ENABLE); 861 DELAY(800); 862 break; 863 864 case IFM_MANUAL: 865 break; 866 867 case IFM_NONE: 868 return; 869 870 default: 871 panic("ex_set_media: impossible"); 872 } 873 874 GO_WINDOW(3); 875 configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 876 877 configreg &= ~(CONFIG_MEDIAMASK << 16); 878 configreg |= (sc->ex_mii.mii_media.ifm_cur->ifm_data << 879 (CONFIG_MEDIAMASK_SHIFT + 16)); 880 881 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg); 882 } 883 884 /* 885 * Get currently-selected media from card. 886 * (if_media callback, may be called before interface is brought up). 887 */ 888 void 889 ex_media_stat(ifp, req) 890 struct ifnet *ifp; 891 struct ifmediareq *req; 892 { 893 struct ex_softc *sc = ifp->if_softc; 894 895 if (sc->ex_conf & EX_CONF_MII) { 896 mii_pollstat(&sc->ex_mii); 897 req->ifm_status = sc->ex_mii.mii_media_status; 898 req->ifm_active = sc->ex_mii.mii_media_active; 899 } else { 900 GO_WINDOW(4); 901 req->ifm_status = IFM_AVALID; 902 req->ifm_active = sc->ex_mii.mii_media.ifm_cur->ifm_media; 903 if (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 904 ELINK_W4_MEDIA_TYPE) & LINKBEAT_DETECT) 905 req->ifm_status |= IFM_ACTIVE; 906 GO_WINDOW(1); 907 } 908 } 909 910 911 912 /* 913 * Start outputting on the interface. 914 */ 915 static void 916 ex_start(ifp) 917 struct ifnet *ifp; 918 { 919 struct ex_softc *sc = ifp->if_softc; 920 bus_space_tag_t iot = sc->sc_iot; 921 bus_space_handle_t ioh = sc->sc_ioh; 922 volatile struct ex_fraghdr *fr = NULL; 923 volatile struct ex_dpd *dpd = NULL, *prevdpd = NULL; 924 struct ex_txdesc *txp; 925 bus_dmamap_t dmamap; 926 int offset, totlen; 927 928 if (sc->tx_head || sc->tx_free == NULL) 929 return; 930 931 txp = NULL; 932 933 /* 934 * We're finished if there is nothing more to add to the list or if 935 * we're all filled up with buffers to transmit. 936 */ 937 while (ifp->if_snd.ifq_head != NULL && sc->tx_free != NULL) { 938 struct mbuf *mb_head; 939 int segment, error; 940 941 /* 942 * Grab a packet to transmit. 943 */ 944 IF_DEQUEUE(&ifp->if_snd, mb_head); 945 946 /* 947 * Get pointer to next available tx desc. 948 */ 949 txp = sc->tx_free; 950 sc->tx_free = txp->tx_next; 951 txp->tx_next = NULL; 952 dmamap = txp->tx_dmamap; 953 954 /* 955 * Go through each of the mbufs in the chain and initialize 956 * the transmit buffer descriptors with the physical address 957 * and size of the mbuf. 958 */ 959 reload: 960 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 961 mb_head, BUS_DMA_NOWAIT); 962 switch (error) { 963 case 0: 964 /* Success. */ 965 break; 966 967 case EFBIG: 968 { 969 struct mbuf *mn; 970 971 /* 972 * We ran out of segments. We have to recopy this 973 * mbuf chain first. Bail out if we can't get the 974 * new buffers. 975 */ 976 printf("%s: too many segments, ", sc->sc_dev.dv_xname); 977 978 MGETHDR(mn, M_DONTWAIT, MT_DATA); 979 if (mn == NULL) { 980 m_freem(mb_head); 981 printf("aborting\n"); 982 goto out; 983 } 984 if (mb_head->m_pkthdr.len > MHLEN) { 985 MCLGET(mn, M_DONTWAIT); 986 if ((mn->m_flags & M_EXT) == 0) { 987 m_freem(mn); 988 m_freem(mb_head); 989 printf("aborting\n"); 990 goto out; 991 } 992 } 993 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, 994 mtod(mn, caddr_t)); 995 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; 996 m_freem(mb_head); 997 mb_head = mn; 998 printf("retrying\n"); 999 goto reload; 1000 } 1001 1002 default: 1003 /* 1004 * Some other problem; report it. 1005 */ 1006 printf("%s: can't load mbuf chain, error = %d\n", 1007 sc->sc_dev.dv_xname, error); 1008 m_freem(mb_head); 1009 goto out; 1010 } 1011 1012 fr = &txp->tx_dpd->dpd_frags[0]; 1013 totlen = 0; 1014 for (segment = 0; segment < dmamap->dm_nsegs; segment++, fr++) { 1015 fr->fr_addr = htole32(dmamap->dm_segs[segment].ds_addr); 1016 fr->fr_len = htole32(dmamap->dm_segs[segment].ds_len); 1017 totlen += dmamap->dm_segs[segment].ds_len; 1018 } 1019 fr--; 1020 fr->fr_len |= htole32(EX_FR_LAST); 1021 txp->tx_mbhead = mb_head; 1022 1023 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 1024 BUS_DMASYNC_PREWRITE); 1025 1026 dpd = txp->tx_dpd; 1027 dpd->dpd_nextptr = 0; 1028 dpd->dpd_fsh = htole32(totlen); 1029 1030 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1031 ((caddr_t)dpd - (caddr_t)sc->sc_dpd), 1032 sizeof (struct ex_dpd), 1033 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1034 1035 /* 1036 * No need to stall the download engine, we know it's 1037 * not busy right now. 1038 * 1039 * Fix up pointers in both the "soft" tx and the physical 1040 * tx list. 1041 */ 1042 if (sc->tx_head != NULL) { 1043 prevdpd = sc->tx_tail->tx_dpd; 1044 offset = ((caddr_t)prevdpd - (caddr_t)sc->sc_dpd); 1045 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1046 offset, sizeof (struct ex_dpd), 1047 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1048 prevdpd->dpd_nextptr = htole32(DPD_DMADDR(sc, txp)); 1049 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1050 offset, sizeof (struct ex_dpd), 1051 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1052 sc->tx_tail->tx_next = txp; 1053 sc->tx_tail = txp; 1054 } else { 1055 sc->tx_tail = sc->tx_head = txp; 1056 } 1057 1058 #if NBPFILTER > 0 1059 /* 1060 * Pass packet to bpf if there is a listener. 1061 */ 1062 if (ifp->if_bpf) 1063 bpf_mtap(ifp->if_bpf, mb_head); 1064 #endif 1065 } 1066 out: 1067 if (sc->tx_head) { 1068 sc->tx_tail->tx_dpd->dpd_fsh |= htole32(EX_DPD_DNIND); 1069 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1070 ((caddr_t)sc->tx_tail->tx_dpd - (caddr_t)sc->sc_dpd), 1071 sizeof (struct ex_dpd), 1072 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1073 ifp->if_flags |= IFF_OACTIVE; 1074 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_DNUNSTALL); 1075 bus_space_write_4(iot, ioh, ELINK_DNLISTPTR, 1076 DPD_DMADDR(sc, sc->tx_head)); 1077 1078 /* trigger watchdog */ 1079 ifp->if_timer = 5; 1080 } 1081 } 1082 1083 1084 int 1085 ex_intr(arg) 1086 void *arg; 1087 { 1088 struct ex_softc *sc = arg; 1089 bus_space_tag_t iot = sc->sc_iot; 1090 bus_space_handle_t ioh = sc->sc_ioh; 1091 u_int16_t stat; 1092 int ret = 0; 1093 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1094 1095 if (sc->enabled == 0 || 1096 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1097 return (0); 1098 1099 for (;;) { 1100 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1101 1102 stat = bus_space_read_2(iot, ioh, ELINK_STATUS); 1103 1104 if ((stat & S_MASK) == 0) { 1105 if ((stat & S_INTR_LATCH) == 0) { 1106 #if 0 1107 printf("%s: intr latch cleared\n", 1108 sc->sc_dev.dv_xname); 1109 #endif 1110 break; 1111 } 1112 } 1113 1114 ret = 1; 1115 1116 /* 1117 * Acknowledge interrupts. 1118 */ 1119 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1120 (stat & S_MASK)); 1121 if (sc->intr_ack) 1122 (*sc->intr_ack)(sc); 1123 1124 if (stat & S_HOST_ERROR) { 1125 printf("%s: adapter failure (%x)\n", 1126 sc->sc_dev.dv_xname, stat); 1127 ex_reset(sc); 1128 ex_init(sc); 1129 return 1; 1130 } 1131 if (stat & S_TX_COMPLETE) { 1132 ex_txstat(sc); 1133 } 1134 if (stat & S_UPD_STATS) { 1135 ex_getstats(sc); 1136 } 1137 if (stat & S_DN_COMPLETE) { 1138 struct ex_txdesc *txp, *ptxp = NULL; 1139 bus_dmamap_t txmap; 1140 1141 /* reset watchdog timer, was set in ex_start() */ 1142 ifp->if_timer = 0; 1143 1144 for (txp = sc->tx_head; txp != NULL; 1145 txp = txp->tx_next) { 1146 bus_dmamap_sync(sc->sc_dmat, 1147 sc->sc_dpd_dmamap, 1148 (caddr_t)txp->tx_dpd - (caddr_t)sc->sc_dpd, 1149 sizeof (struct ex_dpd), 1150 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1151 if (txp->tx_mbhead != NULL) { 1152 txmap = txp->tx_dmamap; 1153 bus_dmamap_sync(sc->sc_dmat, txmap, 1154 0, txmap->dm_mapsize, 1155 BUS_DMASYNC_POSTWRITE); 1156 bus_dmamap_unload(sc->sc_dmat, txmap); 1157 m_freem(txp->tx_mbhead); 1158 txp->tx_mbhead = NULL; 1159 } 1160 ptxp = txp; 1161 } 1162 1163 /* 1164 * Move finished tx buffers back to the tx free list. 1165 */ 1166 if (sc->tx_free) { 1167 sc->tx_ftail->tx_next = sc->tx_head; 1168 sc->tx_ftail = ptxp; 1169 } else 1170 sc->tx_ftail = sc->tx_free = sc->tx_head; 1171 1172 sc->tx_head = sc->tx_tail = NULL; 1173 ifp->if_flags &= ~IFF_OACTIVE; 1174 } 1175 1176 if (stat & S_UP_COMPLETE) { 1177 struct ex_rxdesc *rxd; 1178 struct mbuf *m; 1179 struct ex_upd *upd; 1180 bus_dmamap_t rxmap; 1181 u_int32_t pktstat; 1182 1183 rcvloop: 1184 rxd = sc->rx_head; 1185 rxmap = rxd->rx_dmamap; 1186 m = rxd->rx_mbhead; 1187 upd = rxd->rx_upd; 1188 1189 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, 1190 rxmap->dm_mapsize, 1191 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1192 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1193 ((caddr_t)upd - (caddr_t)sc->sc_upd), 1194 sizeof (struct ex_upd), 1195 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1196 pktstat = le32toh(upd->upd_pktstatus); 1197 1198 if (pktstat & EX_UPD_COMPLETE) { 1199 /* 1200 * Remove first packet from the chain. 1201 */ 1202 sc->rx_head = rxd->rx_next; 1203 rxd->rx_next = NULL; 1204 1205 /* 1206 * Add a new buffer to the receive chain. 1207 * If this fails, the old buffer is recycled 1208 * instead. 1209 */ 1210 if (ex_add_rxbuf(sc, rxd) == 0) { 1211 struct ether_header *eh; 1212 u_int16_t total_len; 1213 1214 if (pktstat & 1215 ((sc->sc_ethercom.ec_capenable & 1216 ETHERCAP_VLAN_MTU) ? 1217 EX_UPD_ERR_VLAN : EX_UPD_ERR)) { 1218 ifp->if_ierrors++; 1219 m_freem(m); 1220 goto rcvloop; 1221 } 1222 1223 total_len = pktstat & EX_UPD_PKTLENMASK; 1224 if (total_len < 1225 sizeof(struct ether_header)) { 1226 m_freem(m); 1227 goto rcvloop; 1228 } 1229 m->m_pkthdr.rcvif = ifp; 1230 m->m_pkthdr.len = m->m_len = total_len; 1231 eh = mtod(m, struct ether_header *); 1232 #if NBPFILTER > 0 1233 if (ifp->if_bpf) { 1234 bpf_tap(ifp->if_bpf, 1235 mtod(m, caddr_t), 1236 total_len); 1237 /* 1238 * Only pass this packet up 1239 * if it is for us. 1240 */ 1241 if ((ifp->if_flags & 1242 IFF_PROMISC) && 1243 (eh->ether_dhost[0] & 1) 1244 == 0 && 1245 bcmp(eh->ether_dhost, 1246 LLADDR(ifp->if_sadl), 1247 sizeof(eh->ether_dhost)) 1248 != 0) { 1249 m_freem(m); 1250 goto rcvloop; 1251 } 1252 } 1253 #endif /* NBPFILTER > 0 */ 1254 (*ifp->if_input)(ifp, m); 1255 } 1256 goto rcvloop; 1257 } 1258 /* 1259 * Just in case we filled up all UPDs and the DMA engine 1260 * stalled. We could be more subtle about this. 1261 */ 1262 if (bus_space_read_4(iot, ioh, ELINK_UPLISTPTR) == 0) { 1263 printf("%s: uplistptr was 0\n", 1264 sc->sc_dev.dv_xname); 1265 ex_init(sc); 1266 } else if (bus_space_read_4(iot, ioh, ELINK_UPPKTSTATUS) 1267 & 0x2000) { 1268 printf("%s: receive stalled\n", 1269 sc->sc_dev.dv_xname); 1270 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1271 ELINK_UPUNSTALL); 1272 } 1273 } 1274 } 1275 1276 /* no more interrupts */ 1277 if (ret && ifp->if_snd.ifq_head) 1278 ex_start(ifp); 1279 return ret; 1280 } 1281 1282 int 1283 ex_ioctl(ifp, cmd, data) 1284 struct ifnet *ifp; 1285 u_long cmd; 1286 caddr_t data; 1287 { 1288 struct ex_softc *sc = ifp->if_softc; 1289 struct ifaddr *ifa = (struct ifaddr *)data; 1290 struct ifreq *ifr = (struct ifreq *)data; 1291 int s, error = 0; 1292 1293 s = splnet(); 1294 1295 switch (cmd) { 1296 1297 case SIOCSIFADDR: 1298 ifp->if_flags |= IFF_UP; 1299 switch (ifa->ifa_addr->sa_family) { 1300 #ifdef INET 1301 case AF_INET: 1302 ex_init(sc); 1303 arp_ifinit(&sc->sc_ethercom.ec_if, ifa); 1304 break; 1305 #endif 1306 #ifdef NS 1307 case AF_NS: 1308 { 1309 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1310 1311 if (ns_nullhost(*ina)) 1312 ina->x_host = *(union ns_host *) 1313 LLADDR(ifp->if_sadl); 1314 else 1315 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl), 1316 ifp->if_addrlen); 1317 /* Set new address. */ 1318 ex_init(sc); 1319 break; 1320 } 1321 #endif 1322 default: 1323 ex_init(sc); 1324 break; 1325 } 1326 break; 1327 case SIOCSIFMEDIA: 1328 case SIOCGIFMEDIA: 1329 error = ifmedia_ioctl(ifp, ifr, &sc->ex_mii.mii_media, cmd); 1330 break; 1331 1332 case SIOCSIFFLAGS: 1333 if ((ifp->if_flags & IFF_UP) == 0 && 1334 (ifp->if_flags & IFF_RUNNING) != 0) { 1335 /* 1336 * If interface is marked down and it is running, then 1337 * stop it. 1338 */ 1339 ex_stop(sc); 1340 ifp->if_flags &= ~IFF_RUNNING; 1341 } else if ((ifp->if_flags & IFF_UP) != 0 && 1342 (ifp->if_flags & IFF_RUNNING) == 0) { 1343 /* 1344 * If interface is marked up and it is stopped, then 1345 * start it. 1346 */ 1347 ex_init(sc); 1348 } else if ((ifp->if_flags & IFF_UP) != 0) { 1349 /* 1350 * Deal with other flags that change hardware 1351 * state, i.e. IFF_PROMISC. 1352 */ 1353 ex_set_mc(sc); 1354 } 1355 break; 1356 1357 case SIOCADDMULTI: 1358 case SIOCDELMULTI: 1359 error = (cmd == SIOCADDMULTI) ? 1360 ether_addmulti(ifr, &sc->sc_ethercom) : 1361 ether_delmulti(ifr, &sc->sc_ethercom); 1362 1363 if (error == ENETRESET) { 1364 /* 1365 * Multicast list has changed; set the hardware filter 1366 * accordingly. 1367 */ 1368 ex_set_mc(sc); 1369 error = 0; 1370 } 1371 break; 1372 1373 default: 1374 error = EINVAL; 1375 break; 1376 } 1377 1378 splx(s); 1379 return (error); 1380 } 1381 1382 void 1383 ex_getstats(sc) 1384 struct ex_softc *sc; 1385 { 1386 bus_space_handle_t ioh = sc->sc_ioh; 1387 bus_space_tag_t iot = sc->sc_iot; 1388 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1389 u_int8_t upperok; 1390 1391 GO_WINDOW(6); 1392 upperok = bus_space_read_1(iot, ioh, UPPER_FRAMES_OK); 1393 ifp->if_ipackets += bus_space_read_1(iot, ioh, RX_FRAMES_OK); 1394 ifp->if_ipackets += (upperok & 0x03) << 8; 1395 ifp->if_opackets += bus_space_read_1(iot, ioh, TX_FRAMES_OK); 1396 ifp->if_opackets += (upperok & 0x30) << 4; 1397 ifp->if_ierrors += bus_space_read_1(iot, ioh, RX_OVERRUNS); 1398 ifp->if_collisions += bus_space_read_1(iot, ioh, TX_COLLISIONS); 1399 /* 1400 * There seems to be no way to get the exact number of collisions, 1401 * this is the number that occured at the very least. 1402 */ 1403 ifp->if_collisions += 2 * bus_space_read_1(iot, ioh, 1404 TX_AFTER_X_COLLISIONS); 1405 ifp->if_ibytes += bus_space_read_2(iot, ioh, RX_TOTAL_OK); 1406 ifp->if_obytes += bus_space_read_2(iot, ioh, TX_TOTAL_OK); 1407 1408 /* 1409 * Clear the following to avoid stats overflow interrupts 1410 */ 1411 bus_space_read_1(iot, ioh, TX_DEFERRALS); 1412 bus_space_read_1(iot, ioh, TX_AFTER_1_COLLISION); 1413 bus_space_read_1(iot, ioh, TX_NO_SQE); 1414 bus_space_read_1(iot, ioh, TX_CD_LOST); 1415 GO_WINDOW(4); 1416 bus_space_read_1(iot, ioh, ELINK_W4_BADSSD); 1417 upperok = bus_space_read_1(iot, ioh, ELINK_W4_UBYTESOK); 1418 ifp->if_ibytes += (upperok & 0x0f) << 16; 1419 ifp->if_obytes += (upperok & 0xf0) << 12; 1420 GO_WINDOW(1); 1421 } 1422 1423 void 1424 ex_printstats(sc) 1425 struct ex_softc *sc; 1426 { 1427 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1428 1429 ex_getstats(sc); 1430 printf("in %llu out %llu ierror %llu oerror %llu ibytes %llu obytes " 1431 "%llu\n", (unsigned long long)ifp->if_ipackets, 1432 (unsigned long long)ifp->if_opackets, 1433 (unsigned long long)ifp->if_ierrors, 1434 (unsigned long long)ifp->if_oerrors, 1435 (unsigned long long)ifp->if_ibytes, 1436 (unsigned long long)ifp->if_obytes); 1437 } 1438 1439 void 1440 ex_tick(arg) 1441 void *arg; 1442 { 1443 struct ex_softc *sc = arg; 1444 int s; 1445 1446 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1447 return; 1448 1449 s = splnet(); 1450 1451 if (sc->ex_conf & EX_CONF_MII) 1452 mii_tick(&sc->ex_mii); 1453 1454 if (!(bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, ELINK_STATUS) 1455 & S_COMMAND_IN_PROGRESS)) 1456 ex_getstats(sc); 1457 1458 splx(s); 1459 1460 callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc); 1461 } 1462 1463 void 1464 ex_reset(sc) 1465 struct ex_softc *sc; 1466 { 1467 u_int16_t val = GLOBAL_RESET; 1468 1469 if (sc->ex_conf & EX_CONF_RESETHACK) 1470 val |= 0x10; 1471 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, val); 1472 /* 1473 * XXX apparently the command in progress bit can't be trusted 1474 * during a reset, so we just always wait this long. Fortunately 1475 * we normally only reset the chip during autoconfig. 1476 */ 1477 delay(100000); 1478 ex_waitcmd(sc); 1479 } 1480 1481 void 1482 ex_watchdog(ifp) 1483 struct ifnet *ifp; 1484 { 1485 struct ex_softc *sc = ifp->if_softc; 1486 1487 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1488 ++sc->sc_ethercom.ec_if.if_oerrors; 1489 1490 ex_reset(sc); 1491 ex_init(sc); 1492 } 1493 1494 void 1495 ex_stop(sc) 1496 struct ex_softc *sc; 1497 { 1498 bus_space_tag_t iot = sc->sc_iot; 1499 bus_space_handle_t ioh = sc->sc_ioh; 1500 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1501 struct ex_txdesc *tx; 1502 struct ex_rxdesc *rx; 1503 int i; 1504 1505 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1506 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1507 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1508 1509 for (tx = sc->tx_head ; tx != NULL; tx = tx->tx_next) { 1510 if (tx->tx_mbhead == NULL) 1511 continue; 1512 m_freem(tx->tx_mbhead); 1513 tx->tx_mbhead = NULL; 1514 bus_dmamap_unload(sc->sc_dmat, tx->tx_dmamap); 1515 tx->tx_dpd->dpd_fsh = tx->tx_dpd->dpd_nextptr = 0; 1516 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1517 ((caddr_t)tx->tx_dpd - (caddr_t)sc->sc_dpd), 1518 sizeof (struct ex_dpd), 1519 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1520 } 1521 sc->tx_tail = sc->tx_head = NULL; 1522 ex_init_txdescs(sc); 1523 1524 sc->rx_tail = sc->rx_head = 0; 1525 for (i = 0; i < EX_NUPD; i++) { 1526 rx = &sc->sc_rxdescs[i]; 1527 if (rx->rx_mbhead != NULL) { 1528 bus_dmamap_unload(sc->sc_dmat, rx->rx_dmamap); 1529 m_freem(rx->rx_mbhead); 1530 rx->rx_mbhead = NULL; 1531 } 1532 ex_add_rxbuf(sc, rx); 1533 } 1534 1535 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1536 1537 callout_stop(&sc->ex_mii_callout); 1538 if (sc->ex_conf & EX_CONF_MII) 1539 mii_down(&sc->ex_mii); 1540 1541 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1542 ifp->if_timer = 0; 1543 } 1544 1545 static void 1546 ex_init_txdescs(sc) 1547 struct ex_softc *sc; 1548 { 1549 int i; 1550 1551 for (i = 0; i < EX_NDPD; i++) { 1552 sc->sc_txdescs[i].tx_dmamap = sc->sc_tx_dmamaps[i]; 1553 sc->sc_txdescs[i].tx_dpd = &sc->sc_dpd[i]; 1554 if (i < EX_NDPD - 1) 1555 sc->sc_txdescs[i].tx_next = &sc->sc_txdescs[i + 1]; 1556 else 1557 sc->sc_txdescs[i].tx_next = NULL; 1558 } 1559 sc->tx_free = &sc->sc_txdescs[0]; 1560 sc->tx_ftail = &sc->sc_txdescs[EX_NDPD-1]; 1561 } 1562 1563 1564 int 1565 ex_activate(self, act) 1566 struct device *self; 1567 enum devact act; 1568 { 1569 struct ex_softc *sc = (void *) self; 1570 int s, error = 0; 1571 1572 s = splnet(); 1573 switch (act) { 1574 case DVACT_ACTIVATE: 1575 error = EOPNOTSUPP; 1576 break; 1577 1578 case DVACT_DEACTIVATE: 1579 if (sc->ex_conf & EX_CONF_MII) 1580 mii_activate(&sc->ex_mii, act, MII_PHY_ANY, 1581 MII_OFFSET_ANY); 1582 if_deactivate(&sc->sc_ethercom.ec_if); 1583 break; 1584 } 1585 splx(s); 1586 1587 return (error); 1588 } 1589 1590 int 1591 ex_detach(sc) 1592 struct ex_softc *sc; 1593 { 1594 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1595 struct ex_rxdesc *rxd; 1596 int i; 1597 1598 /* Succeed now if there's no work to do. */ 1599 if ((sc->ex_flags & EX_FLAGS_ATTACHED) == 0) 1600 return (0); 1601 1602 /* Unhook our tick handler. */ 1603 callout_stop(&sc->ex_mii_callout); 1604 1605 if (sc->ex_conf & EX_CONF_MII) { 1606 /* Detach all PHYs */ 1607 mii_detach(&sc->ex_mii, MII_PHY_ANY, MII_OFFSET_ANY); 1608 } 1609 1610 /* Delete all remaining media. */ 1611 ifmedia_delete_instance(&sc->ex_mii.mii_media, IFM_INST_ANY); 1612 1613 #if NRND > 0 1614 rnd_detach_source(&sc->rnd_source); 1615 #endif 1616 #if NBPFILTER > 0 1617 bpfdetach(ifp); 1618 #endif 1619 ether_ifdetach(ifp); 1620 if_detach(ifp); 1621 1622 for (i = 0; i < EX_NUPD; i++) { 1623 rxd = &sc->sc_rxdescs[i]; 1624 if (rxd->rx_mbhead != NULL) { 1625 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap); 1626 m_freem(rxd->rx_mbhead); 1627 rxd->rx_mbhead = NULL; 1628 } 1629 } 1630 for (i = 0; i < EX_NUPD; i++) 1631 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]); 1632 for (i = 0; i < EX_NDPD; i++) 1633 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]); 1634 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap); 1635 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap); 1636 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd, 1637 EX_NDPD * sizeof (struct ex_dpd)); 1638 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg); 1639 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap); 1640 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap); 1641 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd, 1642 EX_NUPD * sizeof (struct ex_upd)); 1643 bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg); 1644 1645 shutdownhook_disestablish(sc->sc_sdhook); 1646 1647 return (0); 1648 } 1649 1650 /* 1651 * Before reboots, reset card completely. 1652 */ 1653 static void 1654 ex_shutdown(arg) 1655 void *arg; 1656 { 1657 struct ex_softc *sc = arg; 1658 1659 ex_stop(sc); 1660 } 1661 1662 /* 1663 * Read EEPROM data. 1664 * XXX what to do if EEPROM doesn't unbusy? 1665 */ 1666 u_int16_t 1667 ex_read_eeprom(sc, offset) 1668 struct ex_softc *sc; 1669 int offset; 1670 { 1671 bus_space_tag_t iot = sc->sc_iot; 1672 bus_space_handle_t ioh = sc->sc_ioh; 1673 u_int16_t data = 0, cmd = READ_EEPROM; 1674 int off; 1675 1676 off = sc->ex_conf & EX_CONF_EEPROM_OFF ? 0x30 : 0; 1677 cmd = sc->ex_conf & EX_CONF_EEPROM_8BIT ? READ_EEPROM8 : READ_EEPROM; 1678 1679 GO_WINDOW(0); 1680 if (ex_eeprom_busy(sc)) 1681 goto out; 1682 bus_space_write_2(iot, ioh, ELINK_W0_EEPROM_COMMAND, 1683 cmd | (off + (offset & 0x3f))); 1684 if (ex_eeprom_busy(sc)) 1685 goto out; 1686 data = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_DATA); 1687 out: 1688 return data; 1689 } 1690 1691 static int 1692 ex_eeprom_busy(sc) 1693 struct ex_softc *sc; 1694 { 1695 bus_space_tag_t iot = sc->sc_iot; 1696 bus_space_handle_t ioh = sc->sc_ioh; 1697 int i = 100; 1698 1699 while (i--) { 1700 if (!(bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND) & 1701 EEPROM_BUSY)) 1702 return 0; 1703 delay(100); 1704 } 1705 printf("\n%s: eeprom stays busy.\n", sc->sc_dev.dv_xname); 1706 return (1); 1707 } 1708 1709 /* 1710 * Create a new rx buffer and add it to the 'soft' rx list. 1711 */ 1712 static int 1713 ex_add_rxbuf(sc, rxd) 1714 struct ex_softc *sc; 1715 struct ex_rxdesc *rxd; 1716 { 1717 struct mbuf *m, *oldm; 1718 bus_dmamap_t rxmap; 1719 int error, rval = 0; 1720 1721 oldm = rxd->rx_mbhead; 1722 rxmap = rxd->rx_dmamap; 1723 1724 MGETHDR(m, M_DONTWAIT, MT_DATA); 1725 if (m != NULL) { 1726 MCLGET(m, M_DONTWAIT); 1727 if ((m->m_flags & M_EXT) == 0) { 1728 m_freem(m); 1729 if (oldm == NULL) 1730 return 1; 1731 m = oldm; 1732 m->m_data = m->m_ext.ext_buf; 1733 rval = 1; 1734 } 1735 } else { 1736 if (oldm == NULL) 1737 return 1; 1738 m = oldm; 1739 m->m_data = m->m_ext.ext_buf; 1740 rval = 1; 1741 } 1742 1743 /* 1744 * Setup the DMA map for this receive buffer. 1745 */ 1746 if (m != oldm) { 1747 if (oldm != NULL) 1748 bus_dmamap_unload(sc->sc_dmat, rxmap); 1749 error = bus_dmamap_load(sc->sc_dmat, rxmap, 1750 m->m_ext.ext_buf, MCLBYTES, NULL, BUS_DMA_NOWAIT); 1751 if (error) { 1752 printf("%s: can't load rx buffer, error = %d\n", 1753 sc->sc_dev.dv_xname, error); 1754 panic("ex_add_rxbuf"); /* XXX */ 1755 } 1756 } 1757 1758 /* 1759 * Align for data after 14 byte header. 1760 */ 1761 m->m_data += 2; 1762 1763 rxd->rx_mbhead = m; 1764 rxd->rx_upd->upd_pktstatus = htole32(MCLBYTES - 2); 1765 rxd->rx_upd->upd_frags[0].fr_addr = 1766 htole32(rxmap->dm_segs[0].ds_addr + 2); 1767 rxd->rx_upd->upd_nextptr = 0; 1768 1769 /* 1770 * Attach it to the end of the list. 1771 */ 1772 if (sc->rx_head != NULL) { 1773 sc->rx_tail->rx_next = rxd; 1774 sc->rx_tail->rx_upd->upd_nextptr = htole32(sc->sc_upddma + 1775 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd)); 1776 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1777 (caddr_t)sc->rx_tail->rx_upd - (caddr_t)sc->sc_upd, 1778 sizeof (struct ex_upd), 1779 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1780 } else { 1781 sc->rx_head = rxd; 1782 } 1783 sc->rx_tail = rxd; 1784 1785 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, rxmap->dm_mapsize, 1786 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1787 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1788 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd), 1789 sizeof (struct ex_upd), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1790 return (rval); 1791 } 1792 1793 u_int32_t 1794 ex_mii_bitbang_read(self) 1795 struct device *self; 1796 { 1797 struct ex_softc *sc = (void *) self; 1798 1799 /* We're already in Window 4. */ 1800 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT)); 1801 } 1802 1803 void 1804 ex_mii_bitbang_write(self, val) 1805 struct device *self; 1806 u_int32_t val; 1807 { 1808 struct ex_softc *sc = (void *) self; 1809 1810 /* We're already in Window 4. */ 1811 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT, val); 1812 } 1813 1814 int 1815 ex_mii_readreg(v, phy, reg) 1816 struct device *v; 1817 int phy, reg; 1818 { 1819 struct ex_softc *sc = (struct ex_softc *)v; 1820 int val; 1821 1822 if ((sc->ex_conf & EX_CONF_INTPHY) && phy != ELINK_INTPHY_ID) 1823 return 0; 1824 1825 GO_WINDOW(4); 1826 1827 val = mii_bitbang_readreg(v, &ex_mii_bitbang_ops, phy, reg); 1828 1829 GO_WINDOW(1); 1830 1831 return (val); 1832 } 1833 1834 void 1835 ex_mii_writereg(v, phy, reg, data) 1836 struct device *v; 1837 int phy; 1838 int reg; 1839 int data; 1840 { 1841 struct ex_softc *sc = (struct ex_softc *)v; 1842 1843 GO_WINDOW(4); 1844 1845 mii_bitbang_writereg(v, &ex_mii_bitbang_ops, phy, reg, data); 1846 1847 GO_WINDOW(1); 1848 } 1849 1850 void 1851 ex_mii_statchg(v) 1852 struct device *v; 1853 { 1854 struct ex_softc *sc = (struct ex_softc *)v; 1855 bus_space_tag_t iot = sc->sc_iot; 1856 bus_space_handle_t ioh = sc->sc_ioh; 1857 int mctl; 1858 1859 GO_WINDOW(3); 1860 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1861 if (sc->ex_mii.mii_media_active & IFM_FDX) 1862 mctl |= MAC_CONTROL_FDX; 1863 else 1864 mctl &= ~MAC_CONTROL_FDX; 1865 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1866 GO_WINDOW(1); /* back to operating window */ 1867 } 1868
Indexes created Wed Oct 22 13:09:56 GMT 2025