elinkxl.c revision 1.41
1 /* $NetBSD: elinkxl.c,v 1.41 2000/10/01 23:32:42 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Frank van der Linden. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include "opt_inet.h" 40 #include "opt_ns.h" 41 #include "bpfilter.h" 42 #include "rnd.h" 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/callout.h> 47 #include <sys/kernel.h> 48 #include <sys/mbuf.h> 49 #include <sys/socket.h> 50 #include <sys/ioctl.h> 51 #include <sys/errno.h> 52 #include <sys/syslog.h> 53 #include <sys/select.h> 54 #include <sys/device.h> 55 #if NRND > 0 56 #include <sys/rnd.h> 57 #endif 58 59 #include <net/if.h> 60 #include <net/if_dl.h> 61 #include <net/if_ether.h> 62 #include <net/if_media.h> 63 64 #ifdef INET 65 #include <netinet/in.h> 66 #include <netinet/in_systm.h> 67 #include <netinet/in_var.h> 68 #include <netinet/ip.h> 69 #include <netinet/if_inarp.h> 70 #endif 71 72 #ifdef NS 73 #include <netns/ns.h> 74 #include <netns/ns_if.h> 75 #endif 76 77 #if NBPFILTER > 0 78 #include <net/bpf.h> 79 #include <net/bpfdesc.h> 80 #endif 81 82 #include <machine/cpu.h> 83 #include <machine/bus.h> 84 #include <machine/intr.h> 85 #include <machine/endian.h> 86 87 #include <dev/mii/miivar.h> 88 #include <dev/mii/mii.h> 89 #include <dev/mii/mii_bitbang.h> 90 91 #include <dev/ic/elink3reg.h> 92 /* #include <dev/ic/elink3var.h> */ 93 #include <dev/ic/elinkxlreg.h> 94 #include <dev/ic/elinkxlvar.h> 95 96 #ifdef DEBUG 97 int exdebug = 0; 98 #endif 99 100 /* ifmedia callbacks */ 101 int ex_media_chg __P((struct ifnet *ifp)); 102 void ex_media_stat __P((struct ifnet *ifp, struct ifmediareq *req)); 103 104 void ex_probe_media __P((struct ex_softc *)); 105 void ex_set_filter __P((struct ex_softc *)); 106 void ex_set_media __P((struct ex_softc *)); 107 struct mbuf *ex_get __P((struct ex_softc *, int)); 108 u_int16_t ex_read_eeprom __P((struct ex_softc *, int)); 109 void ex_init __P((struct ex_softc *)); 110 void ex_read __P((struct ex_softc *)); 111 void ex_reset __P((struct ex_softc *)); 112 void ex_set_mc __P((struct ex_softc *)); 113 void ex_getstats __P((struct ex_softc *)); 114 void ex_printstats __P((struct ex_softc *)); 115 void ex_tick __P((void *)); 116 117 static int ex_eeprom_busy __P((struct ex_softc *)); 118 static int ex_add_rxbuf __P((struct ex_softc *, struct ex_rxdesc *)); 119 static void ex_init_txdescs __P((struct ex_softc *)); 120 121 static void ex_shutdown __P((void *)); 122 static void ex_start __P((struct ifnet *)); 123 static void ex_txstat __P((struct ex_softc *)); 124 125 int ex_mii_readreg __P((struct device *, int, int)); 126 void ex_mii_writereg __P((struct device *, int, int, int)); 127 void ex_mii_statchg __P((struct device *)); 128 129 void ex_probemedia __P((struct ex_softc *)); 130 131 /* 132 * Structure to map media-present bits in boards to ifmedia codes and 133 * printable media names. Used for table-driven ifmedia initialization. 134 */ 135 struct ex_media { 136 int exm_mpbit; /* media present bit */ 137 const char *exm_name; /* name of medium */ 138 int exm_ifmedia; /* ifmedia word for medium */ 139 int exm_epmedia; /* ELINKMEDIA_* constant */ 140 }; 141 142 /* 143 * Media table for 3c90x chips. Note that chips with MII have no 144 * `native' media. 145 */ 146 struct ex_media ex_native_media[] = { 147 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 148 ELINKMEDIA_10BASE_T }, 149 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 150 ELINKMEDIA_10BASE_T }, 151 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 152 ELINKMEDIA_AUI }, 153 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 154 ELINKMEDIA_10BASE_2 }, 155 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 156 ELINKMEDIA_100BASE_TX }, 157 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 158 ELINKMEDIA_100BASE_TX }, 159 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 160 ELINKMEDIA_100BASE_FX }, 161 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 162 ELINKMEDIA_MII }, 163 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 164 ELINKMEDIA_100BASE_T4 }, 165 { 0, NULL, 0, 166 0 }, 167 }; 168 169 /* 170 * MII bit-bang glue. 171 */ 172 u_int32_t ex_mii_bitbang_read __P((struct device *)); 173 void ex_mii_bitbang_write __P((struct device *, u_int32_t)); 174 175 const struct mii_bitbang_ops ex_mii_bitbang_ops = { 176 ex_mii_bitbang_read, 177 ex_mii_bitbang_write, 178 { 179 ELINK_PHY_DATA, /* MII_BIT_MDO */ 180 ELINK_PHY_DATA, /* MII_BIT_MDI */ 181 ELINK_PHY_CLK, /* MII_BIT_MDC */ 182 ELINK_PHY_DIR, /* MII_BIT_DIR_HOST_PHY */ 183 0, /* MII_BIT_DIR_PHY_HOST */ 184 } 185 }; 186 187 /* 188 * Back-end attach and configure. 189 */ 190 void 191 ex_config(sc) 192 struct ex_softc *sc; 193 { 194 struct ifnet *ifp; 195 u_int16_t val; 196 u_int8_t macaddr[ETHER_ADDR_LEN] = {0}; 197 bus_space_tag_t iot = sc->sc_iot; 198 bus_space_handle_t ioh = sc->sc_ioh; 199 int i, error, attach_stage; 200 201 callout_init(&sc->ex_mii_callout); 202 203 ex_reset(sc); 204 205 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR0); 206 macaddr[0] = val >> 8; 207 macaddr[1] = val & 0xff; 208 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR1); 209 macaddr[2] = val >> 8; 210 macaddr[3] = val & 0xff; 211 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR2); 212 macaddr[4] = val >> 8; 213 macaddr[5] = val & 0xff; 214 215 printf("%s: MAC address %s\n", sc->sc_dev.dv_xname, 216 ether_sprintf(macaddr)); 217 218 if (sc->ex_conf & (EX_CONF_INV_LED_POLARITY|EX_CONF_PHY_POWER)) { 219 GO_WINDOW(2); 220 val = bus_space_read_2(iot, ioh, ELINK_W2_RESET_OPTIONS); 221 if (sc->ex_conf & EX_CONF_INV_LED_POLARITY) 222 val |= ELINK_RESET_OPT_LEDPOLAR; 223 if (sc->ex_conf & EX_CONF_PHY_POWER) 224 val |= ELINK_RESET_OPT_PHYPOWER; 225 bus_space_write_2(iot, ioh, ELINK_W2_RESET_OPTIONS, val); 226 } 227 228 attach_stage = 0; 229 230 /* 231 * Allocate the upload descriptors, and create and load the DMA 232 * map for them. 233 */ 234 if ((error = bus_dmamem_alloc(sc->sc_dmat, 235 EX_NUPD * sizeof (struct ex_upd), NBPG, 0, &sc->sc_useg, 1, 236 &sc->sc_urseg, BUS_DMA_NOWAIT)) != 0) { 237 printf("%s: can't allocate upload descriptors, error = %d\n", 238 sc->sc_dev.dv_xname, error); 239 goto fail; 240 } 241 242 attach_stage = 1; 243 244 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg, 245 EX_NUPD * sizeof (struct ex_upd), (caddr_t *)&sc->sc_upd, 246 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 247 printf("%s: can't map upload descriptors, error = %d\n", 248 sc->sc_dev.dv_xname, error); 249 goto fail; 250 } 251 252 attach_stage = 2; 253 254 if ((error = bus_dmamap_create(sc->sc_dmat, 255 EX_NUPD * sizeof (struct ex_upd), 1, 256 EX_NUPD * sizeof (struct ex_upd), 0, BUS_DMA_NOWAIT, 257 &sc->sc_upd_dmamap)) != 0) { 258 printf("%s: can't create upload desc. DMA map, error = %d\n", 259 sc->sc_dev.dv_xname, error); 260 goto fail; 261 } 262 263 attach_stage = 3; 264 265 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_upd_dmamap, 266 sc->sc_upd, EX_NUPD * sizeof (struct ex_upd), NULL, 267 BUS_DMA_NOWAIT)) != 0) { 268 printf("%s: can't load upload desc. DMA map, error = %d\n", 269 sc->sc_dev.dv_xname, error); 270 goto fail; 271 } 272 273 attach_stage = 4; 274 275 /* 276 * Allocate the download descriptors, and create and load the DMA 277 * map for them. 278 */ 279 if ((error = bus_dmamem_alloc(sc->sc_dmat, 280 EX_NDPD * sizeof (struct ex_dpd), NBPG, 0, &sc->sc_dseg, 1, 281 &sc->sc_drseg, BUS_DMA_NOWAIT)) != 0) { 282 printf("%s: can't allocate download descriptors, error = %d\n", 283 sc->sc_dev.dv_xname, error); 284 goto fail; 285 } 286 287 attach_stage = 5; 288 289 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg, 290 EX_NDPD * sizeof (struct ex_dpd), (caddr_t *)&sc->sc_dpd, 291 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 292 printf("%s: can't map download descriptors, error = %d\n", 293 sc->sc_dev.dv_xname, error); 294 goto fail; 295 } 296 bzero(sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd)); 297 298 attach_stage = 6; 299 300 if ((error = bus_dmamap_create(sc->sc_dmat, 301 EX_NDPD * sizeof (struct ex_dpd), 1, 302 EX_NDPD * sizeof (struct ex_dpd), 0, BUS_DMA_NOWAIT, 303 &sc->sc_dpd_dmamap)) != 0) { 304 printf("%s: can't create download desc. DMA map, error = %d\n", 305 sc->sc_dev.dv_xname, error); 306 goto fail; 307 } 308 309 attach_stage = 7; 310 311 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dpd_dmamap, 312 sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd), NULL, 313 BUS_DMA_NOWAIT)) != 0) { 314 printf("%s: can't load download desc. DMA map, error = %d\n", 315 sc->sc_dev.dv_xname, error); 316 goto fail; 317 } 318 319 attach_stage = 8; 320 321 322 /* 323 * Create the transmit buffer DMA maps. 324 */ 325 for (i = 0; i < EX_NDPD; i++) { 326 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 327 EX_NTFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 328 &sc->sc_tx_dmamaps[i])) != 0) { 329 printf("%s: can't create tx DMA map %d, error = %d\n", 330 sc->sc_dev.dv_xname, i, error); 331 goto fail; 332 } 333 } 334 335 attach_stage = 9; 336 337 /* 338 * Create the receive buffer DMA maps. 339 */ 340 for (i = 0; i < EX_NUPD; i++) { 341 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 342 EX_NRFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 343 &sc->sc_rx_dmamaps[i])) != 0) { 344 printf("%s: can't create rx DMA map %d, error = %d\n", 345 sc->sc_dev.dv_xname, i, error); 346 goto fail; 347 } 348 } 349 350 attach_stage = 10; 351 352 /* 353 * Create ring of upload descriptors, only once. The DMA engine 354 * will loop over this when receiving packets, stalling if it 355 * hits an UPD with a finished receive. 356 */ 357 for (i = 0; i < EX_NUPD; i++) { 358 sc->sc_rxdescs[i].rx_dmamap = sc->sc_rx_dmamaps[i]; 359 sc->sc_rxdescs[i].rx_upd = &sc->sc_upd[i]; 360 sc->sc_upd[i].upd_frags[0].fr_len = 361 htole32((MCLBYTES - 2) | EX_FR_LAST); 362 if (ex_add_rxbuf(sc, &sc->sc_rxdescs[i]) != 0) { 363 printf("%s: can't allocate or map rx buffers\n", 364 sc->sc_dev.dv_xname); 365 goto fail; 366 } 367 } 368 369 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 0, 370 EX_NUPD * sizeof (struct ex_upd), 371 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 372 373 ex_init_txdescs(sc); 374 375 attach_stage = 11; 376 377 378 GO_WINDOW(3); 379 val = bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS); 380 if (val & ELINK_MEDIACAP_MII) 381 sc->ex_conf |= EX_CONF_MII; 382 383 ifp = &sc->sc_ethercom.ec_if; 384 385 /* 386 * Initialize our media structures and MII info. We'll 387 * probe the MII if we discover that we have one. 388 */ 389 sc->ex_mii.mii_ifp = ifp; 390 sc->ex_mii.mii_readreg = ex_mii_readreg; 391 sc->ex_mii.mii_writereg = ex_mii_writereg; 392 sc->ex_mii.mii_statchg = ex_mii_statchg; 393 ifmedia_init(&sc->ex_mii.mii_media, 0, ex_media_chg, 394 ex_media_stat); 395 396 if (sc->ex_conf & EX_CONF_MII) { 397 /* 398 * Find PHY, extract media information from it. 399 * First, select the right transceiver. 400 */ 401 u_int32_t icfg; 402 403 GO_WINDOW(3); 404 icfg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 405 icfg &= ~(CONFIG_XCVR_SEL << 16); 406 if (val & (ELINK_MEDIACAP_MII | ELINK_MEDIACAP_100BASET4)) 407 icfg |= ELINKMEDIA_MII << (CONFIG_XCVR_SEL_SHIFT + 16); 408 if (val & ELINK_MEDIACAP_100BASETX) 409 icfg |= ELINKMEDIA_AUTO << (CONFIG_XCVR_SEL_SHIFT + 16); 410 if (val & ELINK_MEDIACAP_100BASEFX) 411 icfg |= ELINKMEDIA_100BASE_FX 412 << (CONFIG_XCVR_SEL_SHIFT + 16); 413 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, icfg); 414 415 mii_attach(&sc->sc_dev, &sc->ex_mii, 0xffffffff, 416 MII_PHY_ANY, MII_OFFSET_ANY, 0); 417 if (LIST_FIRST(&sc->ex_mii.mii_phys) == NULL) { 418 ifmedia_add(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE, 419 0, NULL); 420 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE); 421 } else { 422 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_AUTO); 423 } 424 } else 425 ex_probemedia(sc); 426 427 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 428 ifp->if_softc = sc; 429 ifp->if_start = ex_start; 430 ifp->if_ioctl = ex_ioctl; 431 ifp->if_watchdog = ex_watchdog; 432 ifp->if_flags = 433 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 434 435 if_attach(ifp); 436 ether_ifattach(ifp, macaddr); 437 438 GO_WINDOW(1); 439 440 sc->tx_start_thresh = 20; 441 sc->tx_succ_ok = 0; 442 443 /* TODO: set queues to 0 */ 444 445 #if NBPFILTER > 0 446 bpfattach(&sc->sc_ethercom.ec_if.if_bpf, ifp, DLT_EN10MB, 447 sizeof(struct ether_header)); 448 #endif 449 450 #if NRND > 0 451 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 452 RND_TYPE_NET, 0); 453 #endif 454 455 /* Establish callback to reset card when we reboot. */ 456 sc->sc_sdhook = shutdownhook_establish(ex_shutdown, sc); 457 458 /* The attach is successful. */ 459 sc->ex_flags |= EX_FLAGS_ATTACHED; 460 return; 461 462 fail: 463 /* 464 * Free any resources we've allocated during the failed attach 465 * attempt. Do this in reverse order and fall though. 466 */ 467 switch (attach_stage) { 468 case 11: 469 { 470 struct ex_rxdesc *rxd; 471 472 for (i = 0; i < EX_NUPD; i++) { 473 rxd = &sc->sc_rxdescs[i]; 474 if (rxd->rx_mbhead != NULL) { 475 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap); 476 m_freem(rxd->rx_mbhead); 477 } 478 } 479 } 480 /* FALLTHROUGH */ 481 482 case 10: 483 for (i = 0; i < EX_NUPD; i++) 484 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]); 485 /* FALLTHROUGH */ 486 487 case 9: 488 for (i = 0; i < EX_NDPD; i++) 489 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]); 490 /* FALLTHROUGH */ 491 case 8: 492 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap); 493 /* FALLTHROUGH */ 494 495 case 7: 496 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap); 497 /* FALLTHROUGH */ 498 499 case 6: 500 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd, 501 EX_NDPD * sizeof (struct ex_dpd)); 502 /* FALLTHROUGH */ 503 504 case 5: 505 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg); 506 break; 507 508 case 4: 509 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap); 510 /* FALLTHROUGH */ 511 512 case 3: 513 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap); 514 /* FALLTHROUGH */ 515 516 case 2: 517 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd, 518 EX_NUPD * sizeof (struct ex_upd)); 519 /* FALLTHROUGH */ 520 521 case 1: 522 bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg); 523 break; 524 } 525 526 } 527 528 /* 529 * Find the media present on non-MII chips. 530 */ 531 void 532 ex_probemedia(sc) 533 struct ex_softc *sc; 534 { 535 bus_space_tag_t iot = sc->sc_iot; 536 bus_space_handle_t ioh = sc->sc_ioh; 537 struct ifmedia *ifm = &sc->ex_mii.mii_media; 538 struct ex_media *exm; 539 u_int16_t config1, reset_options, default_media; 540 int defmedia = 0; 541 const char *sep = "", *defmedianame = NULL; 542 543 GO_WINDOW(3); 544 config1 = bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2); 545 reset_options = bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 546 GO_WINDOW(0); 547 548 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 549 550 printf("%s: ", sc->sc_dev.dv_xname); 551 552 /* Sanity check that there are any media! */ 553 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 554 printf("no media present!\n"); 555 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 556 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 557 return; 558 } 559 560 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 561 562 for (exm = ex_native_media; exm->exm_name != NULL; exm++) { 563 if (reset_options & exm->exm_mpbit) { 564 /* 565 * Default media is a little complicated. We 566 * support full-duplex which uses the same 567 * reset options bit. 568 * 569 * XXX Check EEPROM for default to FDX? 570 */ 571 if (exm->exm_epmedia == default_media) { 572 if ((exm->exm_ifmedia & IFM_FDX) == 0) { 573 defmedia = exm->exm_ifmedia; 574 defmedianame = exm->exm_name; 575 } 576 } else if (defmedia == 0) { 577 defmedia = exm->exm_ifmedia; 578 defmedianame = exm->exm_name; 579 } 580 ifmedia_add(ifm, exm->exm_ifmedia, exm->exm_epmedia, 581 NULL); 582 PRINT(exm->exm_name); 583 } 584 } 585 586 #undef PRINT 587 588 #ifdef DIAGNOSTIC 589 if (defmedia == 0) 590 panic("ex_probemedia: impossible"); 591 #endif 592 593 printf(", default %s\n", defmedianame); 594 ifmedia_set(ifm, defmedia); 595 } 596 597 /* 598 * Bring device up. 599 */ 600 void 601 ex_init(sc) 602 struct ex_softc *sc; 603 { 604 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 605 bus_space_tag_t iot = sc->sc_iot; 606 bus_space_handle_t ioh = sc->sc_ioh; 607 int s, i; 608 609 s = splnet(); 610 611 ex_waitcmd(sc); 612 ex_stop(sc); 613 614 /* 615 * Set the station address and clear the station mask. The latter 616 * is needed for 90x cards, 0 is the default for 90xB cards. 617 */ 618 GO_WINDOW(2); 619 for (i = 0; i < ETHER_ADDR_LEN; i++) { 620 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 621 LLADDR(ifp->if_sadl)[i]); 622 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 623 } 624 625 GO_WINDOW(3); 626 627 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_RESET); 628 ex_waitcmd(sc); 629 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_RESET); 630 ex_waitcmd(sc); 631 632 /* 633 * Disable reclaim threshold for 90xB, set free threshold to 634 * 6 * 256 = 1536 for 90x. 635 */ 636 if (sc->ex_conf & EX_CONF_90XB) 637 bus_space_write_2(iot, ioh, ELINK_COMMAND, 638 ELINK_TXRECLTHRESH | 255); 639 else 640 bus_space_write_1(iot, ioh, ELINK_TXFREETHRESH, 6); 641 642 bus_space_write_2(iot, ioh, ELINK_COMMAND, 643 SET_RX_EARLY_THRESH | ELINK_THRESH_DISABLE); 644 645 bus_space_write_4(iot, ioh, ELINK_DMACTRL, 646 bus_space_read_4(iot, ioh, ELINK_DMACTRL) | ELINK_DMAC_UPRXEAREN); 647 648 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK | S_MASK); 649 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK | S_MASK); 650 651 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 652 if (sc->intr_ack) 653 (* sc->intr_ack)(sc); 654 ex_set_media(sc); 655 ex_set_mc(sc); 656 657 658 bus_space_write_2(iot, ioh, ELINK_COMMAND, STATS_ENABLE); 659 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 660 bus_space_write_4(iot, ioh, ELINK_UPLISTPTR, sc->sc_upddma); 661 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 662 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_UPUNSTALL); 663 664 if (sc->ex_conf & (EX_CONF_PHY_POWER | EX_CONF_INV_LED_POLARITY)) { 665 u_int16_t cbcard_config; 666 667 GO_WINDOW(2); 668 cbcard_config = bus_space_read_2(sc->sc_iot, sc->sc_ioh, 0x0c); 669 if (sc->ex_conf & EX_CONF_PHY_POWER) { 670 cbcard_config |= 0x4000; /* turn on PHY power */ 671 } 672 if (sc->ex_conf & EX_CONF_INV_LED_POLARITY) { 673 cbcard_config |= 0x0010; /* invert LED polarity */ 674 } 675 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 0x0c, cbcard_config); 676 677 GO_WINDOW(3); 678 } 679 680 ifp->if_flags |= IFF_RUNNING; 681 ifp->if_flags &= ~IFF_OACTIVE; 682 ex_start(ifp); 683 684 GO_WINDOW(1); 685 686 splx(s); 687 688 callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc); 689 } 690 691 #define ex_mchash(addr) (ether_crc32_be((addr), ETHER_ADDR_LEN) & 0xff) 692 693 /* 694 * Set multicast receive filter. Also take care of promiscuous mode 695 * here (XXX). 696 */ 697 void 698 ex_set_mc(sc) 699 struct ex_softc *sc; 700 { 701 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 702 struct ethercom *ec = &sc->sc_ethercom; 703 struct ether_multi *enm; 704 struct ether_multistep estep; 705 int i; 706 u_int16_t mask = FIL_INDIVIDUAL | FIL_BRDCST; 707 708 if (ifp->if_flags & IFF_PROMISC) 709 mask |= FIL_PROMISC; 710 711 if (!(ifp->if_flags & IFF_MULTICAST)) 712 goto out; 713 714 if (!(sc->ex_conf & EX_CONF_90XB) || ifp->if_flags & IFF_ALLMULTI) { 715 mask |= (ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0; 716 } else { 717 ETHER_FIRST_MULTI(estep, ec, enm); 718 while (enm != NULL) { 719 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 720 ETHER_ADDR_LEN) != 0) 721 goto out; 722 i = ex_mchash(enm->enm_addrlo); 723 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 724 ELINK_COMMAND, ELINK_SETHASHFILBIT | i); 725 ETHER_NEXT_MULTI(estep, enm); 726 } 727 mask |= FIL_MULTIHASH; 728 } 729 out: 730 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 731 SET_RX_FILTER | mask); 732 } 733 734 735 static void 736 ex_txstat(sc) 737 struct ex_softc *sc; 738 { 739 bus_space_tag_t iot = sc->sc_iot; 740 bus_space_handle_t ioh = sc->sc_ioh; 741 int i; 742 743 /* 744 * We need to read+write TX_STATUS until we get a 0 status 745 * in order to turn off the interrupt flag. 746 */ 747 while ((i = bus_space_read_1(iot, ioh, ELINK_TXSTATUS)) & TXS_COMPLETE) { 748 bus_space_write_1(iot, ioh, ELINK_TXSTATUS, 0x0); 749 750 if (i & TXS_JABBER) { 751 ++sc->sc_ethercom.ec_if.if_oerrors; 752 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 753 printf("%s: jabber (%x)\n", 754 sc->sc_dev.dv_xname, i); 755 ex_init(sc); 756 /* TODO: be more subtle here */ 757 } else if (i & TXS_UNDERRUN) { 758 ++sc->sc_ethercom.ec_if.if_oerrors; 759 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 760 printf("%s: fifo underrun (%x) @%d\n", 761 sc->sc_dev.dv_xname, i, 762 sc->tx_start_thresh); 763 if (sc->tx_succ_ok < 100) 764 sc->tx_start_thresh = min(ETHER_MAX_LEN, 765 sc->tx_start_thresh + 20); 766 sc->tx_succ_ok = 0; 767 ex_init(sc); 768 /* TODO: be more subtle here */ 769 } else if (i & TXS_MAX_COLLISION) { 770 ++sc->sc_ethercom.ec_if.if_collisions; 771 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 772 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 773 } else 774 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 775 } 776 } 777 778 int 779 ex_media_chg(ifp) 780 struct ifnet *ifp; 781 { 782 struct ex_softc *sc = ifp->if_softc; 783 784 if (ifp->if_flags & IFF_UP) 785 ex_init(sc); 786 return 0; 787 } 788 789 void 790 ex_set_media(sc) 791 struct ex_softc *sc; 792 { 793 bus_space_tag_t iot = sc->sc_iot; 794 bus_space_handle_t ioh = sc->sc_ioh; 795 u_int32_t configreg; 796 797 if (((sc->ex_conf & EX_CONF_MII) && 798 (sc->ex_mii.mii_media_active & IFM_FDX)) 799 || (!(sc->ex_conf & EX_CONF_MII) && 800 (sc->ex_mii.mii_media.ifm_media & IFM_FDX))) { 801 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 802 MAC_CONTROL_FDX); 803 } else { 804 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 0); 805 } 806 807 /* 808 * If the device has MII, select it, and then tell the 809 * PHY which media to use. 810 */ 811 if (sc->ex_conf & EX_CONF_MII) { 812 GO_WINDOW(3); 813 814 configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 815 816 configreg &= ~(CONFIG_MEDIAMASK << 16); 817 configreg |= (ELINKMEDIA_MII << (CONFIG_MEDIAMASK_SHIFT + 16)); 818 819 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg); 820 mii_mediachg(&sc->ex_mii); 821 return; 822 } 823 824 GO_WINDOW(4); 825 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0); 826 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 827 delay(800); 828 829 /* 830 * Now turn on the selected media/transceiver. 831 */ 832 switch (IFM_SUBTYPE(sc->ex_mii.mii_media.ifm_cur->ifm_media)) { 833 case IFM_10_T: 834 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 835 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 836 break; 837 838 case IFM_10_2: 839 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 840 DELAY(800); 841 break; 842 843 case IFM_100_TX: 844 case IFM_100_FX: 845 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 846 LINKBEAT_ENABLE); 847 DELAY(800); 848 break; 849 850 case IFM_10_5: 851 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 852 SQE_ENABLE); 853 DELAY(800); 854 break; 855 856 case IFM_MANUAL: 857 break; 858 859 case IFM_NONE: 860 return; 861 862 default: 863 panic("ex_set_media: impossible"); 864 } 865 866 GO_WINDOW(3); 867 configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 868 869 configreg &= ~(CONFIG_MEDIAMASK << 16); 870 configreg |= (sc->ex_mii.mii_media.ifm_cur->ifm_data << 871 (CONFIG_MEDIAMASK_SHIFT + 16)); 872 873 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg); 874 } 875 876 /* 877 * Get currently-selected media from card. 878 * (if_media callback, may be called before interface is brought up). 879 */ 880 void 881 ex_media_stat(ifp, req) 882 struct ifnet *ifp; 883 struct ifmediareq *req; 884 { 885 struct ex_softc *sc = ifp->if_softc; 886 887 if (sc->ex_conf & EX_CONF_MII) { 888 mii_pollstat(&sc->ex_mii); 889 req->ifm_status = sc->ex_mii.mii_media_status; 890 req->ifm_active = sc->ex_mii.mii_media_active; 891 } else { 892 GO_WINDOW(4); 893 req->ifm_status = IFM_AVALID; 894 req->ifm_active = sc->ex_mii.mii_media.ifm_cur->ifm_media; 895 if (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 896 ELINK_W4_MEDIA_TYPE) & LINKBEAT_DETECT) 897 req->ifm_status |= IFM_ACTIVE; 898 GO_WINDOW(1); 899 } 900 } 901 902 903 904 /* 905 * Start outputting on the interface. 906 */ 907 static void 908 ex_start(ifp) 909 struct ifnet *ifp; 910 { 911 struct ex_softc *sc = ifp->if_softc; 912 bus_space_tag_t iot = sc->sc_iot; 913 bus_space_handle_t ioh = sc->sc_ioh; 914 volatile struct ex_fraghdr *fr = NULL; 915 volatile struct ex_dpd *dpd = NULL, *prevdpd = NULL; 916 struct ex_txdesc *txp; 917 bus_dmamap_t dmamap; 918 int offset, totlen; 919 920 if (sc->tx_head || sc->tx_free == NULL) 921 return; 922 923 txp = NULL; 924 925 /* 926 * We're finished if there is nothing more to add to the list or if 927 * we're all filled up with buffers to transmit. 928 */ 929 while (ifp->if_snd.ifq_head != NULL && sc->tx_free != NULL) { 930 struct mbuf *mb_head; 931 int segment, error; 932 933 /* 934 * Grab a packet to transmit. 935 */ 936 IF_DEQUEUE(&ifp->if_snd, mb_head); 937 938 /* 939 * Get pointer to next available tx desc. 940 */ 941 txp = sc->tx_free; 942 sc->tx_free = txp->tx_next; 943 txp->tx_next = NULL; 944 dmamap = txp->tx_dmamap; 945 946 /* 947 * Go through each of the mbufs in the chain and initialize 948 * the transmit buffer descriptors with the physical address 949 * and size of the mbuf. 950 */ 951 reload: 952 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 953 mb_head, BUS_DMA_NOWAIT); 954 switch (error) { 955 case 0: 956 /* Success. */ 957 break; 958 959 case EFBIG: 960 { 961 struct mbuf *mn; 962 963 /* 964 * We ran out of segments. We have to recopy this 965 * mbuf chain first. Bail out if we can't get the 966 * new buffers. 967 */ 968 printf("%s: too many segments, ", sc->sc_dev.dv_xname); 969 970 MGETHDR(mn, M_DONTWAIT, MT_DATA); 971 if (mn == NULL) { 972 m_freem(mb_head); 973 printf("aborting\n"); 974 goto out; 975 } 976 if (mb_head->m_pkthdr.len > MHLEN) { 977 MCLGET(mn, M_DONTWAIT); 978 if ((mn->m_flags & M_EXT) == 0) { 979 m_freem(mn); 980 m_freem(mb_head); 981 printf("aborting\n"); 982 goto out; 983 } 984 } 985 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, 986 mtod(mn, caddr_t)); 987 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; 988 m_freem(mb_head); 989 mb_head = mn; 990 printf("retrying\n"); 991 goto reload; 992 } 993 994 default: 995 /* 996 * Some other problem; report it. 997 */ 998 printf("%s: can't load mbuf chain, error = %d\n", 999 sc->sc_dev.dv_xname, error); 1000 m_freem(mb_head); 1001 goto out; 1002 } 1003 1004 fr = &txp->tx_dpd->dpd_frags[0]; 1005 totlen = 0; 1006 for (segment = 0; segment < dmamap->dm_nsegs; segment++, fr++) { 1007 fr->fr_addr = htole32(dmamap->dm_segs[segment].ds_addr); 1008 fr->fr_len = htole32(dmamap->dm_segs[segment].ds_len); 1009 totlen += dmamap->dm_segs[segment].ds_len; 1010 } 1011 fr--; 1012 fr->fr_len |= htole32(EX_FR_LAST); 1013 txp->tx_mbhead = mb_head; 1014 1015 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 1016 BUS_DMASYNC_PREWRITE); 1017 1018 dpd = txp->tx_dpd; 1019 dpd->dpd_nextptr = 0; 1020 dpd->dpd_fsh = htole32(totlen); 1021 1022 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1023 ((caddr_t)dpd - (caddr_t)sc->sc_dpd), 1024 sizeof (struct ex_dpd), 1025 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1026 1027 /* 1028 * No need to stall the download engine, we know it's 1029 * not busy right now. 1030 * 1031 * Fix up pointers in both the "soft" tx and the physical 1032 * tx list. 1033 */ 1034 if (sc->tx_head != NULL) { 1035 prevdpd = sc->tx_tail->tx_dpd; 1036 offset = ((caddr_t)prevdpd - (caddr_t)sc->sc_dpd); 1037 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1038 offset, sizeof (struct ex_dpd), 1039 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1040 prevdpd->dpd_nextptr = htole32(DPD_DMADDR(sc, txp)); 1041 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1042 offset, sizeof (struct ex_dpd), 1043 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1044 sc->tx_tail->tx_next = txp; 1045 sc->tx_tail = txp; 1046 } else { 1047 sc->tx_tail = sc->tx_head = txp; 1048 } 1049 1050 #if NBPFILTER > 0 1051 /* 1052 * Pass packet to bpf if there is a listener. 1053 */ 1054 if (ifp->if_bpf) 1055 bpf_mtap(ifp->if_bpf, mb_head); 1056 #endif 1057 } 1058 out: 1059 if (sc->tx_head) { 1060 sc->tx_tail->tx_dpd->dpd_fsh |= htole32(EX_DPD_DNIND); 1061 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1062 ((caddr_t)sc->tx_tail->tx_dpd - (caddr_t)sc->sc_dpd), 1063 sizeof (struct ex_dpd), 1064 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1065 ifp->if_flags |= IFF_OACTIVE; 1066 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_DNUNSTALL); 1067 bus_space_write_4(iot, ioh, ELINK_DNLISTPTR, 1068 DPD_DMADDR(sc, sc->tx_head)); 1069 1070 /* trigger watchdog */ 1071 ifp->if_timer = 5; 1072 } 1073 } 1074 1075 1076 int 1077 ex_intr(arg) 1078 void *arg; 1079 { 1080 struct ex_softc *sc = arg; 1081 bus_space_tag_t iot = sc->sc_iot; 1082 bus_space_handle_t ioh = sc->sc_ioh; 1083 u_int16_t stat; 1084 int ret = 0; 1085 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1086 1087 if (sc->enabled == 0 || 1088 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1089 return (0); 1090 1091 for (;;) { 1092 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1093 1094 stat = bus_space_read_2(iot, ioh, ELINK_STATUS); 1095 1096 if ((stat & S_MASK) == 0) { 1097 if ((stat & S_INTR_LATCH) == 0) { 1098 #if 0 1099 printf("%s: intr latch cleared\n", 1100 sc->sc_dev.dv_xname); 1101 #endif 1102 break; 1103 } 1104 } 1105 1106 ret = 1; 1107 1108 /* 1109 * Acknowledge interrupts. 1110 */ 1111 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1112 (stat & S_MASK)); 1113 if (sc->intr_ack) 1114 (*sc->intr_ack)(sc); 1115 1116 if (stat & S_HOST_ERROR) { 1117 printf("%s: adapter failure (%x)\n", 1118 sc->sc_dev.dv_xname, stat); 1119 ex_reset(sc); 1120 ex_init(sc); 1121 return 1; 1122 } 1123 if (stat & S_TX_COMPLETE) { 1124 ex_txstat(sc); 1125 } 1126 if (stat & S_UPD_STATS) { 1127 ex_getstats(sc); 1128 } 1129 if (stat & S_DN_COMPLETE) { 1130 struct ex_txdesc *txp, *ptxp = NULL; 1131 bus_dmamap_t txmap; 1132 1133 /* reset watchdog timer, was set in ex_start() */ 1134 ifp->if_timer = 0; 1135 1136 for (txp = sc->tx_head; txp != NULL; 1137 txp = txp->tx_next) { 1138 bus_dmamap_sync(sc->sc_dmat, 1139 sc->sc_dpd_dmamap, 1140 (caddr_t)txp->tx_dpd - (caddr_t)sc->sc_dpd, 1141 sizeof (struct ex_dpd), 1142 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1143 if (txp->tx_mbhead != NULL) { 1144 txmap = txp->tx_dmamap; 1145 bus_dmamap_sync(sc->sc_dmat, txmap, 1146 0, txmap->dm_mapsize, 1147 BUS_DMASYNC_POSTWRITE); 1148 bus_dmamap_unload(sc->sc_dmat, txmap); 1149 m_freem(txp->tx_mbhead); 1150 txp->tx_mbhead = NULL; 1151 } 1152 ptxp = txp; 1153 } 1154 1155 /* 1156 * Move finished tx buffers back to the tx free list. 1157 */ 1158 if (sc->tx_free) { 1159 sc->tx_ftail->tx_next = sc->tx_head; 1160 sc->tx_ftail = ptxp; 1161 } else 1162 sc->tx_ftail = sc->tx_free = sc->tx_head; 1163 1164 sc->tx_head = sc->tx_tail = NULL; 1165 ifp->if_flags &= ~IFF_OACTIVE; 1166 } 1167 1168 if (stat & S_UP_COMPLETE) { 1169 struct ex_rxdesc *rxd; 1170 struct mbuf *m; 1171 struct ex_upd *upd; 1172 bus_dmamap_t rxmap; 1173 u_int32_t pktstat; 1174 1175 rcvloop: 1176 rxd = sc->rx_head; 1177 rxmap = rxd->rx_dmamap; 1178 m = rxd->rx_mbhead; 1179 upd = rxd->rx_upd; 1180 1181 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, 1182 rxmap->dm_mapsize, 1183 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1184 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1185 ((caddr_t)upd - (caddr_t)sc->sc_upd), 1186 sizeof (struct ex_upd), 1187 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1188 pktstat = le32toh(upd->upd_pktstatus); 1189 1190 if (pktstat & EX_UPD_COMPLETE) { 1191 /* 1192 * Remove first packet from the chain. 1193 */ 1194 sc->rx_head = rxd->rx_next; 1195 rxd->rx_next = NULL; 1196 1197 /* 1198 * Add a new buffer to the receive chain. 1199 * If this fails, the old buffer is recycled 1200 * instead. 1201 */ 1202 if (ex_add_rxbuf(sc, rxd) == 0) { 1203 u_int16_t total_len; 1204 1205 if (pktstat & EX_UPD_ERR) { 1206 ifp->if_ierrors++; 1207 m_freem(m); 1208 goto rcvloop; 1209 } 1210 1211 total_len = pktstat & EX_UPD_PKTLENMASK; 1212 if (total_len < 1213 sizeof(struct ether_header)) { 1214 m_freem(m); 1215 goto rcvloop; 1216 } 1217 m->m_pkthdr.rcvif = ifp; 1218 m->m_pkthdr.len = m->m_len = total_len; 1219 #if NBPFILTER > 0 1220 if (ifp->if_bpf) 1221 bpf_mtap(ifp->if_bpf, m); 1222 #endif 1223 (*ifp->if_input)(ifp, m); 1224 } 1225 goto rcvloop; 1226 } 1227 /* 1228 * Just in case we filled up all UPDs and the DMA engine 1229 * stalled. We could be more subtle about this. 1230 */ 1231 if (bus_space_read_4(iot, ioh, ELINK_UPLISTPTR) == 0) { 1232 printf("%s: uplistptr was 0\n", 1233 sc->sc_dev.dv_xname); 1234 ex_init(sc); 1235 } else if (bus_space_read_4(iot, ioh, ELINK_UPPKTSTATUS) 1236 & 0x2000) { 1237 printf("%s: receive stalled\n", 1238 sc->sc_dev.dv_xname); 1239 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1240 ELINK_UPUNSTALL); 1241 } 1242 } 1243 } 1244 1245 /* no more interrupts */ 1246 if (ret && ifp->if_snd.ifq_head) 1247 ex_start(ifp); 1248 return ret; 1249 } 1250 1251 int 1252 ex_ioctl(ifp, cmd, data) 1253 struct ifnet *ifp; 1254 u_long cmd; 1255 caddr_t data; 1256 { 1257 struct ex_softc *sc = ifp->if_softc; 1258 struct ifaddr *ifa = (struct ifaddr *)data; 1259 struct ifreq *ifr = (struct ifreq *)data; 1260 int s, error = 0; 1261 1262 s = splnet(); 1263 1264 switch (cmd) { 1265 1266 case SIOCSIFADDR: 1267 ifp->if_flags |= IFF_UP; 1268 switch (ifa->ifa_addr->sa_family) { 1269 #ifdef INET 1270 case AF_INET: 1271 ex_init(sc); 1272 arp_ifinit(&sc->sc_ethercom.ec_if, ifa); 1273 break; 1274 #endif 1275 #ifdef NS 1276 case AF_NS: 1277 { 1278 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr; 1279 1280 if (ns_nullhost(*ina)) 1281 ina->x_host = *(union ns_host *) 1282 LLADDR(ifp->if_sadl); 1283 else 1284 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl), 1285 ifp->if_addrlen); 1286 /* Set new address. */ 1287 ex_init(sc); 1288 break; 1289 } 1290 #endif 1291 default: 1292 ex_init(sc); 1293 break; 1294 } 1295 break; 1296 case SIOCSIFMEDIA: 1297 case SIOCGIFMEDIA: 1298 error = ifmedia_ioctl(ifp, ifr, &sc->ex_mii.mii_media, cmd); 1299 break; 1300 1301 case SIOCSIFFLAGS: 1302 if ((ifp->if_flags & IFF_UP) == 0 && 1303 (ifp->if_flags & IFF_RUNNING) != 0) { 1304 /* 1305 * If interface is marked down and it is running, then 1306 * stop it. 1307 */ 1308 ex_stop(sc); 1309 ifp->if_flags &= ~IFF_RUNNING; 1310 } else if ((ifp->if_flags & IFF_UP) != 0 && 1311 (ifp->if_flags & IFF_RUNNING) == 0) { 1312 /* 1313 * If interface is marked up and it is stopped, then 1314 * start it. 1315 */ 1316 ex_init(sc); 1317 } else if ((ifp->if_flags & IFF_UP) != 0) { 1318 /* 1319 * Deal with other flags that change hardware 1320 * state, i.e. IFF_PROMISC. 1321 */ 1322 ex_set_mc(sc); 1323 } 1324 break; 1325 1326 case SIOCADDMULTI: 1327 case SIOCDELMULTI: 1328 error = (cmd == SIOCADDMULTI) ? 1329 ether_addmulti(ifr, &sc->sc_ethercom) : 1330 ether_delmulti(ifr, &sc->sc_ethercom); 1331 1332 if (error == ENETRESET) { 1333 /* 1334 * Multicast list has changed; set the hardware filter 1335 * accordingly. 1336 */ 1337 ex_set_mc(sc); 1338 error = 0; 1339 } 1340 break; 1341 1342 default: 1343 error = EINVAL; 1344 break; 1345 } 1346 1347 splx(s); 1348 return (error); 1349 } 1350 1351 void 1352 ex_getstats(sc) 1353 struct ex_softc *sc; 1354 { 1355 bus_space_handle_t ioh = sc->sc_ioh; 1356 bus_space_tag_t iot = sc->sc_iot; 1357 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1358 u_int8_t upperok; 1359 1360 GO_WINDOW(6); 1361 upperok = bus_space_read_1(iot, ioh, UPPER_FRAMES_OK); 1362 ifp->if_ipackets += bus_space_read_1(iot, ioh, RX_FRAMES_OK); 1363 ifp->if_ipackets += (upperok & 0x03) << 8; 1364 ifp->if_opackets += bus_space_read_1(iot, ioh, TX_FRAMES_OK); 1365 ifp->if_opackets += (upperok & 0x30) << 4; 1366 ifp->if_ierrors += bus_space_read_1(iot, ioh, RX_OVERRUNS); 1367 ifp->if_collisions += bus_space_read_1(iot, ioh, TX_COLLISIONS); 1368 /* 1369 * There seems to be no way to get the exact number of collisions, 1370 * this is the number that occured at the very least. 1371 */ 1372 ifp->if_collisions += 2 * bus_space_read_1(iot, ioh, 1373 TX_AFTER_X_COLLISIONS); 1374 ifp->if_ibytes += bus_space_read_2(iot, ioh, RX_TOTAL_OK); 1375 ifp->if_obytes += bus_space_read_2(iot, ioh, TX_TOTAL_OK); 1376 1377 /* 1378 * Clear the following to avoid stats overflow interrupts 1379 */ 1380 bus_space_read_1(iot, ioh, TX_DEFERRALS); 1381 bus_space_read_1(iot, ioh, TX_AFTER_1_COLLISION); 1382 bus_space_read_1(iot, ioh, TX_NO_SQE); 1383 bus_space_read_1(iot, ioh, TX_CD_LOST); 1384 GO_WINDOW(4); 1385 bus_space_read_1(iot, ioh, ELINK_W4_BADSSD); 1386 upperok = bus_space_read_1(iot, ioh, ELINK_W4_UBYTESOK); 1387 ifp->if_ibytes += (upperok & 0x0f) << 16; 1388 ifp->if_obytes += (upperok & 0xf0) << 12; 1389 GO_WINDOW(1); 1390 } 1391 1392 void 1393 ex_printstats(sc) 1394 struct ex_softc *sc; 1395 { 1396 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1397 1398 ex_getstats(sc); 1399 printf("in %llu out %llu ierror %llu oerror %llu ibytes %llu obytes " 1400 "%llu\n", (unsigned long long)ifp->if_ipackets, 1401 (unsigned long long)ifp->if_opackets, 1402 (unsigned long long)ifp->if_ierrors, 1403 (unsigned long long)ifp->if_oerrors, 1404 (unsigned long long)ifp->if_ibytes, 1405 (unsigned long long)ifp->if_obytes); 1406 } 1407 1408 void 1409 ex_tick(arg) 1410 void *arg; 1411 { 1412 struct ex_softc *sc = arg; 1413 int s; 1414 1415 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1416 return; 1417 1418 s = splnet(); 1419 1420 if (sc->ex_conf & EX_CONF_MII) 1421 mii_tick(&sc->ex_mii); 1422 1423 if (!(bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, ELINK_STATUS) 1424 & S_COMMAND_IN_PROGRESS)) 1425 ex_getstats(sc); 1426 1427 splx(s); 1428 1429 callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc); 1430 } 1431 1432 void 1433 ex_reset(sc) 1434 struct ex_softc *sc; 1435 { 1436 u_int16_t val = GLOBAL_RESET; 1437 1438 if (sc->ex_conf & EX_CONF_RESETHACK) 1439 val |= 0xff; 1440 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, val); 1441 delay(400); 1442 ex_waitcmd(sc); 1443 } 1444 1445 void 1446 ex_watchdog(ifp) 1447 struct ifnet *ifp; 1448 { 1449 struct ex_softc *sc = ifp->if_softc; 1450 1451 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1452 ++sc->sc_ethercom.ec_if.if_oerrors; 1453 1454 ex_reset(sc); 1455 ex_init(sc); 1456 } 1457 1458 void 1459 ex_stop(sc) 1460 struct ex_softc *sc; 1461 { 1462 bus_space_tag_t iot = sc->sc_iot; 1463 bus_space_handle_t ioh = sc->sc_ioh; 1464 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1465 struct ex_txdesc *tx; 1466 struct ex_rxdesc *rx; 1467 int i; 1468 1469 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1470 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1471 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1472 1473 for (tx = sc->tx_head ; tx != NULL; tx = tx->tx_next) { 1474 if (tx->tx_mbhead == NULL) 1475 continue; 1476 m_freem(tx->tx_mbhead); 1477 tx->tx_mbhead = NULL; 1478 bus_dmamap_unload(sc->sc_dmat, tx->tx_dmamap); 1479 tx->tx_dpd->dpd_fsh = tx->tx_dpd->dpd_nextptr = 0; 1480 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1481 ((caddr_t)tx->tx_dpd - (caddr_t)sc->sc_dpd), 1482 sizeof (struct ex_dpd), 1483 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1484 } 1485 sc->tx_tail = sc->tx_head = NULL; 1486 ex_init_txdescs(sc); 1487 1488 sc->rx_tail = sc->rx_head = 0; 1489 for (i = 0; i < EX_NUPD; i++) { 1490 rx = &sc->sc_rxdescs[i]; 1491 if (rx->rx_mbhead != NULL) { 1492 bus_dmamap_unload(sc->sc_dmat, rx->rx_dmamap); 1493 m_freem(rx->rx_mbhead); 1494 rx->rx_mbhead = NULL; 1495 } 1496 ex_add_rxbuf(sc, rx); 1497 } 1498 1499 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1500 1501 callout_stop(&sc->ex_mii_callout); 1502 if (sc->ex_conf & EX_CONF_MII) 1503 mii_down(&sc->ex_mii); 1504 1505 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1506 ifp->if_timer = 0; 1507 } 1508 1509 static void 1510 ex_init_txdescs(sc) 1511 struct ex_softc *sc; 1512 { 1513 int i; 1514 1515 for (i = 0; i < EX_NDPD; i++) { 1516 sc->sc_txdescs[i].tx_dmamap = sc->sc_tx_dmamaps[i]; 1517 sc->sc_txdescs[i].tx_dpd = &sc->sc_dpd[i]; 1518 if (i < EX_NDPD - 1) 1519 sc->sc_txdescs[i].tx_next = &sc->sc_txdescs[i + 1]; 1520 else 1521 sc->sc_txdescs[i].tx_next = NULL; 1522 } 1523 sc->tx_free = &sc->sc_txdescs[0]; 1524 sc->tx_ftail = &sc->sc_txdescs[EX_NDPD-1]; 1525 } 1526 1527 1528 int 1529 ex_activate(self, act) 1530 struct device *self; 1531 enum devact act; 1532 { 1533 struct ex_softc *sc = (void *) self; 1534 int s, error = 0; 1535 1536 s = splnet(); 1537 switch (act) { 1538 case DVACT_ACTIVATE: 1539 error = EOPNOTSUPP; 1540 break; 1541 1542 case DVACT_DEACTIVATE: 1543 if (sc->ex_conf & EX_CONF_MII) 1544 mii_activate(&sc->ex_mii, act, MII_PHY_ANY, 1545 MII_OFFSET_ANY); 1546 if_deactivate(&sc->sc_ethercom.ec_if); 1547 break; 1548 } 1549 splx(s); 1550 1551 return (error); 1552 } 1553 1554 int 1555 ex_detach(sc) 1556 struct ex_softc *sc; 1557 { 1558 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1559 struct ex_rxdesc *rxd; 1560 int i; 1561 1562 /* Succeed now if there's no work to do. */ 1563 if ((sc->ex_flags & EX_FLAGS_ATTACHED) == 0) 1564 return (0); 1565 1566 /* Unhook our tick handler. */ 1567 callout_stop(&sc->ex_mii_callout); 1568 1569 if (sc->ex_conf & EX_CONF_MII) { 1570 /* Detach all PHYs */ 1571 mii_detach(&sc->ex_mii, MII_PHY_ANY, MII_OFFSET_ANY); 1572 } 1573 1574 /* Delete all remaining media. */ 1575 ifmedia_delete_instance(&sc->ex_mii.mii_media, IFM_INST_ANY); 1576 1577 #if NRND > 0 1578 rnd_detach_source(&sc->rnd_source); 1579 #endif 1580 #if NBPFILTER > 0 1581 bpfdetach(ifp); 1582 #endif 1583 ether_ifdetach(ifp); 1584 if_detach(ifp); 1585 1586 for (i = 0; i < EX_NUPD; i++) { 1587 rxd = &sc->sc_rxdescs[i]; 1588 if (rxd->rx_mbhead != NULL) { 1589 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap); 1590 m_freem(rxd->rx_mbhead); 1591 rxd->rx_mbhead = NULL; 1592 } 1593 } 1594 for (i = 0; i < EX_NUPD; i++) 1595 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]); 1596 for (i = 0; i < EX_NDPD; i++) 1597 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]); 1598 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap); 1599 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap); 1600 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd, 1601 EX_NDPD * sizeof (struct ex_dpd)); 1602 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg); 1603 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap); 1604 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap); 1605 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd, 1606 EX_NUPD * sizeof (struct ex_upd)); 1607 bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg); 1608 1609 shutdownhook_disestablish(sc->sc_sdhook); 1610 1611 return (0); 1612 } 1613 1614 /* 1615 * Before reboots, reset card completely. 1616 */ 1617 static void 1618 ex_shutdown(arg) 1619 void *arg; 1620 { 1621 struct ex_softc *sc = arg; 1622 1623 ex_stop(sc); 1624 } 1625 1626 /* 1627 * Read EEPROM data. 1628 * XXX what to do if EEPROM doesn't unbusy? 1629 */ 1630 u_int16_t 1631 ex_read_eeprom(sc, offset) 1632 struct ex_softc *sc; 1633 int offset; 1634 { 1635 bus_space_tag_t iot = sc->sc_iot; 1636 bus_space_handle_t ioh = sc->sc_ioh; 1637 u_int16_t data = 0, cmd = READ_EEPROM; 1638 int off; 1639 1640 off = sc->ex_conf & EX_CONF_EEPROM_OFF ? 0x30 : 0; 1641 cmd = sc->ex_conf & EX_CONF_EEPROM_8BIT ? READ_EEPROM8 : READ_EEPROM; 1642 1643 GO_WINDOW(0); 1644 if (ex_eeprom_busy(sc)) 1645 goto out; 1646 bus_space_write_2(iot, ioh, ELINK_W0_EEPROM_COMMAND, 1647 cmd | (off + (offset & 0x3f))); 1648 if (ex_eeprom_busy(sc)) 1649 goto out; 1650 data = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_DATA); 1651 out: 1652 return data; 1653 } 1654 1655 static int 1656 ex_eeprom_busy(sc) 1657 struct ex_softc *sc; 1658 { 1659 bus_space_tag_t iot = sc->sc_iot; 1660 bus_space_handle_t ioh = sc->sc_ioh; 1661 int i = 100; 1662 1663 while (i--) { 1664 if (!(bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND) & 1665 EEPROM_BUSY)) 1666 return 0; 1667 delay(100); 1668 } 1669 printf("\n%s: eeprom stays busy.\n", sc->sc_dev.dv_xname); 1670 return (1); 1671 } 1672 1673 /* 1674 * Create a new rx buffer and add it to the 'soft' rx list. 1675 */ 1676 static int 1677 ex_add_rxbuf(sc, rxd) 1678 struct ex_softc *sc; 1679 struct ex_rxdesc *rxd; 1680 { 1681 struct mbuf *m, *oldm; 1682 bus_dmamap_t rxmap; 1683 int error, rval = 0; 1684 1685 oldm = rxd->rx_mbhead; 1686 rxmap = rxd->rx_dmamap; 1687 1688 MGETHDR(m, M_DONTWAIT, MT_DATA); 1689 if (m != NULL) { 1690 MCLGET(m, M_DONTWAIT); 1691 if ((m->m_flags & M_EXT) == 0) { 1692 m_freem(m); 1693 if (oldm == NULL) 1694 return 1; 1695 m = oldm; 1696 m->m_data = m->m_ext.ext_buf; 1697 rval = 1; 1698 } 1699 } else { 1700 if (oldm == NULL) 1701 return 1; 1702 m = oldm; 1703 m->m_data = m->m_ext.ext_buf; 1704 rval = 1; 1705 } 1706 1707 /* 1708 * Setup the DMA map for this receive buffer. 1709 */ 1710 if (m != oldm) { 1711 if (oldm != NULL) 1712 bus_dmamap_unload(sc->sc_dmat, rxmap); 1713 error = bus_dmamap_load(sc->sc_dmat, rxmap, 1714 m->m_ext.ext_buf, MCLBYTES, NULL, BUS_DMA_NOWAIT); 1715 if (error) { 1716 printf("%s: can't load rx buffer, error = %d\n", 1717 sc->sc_dev.dv_xname, error); 1718 panic("ex_add_rxbuf"); /* XXX */ 1719 } 1720 } 1721 1722 /* 1723 * Align for data after 14 byte header. 1724 */ 1725 m->m_data += 2; 1726 1727 rxd->rx_mbhead = m; 1728 rxd->rx_upd->upd_pktstatus = htole32(MCLBYTES - 2); 1729 rxd->rx_upd->upd_frags[0].fr_addr = 1730 htole32(rxmap->dm_segs[0].ds_addr + 2); 1731 rxd->rx_upd->upd_nextptr = 0; 1732 1733 /* 1734 * Attach it to the end of the list. 1735 */ 1736 if (sc->rx_head != NULL) { 1737 sc->rx_tail->rx_next = rxd; 1738 sc->rx_tail->rx_upd->upd_nextptr = htole32(sc->sc_upddma + 1739 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd)); 1740 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1741 (caddr_t)sc->rx_tail->rx_upd - (caddr_t)sc->sc_upd, 1742 sizeof (struct ex_upd), 1743 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1744 } else { 1745 sc->rx_head = rxd; 1746 } 1747 sc->rx_tail = rxd; 1748 1749 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, rxmap->dm_mapsize, 1750 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1751 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1752 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd), 1753 sizeof (struct ex_upd), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1754 return (rval); 1755 } 1756 1757 u_int32_t 1758 ex_mii_bitbang_read(self) 1759 struct device *self; 1760 { 1761 struct ex_softc *sc = (void *) self; 1762 1763 /* We're already in Window 4. */ 1764 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT)); 1765 } 1766 1767 void 1768 ex_mii_bitbang_write(self, val) 1769 struct device *self; 1770 u_int32_t val; 1771 { 1772 struct ex_softc *sc = (void *) self; 1773 1774 /* We're already in Window 4. */ 1775 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT, val); 1776 } 1777 1778 int 1779 ex_mii_readreg(v, phy, reg) 1780 struct device *v; 1781 int phy, reg; 1782 { 1783 struct ex_softc *sc = (struct ex_softc *)v; 1784 int val; 1785 1786 if ((sc->ex_conf & EX_CONF_INTPHY) && phy != ELINK_INTPHY_ID) 1787 return 0; 1788 1789 GO_WINDOW(4); 1790 1791 val = mii_bitbang_readreg(v, &ex_mii_bitbang_ops, phy, reg); 1792 1793 GO_WINDOW(1); 1794 1795 return (val); 1796 } 1797 1798 void 1799 ex_mii_writereg(v, phy, reg, data) 1800 struct device *v; 1801 int phy; 1802 int reg; 1803 int data; 1804 { 1805 struct ex_softc *sc = (struct ex_softc *)v; 1806 1807 GO_WINDOW(4); 1808 1809 mii_bitbang_writereg(v, &ex_mii_bitbang_ops, phy, reg, data); 1810 1811 GO_WINDOW(1); 1812 } 1813 1814 void 1815 ex_mii_statchg(v) 1816 struct device *v; 1817 { 1818 struct ex_softc *sc = (struct ex_softc *)v; 1819 bus_space_tag_t iot = sc->sc_iot; 1820 bus_space_handle_t ioh = sc->sc_ioh; 1821 int mctl; 1822 1823 GO_WINDOW(3); 1824 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1825 if (sc->ex_mii.mii_media_active & IFM_FDX) 1826 mctl |= MAC_CONTROL_FDX; 1827 else 1828 mctl &= ~MAC_CONTROL_FDX; 1829 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1830 GO_WINDOW(1); /* back to operating window */ 1831 } 1832
Indexes created Thu Oct 23 22:10:10 GMT 2025