elinkxl.c revision 1.46
1 /* $NetBSD: elinkxl.c,v 1.46 2000/12/14 06:27:25 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Frank van der Linden. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include "opt_inet.h" 40 #include "opt_ns.h" 41 #include "bpfilter.h" 42 #include "rnd.h" 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/callout.h> 47 #include <sys/kernel.h> 48 #include <sys/mbuf.h> 49 #include <sys/socket.h> 50 #include <sys/ioctl.h> 51 #include <sys/errno.h> 52 #include <sys/syslog.h> 53 #include <sys/select.h> 54 #include <sys/device.h> 55 #if NRND > 0 56 #include <sys/rnd.h> 57 #endif 58 59 #include <uvm/uvm_extern.h> 60 61 #include <net/if.h> 62 #include <net/if_dl.h> 63 #include <net/if_ether.h> 64 #include <net/if_media.h> 65 66 #ifdef INET 67 #include <netinet/in.h> 68 #include <netinet/in_systm.h> 69 #include <netinet/in_var.h> 70 #include <netinet/ip.h> 71 #include <netinet/if_inarp.h> 72 #endif 73 74 #ifdef NS 75 #include <netns/ns.h> 76 #include <netns/ns_if.h> 77 #endif 78 79 #if NBPFILTER > 0 80 #include <net/bpf.h> 81 #include <net/bpfdesc.h> 82 #endif 83 84 #include <machine/cpu.h> 85 #include <machine/bus.h> 86 #include <machine/intr.h> 87 #include <machine/endian.h> 88 89 #include <dev/mii/miivar.h> 90 #include <dev/mii/mii.h> 91 #include <dev/mii/mii_bitbang.h> 92 93 #include <dev/ic/elink3reg.h> 94 /* #include <dev/ic/elink3var.h> */ 95 #include <dev/ic/elinkxlreg.h> 96 #include <dev/ic/elinkxlvar.h> 97 98 #ifdef DEBUG 99 int exdebug = 0; 100 #endif 101 102 /* ifmedia callbacks */ 103 int ex_media_chg __P((struct ifnet *ifp)); 104 void ex_media_stat __P((struct ifnet *ifp, struct ifmediareq *req)); 105 106 void ex_probe_media __P((struct ex_softc *)); 107 void ex_set_filter __P((struct ex_softc *)); 108 void ex_set_media __P((struct ex_softc *)); 109 struct mbuf *ex_get __P((struct ex_softc *, int)); 110 u_int16_t ex_read_eeprom __P((struct ex_softc *, int)); 111 int ex_init __P((struct ifnet *)); 112 void ex_read __P((struct ex_softc *)); 113 void ex_reset __P((struct ex_softc *)); 114 void ex_set_mc __P((struct ex_softc *)); 115 void ex_getstats __P((struct ex_softc *)); 116 void ex_printstats __P((struct ex_softc *)); 117 void ex_tick __P((void *)); 118 119 static int ex_eeprom_busy __P((struct ex_softc *)); 120 static int ex_add_rxbuf __P((struct ex_softc *, struct ex_rxdesc *)); 121 static void ex_init_txdescs __P((struct ex_softc *)); 122 123 static void ex_shutdown __P((void *)); 124 static void ex_start __P((struct ifnet *)); 125 static void ex_txstat __P((struct ex_softc *)); 126 127 int ex_mii_readreg __P((struct device *, int, int)); 128 void ex_mii_writereg __P((struct device *, int, int, int)); 129 void ex_mii_statchg __P((struct device *)); 130 131 void ex_probemedia __P((struct ex_softc *)); 132 133 /* 134 * Structure to map media-present bits in boards to ifmedia codes and 135 * printable media names. Used for table-driven ifmedia initialization. 136 */ 137 struct ex_media { 138 int exm_mpbit; /* media present bit */ 139 const char *exm_name; /* name of medium */ 140 int exm_ifmedia; /* ifmedia word for medium */ 141 int exm_epmedia; /* ELINKMEDIA_* constant */ 142 }; 143 144 /* 145 * Media table for 3c90x chips. Note that chips with MII have no 146 * `native' media. 147 */ 148 struct ex_media ex_native_media[] = { 149 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 150 ELINKMEDIA_10BASE_T }, 151 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 152 ELINKMEDIA_10BASE_T }, 153 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 154 ELINKMEDIA_AUI }, 155 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 156 ELINKMEDIA_10BASE_2 }, 157 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 158 ELINKMEDIA_100BASE_TX }, 159 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 160 ELINKMEDIA_100BASE_TX }, 161 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 162 ELINKMEDIA_100BASE_FX }, 163 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 164 ELINKMEDIA_MII }, 165 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 166 ELINKMEDIA_100BASE_T4 }, 167 { 0, NULL, 0, 168 0 }, 169 }; 170 171 /* 172 * MII bit-bang glue. 173 */ 174 u_int32_t ex_mii_bitbang_read __P((struct device *)); 175 void ex_mii_bitbang_write __P((struct device *, u_int32_t)); 176 177 const struct mii_bitbang_ops ex_mii_bitbang_ops = { 178 ex_mii_bitbang_read, 179 ex_mii_bitbang_write, 180 { 181 ELINK_PHY_DATA, /* MII_BIT_MDO */ 182 ELINK_PHY_DATA, /* MII_BIT_MDI */ 183 ELINK_PHY_CLK, /* MII_BIT_MDC */ 184 ELINK_PHY_DIR, /* MII_BIT_DIR_HOST_PHY */ 185 0, /* MII_BIT_DIR_PHY_HOST */ 186 } 187 }; 188 189 /* 190 * Back-end attach and configure. 191 */ 192 void 193 ex_config(sc) 194 struct ex_softc *sc; 195 { 196 struct ifnet *ifp; 197 u_int16_t val; 198 u_int8_t macaddr[ETHER_ADDR_LEN] = {0}; 199 bus_space_tag_t iot = sc->sc_iot; 200 bus_space_handle_t ioh = sc->sc_ioh; 201 int i, error, attach_stage; 202 203 callout_init(&sc->ex_mii_callout); 204 205 ex_reset(sc); 206 207 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR0); 208 macaddr[0] = val >> 8; 209 macaddr[1] = val & 0xff; 210 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR1); 211 macaddr[2] = val >> 8; 212 macaddr[3] = val & 0xff; 213 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR2); 214 macaddr[4] = val >> 8; 215 macaddr[5] = val & 0xff; 216 217 printf("%s: MAC address %s\n", sc->sc_dev.dv_xname, 218 ether_sprintf(macaddr)); 219 220 if (sc->ex_conf & (EX_CONF_INV_LED_POLARITY|EX_CONF_PHY_POWER)) { 221 GO_WINDOW(2); 222 val = bus_space_read_2(iot, ioh, ELINK_W2_RESET_OPTIONS); 223 if (sc->ex_conf & EX_CONF_INV_LED_POLARITY) 224 val |= ELINK_RESET_OPT_LEDPOLAR; 225 if (sc->ex_conf & EX_CONF_PHY_POWER) 226 val |= ELINK_RESET_OPT_PHYPOWER; 227 bus_space_write_2(iot, ioh, ELINK_W2_RESET_OPTIONS, val); 228 } 229 230 attach_stage = 0; 231 232 /* 233 * Allocate the upload descriptors, and create and load the DMA 234 * map for them. 235 */ 236 if ((error = bus_dmamem_alloc(sc->sc_dmat, 237 EX_NUPD * sizeof (struct ex_upd), PAGE_SIZE, 0, &sc->sc_useg, 1, 238 &sc->sc_urseg, BUS_DMA_NOWAIT)) != 0) { 239 printf("%s: can't allocate upload descriptors, error = %d\n", 240 sc->sc_dev.dv_xname, error); 241 goto fail; 242 } 243 244 attach_stage = 1; 245 246 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg, 247 EX_NUPD * sizeof (struct ex_upd), (caddr_t *)&sc->sc_upd, 248 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 249 printf("%s: can't map upload descriptors, error = %d\n", 250 sc->sc_dev.dv_xname, error); 251 goto fail; 252 } 253 254 attach_stage = 2; 255 256 if ((error = bus_dmamap_create(sc->sc_dmat, 257 EX_NUPD * sizeof (struct ex_upd), 1, 258 EX_NUPD * sizeof (struct ex_upd), 0, BUS_DMA_NOWAIT, 259 &sc->sc_upd_dmamap)) != 0) { 260 printf("%s: can't create upload desc. DMA map, error = %d\n", 261 sc->sc_dev.dv_xname, error); 262 goto fail; 263 } 264 265 attach_stage = 3; 266 267 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_upd_dmamap, 268 sc->sc_upd, EX_NUPD * sizeof (struct ex_upd), NULL, 269 BUS_DMA_NOWAIT)) != 0) { 270 printf("%s: can't load upload desc. DMA map, error = %d\n", 271 sc->sc_dev.dv_xname, error); 272 goto fail; 273 } 274 275 attach_stage = 4; 276 277 /* 278 * Allocate the download descriptors, and create and load the DMA 279 * map for them. 280 */ 281 if ((error = bus_dmamem_alloc(sc->sc_dmat, 282 EX_NDPD * sizeof (struct ex_dpd), PAGE_SIZE, 0, &sc->sc_dseg, 1, 283 &sc->sc_drseg, BUS_DMA_NOWAIT)) != 0) { 284 printf("%s: can't allocate download descriptors, error = %d\n", 285 sc->sc_dev.dv_xname, error); 286 goto fail; 287 } 288 289 attach_stage = 5; 290 291 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg, 292 EX_NDPD * sizeof (struct ex_dpd), (caddr_t *)&sc->sc_dpd, 293 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 294 printf("%s: can't map download descriptors, error = %d\n", 295 sc->sc_dev.dv_xname, error); 296 goto fail; 297 } 298 bzero(sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd)); 299 300 attach_stage = 6; 301 302 if ((error = bus_dmamap_create(sc->sc_dmat, 303 EX_NDPD * sizeof (struct ex_dpd), 1, 304 EX_NDPD * sizeof (struct ex_dpd), 0, BUS_DMA_NOWAIT, 305 &sc->sc_dpd_dmamap)) != 0) { 306 printf("%s: can't create download desc. DMA map, error = %d\n", 307 sc->sc_dev.dv_xname, error); 308 goto fail; 309 } 310 311 attach_stage = 7; 312 313 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dpd_dmamap, 314 sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd), NULL, 315 BUS_DMA_NOWAIT)) != 0) { 316 printf("%s: can't load download desc. DMA map, error = %d\n", 317 sc->sc_dev.dv_xname, error); 318 goto fail; 319 } 320 321 attach_stage = 8; 322 323 324 /* 325 * Create the transmit buffer DMA maps. 326 */ 327 for (i = 0; i < EX_NDPD; i++) { 328 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 329 EX_NTFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 330 &sc->sc_tx_dmamaps[i])) != 0) { 331 printf("%s: can't create tx DMA map %d, error = %d\n", 332 sc->sc_dev.dv_xname, i, error); 333 goto fail; 334 } 335 } 336 337 attach_stage = 9; 338 339 /* 340 * Create the receive buffer DMA maps. 341 */ 342 for (i = 0; i < EX_NUPD; i++) { 343 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 344 EX_NRFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 345 &sc->sc_rx_dmamaps[i])) != 0) { 346 printf("%s: can't create rx DMA map %d, error = %d\n", 347 sc->sc_dev.dv_xname, i, error); 348 goto fail; 349 } 350 } 351 352 attach_stage = 10; 353 354 /* 355 * Create ring of upload descriptors, only once. The DMA engine 356 * will loop over this when receiving packets, stalling if it 357 * hits an UPD with a finished receive. 358 */ 359 for (i = 0; i < EX_NUPD; i++) { 360 sc->sc_rxdescs[i].rx_dmamap = sc->sc_rx_dmamaps[i]; 361 sc->sc_rxdescs[i].rx_upd = &sc->sc_upd[i]; 362 sc->sc_upd[i].upd_frags[0].fr_len = 363 htole32((MCLBYTES - 2) | EX_FR_LAST); 364 if (ex_add_rxbuf(sc, &sc->sc_rxdescs[i]) != 0) { 365 printf("%s: can't allocate or map rx buffers\n", 366 sc->sc_dev.dv_xname); 367 goto fail; 368 } 369 } 370 371 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 0, 372 EX_NUPD * sizeof (struct ex_upd), 373 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 374 375 ex_init_txdescs(sc); 376 377 attach_stage = 11; 378 379 380 GO_WINDOW(3); 381 val = bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS); 382 if (val & ELINK_MEDIACAP_MII) 383 sc->ex_conf |= EX_CONF_MII; 384 385 ifp = &sc->sc_ethercom.ec_if; 386 387 /* 388 * Initialize our media structures and MII info. We'll 389 * probe the MII if we discover that we have one. 390 */ 391 sc->ex_mii.mii_ifp = ifp; 392 sc->ex_mii.mii_readreg = ex_mii_readreg; 393 sc->ex_mii.mii_writereg = ex_mii_writereg; 394 sc->ex_mii.mii_statchg = ex_mii_statchg; 395 ifmedia_init(&sc->ex_mii.mii_media, 0, ex_media_chg, 396 ex_media_stat); 397 398 if (sc->ex_conf & EX_CONF_MII) { 399 /* 400 * Find PHY, extract media information from it. 401 * First, select the right transceiver. 402 */ 403 u_int32_t icfg; 404 405 GO_WINDOW(3); 406 icfg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 407 icfg &= ~(CONFIG_XCVR_SEL << 16); 408 if (val & (ELINK_MEDIACAP_MII | ELINK_MEDIACAP_100BASET4)) 409 icfg |= ELINKMEDIA_MII << (CONFIG_XCVR_SEL_SHIFT + 16); 410 if (val & ELINK_MEDIACAP_100BASETX) 411 icfg |= ELINKMEDIA_AUTO << (CONFIG_XCVR_SEL_SHIFT + 16); 412 if (val & ELINK_MEDIACAP_100BASEFX) 413 icfg |= ELINKMEDIA_100BASE_FX 414 << (CONFIG_XCVR_SEL_SHIFT + 16); 415 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, icfg); 416 417 mii_attach(&sc->sc_dev, &sc->ex_mii, 0xffffffff, 418 MII_PHY_ANY, MII_OFFSET_ANY, 0); 419 if (LIST_FIRST(&sc->ex_mii.mii_phys) == NULL) { 420 ifmedia_add(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE, 421 0, NULL); 422 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE); 423 } else { 424 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_AUTO); 425 } 426 } else 427 ex_probemedia(sc); 428 429 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 430 ifp->if_softc = sc; 431 ifp->if_start = ex_start; 432 ifp->if_ioctl = ex_ioctl; 433 ifp->if_watchdog = ex_watchdog; 434 ifp->if_init = ex_init; 435 ifp->if_stop = ex_stop; 436 ifp->if_flags = 437 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 438 IFQ_SET_READY(&ifp->if_snd); 439 440 /* 441 * We can support 802.1Q VLAN-sized frames. 442 */ 443 sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU; 444 445 if_attach(ifp); 446 ether_ifattach(ifp, macaddr); 447 448 GO_WINDOW(1); 449 450 sc->tx_start_thresh = 20; 451 sc->tx_succ_ok = 0; 452 453 /* TODO: set queues to 0 */ 454 455 #if NRND > 0 456 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 457 RND_TYPE_NET, 0); 458 #endif 459 460 /* Establish callback to reset card when we reboot. */ 461 sc->sc_sdhook = shutdownhook_establish(ex_shutdown, sc); 462 463 /* The attach is successful. */ 464 sc->ex_flags |= EX_FLAGS_ATTACHED; 465 return; 466 467 fail: 468 /* 469 * Free any resources we've allocated during the failed attach 470 * attempt. Do this in reverse order and fall though. 471 */ 472 switch (attach_stage) { 473 case 11: 474 { 475 struct ex_rxdesc *rxd; 476 477 for (i = 0; i < EX_NUPD; i++) { 478 rxd = &sc->sc_rxdescs[i]; 479 if (rxd->rx_mbhead != NULL) { 480 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap); 481 m_freem(rxd->rx_mbhead); 482 } 483 } 484 } 485 /* FALLTHROUGH */ 486 487 case 10: 488 for (i = 0; i < EX_NUPD; i++) 489 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]); 490 /* FALLTHROUGH */ 491 492 case 9: 493 for (i = 0; i < EX_NDPD; i++) 494 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]); 495 /* FALLTHROUGH */ 496 case 8: 497 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap); 498 /* FALLTHROUGH */ 499 500 case 7: 501 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap); 502 /* FALLTHROUGH */ 503 504 case 6: 505 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd, 506 EX_NDPD * sizeof (struct ex_dpd)); 507 /* FALLTHROUGH */ 508 509 case 5: 510 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg); 511 break; 512 513 case 4: 514 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap); 515 /* FALLTHROUGH */ 516 517 case 3: 518 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap); 519 /* FALLTHROUGH */ 520 521 case 2: 522 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd, 523 EX_NUPD * sizeof (struct ex_upd)); 524 /* FALLTHROUGH */ 525 526 case 1: 527 bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg); 528 break; 529 } 530 531 } 532 533 /* 534 * Find the media present on non-MII chips. 535 */ 536 void 537 ex_probemedia(sc) 538 struct ex_softc *sc; 539 { 540 bus_space_tag_t iot = sc->sc_iot; 541 bus_space_handle_t ioh = sc->sc_ioh; 542 struct ifmedia *ifm = &sc->ex_mii.mii_media; 543 struct ex_media *exm; 544 u_int16_t config1, reset_options, default_media; 545 int defmedia = 0; 546 const char *sep = "", *defmedianame = NULL; 547 548 GO_WINDOW(3); 549 config1 = bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2); 550 reset_options = bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 551 GO_WINDOW(0); 552 553 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 554 555 printf("%s: ", sc->sc_dev.dv_xname); 556 557 /* Sanity check that there are any media! */ 558 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 559 printf("no media present!\n"); 560 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 561 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 562 return; 563 } 564 565 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 566 567 for (exm = ex_native_media; exm->exm_name != NULL; exm++) { 568 if (reset_options & exm->exm_mpbit) { 569 /* 570 * Default media is a little complicated. We 571 * support full-duplex which uses the same 572 * reset options bit. 573 * 574 * XXX Check EEPROM for default to FDX? 575 */ 576 if (exm->exm_epmedia == default_media) { 577 if ((exm->exm_ifmedia & IFM_FDX) == 0) { 578 defmedia = exm->exm_ifmedia; 579 defmedianame = exm->exm_name; 580 } 581 } else if (defmedia == 0) { 582 defmedia = exm->exm_ifmedia; 583 defmedianame = exm->exm_name; 584 } 585 ifmedia_add(ifm, exm->exm_ifmedia, exm->exm_epmedia, 586 NULL); 587 PRINT(exm->exm_name); 588 } 589 } 590 591 #undef PRINT 592 593 #ifdef DIAGNOSTIC 594 if (defmedia == 0) 595 panic("ex_probemedia: impossible"); 596 #endif 597 598 printf(", default %s\n", defmedianame); 599 ifmedia_set(ifm, defmedia); 600 } 601 602 /* 603 * Bring device up. 604 */ 605 int 606 ex_init(ifp) 607 struct ifnet *ifp; 608 { 609 struct ex_softc *sc = ifp->if_softc; 610 bus_space_tag_t iot = sc->sc_iot; 611 bus_space_handle_t ioh = sc->sc_ioh; 612 int s, i; 613 614 s = splnet(); 615 616 ex_waitcmd(sc); 617 ex_stop(ifp, 0); 618 619 /* 620 * Set the station address and clear the station mask. The latter 621 * is needed for 90x cards, 0 is the default for 90xB cards. 622 */ 623 GO_WINDOW(2); 624 for (i = 0; i < ETHER_ADDR_LEN; i++) { 625 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 626 LLADDR(ifp->if_sadl)[i]); 627 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 628 } 629 630 GO_WINDOW(3); 631 632 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_RESET); 633 ex_waitcmd(sc); 634 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_RESET); 635 ex_waitcmd(sc); 636 637 /* 638 * Disable reclaim threshold for 90xB, set free threshold to 639 * 6 * 256 = 1536 for 90x. 640 */ 641 if (sc->ex_conf & EX_CONF_90XB) 642 bus_space_write_2(iot, ioh, ELINK_COMMAND, 643 ELINK_TXRECLTHRESH | 255); 644 else 645 bus_space_write_1(iot, ioh, ELINK_TXFREETHRESH, 6); 646 647 bus_space_write_2(iot, ioh, ELINK_COMMAND, 648 SET_RX_EARLY_THRESH | ELINK_THRESH_DISABLE); 649 650 bus_space_write_4(iot, ioh, ELINK_DMACTRL, 651 bus_space_read_4(iot, ioh, ELINK_DMACTRL) | ELINK_DMAC_UPRXEAREN); 652 653 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK | S_MASK); 654 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK | S_MASK); 655 656 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 657 if (sc->intr_ack) 658 (* sc->intr_ack)(sc); 659 ex_set_media(sc); 660 ex_set_mc(sc); 661 662 663 bus_space_write_2(iot, ioh, ELINK_COMMAND, STATS_ENABLE); 664 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 665 bus_space_write_4(iot, ioh, ELINK_UPLISTPTR, sc->sc_upddma); 666 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 667 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_UPUNSTALL); 668 669 if (sc->ex_conf & (EX_CONF_PHY_POWER | EX_CONF_INV_LED_POLARITY)) { 670 u_int16_t cbcard_config; 671 672 GO_WINDOW(2); 673 cbcard_config = bus_space_read_2(sc->sc_iot, sc->sc_ioh, 0x0c); 674 if (sc->ex_conf & EX_CONF_PHY_POWER) { 675 cbcard_config |= 0x4000; /* turn on PHY power */ 676 } 677 if (sc->ex_conf & EX_CONF_INV_LED_POLARITY) { 678 cbcard_config |= 0x0010; /* invert LED polarity */ 679 } 680 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 0x0c, cbcard_config); 681 682 GO_WINDOW(3); 683 } 684 685 ifp->if_flags |= IFF_RUNNING; 686 ifp->if_flags &= ~IFF_OACTIVE; 687 ex_start(ifp); 688 689 GO_WINDOW(1); 690 691 splx(s); 692 693 callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc); 694 695 return (0); 696 } 697 698 #define ex_mchash(addr) (ether_crc32_be((addr), ETHER_ADDR_LEN) & 0xff) 699 700 /* 701 * Set multicast receive filter. Also take care of promiscuous mode 702 * here (XXX). 703 */ 704 void 705 ex_set_mc(sc) 706 struct ex_softc *sc; 707 { 708 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 709 struct ethercom *ec = &sc->sc_ethercom; 710 struct ether_multi *enm; 711 struct ether_multistep estep; 712 int i; 713 u_int16_t mask = FIL_INDIVIDUAL | FIL_BRDCST; 714 715 if (ifp->if_flags & IFF_PROMISC) 716 mask |= FIL_PROMISC; 717 718 if (!(ifp->if_flags & IFF_MULTICAST)) 719 goto out; 720 721 if (!(sc->ex_conf & EX_CONF_90XB) || ifp->if_flags & IFF_ALLMULTI) { 722 mask |= (ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0; 723 } else { 724 ETHER_FIRST_MULTI(estep, ec, enm); 725 while (enm != NULL) { 726 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 727 ETHER_ADDR_LEN) != 0) 728 goto out; 729 i = ex_mchash(enm->enm_addrlo); 730 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 731 ELINK_COMMAND, ELINK_SETHASHFILBIT | i); 732 ETHER_NEXT_MULTI(estep, enm); 733 } 734 mask |= FIL_MULTIHASH; 735 } 736 out: 737 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 738 SET_RX_FILTER | mask); 739 } 740 741 742 static void 743 ex_txstat(sc) 744 struct ex_softc *sc; 745 { 746 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 747 bus_space_tag_t iot = sc->sc_iot; 748 bus_space_handle_t ioh = sc->sc_ioh; 749 int i; 750 751 /* 752 * We need to read+write TX_STATUS until we get a 0 status 753 * in order to turn off the interrupt flag. 754 */ 755 while ((i = bus_space_read_1(iot, ioh, ELINK_TXSTATUS)) & TXS_COMPLETE) { 756 bus_space_write_1(iot, ioh, ELINK_TXSTATUS, 0x0); 757 758 if (i & TXS_JABBER) { 759 ++sc->sc_ethercom.ec_if.if_oerrors; 760 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 761 printf("%s: jabber (%x)\n", 762 sc->sc_dev.dv_xname, i); 763 ex_init(ifp); 764 /* TODO: be more subtle here */ 765 } else if (i & TXS_UNDERRUN) { 766 ++sc->sc_ethercom.ec_if.if_oerrors; 767 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 768 printf("%s: fifo underrun (%x) @%d\n", 769 sc->sc_dev.dv_xname, i, 770 sc->tx_start_thresh); 771 if (sc->tx_succ_ok < 100) 772 sc->tx_start_thresh = min(ETHER_MAX_LEN, 773 sc->tx_start_thresh + 20); 774 sc->tx_succ_ok = 0; 775 ex_init(ifp); 776 /* TODO: be more subtle here */ 777 } else if (i & TXS_MAX_COLLISION) { 778 ++sc->sc_ethercom.ec_if.if_collisions; 779 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 780 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 781 } else 782 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 783 } 784 } 785 786 int 787 ex_media_chg(ifp) 788 struct ifnet *ifp; 789 { 790 791 if (ifp->if_flags & IFF_UP) 792 ex_init(ifp); 793 return 0; 794 } 795 796 void 797 ex_set_media(sc) 798 struct ex_softc *sc; 799 { 800 bus_space_tag_t iot = sc->sc_iot; 801 bus_space_handle_t ioh = sc->sc_ioh; 802 u_int32_t configreg; 803 804 if (((sc->ex_conf & EX_CONF_MII) && 805 (sc->ex_mii.mii_media_active & IFM_FDX)) 806 || (!(sc->ex_conf & EX_CONF_MII) && 807 (sc->ex_mii.mii_media.ifm_media & IFM_FDX))) { 808 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 809 MAC_CONTROL_FDX); 810 } else { 811 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 0); 812 } 813 814 /* 815 * If the device has MII, select it, and then tell the 816 * PHY which media to use. 817 */ 818 if (sc->ex_conf & EX_CONF_MII) { 819 GO_WINDOW(3); 820 821 configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 822 823 configreg &= ~(CONFIG_MEDIAMASK << 16); 824 configreg |= (ELINKMEDIA_MII << (CONFIG_MEDIAMASK_SHIFT + 16)); 825 826 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg); 827 mii_mediachg(&sc->ex_mii); 828 return; 829 } 830 831 GO_WINDOW(4); 832 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0); 833 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 834 delay(800); 835 836 /* 837 * Now turn on the selected media/transceiver. 838 */ 839 switch (IFM_SUBTYPE(sc->ex_mii.mii_media.ifm_cur->ifm_media)) { 840 case IFM_10_T: 841 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 842 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 843 break; 844 845 case IFM_10_2: 846 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 847 DELAY(800); 848 break; 849 850 case IFM_100_TX: 851 case IFM_100_FX: 852 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 853 LINKBEAT_ENABLE); 854 DELAY(800); 855 break; 856 857 case IFM_10_5: 858 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 859 SQE_ENABLE); 860 DELAY(800); 861 break; 862 863 case IFM_MANUAL: 864 break; 865 866 case IFM_NONE: 867 return; 868 869 default: 870 panic("ex_set_media: impossible"); 871 } 872 873 GO_WINDOW(3); 874 configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 875 876 configreg &= ~(CONFIG_MEDIAMASK << 16); 877 configreg |= (sc->ex_mii.mii_media.ifm_cur->ifm_data << 878 (CONFIG_MEDIAMASK_SHIFT + 16)); 879 880 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg); 881 } 882 883 /* 884 * Get currently-selected media from card. 885 * (if_media callback, may be called before interface is brought up). 886 */ 887 void 888 ex_media_stat(ifp, req) 889 struct ifnet *ifp; 890 struct ifmediareq *req; 891 { 892 struct ex_softc *sc = ifp->if_softc; 893 894 if (sc->ex_conf & EX_CONF_MII) { 895 mii_pollstat(&sc->ex_mii); 896 req->ifm_status = sc->ex_mii.mii_media_status; 897 req->ifm_active = sc->ex_mii.mii_media_active; 898 } else { 899 GO_WINDOW(4); 900 req->ifm_status = IFM_AVALID; 901 req->ifm_active = sc->ex_mii.mii_media.ifm_cur->ifm_media; 902 if (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 903 ELINK_W4_MEDIA_TYPE) & LINKBEAT_DETECT) 904 req->ifm_status |= IFM_ACTIVE; 905 GO_WINDOW(1); 906 } 907 } 908 909 910 911 /* 912 * Start outputting on the interface. 913 */ 914 static void 915 ex_start(ifp) 916 struct ifnet *ifp; 917 { 918 struct ex_softc *sc = ifp->if_softc; 919 bus_space_tag_t iot = sc->sc_iot; 920 bus_space_handle_t ioh = sc->sc_ioh; 921 volatile struct ex_fraghdr *fr = NULL; 922 volatile struct ex_dpd *dpd = NULL, *prevdpd = NULL; 923 struct ex_txdesc *txp; 924 struct mbuf *mb_head; 925 bus_dmamap_t dmamap; 926 int offset, totlen, segment, error; 927 928 if (sc->tx_head || sc->tx_free == NULL) 929 return; 930 931 txp = NULL; 932 933 /* 934 * We're finished if there is nothing more to add to the list or if 935 * we're all filled up with buffers to transmit. 936 */ 937 while (sc->tx_free != NULL) { 938 /* 939 * Grab a packet to transmit. 940 */ 941 IFQ_DEQUEUE(&ifp->if_snd, mb_head); 942 if (mb_head == NULL) 943 break; 944 945 /* 946 * Get pointer to next available tx desc. 947 */ 948 txp = sc->tx_free; 949 sc->tx_free = txp->tx_next; 950 txp->tx_next = NULL; 951 dmamap = txp->tx_dmamap; 952 953 /* 954 * Go through each of the mbufs in the chain and initialize 955 * the transmit buffer descriptors with the physical address 956 * and size of the mbuf. 957 */ 958 reload: 959 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 960 mb_head, BUS_DMA_NOWAIT); 961 switch (error) { 962 case 0: 963 /* Success. */ 964 break; 965 966 case EFBIG: 967 { 968 struct mbuf *mn; 969 970 /* 971 * We ran out of segments. We have to recopy this 972 * mbuf chain first. Bail out if we can't get the 973 * new buffers. 974 */ 975 printf("%s: too many segments, ", sc->sc_dev.dv_xname); 976 977 MGETHDR(mn, M_DONTWAIT, MT_DATA); 978 if (mn == NULL) { 979 m_freem(mb_head); 980 printf("aborting\n"); 981 goto out; 982 } 983 if (mb_head->m_pkthdr.len > MHLEN) { 984 MCLGET(mn, M_DONTWAIT); 985 if ((mn->m_flags & M_EXT) == 0) { 986 m_freem(mn); 987 m_freem(mb_head); 988 printf("aborting\n"); 989 goto out; 990 } 991 } 992 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, 993 mtod(mn, caddr_t)); 994 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; 995 m_freem(mb_head); 996 mb_head = mn; 997 printf("retrying\n"); 998 goto reload; 999 } 1000 1001 default: 1002 /* 1003 * Some other problem; report it. 1004 */ 1005 printf("%s: can't load mbuf chain, error = %d\n", 1006 sc->sc_dev.dv_xname, error); 1007 m_freem(mb_head); 1008 goto out; 1009 } 1010 1011 fr = &txp->tx_dpd->dpd_frags[0]; 1012 totlen = 0; 1013 for (segment = 0; segment < dmamap->dm_nsegs; segment++, fr++) { 1014 fr->fr_addr = htole32(dmamap->dm_segs[segment].ds_addr); 1015 fr->fr_len = htole32(dmamap->dm_segs[segment].ds_len); 1016 totlen += dmamap->dm_segs[segment].ds_len; 1017 } 1018 fr--; 1019 fr->fr_len |= htole32(EX_FR_LAST); 1020 txp->tx_mbhead = mb_head; 1021 1022 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 1023 BUS_DMASYNC_PREWRITE); 1024 1025 dpd = txp->tx_dpd; 1026 dpd->dpd_nextptr = 0; 1027 dpd->dpd_fsh = htole32(totlen); 1028 1029 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1030 ((caddr_t)dpd - (caddr_t)sc->sc_dpd), 1031 sizeof (struct ex_dpd), 1032 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1033 1034 /* 1035 * No need to stall the download engine, we know it's 1036 * not busy right now. 1037 * 1038 * Fix up pointers in both the "soft" tx and the physical 1039 * tx list. 1040 */ 1041 if (sc->tx_head != NULL) { 1042 prevdpd = sc->tx_tail->tx_dpd; 1043 offset = ((caddr_t)prevdpd - (caddr_t)sc->sc_dpd); 1044 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1045 offset, sizeof (struct ex_dpd), 1046 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1047 prevdpd->dpd_nextptr = htole32(DPD_DMADDR(sc, txp)); 1048 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1049 offset, sizeof (struct ex_dpd), 1050 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1051 sc->tx_tail->tx_next = txp; 1052 sc->tx_tail = txp; 1053 } else { 1054 sc->tx_tail = sc->tx_head = txp; 1055 } 1056 1057 #if NBPFILTER > 0 1058 /* 1059 * Pass packet to bpf if there is a listener. 1060 */ 1061 if (ifp->if_bpf) 1062 bpf_mtap(ifp->if_bpf, mb_head); 1063 #endif 1064 } 1065 out: 1066 if (sc->tx_head) { 1067 sc->tx_tail->tx_dpd->dpd_fsh |= htole32(EX_DPD_DNIND); 1068 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1069 ((caddr_t)sc->tx_tail->tx_dpd - (caddr_t)sc->sc_dpd), 1070 sizeof (struct ex_dpd), 1071 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1072 ifp->if_flags |= IFF_OACTIVE; 1073 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_DNUNSTALL); 1074 bus_space_write_4(iot, ioh, ELINK_DNLISTPTR, 1075 DPD_DMADDR(sc, sc->tx_head)); 1076 1077 /* trigger watchdog */ 1078 ifp->if_timer = 5; 1079 } 1080 } 1081 1082 1083 int 1084 ex_intr(arg) 1085 void *arg; 1086 { 1087 struct ex_softc *sc = arg; 1088 bus_space_tag_t iot = sc->sc_iot; 1089 bus_space_handle_t ioh = sc->sc_ioh; 1090 u_int16_t stat; 1091 int ret = 0; 1092 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1093 1094 if (sc->enabled == 0 || 1095 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1096 return (0); 1097 1098 for (;;) { 1099 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1100 1101 stat = bus_space_read_2(iot, ioh, ELINK_STATUS); 1102 1103 if ((stat & S_MASK) == 0) { 1104 if ((stat & S_INTR_LATCH) == 0) { 1105 #if 0 1106 printf("%s: intr latch cleared\n", 1107 sc->sc_dev.dv_xname); 1108 #endif 1109 break; 1110 } 1111 } 1112 1113 ret = 1; 1114 1115 /* 1116 * Acknowledge interrupts. 1117 */ 1118 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1119 (stat & S_MASK)); 1120 if (sc->intr_ack) 1121 (*sc->intr_ack)(sc); 1122 1123 if (stat & S_HOST_ERROR) { 1124 printf("%s: adapter failure (%x)\n", 1125 sc->sc_dev.dv_xname, stat); 1126 ex_reset(sc); 1127 ex_init(ifp); 1128 return 1; 1129 } 1130 if (stat & S_TX_COMPLETE) { 1131 ex_txstat(sc); 1132 } 1133 if (stat & S_UPD_STATS) { 1134 ex_getstats(sc); 1135 } 1136 if (stat & S_DN_COMPLETE) { 1137 struct ex_txdesc *txp, *ptxp = NULL; 1138 bus_dmamap_t txmap; 1139 1140 /* reset watchdog timer, was set in ex_start() */ 1141 ifp->if_timer = 0; 1142 1143 for (txp = sc->tx_head; txp != NULL; 1144 txp = txp->tx_next) { 1145 bus_dmamap_sync(sc->sc_dmat, 1146 sc->sc_dpd_dmamap, 1147 (caddr_t)txp->tx_dpd - (caddr_t)sc->sc_dpd, 1148 sizeof (struct ex_dpd), 1149 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1150 if (txp->tx_mbhead != NULL) { 1151 txmap = txp->tx_dmamap; 1152 bus_dmamap_sync(sc->sc_dmat, txmap, 1153 0, txmap->dm_mapsize, 1154 BUS_DMASYNC_POSTWRITE); 1155 bus_dmamap_unload(sc->sc_dmat, txmap); 1156 m_freem(txp->tx_mbhead); 1157 txp->tx_mbhead = NULL; 1158 } 1159 ptxp = txp; 1160 } 1161 1162 /* 1163 * Move finished tx buffers back to the tx free list. 1164 */ 1165 if (sc->tx_free) { 1166 sc->tx_ftail->tx_next = sc->tx_head; 1167 sc->tx_ftail = ptxp; 1168 } else 1169 sc->tx_ftail = sc->tx_free = sc->tx_head; 1170 1171 sc->tx_head = sc->tx_tail = NULL; 1172 ifp->if_flags &= ~IFF_OACTIVE; 1173 } 1174 1175 if (stat & S_UP_COMPLETE) { 1176 struct ex_rxdesc *rxd; 1177 struct mbuf *m; 1178 struct ex_upd *upd; 1179 bus_dmamap_t rxmap; 1180 u_int32_t pktstat; 1181 1182 rcvloop: 1183 rxd = sc->rx_head; 1184 rxmap = rxd->rx_dmamap; 1185 m = rxd->rx_mbhead; 1186 upd = rxd->rx_upd; 1187 1188 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, 1189 rxmap->dm_mapsize, 1190 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1191 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1192 ((caddr_t)upd - (caddr_t)sc->sc_upd), 1193 sizeof (struct ex_upd), 1194 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1195 pktstat = le32toh(upd->upd_pktstatus); 1196 1197 if (pktstat & EX_UPD_COMPLETE) { 1198 /* 1199 * Remove first packet from the chain. 1200 */ 1201 sc->rx_head = rxd->rx_next; 1202 rxd->rx_next = NULL; 1203 1204 /* 1205 * Add a new buffer to the receive chain. 1206 * If this fails, the old buffer is recycled 1207 * instead. 1208 */ 1209 if (ex_add_rxbuf(sc, rxd) == 0) { 1210 u_int16_t total_len; 1211 1212 if (pktstat & 1213 ((sc->sc_ethercom.ec_capenable & 1214 ETHERCAP_VLAN_MTU) ? 1215 EX_UPD_ERR_VLAN : EX_UPD_ERR)) { 1216 ifp->if_ierrors++; 1217 m_freem(m); 1218 goto rcvloop; 1219 } 1220 1221 total_len = pktstat & EX_UPD_PKTLENMASK; 1222 if (total_len < 1223 sizeof(struct ether_header)) { 1224 m_freem(m); 1225 goto rcvloop; 1226 } 1227 m->m_pkthdr.rcvif = ifp; 1228 m->m_pkthdr.len = m->m_len = total_len; 1229 #if NBPFILTER > 0 1230 if (ifp->if_bpf) 1231 bpf_mtap(ifp->if_bpf, m); 1232 #endif 1233 (*ifp->if_input)(ifp, m); 1234 } 1235 goto rcvloop; 1236 } 1237 /* 1238 * Just in case we filled up all UPDs and the DMA engine 1239 * stalled. We could be more subtle about this. 1240 */ 1241 if (bus_space_read_4(iot, ioh, ELINK_UPLISTPTR) == 0) { 1242 printf("%s: uplistptr was 0\n", 1243 sc->sc_dev.dv_xname); 1244 ex_init(ifp); 1245 } else if (bus_space_read_4(iot, ioh, ELINK_UPPKTSTATUS) 1246 & 0x2000) { 1247 printf("%s: receive stalled\n", 1248 sc->sc_dev.dv_xname); 1249 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1250 ELINK_UPUNSTALL); 1251 } 1252 } 1253 } 1254 1255 /* no more interrupts */ 1256 if (ret && IFQ_IS_EMPTY(&ifp->if_snd) == 0) 1257 ex_start(ifp); 1258 return ret; 1259 } 1260 1261 int 1262 ex_ioctl(ifp, cmd, data) 1263 struct ifnet *ifp; 1264 u_long cmd; 1265 caddr_t data; 1266 { 1267 struct ex_softc *sc = ifp->if_softc; 1268 struct ifreq *ifr = (struct ifreq *)data; 1269 int s, error; 1270 1271 s = splnet(); 1272 1273 switch (cmd) { 1274 case SIOCSIFMEDIA: 1275 case SIOCGIFMEDIA: 1276 error = ifmedia_ioctl(ifp, ifr, &sc->ex_mii.mii_media, cmd); 1277 break; 1278 1279 default: 1280 error = ether_ioctl(ifp, cmd, data); 1281 if (error == ENETRESET) { 1282 /* 1283 * Multicast list has changed; set the hardware filter 1284 * accordingly. 1285 */ 1286 ex_set_mc(sc); 1287 error = 0; 1288 } 1289 break; 1290 } 1291 1292 splx(s); 1293 return (error); 1294 } 1295 1296 void 1297 ex_getstats(sc) 1298 struct ex_softc *sc; 1299 { 1300 bus_space_handle_t ioh = sc->sc_ioh; 1301 bus_space_tag_t iot = sc->sc_iot; 1302 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1303 u_int8_t upperok; 1304 1305 GO_WINDOW(6); 1306 upperok = bus_space_read_1(iot, ioh, UPPER_FRAMES_OK); 1307 ifp->if_ipackets += bus_space_read_1(iot, ioh, RX_FRAMES_OK); 1308 ifp->if_ipackets += (upperok & 0x03) << 8; 1309 ifp->if_opackets += bus_space_read_1(iot, ioh, TX_FRAMES_OK); 1310 ifp->if_opackets += (upperok & 0x30) << 4; 1311 ifp->if_ierrors += bus_space_read_1(iot, ioh, RX_OVERRUNS); 1312 ifp->if_collisions += bus_space_read_1(iot, ioh, TX_COLLISIONS); 1313 /* 1314 * There seems to be no way to get the exact number of collisions, 1315 * this is the number that occured at the very least. 1316 */ 1317 ifp->if_collisions += 2 * bus_space_read_1(iot, ioh, 1318 TX_AFTER_X_COLLISIONS); 1319 ifp->if_ibytes += bus_space_read_2(iot, ioh, RX_TOTAL_OK); 1320 ifp->if_obytes += bus_space_read_2(iot, ioh, TX_TOTAL_OK); 1321 1322 /* 1323 * Clear the following to avoid stats overflow interrupts 1324 */ 1325 bus_space_read_1(iot, ioh, TX_DEFERRALS); 1326 bus_space_read_1(iot, ioh, TX_AFTER_1_COLLISION); 1327 bus_space_read_1(iot, ioh, TX_NO_SQE); 1328 bus_space_read_1(iot, ioh, TX_CD_LOST); 1329 GO_WINDOW(4); 1330 bus_space_read_1(iot, ioh, ELINK_W4_BADSSD); 1331 upperok = bus_space_read_1(iot, ioh, ELINK_W4_UBYTESOK); 1332 ifp->if_ibytes += (upperok & 0x0f) << 16; 1333 ifp->if_obytes += (upperok & 0xf0) << 12; 1334 GO_WINDOW(1); 1335 } 1336 1337 void 1338 ex_printstats(sc) 1339 struct ex_softc *sc; 1340 { 1341 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1342 1343 ex_getstats(sc); 1344 printf("in %llu out %llu ierror %llu oerror %llu ibytes %llu obytes " 1345 "%llu\n", (unsigned long long)ifp->if_ipackets, 1346 (unsigned long long)ifp->if_opackets, 1347 (unsigned long long)ifp->if_ierrors, 1348 (unsigned long long)ifp->if_oerrors, 1349 (unsigned long long)ifp->if_ibytes, 1350 (unsigned long long)ifp->if_obytes); 1351 } 1352 1353 void 1354 ex_tick(arg) 1355 void *arg; 1356 { 1357 struct ex_softc *sc = arg; 1358 int s; 1359 1360 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1361 return; 1362 1363 s = splnet(); 1364 1365 if (sc->ex_conf & EX_CONF_MII) 1366 mii_tick(&sc->ex_mii); 1367 1368 if (!(bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, ELINK_STATUS) 1369 & S_COMMAND_IN_PROGRESS)) 1370 ex_getstats(sc); 1371 1372 splx(s); 1373 1374 callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc); 1375 } 1376 1377 void 1378 ex_reset(sc) 1379 struct ex_softc *sc; 1380 { 1381 u_int16_t val = GLOBAL_RESET; 1382 1383 if (sc->ex_conf & EX_CONF_RESETHACK) 1384 val |= 0xff; 1385 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, val); 1386 delay(400); 1387 ex_waitcmd(sc); 1388 } 1389 1390 void 1391 ex_watchdog(ifp) 1392 struct ifnet *ifp; 1393 { 1394 struct ex_softc *sc = ifp->if_softc; 1395 1396 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1397 ++sc->sc_ethercom.ec_if.if_oerrors; 1398 1399 ex_reset(sc); 1400 ex_init(ifp); 1401 } 1402 1403 void 1404 ex_stop(ifp, disable) 1405 struct ifnet *ifp; 1406 int disable; 1407 { 1408 struct ex_softc *sc = ifp->if_softc; 1409 bus_space_tag_t iot = sc->sc_iot; 1410 bus_space_handle_t ioh = sc->sc_ioh; 1411 struct ex_txdesc *tx; 1412 struct ex_rxdesc *rx; 1413 int i; 1414 1415 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1416 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1417 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1418 1419 for (tx = sc->tx_head ; tx != NULL; tx = tx->tx_next) { 1420 if (tx->tx_mbhead == NULL) 1421 continue; 1422 m_freem(tx->tx_mbhead); 1423 tx->tx_mbhead = NULL; 1424 bus_dmamap_unload(sc->sc_dmat, tx->tx_dmamap); 1425 tx->tx_dpd->dpd_fsh = tx->tx_dpd->dpd_nextptr = 0; 1426 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1427 ((caddr_t)tx->tx_dpd - (caddr_t)sc->sc_dpd), 1428 sizeof (struct ex_dpd), 1429 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1430 } 1431 sc->tx_tail = sc->tx_head = NULL; 1432 ex_init_txdescs(sc); 1433 1434 sc->rx_tail = sc->rx_head = 0; 1435 for (i = 0; i < EX_NUPD; i++) { 1436 rx = &sc->sc_rxdescs[i]; 1437 if (rx->rx_mbhead != NULL) { 1438 bus_dmamap_unload(sc->sc_dmat, rx->rx_dmamap); 1439 m_freem(rx->rx_mbhead); 1440 rx->rx_mbhead = NULL; 1441 } 1442 ex_add_rxbuf(sc, rx); 1443 } 1444 1445 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1446 1447 callout_stop(&sc->ex_mii_callout); 1448 if (sc->ex_conf & EX_CONF_MII) 1449 mii_down(&sc->ex_mii); 1450 1451 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1452 ifp->if_timer = 0; 1453 } 1454 1455 static void 1456 ex_init_txdescs(sc) 1457 struct ex_softc *sc; 1458 { 1459 int i; 1460 1461 for (i = 0; i < EX_NDPD; i++) { 1462 sc->sc_txdescs[i].tx_dmamap = sc->sc_tx_dmamaps[i]; 1463 sc->sc_txdescs[i].tx_dpd = &sc->sc_dpd[i]; 1464 if (i < EX_NDPD - 1) 1465 sc->sc_txdescs[i].tx_next = &sc->sc_txdescs[i + 1]; 1466 else 1467 sc->sc_txdescs[i].tx_next = NULL; 1468 } 1469 sc->tx_free = &sc->sc_txdescs[0]; 1470 sc->tx_ftail = &sc->sc_txdescs[EX_NDPD-1]; 1471 } 1472 1473 1474 int 1475 ex_activate(self, act) 1476 struct device *self; 1477 enum devact act; 1478 { 1479 struct ex_softc *sc = (void *) self; 1480 int s, error = 0; 1481 1482 s = splnet(); 1483 switch (act) { 1484 case DVACT_ACTIVATE: 1485 error = EOPNOTSUPP; 1486 break; 1487 1488 case DVACT_DEACTIVATE: 1489 if (sc->ex_conf & EX_CONF_MII) 1490 mii_activate(&sc->ex_mii, act, MII_PHY_ANY, 1491 MII_OFFSET_ANY); 1492 if_deactivate(&sc->sc_ethercom.ec_if); 1493 break; 1494 } 1495 splx(s); 1496 1497 return (error); 1498 } 1499 1500 int 1501 ex_detach(sc) 1502 struct ex_softc *sc; 1503 { 1504 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1505 struct ex_rxdesc *rxd; 1506 int i; 1507 1508 /* Succeed now if there's no work to do. */ 1509 if ((sc->ex_flags & EX_FLAGS_ATTACHED) == 0) 1510 return (0); 1511 1512 /* Unhook our tick handler. */ 1513 callout_stop(&sc->ex_mii_callout); 1514 1515 if (sc->ex_conf & EX_CONF_MII) { 1516 /* Detach all PHYs */ 1517 mii_detach(&sc->ex_mii, MII_PHY_ANY, MII_OFFSET_ANY); 1518 } 1519 1520 /* Delete all remaining media. */ 1521 ifmedia_delete_instance(&sc->ex_mii.mii_media, IFM_INST_ANY); 1522 1523 #if NRND > 0 1524 rnd_detach_source(&sc->rnd_source); 1525 #endif 1526 ether_ifdetach(ifp); 1527 if_detach(ifp); 1528 1529 for (i = 0; i < EX_NUPD; i++) { 1530 rxd = &sc->sc_rxdescs[i]; 1531 if (rxd->rx_mbhead != NULL) { 1532 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap); 1533 m_freem(rxd->rx_mbhead); 1534 rxd->rx_mbhead = NULL; 1535 } 1536 } 1537 for (i = 0; i < EX_NUPD; i++) 1538 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]); 1539 for (i = 0; i < EX_NDPD; i++) 1540 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]); 1541 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap); 1542 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap); 1543 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd, 1544 EX_NDPD * sizeof (struct ex_dpd)); 1545 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg); 1546 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap); 1547 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap); 1548 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd, 1549 EX_NUPD * sizeof (struct ex_upd)); 1550 bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg); 1551 1552 shutdownhook_disestablish(sc->sc_sdhook); 1553 1554 return (0); 1555 } 1556 1557 /* 1558 * Before reboots, reset card completely. 1559 */ 1560 static void 1561 ex_shutdown(arg) 1562 void *arg; 1563 { 1564 struct ex_softc *sc = arg; 1565 1566 ex_stop(&sc->sc_ethercom.ec_if, 0); 1567 } 1568 1569 /* 1570 * Read EEPROM data. 1571 * XXX what to do if EEPROM doesn't unbusy? 1572 */ 1573 u_int16_t 1574 ex_read_eeprom(sc, offset) 1575 struct ex_softc *sc; 1576 int offset; 1577 { 1578 bus_space_tag_t iot = sc->sc_iot; 1579 bus_space_handle_t ioh = sc->sc_ioh; 1580 u_int16_t data = 0, cmd = READ_EEPROM; 1581 int off; 1582 1583 off = sc->ex_conf & EX_CONF_EEPROM_OFF ? 0x30 : 0; 1584 cmd = sc->ex_conf & EX_CONF_EEPROM_8BIT ? READ_EEPROM8 : READ_EEPROM; 1585 1586 GO_WINDOW(0); 1587 if (ex_eeprom_busy(sc)) 1588 goto out; 1589 bus_space_write_2(iot, ioh, ELINK_W0_EEPROM_COMMAND, 1590 cmd | (off + (offset & 0x3f))); 1591 if (ex_eeprom_busy(sc)) 1592 goto out; 1593 data = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_DATA); 1594 out: 1595 return data; 1596 } 1597 1598 static int 1599 ex_eeprom_busy(sc) 1600 struct ex_softc *sc; 1601 { 1602 bus_space_tag_t iot = sc->sc_iot; 1603 bus_space_handle_t ioh = sc->sc_ioh; 1604 int i = 100; 1605 1606 while (i--) { 1607 if (!(bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND) & 1608 EEPROM_BUSY)) 1609 return 0; 1610 delay(100); 1611 } 1612 printf("\n%s: eeprom stays busy.\n", sc->sc_dev.dv_xname); 1613 return (1); 1614 } 1615 1616 /* 1617 * Create a new rx buffer and add it to the 'soft' rx list. 1618 */ 1619 static int 1620 ex_add_rxbuf(sc, rxd) 1621 struct ex_softc *sc; 1622 struct ex_rxdesc *rxd; 1623 { 1624 struct mbuf *m, *oldm; 1625 bus_dmamap_t rxmap; 1626 int error, rval = 0; 1627 1628 oldm = rxd->rx_mbhead; 1629 rxmap = rxd->rx_dmamap; 1630 1631 MGETHDR(m, M_DONTWAIT, MT_DATA); 1632 if (m != NULL) { 1633 MCLGET(m, M_DONTWAIT); 1634 if ((m->m_flags & M_EXT) == 0) { 1635 m_freem(m); 1636 if (oldm == NULL) 1637 return 1; 1638 m = oldm; 1639 m->m_data = m->m_ext.ext_buf; 1640 rval = 1; 1641 } 1642 } else { 1643 if (oldm == NULL) 1644 return 1; 1645 m = oldm; 1646 m->m_data = m->m_ext.ext_buf; 1647 rval = 1; 1648 } 1649 1650 /* 1651 * Setup the DMA map for this receive buffer. 1652 */ 1653 if (m != oldm) { 1654 if (oldm != NULL) 1655 bus_dmamap_unload(sc->sc_dmat, rxmap); 1656 error = bus_dmamap_load(sc->sc_dmat, rxmap, 1657 m->m_ext.ext_buf, MCLBYTES, NULL, BUS_DMA_NOWAIT); 1658 if (error) { 1659 printf("%s: can't load rx buffer, error = %d\n", 1660 sc->sc_dev.dv_xname, error); 1661 panic("ex_add_rxbuf"); /* XXX */ 1662 } 1663 } 1664 1665 /* 1666 * Align for data after 14 byte header. 1667 */ 1668 m->m_data += 2; 1669 1670 rxd->rx_mbhead = m; 1671 rxd->rx_upd->upd_pktstatus = htole32(MCLBYTES - 2); 1672 rxd->rx_upd->upd_frags[0].fr_addr = 1673 htole32(rxmap->dm_segs[0].ds_addr + 2); 1674 rxd->rx_upd->upd_nextptr = 0; 1675 1676 /* 1677 * Attach it to the end of the list. 1678 */ 1679 if (sc->rx_head != NULL) { 1680 sc->rx_tail->rx_next = rxd; 1681 sc->rx_tail->rx_upd->upd_nextptr = htole32(sc->sc_upddma + 1682 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd)); 1683 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1684 (caddr_t)sc->rx_tail->rx_upd - (caddr_t)sc->sc_upd, 1685 sizeof (struct ex_upd), 1686 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1687 } else { 1688 sc->rx_head = rxd; 1689 } 1690 sc->rx_tail = rxd; 1691 1692 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, rxmap->dm_mapsize, 1693 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1694 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1695 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd), 1696 sizeof (struct ex_upd), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1697 return (rval); 1698 } 1699 1700 u_int32_t 1701 ex_mii_bitbang_read(self) 1702 struct device *self; 1703 { 1704 struct ex_softc *sc = (void *) self; 1705 1706 /* We're already in Window 4. */ 1707 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT)); 1708 } 1709 1710 void 1711 ex_mii_bitbang_write(self, val) 1712 struct device *self; 1713 u_int32_t val; 1714 { 1715 struct ex_softc *sc = (void *) self; 1716 1717 /* We're already in Window 4. */ 1718 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT, val); 1719 } 1720 1721 int 1722 ex_mii_readreg(v, phy, reg) 1723 struct device *v; 1724 int phy, reg; 1725 { 1726 struct ex_softc *sc = (struct ex_softc *)v; 1727 int val; 1728 1729 if ((sc->ex_conf & EX_CONF_INTPHY) && phy != ELINK_INTPHY_ID) 1730 return 0; 1731 1732 GO_WINDOW(4); 1733 1734 val = mii_bitbang_readreg(v, &ex_mii_bitbang_ops, phy, reg); 1735 1736 GO_WINDOW(1); 1737 1738 return (val); 1739 } 1740 1741 void 1742 ex_mii_writereg(v, phy, reg, data) 1743 struct device *v; 1744 int phy; 1745 int reg; 1746 int data; 1747 { 1748 struct ex_softc *sc = (struct ex_softc *)v; 1749 1750 GO_WINDOW(4); 1751 1752 mii_bitbang_writereg(v, &ex_mii_bitbang_ops, phy, reg, data); 1753 1754 GO_WINDOW(1); 1755 } 1756 1757 void 1758 ex_mii_statchg(v) 1759 struct device *v; 1760 { 1761 struct ex_softc *sc = (struct ex_softc *)v; 1762 bus_space_tag_t iot = sc->sc_iot; 1763 bus_space_handle_t ioh = sc->sc_ioh; 1764 int mctl; 1765 1766 GO_WINDOW(3); 1767 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1768 if (sc->ex_mii.mii_media_active & IFM_FDX) 1769 mctl |= MAC_CONTROL_FDX; 1770 else 1771 mctl &= ~MAC_CONTROL_FDX; 1772 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1773 GO_WINDOW(1); /* back to operating window */ 1774 } 1775
Indexes created Wed Oct 22 13:09:56 GMT 2025