elinkxl.c revision 1.47
1 /* $NetBSD: elinkxl.c,v 1.47 2001/01/30 19:27:39 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Frank van der Linden. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include "opt_inet.h" 40 #include "opt_ns.h" 41 #include "bpfilter.h" 42 #include "rnd.h" 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/callout.h> 47 #include <sys/kernel.h> 48 #include <sys/mbuf.h> 49 #include <sys/socket.h> 50 #include <sys/ioctl.h> 51 #include <sys/errno.h> 52 #include <sys/syslog.h> 53 #include <sys/select.h> 54 #include <sys/device.h> 55 #if NRND > 0 56 #include <sys/rnd.h> 57 #endif 58 59 #include <uvm/uvm_extern.h> 60 61 #include <net/if.h> 62 #include <net/if_dl.h> 63 #include <net/if_ether.h> 64 #include <net/if_media.h> 65 66 #ifdef INET 67 #include <netinet/in.h> 68 #include <netinet/in_systm.h> 69 #include <netinet/in_var.h> 70 #include <netinet/ip.h> 71 #include <netinet/if_inarp.h> 72 #endif 73 74 #ifdef NS 75 #include <netns/ns.h> 76 #include <netns/ns_if.h> 77 #endif 78 79 #if NBPFILTER > 0 80 #include <net/bpf.h> 81 #include <net/bpfdesc.h> 82 #endif 83 84 #include <machine/cpu.h> 85 #include <machine/bus.h> 86 #include <machine/intr.h> 87 #include <machine/endian.h> 88 89 #include <dev/mii/miivar.h> 90 #include <dev/mii/mii.h> 91 #include <dev/mii/mii_bitbang.h> 92 93 #include <dev/ic/elink3reg.h> 94 /* #include <dev/ic/elink3var.h> */ 95 #include <dev/ic/elinkxlreg.h> 96 #include <dev/ic/elinkxlvar.h> 97 98 #ifdef DEBUG 99 int exdebug = 0; 100 #endif 101 102 /* ifmedia callbacks */ 103 int ex_media_chg __P((struct ifnet *ifp)); 104 void ex_media_stat __P((struct ifnet *ifp, struct ifmediareq *req)); 105 106 void ex_probe_media __P((struct ex_softc *)); 107 void ex_set_filter __P((struct ex_softc *)); 108 void ex_set_media __P((struct ex_softc *)); 109 struct mbuf *ex_get __P((struct ex_softc *, int)); 110 u_int16_t ex_read_eeprom __P((struct ex_softc *, int)); 111 int ex_init __P((struct ifnet *)); 112 void ex_read __P((struct ex_softc *)); 113 void ex_reset __P((struct ex_softc *)); 114 void ex_set_mc __P((struct ex_softc *)); 115 void ex_getstats __P((struct ex_softc *)); 116 void ex_printstats __P((struct ex_softc *)); 117 void ex_tick __P((void *)); 118 119 int ex_enable __P((struct ex_softc *)); 120 void ex_disable __P((struct ex_softc *)); 121 void ex_power __P((int, void *)); 122 123 static int ex_eeprom_busy __P((struct ex_softc *)); 124 static int ex_add_rxbuf __P((struct ex_softc *, struct ex_rxdesc *)); 125 static void ex_init_txdescs __P((struct ex_softc *)); 126 127 static void ex_shutdown __P((void *)); 128 static void ex_start __P((struct ifnet *)); 129 static void ex_txstat __P((struct ex_softc *)); 130 131 int ex_mii_readreg __P((struct device *, int, int)); 132 void ex_mii_writereg __P((struct device *, int, int, int)); 133 void ex_mii_statchg __P((struct device *)); 134 135 void ex_probemedia __P((struct ex_softc *)); 136 137 /* 138 * Structure to map media-present bits in boards to ifmedia codes and 139 * printable media names. Used for table-driven ifmedia initialization. 140 */ 141 struct ex_media { 142 int exm_mpbit; /* media present bit */ 143 const char *exm_name; /* name of medium */ 144 int exm_ifmedia; /* ifmedia word for medium */ 145 int exm_epmedia; /* ELINKMEDIA_* constant */ 146 }; 147 148 /* 149 * Media table for 3c90x chips. Note that chips with MII have no 150 * `native' media. 151 */ 152 struct ex_media ex_native_media[] = { 153 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 154 ELINKMEDIA_10BASE_T }, 155 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 156 ELINKMEDIA_10BASE_T }, 157 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 158 ELINKMEDIA_AUI }, 159 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 160 ELINKMEDIA_10BASE_2 }, 161 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 162 ELINKMEDIA_100BASE_TX }, 163 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 164 ELINKMEDIA_100BASE_TX }, 165 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 166 ELINKMEDIA_100BASE_FX }, 167 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 168 ELINKMEDIA_MII }, 169 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 170 ELINKMEDIA_100BASE_T4 }, 171 { 0, NULL, 0, 172 0 }, 173 }; 174 175 /* 176 * MII bit-bang glue. 177 */ 178 u_int32_t ex_mii_bitbang_read __P((struct device *)); 179 void ex_mii_bitbang_write __P((struct device *, u_int32_t)); 180 181 const struct mii_bitbang_ops ex_mii_bitbang_ops = { 182 ex_mii_bitbang_read, 183 ex_mii_bitbang_write, 184 { 185 ELINK_PHY_DATA, /* MII_BIT_MDO */ 186 ELINK_PHY_DATA, /* MII_BIT_MDI */ 187 ELINK_PHY_CLK, /* MII_BIT_MDC */ 188 ELINK_PHY_DIR, /* MII_BIT_DIR_HOST_PHY */ 189 0, /* MII_BIT_DIR_PHY_HOST */ 190 } 191 }; 192 193 /* 194 * Back-end attach and configure. 195 */ 196 void 197 ex_config(sc) 198 struct ex_softc *sc; 199 { 200 struct ifnet *ifp; 201 u_int16_t val; 202 u_int8_t macaddr[ETHER_ADDR_LEN] = {0}; 203 bus_space_tag_t iot = sc->sc_iot; 204 bus_space_handle_t ioh = sc->sc_ioh; 205 int i, error, attach_stage; 206 207 callout_init(&sc->ex_mii_callout); 208 209 ex_reset(sc); 210 211 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR0); 212 macaddr[0] = val >> 8; 213 macaddr[1] = val & 0xff; 214 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR1); 215 macaddr[2] = val >> 8; 216 macaddr[3] = val & 0xff; 217 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR2); 218 macaddr[4] = val >> 8; 219 macaddr[5] = val & 0xff; 220 221 printf("%s: MAC address %s\n", sc->sc_dev.dv_xname, 222 ether_sprintf(macaddr)); 223 224 if (sc->ex_conf & (EX_CONF_INV_LED_POLARITY|EX_CONF_PHY_POWER)) { 225 GO_WINDOW(2); 226 val = bus_space_read_2(iot, ioh, ELINK_W2_RESET_OPTIONS); 227 if (sc->ex_conf & EX_CONF_INV_LED_POLARITY) 228 val |= ELINK_RESET_OPT_LEDPOLAR; 229 if (sc->ex_conf & EX_CONF_PHY_POWER) 230 val |= ELINK_RESET_OPT_PHYPOWER; 231 bus_space_write_2(iot, ioh, ELINK_W2_RESET_OPTIONS, val); 232 } 233 234 attach_stage = 0; 235 236 /* 237 * Allocate the upload descriptors, and create and load the DMA 238 * map for them. 239 */ 240 if ((error = bus_dmamem_alloc(sc->sc_dmat, 241 EX_NUPD * sizeof (struct ex_upd), PAGE_SIZE, 0, &sc->sc_useg, 1, 242 &sc->sc_urseg, BUS_DMA_NOWAIT)) != 0) { 243 printf("%s: can't allocate upload descriptors, error = %d\n", 244 sc->sc_dev.dv_xname, error); 245 goto fail; 246 } 247 248 attach_stage = 1; 249 250 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg, 251 EX_NUPD * sizeof (struct ex_upd), (caddr_t *)&sc->sc_upd, 252 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 253 printf("%s: can't map upload descriptors, error = %d\n", 254 sc->sc_dev.dv_xname, error); 255 goto fail; 256 } 257 258 attach_stage = 2; 259 260 if ((error = bus_dmamap_create(sc->sc_dmat, 261 EX_NUPD * sizeof (struct ex_upd), 1, 262 EX_NUPD * sizeof (struct ex_upd), 0, BUS_DMA_NOWAIT, 263 &sc->sc_upd_dmamap)) != 0) { 264 printf("%s: can't create upload desc. DMA map, error = %d\n", 265 sc->sc_dev.dv_xname, error); 266 goto fail; 267 } 268 269 attach_stage = 3; 270 271 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_upd_dmamap, 272 sc->sc_upd, EX_NUPD * sizeof (struct ex_upd), NULL, 273 BUS_DMA_NOWAIT)) != 0) { 274 printf("%s: can't load upload desc. DMA map, error = %d\n", 275 sc->sc_dev.dv_xname, error); 276 goto fail; 277 } 278 279 attach_stage = 4; 280 281 /* 282 * Allocate the download descriptors, and create and load the DMA 283 * map for them. 284 */ 285 if ((error = bus_dmamem_alloc(sc->sc_dmat, 286 EX_NDPD * sizeof (struct ex_dpd), PAGE_SIZE, 0, &sc->sc_dseg, 1, 287 &sc->sc_drseg, BUS_DMA_NOWAIT)) != 0) { 288 printf("%s: can't allocate download descriptors, error = %d\n", 289 sc->sc_dev.dv_xname, error); 290 goto fail; 291 } 292 293 attach_stage = 5; 294 295 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg, 296 EX_NDPD * sizeof (struct ex_dpd), (caddr_t *)&sc->sc_dpd, 297 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 298 printf("%s: can't map download descriptors, error = %d\n", 299 sc->sc_dev.dv_xname, error); 300 goto fail; 301 } 302 bzero(sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd)); 303 304 attach_stage = 6; 305 306 if ((error = bus_dmamap_create(sc->sc_dmat, 307 EX_NDPD * sizeof (struct ex_dpd), 1, 308 EX_NDPD * sizeof (struct ex_dpd), 0, BUS_DMA_NOWAIT, 309 &sc->sc_dpd_dmamap)) != 0) { 310 printf("%s: can't create download desc. DMA map, error = %d\n", 311 sc->sc_dev.dv_xname, error); 312 goto fail; 313 } 314 315 attach_stage = 7; 316 317 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dpd_dmamap, 318 sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd), NULL, 319 BUS_DMA_NOWAIT)) != 0) { 320 printf("%s: can't load download desc. DMA map, error = %d\n", 321 sc->sc_dev.dv_xname, error); 322 goto fail; 323 } 324 325 attach_stage = 8; 326 327 328 /* 329 * Create the transmit buffer DMA maps. 330 */ 331 for (i = 0; i < EX_NDPD; i++) { 332 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 333 EX_NTFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 334 &sc->sc_tx_dmamaps[i])) != 0) { 335 printf("%s: can't create tx DMA map %d, error = %d\n", 336 sc->sc_dev.dv_xname, i, error); 337 goto fail; 338 } 339 } 340 341 attach_stage = 9; 342 343 /* 344 * Create the receive buffer DMA maps. 345 */ 346 for (i = 0; i < EX_NUPD; i++) { 347 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 348 EX_NRFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 349 &sc->sc_rx_dmamaps[i])) != 0) { 350 printf("%s: can't create rx DMA map %d, error = %d\n", 351 sc->sc_dev.dv_xname, i, error); 352 goto fail; 353 } 354 } 355 356 attach_stage = 10; 357 358 /* 359 * Create ring of upload descriptors, only once. The DMA engine 360 * will loop over this when receiving packets, stalling if it 361 * hits an UPD with a finished receive. 362 */ 363 for (i = 0; i < EX_NUPD; i++) { 364 sc->sc_rxdescs[i].rx_dmamap = sc->sc_rx_dmamaps[i]; 365 sc->sc_rxdescs[i].rx_upd = &sc->sc_upd[i]; 366 sc->sc_upd[i].upd_frags[0].fr_len = 367 htole32((MCLBYTES - 2) | EX_FR_LAST); 368 if (ex_add_rxbuf(sc, &sc->sc_rxdescs[i]) != 0) { 369 printf("%s: can't allocate or map rx buffers\n", 370 sc->sc_dev.dv_xname); 371 goto fail; 372 } 373 } 374 375 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 0, 376 EX_NUPD * sizeof (struct ex_upd), 377 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 378 379 ex_init_txdescs(sc); 380 381 attach_stage = 11; 382 383 384 GO_WINDOW(3); 385 val = bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS); 386 if (val & ELINK_MEDIACAP_MII) 387 sc->ex_conf |= EX_CONF_MII; 388 389 ifp = &sc->sc_ethercom.ec_if; 390 391 /* 392 * Initialize our media structures and MII info. We'll 393 * probe the MII if we discover that we have one. 394 */ 395 sc->ex_mii.mii_ifp = ifp; 396 sc->ex_mii.mii_readreg = ex_mii_readreg; 397 sc->ex_mii.mii_writereg = ex_mii_writereg; 398 sc->ex_mii.mii_statchg = ex_mii_statchg; 399 ifmedia_init(&sc->ex_mii.mii_media, 0, ex_media_chg, 400 ex_media_stat); 401 402 if (sc->ex_conf & EX_CONF_MII) { 403 /* 404 * Find PHY, extract media information from it. 405 * First, select the right transceiver. 406 */ 407 u_int32_t icfg; 408 409 GO_WINDOW(3); 410 icfg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 411 icfg &= ~(CONFIG_XCVR_SEL << 16); 412 if (val & (ELINK_MEDIACAP_MII | ELINK_MEDIACAP_100BASET4)) 413 icfg |= ELINKMEDIA_MII << (CONFIG_XCVR_SEL_SHIFT + 16); 414 if (val & ELINK_MEDIACAP_100BASETX) 415 icfg |= ELINKMEDIA_AUTO << (CONFIG_XCVR_SEL_SHIFT + 16); 416 if (val & ELINK_MEDIACAP_100BASEFX) 417 icfg |= ELINKMEDIA_100BASE_FX 418 << (CONFIG_XCVR_SEL_SHIFT + 16); 419 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, icfg); 420 421 mii_attach(&sc->sc_dev, &sc->ex_mii, 0xffffffff, 422 MII_PHY_ANY, MII_OFFSET_ANY, 0); 423 if (LIST_FIRST(&sc->ex_mii.mii_phys) == NULL) { 424 ifmedia_add(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE, 425 0, NULL); 426 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE); 427 } else { 428 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_AUTO); 429 } 430 } else 431 ex_probemedia(sc); 432 433 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ); 434 ifp->if_softc = sc; 435 ifp->if_start = ex_start; 436 ifp->if_ioctl = ex_ioctl; 437 ifp->if_watchdog = ex_watchdog; 438 ifp->if_init = ex_init; 439 ifp->if_stop = ex_stop; 440 ifp->if_flags = 441 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 442 IFQ_SET_READY(&ifp->if_snd); 443 444 /* 445 * We can support 802.1Q VLAN-sized frames. 446 */ 447 sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU; 448 449 if_attach(ifp); 450 ether_ifattach(ifp, macaddr); 451 452 GO_WINDOW(1); 453 454 sc->tx_start_thresh = 20; 455 sc->tx_succ_ok = 0; 456 457 /* TODO: set queues to 0 */ 458 459 #if NRND > 0 460 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 461 RND_TYPE_NET, 0); 462 #endif 463 464 /* Establish callback to reset card when we reboot. */ 465 sc->sc_sdhook = shutdownhook_establish(ex_shutdown, sc); 466 if (sc->sc_sdhook == NULL) 467 printf("%s: WARNING: unable to establish shutdown hook\n", 468 sc->sc_dev.dv_xname); 469 470 /* Add a suspend hook to make sure we com back up after a resume. */ 471 sc->sc_powerhook = powerhook_establish(ex_power, sc); 472 if (sc->sc_powerhook == NULL) 473 printf("%s: WARNING: unable to establish power hook\n", 474 sc->sc_dev.dv_xname); 475 476 /* The attach is successful. */ 477 sc->ex_flags |= EX_FLAGS_ATTACHED; 478 return; 479 480 fail: 481 /* 482 * Free any resources we've allocated during the failed attach 483 * attempt. Do this in reverse order and fall though. 484 */ 485 switch (attach_stage) { 486 case 11: 487 { 488 struct ex_rxdesc *rxd; 489 490 for (i = 0; i < EX_NUPD; i++) { 491 rxd = &sc->sc_rxdescs[i]; 492 if (rxd->rx_mbhead != NULL) { 493 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap); 494 m_freem(rxd->rx_mbhead); 495 } 496 } 497 } 498 /* FALLTHROUGH */ 499 500 case 10: 501 for (i = 0; i < EX_NUPD; i++) 502 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]); 503 /* FALLTHROUGH */ 504 505 case 9: 506 for (i = 0; i < EX_NDPD; i++) 507 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]); 508 /* FALLTHROUGH */ 509 case 8: 510 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap); 511 /* FALLTHROUGH */ 512 513 case 7: 514 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap); 515 /* FALLTHROUGH */ 516 517 case 6: 518 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd, 519 EX_NDPD * sizeof (struct ex_dpd)); 520 /* FALLTHROUGH */ 521 522 case 5: 523 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg); 524 break; 525 526 case 4: 527 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap); 528 /* FALLTHROUGH */ 529 530 case 3: 531 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap); 532 /* FALLTHROUGH */ 533 534 case 2: 535 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd, 536 EX_NUPD * sizeof (struct ex_upd)); 537 /* FALLTHROUGH */ 538 539 case 1: 540 bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg); 541 break; 542 } 543 544 } 545 546 /* 547 * Find the media present on non-MII chips. 548 */ 549 void 550 ex_probemedia(sc) 551 struct ex_softc *sc; 552 { 553 bus_space_tag_t iot = sc->sc_iot; 554 bus_space_handle_t ioh = sc->sc_ioh; 555 struct ifmedia *ifm = &sc->ex_mii.mii_media; 556 struct ex_media *exm; 557 u_int16_t config1, reset_options, default_media; 558 int defmedia = 0; 559 const char *sep = "", *defmedianame = NULL; 560 561 GO_WINDOW(3); 562 config1 = bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2); 563 reset_options = bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 564 GO_WINDOW(0); 565 566 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 567 568 printf("%s: ", sc->sc_dev.dv_xname); 569 570 /* Sanity check that there are any media! */ 571 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 572 printf("no media present!\n"); 573 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 574 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 575 return; 576 } 577 578 #define PRINT(s) printf("%s%s", sep, s); sep = ", " 579 580 for (exm = ex_native_media; exm->exm_name != NULL; exm++) { 581 if (reset_options & exm->exm_mpbit) { 582 /* 583 * Default media is a little complicated. We 584 * support full-duplex which uses the same 585 * reset options bit. 586 * 587 * XXX Check EEPROM for default to FDX? 588 */ 589 if (exm->exm_epmedia == default_media) { 590 if ((exm->exm_ifmedia & IFM_FDX) == 0) { 591 defmedia = exm->exm_ifmedia; 592 defmedianame = exm->exm_name; 593 } 594 } else if (defmedia == 0) { 595 defmedia = exm->exm_ifmedia; 596 defmedianame = exm->exm_name; 597 } 598 ifmedia_add(ifm, exm->exm_ifmedia, exm->exm_epmedia, 599 NULL); 600 PRINT(exm->exm_name); 601 } 602 } 603 604 #undef PRINT 605 606 #ifdef DIAGNOSTIC 607 if (defmedia == 0) 608 panic("ex_probemedia: impossible"); 609 #endif 610 611 printf(", default %s\n", defmedianame); 612 ifmedia_set(ifm, defmedia); 613 } 614 615 /* 616 * Bring device up. 617 */ 618 int 619 ex_init(ifp) 620 struct ifnet *ifp; 621 { 622 struct ex_softc *sc = ifp->if_softc; 623 bus_space_tag_t iot = sc->sc_iot; 624 bus_space_handle_t ioh = sc->sc_ioh; 625 int i; 626 int error = 0; 627 628 if ((error = ex_enable(sc)) != 0) 629 goto out; 630 631 ex_waitcmd(sc); 632 ex_stop(ifp, 0); 633 634 /* 635 * Set the station address and clear the station mask. The latter 636 * is needed for 90x cards, 0 is the default for 90xB cards. 637 */ 638 GO_WINDOW(2); 639 for (i = 0; i < ETHER_ADDR_LEN; i++) { 640 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 641 LLADDR(ifp->if_sadl)[i]); 642 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 643 } 644 645 GO_WINDOW(3); 646 647 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_RESET); 648 ex_waitcmd(sc); 649 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_RESET); 650 ex_waitcmd(sc); 651 652 /* 653 * Disable reclaim threshold for 90xB, set free threshold to 654 * 6 * 256 = 1536 for 90x. 655 */ 656 if (sc->ex_conf & EX_CONF_90XB) 657 bus_space_write_2(iot, ioh, ELINK_COMMAND, 658 ELINK_TXRECLTHRESH | 255); 659 else 660 bus_space_write_1(iot, ioh, ELINK_TXFREETHRESH, 6); 661 662 bus_space_write_2(iot, ioh, ELINK_COMMAND, 663 SET_RX_EARLY_THRESH | ELINK_THRESH_DISABLE); 664 665 bus_space_write_4(iot, ioh, ELINK_DMACTRL, 666 bus_space_read_4(iot, ioh, ELINK_DMACTRL) | ELINK_DMAC_UPRXEAREN); 667 668 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK | S_MASK); 669 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK | S_MASK); 670 671 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 672 if (sc->intr_ack) 673 (* sc->intr_ack)(sc); 674 ex_set_media(sc); 675 ex_set_mc(sc); 676 677 678 bus_space_write_2(iot, ioh, ELINK_COMMAND, STATS_ENABLE); 679 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 680 bus_space_write_4(iot, ioh, ELINK_UPLISTPTR, sc->sc_upddma); 681 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 682 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_UPUNSTALL); 683 684 if (sc->ex_conf & (EX_CONF_PHY_POWER | EX_CONF_INV_LED_POLARITY)) { 685 u_int16_t cbcard_config; 686 687 GO_WINDOW(2); 688 cbcard_config = bus_space_read_2(sc->sc_iot, sc->sc_ioh, 0x0c); 689 if (sc->ex_conf & EX_CONF_PHY_POWER) { 690 cbcard_config |= 0x4000; /* turn on PHY power */ 691 } 692 if (sc->ex_conf & EX_CONF_INV_LED_POLARITY) { 693 cbcard_config |= 0x0010; /* invert LED polarity */ 694 } 695 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 0x0c, cbcard_config); 696 697 GO_WINDOW(3); 698 } 699 700 ifp->if_flags |= IFF_RUNNING; 701 ifp->if_flags &= ~IFF_OACTIVE; 702 ex_start(ifp); 703 704 GO_WINDOW(1); 705 706 callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc); 707 708 out: 709 if (error) { 710 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 711 ifp->if_timer = 0; 712 printf("%s: interface not running\n", sc->sc_dev.dv_xname); 713 } 714 return (error); 715 } 716 717 #define ex_mchash(addr) (ether_crc32_be((addr), ETHER_ADDR_LEN) & 0xff) 718 719 /* 720 * Set multicast receive filter. Also take care of promiscuous mode 721 * here (XXX). 722 */ 723 void 724 ex_set_mc(sc) 725 struct ex_softc *sc; 726 { 727 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 728 struct ethercom *ec = &sc->sc_ethercom; 729 struct ether_multi *enm; 730 struct ether_multistep estep; 731 int i; 732 u_int16_t mask = FIL_INDIVIDUAL | FIL_BRDCST; 733 734 if (ifp->if_flags & IFF_PROMISC) 735 mask |= FIL_PROMISC; 736 737 if (!(ifp->if_flags & IFF_MULTICAST)) 738 goto out; 739 740 if (!(sc->ex_conf & EX_CONF_90XB) || ifp->if_flags & IFF_ALLMULTI) { 741 mask |= (ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0; 742 } else { 743 ETHER_FIRST_MULTI(estep, ec, enm); 744 while (enm != NULL) { 745 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 746 ETHER_ADDR_LEN) != 0) 747 goto out; 748 i = ex_mchash(enm->enm_addrlo); 749 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 750 ELINK_COMMAND, ELINK_SETHASHFILBIT | i); 751 ETHER_NEXT_MULTI(estep, enm); 752 } 753 mask |= FIL_MULTIHASH; 754 } 755 out: 756 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 757 SET_RX_FILTER | mask); 758 } 759 760 761 static void 762 ex_txstat(sc) 763 struct ex_softc *sc; 764 { 765 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 766 bus_space_tag_t iot = sc->sc_iot; 767 bus_space_handle_t ioh = sc->sc_ioh; 768 int i; 769 770 /* 771 * We need to read+write TX_STATUS until we get a 0 status 772 * in order to turn off the interrupt flag. 773 */ 774 while ((i = bus_space_read_1(iot, ioh, ELINK_TXSTATUS)) & TXS_COMPLETE) { 775 bus_space_write_1(iot, ioh, ELINK_TXSTATUS, 0x0); 776 777 if (i & TXS_JABBER) { 778 ++sc->sc_ethercom.ec_if.if_oerrors; 779 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 780 printf("%s: jabber (%x)\n", 781 sc->sc_dev.dv_xname, i); 782 ex_init(ifp); 783 /* TODO: be more subtle here */ 784 } else if (i & TXS_UNDERRUN) { 785 ++sc->sc_ethercom.ec_if.if_oerrors; 786 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 787 printf("%s: fifo underrun (%x) @%d\n", 788 sc->sc_dev.dv_xname, i, 789 sc->tx_start_thresh); 790 if (sc->tx_succ_ok < 100) 791 sc->tx_start_thresh = min(ETHER_MAX_LEN, 792 sc->tx_start_thresh + 20); 793 sc->tx_succ_ok = 0; 794 ex_init(ifp); 795 /* TODO: be more subtle here */ 796 } else if (i & TXS_MAX_COLLISION) { 797 ++sc->sc_ethercom.ec_if.if_collisions; 798 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 799 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 800 } else 801 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 802 } 803 } 804 805 int 806 ex_media_chg(ifp) 807 struct ifnet *ifp; 808 { 809 810 if (ifp->if_flags & IFF_UP) 811 ex_init(ifp); 812 return 0; 813 } 814 815 void 816 ex_set_media(sc) 817 struct ex_softc *sc; 818 { 819 bus_space_tag_t iot = sc->sc_iot; 820 bus_space_handle_t ioh = sc->sc_ioh; 821 u_int32_t configreg; 822 823 if (((sc->ex_conf & EX_CONF_MII) && 824 (sc->ex_mii.mii_media_active & IFM_FDX)) 825 || (!(sc->ex_conf & EX_CONF_MII) && 826 (sc->ex_mii.mii_media.ifm_media & IFM_FDX))) { 827 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 828 MAC_CONTROL_FDX); 829 } else { 830 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 0); 831 } 832 833 /* 834 * If the device has MII, select it, and then tell the 835 * PHY which media to use. 836 */ 837 if (sc->ex_conf & EX_CONF_MII) { 838 GO_WINDOW(3); 839 840 configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 841 842 configreg &= ~(CONFIG_MEDIAMASK << 16); 843 configreg |= (ELINKMEDIA_MII << (CONFIG_MEDIAMASK_SHIFT + 16)); 844 845 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg); 846 mii_mediachg(&sc->ex_mii); 847 return; 848 } 849 850 GO_WINDOW(4); 851 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0); 852 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 853 delay(800); 854 855 /* 856 * Now turn on the selected media/transceiver. 857 */ 858 switch (IFM_SUBTYPE(sc->ex_mii.mii_media.ifm_cur->ifm_media)) { 859 case IFM_10_T: 860 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 861 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 862 break; 863 864 case IFM_10_2: 865 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 866 DELAY(800); 867 break; 868 869 case IFM_100_TX: 870 case IFM_100_FX: 871 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 872 LINKBEAT_ENABLE); 873 DELAY(800); 874 break; 875 876 case IFM_10_5: 877 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 878 SQE_ENABLE); 879 DELAY(800); 880 break; 881 882 case IFM_MANUAL: 883 break; 884 885 case IFM_NONE: 886 return; 887 888 default: 889 panic("ex_set_media: impossible"); 890 } 891 892 GO_WINDOW(3); 893 configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 894 895 configreg &= ~(CONFIG_MEDIAMASK << 16); 896 configreg |= (sc->ex_mii.mii_media.ifm_cur->ifm_data << 897 (CONFIG_MEDIAMASK_SHIFT + 16)); 898 899 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg); 900 } 901 902 /* 903 * Get currently-selected media from card. 904 * (if_media callback, may be called before interface is brought up). 905 */ 906 void 907 ex_media_stat(ifp, req) 908 struct ifnet *ifp; 909 struct ifmediareq *req; 910 { 911 struct ex_softc *sc = ifp->if_softc; 912 913 if (sc->ex_conf & EX_CONF_MII) { 914 mii_pollstat(&sc->ex_mii); 915 req->ifm_status = sc->ex_mii.mii_media_status; 916 req->ifm_active = sc->ex_mii.mii_media_active; 917 } else { 918 GO_WINDOW(4); 919 req->ifm_status = IFM_AVALID; 920 req->ifm_active = sc->ex_mii.mii_media.ifm_cur->ifm_media; 921 if (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 922 ELINK_W4_MEDIA_TYPE) & LINKBEAT_DETECT) 923 req->ifm_status |= IFM_ACTIVE; 924 GO_WINDOW(1); 925 } 926 } 927 928 929 930 /* 931 * Start outputting on the interface. 932 */ 933 static void 934 ex_start(ifp) 935 struct ifnet *ifp; 936 { 937 struct ex_softc *sc = ifp->if_softc; 938 bus_space_tag_t iot = sc->sc_iot; 939 bus_space_handle_t ioh = sc->sc_ioh; 940 volatile struct ex_fraghdr *fr = NULL; 941 volatile struct ex_dpd *dpd = NULL, *prevdpd = NULL; 942 struct ex_txdesc *txp; 943 struct mbuf *mb_head; 944 bus_dmamap_t dmamap; 945 int offset, totlen, segment, error; 946 947 if (sc->tx_head || sc->tx_free == NULL) 948 return; 949 950 txp = NULL; 951 952 /* 953 * We're finished if there is nothing more to add to the list or if 954 * we're all filled up with buffers to transmit. 955 */ 956 while (sc->tx_free != NULL) { 957 /* 958 * Grab a packet to transmit. 959 */ 960 IFQ_DEQUEUE(&ifp->if_snd, mb_head); 961 if (mb_head == NULL) 962 break; 963 964 /* 965 * Get pointer to next available tx desc. 966 */ 967 txp = sc->tx_free; 968 sc->tx_free = txp->tx_next; 969 txp->tx_next = NULL; 970 dmamap = txp->tx_dmamap; 971 972 /* 973 * Go through each of the mbufs in the chain and initialize 974 * the transmit buffer descriptors with the physical address 975 * and size of the mbuf. 976 */ 977 reload: 978 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 979 mb_head, BUS_DMA_NOWAIT); 980 switch (error) { 981 case 0: 982 /* Success. */ 983 break; 984 985 case EFBIG: 986 { 987 struct mbuf *mn; 988 989 /* 990 * We ran out of segments. We have to recopy this 991 * mbuf chain first. Bail out if we can't get the 992 * new buffers. 993 */ 994 printf("%s: too many segments, ", sc->sc_dev.dv_xname); 995 996 MGETHDR(mn, M_DONTWAIT, MT_DATA); 997 if (mn == NULL) { 998 m_freem(mb_head); 999 printf("aborting\n"); 1000 goto out; 1001 } 1002 if (mb_head->m_pkthdr.len > MHLEN) { 1003 MCLGET(mn, M_DONTWAIT); 1004 if ((mn->m_flags & M_EXT) == 0) { 1005 m_freem(mn); 1006 m_freem(mb_head); 1007 printf("aborting\n"); 1008 goto out; 1009 } 1010 } 1011 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, 1012 mtod(mn, caddr_t)); 1013 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; 1014 m_freem(mb_head); 1015 mb_head = mn; 1016 printf("retrying\n"); 1017 goto reload; 1018 } 1019 1020 default: 1021 /* 1022 * Some other problem; report it. 1023 */ 1024 printf("%s: can't load mbuf chain, error = %d\n", 1025 sc->sc_dev.dv_xname, error); 1026 m_freem(mb_head); 1027 goto out; 1028 } 1029 1030 fr = &txp->tx_dpd->dpd_frags[0]; 1031 totlen = 0; 1032 for (segment = 0; segment < dmamap->dm_nsegs; segment++, fr++) { 1033 fr->fr_addr = htole32(dmamap->dm_segs[segment].ds_addr); 1034 fr->fr_len = htole32(dmamap->dm_segs[segment].ds_len); 1035 totlen += dmamap->dm_segs[segment].ds_len; 1036 } 1037 fr--; 1038 fr->fr_len |= htole32(EX_FR_LAST); 1039 txp->tx_mbhead = mb_head; 1040 1041 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 1042 BUS_DMASYNC_PREWRITE); 1043 1044 dpd = txp->tx_dpd; 1045 dpd->dpd_nextptr = 0; 1046 dpd->dpd_fsh = htole32(totlen); 1047 1048 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1049 ((caddr_t)dpd - (caddr_t)sc->sc_dpd), 1050 sizeof (struct ex_dpd), 1051 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1052 1053 /* 1054 * No need to stall the download engine, we know it's 1055 * not busy right now. 1056 * 1057 * Fix up pointers in both the "soft" tx and the physical 1058 * tx list. 1059 */ 1060 if (sc->tx_head != NULL) { 1061 prevdpd = sc->tx_tail->tx_dpd; 1062 offset = ((caddr_t)prevdpd - (caddr_t)sc->sc_dpd); 1063 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1064 offset, sizeof (struct ex_dpd), 1065 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1066 prevdpd->dpd_nextptr = htole32(DPD_DMADDR(sc, txp)); 1067 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1068 offset, sizeof (struct ex_dpd), 1069 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1070 sc->tx_tail->tx_next = txp; 1071 sc->tx_tail = txp; 1072 } else { 1073 sc->tx_tail = sc->tx_head = txp; 1074 } 1075 1076 #if NBPFILTER > 0 1077 /* 1078 * Pass packet to bpf if there is a listener. 1079 */ 1080 if (ifp->if_bpf) 1081 bpf_mtap(ifp->if_bpf, mb_head); 1082 #endif 1083 } 1084 out: 1085 if (sc->tx_head) { 1086 sc->tx_tail->tx_dpd->dpd_fsh |= htole32(EX_DPD_DNIND); 1087 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1088 ((caddr_t)sc->tx_tail->tx_dpd - (caddr_t)sc->sc_dpd), 1089 sizeof (struct ex_dpd), 1090 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1091 ifp->if_flags |= IFF_OACTIVE; 1092 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_DNUNSTALL); 1093 bus_space_write_4(iot, ioh, ELINK_DNLISTPTR, 1094 DPD_DMADDR(sc, sc->tx_head)); 1095 1096 /* trigger watchdog */ 1097 ifp->if_timer = 5; 1098 } 1099 } 1100 1101 1102 int 1103 ex_intr(arg) 1104 void *arg; 1105 { 1106 struct ex_softc *sc = arg; 1107 bus_space_tag_t iot = sc->sc_iot; 1108 bus_space_handle_t ioh = sc->sc_ioh; 1109 u_int16_t stat; 1110 int ret = 0; 1111 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1112 1113 if ((ifp->if_flags & IFF_RUNNING) == 0 || 1114 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1115 return (0); 1116 1117 for (;;) { 1118 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1119 1120 stat = bus_space_read_2(iot, ioh, ELINK_STATUS); 1121 1122 if ((stat & S_MASK) == 0) { 1123 if ((stat & S_INTR_LATCH) == 0) { 1124 #if 0 1125 printf("%s: intr latch cleared\n", 1126 sc->sc_dev.dv_xname); 1127 #endif 1128 break; 1129 } 1130 } 1131 1132 ret = 1; 1133 1134 /* 1135 * Acknowledge interrupts. 1136 */ 1137 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1138 (stat & S_MASK)); 1139 if (sc->intr_ack) 1140 (*sc->intr_ack)(sc); 1141 1142 if (stat & S_HOST_ERROR) { 1143 printf("%s: adapter failure (%x)\n", 1144 sc->sc_dev.dv_xname, stat); 1145 ex_reset(sc); 1146 ex_init(ifp); 1147 return 1; 1148 } 1149 if (stat & S_TX_COMPLETE) { 1150 ex_txstat(sc); 1151 } 1152 if (stat & S_UPD_STATS) { 1153 ex_getstats(sc); 1154 } 1155 if (stat & S_DN_COMPLETE) { 1156 struct ex_txdesc *txp, *ptxp = NULL; 1157 bus_dmamap_t txmap; 1158 1159 /* reset watchdog timer, was set in ex_start() */ 1160 ifp->if_timer = 0; 1161 1162 for (txp = sc->tx_head; txp != NULL; 1163 txp = txp->tx_next) { 1164 bus_dmamap_sync(sc->sc_dmat, 1165 sc->sc_dpd_dmamap, 1166 (caddr_t)txp->tx_dpd - (caddr_t)sc->sc_dpd, 1167 sizeof (struct ex_dpd), 1168 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1169 if (txp->tx_mbhead != NULL) { 1170 txmap = txp->tx_dmamap; 1171 bus_dmamap_sync(sc->sc_dmat, txmap, 1172 0, txmap->dm_mapsize, 1173 BUS_DMASYNC_POSTWRITE); 1174 bus_dmamap_unload(sc->sc_dmat, txmap); 1175 m_freem(txp->tx_mbhead); 1176 txp->tx_mbhead = NULL; 1177 } 1178 ptxp = txp; 1179 } 1180 1181 /* 1182 * Move finished tx buffers back to the tx free list. 1183 */ 1184 if (sc->tx_free) { 1185 sc->tx_ftail->tx_next = sc->tx_head; 1186 sc->tx_ftail = ptxp; 1187 } else 1188 sc->tx_ftail = sc->tx_free = sc->tx_head; 1189 1190 sc->tx_head = sc->tx_tail = NULL; 1191 ifp->if_flags &= ~IFF_OACTIVE; 1192 } 1193 1194 if (stat & S_UP_COMPLETE) { 1195 struct ex_rxdesc *rxd; 1196 struct mbuf *m; 1197 struct ex_upd *upd; 1198 bus_dmamap_t rxmap; 1199 u_int32_t pktstat; 1200 1201 rcvloop: 1202 rxd = sc->rx_head; 1203 rxmap = rxd->rx_dmamap; 1204 m = rxd->rx_mbhead; 1205 upd = rxd->rx_upd; 1206 1207 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, 1208 rxmap->dm_mapsize, 1209 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1210 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1211 ((caddr_t)upd - (caddr_t)sc->sc_upd), 1212 sizeof (struct ex_upd), 1213 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1214 pktstat = le32toh(upd->upd_pktstatus); 1215 1216 if (pktstat & EX_UPD_COMPLETE) { 1217 /* 1218 * Remove first packet from the chain. 1219 */ 1220 sc->rx_head = rxd->rx_next; 1221 rxd->rx_next = NULL; 1222 1223 /* 1224 * Add a new buffer to the receive chain. 1225 * If this fails, the old buffer is recycled 1226 * instead. 1227 */ 1228 if (ex_add_rxbuf(sc, rxd) == 0) { 1229 u_int16_t total_len; 1230 1231 if (pktstat & 1232 ((sc->sc_ethercom.ec_capenable & 1233 ETHERCAP_VLAN_MTU) ? 1234 EX_UPD_ERR_VLAN : EX_UPD_ERR)) { 1235 ifp->if_ierrors++; 1236 m_freem(m); 1237 goto rcvloop; 1238 } 1239 1240 total_len = pktstat & EX_UPD_PKTLENMASK; 1241 if (total_len < 1242 sizeof(struct ether_header)) { 1243 m_freem(m); 1244 goto rcvloop; 1245 } 1246 m->m_pkthdr.rcvif = ifp; 1247 m->m_pkthdr.len = m->m_len = total_len; 1248 #if NBPFILTER > 0 1249 if (ifp->if_bpf) 1250 bpf_mtap(ifp->if_bpf, m); 1251 #endif 1252 (*ifp->if_input)(ifp, m); 1253 } 1254 goto rcvloop; 1255 } 1256 /* 1257 * Just in case we filled up all UPDs and the DMA engine 1258 * stalled. We could be more subtle about this. 1259 */ 1260 if (bus_space_read_4(iot, ioh, ELINK_UPLISTPTR) == 0) { 1261 printf("%s: uplistptr was 0\n", 1262 sc->sc_dev.dv_xname); 1263 ex_init(ifp); 1264 } else if (bus_space_read_4(iot, ioh, ELINK_UPPKTSTATUS) 1265 & 0x2000) { 1266 printf("%s: receive stalled\n", 1267 sc->sc_dev.dv_xname); 1268 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1269 ELINK_UPUNSTALL); 1270 } 1271 } 1272 } 1273 1274 /* no more interrupts */ 1275 if (ret && IFQ_IS_EMPTY(&ifp->if_snd) == 0) 1276 ex_start(ifp); 1277 return ret; 1278 } 1279 1280 int 1281 ex_ioctl(ifp, cmd, data) 1282 struct ifnet *ifp; 1283 u_long cmd; 1284 caddr_t data; 1285 { 1286 struct ex_softc *sc = ifp->if_softc; 1287 struct ifreq *ifr = (struct ifreq *)data; 1288 int s, error; 1289 1290 s = splnet(); 1291 1292 switch (cmd) { 1293 case SIOCSIFMEDIA: 1294 case SIOCGIFMEDIA: 1295 error = ifmedia_ioctl(ifp, ifr, &sc->ex_mii.mii_media, cmd); 1296 break; 1297 1298 default: 1299 error = ether_ioctl(ifp, cmd, data); 1300 if (error == ENETRESET) { 1301 if (sc->enabled) { 1302 /* 1303 * Multicast list has changed; set the hardware filter 1304 * accordingly. 1305 */ 1306 ex_set_mc(sc); 1307 } 1308 error = 0; 1309 } 1310 break; 1311 } 1312 1313 splx(s); 1314 return (error); 1315 } 1316 1317 void 1318 ex_getstats(sc) 1319 struct ex_softc *sc; 1320 { 1321 bus_space_handle_t ioh = sc->sc_ioh; 1322 bus_space_tag_t iot = sc->sc_iot; 1323 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1324 u_int8_t upperok; 1325 1326 GO_WINDOW(6); 1327 upperok = bus_space_read_1(iot, ioh, UPPER_FRAMES_OK); 1328 ifp->if_ipackets += bus_space_read_1(iot, ioh, RX_FRAMES_OK); 1329 ifp->if_ipackets += (upperok & 0x03) << 8; 1330 ifp->if_opackets += bus_space_read_1(iot, ioh, TX_FRAMES_OK); 1331 ifp->if_opackets += (upperok & 0x30) << 4; 1332 ifp->if_ierrors += bus_space_read_1(iot, ioh, RX_OVERRUNS); 1333 ifp->if_collisions += bus_space_read_1(iot, ioh, TX_COLLISIONS); 1334 /* 1335 * There seems to be no way to get the exact number of collisions, 1336 * this is the number that occured at the very least. 1337 */ 1338 ifp->if_collisions += 2 * bus_space_read_1(iot, ioh, 1339 TX_AFTER_X_COLLISIONS); 1340 ifp->if_ibytes += bus_space_read_2(iot, ioh, RX_TOTAL_OK); 1341 ifp->if_obytes += bus_space_read_2(iot, ioh, TX_TOTAL_OK); 1342 1343 /* 1344 * Clear the following to avoid stats overflow interrupts 1345 */ 1346 bus_space_read_1(iot, ioh, TX_DEFERRALS); 1347 bus_space_read_1(iot, ioh, TX_AFTER_1_COLLISION); 1348 bus_space_read_1(iot, ioh, TX_NO_SQE); 1349 bus_space_read_1(iot, ioh, TX_CD_LOST); 1350 GO_WINDOW(4); 1351 bus_space_read_1(iot, ioh, ELINK_W4_BADSSD); 1352 upperok = bus_space_read_1(iot, ioh, ELINK_W4_UBYTESOK); 1353 ifp->if_ibytes += (upperok & 0x0f) << 16; 1354 ifp->if_obytes += (upperok & 0xf0) << 12; 1355 GO_WINDOW(1); 1356 } 1357 1358 void 1359 ex_printstats(sc) 1360 struct ex_softc *sc; 1361 { 1362 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1363 1364 ex_getstats(sc); 1365 printf("in %llu out %llu ierror %llu oerror %llu ibytes %llu obytes " 1366 "%llu\n", (unsigned long long)ifp->if_ipackets, 1367 (unsigned long long)ifp->if_opackets, 1368 (unsigned long long)ifp->if_ierrors, 1369 (unsigned long long)ifp->if_oerrors, 1370 (unsigned long long)ifp->if_ibytes, 1371 (unsigned long long)ifp->if_obytes); 1372 } 1373 1374 void 1375 ex_tick(arg) 1376 void *arg; 1377 { 1378 struct ex_softc *sc = arg; 1379 int s; 1380 1381 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1382 return; 1383 1384 s = splnet(); 1385 1386 if (sc->ex_conf & EX_CONF_MII) 1387 mii_tick(&sc->ex_mii); 1388 1389 if (!(bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, ELINK_STATUS) 1390 & S_COMMAND_IN_PROGRESS)) 1391 ex_getstats(sc); 1392 1393 splx(s); 1394 1395 callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc); 1396 } 1397 1398 void 1399 ex_reset(sc) 1400 struct ex_softc *sc; 1401 { 1402 u_int16_t val = GLOBAL_RESET; 1403 1404 if (sc->ex_conf & EX_CONF_RESETHACK) 1405 val |= 0xff; 1406 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, val); 1407 delay(400); 1408 ex_waitcmd(sc); 1409 } 1410 1411 void 1412 ex_watchdog(ifp) 1413 struct ifnet *ifp; 1414 { 1415 struct ex_softc *sc = ifp->if_softc; 1416 1417 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1418 ++sc->sc_ethercom.ec_if.if_oerrors; 1419 1420 ex_reset(sc); 1421 ex_init(ifp); 1422 } 1423 1424 void 1425 ex_stop(ifp, disable) 1426 struct ifnet *ifp; 1427 int disable; 1428 { 1429 struct ex_softc *sc = ifp->if_softc; 1430 bus_space_tag_t iot = sc->sc_iot; 1431 bus_space_handle_t ioh = sc->sc_ioh; 1432 struct ex_txdesc *tx; 1433 struct ex_rxdesc *rx; 1434 int i; 1435 1436 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1437 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1438 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1439 1440 for (tx = sc->tx_head ; tx != NULL; tx = tx->tx_next) { 1441 if (tx->tx_mbhead == NULL) 1442 continue; 1443 m_freem(tx->tx_mbhead); 1444 tx->tx_mbhead = NULL; 1445 bus_dmamap_unload(sc->sc_dmat, tx->tx_dmamap); 1446 tx->tx_dpd->dpd_fsh = tx->tx_dpd->dpd_nextptr = 0; 1447 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1448 ((caddr_t)tx->tx_dpd - (caddr_t)sc->sc_dpd), 1449 sizeof (struct ex_dpd), 1450 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1451 } 1452 sc->tx_tail = sc->tx_head = NULL; 1453 ex_init_txdescs(sc); 1454 1455 sc->rx_tail = sc->rx_head = 0; 1456 for (i = 0; i < EX_NUPD; i++) { 1457 rx = &sc->sc_rxdescs[i]; 1458 if (rx->rx_mbhead != NULL) { 1459 bus_dmamap_unload(sc->sc_dmat, rx->rx_dmamap); 1460 m_freem(rx->rx_mbhead); 1461 rx->rx_mbhead = NULL; 1462 } 1463 ex_add_rxbuf(sc, rx); 1464 } 1465 1466 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1467 1468 callout_stop(&sc->ex_mii_callout); 1469 if (sc->ex_conf & EX_CONF_MII) 1470 mii_down(&sc->ex_mii); 1471 1472 if (disable) 1473 ex_disable(sc); 1474 1475 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1476 ifp->if_timer = 0; 1477 } 1478 1479 static void 1480 ex_init_txdescs(sc) 1481 struct ex_softc *sc; 1482 { 1483 int i; 1484 1485 for (i = 0; i < EX_NDPD; i++) { 1486 sc->sc_txdescs[i].tx_dmamap = sc->sc_tx_dmamaps[i]; 1487 sc->sc_txdescs[i].tx_dpd = &sc->sc_dpd[i]; 1488 if (i < EX_NDPD - 1) 1489 sc->sc_txdescs[i].tx_next = &sc->sc_txdescs[i + 1]; 1490 else 1491 sc->sc_txdescs[i].tx_next = NULL; 1492 } 1493 sc->tx_free = &sc->sc_txdescs[0]; 1494 sc->tx_ftail = &sc->sc_txdescs[EX_NDPD-1]; 1495 } 1496 1497 1498 int 1499 ex_activate(self, act) 1500 struct device *self; 1501 enum devact act; 1502 { 1503 struct ex_softc *sc = (void *) self; 1504 int s, error = 0; 1505 1506 s = splnet(); 1507 switch (act) { 1508 case DVACT_ACTIVATE: 1509 error = EOPNOTSUPP; 1510 break; 1511 1512 case DVACT_DEACTIVATE: 1513 if (sc->ex_conf & EX_CONF_MII) 1514 mii_activate(&sc->ex_mii, act, MII_PHY_ANY, 1515 MII_OFFSET_ANY); 1516 if_deactivate(&sc->sc_ethercom.ec_if); 1517 break; 1518 } 1519 splx(s); 1520 1521 return (error); 1522 } 1523 1524 int 1525 ex_detach(sc) 1526 struct ex_softc *sc; 1527 { 1528 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1529 struct ex_rxdesc *rxd; 1530 int i; 1531 1532 /* Succeed now if there's no work to do. */ 1533 if ((sc->ex_flags & EX_FLAGS_ATTACHED) == 0) 1534 return (0); 1535 1536 /* Unhook our tick handler. */ 1537 callout_stop(&sc->ex_mii_callout); 1538 1539 if (sc->ex_conf & EX_CONF_MII) { 1540 /* Detach all PHYs */ 1541 mii_detach(&sc->ex_mii, MII_PHY_ANY, MII_OFFSET_ANY); 1542 } 1543 1544 /* Delete all remaining media. */ 1545 ifmedia_delete_instance(&sc->ex_mii.mii_media, IFM_INST_ANY); 1546 1547 #if NRND > 0 1548 rnd_detach_source(&sc->rnd_source); 1549 #endif 1550 ether_ifdetach(ifp); 1551 if_detach(ifp); 1552 1553 for (i = 0; i < EX_NUPD; i++) { 1554 rxd = &sc->sc_rxdescs[i]; 1555 if (rxd->rx_mbhead != NULL) { 1556 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap); 1557 m_freem(rxd->rx_mbhead); 1558 rxd->rx_mbhead = NULL; 1559 } 1560 } 1561 for (i = 0; i < EX_NUPD; i++) 1562 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]); 1563 for (i = 0; i < EX_NDPD; i++) 1564 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]); 1565 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap); 1566 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap); 1567 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd, 1568 EX_NDPD * sizeof (struct ex_dpd)); 1569 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg); 1570 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap); 1571 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap); 1572 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd, 1573 EX_NUPD * sizeof (struct ex_upd)); 1574 bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg); 1575 1576 shutdownhook_disestablish(sc->sc_sdhook); 1577 1578 return (0); 1579 } 1580 1581 /* 1582 * Before reboots, reset card completely. 1583 */ 1584 static void 1585 ex_shutdown(arg) 1586 void *arg; 1587 { 1588 struct ex_softc *sc = arg; 1589 1590 ex_stop(&sc->sc_ethercom.ec_if, 1); 1591 } 1592 1593 /* 1594 * Read EEPROM data. 1595 * XXX what to do if EEPROM doesn't unbusy? 1596 */ 1597 u_int16_t 1598 ex_read_eeprom(sc, offset) 1599 struct ex_softc *sc; 1600 int offset; 1601 { 1602 bus_space_tag_t iot = sc->sc_iot; 1603 bus_space_handle_t ioh = sc->sc_ioh; 1604 u_int16_t data = 0, cmd = READ_EEPROM; 1605 int off; 1606 1607 off = sc->ex_conf & EX_CONF_EEPROM_OFF ? 0x30 : 0; 1608 cmd = sc->ex_conf & EX_CONF_EEPROM_8BIT ? READ_EEPROM8 : READ_EEPROM; 1609 1610 GO_WINDOW(0); 1611 if (ex_eeprom_busy(sc)) 1612 goto out; 1613 bus_space_write_2(iot, ioh, ELINK_W0_EEPROM_COMMAND, 1614 cmd | (off + (offset & 0x3f))); 1615 if (ex_eeprom_busy(sc)) 1616 goto out; 1617 data = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_DATA); 1618 out: 1619 return data; 1620 } 1621 1622 static int 1623 ex_eeprom_busy(sc) 1624 struct ex_softc *sc; 1625 { 1626 bus_space_tag_t iot = sc->sc_iot; 1627 bus_space_handle_t ioh = sc->sc_ioh; 1628 int i = 100; 1629 1630 while (i--) { 1631 if (!(bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND) & 1632 EEPROM_BUSY)) 1633 return 0; 1634 delay(100); 1635 } 1636 printf("\n%s: eeprom stays busy.\n", sc->sc_dev.dv_xname); 1637 return (1); 1638 } 1639 1640 /* 1641 * Create a new rx buffer and add it to the 'soft' rx list. 1642 */ 1643 static int 1644 ex_add_rxbuf(sc, rxd) 1645 struct ex_softc *sc; 1646 struct ex_rxdesc *rxd; 1647 { 1648 struct mbuf *m, *oldm; 1649 bus_dmamap_t rxmap; 1650 int error, rval = 0; 1651 1652 oldm = rxd->rx_mbhead; 1653 rxmap = rxd->rx_dmamap; 1654 1655 MGETHDR(m, M_DONTWAIT, MT_DATA); 1656 if (m != NULL) { 1657 MCLGET(m, M_DONTWAIT); 1658 if ((m->m_flags & M_EXT) == 0) { 1659 m_freem(m); 1660 if (oldm == NULL) 1661 return 1; 1662 m = oldm; 1663 m->m_data = m->m_ext.ext_buf; 1664 rval = 1; 1665 } 1666 } else { 1667 if (oldm == NULL) 1668 return 1; 1669 m = oldm; 1670 m->m_data = m->m_ext.ext_buf; 1671 rval = 1; 1672 } 1673 1674 /* 1675 * Setup the DMA map for this receive buffer. 1676 */ 1677 if (m != oldm) { 1678 if (oldm != NULL) 1679 bus_dmamap_unload(sc->sc_dmat, rxmap); 1680 error = bus_dmamap_load(sc->sc_dmat, rxmap, 1681 m->m_ext.ext_buf, MCLBYTES, NULL, BUS_DMA_NOWAIT); 1682 if (error) { 1683 printf("%s: can't load rx buffer, error = %d\n", 1684 sc->sc_dev.dv_xname, error); 1685 panic("ex_add_rxbuf"); /* XXX */ 1686 } 1687 } 1688 1689 /* 1690 * Align for data after 14 byte header. 1691 */ 1692 m->m_data += 2; 1693 1694 rxd->rx_mbhead = m; 1695 rxd->rx_upd->upd_pktstatus = htole32(MCLBYTES - 2); 1696 rxd->rx_upd->upd_frags[0].fr_addr = 1697 htole32(rxmap->dm_segs[0].ds_addr + 2); 1698 rxd->rx_upd->upd_nextptr = 0; 1699 1700 /* 1701 * Attach it to the end of the list. 1702 */ 1703 if (sc->rx_head != NULL) { 1704 sc->rx_tail->rx_next = rxd; 1705 sc->rx_tail->rx_upd->upd_nextptr = htole32(sc->sc_upddma + 1706 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd)); 1707 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1708 (caddr_t)sc->rx_tail->rx_upd - (caddr_t)sc->sc_upd, 1709 sizeof (struct ex_upd), 1710 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1711 } else { 1712 sc->rx_head = rxd; 1713 } 1714 sc->rx_tail = rxd; 1715 1716 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, rxmap->dm_mapsize, 1717 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1718 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1719 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd), 1720 sizeof (struct ex_upd), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1721 return (rval); 1722 } 1723 1724 u_int32_t 1725 ex_mii_bitbang_read(self) 1726 struct device *self; 1727 { 1728 struct ex_softc *sc = (void *) self; 1729 1730 /* We're already in Window 4. */ 1731 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT)); 1732 } 1733 1734 void 1735 ex_mii_bitbang_write(self, val) 1736 struct device *self; 1737 u_int32_t val; 1738 { 1739 struct ex_softc *sc = (void *) self; 1740 1741 /* We're already in Window 4. */ 1742 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT, val); 1743 } 1744 1745 int 1746 ex_mii_readreg(v, phy, reg) 1747 struct device *v; 1748 int phy, reg; 1749 { 1750 struct ex_softc *sc = (struct ex_softc *)v; 1751 int val; 1752 1753 if ((sc->ex_conf & EX_CONF_INTPHY) && phy != ELINK_INTPHY_ID) 1754 return 0; 1755 1756 GO_WINDOW(4); 1757 1758 val = mii_bitbang_readreg(v, &ex_mii_bitbang_ops, phy, reg); 1759 1760 GO_WINDOW(1); 1761 1762 return (val); 1763 } 1764 1765 void 1766 ex_mii_writereg(v, phy, reg, data) 1767 struct device *v; 1768 int phy; 1769 int reg; 1770 int data; 1771 { 1772 struct ex_softc *sc = (struct ex_softc *)v; 1773 1774 GO_WINDOW(4); 1775 1776 mii_bitbang_writereg(v, &ex_mii_bitbang_ops, phy, reg, data); 1777 1778 GO_WINDOW(1); 1779 } 1780 1781 void 1782 ex_mii_statchg(v) 1783 struct device *v; 1784 { 1785 struct ex_softc *sc = (struct ex_softc *)v; 1786 bus_space_tag_t iot = sc->sc_iot; 1787 bus_space_handle_t ioh = sc->sc_ioh; 1788 int mctl; 1789 1790 GO_WINDOW(3); 1791 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1792 if (sc->ex_mii.mii_media_active & IFM_FDX) 1793 mctl |= MAC_CONTROL_FDX; 1794 else 1795 mctl &= ~MAC_CONTROL_FDX; 1796 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1797 GO_WINDOW(1); /* back to operating window */ 1798 } 1799 1800 int 1801 ex_enable(sc) 1802 struct ex_softc *sc; 1803 { 1804 if (sc->enabled == 0 && sc->enable != NULL) { 1805 if ((*sc->enable)(sc) != 0) { 1806 printf("%s: de/vice enable failed\n", 1807 sc->sc_dev.dv_xname); 1808 return (EIO); 1809 } 1810 sc->enabled = 1; 1811 } 1812 return (0); 1813 } 1814 1815 void 1816 ex_disable(sc) 1817 struct ex_softc *sc; 1818 { 1819 if (sc->enabled == 1 && sc->disable != NULL) { 1820 (*sc->disable)(sc); 1821 sc->enabled = 0; 1822 } 1823 } 1824 1825 void 1826 ex_power(why, arg) 1827 int why; 1828 void *arg; 1829 { 1830 struct ex_softc *sc = (void *)arg; 1831 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1832 int s; 1833 1834 s = splnet(); 1835 if (why != PWR_RESUME) { 1836 ex_stop(ifp, 0); 1837 if (sc->power != NULL) 1838 (*sc->power)(sc, why); 1839 } else if (ifp->if_flags & IFF_UP) { 1840 if (sc->power != NULL) 1841 (*sc->power)(sc, why); 1842 ex_init(ifp); 1843 } 1844 splx(s); 1845 } 1846
Indexes created Wed Oct 22 06:10:02 GMT 2025