elinkxl.c revision 1.47.2.10
1 /* $NetBSD: elinkxl.c,v 1.47.2.10 2002/11/11 22:09:25 nathanw Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Frank van der Linden. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: elinkxl.c,v 1.47.2.10 2002/11/11 22:09:25 nathanw Exp $"); 41 42 #include "bpfilter.h" 43 #include "rnd.h" 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/callout.h> 48 #include <sys/kernel.h> 49 #include <sys/mbuf.h> 50 #include <sys/socket.h> 51 #include <sys/ioctl.h> 52 #include <sys/errno.h> 53 #include <sys/syslog.h> 54 #include <sys/select.h> 55 #include <sys/device.h> 56 #if NRND > 0 57 #include <sys/rnd.h> 58 #endif 59 60 #include <uvm/uvm_extern.h> 61 62 #include <net/if.h> 63 #include <net/if_dl.h> 64 #include <net/if_ether.h> 65 #include <net/if_media.h> 66 67 #if NBPFILTER > 0 68 #include <net/bpf.h> 69 #include <net/bpfdesc.h> 70 #endif 71 72 #include <machine/cpu.h> 73 #include <machine/bus.h> 74 #include <machine/intr.h> 75 #include <machine/endian.h> 76 77 #include <dev/mii/miivar.h> 78 #include <dev/mii/mii.h> 79 #include <dev/mii/mii_bitbang.h> 80 81 #include <dev/ic/elink3reg.h> 82 /* #include <dev/ic/elink3var.h> */ 83 #include <dev/ic/elinkxlreg.h> 84 #include <dev/ic/elinkxlvar.h> 85 86 #ifdef DEBUG 87 int exdebug = 0; 88 #endif 89 90 /* ifmedia callbacks */ 91 int ex_media_chg __P((struct ifnet *ifp)); 92 void ex_media_stat __P((struct ifnet *ifp, struct ifmediareq *req)); 93 94 void ex_probe_media __P((struct ex_softc *)); 95 void ex_set_filter __P((struct ex_softc *)); 96 void ex_set_media __P((struct ex_softc *)); 97 struct mbuf *ex_get __P((struct ex_softc *, int)); 98 u_int16_t ex_read_eeprom __P((struct ex_softc *, int)); 99 int ex_init __P((struct ifnet *)); 100 void ex_read __P((struct ex_softc *)); 101 void ex_reset __P((struct ex_softc *)); 102 void ex_set_mc __P((struct ex_softc *)); 103 void ex_getstats __P((struct ex_softc *)); 104 void ex_printstats __P((struct ex_softc *)); 105 void ex_tick __P((void *)); 106 107 void ex_power __P((int, void *)); 108 109 static int ex_eeprom_busy __P((struct ex_softc *)); 110 static int ex_add_rxbuf __P((struct ex_softc *, struct ex_rxdesc *)); 111 static void ex_init_txdescs __P((struct ex_softc *)); 112 113 static void ex_shutdown __P((void *)); 114 static void ex_start __P((struct ifnet *)); 115 static void ex_txstat __P((struct ex_softc *)); 116 117 int ex_mii_readreg __P((struct device *, int, int)); 118 void ex_mii_writereg __P((struct device *, int, int, int)); 119 void ex_mii_statchg __P((struct device *)); 120 121 void ex_probemedia __P((struct ex_softc *)); 122 123 /* 124 * Structure to map media-present bits in boards to ifmedia codes and 125 * printable media names. Used for table-driven ifmedia initialization. 126 */ 127 struct ex_media { 128 int exm_mpbit; /* media present bit */ 129 const char *exm_name; /* name of medium */ 130 int exm_ifmedia; /* ifmedia word for medium */ 131 int exm_epmedia; /* ELINKMEDIA_* constant */ 132 }; 133 134 /* 135 * Media table for 3c90x chips. Note that chips with MII have no 136 * `native' media. 137 */ 138 struct ex_media ex_native_media[] = { 139 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 140 ELINKMEDIA_10BASE_T }, 141 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 142 ELINKMEDIA_10BASE_T }, 143 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 144 ELINKMEDIA_AUI }, 145 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 146 ELINKMEDIA_10BASE_2 }, 147 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 148 ELINKMEDIA_100BASE_TX }, 149 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 150 ELINKMEDIA_100BASE_TX }, 151 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 152 ELINKMEDIA_100BASE_FX }, 153 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 154 ELINKMEDIA_MII }, 155 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 156 ELINKMEDIA_100BASE_T4 }, 157 { 0, NULL, 0, 158 0 }, 159 }; 160 161 /* 162 * MII bit-bang glue. 163 */ 164 u_int32_t ex_mii_bitbang_read __P((struct device *)); 165 void ex_mii_bitbang_write __P((struct device *, u_int32_t)); 166 167 const struct mii_bitbang_ops ex_mii_bitbang_ops = { 168 ex_mii_bitbang_read, 169 ex_mii_bitbang_write, 170 { 171 ELINK_PHY_DATA, /* MII_BIT_MDO */ 172 ELINK_PHY_DATA, /* MII_BIT_MDI */ 173 ELINK_PHY_CLK, /* MII_BIT_MDC */ 174 ELINK_PHY_DIR, /* MII_BIT_DIR_HOST_PHY */ 175 0, /* MII_BIT_DIR_PHY_HOST */ 176 } 177 }; 178 179 /* 180 * Back-end attach and configure. 181 */ 182 void 183 ex_config(sc) 184 struct ex_softc *sc; 185 { 186 struct ifnet *ifp; 187 u_int16_t val; 188 u_int8_t macaddr[ETHER_ADDR_LEN] = {0}; 189 bus_space_tag_t iot = sc->sc_iot; 190 bus_space_handle_t ioh = sc->sc_ioh; 191 int i, error, attach_stage; 192 193 callout_init(&sc->ex_mii_callout); 194 195 ex_reset(sc); 196 197 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR0); 198 macaddr[0] = val >> 8; 199 macaddr[1] = val & 0xff; 200 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR1); 201 macaddr[2] = val >> 8; 202 macaddr[3] = val & 0xff; 203 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR2); 204 macaddr[4] = val >> 8; 205 macaddr[5] = val & 0xff; 206 207 printf("%s: MAC address %s\n", sc->sc_dev.dv_xname, 208 ether_sprintf(macaddr)); 209 210 if (sc->ex_conf & (EX_CONF_INV_LED_POLARITY|EX_CONF_PHY_POWER)) { 211 GO_WINDOW(2); 212 val = bus_space_read_2(iot, ioh, ELINK_W2_RESET_OPTIONS); 213 if (sc->ex_conf & EX_CONF_INV_LED_POLARITY) 214 val |= ELINK_RESET_OPT_LEDPOLAR; 215 if (sc->ex_conf & EX_CONF_PHY_POWER) 216 val |= ELINK_RESET_OPT_PHYPOWER; 217 bus_space_write_2(iot, ioh, ELINK_W2_RESET_OPTIONS, val); 218 } 219 220 attach_stage = 0; 221 222 /* 223 * Allocate the upload descriptors, and create and load the DMA 224 * map for them. 225 */ 226 if ((error = bus_dmamem_alloc(sc->sc_dmat, 227 EX_NUPD * sizeof (struct ex_upd), PAGE_SIZE, 0, &sc->sc_useg, 1, 228 &sc->sc_urseg, BUS_DMA_NOWAIT)) != 0) { 229 printf("%s: can't allocate upload descriptors, error = %d\n", 230 sc->sc_dev.dv_xname, error); 231 goto fail; 232 } 233 234 attach_stage = 1; 235 236 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg, 237 EX_NUPD * sizeof (struct ex_upd), (caddr_t *)&sc->sc_upd, 238 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 239 printf("%s: can't map upload descriptors, error = %d\n", 240 sc->sc_dev.dv_xname, error); 241 goto fail; 242 } 243 244 attach_stage = 2; 245 246 if ((error = bus_dmamap_create(sc->sc_dmat, 247 EX_NUPD * sizeof (struct ex_upd), 1, 248 EX_NUPD * sizeof (struct ex_upd), 0, BUS_DMA_NOWAIT, 249 &sc->sc_upd_dmamap)) != 0) { 250 printf("%s: can't create upload desc. DMA map, error = %d\n", 251 sc->sc_dev.dv_xname, error); 252 goto fail; 253 } 254 255 attach_stage = 3; 256 257 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_upd_dmamap, 258 sc->sc_upd, EX_NUPD * sizeof (struct ex_upd), NULL, 259 BUS_DMA_NOWAIT)) != 0) { 260 printf("%s: can't load upload desc. DMA map, error = %d\n", 261 sc->sc_dev.dv_xname, error); 262 goto fail; 263 } 264 265 attach_stage = 4; 266 267 /* 268 * Allocate the download descriptors, and create and load the DMA 269 * map for them. 270 */ 271 if ((error = bus_dmamem_alloc(sc->sc_dmat, 272 EX_NDPD * sizeof (struct ex_dpd), PAGE_SIZE, 0, &sc->sc_dseg, 1, 273 &sc->sc_drseg, BUS_DMA_NOWAIT)) != 0) { 274 printf("%s: can't allocate download descriptors, error = %d\n", 275 sc->sc_dev.dv_xname, error); 276 goto fail; 277 } 278 279 attach_stage = 5; 280 281 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg, 282 EX_NDPD * sizeof (struct ex_dpd), (caddr_t *)&sc->sc_dpd, 283 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 284 printf("%s: can't map download descriptors, error = %d\n", 285 sc->sc_dev.dv_xname, error); 286 goto fail; 287 } 288 memset(sc->sc_dpd, 0, EX_NDPD * sizeof (struct ex_dpd)); 289 290 attach_stage = 6; 291 292 if ((error = bus_dmamap_create(sc->sc_dmat, 293 EX_NDPD * sizeof (struct ex_dpd), 1, 294 EX_NDPD * sizeof (struct ex_dpd), 0, BUS_DMA_NOWAIT, 295 &sc->sc_dpd_dmamap)) != 0) { 296 printf("%s: can't create download desc. DMA map, error = %d\n", 297 sc->sc_dev.dv_xname, error); 298 goto fail; 299 } 300 301 attach_stage = 7; 302 303 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dpd_dmamap, 304 sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd), NULL, 305 BUS_DMA_NOWAIT)) != 0) { 306 printf("%s: can't load download desc. DMA map, error = %d\n", 307 sc->sc_dev.dv_xname, error); 308 goto fail; 309 } 310 311 attach_stage = 8; 312 313 314 /* 315 * Create the transmit buffer DMA maps. 316 */ 317 for (i = 0; i < EX_NDPD; i++) { 318 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 319 EX_NTFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 320 &sc->sc_tx_dmamaps[i])) != 0) { 321 printf("%s: can't create tx DMA map %d, error = %d\n", 322 sc->sc_dev.dv_xname, i, error); 323 goto fail; 324 } 325 } 326 327 attach_stage = 9; 328 329 /* 330 * Create the receive buffer DMA maps. 331 */ 332 for (i = 0; i < EX_NUPD; i++) { 333 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 334 EX_NRFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 335 &sc->sc_rx_dmamaps[i])) != 0) { 336 printf("%s: can't create rx DMA map %d, error = %d\n", 337 sc->sc_dev.dv_xname, i, error); 338 goto fail; 339 } 340 } 341 342 attach_stage = 10; 343 344 /* 345 * Create ring of upload descriptors, only once. The DMA engine 346 * will loop over this when receiving packets, stalling if it 347 * hits an UPD with a finished receive. 348 */ 349 for (i = 0; i < EX_NUPD; i++) { 350 sc->sc_rxdescs[i].rx_dmamap = sc->sc_rx_dmamaps[i]; 351 sc->sc_rxdescs[i].rx_upd = &sc->sc_upd[i]; 352 sc->sc_upd[i].upd_frags[0].fr_len = 353 htole32((MCLBYTES - 2) | EX_FR_LAST); 354 if (ex_add_rxbuf(sc, &sc->sc_rxdescs[i]) != 0) { 355 printf("%s: can't allocate or map rx buffers\n", 356 sc->sc_dev.dv_xname); 357 goto fail; 358 } 359 } 360 361 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 0, 362 EX_NUPD * sizeof (struct ex_upd), 363 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 364 365 ex_init_txdescs(sc); 366 367 attach_stage = 11; 368 369 370 GO_WINDOW(3); 371 val = bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS); 372 if (val & ELINK_MEDIACAP_MII) 373 sc->ex_conf |= EX_CONF_MII; 374 375 ifp = &sc->sc_ethercom.ec_if; 376 377 /* 378 * Initialize our media structures and MII info. We'll 379 * probe the MII if we discover that we have one. 380 */ 381 sc->ex_mii.mii_ifp = ifp; 382 sc->ex_mii.mii_readreg = ex_mii_readreg; 383 sc->ex_mii.mii_writereg = ex_mii_writereg; 384 sc->ex_mii.mii_statchg = ex_mii_statchg; 385 ifmedia_init(&sc->ex_mii.mii_media, IFM_IMASK, ex_media_chg, 386 ex_media_stat); 387 388 if (sc->ex_conf & EX_CONF_MII) { 389 /* 390 * Find PHY, extract media information from it. 391 * First, select the right transceiver. 392 */ 393 u_int32_t icfg; 394 395 GO_WINDOW(3); 396 icfg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 397 icfg &= ~(CONFIG_XCVR_SEL << 16); 398 if (val & (ELINK_MEDIACAP_MII | ELINK_MEDIACAP_100BASET4)) 399 icfg |= ELINKMEDIA_MII << (CONFIG_XCVR_SEL_SHIFT + 16); 400 if (val & ELINK_MEDIACAP_100BASETX) 401 icfg |= ELINKMEDIA_AUTO << (CONFIG_XCVR_SEL_SHIFT + 16); 402 if (val & ELINK_MEDIACAP_100BASEFX) 403 icfg |= ELINKMEDIA_100BASE_FX 404 << (CONFIG_XCVR_SEL_SHIFT + 16); 405 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, icfg); 406 407 mii_attach(&sc->sc_dev, &sc->ex_mii, 0xffffffff, 408 MII_PHY_ANY, MII_OFFSET_ANY, 0); 409 if (LIST_FIRST(&sc->ex_mii.mii_phys) == NULL) { 410 ifmedia_add(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE, 411 0, NULL); 412 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE); 413 } else { 414 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_AUTO); 415 } 416 } else 417 ex_probemedia(sc); 418 419 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 420 ifp->if_softc = sc; 421 ifp->if_start = ex_start; 422 ifp->if_ioctl = ex_ioctl; 423 ifp->if_watchdog = ex_watchdog; 424 ifp->if_init = ex_init; 425 ifp->if_stop = ex_stop; 426 ifp->if_flags = 427 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 428 IFQ_SET_READY(&ifp->if_snd); 429 430 /* 431 * We can support 802.1Q VLAN-sized frames. 432 */ 433 sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU; 434 435 /* 436 * The 3c90xB has hardware IPv4/TCPv4/UDPv4 checksum support. 437 */ 438 if (sc->ex_conf & EX_CONF_90XB) 439 sc->sc_ethercom.ec_if.if_capabilities |= IFCAP_CSUM_IPv4 | 440 IFCAP_CSUM_TCPv4 | IFCAP_CSUM_UDPv4; 441 442 if_attach(ifp); 443 ether_ifattach(ifp, macaddr); 444 445 GO_WINDOW(1); 446 447 sc->tx_start_thresh = 20; 448 sc->tx_succ_ok = 0; 449 450 /* TODO: set queues to 0 */ 451 452 #if NRND > 0 453 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 454 RND_TYPE_NET, 0); 455 #endif 456 457 /* Establish callback to reset card when we reboot. */ 458 sc->sc_sdhook = shutdownhook_establish(ex_shutdown, sc); 459 if (sc->sc_sdhook == NULL) 460 printf("%s: WARNING: unable to establish shutdown hook\n", 461 sc->sc_dev.dv_xname); 462 463 /* Add a suspend hook to make sure we come back up after a resume. */ 464 sc->sc_powerhook = powerhook_establish(ex_power, sc); 465 if (sc->sc_powerhook == NULL) 466 printf("%s: WARNING: unable to establish power hook\n", 467 sc->sc_dev.dv_xname); 468 469 /* The attach is successful. */ 470 sc->ex_flags |= EX_FLAGS_ATTACHED; 471 return; 472 473 fail: 474 /* 475 * Free any resources we've allocated during the failed attach 476 * attempt. Do this in reverse order and fall though. 477 */ 478 switch (attach_stage) { 479 case 11: 480 { 481 struct ex_rxdesc *rxd; 482 483 for (i = 0; i < EX_NUPD; i++) { 484 rxd = &sc->sc_rxdescs[i]; 485 if (rxd->rx_mbhead != NULL) { 486 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap); 487 m_freem(rxd->rx_mbhead); 488 } 489 } 490 } 491 /* FALLTHROUGH */ 492 493 case 10: 494 for (i = 0; i < EX_NUPD; i++) 495 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]); 496 /* FALLTHROUGH */ 497 498 case 9: 499 for (i = 0; i < EX_NDPD; i++) 500 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]); 501 /* FALLTHROUGH */ 502 case 8: 503 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap); 504 /* FALLTHROUGH */ 505 506 case 7: 507 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap); 508 /* FALLTHROUGH */ 509 510 case 6: 511 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd, 512 EX_NDPD * sizeof (struct ex_dpd)); 513 /* FALLTHROUGH */ 514 515 case 5: 516 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg); 517 break; 518 519 case 4: 520 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap); 521 /* FALLTHROUGH */ 522 523 case 3: 524 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap); 525 /* FALLTHROUGH */ 526 527 case 2: 528 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd, 529 EX_NUPD * sizeof (struct ex_upd)); 530 /* FALLTHROUGH */ 531 532 case 1: 533 bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg); 534 break; 535 } 536 537 } 538 539 /* 540 * Find the media present on non-MII chips. 541 */ 542 void 543 ex_probemedia(sc) 544 struct ex_softc *sc; 545 { 546 bus_space_tag_t iot = sc->sc_iot; 547 bus_space_handle_t ioh = sc->sc_ioh; 548 struct ifmedia *ifm = &sc->ex_mii.mii_media; 549 struct ex_media *exm; 550 u_int16_t config1, reset_options, default_media; 551 int defmedia = 0; 552 const char *sep = "", *defmedianame = NULL; 553 554 GO_WINDOW(3); 555 config1 = bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2); 556 reset_options = bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 557 GO_WINDOW(0); 558 559 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 560 561 printf("%s: ", sc->sc_dev.dv_xname); 562 563 /* Sanity check that there are any media! */ 564 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 565 printf("no media present!\n"); 566 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 567 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 568 return; 569 } 570 571 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 572 573 for (exm = ex_native_media; exm->exm_name != NULL; exm++) { 574 if (reset_options & exm->exm_mpbit) { 575 /* 576 * Default media is a little complicated. We 577 * support full-duplex which uses the same 578 * reset options bit. 579 * 580 * XXX Check EEPROM for default to FDX? 581 */ 582 if (exm->exm_epmedia == default_media) { 583 if ((exm->exm_ifmedia & IFM_FDX) == 0) { 584 defmedia = exm->exm_ifmedia; 585 defmedianame = exm->exm_name; 586 } 587 } else if (defmedia == 0) { 588 defmedia = exm->exm_ifmedia; 589 defmedianame = exm->exm_name; 590 } 591 ifmedia_add(ifm, exm->exm_ifmedia, exm->exm_epmedia, 592 NULL); 593 PRINT(exm->exm_name); 594 } 595 } 596 597 #undef PRINT 598 599 #ifdef DIAGNOSTIC 600 if (defmedia == 0) 601 panic("ex_probemedia: impossible"); 602 #endif 603 604 printf(", default %s\n", defmedianame); 605 ifmedia_set(ifm, defmedia); 606 } 607 608 /* 609 * Bring device up. 610 */ 611 int 612 ex_init(ifp) 613 struct ifnet *ifp; 614 { 615 struct ex_softc *sc = ifp->if_softc; 616 bus_space_tag_t iot = sc->sc_iot; 617 bus_space_handle_t ioh = sc->sc_ioh; 618 int i; 619 int error = 0; 620 621 if ((error = ex_enable(sc)) != 0) 622 goto out; 623 624 ex_waitcmd(sc); 625 ex_stop(ifp, 0); 626 627 /* 628 * Set the station address and clear the station mask. The latter 629 * is needed for 90x cards, 0 is the default for 90xB cards. 630 */ 631 GO_WINDOW(2); 632 for (i = 0; i < ETHER_ADDR_LEN; i++) { 633 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 634 LLADDR(ifp->if_sadl)[i]); 635 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 636 } 637 638 GO_WINDOW(3); 639 640 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_RESET); 641 ex_waitcmd(sc); 642 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_RESET); 643 ex_waitcmd(sc); 644 645 /* 646 * Disable reclaim threshold for 90xB, set free threshold to 647 * 6 * 256 = 1536 for 90x. 648 */ 649 if (sc->ex_conf & EX_CONF_90XB) 650 bus_space_write_2(iot, ioh, ELINK_COMMAND, 651 ELINK_TXRECLTHRESH | 255); 652 else 653 bus_space_write_1(iot, ioh, ELINK_TXFREETHRESH, 6); 654 655 bus_space_write_2(iot, ioh, ELINK_COMMAND, 656 SET_RX_EARLY_THRESH | ELINK_THRESH_DISABLE); 657 658 bus_space_write_4(iot, ioh, ELINK_DMACTRL, 659 bus_space_read_4(iot, ioh, ELINK_DMACTRL) | ELINK_DMAC_UPRXEAREN); 660 661 bus_space_write_2(iot, ioh, ELINK_COMMAND, 662 SET_RD_0_MASK | XL_WATCHED_INTERRUPTS); 663 bus_space_write_2(iot, ioh, ELINK_COMMAND, 664 SET_INTR_MASK | XL_WATCHED_INTERRUPTS); 665 666 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 667 if (sc->intr_ack) 668 (* sc->intr_ack)(sc); 669 ex_set_media(sc); 670 ex_set_mc(sc); 671 672 673 bus_space_write_2(iot, ioh, ELINK_COMMAND, STATS_ENABLE); 674 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 675 bus_space_write_4(iot, ioh, ELINK_UPLISTPTR, sc->sc_upddma); 676 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 677 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_UPUNSTALL); 678 679 if (sc->ex_conf & (EX_CONF_PHY_POWER | EX_CONF_INV_LED_POLARITY)) { 680 u_int16_t cbcard_config; 681 682 GO_WINDOW(2); 683 cbcard_config = bus_space_read_2(sc->sc_iot, sc->sc_ioh, 0x0c); 684 if (sc->ex_conf & EX_CONF_PHY_POWER) { 685 cbcard_config |= 0x4000; /* turn on PHY power */ 686 } 687 if (sc->ex_conf & EX_CONF_INV_LED_POLARITY) { 688 cbcard_config |= 0x0010; /* invert LED polarity */ 689 } 690 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 0x0c, cbcard_config); 691 692 GO_WINDOW(3); 693 } 694 695 ifp->if_flags |= IFF_RUNNING; 696 ifp->if_flags &= ~IFF_OACTIVE; 697 ex_start(ifp); 698 699 GO_WINDOW(1); 700 701 callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc); 702 703 out: 704 if (error) { 705 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 706 ifp->if_timer = 0; 707 printf("%s: interface not running\n", sc->sc_dev.dv_xname); 708 } 709 return (error); 710 } 711 712 #define MCHASHSIZE 256 713 #define ex_mchash(addr) (ether_crc32_be((addr), ETHER_ADDR_LEN) & \ 714 (MCHASHSIZE - 1)) 715 716 /* 717 * Set multicast receive filter. Also take care of promiscuous mode 718 * here (XXX). 719 */ 720 void 721 ex_set_mc(sc) 722 struct ex_softc *sc; 723 { 724 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 725 struct ethercom *ec = &sc->sc_ethercom; 726 struct ether_multi *enm; 727 struct ether_multistep estep; 728 int i; 729 u_int16_t mask = FIL_INDIVIDUAL | FIL_BRDCST; 730 731 if (ifp->if_flags & IFF_PROMISC) { 732 mask |= FIL_PROMISC; 733 goto allmulti; 734 } 735 736 ETHER_FIRST_MULTI(estep, ec, enm); 737 if (enm == NULL) 738 goto nomulti; 739 740 if ((sc->ex_conf & EX_CONF_90XB) == 0) 741 /* No multicast hash filtering. */ 742 goto allmulti; 743 744 for (i = 0; i < MCHASHSIZE; i++) 745 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 746 ELINK_COMMAND, ELINK_CLEARHASHFILBIT | i); 747 748 do { 749 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 750 ETHER_ADDR_LEN) != 0) 751 goto allmulti; 752 753 i = ex_mchash(enm->enm_addrlo); 754 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 755 ELINK_COMMAND, ELINK_SETHASHFILBIT | i); 756 ETHER_NEXT_MULTI(estep, enm); 757 } while (enm != NULL); 758 mask |= FIL_MULTIHASH; 759 760 nomulti: 761 ifp->if_flags &= ~IFF_ALLMULTI; 762 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 763 SET_RX_FILTER | mask); 764 return; 765 766 allmulti: 767 ifp->if_flags |= IFF_ALLMULTI; 768 mask |= FIL_MULTICAST; 769 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 770 SET_RX_FILTER | mask); 771 } 772 773 774 static void 775 ex_txstat(sc) 776 struct ex_softc *sc; 777 { 778 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 779 bus_space_tag_t iot = sc->sc_iot; 780 bus_space_handle_t ioh = sc->sc_ioh; 781 int i; 782 783 /* 784 * We need to read+write TX_STATUS until we get a 0 status 785 * in order to turn off the interrupt flag. 786 */ 787 while ((i = bus_space_read_1(iot, ioh, ELINK_TXSTATUS)) & TXS_COMPLETE) { 788 bus_space_write_1(iot, ioh, ELINK_TXSTATUS, 0x0); 789 790 if (i & TXS_JABBER) { 791 ++sc->sc_ethercom.ec_if.if_oerrors; 792 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 793 printf("%s: jabber (%x)\n", 794 sc->sc_dev.dv_xname, i); 795 ex_init(ifp); 796 /* TODO: be more subtle here */ 797 } else if (i & TXS_UNDERRUN) { 798 ++sc->sc_ethercom.ec_if.if_oerrors; 799 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 800 printf("%s: fifo underrun (%x) @%d\n", 801 sc->sc_dev.dv_xname, i, 802 sc->tx_start_thresh); 803 if (sc->tx_succ_ok < 100) 804 sc->tx_start_thresh = min(ETHER_MAX_LEN, 805 sc->tx_start_thresh + 20); 806 sc->tx_succ_ok = 0; 807 ex_init(ifp); 808 /* TODO: be more subtle here */ 809 } else if (i & TXS_MAX_COLLISION) { 810 ++sc->sc_ethercom.ec_if.if_collisions; 811 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 812 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 813 } else 814 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 815 } 816 } 817 818 int 819 ex_media_chg(ifp) 820 struct ifnet *ifp; 821 { 822 823 if (ifp->if_flags & IFF_UP) 824 ex_init(ifp); 825 return 0; 826 } 827 828 void 829 ex_set_media(sc) 830 struct ex_softc *sc; 831 { 832 bus_space_tag_t iot = sc->sc_iot; 833 bus_space_handle_t ioh = sc->sc_ioh; 834 u_int32_t configreg; 835 836 if (((sc->ex_conf & EX_CONF_MII) && 837 (sc->ex_mii.mii_media_active & IFM_FDX)) 838 || (!(sc->ex_conf & EX_CONF_MII) && 839 (sc->ex_mii.mii_media.ifm_media & IFM_FDX))) { 840 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 841 MAC_CONTROL_FDX); 842 } else { 843 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 0); 844 } 845 846 /* 847 * If the device has MII, select it, and then tell the 848 * PHY which media to use. 849 */ 850 if (sc->ex_conf & EX_CONF_MII) { 851 GO_WINDOW(3); 852 853 configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 854 855 configreg &= ~(CONFIG_MEDIAMASK << 16); 856 configreg |= (ELINKMEDIA_MII << (CONFIG_MEDIAMASK_SHIFT + 16)); 857 858 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg); 859 mii_mediachg(&sc->ex_mii); 860 return; 861 } 862 863 GO_WINDOW(4); 864 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0); 865 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 866 delay(800); 867 868 /* 869 * Now turn on the selected media/transceiver. 870 */ 871 switch (IFM_SUBTYPE(sc->ex_mii.mii_media.ifm_cur->ifm_media)) { 872 case IFM_10_T: 873 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 874 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 875 break; 876 877 case IFM_10_2: 878 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 879 DELAY(800); 880 break; 881 882 case IFM_100_TX: 883 case IFM_100_FX: 884 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 885 LINKBEAT_ENABLE); 886 DELAY(800); 887 break; 888 889 case IFM_10_5: 890 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 891 SQE_ENABLE); 892 DELAY(800); 893 break; 894 895 case IFM_MANUAL: 896 break; 897 898 case IFM_NONE: 899 return; 900 901 default: 902 panic("ex_set_media: impossible"); 903 } 904 905 GO_WINDOW(3); 906 configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 907 908 configreg &= ~(CONFIG_MEDIAMASK << 16); 909 configreg |= (sc->ex_mii.mii_media.ifm_cur->ifm_data << 910 (CONFIG_MEDIAMASK_SHIFT + 16)); 911 912 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg); 913 } 914 915 /* 916 * Get currently-selected media from card. 917 * (if_media callback, may be called before interface is brought up). 918 */ 919 void 920 ex_media_stat(ifp, req) 921 struct ifnet *ifp; 922 struct ifmediareq *req; 923 { 924 struct ex_softc *sc = ifp->if_softc; 925 926 if (sc->ex_conf & EX_CONF_MII) { 927 mii_pollstat(&sc->ex_mii); 928 req->ifm_status = sc->ex_mii.mii_media_status; 929 req->ifm_active = sc->ex_mii.mii_media_active; 930 } else { 931 GO_WINDOW(4); 932 req->ifm_status = IFM_AVALID; 933 req->ifm_active = sc->ex_mii.mii_media.ifm_cur->ifm_media; 934 if (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 935 ELINK_W4_MEDIA_TYPE) & LINKBEAT_DETECT) 936 req->ifm_status |= IFM_ACTIVE; 937 GO_WINDOW(1); 938 } 939 } 940 941 942 943 /* 944 * Start outputting on the interface. 945 */ 946 static void 947 ex_start(ifp) 948 struct ifnet *ifp; 949 { 950 struct ex_softc *sc = ifp->if_softc; 951 bus_space_tag_t iot = sc->sc_iot; 952 bus_space_handle_t ioh = sc->sc_ioh; 953 volatile struct ex_fraghdr *fr = NULL; 954 volatile struct ex_dpd *dpd = NULL, *prevdpd = NULL; 955 struct ex_txdesc *txp; 956 struct mbuf *mb_head; 957 bus_dmamap_t dmamap; 958 int offset, totlen, segment, error; 959 u_int32_t csum_flags; 960 961 if (sc->tx_head || sc->tx_free == NULL) 962 return; 963 964 txp = NULL; 965 966 /* 967 * We're finished if there is nothing more to add to the list or if 968 * we're all filled up with buffers to transmit. 969 */ 970 while (sc->tx_free != NULL) { 971 /* 972 * Grab a packet to transmit. 973 */ 974 IFQ_DEQUEUE(&ifp->if_snd, mb_head); 975 if (mb_head == NULL) 976 break; 977 978 /* 979 * Get pointer to next available tx desc. 980 */ 981 txp = sc->tx_free; 982 dmamap = txp->tx_dmamap; 983 984 /* 985 * Go through each of the mbufs in the chain and initialize 986 * the transmit buffer descriptors with the physical address 987 * and size of the mbuf. 988 */ 989 reload: 990 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 991 mb_head, BUS_DMA_WRITE|BUS_DMA_NOWAIT); 992 switch (error) { 993 case 0: 994 /* Success. */ 995 break; 996 997 case EFBIG: 998 { 999 struct mbuf *mn; 1000 1001 /* 1002 * We ran out of segments. We have to recopy this 1003 * mbuf chain first. Bail out if we can't get the 1004 * new buffers. 1005 */ 1006 printf("%s: too many segments, ", sc->sc_dev.dv_xname); 1007 1008 MGETHDR(mn, M_DONTWAIT, MT_DATA); 1009 if (mn == NULL) { 1010 m_freem(mb_head); 1011 printf("aborting\n"); 1012 goto out; 1013 } 1014 if (mb_head->m_pkthdr.len > MHLEN) { 1015 MCLGET(mn, M_DONTWAIT); 1016 if ((mn->m_flags & M_EXT) == 0) { 1017 m_freem(mn); 1018 m_freem(mb_head); 1019 printf("aborting\n"); 1020 goto out; 1021 } 1022 } 1023 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, 1024 mtod(mn, caddr_t)); 1025 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; 1026 m_freem(mb_head); 1027 mb_head = mn; 1028 printf("retrying\n"); 1029 goto reload; 1030 } 1031 1032 default: 1033 /* 1034 * Some other problem; report it. 1035 */ 1036 printf("%s: can't load mbuf chain, error = %d\n", 1037 sc->sc_dev.dv_xname, error); 1038 m_freem(mb_head); 1039 goto out; 1040 } 1041 1042 /* 1043 * remove our tx desc from freelist. 1044 */ 1045 sc->tx_free = txp->tx_next; 1046 txp->tx_next = NULL; 1047 1048 fr = &txp->tx_dpd->dpd_frags[0]; 1049 totlen = 0; 1050 for (segment = 0; segment < dmamap->dm_nsegs; segment++, fr++) { 1051 fr->fr_addr = htole32(dmamap->dm_segs[segment].ds_addr); 1052 fr->fr_len = htole32(dmamap->dm_segs[segment].ds_len); 1053 totlen += dmamap->dm_segs[segment].ds_len; 1054 } 1055 fr--; 1056 fr->fr_len |= htole32(EX_FR_LAST); 1057 txp->tx_mbhead = mb_head; 1058 1059 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 1060 BUS_DMASYNC_PREWRITE); 1061 1062 dpd = txp->tx_dpd; 1063 dpd->dpd_nextptr = 0; 1064 dpd->dpd_fsh = htole32(totlen); 1065 1066 /* Byte-swap constants so compiler can optimize. */ 1067 1068 if (sc->ex_conf & EX_CONF_90XB) { 1069 csum_flags = 0; 1070 1071 if (mb_head->m_pkthdr.csum_flags & M_CSUM_IPv4) 1072 csum_flags |= htole32(EX_DPD_IPCKSUM); 1073 1074 if (mb_head->m_pkthdr.csum_flags & M_CSUM_TCPv4) 1075 csum_flags |= htole32(EX_DPD_TCPCKSUM); 1076 else if (mb_head->m_pkthdr.csum_flags & M_CSUM_UDPv4) 1077 csum_flags |= htole32(EX_DPD_UDPCKSUM); 1078 1079 dpd->dpd_fsh |= csum_flags; 1080 } else { 1081 KDASSERT((mb_head->m_pkthdr.csum_flags & 1082 (M_CSUM_IPv4|M_CSUM_TCPv4|M_CSUM_UDPv4)) == 0); 1083 } 1084 1085 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1086 ((caddr_t)dpd - (caddr_t)sc->sc_dpd), 1087 sizeof (struct ex_dpd), 1088 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1089 1090 /* 1091 * No need to stall the download engine, we know it's 1092 * not busy right now. 1093 * 1094 * Fix up pointers in both the "soft" tx and the physical 1095 * tx list. 1096 */ 1097 if (sc->tx_head != NULL) { 1098 prevdpd = sc->tx_tail->tx_dpd; 1099 offset = ((caddr_t)prevdpd - (caddr_t)sc->sc_dpd); 1100 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1101 offset, sizeof (struct ex_dpd), 1102 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1103 prevdpd->dpd_nextptr = htole32(DPD_DMADDR(sc, txp)); 1104 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1105 offset, sizeof (struct ex_dpd), 1106 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1107 sc->tx_tail->tx_next = txp; 1108 sc->tx_tail = txp; 1109 } else { 1110 sc->tx_tail = sc->tx_head = txp; 1111 } 1112 1113 #if NBPFILTER > 0 1114 /* 1115 * Pass packet to bpf if there is a listener. 1116 */ 1117 if (ifp->if_bpf) 1118 bpf_mtap(ifp->if_bpf, mb_head); 1119 #endif 1120 } 1121 out: 1122 if (sc->tx_head) { 1123 sc->tx_tail->tx_dpd->dpd_fsh |= htole32(EX_DPD_DNIND); 1124 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1125 ((caddr_t)sc->tx_tail->tx_dpd - (caddr_t)sc->sc_dpd), 1126 sizeof (struct ex_dpd), 1127 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1128 ifp->if_flags |= IFF_OACTIVE; 1129 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_DNUNSTALL); 1130 bus_space_write_4(iot, ioh, ELINK_DNLISTPTR, 1131 DPD_DMADDR(sc, sc->tx_head)); 1132 1133 /* trigger watchdog */ 1134 ifp->if_timer = 5; 1135 } 1136 } 1137 1138 1139 int 1140 ex_intr(arg) 1141 void *arg; 1142 { 1143 struct ex_softc *sc = arg; 1144 bus_space_tag_t iot = sc->sc_iot; 1145 bus_space_handle_t ioh = sc->sc_ioh; 1146 u_int16_t stat; 1147 int ret = 0; 1148 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1149 1150 if ((ifp->if_flags & IFF_RUNNING) == 0 || 1151 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1152 return (0); 1153 1154 for (;;) { 1155 stat = bus_space_read_2(iot, ioh, ELINK_STATUS); 1156 1157 if ((stat & XL_WATCHED_INTERRUPTS) == 0) { 1158 if ((stat & INTR_LATCH) == 0) { 1159 #if 0 1160 printf("%s: intr latch cleared\n", 1161 sc->sc_dev.dv_xname); 1162 #endif 1163 break; 1164 } 1165 } 1166 1167 ret = 1; 1168 1169 /* 1170 * Acknowledge interrupts. 1171 */ 1172 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1173 (stat & (XL_WATCHED_INTERRUPTS | INTR_LATCH))); 1174 if (sc->intr_ack) 1175 (*sc->intr_ack)(sc); 1176 1177 if (stat & HOST_ERROR) { 1178 printf("%s: adapter failure (%x)\n", 1179 sc->sc_dev.dv_xname, stat); 1180 ex_reset(sc); 1181 ex_init(ifp); 1182 return 1; 1183 } 1184 if (stat & TX_COMPLETE) { 1185 ex_txstat(sc); 1186 } 1187 if (stat & UPD_STATS) { 1188 ex_getstats(sc); 1189 } 1190 if (stat & DN_COMPLETE) { 1191 struct ex_txdesc *txp, *ptxp = NULL; 1192 bus_dmamap_t txmap; 1193 1194 /* reset watchdog timer, was set in ex_start() */ 1195 ifp->if_timer = 0; 1196 1197 for (txp = sc->tx_head; txp != NULL; 1198 txp = txp->tx_next) { 1199 bus_dmamap_sync(sc->sc_dmat, 1200 sc->sc_dpd_dmamap, 1201 (caddr_t)txp->tx_dpd - (caddr_t)sc->sc_dpd, 1202 sizeof (struct ex_dpd), 1203 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1204 if (txp->tx_mbhead != NULL) { 1205 txmap = txp->tx_dmamap; 1206 bus_dmamap_sync(sc->sc_dmat, txmap, 1207 0, txmap->dm_mapsize, 1208 BUS_DMASYNC_POSTWRITE); 1209 bus_dmamap_unload(sc->sc_dmat, txmap); 1210 m_freem(txp->tx_mbhead); 1211 txp->tx_mbhead = NULL; 1212 } 1213 ptxp = txp; 1214 } 1215 1216 /* 1217 * Move finished tx buffers back to the tx free list. 1218 */ 1219 if (sc->tx_free) { 1220 sc->tx_ftail->tx_next = sc->tx_head; 1221 sc->tx_ftail = ptxp; 1222 } else 1223 sc->tx_ftail = sc->tx_free = sc->tx_head; 1224 1225 sc->tx_head = sc->tx_tail = NULL; 1226 ifp->if_flags &= ~IFF_OACTIVE; 1227 } 1228 1229 if (stat & UP_COMPLETE) { 1230 struct ex_rxdesc *rxd; 1231 struct mbuf *m; 1232 struct ex_upd *upd; 1233 bus_dmamap_t rxmap; 1234 u_int32_t pktstat; 1235 1236 rcvloop: 1237 rxd = sc->rx_head; 1238 rxmap = rxd->rx_dmamap; 1239 m = rxd->rx_mbhead; 1240 upd = rxd->rx_upd; 1241 1242 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, 1243 rxmap->dm_mapsize, 1244 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1245 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1246 ((caddr_t)upd - (caddr_t)sc->sc_upd), 1247 sizeof (struct ex_upd), 1248 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1249 pktstat = le32toh(upd->upd_pktstatus); 1250 1251 if (pktstat & EX_UPD_COMPLETE) { 1252 /* 1253 * Remove first packet from the chain. 1254 */ 1255 sc->rx_head = rxd->rx_next; 1256 rxd->rx_next = NULL; 1257 1258 /* 1259 * Add a new buffer to the receive chain. 1260 * If this fails, the old buffer is recycled 1261 * instead. 1262 */ 1263 if (ex_add_rxbuf(sc, rxd) == 0) { 1264 u_int16_t total_len; 1265 1266 if (pktstat & 1267 ((sc->sc_ethercom.ec_capenable & 1268 ETHERCAP_VLAN_MTU) ? 1269 EX_UPD_ERR_VLAN : EX_UPD_ERR)) { 1270 ifp->if_ierrors++; 1271 m_freem(m); 1272 goto rcvloop; 1273 } 1274 1275 total_len = pktstat & EX_UPD_PKTLENMASK; 1276 if (total_len < 1277 sizeof(struct ether_header)) { 1278 m_freem(m); 1279 goto rcvloop; 1280 } 1281 m->m_pkthdr.rcvif = ifp; 1282 m->m_pkthdr.len = m->m_len = total_len; 1283 #if NBPFILTER > 0 1284 if (ifp->if_bpf) 1285 bpf_mtap(ifp->if_bpf, m); 1286 #endif 1287 /* 1288 * Set the incoming checksum information for the packet. 1289 */ 1290 if ((sc->ex_conf & EX_CONF_90XB) != 0 && 1291 (pktstat & EX_UPD_IPCHECKED) != 0) { 1292 m->m_pkthdr.csum_flags |= M_CSUM_IPv4; 1293 if (pktstat & EX_UPD_IPCKSUMERR) 1294 m->m_pkthdr.csum_flags |= M_CSUM_IPv4_BAD; 1295 if (pktstat & EX_UPD_TCPCHECKED) { 1296 m->m_pkthdr.csum_flags |= M_CSUM_TCPv4; 1297 if (pktstat & EX_UPD_TCPCKSUMERR) 1298 m->m_pkthdr.csum_flags |= 1299 M_CSUM_TCP_UDP_BAD; 1300 } else if (pktstat & EX_UPD_UDPCHECKED) { 1301 m->m_pkthdr.csum_flags |= M_CSUM_UDPv4; 1302 if (pktstat & EX_UPD_UDPCKSUMERR) 1303 m->m_pkthdr.csum_flags |= 1304 M_CSUM_TCP_UDP_BAD; 1305 } 1306 } 1307 (*ifp->if_input)(ifp, m); 1308 } 1309 goto rcvloop; 1310 } 1311 /* 1312 * Just in case we filled up all UPDs and the DMA engine 1313 * stalled. We could be more subtle about this. 1314 */ 1315 if (bus_space_read_4(iot, ioh, ELINK_UPLISTPTR) == 0) { 1316 printf("%s: uplistptr was 0\n", 1317 sc->sc_dev.dv_xname); 1318 ex_init(ifp); 1319 } else if (bus_space_read_4(iot, ioh, ELINK_UPPKTSTATUS) 1320 & 0x2000) { 1321 printf("%s: receive stalled\n", 1322 sc->sc_dev.dv_xname); 1323 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1324 ELINK_UPUNSTALL); 1325 } 1326 } 1327 } 1328 1329 /* no more interrupts */ 1330 if (ret && IFQ_IS_EMPTY(&ifp->if_snd) == 0) 1331 ex_start(ifp); 1332 return ret; 1333 } 1334 1335 int 1336 ex_ioctl(ifp, cmd, data) 1337 struct ifnet *ifp; 1338 u_long cmd; 1339 caddr_t data; 1340 { 1341 struct ex_softc *sc = ifp->if_softc; 1342 struct ifreq *ifr = (struct ifreq *)data; 1343 int s, error; 1344 1345 s = splnet(); 1346 1347 switch (cmd) { 1348 case SIOCSIFMEDIA: 1349 case SIOCGIFMEDIA: 1350 error = ifmedia_ioctl(ifp, ifr, &sc->ex_mii.mii_media, cmd); 1351 break; 1352 1353 default: 1354 error = ether_ioctl(ifp, cmd, data); 1355 if (error == ENETRESET) { 1356 if (sc->enabled) { 1357 /* 1358 * Multicast list has changed; set the hardware filter 1359 * accordingly. 1360 */ 1361 ex_set_mc(sc); 1362 } 1363 error = 0; 1364 } 1365 break; 1366 } 1367 1368 splx(s); 1369 return (error); 1370 } 1371 1372 void 1373 ex_getstats(sc) 1374 struct ex_softc *sc; 1375 { 1376 bus_space_handle_t ioh = sc->sc_ioh; 1377 bus_space_tag_t iot = sc->sc_iot; 1378 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1379 u_int8_t upperok; 1380 1381 GO_WINDOW(6); 1382 upperok = bus_space_read_1(iot, ioh, UPPER_FRAMES_OK); 1383 ifp->if_ipackets += bus_space_read_1(iot, ioh, RX_FRAMES_OK); 1384 ifp->if_ipackets += (upperok & 0x03) << 8; 1385 ifp->if_opackets += bus_space_read_1(iot, ioh, TX_FRAMES_OK); 1386 ifp->if_opackets += (upperok & 0x30) << 4; 1387 ifp->if_ierrors += bus_space_read_1(iot, ioh, RX_OVERRUNS); 1388 ifp->if_collisions += bus_space_read_1(iot, ioh, TX_COLLISIONS); 1389 /* 1390 * There seems to be no way to get the exact number of collisions, 1391 * this is the number that occurred at the very least. 1392 */ 1393 ifp->if_collisions += 2 * bus_space_read_1(iot, ioh, 1394 TX_AFTER_X_COLLISIONS); 1395 /* 1396 * Interface byte counts are counted by ether_input() and 1397 * ether_output(), so don't accumulate them here. Just 1398 * read the NIC counters so they don't generate overflow interrupts. 1399 * Upper byte counters are latched from reading the totals, so 1400 * they don't need to be read if we don't need their values. 1401 */ 1402 bus_space_read_2(iot, ioh, RX_TOTAL_OK); 1403 bus_space_read_2(iot, ioh, TX_TOTAL_OK); 1404 1405 /* 1406 * Clear the following to avoid stats overflow interrupts 1407 */ 1408 bus_space_read_1(iot, ioh, TX_DEFERRALS); 1409 bus_space_read_1(iot, ioh, TX_AFTER_1_COLLISION); 1410 bus_space_read_1(iot, ioh, TX_NO_SQE); 1411 bus_space_read_1(iot, ioh, TX_CD_LOST); 1412 GO_WINDOW(4); 1413 bus_space_read_1(iot, ioh, ELINK_W4_BADSSD); 1414 GO_WINDOW(1); 1415 } 1416 1417 void 1418 ex_printstats(sc) 1419 struct ex_softc *sc; 1420 { 1421 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1422 1423 ex_getstats(sc); 1424 printf("in %llu out %llu ierror %llu oerror %llu ibytes %llu obytes " 1425 "%llu\n", (unsigned long long)ifp->if_ipackets, 1426 (unsigned long long)ifp->if_opackets, 1427 (unsigned long long)ifp->if_ierrors, 1428 (unsigned long long)ifp->if_oerrors, 1429 (unsigned long long)ifp->if_ibytes, 1430 (unsigned long long)ifp->if_obytes); 1431 } 1432 1433 void 1434 ex_tick(arg) 1435 void *arg; 1436 { 1437 struct ex_softc *sc = arg; 1438 int s; 1439 1440 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1441 return; 1442 1443 s = splnet(); 1444 1445 if (sc->ex_conf & EX_CONF_MII) 1446 mii_tick(&sc->ex_mii); 1447 1448 if (!(bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, ELINK_STATUS) 1449 & COMMAND_IN_PROGRESS)) 1450 ex_getstats(sc); 1451 1452 splx(s); 1453 1454 callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc); 1455 } 1456 1457 void 1458 ex_reset(sc) 1459 struct ex_softc *sc; 1460 { 1461 u_int16_t val = GLOBAL_RESET; 1462 1463 if (sc->ex_conf & EX_CONF_RESETHACK) 1464 val |= 0x10; 1465 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, val); 1466 /* 1467 * XXX apparently the command in progress bit can't be trusted 1468 * during a reset, so we just always wait this long. Fortunately 1469 * we normally only reset the chip during autoconfig. 1470 */ 1471 delay(100000); 1472 ex_waitcmd(sc); 1473 } 1474 1475 void 1476 ex_watchdog(ifp) 1477 struct ifnet *ifp; 1478 { 1479 struct ex_softc *sc = ifp->if_softc; 1480 1481 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1482 ++sc->sc_ethercom.ec_if.if_oerrors; 1483 1484 ex_reset(sc); 1485 ex_init(ifp); 1486 } 1487 1488 void 1489 ex_stop(ifp, disable) 1490 struct ifnet *ifp; 1491 int disable; 1492 { 1493 struct ex_softc *sc = ifp->if_softc; 1494 bus_space_tag_t iot = sc->sc_iot; 1495 bus_space_handle_t ioh = sc->sc_ioh; 1496 struct ex_txdesc *tx; 1497 struct ex_rxdesc *rx; 1498 int i; 1499 1500 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1501 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1502 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1503 1504 for (tx = sc->tx_head ; tx != NULL; tx = tx->tx_next) { 1505 if (tx->tx_mbhead == NULL) 1506 continue; 1507 m_freem(tx->tx_mbhead); 1508 tx->tx_mbhead = NULL; 1509 bus_dmamap_unload(sc->sc_dmat, tx->tx_dmamap); 1510 tx->tx_dpd->dpd_fsh = tx->tx_dpd->dpd_nextptr = 0; 1511 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1512 ((caddr_t)tx->tx_dpd - (caddr_t)sc->sc_dpd), 1513 sizeof (struct ex_dpd), 1514 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1515 } 1516 sc->tx_tail = sc->tx_head = NULL; 1517 ex_init_txdescs(sc); 1518 1519 sc->rx_tail = sc->rx_head = 0; 1520 for (i = 0; i < EX_NUPD; i++) { 1521 rx = &sc->sc_rxdescs[i]; 1522 if (rx->rx_mbhead != NULL) { 1523 bus_dmamap_unload(sc->sc_dmat, rx->rx_dmamap); 1524 m_freem(rx->rx_mbhead); 1525 rx->rx_mbhead = NULL; 1526 } 1527 ex_add_rxbuf(sc, rx); 1528 } 1529 1530 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | INTR_LATCH); 1531 1532 callout_stop(&sc->ex_mii_callout); 1533 if (sc->ex_conf & EX_CONF_MII) 1534 mii_down(&sc->ex_mii); 1535 1536 if (disable) 1537 ex_disable(sc); 1538 1539 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1540 ifp->if_timer = 0; 1541 } 1542 1543 static void 1544 ex_init_txdescs(sc) 1545 struct ex_softc *sc; 1546 { 1547 int i; 1548 1549 for (i = 0; i < EX_NDPD; i++) { 1550 sc->sc_txdescs[i].tx_dmamap = sc->sc_tx_dmamaps[i]; 1551 sc->sc_txdescs[i].tx_dpd = &sc->sc_dpd[i]; 1552 if (i < EX_NDPD - 1) 1553 sc->sc_txdescs[i].tx_next = &sc->sc_txdescs[i + 1]; 1554 else 1555 sc->sc_txdescs[i].tx_next = NULL; 1556 } 1557 sc->tx_free = &sc->sc_txdescs[0]; 1558 sc->tx_ftail = &sc->sc_txdescs[EX_NDPD-1]; 1559 } 1560 1561 1562 int 1563 ex_activate(self, act) 1564 struct device *self; 1565 enum devact act; 1566 { 1567 struct ex_softc *sc = (void *) self; 1568 int s, error = 0; 1569 1570 s = splnet(); 1571 switch (act) { 1572 case DVACT_ACTIVATE: 1573 error = EOPNOTSUPP; 1574 break; 1575 1576 case DVACT_DEACTIVATE: 1577 if (sc->ex_conf & EX_CONF_MII) 1578 mii_activate(&sc->ex_mii, act, MII_PHY_ANY, 1579 MII_OFFSET_ANY); 1580 if_deactivate(&sc->sc_ethercom.ec_if); 1581 break; 1582 } 1583 splx(s); 1584 1585 return (error); 1586 } 1587 1588 int 1589 ex_detach(sc) 1590 struct ex_softc *sc; 1591 { 1592 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1593 struct ex_rxdesc *rxd; 1594 int i; 1595 1596 /* Succeed now if there's no work to do. */ 1597 if ((sc->ex_flags & EX_FLAGS_ATTACHED) == 0) 1598 return (0); 1599 1600 /* Unhook our tick handler. */ 1601 callout_stop(&sc->ex_mii_callout); 1602 1603 if (sc->ex_conf & EX_CONF_MII) { 1604 /* Detach all PHYs */ 1605 mii_detach(&sc->ex_mii, MII_PHY_ANY, MII_OFFSET_ANY); 1606 } 1607 1608 /* Delete all remaining media. */ 1609 ifmedia_delete_instance(&sc->ex_mii.mii_media, IFM_INST_ANY); 1610 1611 #if NRND > 0 1612 rnd_detach_source(&sc->rnd_source); 1613 #endif 1614 ether_ifdetach(ifp); 1615 if_detach(ifp); 1616 1617 for (i = 0; i < EX_NUPD; i++) { 1618 rxd = &sc->sc_rxdescs[i]; 1619 if (rxd->rx_mbhead != NULL) { 1620 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap); 1621 m_freem(rxd->rx_mbhead); 1622 rxd->rx_mbhead = NULL; 1623 } 1624 } 1625 for (i = 0; i < EX_NUPD; i++) 1626 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]); 1627 for (i = 0; i < EX_NDPD; i++) 1628 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]); 1629 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap); 1630 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap); 1631 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd, 1632 EX_NDPD * sizeof (struct ex_dpd)); 1633 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg); 1634 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap); 1635 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap); 1636 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd, 1637 EX_NUPD * sizeof (struct ex_upd)); 1638 bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg); 1639 1640 shutdownhook_disestablish(sc->sc_sdhook); 1641 powerhook_disestablish(sc->sc_powerhook); 1642 1643 return (0); 1644 } 1645 1646 /* 1647 * Before reboots, reset card completely. 1648 */ 1649 static void 1650 ex_shutdown(arg) 1651 void *arg; 1652 { 1653 struct ex_softc *sc = arg; 1654 1655 ex_stop(&sc->sc_ethercom.ec_if, 1); 1656 /* 1657 * Make sure the interface is powered up when we reboot, 1658 * otherwise firmware on some systems gets really confused. 1659 */ 1660 (void) ex_enable(sc); 1661 } 1662 1663 /* 1664 * Read EEPROM data. 1665 * XXX what to do if EEPROM doesn't unbusy? 1666 */ 1667 u_int16_t 1668 ex_read_eeprom(sc, offset) 1669 struct ex_softc *sc; 1670 int offset; 1671 { 1672 bus_space_tag_t iot = sc->sc_iot; 1673 bus_space_handle_t ioh = sc->sc_ioh; 1674 u_int16_t data = 0, cmd = READ_EEPROM; 1675 int off; 1676 1677 off = sc->ex_conf & EX_CONF_EEPROM_OFF ? 0x30 : 0; 1678 cmd = sc->ex_conf & EX_CONF_EEPROM_8BIT ? READ_EEPROM8 : READ_EEPROM; 1679 1680 GO_WINDOW(0); 1681 if (ex_eeprom_busy(sc)) 1682 goto out; 1683 bus_space_write_2(iot, ioh, ELINK_W0_EEPROM_COMMAND, 1684 cmd | (off + (offset & 0x3f))); 1685 if (ex_eeprom_busy(sc)) 1686 goto out; 1687 data = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_DATA); 1688 out: 1689 return data; 1690 } 1691 1692 static int 1693 ex_eeprom_busy(sc) 1694 struct ex_softc *sc; 1695 { 1696 bus_space_tag_t iot = sc->sc_iot; 1697 bus_space_handle_t ioh = sc->sc_ioh; 1698 int i = 100; 1699 1700 while (i--) { 1701 if (!(bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND) & 1702 EEPROM_BUSY)) 1703 return 0; 1704 delay(100); 1705 } 1706 printf("\n%s: eeprom stays busy.\n", sc->sc_dev.dv_xname); 1707 return (1); 1708 } 1709 1710 /* 1711 * Create a new rx buffer and add it to the 'soft' rx list. 1712 */ 1713 static int 1714 ex_add_rxbuf(sc, rxd) 1715 struct ex_softc *sc; 1716 struct ex_rxdesc *rxd; 1717 { 1718 struct mbuf *m, *oldm; 1719 bus_dmamap_t rxmap; 1720 int error, rval = 0; 1721 1722 oldm = rxd->rx_mbhead; 1723 rxmap = rxd->rx_dmamap; 1724 1725 MGETHDR(m, M_DONTWAIT, MT_DATA); 1726 if (m != NULL) { 1727 MCLGET(m, M_DONTWAIT); 1728 if ((m->m_flags & M_EXT) == 0) { 1729 m_freem(m); 1730 if (oldm == NULL) 1731 return 1; 1732 m = oldm; 1733 m->m_data = m->m_ext.ext_buf; 1734 rval = 1; 1735 } 1736 } else { 1737 if (oldm == NULL) 1738 return 1; 1739 m = oldm; 1740 m->m_data = m->m_ext.ext_buf; 1741 rval = 1; 1742 } 1743 1744 /* 1745 * Setup the DMA map for this receive buffer. 1746 */ 1747 if (m != oldm) { 1748 if (oldm != NULL) 1749 bus_dmamap_unload(sc->sc_dmat, rxmap); 1750 error = bus_dmamap_load(sc->sc_dmat, rxmap, 1751 m->m_ext.ext_buf, MCLBYTES, NULL, 1752 BUS_DMA_READ|BUS_DMA_NOWAIT); 1753 if (error) { 1754 printf("%s: can't load rx buffer, error = %d\n", 1755 sc->sc_dev.dv_xname, error); 1756 panic("ex_add_rxbuf"); /* XXX */ 1757 } 1758 } 1759 1760 /* 1761 * Align for data after 14 byte header. 1762 */ 1763 m->m_data += 2; 1764 1765 rxd->rx_mbhead = m; 1766 rxd->rx_upd->upd_pktstatus = htole32(MCLBYTES - 2); 1767 rxd->rx_upd->upd_frags[0].fr_addr = 1768 htole32(rxmap->dm_segs[0].ds_addr + 2); 1769 rxd->rx_upd->upd_nextptr = 0; 1770 1771 /* 1772 * Attach it to the end of the list. 1773 */ 1774 if (sc->rx_head != NULL) { 1775 sc->rx_tail->rx_next = rxd; 1776 sc->rx_tail->rx_upd->upd_nextptr = htole32(sc->sc_upddma + 1777 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd)); 1778 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1779 (caddr_t)sc->rx_tail->rx_upd - (caddr_t)sc->sc_upd, 1780 sizeof (struct ex_upd), 1781 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1782 } else { 1783 sc->rx_head = rxd; 1784 } 1785 sc->rx_tail = rxd; 1786 1787 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, rxmap->dm_mapsize, 1788 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1789 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1790 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd), 1791 sizeof (struct ex_upd), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1792 return (rval); 1793 } 1794 1795 u_int32_t 1796 ex_mii_bitbang_read(self) 1797 struct device *self; 1798 { 1799 struct ex_softc *sc = (void *) self; 1800 1801 /* We're already in Window 4. */ 1802 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT)); 1803 } 1804 1805 void 1806 ex_mii_bitbang_write(self, val) 1807 struct device *self; 1808 u_int32_t val; 1809 { 1810 struct ex_softc *sc = (void *) self; 1811 1812 /* We're already in Window 4. */ 1813 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT, val); 1814 } 1815 1816 int 1817 ex_mii_readreg(v, phy, reg) 1818 struct device *v; 1819 int phy, reg; 1820 { 1821 struct ex_softc *sc = (struct ex_softc *)v; 1822 int val; 1823 1824 if ((sc->ex_conf & EX_CONF_INTPHY) && phy != ELINK_INTPHY_ID) 1825 return 0; 1826 1827 GO_WINDOW(4); 1828 1829 val = mii_bitbang_readreg(v, &ex_mii_bitbang_ops, phy, reg); 1830 1831 GO_WINDOW(1); 1832 1833 return (val); 1834 } 1835 1836 void 1837 ex_mii_writereg(v, phy, reg, data) 1838 struct device *v; 1839 int phy; 1840 int reg; 1841 int data; 1842 { 1843 struct ex_softc *sc = (struct ex_softc *)v; 1844 1845 GO_WINDOW(4); 1846 1847 mii_bitbang_writereg(v, &ex_mii_bitbang_ops, phy, reg, data); 1848 1849 GO_WINDOW(1); 1850 } 1851 1852 void 1853 ex_mii_statchg(v) 1854 struct device *v; 1855 { 1856 struct ex_softc *sc = (struct ex_softc *)v; 1857 bus_space_tag_t iot = sc->sc_iot; 1858 bus_space_handle_t ioh = sc->sc_ioh; 1859 int mctl; 1860 1861 GO_WINDOW(3); 1862 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1863 if (sc->ex_mii.mii_media_active & IFM_FDX) 1864 mctl |= MAC_CONTROL_FDX; 1865 else 1866 mctl &= ~MAC_CONTROL_FDX; 1867 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1868 GO_WINDOW(1); /* back to operating window */ 1869 } 1870 1871 int 1872 ex_enable(sc) 1873 struct ex_softc *sc; 1874 { 1875 if (sc->enabled == 0 && sc->enable != NULL) { 1876 if ((*sc->enable)(sc) != 0) { 1877 printf("%s: de/vice enable failed\n", 1878 sc->sc_dev.dv_xname); 1879 return (EIO); 1880 } 1881 sc->enabled = 1; 1882 } 1883 return (0); 1884 } 1885 1886 void 1887 ex_disable(sc) 1888 struct ex_softc *sc; 1889 { 1890 if (sc->enabled == 1 && sc->disable != NULL) { 1891 (*sc->disable)(sc); 1892 sc->enabled = 0; 1893 } 1894 } 1895 1896 void 1897 ex_power(why, arg) 1898 int why; 1899 void *arg; 1900 { 1901 struct ex_softc *sc = (void *)arg; 1902 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1903 int s; 1904 1905 s = splnet(); 1906 switch (why) { 1907 case PWR_SUSPEND: 1908 case PWR_STANDBY: 1909 ex_stop(ifp, 0); 1910 if (sc->power != NULL) 1911 (*sc->power)(sc, why); 1912 break; 1913 case PWR_RESUME: 1914 if (ifp->if_flags & IFF_UP) { 1915 if (sc->power != NULL) 1916 (*sc->power)(sc, why); 1917 ex_init(ifp); 1918 } 1919 break; 1920 case PWR_SOFTSUSPEND: 1921 case PWR_SOFTSTANDBY: 1922 case PWR_SOFTRESUME: 1923 break; 1924 } 1925 splx(s); 1926 } 1927
Indexes created Wed Oct 22 13:09:56 GMT 2025