elinkxl.c revision 1.47.2.5
1 /* $NetBSD: elinkxl.c,v 1.47.2.5 2001/11/14 19:14:22 nathanw Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Frank van der Linden. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: elinkxl.c,v 1.47.2.5 2001/11/14 19:14:22 nathanw Exp $"); 41 42 #include "bpfilter.h" 43 #include "rnd.h" 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/callout.h> 48 #include <sys/kernel.h> 49 #include <sys/mbuf.h> 50 #include <sys/socket.h> 51 #include <sys/ioctl.h> 52 #include <sys/errno.h> 53 #include <sys/syslog.h> 54 #include <sys/select.h> 55 #include <sys/device.h> 56 #if NRND > 0 57 #include <sys/rnd.h> 58 #endif 59 60 #include <uvm/uvm_extern.h> 61 62 #include <net/if.h> 63 #include <net/if_dl.h> 64 #include <net/if_ether.h> 65 #include <net/if_media.h> 66 67 #if NBPFILTER > 0 68 #include <net/bpf.h> 69 #include <net/bpfdesc.h> 70 #endif 71 72 #include <machine/cpu.h> 73 #include <machine/bus.h> 74 #include <machine/intr.h> 75 #include <machine/endian.h> 76 77 #include <dev/mii/miivar.h> 78 #include <dev/mii/mii.h> 79 #include <dev/mii/mii_bitbang.h> 80 81 #include <dev/ic/elink3reg.h> 82 /* #include <dev/ic/elink3var.h> */ 83 #include <dev/ic/elinkxlreg.h> 84 #include <dev/ic/elinkxlvar.h> 85 86 #ifdef DEBUG 87 int exdebug = 0; 88 #endif 89 90 /* ifmedia callbacks */ 91 int ex_media_chg __P((struct ifnet *ifp)); 92 void ex_media_stat __P((struct ifnet *ifp, struct ifmediareq *req)); 93 94 void ex_probe_media __P((struct ex_softc *)); 95 void ex_set_filter __P((struct ex_softc *)); 96 void ex_set_media __P((struct ex_softc *)); 97 struct mbuf *ex_get __P((struct ex_softc *, int)); 98 u_int16_t ex_read_eeprom __P((struct ex_softc *, int)); 99 int ex_init __P((struct ifnet *)); 100 void ex_read __P((struct ex_softc *)); 101 void ex_reset __P((struct ex_softc *)); 102 void ex_set_mc __P((struct ex_softc *)); 103 void ex_getstats __P((struct ex_softc *)); 104 void ex_printstats __P((struct ex_softc *)); 105 void ex_tick __P((void *)); 106 107 int ex_enable __P((struct ex_softc *)); 108 void ex_disable __P((struct ex_softc *)); 109 void ex_power __P((int, void *)); 110 111 static int ex_eeprom_busy __P((struct ex_softc *)); 112 static int ex_add_rxbuf __P((struct ex_softc *, struct ex_rxdesc *)); 113 static void ex_init_txdescs __P((struct ex_softc *)); 114 115 static void ex_shutdown __P((void *)); 116 static void ex_start __P((struct ifnet *)); 117 static void ex_txstat __P((struct ex_softc *)); 118 119 int ex_mii_readreg __P((struct device *, int, int)); 120 void ex_mii_writereg __P((struct device *, int, int, int)); 121 void ex_mii_statchg __P((struct device *)); 122 123 void ex_probemedia __P((struct ex_softc *)); 124 125 /* 126 * Structure to map media-present bits in boards to ifmedia codes and 127 * printable media names. Used for table-driven ifmedia initialization. 128 */ 129 struct ex_media { 130 int exm_mpbit; /* media present bit */ 131 const char *exm_name; /* name of medium */ 132 int exm_ifmedia; /* ifmedia word for medium */ 133 int exm_epmedia; /* ELINKMEDIA_* constant */ 134 }; 135 136 /* 137 * Media table for 3c90x chips. Note that chips with MII have no 138 * `native' media. 139 */ 140 struct ex_media ex_native_media[] = { 141 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 142 ELINKMEDIA_10BASE_T }, 143 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 144 ELINKMEDIA_10BASE_T }, 145 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 146 ELINKMEDIA_AUI }, 147 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 148 ELINKMEDIA_10BASE_2 }, 149 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 150 ELINKMEDIA_100BASE_TX }, 151 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 152 ELINKMEDIA_100BASE_TX }, 153 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 154 ELINKMEDIA_100BASE_FX }, 155 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 156 ELINKMEDIA_MII }, 157 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 158 ELINKMEDIA_100BASE_T4 }, 159 { 0, NULL, 0, 160 0 }, 161 }; 162 163 /* 164 * MII bit-bang glue. 165 */ 166 u_int32_t ex_mii_bitbang_read __P((struct device *)); 167 void ex_mii_bitbang_write __P((struct device *, u_int32_t)); 168 169 const struct mii_bitbang_ops ex_mii_bitbang_ops = { 170 ex_mii_bitbang_read, 171 ex_mii_bitbang_write, 172 { 173 ELINK_PHY_DATA, /* MII_BIT_MDO */ 174 ELINK_PHY_DATA, /* MII_BIT_MDI */ 175 ELINK_PHY_CLK, /* MII_BIT_MDC */ 176 ELINK_PHY_DIR, /* MII_BIT_DIR_HOST_PHY */ 177 0, /* MII_BIT_DIR_PHY_HOST */ 178 } 179 }; 180 181 /* 182 * Back-end attach and configure. 183 */ 184 void 185 ex_config(sc) 186 struct ex_softc *sc; 187 { 188 struct ifnet *ifp; 189 u_int16_t val; 190 u_int8_t macaddr[ETHER_ADDR_LEN] = {0}; 191 bus_space_tag_t iot = sc->sc_iot; 192 bus_space_handle_t ioh = sc->sc_ioh; 193 int i, error, attach_stage; 194 195 callout_init(&sc->ex_mii_callout); 196 197 ex_reset(sc); 198 199 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR0); 200 macaddr[0] = val >> 8; 201 macaddr[1] = val & 0xff; 202 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR1); 203 macaddr[2] = val >> 8; 204 macaddr[3] = val & 0xff; 205 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR2); 206 macaddr[4] = val >> 8; 207 macaddr[5] = val & 0xff; 208 209 printf("%s: MAC address %s\n", sc->sc_dev.dv_xname, 210 ether_sprintf(macaddr)); 211 212 if (sc->ex_conf & (EX_CONF_INV_LED_POLARITY|EX_CONF_PHY_POWER)) { 213 GO_WINDOW(2); 214 val = bus_space_read_2(iot, ioh, ELINK_W2_RESET_OPTIONS); 215 if (sc->ex_conf & EX_CONF_INV_LED_POLARITY) 216 val |= ELINK_RESET_OPT_LEDPOLAR; 217 if (sc->ex_conf & EX_CONF_PHY_POWER) 218 val |= ELINK_RESET_OPT_PHYPOWER; 219 bus_space_write_2(iot, ioh, ELINK_W2_RESET_OPTIONS, val); 220 } 221 222 attach_stage = 0; 223 224 /* 225 * Allocate the upload descriptors, and create and load the DMA 226 * map for them. 227 */ 228 if ((error = bus_dmamem_alloc(sc->sc_dmat, 229 EX_NUPD * sizeof (struct ex_upd), PAGE_SIZE, 0, &sc->sc_useg, 1, 230 &sc->sc_urseg, BUS_DMA_NOWAIT)) != 0) { 231 printf("%s: can't allocate upload descriptors, error = %d\n", 232 sc->sc_dev.dv_xname, error); 233 goto fail; 234 } 235 236 attach_stage = 1; 237 238 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg, 239 EX_NUPD * sizeof (struct ex_upd), (caddr_t *)&sc->sc_upd, 240 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 241 printf("%s: can't map upload descriptors, error = %d\n", 242 sc->sc_dev.dv_xname, error); 243 goto fail; 244 } 245 246 attach_stage = 2; 247 248 if ((error = bus_dmamap_create(sc->sc_dmat, 249 EX_NUPD * sizeof (struct ex_upd), 1, 250 EX_NUPD * sizeof (struct ex_upd), 0, BUS_DMA_NOWAIT, 251 &sc->sc_upd_dmamap)) != 0) { 252 printf("%s: can't create upload desc. DMA map, error = %d\n", 253 sc->sc_dev.dv_xname, error); 254 goto fail; 255 } 256 257 attach_stage = 3; 258 259 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_upd_dmamap, 260 sc->sc_upd, EX_NUPD * sizeof (struct ex_upd), NULL, 261 BUS_DMA_NOWAIT)) != 0) { 262 printf("%s: can't load upload desc. DMA map, error = %d\n", 263 sc->sc_dev.dv_xname, error); 264 goto fail; 265 } 266 267 attach_stage = 4; 268 269 /* 270 * Allocate the download descriptors, and create and load the DMA 271 * map for them. 272 */ 273 if ((error = bus_dmamem_alloc(sc->sc_dmat, 274 EX_NDPD * sizeof (struct ex_dpd), PAGE_SIZE, 0, &sc->sc_dseg, 1, 275 &sc->sc_drseg, BUS_DMA_NOWAIT)) != 0) { 276 printf("%s: can't allocate download descriptors, error = %d\n", 277 sc->sc_dev.dv_xname, error); 278 goto fail; 279 } 280 281 attach_stage = 5; 282 283 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg, 284 EX_NDPD * sizeof (struct ex_dpd), (caddr_t *)&sc->sc_dpd, 285 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 286 printf("%s: can't map download descriptors, error = %d\n", 287 sc->sc_dev.dv_xname, error); 288 goto fail; 289 } 290 memset(sc->sc_dpd, 0, EX_NDPD * sizeof (struct ex_dpd)); 291 292 attach_stage = 6; 293 294 if ((error = bus_dmamap_create(sc->sc_dmat, 295 EX_NDPD * sizeof (struct ex_dpd), 1, 296 EX_NDPD * sizeof (struct ex_dpd), 0, BUS_DMA_NOWAIT, 297 &sc->sc_dpd_dmamap)) != 0) { 298 printf("%s: can't create download desc. DMA map, error = %d\n", 299 sc->sc_dev.dv_xname, error); 300 goto fail; 301 } 302 303 attach_stage = 7; 304 305 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dpd_dmamap, 306 sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd), NULL, 307 BUS_DMA_NOWAIT)) != 0) { 308 printf("%s: can't load download desc. DMA map, error = %d\n", 309 sc->sc_dev.dv_xname, error); 310 goto fail; 311 } 312 313 attach_stage = 8; 314 315 316 /* 317 * Create the transmit buffer DMA maps. 318 */ 319 for (i = 0; i < EX_NDPD; i++) { 320 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 321 EX_NTFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 322 &sc->sc_tx_dmamaps[i])) != 0) { 323 printf("%s: can't create tx DMA map %d, error = %d\n", 324 sc->sc_dev.dv_xname, i, error); 325 goto fail; 326 } 327 } 328 329 attach_stage = 9; 330 331 /* 332 * Create the receive buffer DMA maps. 333 */ 334 for (i = 0; i < EX_NUPD; i++) { 335 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 336 EX_NRFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 337 &sc->sc_rx_dmamaps[i])) != 0) { 338 printf("%s: can't create rx DMA map %d, error = %d\n", 339 sc->sc_dev.dv_xname, i, error); 340 goto fail; 341 } 342 } 343 344 attach_stage = 10; 345 346 /* 347 * Create ring of upload descriptors, only once. The DMA engine 348 * will loop over this when receiving packets, stalling if it 349 * hits an UPD with a finished receive. 350 */ 351 for (i = 0; i < EX_NUPD; i++) { 352 sc->sc_rxdescs[i].rx_dmamap = sc->sc_rx_dmamaps[i]; 353 sc->sc_rxdescs[i].rx_upd = &sc->sc_upd[i]; 354 sc->sc_upd[i].upd_frags[0].fr_len = 355 htole32((MCLBYTES - 2) | EX_FR_LAST); 356 if (ex_add_rxbuf(sc, &sc->sc_rxdescs[i]) != 0) { 357 printf("%s: can't allocate or map rx buffers\n", 358 sc->sc_dev.dv_xname); 359 goto fail; 360 } 361 } 362 363 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 0, 364 EX_NUPD * sizeof (struct ex_upd), 365 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 366 367 ex_init_txdescs(sc); 368 369 attach_stage = 11; 370 371 372 GO_WINDOW(3); 373 val = bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS); 374 if (val & ELINK_MEDIACAP_MII) 375 sc->ex_conf |= EX_CONF_MII; 376 377 ifp = &sc->sc_ethercom.ec_if; 378 379 /* 380 * Initialize our media structures and MII info. We'll 381 * probe the MII if we discover that we have one. 382 */ 383 sc->ex_mii.mii_ifp = ifp; 384 sc->ex_mii.mii_readreg = ex_mii_readreg; 385 sc->ex_mii.mii_writereg = ex_mii_writereg; 386 sc->ex_mii.mii_statchg = ex_mii_statchg; 387 ifmedia_init(&sc->ex_mii.mii_media, 0, ex_media_chg, 388 ex_media_stat); 389 390 if (sc->ex_conf & EX_CONF_MII) { 391 /* 392 * Find PHY, extract media information from it. 393 * First, select the right transceiver. 394 */ 395 u_int32_t icfg; 396 397 GO_WINDOW(3); 398 icfg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 399 icfg &= ~(CONFIG_XCVR_SEL << 16); 400 if (val & (ELINK_MEDIACAP_MII | ELINK_MEDIACAP_100BASET4)) 401 icfg |= ELINKMEDIA_MII << (CONFIG_XCVR_SEL_SHIFT + 16); 402 if (val & ELINK_MEDIACAP_100BASETX) 403 icfg |= ELINKMEDIA_AUTO << (CONFIG_XCVR_SEL_SHIFT + 16); 404 if (val & ELINK_MEDIACAP_100BASEFX) 405 icfg |= ELINKMEDIA_100BASE_FX 406 << (CONFIG_XCVR_SEL_SHIFT + 16); 407 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, icfg); 408 409 mii_attach(&sc->sc_dev, &sc->ex_mii, 0xffffffff, 410 MII_PHY_ANY, MII_OFFSET_ANY, 0); 411 if (LIST_FIRST(&sc->ex_mii.mii_phys) == NULL) { 412 ifmedia_add(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE, 413 0, NULL); 414 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE); 415 } else { 416 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_AUTO); 417 } 418 } else 419 ex_probemedia(sc); 420 421 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 422 ifp->if_softc = sc; 423 ifp->if_start = ex_start; 424 ifp->if_ioctl = ex_ioctl; 425 ifp->if_watchdog = ex_watchdog; 426 ifp->if_init = ex_init; 427 ifp->if_stop = ex_stop; 428 ifp->if_flags = 429 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 430 IFQ_SET_READY(&ifp->if_snd); 431 432 /* 433 * We can support 802.1Q VLAN-sized frames. 434 */ 435 sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU; 436 437 /* 438 * The 3c90xB has hardware IPv4/TCPv4/UDPv4 checksum support. 439 */ 440 if (sc->ex_conf & EX_CONF_90XB) 441 sc->sc_ethercom.ec_if.if_capabilities |= IFCAP_CSUM_IPv4 | 442 IFCAP_CSUM_TCPv4 | IFCAP_CSUM_UDPv4; 443 444 if_attach(ifp); 445 ether_ifattach(ifp, macaddr); 446 447 GO_WINDOW(1); 448 449 sc->tx_start_thresh = 20; 450 sc->tx_succ_ok = 0; 451 452 /* TODO: set queues to 0 */ 453 454 #if NRND > 0 455 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 456 RND_TYPE_NET, 0); 457 #endif 458 459 /* Establish callback to reset card when we reboot. */ 460 sc->sc_sdhook = shutdownhook_establish(ex_shutdown, sc); 461 if (sc->sc_sdhook == NULL) 462 printf("%s: WARNING: unable to establish shutdown hook\n", 463 sc->sc_dev.dv_xname); 464 465 /* Add a suspend hook to make sure we come back up after a resume. */ 466 sc->sc_powerhook = powerhook_establish(ex_power, sc); 467 if (sc->sc_powerhook == NULL) 468 printf("%s: WARNING: unable to establish power hook\n", 469 sc->sc_dev.dv_xname); 470 471 /* The attach is successful. */ 472 sc->ex_flags |= EX_FLAGS_ATTACHED; 473 return; 474 475 fail: 476 /* 477 * Free any resources we've allocated during the failed attach 478 * attempt. Do this in reverse order and fall though. 479 */ 480 switch (attach_stage) { 481 case 11: 482 { 483 struct ex_rxdesc *rxd; 484 485 for (i = 0; i < EX_NUPD; i++) { 486 rxd = &sc->sc_rxdescs[i]; 487 if (rxd->rx_mbhead != NULL) { 488 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap); 489 m_freem(rxd->rx_mbhead); 490 } 491 } 492 } 493 /* FALLTHROUGH */ 494 495 case 10: 496 for (i = 0; i < EX_NUPD; i++) 497 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]); 498 /* FALLTHROUGH */ 499 500 case 9: 501 for (i = 0; i < EX_NDPD; i++) 502 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]); 503 /* FALLTHROUGH */ 504 case 8: 505 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap); 506 /* FALLTHROUGH */ 507 508 case 7: 509 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap); 510 /* FALLTHROUGH */ 511 512 case 6: 513 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd, 514 EX_NDPD * sizeof (struct ex_dpd)); 515 /* FALLTHROUGH */ 516 517 case 5: 518 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg); 519 break; 520 521 case 4: 522 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap); 523 /* FALLTHROUGH */ 524 525 case 3: 526 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap); 527 /* FALLTHROUGH */ 528 529 case 2: 530 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd, 531 EX_NUPD * sizeof (struct ex_upd)); 532 /* FALLTHROUGH */ 533 534 case 1: 535 bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg); 536 break; 537 } 538 539 } 540 541 /* 542 * Find the media present on non-MII chips. 543 */ 544 void 545 ex_probemedia(sc) 546 struct ex_softc *sc; 547 { 548 bus_space_tag_t iot = sc->sc_iot; 549 bus_space_handle_t ioh = sc->sc_ioh; 550 struct ifmedia *ifm = &sc->ex_mii.mii_media; 551 struct ex_media *exm; 552 u_int16_t config1, reset_options, default_media; 553 int defmedia = 0; 554 const char *sep = "", *defmedianame = NULL; 555 556 GO_WINDOW(3); 557 config1 = bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2); 558 reset_options = bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 559 GO_WINDOW(0); 560 561 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 562 563 printf("%s: ", sc->sc_dev.dv_xname); 564 565 /* Sanity check that there are any media! */ 566 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 567 printf("no media present!\n"); 568 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 569 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 570 return; 571 } 572 573 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 574 575 for (exm = ex_native_media; exm->exm_name != NULL; exm++) { 576 if (reset_options & exm->exm_mpbit) { 577 /* 578 * Default media is a little complicated. We 579 * support full-duplex which uses the same 580 * reset options bit. 581 * 582 * XXX Check EEPROM for default to FDX? 583 */ 584 if (exm->exm_epmedia == default_media) { 585 if ((exm->exm_ifmedia & IFM_FDX) == 0) { 586 defmedia = exm->exm_ifmedia; 587 defmedianame = exm->exm_name; 588 } 589 } else if (defmedia == 0) { 590 defmedia = exm->exm_ifmedia; 591 defmedianame = exm->exm_name; 592 } 593 ifmedia_add(ifm, exm->exm_ifmedia, exm->exm_epmedia, 594 NULL); 595 PRINT(exm->exm_name); 596 } 597 } 598 599 #undef PRINT 600 601 #ifdef DIAGNOSTIC 602 if (defmedia == 0) 603 panic("ex_probemedia: impossible"); 604 #endif 605 606 printf(", default %s\n", defmedianame); 607 ifmedia_set(ifm, defmedia); 608 } 609 610 /* 611 * Bring device up. 612 */ 613 int 614 ex_init(ifp) 615 struct ifnet *ifp; 616 { 617 struct ex_softc *sc = ifp->if_softc; 618 bus_space_tag_t iot = sc->sc_iot; 619 bus_space_handle_t ioh = sc->sc_ioh; 620 int i; 621 int error = 0; 622 623 if ((error = ex_enable(sc)) != 0) 624 goto out; 625 626 ex_waitcmd(sc); 627 ex_stop(ifp, 0); 628 629 /* 630 * Set the station address and clear the station mask. The latter 631 * is needed for 90x cards, 0 is the default for 90xB cards. 632 */ 633 GO_WINDOW(2); 634 for (i = 0; i < ETHER_ADDR_LEN; i++) { 635 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 636 LLADDR(ifp->if_sadl)[i]); 637 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 638 } 639 640 GO_WINDOW(3); 641 642 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_RESET); 643 ex_waitcmd(sc); 644 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_RESET); 645 ex_waitcmd(sc); 646 647 /* 648 * Disable reclaim threshold for 90xB, set free threshold to 649 * 6 * 256 = 1536 for 90x. 650 */ 651 if (sc->ex_conf & EX_CONF_90XB) 652 bus_space_write_2(iot, ioh, ELINK_COMMAND, 653 ELINK_TXRECLTHRESH | 255); 654 else 655 bus_space_write_1(iot, ioh, ELINK_TXFREETHRESH, 6); 656 657 bus_space_write_2(iot, ioh, ELINK_COMMAND, 658 SET_RX_EARLY_THRESH | ELINK_THRESH_DISABLE); 659 660 bus_space_write_4(iot, ioh, ELINK_DMACTRL, 661 bus_space_read_4(iot, ioh, ELINK_DMACTRL) | ELINK_DMAC_UPRXEAREN); 662 663 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK | S_MASK); 664 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK | S_MASK); 665 666 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 667 if (sc->intr_ack) 668 (* sc->intr_ack)(sc); 669 ex_set_media(sc); 670 ex_set_mc(sc); 671 672 673 bus_space_write_2(iot, ioh, ELINK_COMMAND, STATS_ENABLE); 674 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 675 bus_space_write_4(iot, ioh, ELINK_UPLISTPTR, sc->sc_upddma); 676 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 677 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_UPUNSTALL); 678 679 if (sc->ex_conf & (EX_CONF_PHY_POWER | EX_CONF_INV_LED_POLARITY)) { 680 u_int16_t cbcard_config; 681 682 GO_WINDOW(2); 683 cbcard_config = bus_space_read_2(sc->sc_iot, sc->sc_ioh, 0x0c); 684 if (sc->ex_conf & EX_CONF_PHY_POWER) { 685 cbcard_config |= 0x4000; /* turn on PHY power */ 686 } 687 if (sc->ex_conf & EX_CONF_INV_LED_POLARITY) { 688 cbcard_config |= 0x0010; /* invert LED polarity */ 689 } 690 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 0x0c, cbcard_config); 691 692 GO_WINDOW(3); 693 } 694 695 ifp->if_flags |= IFF_RUNNING; 696 ifp->if_flags &= ~IFF_OACTIVE; 697 ex_start(ifp); 698 699 GO_WINDOW(1); 700 701 callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc); 702 703 out: 704 if (error) { 705 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 706 ifp->if_timer = 0; 707 printf("%s: interface not running\n", sc->sc_dev.dv_xname); 708 } 709 return (error); 710 } 711 712 #define ex_mchash(addr) (ether_crc32_be((addr), ETHER_ADDR_LEN) & 0xff) 713 714 /* 715 * Set multicast receive filter. Also take care of promiscuous mode 716 * here (XXX). 717 */ 718 void 719 ex_set_mc(sc) 720 struct ex_softc *sc; 721 { 722 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 723 struct ethercom *ec = &sc->sc_ethercom; 724 struct ether_multi *enm; 725 struct ether_multistep estep; 726 int i; 727 u_int16_t mask = FIL_INDIVIDUAL | FIL_BRDCST; 728 729 if (ifp->if_flags & IFF_PROMISC) 730 mask |= FIL_PROMISC; 731 732 if (!(ifp->if_flags & IFF_MULTICAST)) 733 goto out; 734 735 if (!(sc->ex_conf & EX_CONF_90XB) || ifp->if_flags & IFF_ALLMULTI) { 736 mask |= (ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0; 737 } else { 738 ETHER_FIRST_MULTI(estep, ec, enm); 739 while (enm != NULL) { 740 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 741 ETHER_ADDR_LEN) != 0) 742 goto out; 743 i = ex_mchash(enm->enm_addrlo); 744 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 745 ELINK_COMMAND, ELINK_SETHASHFILBIT | i); 746 ETHER_NEXT_MULTI(estep, enm); 747 } 748 mask |= FIL_MULTIHASH; 749 } 750 out: 751 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 752 SET_RX_FILTER | mask); 753 } 754 755 756 static void 757 ex_txstat(sc) 758 struct ex_softc *sc; 759 { 760 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 761 bus_space_tag_t iot = sc->sc_iot; 762 bus_space_handle_t ioh = sc->sc_ioh; 763 int i; 764 765 /* 766 * We need to read+write TX_STATUS until we get a 0 status 767 * in order to turn off the interrupt flag. 768 */ 769 while ((i = bus_space_read_1(iot, ioh, ELINK_TXSTATUS)) & TXS_COMPLETE) { 770 bus_space_write_1(iot, ioh, ELINK_TXSTATUS, 0x0); 771 772 if (i & TXS_JABBER) { 773 ++sc->sc_ethercom.ec_if.if_oerrors; 774 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 775 printf("%s: jabber (%x)\n", 776 sc->sc_dev.dv_xname, i); 777 ex_init(ifp); 778 /* TODO: be more subtle here */ 779 } else if (i & TXS_UNDERRUN) { 780 ++sc->sc_ethercom.ec_if.if_oerrors; 781 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 782 printf("%s: fifo underrun (%x) @%d\n", 783 sc->sc_dev.dv_xname, i, 784 sc->tx_start_thresh); 785 if (sc->tx_succ_ok < 100) 786 sc->tx_start_thresh = min(ETHER_MAX_LEN, 787 sc->tx_start_thresh + 20); 788 sc->tx_succ_ok = 0; 789 ex_init(ifp); 790 /* TODO: be more subtle here */ 791 } else if (i & TXS_MAX_COLLISION) { 792 ++sc->sc_ethercom.ec_if.if_collisions; 793 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 794 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 795 } else 796 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 797 } 798 } 799 800 int 801 ex_media_chg(ifp) 802 struct ifnet *ifp; 803 { 804 805 if (ifp->if_flags & IFF_UP) 806 ex_init(ifp); 807 return 0; 808 } 809 810 void 811 ex_set_media(sc) 812 struct ex_softc *sc; 813 { 814 bus_space_tag_t iot = sc->sc_iot; 815 bus_space_handle_t ioh = sc->sc_ioh; 816 u_int32_t configreg; 817 818 if (((sc->ex_conf & EX_CONF_MII) && 819 (sc->ex_mii.mii_media_active & IFM_FDX)) 820 || (!(sc->ex_conf & EX_CONF_MII) && 821 (sc->ex_mii.mii_media.ifm_media & IFM_FDX))) { 822 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 823 MAC_CONTROL_FDX); 824 } else { 825 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 0); 826 } 827 828 /* 829 * If the device has MII, select it, and then tell the 830 * PHY which media to use. 831 */ 832 if (sc->ex_conf & EX_CONF_MII) { 833 GO_WINDOW(3); 834 835 configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 836 837 configreg &= ~(CONFIG_MEDIAMASK << 16); 838 configreg |= (ELINKMEDIA_MII << (CONFIG_MEDIAMASK_SHIFT + 16)); 839 840 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg); 841 mii_mediachg(&sc->ex_mii); 842 return; 843 } 844 845 GO_WINDOW(4); 846 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0); 847 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 848 delay(800); 849 850 /* 851 * Now turn on the selected media/transceiver. 852 */ 853 switch (IFM_SUBTYPE(sc->ex_mii.mii_media.ifm_cur->ifm_media)) { 854 case IFM_10_T: 855 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 856 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 857 break; 858 859 case IFM_10_2: 860 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 861 DELAY(800); 862 break; 863 864 case IFM_100_TX: 865 case IFM_100_FX: 866 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 867 LINKBEAT_ENABLE); 868 DELAY(800); 869 break; 870 871 case IFM_10_5: 872 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 873 SQE_ENABLE); 874 DELAY(800); 875 break; 876 877 case IFM_MANUAL: 878 break; 879 880 case IFM_NONE: 881 return; 882 883 default: 884 panic("ex_set_media: impossible"); 885 } 886 887 GO_WINDOW(3); 888 configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 889 890 configreg &= ~(CONFIG_MEDIAMASK << 16); 891 configreg |= (sc->ex_mii.mii_media.ifm_cur->ifm_data << 892 (CONFIG_MEDIAMASK_SHIFT + 16)); 893 894 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg); 895 } 896 897 /* 898 * Get currently-selected media from card. 899 * (if_media callback, may be called before interface is brought up). 900 */ 901 void 902 ex_media_stat(ifp, req) 903 struct ifnet *ifp; 904 struct ifmediareq *req; 905 { 906 struct ex_softc *sc = ifp->if_softc; 907 908 if (sc->ex_conf & EX_CONF_MII) { 909 mii_pollstat(&sc->ex_mii); 910 req->ifm_status = sc->ex_mii.mii_media_status; 911 req->ifm_active = sc->ex_mii.mii_media_active; 912 } else { 913 GO_WINDOW(4); 914 req->ifm_status = IFM_AVALID; 915 req->ifm_active = sc->ex_mii.mii_media.ifm_cur->ifm_media; 916 if (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 917 ELINK_W4_MEDIA_TYPE) & LINKBEAT_DETECT) 918 req->ifm_status |= IFM_ACTIVE; 919 GO_WINDOW(1); 920 } 921 } 922 923 924 925 /* 926 * Start outputting on the interface. 927 */ 928 static void 929 ex_start(ifp) 930 struct ifnet *ifp; 931 { 932 struct ex_softc *sc = ifp->if_softc; 933 bus_space_tag_t iot = sc->sc_iot; 934 bus_space_handle_t ioh = sc->sc_ioh; 935 volatile struct ex_fraghdr *fr = NULL; 936 volatile struct ex_dpd *dpd = NULL, *prevdpd = NULL; 937 struct ex_txdesc *txp; 938 struct mbuf *mb_head; 939 bus_dmamap_t dmamap; 940 int offset, totlen, segment, error; 941 u_int32_t csum_flags; 942 943 if (sc->tx_head || sc->tx_free == NULL) 944 return; 945 946 txp = NULL; 947 948 /* 949 * We're finished if there is nothing more to add to the list or if 950 * we're all filled up with buffers to transmit. 951 */ 952 while (sc->tx_free != NULL) { 953 /* 954 * Grab a packet to transmit. 955 */ 956 IFQ_DEQUEUE(&ifp->if_snd, mb_head); 957 if (mb_head == NULL) 958 break; 959 960 /* 961 * Get pointer to next available tx desc. 962 */ 963 txp = sc->tx_free; 964 dmamap = txp->tx_dmamap; 965 966 /* 967 * Go through each of the mbufs in the chain and initialize 968 * the transmit buffer descriptors with the physical address 969 * and size of the mbuf. 970 */ 971 reload: 972 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 973 mb_head, BUS_DMA_WRITE|BUS_DMA_NOWAIT); 974 switch (error) { 975 case 0: 976 /* Success. */ 977 break; 978 979 case EFBIG: 980 { 981 struct mbuf *mn; 982 983 /* 984 * We ran out of segments. We have to recopy this 985 * mbuf chain first. Bail out if we can't get the 986 * new buffers. 987 */ 988 printf("%s: too many segments, ", sc->sc_dev.dv_xname); 989 990 MGETHDR(mn, M_DONTWAIT, MT_DATA); 991 if (mn == NULL) { 992 m_freem(mb_head); 993 printf("aborting\n"); 994 goto out; 995 } 996 if (mb_head->m_pkthdr.len > MHLEN) { 997 MCLGET(mn, M_DONTWAIT); 998 if ((mn->m_flags & M_EXT) == 0) { 999 m_freem(mn); 1000 m_freem(mb_head); 1001 printf("aborting\n"); 1002 goto out; 1003 } 1004 } 1005 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, 1006 mtod(mn, caddr_t)); 1007 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; 1008 m_freem(mb_head); 1009 mb_head = mn; 1010 printf("retrying\n"); 1011 goto reload; 1012 } 1013 1014 default: 1015 /* 1016 * Some other problem; report it. 1017 */ 1018 printf("%s: can't load mbuf chain, error = %d\n", 1019 sc->sc_dev.dv_xname, error); 1020 m_freem(mb_head); 1021 goto out; 1022 } 1023 1024 /* 1025 * remove our tx desc from freelist. 1026 */ 1027 sc->tx_free = txp->tx_next; 1028 txp->tx_next = NULL; 1029 1030 fr = &txp->tx_dpd->dpd_frags[0]; 1031 totlen = 0; 1032 for (segment = 0; segment < dmamap->dm_nsegs; segment++, fr++) { 1033 fr->fr_addr = htole32(dmamap->dm_segs[segment].ds_addr); 1034 fr->fr_len = htole32(dmamap->dm_segs[segment].ds_len); 1035 totlen += dmamap->dm_segs[segment].ds_len; 1036 } 1037 fr--; 1038 fr->fr_len |= htole32(EX_FR_LAST); 1039 txp->tx_mbhead = mb_head; 1040 1041 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 1042 BUS_DMASYNC_PREWRITE); 1043 1044 dpd = txp->tx_dpd; 1045 dpd->dpd_nextptr = 0; 1046 dpd->dpd_fsh = htole32(totlen); 1047 1048 /* Byte-swap constants to compiler can optimize. */ 1049 1050 if (sc->ex_conf & EX_CONF_90XB) { 1051 csum_flags = 0; 1052 1053 if (mb_head->m_pkthdr.csum_flags & M_CSUM_IPv4) 1054 csum_flags |= htole32(EX_DPD_IPCKSUM); 1055 1056 if (mb_head->m_pkthdr.csum_flags & M_CSUM_TCPv4) 1057 csum_flags |= htole32(EX_DPD_TCPCKSUM); 1058 else if (mb_head->m_pkthdr.csum_flags & M_CSUM_UDPv4) 1059 csum_flags |= htole32(EX_DPD_UDPCKSUM); 1060 1061 dpd->dpd_fsh |= csum_flags; 1062 } else { 1063 KDASSERT((mb_head->m_pkthdr.csum_flags & 1064 (M_CSUM_IPv4|M_CSUM_TCPv4|M_CSUM_UDPv4)) == 0); 1065 } 1066 1067 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1068 ((caddr_t)dpd - (caddr_t)sc->sc_dpd), 1069 sizeof (struct ex_dpd), 1070 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1071 1072 /* 1073 * No need to stall the download engine, we know it's 1074 * not busy right now. 1075 * 1076 * Fix up pointers in both the "soft" tx and the physical 1077 * tx list. 1078 */ 1079 if (sc->tx_head != NULL) { 1080 prevdpd = sc->tx_tail->tx_dpd; 1081 offset = ((caddr_t)prevdpd - (caddr_t)sc->sc_dpd); 1082 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1083 offset, sizeof (struct ex_dpd), 1084 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1085 prevdpd->dpd_nextptr = htole32(DPD_DMADDR(sc, txp)); 1086 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1087 offset, sizeof (struct ex_dpd), 1088 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1089 sc->tx_tail->tx_next = txp; 1090 sc->tx_tail = txp; 1091 } else { 1092 sc->tx_tail = sc->tx_head = txp; 1093 } 1094 1095 #if NBPFILTER > 0 1096 /* 1097 * Pass packet to bpf if there is a listener. 1098 */ 1099 if (ifp->if_bpf) 1100 bpf_mtap(ifp->if_bpf, mb_head); 1101 #endif 1102 } 1103 out: 1104 if (sc->tx_head) { 1105 sc->tx_tail->tx_dpd->dpd_fsh |= htole32(EX_DPD_DNIND); 1106 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1107 ((caddr_t)sc->tx_tail->tx_dpd - (caddr_t)sc->sc_dpd), 1108 sizeof (struct ex_dpd), 1109 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1110 ifp->if_flags |= IFF_OACTIVE; 1111 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_DNUNSTALL); 1112 bus_space_write_4(iot, ioh, ELINK_DNLISTPTR, 1113 DPD_DMADDR(sc, sc->tx_head)); 1114 1115 /* trigger watchdog */ 1116 ifp->if_timer = 5; 1117 } 1118 } 1119 1120 1121 int 1122 ex_intr(arg) 1123 void *arg; 1124 { 1125 struct ex_softc *sc = arg; 1126 bus_space_tag_t iot = sc->sc_iot; 1127 bus_space_handle_t ioh = sc->sc_ioh; 1128 u_int16_t stat; 1129 int ret = 0; 1130 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1131 1132 if ((ifp->if_flags & IFF_RUNNING) == 0 || 1133 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1134 return (0); 1135 1136 for (;;) { 1137 stat = bus_space_read_2(iot, ioh, ELINK_STATUS); 1138 1139 if ((stat & S_MASK) == 0) { 1140 if ((stat & S_INTR_LATCH) == 0) { 1141 #if 0 1142 printf("%s: intr latch cleared\n", 1143 sc->sc_dev.dv_xname); 1144 #endif 1145 break; 1146 } 1147 } 1148 1149 ret = 1; 1150 1151 /* 1152 * Acknowledge interrupts. 1153 */ 1154 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1155 (stat & (S_MASK | S_INTR_LATCH))); 1156 if (sc->intr_ack) 1157 (*sc->intr_ack)(sc); 1158 1159 if (stat & S_HOST_ERROR) { 1160 printf("%s: adapter failure (%x)\n", 1161 sc->sc_dev.dv_xname, stat); 1162 ex_reset(sc); 1163 ex_init(ifp); 1164 return 1; 1165 } 1166 if (stat & S_TX_COMPLETE) { 1167 ex_txstat(sc); 1168 } 1169 if (stat & S_UPD_STATS) { 1170 ex_getstats(sc); 1171 } 1172 if (stat & S_DN_COMPLETE) { 1173 struct ex_txdesc *txp, *ptxp = NULL; 1174 bus_dmamap_t txmap; 1175 1176 /* reset watchdog timer, was set in ex_start() */ 1177 ifp->if_timer = 0; 1178 1179 for (txp = sc->tx_head; txp != NULL; 1180 txp = txp->tx_next) { 1181 bus_dmamap_sync(sc->sc_dmat, 1182 sc->sc_dpd_dmamap, 1183 (caddr_t)txp->tx_dpd - (caddr_t)sc->sc_dpd, 1184 sizeof (struct ex_dpd), 1185 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1186 if (txp->tx_mbhead != NULL) { 1187 txmap = txp->tx_dmamap; 1188 bus_dmamap_sync(sc->sc_dmat, txmap, 1189 0, txmap->dm_mapsize, 1190 BUS_DMASYNC_POSTWRITE); 1191 bus_dmamap_unload(sc->sc_dmat, txmap); 1192 m_freem(txp->tx_mbhead); 1193 txp->tx_mbhead = NULL; 1194 } 1195 ptxp = txp; 1196 } 1197 1198 /* 1199 * Move finished tx buffers back to the tx free list. 1200 */ 1201 if (sc->tx_free) { 1202 sc->tx_ftail->tx_next = sc->tx_head; 1203 sc->tx_ftail = ptxp; 1204 } else 1205 sc->tx_ftail = sc->tx_free = sc->tx_head; 1206 1207 sc->tx_head = sc->tx_tail = NULL; 1208 ifp->if_flags &= ~IFF_OACTIVE; 1209 } 1210 1211 if (stat & S_UP_COMPLETE) { 1212 struct ex_rxdesc *rxd; 1213 struct mbuf *m; 1214 struct ex_upd *upd; 1215 bus_dmamap_t rxmap; 1216 u_int32_t pktstat; 1217 1218 rcvloop: 1219 rxd = sc->rx_head; 1220 rxmap = rxd->rx_dmamap; 1221 m = rxd->rx_mbhead; 1222 upd = rxd->rx_upd; 1223 1224 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, 1225 rxmap->dm_mapsize, 1226 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1227 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1228 ((caddr_t)upd - (caddr_t)sc->sc_upd), 1229 sizeof (struct ex_upd), 1230 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1231 pktstat = le32toh(upd->upd_pktstatus); 1232 1233 if (pktstat & EX_UPD_COMPLETE) { 1234 /* 1235 * Remove first packet from the chain. 1236 */ 1237 sc->rx_head = rxd->rx_next; 1238 rxd->rx_next = NULL; 1239 1240 /* 1241 * Add a new buffer to the receive chain. 1242 * If this fails, the old buffer is recycled 1243 * instead. 1244 */ 1245 if (ex_add_rxbuf(sc, rxd) == 0) { 1246 u_int16_t total_len; 1247 1248 if (pktstat & 1249 ((sc->sc_ethercom.ec_capenable & 1250 ETHERCAP_VLAN_MTU) ? 1251 EX_UPD_ERR_VLAN : EX_UPD_ERR)) { 1252 ifp->if_ierrors++; 1253 m_freem(m); 1254 goto rcvloop; 1255 } 1256 1257 total_len = pktstat & EX_UPD_PKTLENMASK; 1258 if (total_len < 1259 sizeof(struct ether_header)) { 1260 m_freem(m); 1261 goto rcvloop; 1262 } 1263 m->m_pkthdr.rcvif = ifp; 1264 m->m_pkthdr.len = m->m_len = total_len; 1265 #if NBPFILTER > 0 1266 if (ifp->if_bpf) 1267 bpf_mtap(ifp->if_bpf, m); 1268 #endif 1269 /* 1270 * Set the incoming checksum information for the packet. 1271 */ 1272 if ((sc->ex_conf & EX_CONF_90XB) != 0 && 1273 (pktstat & EX_UPD_IPCHECKED) != 0) { 1274 m->m_pkthdr.csum_flags |= M_CSUM_IPv4; 1275 if (pktstat & EX_UPD_IPCKSUMERR) 1276 m->m_pkthdr.csum_flags |= M_CSUM_IPv4_BAD; 1277 if (pktstat & EX_UPD_TCPCHECKED) { 1278 m->m_pkthdr.csum_flags |= M_CSUM_TCPv4; 1279 if (pktstat & EX_UPD_TCPCKSUMERR) 1280 m->m_pkthdr.csum_flags |= 1281 M_CSUM_TCP_UDP_BAD; 1282 } else if (pktstat & EX_UPD_UDPCHECKED) { 1283 m->m_pkthdr.csum_flags |= M_CSUM_UDPv4; 1284 if (pktstat & EX_UPD_UDPCKSUMERR) 1285 m->m_pkthdr.csum_flags |= 1286 M_CSUM_TCP_UDP_BAD; 1287 } 1288 } 1289 (*ifp->if_input)(ifp, m); 1290 } 1291 goto rcvloop; 1292 } 1293 /* 1294 * Just in case we filled up all UPDs and the DMA engine 1295 * stalled. We could be more subtle about this. 1296 */ 1297 if (bus_space_read_4(iot, ioh, ELINK_UPLISTPTR) == 0) { 1298 printf("%s: uplistptr was 0\n", 1299 sc->sc_dev.dv_xname); 1300 ex_init(ifp); 1301 } else if (bus_space_read_4(iot, ioh, ELINK_UPPKTSTATUS) 1302 & 0x2000) { 1303 printf("%s: receive stalled\n", 1304 sc->sc_dev.dv_xname); 1305 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1306 ELINK_UPUNSTALL); 1307 } 1308 } 1309 } 1310 1311 /* no more interrupts */ 1312 if (ret && IFQ_IS_EMPTY(&ifp->if_snd) == 0) 1313 ex_start(ifp); 1314 return ret; 1315 } 1316 1317 int 1318 ex_ioctl(ifp, cmd, data) 1319 struct ifnet *ifp; 1320 u_long cmd; 1321 caddr_t data; 1322 { 1323 struct ex_softc *sc = ifp->if_softc; 1324 struct ifreq *ifr = (struct ifreq *)data; 1325 int s, error; 1326 1327 s = splnet(); 1328 1329 switch (cmd) { 1330 case SIOCSIFMEDIA: 1331 case SIOCGIFMEDIA: 1332 error = ifmedia_ioctl(ifp, ifr, &sc->ex_mii.mii_media, cmd); 1333 break; 1334 1335 default: 1336 error = ether_ioctl(ifp, cmd, data); 1337 if (error == ENETRESET) { 1338 if (sc->enabled) { 1339 /* 1340 * Multicast list has changed; set the hardware filter 1341 * accordingly. 1342 */ 1343 ex_set_mc(sc); 1344 } 1345 error = 0; 1346 } 1347 break; 1348 } 1349 1350 splx(s); 1351 return (error); 1352 } 1353 1354 void 1355 ex_getstats(sc) 1356 struct ex_softc *sc; 1357 { 1358 bus_space_handle_t ioh = sc->sc_ioh; 1359 bus_space_tag_t iot = sc->sc_iot; 1360 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1361 u_int8_t upperok; 1362 1363 GO_WINDOW(6); 1364 upperok = bus_space_read_1(iot, ioh, UPPER_FRAMES_OK); 1365 ifp->if_ipackets += bus_space_read_1(iot, ioh, RX_FRAMES_OK); 1366 ifp->if_ipackets += (upperok & 0x03) << 8; 1367 ifp->if_opackets += bus_space_read_1(iot, ioh, TX_FRAMES_OK); 1368 ifp->if_opackets += (upperok & 0x30) << 4; 1369 ifp->if_ierrors += bus_space_read_1(iot, ioh, RX_OVERRUNS); 1370 ifp->if_collisions += bus_space_read_1(iot, ioh, TX_COLLISIONS); 1371 /* 1372 * There seems to be no way to get the exact number of collisions, 1373 * this is the number that occurred at the very least. 1374 */ 1375 ifp->if_collisions += 2 * bus_space_read_1(iot, ioh, 1376 TX_AFTER_X_COLLISIONS); 1377 ifp->if_ibytes += bus_space_read_2(iot, ioh, RX_TOTAL_OK); 1378 ifp->if_obytes += bus_space_read_2(iot, ioh, TX_TOTAL_OK); 1379 1380 /* 1381 * Clear the following to avoid stats overflow interrupts 1382 */ 1383 bus_space_read_1(iot, ioh, TX_DEFERRALS); 1384 bus_space_read_1(iot, ioh, TX_AFTER_1_COLLISION); 1385 bus_space_read_1(iot, ioh, TX_NO_SQE); 1386 bus_space_read_1(iot, ioh, TX_CD_LOST); 1387 GO_WINDOW(4); 1388 bus_space_read_1(iot, ioh, ELINK_W4_BADSSD); 1389 upperok = bus_space_read_1(iot, ioh, ELINK_W4_UBYTESOK); 1390 ifp->if_ibytes += (upperok & 0x0f) << 16; 1391 ifp->if_obytes += (upperok & 0xf0) << 12; 1392 GO_WINDOW(1); 1393 } 1394 1395 void 1396 ex_printstats(sc) 1397 struct ex_softc *sc; 1398 { 1399 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1400 1401 ex_getstats(sc); 1402 printf("in %llu out %llu ierror %llu oerror %llu ibytes %llu obytes " 1403 "%llu\n", (unsigned long long)ifp->if_ipackets, 1404 (unsigned long long)ifp->if_opackets, 1405 (unsigned long long)ifp->if_ierrors, 1406 (unsigned long long)ifp->if_oerrors, 1407 (unsigned long long)ifp->if_ibytes, 1408 (unsigned long long)ifp->if_obytes); 1409 } 1410 1411 void 1412 ex_tick(arg) 1413 void *arg; 1414 { 1415 struct ex_softc *sc = arg; 1416 int s; 1417 1418 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1419 return; 1420 1421 s = splnet(); 1422 1423 if (sc->ex_conf & EX_CONF_MII) 1424 mii_tick(&sc->ex_mii); 1425 1426 if (!(bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, ELINK_STATUS) 1427 & S_COMMAND_IN_PROGRESS)) 1428 ex_getstats(sc); 1429 1430 splx(s); 1431 1432 callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc); 1433 } 1434 1435 void 1436 ex_reset(sc) 1437 struct ex_softc *sc; 1438 { 1439 u_int16_t val = GLOBAL_RESET; 1440 1441 if (sc->ex_conf & EX_CONF_RESETHACK) 1442 val |= 0x10; 1443 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, val); 1444 /* 1445 * XXX apparently the command in progress bit can't be trusted 1446 * during a reset, so we just always wait this long. Fortunately 1447 * we normally only reset the chip during autoconfig. 1448 */ 1449 delay(100000); 1450 ex_waitcmd(sc); 1451 } 1452 1453 void 1454 ex_watchdog(ifp) 1455 struct ifnet *ifp; 1456 { 1457 struct ex_softc *sc = ifp->if_softc; 1458 1459 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1460 ++sc->sc_ethercom.ec_if.if_oerrors; 1461 1462 ex_reset(sc); 1463 ex_init(ifp); 1464 } 1465 1466 void 1467 ex_stop(ifp, disable) 1468 struct ifnet *ifp; 1469 int disable; 1470 { 1471 struct ex_softc *sc = ifp->if_softc; 1472 bus_space_tag_t iot = sc->sc_iot; 1473 bus_space_handle_t ioh = sc->sc_ioh; 1474 struct ex_txdesc *tx; 1475 struct ex_rxdesc *rx; 1476 int i; 1477 1478 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1479 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1480 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1481 1482 for (tx = sc->tx_head ; tx != NULL; tx = tx->tx_next) { 1483 if (tx->tx_mbhead == NULL) 1484 continue; 1485 m_freem(tx->tx_mbhead); 1486 tx->tx_mbhead = NULL; 1487 bus_dmamap_unload(sc->sc_dmat, tx->tx_dmamap); 1488 tx->tx_dpd->dpd_fsh = tx->tx_dpd->dpd_nextptr = 0; 1489 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1490 ((caddr_t)tx->tx_dpd - (caddr_t)sc->sc_dpd), 1491 sizeof (struct ex_dpd), 1492 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1493 } 1494 sc->tx_tail = sc->tx_head = NULL; 1495 ex_init_txdescs(sc); 1496 1497 sc->rx_tail = sc->rx_head = 0; 1498 for (i = 0; i < EX_NUPD; i++) { 1499 rx = &sc->sc_rxdescs[i]; 1500 if (rx->rx_mbhead != NULL) { 1501 bus_dmamap_unload(sc->sc_dmat, rx->rx_dmamap); 1502 m_freem(rx->rx_mbhead); 1503 rx->rx_mbhead = NULL; 1504 } 1505 ex_add_rxbuf(sc, rx); 1506 } 1507 1508 bus_space_write_2(iot, ioh, ELINK_COMMAND, C_INTR_LATCH); 1509 1510 callout_stop(&sc->ex_mii_callout); 1511 if (sc->ex_conf & EX_CONF_MII) 1512 mii_down(&sc->ex_mii); 1513 1514 if (disable) 1515 ex_disable(sc); 1516 1517 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1518 ifp->if_timer = 0; 1519 } 1520 1521 static void 1522 ex_init_txdescs(sc) 1523 struct ex_softc *sc; 1524 { 1525 int i; 1526 1527 for (i = 0; i < EX_NDPD; i++) { 1528 sc->sc_txdescs[i].tx_dmamap = sc->sc_tx_dmamaps[i]; 1529 sc->sc_txdescs[i].tx_dpd = &sc->sc_dpd[i]; 1530 if (i < EX_NDPD - 1) 1531 sc->sc_txdescs[i].tx_next = &sc->sc_txdescs[i + 1]; 1532 else 1533 sc->sc_txdescs[i].tx_next = NULL; 1534 } 1535 sc->tx_free = &sc->sc_txdescs[0]; 1536 sc->tx_ftail = &sc->sc_txdescs[EX_NDPD-1]; 1537 } 1538 1539 1540 int 1541 ex_activate(self, act) 1542 struct device *self; 1543 enum devact act; 1544 { 1545 struct ex_softc *sc = (void *) self; 1546 int s, error = 0; 1547 1548 s = splnet(); 1549 switch (act) { 1550 case DVACT_ACTIVATE: 1551 error = EOPNOTSUPP; 1552 break; 1553 1554 case DVACT_DEACTIVATE: 1555 if (sc->ex_conf & EX_CONF_MII) 1556 mii_activate(&sc->ex_mii, act, MII_PHY_ANY, 1557 MII_OFFSET_ANY); 1558 if_deactivate(&sc->sc_ethercom.ec_if); 1559 break; 1560 } 1561 splx(s); 1562 1563 return (error); 1564 } 1565 1566 int 1567 ex_detach(sc) 1568 struct ex_softc *sc; 1569 { 1570 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1571 struct ex_rxdesc *rxd; 1572 int i; 1573 1574 /* Succeed now if there's no work to do. */ 1575 if ((sc->ex_flags & EX_FLAGS_ATTACHED) == 0) 1576 return (0); 1577 1578 /* Unhook our tick handler. */ 1579 callout_stop(&sc->ex_mii_callout); 1580 1581 if (sc->ex_conf & EX_CONF_MII) { 1582 /* Detach all PHYs */ 1583 mii_detach(&sc->ex_mii, MII_PHY_ANY, MII_OFFSET_ANY); 1584 } 1585 1586 /* Delete all remaining media. */ 1587 ifmedia_delete_instance(&sc->ex_mii.mii_media, IFM_INST_ANY); 1588 1589 #if NRND > 0 1590 rnd_detach_source(&sc->rnd_source); 1591 #endif 1592 ether_ifdetach(ifp); 1593 if_detach(ifp); 1594 1595 for (i = 0; i < EX_NUPD; i++) { 1596 rxd = &sc->sc_rxdescs[i]; 1597 if (rxd->rx_mbhead != NULL) { 1598 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap); 1599 m_freem(rxd->rx_mbhead); 1600 rxd->rx_mbhead = NULL; 1601 } 1602 } 1603 for (i = 0; i < EX_NUPD; i++) 1604 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]); 1605 for (i = 0; i < EX_NDPD; i++) 1606 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]); 1607 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap); 1608 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap); 1609 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd, 1610 EX_NDPD * sizeof (struct ex_dpd)); 1611 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg); 1612 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap); 1613 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap); 1614 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd, 1615 EX_NUPD * sizeof (struct ex_upd)); 1616 bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg); 1617 1618 shutdownhook_disestablish(sc->sc_sdhook); 1619 powerhook_disestablish(sc->sc_powerhook); 1620 1621 return (0); 1622 } 1623 1624 /* 1625 * Before reboots, reset card completely. 1626 */ 1627 static void 1628 ex_shutdown(arg) 1629 void *arg; 1630 { 1631 struct ex_softc *sc = arg; 1632 1633 ex_stop(&sc->sc_ethercom.ec_if, 1); 1634 } 1635 1636 /* 1637 * Read EEPROM data. 1638 * XXX what to do if EEPROM doesn't unbusy? 1639 */ 1640 u_int16_t 1641 ex_read_eeprom(sc, offset) 1642 struct ex_softc *sc; 1643 int offset; 1644 { 1645 bus_space_tag_t iot = sc->sc_iot; 1646 bus_space_handle_t ioh = sc->sc_ioh; 1647 u_int16_t data = 0, cmd = READ_EEPROM; 1648 int off; 1649 1650 off = sc->ex_conf & EX_CONF_EEPROM_OFF ? 0x30 : 0; 1651 cmd = sc->ex_conf & EX_CONF_EEPROM_8BIT ? READ_EEPROM8 : READ_EEPROM; 1652 1653 GO_WINDOW(0); 1654 if (ex_eeprom_busy(sc)) 1655 goto out; 1656 bus_space_write_2(iot, ioh, ELINK_W0_EEPROM_COMMAND, 1657 cmd | (off + (offset & 0x3f))); 1658 if (ex_eeprom_busy(sc)) 1659 goto out; 1660 data = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_DATA); 1661 out: 1662 return data; 1663 } 1664 1665 static int 1666 ex_eeprom_busy(sc) 1667 struct ex_softc *sc; 1668 { 1669 bus_space_tag_t iot = sc->sc_iot; 1670 bus_space_handle_t ioh = sc->sc_ioh; 1671 int i = 100; 1672 1673 while (i--) { 1674 if (!(bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND) & 1675 EEPROM_BUSY)) 1676 return 0; 1677 delay(100); 1678 } 1679 printf("\n%s: eeprom stays busy.\n", sc->sc_dev.dv_xname); 1680 return (1); 1681 } 1682 1683 /* 1684 * Create a new rx buffer and add it to the 'soft' rx list. 1685 */ 1686 static int 1687 ex_add_rxbuf(sc, rxd) 1688 struct ex_softc *sc; 1689 struct ex_rxdesc *rxd; 1690 { 1691 struct mbuf *m, *oldm; 1692 bus_dmamap_t rxmap; 1693 int error, rval = 0; 1694 1695 oldm = rxd->rx_mbhead; 1696 rxmap = rxd->rx_dmamap; 1697 1698 MGETHDR(m, M_DONTWAIT, MT_DATA); 1699 if (m != NULL) { 1700 MCLGET(m, M_DONTWAIT); 1701 if ((m->m_flags & M_EXT) == 0) { 1702 m_freem(m); 1703 if (oldm == NULL) 1704 return 1; 1705 m = oldm; 1706 m->m_data = m->m_ext.ext_buf; 1707 rval = 1; 1708 } 1709 } else { 1710 if (oldm == NULL) 1711 return 1; 1712 m = oldm; 1713 m->m_data = m->m_ext.ext_buf; 1714 rval = 1; 1715 } 1716 1717 /* 1718 * Setup the DMA map for this receive buffer. 1719 */ 1720 if (m != oldm) { 1721 if (oldm != NULL) 1722 bus_dmamap_unload(sc->sc_dmat, rxmap); 1723 error = bus_dmamap_load(sc->sc_dmat, rxmap, 1724 m->m_ext.ext_buf, MCLBYTES, NULL, 1725 BUS_DMA_READ|BUS_DMA_NOWAIT); 1726 if (error) { 1727 printf("%s: can't load rx buffer, error = %d\n", 1728 sc->sc_dev.dv_xname, error); 1729 panic("ex_add_rxbuf"); /* XXX */ 1730 } 1731 } 1732 1733 /* 1734 * Align for data after 14 byte header. 1735 */ 1736 m->m_data += 2; 1737 1738 rxd->rx_mbhead = m; 1739 rxd->rx_upd->upd_pktstatus = htole32(MCLBYTES - 2); 1740 rxd->rx_upd->upd_frags[0].fr_addr = 1741 htole32(rxmap->dm_segs[0].ds_addr + 2); 1742 rxd->rx_upd->upd_nextptr = 0; 1743 1744 /* 1745 * Attach it to the end of the list. 1746 */ 1747 if (sc->rx_head != NULL) { 1748 sc->rx_tail->rx_next = rxd; 1749 sc->rx_tail->rx_upd->upd_nextptr = htole32(sc->sc_upddma + 1750 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd)); 1751 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1752 (caddr_t)sc->rx_tail->rx_upd - (caddr_t)sc->sc_upd, 1753 sizeof (struct ex_upd), 1754 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1755 } else { 1756 sc->rx_head = rxd; 1757 } 1758 sc->rx_tail = rxd; 1759 1760 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, rxmap->dm_mapsize, 1761 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1762 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1763 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd), 1764 sizeof (struct ex_upd), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1765 return (rval); 1766 } 1767 1768 u_int32_t 1769 ex_mii_bitbang_read(self) 1770 struct device *self; 1771 { 1772 struct ex_softc *sc = (void *) self; 1773 1774 /* We're already in Window 4. */ 1775 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT)); 1776 } 1777 1778 void 1779 ex_mii_bitbang_write(self, val) 1780 struct device *self; 1781 u_int32_t val; 1782 { 1783 struct ex_softc *sc = (void *) self; 1784 1785 /* We're already in Window 4. */ 1786 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT, val); 1787 } 1788 1789 int 1790 ex_mii_readreg(v, phy, reg) 1791 struct device *v; 1792 int phy, reg; 1793 { 1794 struct ex_softc *sc = (struct ex_softc *)v; 1795 int val; 1796 1797 if ((sc->ex_conf & EX_CONF_INTPHY) && phy != ELINK_INTPHY_ID) 1798 return 0; 1799 1800 GO_WINDOW(4); 1801 1802 val = mii_bitbang_readreg(v, &ex_mii_bitbang_ops, phy, reg); 1803 1804 GO_WINDOW(1); 1805 1806 return (val); 1807 } 1808 1809 void 1810 ex_mii_writereg(v, phy, reg, data) 1811 struct device *v; 1812 int phy; 1813 int reg; 1814 int data; 1815 { 1816 struct ex_softc *sc = (struct ex_softc *)v; 1817 1818 GO_WINDOW(4); 1819 1820 mii_bitbang_writereg(v, &ex_mii_bitbang_ops, phy, reg, data); 1821 1822 GO_WINDOW(1); 1823 } 1824 1825 void 1826 ex_mii_statchg(v) 1827 struct device *v; 1828 { 1829 struct ex_softc *sc = (struct ex_softc *)v; 1830 bus_space_tag_t iot = sc->sc_iot; 1831 bus_space_handle_t ioh = sc->sc_ioh; 1832 int mctl; 1833 1834 GO_WINDOW(3); 1835 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1836 if (sc->ex_mii.mii_media_active & IFM_FDX) 1837 mctl |= MAC_CONTROL_FDX; 1838 else 1839 mctl &= ~MAC_CONTROL_FDX; 1840 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1841 GO_WINDOW(1); /* back to operating window */ 1842 } 1843 1844 int 1845 ex_enable(sc) 1846 struct ex_softc *sc; 1847 { 1848 if (sc->enabled == 0 && sc->enable != NULL) { 1849 if ((*sc->enable)(sc) != 0) { 1850 printf("%s: de/vice enable failed\n", 1851 sc->sc_dev.dv_xname); 1852 return (EIO); 1853 } 1854 sc->enabled = 1; 1855 } 1856 return (0); 1857 } 1858 1859 void 1860 ex_disable(sc) 1861 struct ex_softc *sc; 1862 { 1863 if (sc->enabled == 1 && sc->disable != NULL) { 1864 (*sc->disable)(sc); 1865 sc->enabled = 0; 1866 } 1867 } 1868 1869 void 1870 ex_power(why, arg) 1871 int why; 1872 void *arg; 1873 { 1874 struct ex_softc *sc = (void *)arg; 1875 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1876 int s; 1877 1878 s = splnet(); 1879 switch (why) { 1880 case PWR_SUSPEND: 1881 case PWR_STANDBY: 1882 ex_stop(ifp, 0); 1883 if (sc->power != NULL) 1884 (*sc->power)(sc, why); 1885 break; 1886 case PWR_RESUME: 1887 if (ifp->if_flags & IFF_UP) { 1888 if (sc->power != NULL) 1889 (*sc->power)(sc, why); 1890 ex_init(ifp); 1891 } 1892 break; 1893 case PWR_SOFTSUSPEND: 1894 case PWR_SOFTSTANDBY: 1895 case PWR_SOFTRESUME: 1896 break; 1897 } 1898 splx(s); 1899 } 1900
Indexes created Tue Oct 21 08:09:48 GMT 2025