elinkxl.c revision 1.65
1 /* $NetBSD: elinkxl.c,v 1.65 2002/07/01 16:16:37 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Frank van der Linden. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: elinkxl.c,v 1.65 2002/07/01 16:16:37 thorpej Exp $"); 41 42 #include "bpfilter.h" 43 #include "rnd.h" 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/callout.h> 48 #include <sys/kernel.h> 49 #include <sys/mbuf.h> 50 #include <sys/socket.h> 51 #include <sys/ioctl.h> 52 #include <sys/errno.h> 53 #include <sys/syslog.h> 54 #include <sys/select.h> 55 #include <sys/device.h> 56 #if NRND > 0 57 #include <sys/rnd.h> 58 #endif 59 60 #include <uvm/uvm_extern.h> 61 62 #include <net/if.h> 63 #include <net/if_dl.h> 64 #include <net/if_ether.h> 65 #include <net/if_media.h> 66 67 #if NBPFILTER > 0 68 #include <net/bpf.h> 69 #include <net/bpfdesc.h> 70 #endif 71 72 #include <machine/cpu.h> 73 #include <machine/bus.h> 74 #include <machine/intr.h> 75 #include <machine/endian.h> 76 77 #include <dev/mii/miivar.h> 78 #include <dev/mii/mii.h> 79 #include <dev/mii/mii_bitbang.h> 80 81 #include <dev/ic/elink3reg.h> 82 /* #include <dev/ic/elink3var.h> */ 83 #include <dev/ic/elinkxlreg.h> 84 #include <dev/ic/elinkxlvar.h> 85 86 #ifdef DEBUG 87 int exdebug = 0; 88 #endif 89 90 /* ifmedia callbacks */ 91 int ex_media_chg __P((struct ifnet *ifp)); 92 void ex_media_stat __P((struct ifnet *ifp, struct ifmediareq *req)); 93 94 void ex_probe_media __P((struct ex_softc *)); 95 void ex_set_filter __P((struct ex_softc *)); 96 void ex_set_media __P((struct ex_softc *)); 97 struct mbuf *ex_get __P((struct ex_softc *, int)); 98 u_int16_t ex_read_eeprom __P((struct ex_softc *, int)); 99 int ex_init __P((struct ifnet *)); 100 void ex_read __P((struct ex_softc *)); 101 void ex_reset __P((struct ex_softc *)); 102 void ex_set_mc __P((struct ex_softc *)); 103 void ex_getstats __P((struct ex_softc *)); 104 void ex_printstats __P((struct ex_softc *)); 105 void ex_tick __P((void *)); 106 107 void ex_power __P((int, void *)); 108 109 static int ex_eeprom_busy __P((struct ex_softc *)); 110 static int ex_add_rxbuf __P((struct ex_softc *, struct ex_rxdesc *)); 111 static void ex_init_txdescs __P((struct ex_softc *)); 112 113 static void ex_shutdown __P((void *)); 114 static void ex_start __P((struct ifnet *)); 115 static void ex_txstat __P((struct ex_softc *)); 116 117 int ex_mii_readreg __P((struct device *, int, int)); 118 void ex_mii_writereg __P((struct device *, int, int, int)); 119 void ex_mii_statchg __P((struct device *)); 120 121 void ex_probemedia __P((struct ex_softc *)); 122 123 /* 124 * Structure to map media-present bits in boards to ifmedia codes and 125 * printable media names. Used for table-driven ifmedia initialization. 126 */ 127 struct ex_media { 128 int exm_mpbit; /* media present bit */ 129 const char *exm_name; /* name of medium */ 130 int exm_ifmedia; /* ifmedia word for medium */ 131 int exm_epmedia; /* ELINKMEDIA_* constant */ 132 }; 133 134 /* 135 * Media table for 3c90x chips. Note that chips with MII have no 136 * `native' media. 137 */ 138 struct ex_media ex_native_media[] = { 139 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 140 ELINKMEDIA_10BASE_T }, 141 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 142 ELINKMEDIA_10BASE_T }, 143 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 144 ELINKMEDIA_AUI }, 145 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 146 ELINKMEDIA_10BASE_2 }, 147 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 148 ELINKMEDIA_100BASE_TX }, 149 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 150 ELINKMEDIA_100BASE_TX }, 151 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 152 ELINKMEDIA_100BASE_FX }, 153 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 154 ELINKMEDIA_MII }, 155 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 156 ELINKMEDIA_100BASE_T4 }, 157 { 0, NULL, 0, 158 0 }, 159 }; 160 161 /* 162 * MII bit-bang glue. 163 */ 164 u_int32_t ex_mii_bitbang_read __P((struct device *)); 165 void ex_mii_bitbang_write __P((struct device *, u_int32_t)); 166 167 const struct mii_bitbang_ops ex_mii_bitbang_ops = { 168 ex_mii_bitbang_read, 169 ex_mii_bitbang_write, 170 { 171 ELINK_PHY_DATA, /* MII_BIT_MDO */ 172 ELINK_PHY_DATA, /* MII_BIT_MDI */ 173 ELINK_PHY_CLK, /* MII_BIT_MDC */ 174 ELINK_PHY_DIR, /* MII_BIT_DIR_HOST_PHY */ 175 0, /* MII_BIT_DIR_PHY_HOST */ 176 } 177 }; 178 179 /* 180 * Back-end attach and configure. 181 */ 182 void 183 ex_config(sc) 184 struct ex_softc *sc; 185 { 186 struct ifnet *ifp; 187 u_int16_t val; 188 u_int8_t macaddr[ETHER_ADDR_LEN] = {0}; 189 bus_space_tag_t iot = sc->sc_iot; 190 bus_space_handle_t ioh = sc->sc_ioh; 191 int i, error, attach_stage; 192 193 callout_init(&sc->ex_mii_callout); 194 195 ex_reset(sc); 196 197 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR0); 198 macaddr[0] = val >> 8; 199 macaddr[1] = val & 0xff; 200 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR1); 201 macaddr[2] = val >> 8; 202 macaddr[3] = val & 0xff; 203 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR2); 204 macaddr[4] = val >> 8; 205 macaddr[5] = val & 0xff; 206 207 printf("%s: MAC address %s\n", sc->sc_dev.dv_xname, 208 ether_sprintf(macaddr)); 209 210 if (sc->ex_conf & (EX_CONF_INV_LED_POLARITY|EX_CONF_PHY_POWER)) { 211 GO_WINDOW(2); 212 val = bus_space_read_2(iot, ioh, ELINK_W2_RESET_OPTIONS); 213 if (sc->ex_conf & EX_CONF_INV_LED_POLARITY) 214 val |= ELINK_RESET_OPT_LEDPOLAR; 215 if (sc->ex_conf & EX_CONF_PHY_POWER) 216 val |= ELINK_RESET_OPT_PHYPOWER; 217 bus_space_write_2(iot, ioh, ELINK_W2_RESET_OPTIONS, val); 218 } 219 220 attach_stage = 0; 221 222 /* 223 * Allocate the upload descriptors, and create and load the DMA 224 * map for them. 225 */ 226 if ((error = bus_dmamem_alloc(sc->sc_dmat, 227 EX_NUPD * sizeof (struct ex_upd), PAGE_SIZE, 0, &sc->sc_useg, 1, 228 &sc->sc_urseg, BUS_DMA_NOWAIT)) != 0) { 229 printf("%s: can't allocate upload descriptors, error = %d\n", 230 sc->sc_dev.dv_xname, error); 231 goto fail; 232 } 233 234 attach_stage = 1; 235 236 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg, 237 EX_NUPD * sizeof (struct ex_upd), (caddr_t *)&sc->sc_upd, 238 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 239 printf("%s: can't map upload descriptors, error = %d\n", 240 sc->sc_dev.dv_xname, error); 241 goto fail; 242 } 243 244 attach_stage = 2; 245 246 if ((error = bus_dmamap_create(sc->sc_dmat, 247 EX_NUPD * sizeof (struct ex_upd), 1, 248 EX_NUPD * sizeof (struct ex_upd), 0, BUS_DMA_NOWAIT, 249 &sc->sc_upd_dmamap)) != 0) { 250 printf("%s: can't create upload desc. DMA map, error = %d\n", 251 sc->sc_dev.dv_xname, error); 252 goto fail; 253 } 254 255 attach_stage = 3; 256 257 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_upd_dmamap, 258 sc->sc_upd, EX_NUPD * sizeof (struct ex_upd), NULL, 259 BUS_DMA_NOWAIT)) != 0) { 260 printf("%s: can't load upload desc. DMA map, error = %d\n", 261 sc->sc_dev.dv_xname, error); 262 goto fail; 263 } 264 265 attach_stage = 4; 266 267 /* 268 * Allocate the download descriptors, and create and load the DMA 269 * map for them. 270 */ 271 if ((error = bus_dmamem_alloc(sc->sc_dmat, 272 EX_NDPD * sizeof (struct ex_dpd), PAGE_SIZE, 0, &sc->sc_dseg, 1, 273 &sc->sc_drseg, BUS_DMA_NOWAIT)) != 0) { 274 printf("%s: can't allocate download descriptors, error = %d\n", 275 sc->sc_dev.dv_xname, error); 276 goto fail; 277 } 278 279 attach_stage = 5; 280 281 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg, 282 EX_NDPD * sizeof (struct ex_dpd), (caddr_t *)&sc->sc_dpd, 283 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 284 printf("%s: can't map download descriptors, error = %d\n", 285 sc->sc_dev.dv_xname, error); 286 goto fail; 287 } 288 memset(sc->sc_dpd, 0, EX_NDPD * sizeof (struct ex_dpd)); 289 290 attach_stage = 6; 291 292 if ((error = bus_dmamap_create(sc->sc_dmat, 293 EX_NDPD * sizeof (struct ex_dpd), 1, 294 EX_NDPD * sizeof (struct ex_dpd), 0, BUS_DMA_NOWAIT, 295 &sc->sc_dpd_dmamap)) != 0) { 296 printf("%s: can't create download desc. DMA map, error = %d\n", 297 sc->sc_dev.dv_xname, error); 298 goto fail; 299 } 300 301 attach_stage = 7; 302 303 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dpd_dmamap, 304 sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd), NULL, 305 BUS_DMA_NOWAIT)) != 0) { 306 printf("%s: can't load download desc. DMA map, error = %d\n", 307 sc->sc_dev.dv_xname, error); 308 goto fail; 309 } 310 311 attach_stage = 8; 312 313 314 /* 315 * Create the transmit buffer DMA maps. 316 */ 317 for (i = 0; i < EX_NDPD; i++) { 318 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 319 EX_NTFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 320 &sc->sc_tx_dmamaps[i])) != 0) { 321 printf("%s: can't create tx DMA map %d, error = %d\n", 322 sc->sc_dev.dv_xname, i, error); 323 goto fail; 324 } 325 } 326 327 attach_stage = 9; 328 329 /* 330 * Create the receive buffer DMA maps. 331 */ 332 for (i = 0; i < EX_NUPD; i++) { 333 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 334 EX_NRFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 335 &sc->sc_rx_dmamaps[i])) != 0) { 336 printf("%s: can't create rx DMA map %d, error = %d\n", 337 sc->sc_dev.dv_xname, i, error); 338 goto fail; 339 } 340 } 341 342 attach_stage = 10; 343 344 /* 345 * Create ring of upload descriptors, only once. The DMA engine 346 * will loop over this when receiving packets, stalling if it 347 * hits an UPD with a finished receive. 348 */ 349 for (i = 0; i < EX_NUPD; i++) { 350 sc->sc_rxdescs[i].rx_dmamap = sc->sc_rx_dmamaps[i]; 351 sc->sc_rxdescs[i].rx_upd = &sc->sc_upd[i]; 352 sc->sc_upd[i].upd_frags[0].fr_len = 353 htole32((MCLBYTES - 2) | EX_FR_LAST); 354 if (ex_add_rxbuf(sc, &sc->sc_rxdescs[i]) != 0) { 355 printf("%s: can't allocate or map rx buffers\n", 356 sc->sc_dev.dv_xname); 357 goto fail; 358 } 359 } 360 361 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 0, 362 EX_NUPD * sizeof (struct ex_upd), 363 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 364 365 ex_init_txdescs(sc); 366 367 attach_stage = 11; 368 369 370 GO_WINDOW(3); 371 val = bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS); 372 if (val & ELINK_MEDIACAP_MII) 373 sc->ex_conf |= EX_CONF_MII; 374 375 ifp = &sc->sc_ethercom.ec_if; 376 377 /* 378 * Initialize our media structures and MII info. We'll 379 * probe the MII if we discover that we have one. 380 */ 381 sc->ex_mii.mii_ifp = ifp; 382 sc->ex_mii.mii_readreg = ex_mii_readreg; 383 sc->ex_mii.mii_writereg = ex_mii_writereg; 384 sc->ex_mii.mii_statchg = ex_mii_statchg; 385 ifmedia_init(&sc->ex_mii.mii_media, 0, ex_media_chg, 386 ex_media_stat); 387 388 if (sc->ex_conf & EX_CONF_MII) { 389 /* 390 * Find PHY, extract media information from it. 391 * First, select the right transceiver. 392 */ 393 u_int32_t icfg; 394 395 GO_WINDOW(3); 396 icfg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 397 icfg &= ~(CONFIG_XCVR_SEL << 16); 398 if (val & (ELINK_MEDIACAP_MII | ELINK_MEDIACAP_100BASET4)) 399 icfg |= ELINKMEDIA_MII << (CONFIG_XCVR_SEL_SHIFT + 16); 400 if (val & ELINK_MEDIACAP_100BASETX) 401 icfg |= ELINKMEDIA_AUTO << (CONFIG_XCVR_SEL_SHIFT + 16); 402 if (val & ELINK_MEDIACAP_100BASEFX) 403 icfg |= ELINKMEDIA_100BASE_FX 404 << (CONFIG_XCVR_SEL_SHIFT + 16); 405 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, icfg); 406 407 mii_attach(&sc->sc_dev, &sc->ex_mii, 0xffffffff, 408 MII_PHY_ANY, MII_OFFSET_ANY, 0); 409 if (LIST_FIRST(&sc->ex_mii.mii_phys) == NULL) { 410 ifmedia_add(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE, 411 0, NULL); 412 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE); 413 } else { 414 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_AUTO); 415 } 416 } else 417 ex_probemedia(sc); 418 419 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 420 ifp->if_softc = sc; 421 ifp->if_start = ex_start; 422 ifp->if_ioctl = ex_ioctl; 423 ifp->if_watchdog = ex_watchdog; 424 ifp->if_init = ex_init; 425 ifp->if_stop = ex_stop; 426 ifp->if_flags = 427 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 428 IFQ_SET_READY(&ifp->if_snd); 429 430 /* 431 * We can support 802.1Q VLAN-sized frames. 432 */ 433 sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU; 434 435 /* 436 * The 3c90xB has hardware IPv4/TCPv4/UDPv4 checksum support. 437 */ 438 if (sc->ex_conf & EX_CONF_90XB) 439 sc->sc_ethercom.ec_if.if_capabilities |= IFCAP_CSUM_IPv4 | 440 IFCAP_CSUM_TCPv4 | IFCAP_CSUM_UDPv4; 441 442 if_attach(ifp); 443 ether_ifattach(ifp, macaddr); 444 445 GO_WINDOW(1); 446 447 sc->tx_start_thresh = 20; 448 sc->tx_succ_ok = 0; 449 450 /* TODO: set queues to 0 */ 451 452 #if NRND > 0 453 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 454 RND_TYPE_NET, 0); 455 #endif 456 457 /* Establish callback to reset card when we reboot. */ 458 sc->sc_sdhook = shutdownhook_establish(ex_shutdown, sc); 459 if (sc->sc_sdhook == NULL) 460 printf("%s: WARNING: unable to establish shutdown hook\n", 461 sc->sc_dev.dv_xname); 462 463 /* Add a suspend hook to make sure we come back up after a resume. */ 464 sc->sc_powerhook = powerhook_establish(ex_power, sc); 465 if (sc->sc_powerhook == NULL) 466 printf("%s: WARNING: unable to establish power hook\n", 467 sc->sc_dev.dv_xname); 468 469 /* The attach is successful. */ 470 sc->ex_flags |= EX_FLAGS_ATTACHED; 471 return; 472 473 fail: 474 /* 475 * Free any resources we've allocated during the failed attach 476 * attempt. Do this in reverse order and fall though. 477 */ 478 switch (attach_stage) { 479 case 11: 480 { 481 struct ex_rxdesc *rxd; 482 483 for (i = 0; i < EX_NUPD; i++) { 484 rxd = &sc->sc_rxdescs[i]; 485 if (rxd->rx_mbhead != NULL) { 486 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap); 487 m_freem(rxd->rx_mbhead); 488 } 489 } 490 } 491 /* FALLTHROUGH */ 492 493 case 10: 494 for (i = 0; i < EX_NUPD; i++) 495 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]); 496 /* FALLTHROUGH */ 497 498 case 9: 499 for (i = 0; i < EX_NDPD; i++) 500 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]); 501 /* FALLTHROUGH */ 502 case 8: 503 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap); 504 /* FALLTHROUGH */ 505 506 case 7: 507 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap); 508 /* FALLTHROUGH */ 509 510 case 6: 511 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd, 512 EX_NDPD * sizeof (struct ex_dpd)); 513 /* FALLTHROUGH */ 514 515 case 5: 516 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg); 517 break; 518 519 case 4: 520 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap); 521 /* FALLTHROUGH */ 522 523 case 3: 524 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap); 525 /* FALLTHROUGH */ 526 527 case 2: 528 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd, 529 EX_NUPD * sizeof (struct ex_upd)); 530 /* FALLTHROUGH */ 531 532 case 1: 533 bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg); 534 break; 535 } 536 537 } 538 539 /* 540 * Find the media present on non-MII chips. 541 */ 542 void 543 ex_probemedia(sc) 544 struct ex_softc *sc; 545 { 546 bus_space_tag_t iot = sc->sc_iot; 547 bus_space_handle_t ioh = sc->sc_ioh; 548 struct ifmedia *ifm = &sc->ex_mii.mii_media; 549 struct ex_media *exm; 550 u_int16_t config1, reset_options, default_media; 551 int defmedia = 0; 552 const char *sep = "", *defmedianame = NULL; 553 554 GO_WINDOW(3); 555 config1 = bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2); 556 reset_options = bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 557 GO_WINDOW(0); 558 559 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 560 561 printf("%s: ", sc->sc_dev.dv_xname); 562 563 /* Sanity check that there are any media! */ 564 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 565 printf("no media present!\n"); 566 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 567 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 568 return; 569 } 570 571 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 572 573 for (exm = ex_native_media; exm->exm_name != NULL; exm++) { 574 if (reset_options & exm->exm_mpbit) { 575 /* 576 * Default media is a little complicated. We 577 * support full-duplex which uses the same 578 * reset options bit. 579 * 580 * XXX Check EEPROM for default to FDX? 581 */ 582 if (exm->exm_epmedia == default_media) { 583 if ((exm->exm_ifmedia & IFM_FDX) == 0) { 584 defmedia = exm->exm_ifmedia; 585 defmedianame = exm->exm_name; 586 } 587 } else if (defmedia == 0) { 588 defmedia = exm->exm_ifmedia; 589 defmedianame = exm->exm_name; 590 } 591 ifmedia_add(ifm, exm->exm_ifmedia, exm->exm_epmedia, 592 NULL); 593 PRINT(exm->exm_name); 594 } 595 } 596 597 #undef PRINT 598 599 #ifdef DIAGNOSTIC 600 if (defmedia == 0) 601 panic("ex_probemedia: impossible"); 602 #endif 603 604 printf(", default %s\n", defmedianame); 605 ifmedia_set(ifm, defmedia); 606 } 607 608 /* 609 * Bring device up. 610 */ 611 int 612 ex_init(ifp) 613 struct ifnet *ifp; 614 { 615 struct ex_softc *sc = ifp->if_softc; 616 bus_space_tag_t iot = sc->sc_iot; 617 bus_space_handle_t ioh = sc->sc_ioh; 618 int i; 619 int error = 0; 620 621 if ((error = ex_enable(sc)) != 0) 622 goto out; 623 624 ex_waitcmd(sc); 625 ex_stop(ifp, 0); 626 627 /* 628 * Set the station address and clear the station mask. The latter 629 * is needed for 90x cards, 0 is the default for 90xB cards. 630 */ 631 GO_WINDOW(2); 632 for (i = 0; i < ETHER_ADDR_LEN; i++) { 633 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 634 LLADDR(ifp->if_sadl)[i]); 635 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 636 } 637 638 GO_WINDOW(3); 639 640 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_RESET); 641 ex_waitcmd(sc); 642 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_RESET); 643 ex_waitcmd(sc); 644 645 /* 646 * Disable reclaim threshold for 90xB, set free threshold to 647 * 6 * 256 = 1536 for 90x. 648 */ 649 if (sc->ex_conf & EX_CONF_90XB) 650 bus_space_write_2(iot, ioh, ELINK_COMMAND, 651 ELINK_TXRECLTHRESH | 255); 652 else 653 bus_space_write_1(iot, ioh, ELINK_TXFREETHRESH, 6); 654 655 bus_space_write_2(iot, ioh, ELINK_COMMAND, 656 SET_RX_EARLY_THRESH | ELINK_THRESH_DISABLE); 657 658 bus_space_write_4(iot, ioh, ELINK_DMACTRL, 659 bus_space_read_4(iot, ioh, ELINK_DMACTRL) | ELINK_DMAC_UPRXEAREN); 660 661 bus_space_write_2(iot, ioh, ELINK_COMMAND, 662 SET_RD_0_MASK | XL_WATCHED_INTERRUPTS); 663 bus_space_write_2(iot, ioh, ELINK_COMMAND, 664 SET_INTR_MASK | XL_WATCHED_INTERRUPTS); 665 666 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 667 if (sc->intr_ack) 668 (* sc->intr_ack)(sc); 669 ex_set_media(sc); 670 ex_set_mc(sc); 671 672 673 bus_space_write_2(iot, ioh, ELINK_COMMAND, STATS_ENABLE); 674 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 675 bus_space_write_4(iot, ioh, ELINK_UPLISTPTR, sc->sc_upddma); 676 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 677 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_UPUNSTALL); 678 679 if (sc->ex_conf & (EX_CONF_PHY_POWER | EX_CONF_INV_LED_POLARITY)) { 680 u_int16_t cbcard_config; 681 682 GO_WINDOW(2); 683 cbcard_config = bus_space_read_2(sc->sc_iot, sc->sc_ioh, 0x0c); 684 if (sc->ex_conf & EX_CONF_PHY_POWER) { 685 cbcard_config |= 0x4000; /* turn on PHY power */ 686 } 687 if (sc->ex_conf & EX_CONF_INV_LED_POLARITY) { 688 cbcard_config |= 0x0010; /* invert LED polarity */ 689 } 690 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 0x0c, cbcard_config); 691 692 GO_WINDOW(3); 693 } 694 695 ifp->if_flags |= IFF_RUNNING; 696 ifp->if_flags &= ~IFF_OACTIVE; 697 ex_start(ifp); 698 699 GO_WINDOW(1); 700 701 callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc); 702 703 out: 704 if (error) { 705 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 706 ifp->if_timer = 0; 707 printf("%s: interface not running\n", sc->sc_dev.dv_xname); 708 } 709 return (error); 710 } 711 712 #define ex_mchash(addr) (ether_crc32_be((addr), ETHER_ADDR_LEN) & 0xff) 713 714 /* 715 * Set multicast receive filter. Also take care of promiscuous mode 716 * here (XXX). 717 */ 718 void 719 ex_set_mc(sc) 720 struct ex_softc *sc; 721 { 722 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 723 struct ethercom *ec = &sc->sc_ethercom; 724 struct ether_multi *enm; 725 struct ether_multistep estep; 726 int i; 727 u_int16_t mask = FIL_INDIVIDUAL | FIL_BRDCST; 728 729 if (ifp->if_flags & IFF_PROMISC) 730 mask |= FIL_PROMISC; 731 732 if (!(ifp->if_flags & IFF_MULTICAST)) 733 goto out; 734 735 if (!(sc->ex_conf & EX_CONF_90XB) || ifp->if_flags & IFF_ALLMULTI) { 736 mask |= (ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0; 737 } else { 738 ETHER_FIRST_MULTI(estep, ec, enm); 739 while (enm != NULL) { 740 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 741 ETHER_ADDR_LEN) != 0) 742 goto out; 743 i = ex_mchash(enm->enm_addrlo); 744 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 745 ELINK_COMMAND, ELINK_SETHASHFILBIT | i); 746 ETHER_NEXT_MULTI(estep, enm); 747 } 748 mask |= FIL_MULTIHASH; 749 } 750 out: 751 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 752 SET_RX_FILTER | mask); 753 } 754 755 756 static void 757 ex_txstat(sc) 758 struct ex_softc *sc; 759 { 760 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 761 bus_space_tag_t iot = sc->sc_iot; 762 bus_space_handle_t ioh = sc->sc_ioh; 763 int i; 764 765 /* 766 * We need to read+write TX_STATUS until we get a 0 status 767 * in order to turn off the interrupt flag. 768 */ 769 while ((i = bus_space_read_1(iot, ioh, ELINK_TXSTATUS)) & TXS_COMPLETE) { 770 bus_space_write_1(iot, ioh, ELINK_TXSTATUS, 0x0); 771 772 if (i & TXS_JABBER) { 773 ++sc->sc_ethercom.ec_if.if_oerrors; 774 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 775 printf("%s: jabber (%x)\n", 776 sc->sc_dev.dv_xname, i); 777 ex_init(ifp); 778 /* TODO: be more subtle here */ 779 } else if (i & TXS_UNDERRUN) { 780 ++sc->sc_ethercom.ec_if.if_oerrors; 781 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 782 printf("%s: fifo underrun (%x) @%d\n", 783 sc->sc_dev.dv_xname, i, 784 sc->tx_start_thresh); 785 if (sc->tx_succ_ok < 100) 786 sc->tx_start_thresh = min(ETHER_MAX_LEN, 787 sc->tx_start_thresh + 20); 788 sc->tx_succ_ok = 0; 789 ex_init(ifp); 790 /* TODO: be more subtle here */ 791 } else if (i & TXS_MAX_COLLISION) { 792 ++sc->sc_ethercom.ec_if.if_collisions; 793 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 794 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 795 } else 796 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 797 } 798 } 799 800 int 801 ex_media_chg(ifp) 802 struct ifnet *ifp; 803 { 804 805 if (ifp->if_flags & IFF_UP) 806 ex_init(ifp); 807 return 0; 808 } 809 810 void 811 ex_set_media(sc) 812 struct ex_softc *sc; 813 { 814 bus_space_tag_t iot = sc->sc_iot; 815 bus_space_handle_t ioh = sc->sc_ioh; 816 u_int32_t configreg; 817 818 if (((sc->ex_conf & EX_CONF_MII) && 819 (sc->ex_mii.mii_media_active & IFM_FDX)) 820 || (!(sc->ex_conf & EX_CONF_MII) && 821 (sc->ex_mii.mii_media.ifm_media & IFM_FDX))) { 822 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 823 MAC_CONTROL_FDX); 824 } else { 825 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 0); 826 } 827 828 /* 829 * If the device has MII, select it, and then tell the 830 * PHY which media to use. 831 */ 832 if (sc->ex_conf & EX_CONF_MII) { 833 GO_WINDOW(3); 834 835 configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 836 837 configreg &= ~(CONFIG_MEDIAMASK << 16); 838 configreg |= (ELINKMEDIA_MII << (CONFIG_MEDIAMASK_SHIFT + 16)); 839 840 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg); 841 mii_mediachg(&sc->ex_mii); 842 return; 843 } 844 845 GO_WINDOW(4); 846 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0); 847 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 848 delay(800); 849 850 /* 851 * Now turn on the selected media/transceiver. 852 */ 853 switch (IFM_SUBTYPE(sc->ex_mii.mii_media.ifm_cur->ifm_media)) { 854 case IFM_10_T: 855 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 856 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 857 break; 858 859 case IFM_10_2: 860 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 861 DELAY(800); 862 break; 863 864 case IFM_100_TX: 865 case IFM_100_FX: 866 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 867 LINKBEAT_ENABLE); 868 DELAY(800); 869 break; 870 871 case IFM_10_5: 872 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 873 SQE_ENABLE); 874 DELAY(800); 875 break; 876 877 case IFM_MANUAL: 878 break; 879 880 case IFM_NONE: 881 return; 882 883 default: 884 panic("ex_set_media: impossible"); 885 } 886 887 GO_WINDOW(3); 888 configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 889 890 configreg &= ~(CONFIG_MEDIAMASK << 16); 891 configreg |= (sc->ex_mii.mii_media.ifm_cur->ifm_data << 892 (CONFIG_MEDIAMASK_SHIFT + 16)); 893 894 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg); 895 } 896 897 /* 898 * Get currently-selected media from card. 899 * (if_media callback, may be called before interface is brought up). 900 */ 901 void 902 ex_media_stat(ifp, req) 903 struct ifnet *ifp; 904 struct ifmediareq *req; 905 { 906 struct ex_softc *sc = ifp->if_softc; 907 908 if (sc->ex_conf & EX_CONF_MII) { 909 mii_pollstat(&sc->ex_mii); 910 req->ifm_status = sc->ex_mii.mii_media_status; 911 req->ifm_active = sc->ex_mii.mii_media_active; 912 } else { 913 GO_WINDOW(4); 914 req->ifm_status = IFM_AVALID; 915 req->ifm_active = sc->ex_mii.mii_media.ifm_cur->ifm_media; 916 if (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 917 ELINK_W4_MEDIA_TYPE) & LINKBEAT_DETECT) 918 req->ifm_status |= IFM_ACTIVE; 919 GO_WINDOW(1); 920 } 921 } 922 923 924 925 /* 926 * Start outputting on the interface. 927 */ 928 static void 929 ex_start(ifp) 930 struct ifnet *ifp; 931 { 932 struct ex_softc *sc = ifp->if_softc; 933 bus_space_tag_t iot = sc->sc_iot; 934 bus_space_handle_t ioh = sc->sc_ioh; 935 volatile struct ex_fraghdr *fr = NULL; 936 volatile struct ex_dpd *dpd = NULL, *prevdpd = NULL; 937 struct ex_txdesc *txp; 938 struct mbuf *mb_head; 939 bus_dmamap_t dmamap; 940 int offset, totlen, segment, error; 941 u_int32_t csum_flags; 942 943 if (sc->tx_head || sc->tx_free == NULL) 944 return; 945 946 txp = NULL; 947 948 /* 949 * We're finished if there is nothing more to add to the list or if 950 * we're all filled up with buffers to transmit. 951 */ 952 while (sc->tx_free != NULL) { 953 /* 954 * Grab a packet to transmit. 955 */ 956 IFQ_DEQUEUE(&ifp->if_snd, mb_head); 957 if (mb_head == NULL) 958 break; 959 960 /* 961 * Get pointer to next available tx desc. 962 */ 963 txp = sc->tx_free; 964 dmamap = txp->tx_dmamap; 965 966 /* 967 * Go through each of the mbufs in the chain and initialize 968 * the transmit buffer descriptors with the physical address 969 * and size of the mbuf. 970 */ 971 reload: 972 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 973 mb_head, BUS_DMA_WRITE|BUS_DMA_NOWAIT); 974 switch (error) { 975 case 0: 976 /* Success. */ 977 break; 978 979 case EFBIG: 980 { 981 struct mbuf *mn; 982 983 /* 984 * We ran out of segments. We have to recopy this 985 * mbuf chain first. Bail out if we can't get the 986 * new buffers. 987 */ 988 printf("%s: too many segments, ", sc->sc_dev.dv_xname); 989 990 MGETHDR(mn, M_DONTWAIT, MT_DATA); 991 if (mn == NULL) { 992 m_freem(mb_head); 993 printf("aborting\n"); 994 goto out; 995 } 996 if (mb_head->m_pkthdr.len > MHLEN) { 997 MCLGET(mn, M_DONTWAIT); 998 if ((mn->m_flags & M_EXT) == 0) { 999 m_freem(mn); 1000 m_freem(mb_head); 1001 printf("aborting\n"); 1002 goto out; 1003 } 1004 } 1005 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, 1006 mtod(mn, caddr_t)); 1007 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; 1008 m_freem(mb_head); 1009 mb_head = mn; 1010 printf("retrying\n"); 1011 goto reload; 1012 } 1013 1014 default: 1015 /* 1016 * Some other problem; report it. 1017 */ 1018 printf("%s: can't load mbuf chain, error = %d\n", 1019 sc->sc_dev.dv_xname, error); 1020 m_freem(mb_head); 1021 goto out; 1022 } 1023 1024 /* 1025 * remove our tx desc from freelist. 1026 */ 1027 sc->tx_free = txp->tx_next; 1028 txp->tx_next = NULL; 1029 1030 fr = &txp->tx_dpd->dpd_frags[0]; 1031 totlen = 0; 1032 for (segment = 0; segment < dmamap->dm_nsegs; segment++, fr++) { 1033 fr->fr_addr = htole32(dmamap->dm_segs[segment].ds_addr); 1034 fr->fr_len = htole32(dmamap->dm_segs[segment].ds_len); 1035 totlen += dmamap->dm_segs[segment].ds_len; 1036 } 1037 fr--; 1038 fr->fr_len |= htole32(EX_FR_LAST); 1039 txp->tx_mbhead = mb_head; 1040 1041 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 1042 BUS_DMASYNC_PREWRITE); 1043 1044 dpd = txp->tx_dpd; 1045 dpd->dpd_nextptr = 0; 1046 dpd->dpd_fsh = htole32(totlen); 1047 1048 /* Byte-swap constants so compiler can optimize. */ 1049 1050 if (sc->ex_conf & EX_CONF_90XB) { 1051 csum_flags = 0; 1052 1053 if (mb_head->m_pkthdr.csum_flags & M_CSUM_IPv4) 1054 csum_flags |= htole32(EX_DPD_IPCKSUM); 1055 1056 if (mb_head->m_pkthdr.csum_flags & M_CSUM_TCPv4) 1057 csum_flags |= htole32(EX_DPD_TCPCKSUM); 1058 else if (mb_head->m_pkthdr.csum_flags & M_CSUM_UDPv4) 1059 csum_flags |= htole32(EX_DPD_UDPCKSUM); 1060 1061 dpd->dpd_fsh |= csum_flags; 1062 } else { 1063 KDASSERT((mb_head->m_pkthdr.csum_flags & 1064 (M_CSUM_IPv4|M_CSUM_TCPv4|M_CSUM_UDPv4)) == 0); 1065 } 1066 1067 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1068 ((caddr_t)dpd - (caddr_t)sc->sc_dpd), 1069 sizeof (struct ex_dpd), 1070 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1071 1072 /* 1073 * No need to stall the download engine, we know it's 1074 * not busy right now. 1075 * 1076 * Fix up pointers in both the "soft" tx and the physical 1077 * tx list. 1078 */ 1079 if (sc->tx_head != NULL) { 1080 prevdpd = sc->tx_tail->tx_dpd; 1081 offset = ((caddr_t)prevdpd - (caddr_t)sc->sc_dpd); 1082 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1083 offset, sizeof (struct ex_dpd), 1084 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1085 prevdpd->dpd_nextptr = htole32(DPD_DMADDR(sc, txp)); 1086 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1087 offset, sizeof (struct ex_dpd), 1088 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1089 sc->tx_tail->tx_next = txp; 1090 sc->tx_tail = txp; 1091 } else { 1092 sc->tx_tail = sc->tx_head = txp; 1093 } 1094 1095 #if NBPFILTER > 0 1096 /* 1097 * Pass packet to bpf if there is a listener. 1098 */ 1099 if (ifp->if_bpf) 1100 bpf_mtap(ifp->if_bpf, mb_head); 1101 #endif 1102 } 1103 out: 1104 if (sc->tx_head) { 1105 sc->tx_tail->tx_dpd->dpd_fsh |= htole32(EX_DPD_DNIND); 1106 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1107 ((caddr_t)sc->tx_tail->tx_dpd - (caddr_t)sc->sc_dpd), 1108 sizeof (struct ex_dpd), 1109 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1110 ifp->if_flags |= IFF_OACTIVE; 1111 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_DNUNSTALL); 1112 bus_space_write_4(iot, ioh, ELINK_DNLISTPTR, 1113 DPD_DMADDR(sc, sc->tx_head)); 1114 1115 /* trigger watchdog */ 1116 ifp->if_timer = 5; 1117 } 1118 } 1119 1120 1121 int 1122 ex_intr(arg) 1123 void *arg; 1124 { 1125 struct ex_softc *sc = arg; 1126 bus_space_tag_t iot = sc->sc_iot; 1127 bus_space_handle_t ioh = sc->sc_ioh; 1128 u_int16_t stat; 1129 int ret = 0; 1130 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1131 1132 if ((ifp->if_flags & IFF_RUNNING) == 0 || 1133 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1134 return (0); 1135 1136 for (;;) { 1137 stat = bus_space_read_2(iot, ioh, ELINK_STATUS); 1138 1139 if ((stat & XL_WATCHED_INTERRUPTS) == 0) { 1140 if ((stat & INTR_LATCH) == 0) { 1141 #if 0 1142 printf("%s: intr latch cleared\n", 1143 sc->sc_dev.dv_xname); 1144 #endif 1145 break; 1146 } 1147 } 1148 1149 ret = 1; 1150 1151 /* 1152 * Acknowledge interrupts. 1153 */ 1154 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1155 (stat & (XL_WATCHED_INTERRUPTS | INTR_LATCH))); 1156 if (sc->intr_ack) 1157 (*sc->intr_ack)(sc); 1158 1159 if (stat & HOST_ERROR) { 1160 printf("%s: adapter failure (%x)\n", 1161 sc->sc_dev.dv_xname, stat); 1162 ex_reset(sc); 1163 ex_init(ifp); 1164 return 1; 1165 } 1166 if (stat & TX_COMPLETE) { 1167 ex_txstat(sc); 1168 } 1169 if (stat & UPD_STATS) { 1170 ex_getstats(sc); 1171 } 1172 if (stat & DN_COMPLETE) { 1173 struct ex_txdesc *txp, *ptxp = NULL; 1174 bus_dmamap_t txmap; 1175 1176 /* reset watchdog timer, was set in ex_start() */ 1177 ifp->if_timer = 0; 1178 1179 for (txp = sc->tx_head; txp != NULL; 1180 txp = txp->tx_next) { 1181 bus_dmamap_sync(sc->sc_dmat, 1182 sc->sc_dpd_dmamap, 1183 (caddr_t)txp->tx_dpd - (caddr_t)sc->sc_dpd, 1184 sizeof (struct ex_dpd), 1185 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1186 if (txp->tx_mbhead != NULL) { 1187 txmap = txp->tx_dmamap; 1188 bus_dmamap_sync(sc->sc_dmat, txmap, 1189 0, txmap->dm_mapsize, 1190 BUS_DMASYNC_POSTWRITE); 1191 bus_dmamap_unload(sc->sc_dmat, txmap); 1192 m_freem(txp->tx_mbhead); 1193 txp->tx_mbhead = NULL; 1194 } 1195 ptxp = txp; 1196 } 1197 1198 /* 1199 * Move finished tx buffers back to the tx free list. 1200 */ 1201 if (sc->tx_free) { 1202 sc->tx_ftail->tx_next = sc->tx_head; 1203 sc->tx_ftail = ptxp; 1204 } else 1205 sc->tx_ftail = sc->tx_free = sc->tx_head; 1206 1207 sc->tx_head = sc->tx_tail = NULL; 1208 ifp->if_flags &= ~IFF_OACTIVE; 1209 } 1210 1211 if (stat & UP_COMPLETE) { 1212 struct ex_rxdesc *rxd; 1213 struct mbuf *m; 1214 struct ex_upd *upd; 1215 bus_dmamap_t rxmap; 1216 u_int32_t pktstat; 1217 1218 rcvloop: 1219 rxd = sc->rx_head; 1220 rxmap = rxd->rx_dmamap; 1221 m = rxd->rx_mbhead; 1222 upd = rxd->rx_upd; 1223 1224 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, 1225 rxmap->dm_mapsize, 1226 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1227 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1228 ((caddr_t)upd - (caddr_t)sc->sc_upd), 1229 sizeof (struct ex_upd), 1230 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1231 pktstat = le32toh(upd->upd_pktstatus); 1232 1233 if (pktstat & EX_UPD_COMPLETE) { 1234 /* 1235 * Remove first packet from the chain. 1236 */ 1237 sc->rx_head = rxd->rx_next; 1238 rxd->rx_next = NULL; 1239 1240 /* 1241 * Add a new buffer to the receive chain. 1242 * If this fails, the old buffer is recycled 1243 * instead. 1244 */ 1245 if (ex_add_rxbuf(sc, rxd) == 0) { 1246 u_int16_t total_len; 1247 1248 if (pktstat & 1249 ((sc->sc_ethercom.ec_capenable & 1250 ETHERCAP_VLAN_MTU) ? 1251 EX_UPD_ERR_VLAN : EX_UPD_ERR)) { 1252 ifp->if_ierrors++; 1253 m_freem(m); 1254 goto rcvloop; 1255 } 1256 1257 total_len = pktstat & EX_UPD_PKTLENMASK; 1258 if (total_len < 1259 sizeof(struct ether_header)) { 1260 m_freem(m); 1261 goto rcvloop; 1262 } 1263 m->m_pkthdr.rcvif = ifp; 1264 m->m_pkthdr.len = m->m_len = total_len; 1265 #if NBPFILTER > 0 1266 if (ifp->if_bpf) 1267 bpf_mtap(ifp->if_bpf, m); 1268 #endif 1269 /* 1270 * Set the incoming checksum information for the packet. 1271 */ 1272 if ((sc->ex_conf & EX_CONF_90XB) != 0 && 1273 (pktstat & EX_UPD_IPCHECKED) != 0) { 1274 m->m_pkthdr.csum_flags |= M_CSUM_IPv4; 1275 if (pktstat & EX_UPD_IPCKSUMERR) 1276 m->m_pkthdr.csum_flags |= M_CSUM_IPv4_BAD; 1277 if (pktstat & EX_UPD_TCPCHECKED) { 1278 m->m_pkthdr.csum_flags |= M_CSUM_TCPv4; 1279 if (pktstat & EX_UPD_TCPCKSUMERR) 1280 m->m_pkthdr.csum_flags |= 1281 M_CSUM_TCP_UDP_BAD; 1282 } else if (pktstat & EX_UPD_UDPCHECKED) { 1283 m->m_pkthdr.csum_flags |= M_CSUM_UDPv4; 1284 if (pktstat & EX_UPD_UDPCKSUMERR) 1285 m->m_pkthdr.csum_flags |= 1286 M_CSUM_TCP_UDP_BAD; 1287 } 1288 } 1289 (*ifp->if_input)(ifp, m); 1290 } 1291 goto rcvloop; 1292 } 1293 /* 1294 * Just in case we filled up all UPDs and the DMA engine 1295 * stalled. We could be more subtle about this. 1296 */ 1297 if (bus_space_read_4(iot, ioh, ELINK_UPLISTPTR) == 0) { 1298 printf("%s: uplistptr was 0\n", 1299 sc->sc_dev.dv_xname); 1300 ex_init(ifp); 1301 } else if (bus_space_read_4(iot, ioh, ELINK_UPPKTSTATUS) 1302 & 0x2000) { 1303 printf("%s: receive stalled\n", 1304 sc->sc_dev.dv_xname); 1305 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1306 ELINK_UPUNSTALL); 1307 } 1308 } 1309 } 1310 1311 /* no more interrupts */ 1312 if (ret && IFQ_IS_EMPTY(&ifp->if_snd) == 0) 1313 ex_start(ifp); 1314 return ret; 1315 } 1316 1317 int 1318 ex_ioctl(ifp, cmd, data) 1319 struct ifnet *ifp; 1320 u_long cmd; 1321 caddr_t data; 1322 { 1323 struct ex_softc *sc = ifp->if_softc; 1324 struct ifreq *ifr = (struct ifreq *)data; 1325 int s, error; 1326 1327 s = splnet(); 1328 1329 switch (cmd) { 1330 case SIOCSIFMEDIA: 1331 case SIOCGIFMEDIA: 1332 error = ifmedia_ioctl(ifp, ifr, &sc->ex_mii.mii_media, cmd); 1333 break; 1334 1335 default: 1336 error = ether_ioctl(ifp, cmd, data); 1337 if (error == ENETRESET) { 1338 if (sc->enabled) { 1339 /* 1340 * Multicast list has changed; set the hardware filter 1341 * accordingly. 1342 */ 1343 ex_set_mc(sc); 1344 } 1345 error = 0; 1346 } 1347 break; 1348 } 1349 1350 splx(s); 1351 return (error); 1352 } 1353 1354 void 1355 ex_getstats(sc) 1356 struct ex_softc *sc; 1357 { 1358 bus_space_handle_t ioh = sc->sc_ioh; 1359 bus_space_tag_t iot = sc->sc_iot; 1360 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1361 u_int8_t upperok; 1362 1363 GO_WINDOW(6); 1364 upperok = bus_space_read_1(iot, ioh, UPPER_FRAMES_OK); 1365 ifp->if_ipackets += bus_space_read_1(iot, ioh, RX_FRAMES_OK); 1366 ifp->if_ipackets += (upperok & 0x03) << 8; 1367 ifp->if_opackets += bus_space_read_1(iot, ioh, TX_FRAMES_OK); 1368 ifp->if_opackets += (upperok & 0x30) << 4; 1369 ifp->if_ierrors += bus_space_read_1(iot, ioh, RX_OVERRUNS); 1370 ifp->if_collisions += bus_space_read_1(iot, ioh, TX_COLLISIONS); 1371 /* 1372 * There seems to be no way to get the exact number of collisions, 1373 * this is the number that occurred at the very least. 1374 */ 1375 ifp->if_collisions += 2 * bus_space_read_1(iot, ioh, 1376 TX_AFTER_X_COLLISIONS); 1377 /* 1378 * Interface byte counts are counted by ether_input() and 1379 * ether_output(), so don't accumulate them here. Just 1380 * read the NIC counters so they don't generate overflow interrupts. 1381 * Upper byte counters are latched from reading the totals, so 1382 * they don't need to be read if we don't need their values. 1383 */ 1384 bus_space_read_2(iot, ioh, RX_TOTAL_OK); 1385 bus_space_read_2(iot, ioh, TX_TOTAL_OK); 1386 1387 /* 1388 * Clear the following to avoid stats overflow interrupts 1389 */ 1390 bus_space_read_1(iot, ioh, TX_DEFERRALS); 1391 bus_space_read_1(iot, ioh, TX_AFTER_1_COLLISION); 1392 bus_space_read_1(iot, ioh, TX_NO_SQE); 1393 bus_space_read_1(iot, ioh, TX_CD_LOST); 1394 GO_WINDOW(4); 1395 bus_space_read_1(iot, ioh, ELINK_W4_BADSSD); 1396 GO_WINDOW(1); 1397 } 1398 1399 void 1400 ex_printstats(sc) 1401 struct ex_softc *sc; 1402 { 1403 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1404 1405 ex_getstats(sc); 1406 printf("in %llu out %llu ierror %llu oerror %llu ibytes %llu obytes " 1407 "%llu\n", (unsigned long long)ifp->if_ipackets, 1408 (unsigned long long)ifp->if_opackets, 1409 (unsigned long long)ifp->if_ierrors, 1410 (unsigned long long)ifp->if_oerrors, 1411 (unsigned long long)ifp->if_ibytes, 1412 (unsigned long long)ifp->if_obytes); 1413 } 1414 1415 void 1416 ex_tick(arg) 1417 void *arg; 1418 { 1419 struct ex_softc *sc = arg; 1420 int s; 1421 1422 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1423 return; 1424 1425 s = splnet(); 1426 1427 if (sc->ex_conf & EX_CONF_MII) 1428 mii_tick(&sc->ex_mii); 1429 1430 if (!(bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, ELINK_STATUS) 1431 & COMMAND_IN_PROGRESS)) 1432 ex_getstats(sc); 1433 1434 splx(s); 1435 1436 callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc); 1437 } 1438 1439 void 1440 ex_reset(sc) 1441 struct ex_softc *sc; 1442 { 1443 u_int16_t val = GLOBAL_RESET; 1444 1445 if (sc->ex_conf & EX_CONF_RESETHACK) 1446 val |= 0x10; 1447 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, val); 1448 /* 1449 * XXX apparently the command in progress bit can't be trusted 1450 * during a reset, so we just always wait this long. Fortunately 1451 * we normally only reset the chip during autoconfig. 1452 */ 1453 delay(100000); 1454 ex_waitcmd(sc); 1455 } 1456 1457 void 1458 ex_watchdog(ifp) 1459 struct ifnet *ifp; 1460 { 1461 struct ex_softc *sc = ifp->if_softc; 1462 1463 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1464 ++sc->sc_ethercom.ec_if.if_oerrors; 1465 1466 ex_reset(sc); 1467 ex_init(ifp); 1468 } 1469 1470 void 1471 ex_stop(ifp, disable) 1472 struct ifnet *ifp; 1473 int disable; 1474 { 1475 struct ex_softc *sc = ifp->if_softc; 1476 bus_space_tag_t iot = sc->sc_iot; 1477 bus_space_handle_t ioh = sc->sc_ioh; 1478 struct ex_txdesc *tx; 1479 struct ex_rxdesc *rx; 1480 int i; 1481 1482 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1483 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1484 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1485 1486 for (tx = sc->tx_head ; tx != NULL; tx = tx->tx_next) { 1487 if (tx->tx_mbhead == NULL) 1488 continue; 1489 m_freem(tx->tx_mbhead); 1490 tx->tx_mbhead = NULL; 1491 bus_dmamap_unload(sc->sc_dmat, tx->tx_dmamap); 1492 tx->tx_dpd->dpd_fsh = tx->tx_dpd->dpd_nextptr = 0; 1493 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1494 ((caddr_t)tx->tx_dpd - (caddr_t)sc->sc_dpd), 1495 sizeof (struct ex_dpd), 1496 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1497 } 1498 sc->tx_tail = sc->tx_head = NULL; 1499 ex_init_txdescs(sc); 1500 1501 sc->rx_tail = sc->rx_head = 0; 1502 for (i = 0; i < EX_NUPD; i++) { 1503 rx = &sc->sc_rxdescs[i]; 1504 if (rx->rx_mbhead != NULL) { 1505 bus_dmamap_unload(sc->sc_dmat, rx->rx_dmamap); 1506 m_freem(rx->rx_mbhead); 1507 rx->rx_mbhead = NULL; 1508 } 1509 ex_add_rxbuf(sc, rx); 1510 } 1511 1512 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | INTR_LATCH); 1513 1514 callout_stop(&sc->ex_mii_callout); 1515 if (sc->ex_conf & EX_CONF_MII) 1516 mii_down(&sc->ex_mii); 1517 1518 if (disable) 1519 ex_disable(sc); 1520 1521 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1522 ifp->if_timer = 0; 1523 } 1524 1525 static void 1526 ex_init_txdescs(sc) 1527 struct ex_softc *sc; 1528 { 1529 int i; 1530 1531 for (i = 0; i < EX_NDPD; i++) { 1532 sc->sc_txdescs[i].tx_dmamap = sc->sc_tx_dmamaps[i]; 1533 sc->sc_txdescs[i].tx_dpd = &sc->sc_dpd[i]; 1534 if (i < EX_NDPD - 1) 1535 sc->sc_txdescs[i].tx_next = &sc->sc_txdescs[i + 1]; 1536 else 1537 sc->sc_txdescs[i].tx_next = NULL; 1538 } 1539 sc->tx_free = &sc->sc_txdescs[0]; 1540 sc->tx_ftail = &sc->sc_txdescs[EX_NDPD-1]; 1541 } 1542 1543 1544 int 1545 ex_activate(self, act) 1546 struct device *self; 1547 enum devact act; 1548 { 1549 struct ex_softc *sc = (void *) self; 1550 int s, error = 0; 1551 1552 s = splnet(); 1553 switch (act) { 1554 case DVACT_ACTIVATE: 1555 error = EOPNOTSUPP; 1556 break; 1557 1558 case DVACT_DEACTIVATE: 1559 if (sc->ex_conf & EX_CONF_MII) 1560 mii_activate(&sc->ex_mii, act, MII_PHY_ANY, 1561 MII_OFFSET_ANY); 1562 if_deactivate(&sc->sc_ethercom.ec_if); 1563 break; 1564 } 1565 splx(s); 1566 1567 return (error); 1568 } 1569 1570 int 1571 ex_detach(sc) 1572 struct ex_softc *sc; 1573 { 1574 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1575 struct ex_rxdesc *rxd; 1576 int i; 1577 1578 /* Succeed now if there's no work to do. */ 1579 if ((sc->ex_flags & EX_FLAGS_ATTACHED) == 0) 1580 return (0); 1581 1582 /* Unhook our tick handler. */ 1583 callout_stop(&sc->ex_mii_callout); 1584 1585 if (sc->ex_conf & EX_CONF_MII) { 1586 /* Detach all PHYs */ 1587 mii_detach(&sc->ex_mii, MII_PHY_ANY, MII_OFFSET_ANY); 1588 } 1589 1590 /* Delete all remaining media. */ 1591 ifmedia_delete_instance(&sc->ex_mii.mii_media, IFM_INST_ANY); 1592 1593 #if NRND > 0 1594 rnd_detach_source(&sc->rnd_source); 1595 #endif 1596 ether_ifdetach(ifp); 1597 if_detach(ifp); 1598 1599 for (i = 0; i < EX_NUPD; i++) { 1600 rxd = &sc->sc_rxdescs[i]; 1601 if (rxd->rx_mbhead != NULL) { 1602 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap); 1603 m_freem(rxd->rx_mbhead); 1604 rxd->rx_mbhead = NULL; 1605 } 1606 } 1607 for (i = 0; i < EX_NUPD; i++) 1608 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]); 1609 for (i = 0; i < EX_NDPD; i++) 1610 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]); 1611 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap); 1612 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap); 1613 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd, 1614 EX_NDPD * sizeof (struct ex_dpd)); 1615 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg); 1616 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap); 1617 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap); 1618 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd, 1619 EX_NUPD * sizeof (struct ex_upd)); 1620 bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg); 1621 1622 shutdownhook_disestablish(sc->sc_sdhook); 1623 powerhook_disestablish(sc->sc_powerhook); 1624 1625 return (0); 1626 } 1627 1628 /* 1629 * Before reboots, reset card completely. 1630 */ 1631 static void 1632 ex_shutdown(arg) 1633 void *arg; 1634 { 1635 struct ex_softc *sc = arg; 1636 1637 ex_stop(&sc->sc_ethercom.ec_if, 1); 1638 /* 1639 * Make sure the interface is powered up when we reboot, 1640 * otherwise firmware on some systems gets really confused. 1641 */ 1642 (void) ex_enable(sc); 1643 } 1644 1645 /* 1646 * Read EEPROM data. 1647 * XXX what to do if EEPROM doesn't unbusy? 1648 */ 1649 u_int16_t 1650 ex_read_eeprom(sc, offset) 1651 struct ex_softc *sc; 1652 int offset; 1653 { 1654 bus_space_tag_t iot = sc->sc_iot; 1655 bus_space_handle_t ioh = sc->sc_ioh; 1656 u_int16_t data = 0, cmd = READ_EEPROM; 1657 int off; 1658 1659 off = sc->ex_conf & EX_CONF_EEPROM_OFF ? 0x30 : 0; 1660 cmd = sc->ex_conf & EX_CONF_EEPROM_8BIT ? READ_EEPROM8 : READ_EEPROM; 1661 1662 GO_WINDOW(0); 1663 if (ex_eeprom_busy(sc)) 1664 goto out; 1665 bus_space_write_2(iot, ioh, ELINK_W0_EEPROM_COMMAND, 1666 cmd | (off + (offset & 0x3f))); 1667 if (ex_eeprom_busy(sc)) 1668 goto out; 1669 data = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_DATA); 1670 out: 1671 return data; 1672 } 1673 1674 static int 1675 ex_eeprom_busy(sc) 1676 struct ex_softc *sc; 1677 { 1678 bus_space_tag_t iot = sc->sc_iot; 1679 bus_space_handle_t ioh = sc->sc_ioh; 1680 int i = 100; 1681 1682 while (i--) { 1683 if (!(bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND) & 1684 EEPROM_BUSY)) 1685 return 0; 1686 delay(100); 1687 } 1688 printf("\n%s: eeprom stays busy.\n", sc->sc_dev.dv_xname); 1689 return (1); 1690 } 1691 1692 /* 1693 * Create a new rx buffer and add it to the 'soft' rx list. 1694 */ 1695 static int 1696 ex_add_rxbuf(sc, rxd) 1697 struct ex_softc *sc; 1698 struct ex_rxdesc *rxd; 1699 { 1700 struct mbuf *m, *oldm; 1701 bus_dmamap_t rxmap; 1702 int error, rval = 0; 1703 1704 oldm = rxd->rx_mbhead; 1705 rxmap = rxd->rx_dmamap; 1706 1707 MGETHDR(m, M_DONTWAIT, MT_DATA); 1708 if (m != NULL) { 1709 MCLGET(m, M_DONTWAIT); 1710 if ((m->m_flags & M_EXT) == 0) { 1711 m_freem(m); 1712 if (oldm == NULL) 1713 return 1; 1714 m = oldm; 1715 m->m_data = m->m_ext.ext_buf; 1716 rval = 1; 1717 } 1718 } else { 1719 if (oldm == NULL) 1720 return 1; 1721 m = oldm; 1722 m->m_data = m->m_ext.ext_buf; 1723 rval = 1; 1724 } 1725 1726 /* 1727 * Setup the DMA map for this receive buffer. 1728 */ 1729 if (m != oldm) { 1730 if (oldm != NULL) 1731 bus_dmamap_unload(sc->sc_dmat, rxmap); 1732 error = bus_dmamap_load(sc->sc_dmat, rxmap, 1733 m->m_ext.ext_buf, MCLBYTES, NULL, 1734 BUS_DMA_READ|BUS_DMA_NOWAIT); 1735 if (error) { 1736 printf("%s: can't load rx buffer, error = %d\n", 1737 sc->sc_dev.dv_xname, error); 1738 panic("ex_add_rxbuf"); /* XXX */ 1739 } 1740 } 1741 1742 /* 1743 * Align for data after 14 byte header. 1744 */ 1745 m->m_data += 2; 1746 1747 rxd->rx_mbhead = m; 1748 rxd->rx_upd->upd_pktstatus = htole32(MCLBYTES - 2); 1749 rxd->rx_upd->upd_frags[0].fr_addr = 1750 htole32(rxmap->dm_segs[0].ds_addr + 2); 1751 rxd->rx_upd->upd_nextptr = 0; 1752 1753 /* 1754 * Attach it to the end of the list. 1755 */ 1756 if (sc->rx_head != NULL) { 1757 sc->rx_tail->rx_next = rxd; 1758 sc->rx_tail->rx_upd->upd_nextptr = htole32(sc->sc_upddma + 1759 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd)); 1760 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1761 (caddr_t)sc->rx_tail->rx_upd - (caddr_t)sc->sc_upd, 1762 sizeof (struct ex_upd), 1763 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1764 } else { 1765 sc->rx_head = rxd; 1766 } 1767 sc->rx_tail = rxd; 1768 1769 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, rxmap->dm_mapsize, 1770 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1771 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1772 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd), 1773 sizeof (struct ex_upd), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1774 return (rval); 1775 } 1776 1777 u_int32_t 1778 ex_mii_bitbang_read(self) 1779 struct device *self; 1780 { 1781 struct ex_softc *sc = (void *) self; 1782 1783 /* We're already in Window 4. */ 1784 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT)); 1785 } 1786 1787 void 1788 ex_mii_bitbang_write(self, val) 1789 struct device *self; 1790 u_int32_t val; 1791 { 1792 struct ex_softc *sc = (void *) self; 1793 1794 /* We're already in Window 4. */ 1795 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT, val); 1796 } 1797 1798 int 1799 ex_mii_readreg(v, phy, reg) 1800 struct device *v; 1801 int phy, reg; 1802 { 1803 struct ex_softc *sc = (struct ex_softc *)v; 1804 int val; 1805 1806 if ((sc->ex_conf & EX_CONF_INTPHY) && phy != ELINK_INTPHY_ID) 1807 return 0; 1808 1809 GO_WINDOW(4); 1810 1811 val = mii_bitbang_readreg(v, &ex_mii_bitbang_ops, phy, reg); 1812 1813 GO_WINDOW(1); 1814 1815 return (val); 1816 } 1817 1818 void 1819 ex_mii_writereg(v, phy, reg, data) 1820 struct device *v; 1821 int phy; 1822 int reg; 1823 int data; 1824 { 1825 struct ex_softc *sc = (struct ex_softc *)v; 1826 1827 GO_WINDOW(4); 1828 1829 mii_bitbang_writereg(v, &ex_mii_bitbang_ops, phy, reg, data); 1830 1831 GO_WINDOW(1); 1832 } 1833 1834 void 1835 ex_mii_statchg(v) 1836 struct device *v; 1837 { 1838 struct ex_softc *sc = (struct ex_softc *)v; 1839 bus_space_tag_t iot = sc->sc_iot; 1840 bus_space_handle_t ioh = sc->sc_ioh; 1841 int mctl; 1842 1843 GO_WINDOW(3); 1844 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1845 if (sc->ex_mii.mii_media_active & IFM_FDX) 1846 mctl |= MAC_CONTROL_FDX; 1847 else 1848 mctl &= ~MAC_CONTROL_FDX; 1849 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1850 GO_WINDOW(1); /* back to operating window */ 1851 } 1852 1853 int 1854 ex_enable(sc) 1855 struct ex_softc *sc; 1856 { 1857 if (sc->enabled == 0 && sc->enable != NULL) { 1858 if ((*sc->enable)(sc) != 0) { 1859 printf("%s: de/vice enable failed\n", 1860 sc->sc_dev.dv_xname); 1861 return (EIO); 1862 } 1863 sc->enabled = 1; 1864 } 1865 return (0); 1866 } 1867 1868 void 1869 ex_disable(sc) 1870 struct ex_softc *sc; 1871 { 1872 if (sc->enabled == 1 && sc->disable != NULL) { 1873 (*sc->disable)(sc); 1874 sc->enabled = 0; 1875 } 1876 } 1877 1878 void 1879 ex_power(why, arg) 1880 int why; 1881 void *arg; 1882 { 1883 struct ex_softc *sc = (void *)arg; 1884 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1885 int s; 1886 1887 s = splnet(); 1888 switch (why) { 1889 case PWR_SUSPEND: 1890 case PWR_STANDBY: 1891 ex_stop(ifp, 0); 1892 if (sc->power != NULL) 1893 (*sc->power)(sc, why); 1894 break; 1895 case PWR_RESUME: 1896 if (ifp->if_flags & IFF_UP) { 1897 if (sc->power != NULL) 1898 (*sc->power)(sc, why); 1899 ex_init(ifp); 1900 } 1901 break; 1902 case PWR_SOFTSUSPEND: 1903 case PWR_SOFTSTANDBY: 1904 case PWR_SOFTRESUME: 1905 break; 1906 } 1907 splx(s); 1908 } 1909
Indexes created Thu Oct 23 22:10:10 GMT 2025