elinkxl.c revision 1.87.8.1
1 /* $NetBSD: elinkxl.c,v 1.87.8.1 2006/06/19 03:58:13 chap Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Frank van der Linden. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: elinkxl.c,v 1.87.8.1 2006/06/19 03:58:13 chap Exp $"); 41 42 #include "bpfilter.h" 43 #include "rnd.h" 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/callout.h> 48 #include <sys/kernel.h> 49 #include <sys/mbuf.h> 50 #include <sys/socket.h> 51 #include <sys/ioctl.h> 52 #include <sys/errno.h> 53 #include <sys/syslog.h> 54 #include <sys/select.h> 55 #include <sys/device.h> 56 #if NRND > 0 57 #include <sys/rnd.h> 58 #endif 59 60 #include <uvm/uvm_extern.h> 61 62 #include <net/if.h> 63 #include <net/if_dl.h> 64 #include <net/if_ether.h> 65 #include <net/if_media.h> 66 67 #if NBPFILTER > 0 68 #include <net/bpf.h> 69 #include <net/bpfdesc.h> 70 #endif 71 72 #include <machine/cpu.h> 73 #include <machine/bus.h> 74 #include <machine/intr.h> 75 #include <machine/endian.h> 76 77 #include <dev/mii/miivar.h> 78 #include <dev/mii/mii.h> 79 #include <dev/mii/mii_bitbang.h> 80 81 #include <dev/ic/elink3reg.h> 82 /* #include <dev/ic/elink3var.h> */ 83 #include <dev/ic/elinkxlreg.h> 84 #include <dev/ic/elinkxlvar.h> 85 86 #ifdef DEBUG 87 int exdebug = 0; 88 #endif 89 90 /* ifmedia callbacks */ 91 int ex_media_chg(struct ifnet *ifp); 92 void ex_media_stat(struct ifnet *ifp, struct ifmediareq *req); 93 94 void ex_probe_media(struct ex_softc *); 95 void ex_set_filter(struct ex_softc *); 96 void ex_set_media(struct ex_softc *); 97 void ex_set_xcvr(struct ex_softc *, u_int16_t); 98 struct mbuf *ex_get(struct ex_softc *, int); 99 u_int16_t ex_read_eeprom(struct ex_softc *, int); 100 int ex_init(struct ifnet *); 101 void ex_read(struct ex_softc *); 102 void ex_reset(struct ex_softc *); 103 void ex_set_mc(struct ex_softc *); 104 void ex_getstats(struct ex_softc *); 105 void ex_printstats(struct ex_softc *); 106 void ex_tick(void *); 107 108 void ex_power(int, void *); 109 110 static int ex_eeprom_busy(struct ex_softc *); 111 static int ex_add_rxbuf(struct ex_softc *, struct ex_rxdesc *); 112 static void ex_init_txdescs(struct ex_softc *); 113 114 static void ex_shutdown(void *); 115 static void ex_start(struct ifnet *); 116 static void ex_txstat(struct ex_softc *); 117 118 int ex_mii_readreg(struct device *, int, int); 119 void ex_mii_writereg(struct device *, int, int, int); 120 void ex_mii_statchg(struct device *); 121 122 void ex_probemedia(struct ex_softc *); 123 124 /* 125 * Structure to map media-present bits in boards to ifmedia codes and 126 * printable media names. Used for table-driven ifmedia initialization. 127 */ 128 struct ex_media { 129 int exm_mpbit; /* media present bit */ 130 const char *exm_name; /* name of medium */ 131 int exm_ifmedia; /* ifmedia word for medium */ 132 int exm_epmedia; /* ELINKMEDIA_* constant */ 133 }; 134 135 /* 136 * Media table for 3c90x chips. Note that chips with MII have no 137 * `native' media. 138 */ 139 struct ex_media ex_native_media[] = { 140 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 141 ELINKMEDIA_10BASE_T }, 142 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 143 ELINKMEDIA_10BASE_T }, 144 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 145 ELINKMEDIA_AUI }, 146 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 147 ELINKMEDIA_10BASE_2 }, 148 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 149 ELINKMEDIA_100BASE_TX }, 150 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 151 ELINKMEDIA_100BASE_TX }, 152 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 153 ELINKMEDIA_100BASE_FX }, 154 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 155 ELINKMEDIA_MII }, 156 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 157 ELINKMEDIA_100BASE_T4 }, 158 { 0, NULL, 0, 159 0 }, 160 }; 161 162 /* 163 * MII bit-bang glue. 164 */ 165 u_int32_t ex_mii_bitbang_read(struct device *); 166 void ex_mii_bitbang_write(struct device *, u_int32_t); 167 168 const struct mii_bitbang_ops ex_mii_bitbang_ops = { 169 ex_mii_bitbang_read, 170 ex_mii_bitbang_write, 171 { 172 ELINK_PHY_DATA, /* MII_BIT_MDO */ 173 ELINK_PHY_DATA, /* MII_BIT_MDI */ 174 ELINK_PHY_CLK, /* MII_BIT_MDC */ 175 ELINK_PHY_DIR, /* MII_BIT_DIR_HOST_PHY */ 176 0, /* MII_BIT_DIR_PHY_HOST */ 177 } 178 }; 179 180 /* 181 * Back-end attach and configure. 182 */ 183 void 184 ex_config(sc) 185 struct ex_softc *sc; 186 { 187 struct ifnet *ifp; 188 u_int16_t val; 189 u_int8_t macaddr[ETHER_ADDR_LEN] = {0}; 190 bus_space_tag_t iot = sc->sc_iot; 191 bus_space_handle_t ioh = sc->sc_ioh; 192 int i, error, attach_stage; 193 194 callout_init(&sc->ex_mii_callout); 195 196 ex_reset(sc); 197 198 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR0); 199 macaddr[0] = val >> 8; 200 macaddr[1] = val & 0xff; 201 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR1); 202 macaddr[2] = val >> 8; 203 macaddr[3] = val & 0xff; 204 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR2); 205 macaddr[4] = val >> 8; 206 macaddr[5] = val & 0xff; 207 208 aprint_normal("%s: MAC address %s\n", sc->sc_dev.dv_xname, 209 ether_sprintf(macaddr)); 210 211 if (sc->ex_conf & (EX_CONF_INV_LED_POLARITY|EX_CONF_PHY_POWER)) { 212 GO_WINDOW(2); 213 val = bus_space_read_2(iot, ioh, ELINK_W2_RESET_OPTIONS); 214 if (sc->ex_conf & EX_CONF_INV_LED_POLARITY) 215 val |= ELINK_RESET_OPT_LEDPOLAR; 216 if (sc->ex_conf & EX_CONF_PHY_POWER) 217 val |= ELINK_RESET_OPT_PHYPOWER; 218 bus_space_write_2(iot, ioh, ELINK_W2_RESET_OPTIONS, val); 219 } 220 if (sc->ex_conf & EX_CONF_NO_XCVR_PWR) { 221 GO_WINDOW(0); 222 bus_space_write_2(iot, ioh, ELINK_W0_MFG_ID, 223 EX_XCVR_PWR_MAGICBITS); 224 } 225 226 attach_stage = 0; 227 228 /* 229 * Allocate the upload descriptors, and create and load the DMA 230 * map for them. 231 */ 232 if ((error = bus_dmamem_alloc(sc->sc_dmat, 233 EX_NUPD * sizeof (struct ex_upd), PAGE_SIZE, 0, &sc->sc_useg, 1, 234 &sc->sc_urseg, BUS_DMA_NOWAIT)) != 0) { 235 aprint_error( 236 "%s: can't allocate upload descriptors, error = %d\n", 237 sc->sc_dev.dv_xname, error); 238 goto fail; 239 } 240 241 attach_stage = 1; 242 243 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg, 244 EX_NUPD * sizeof (struct ex_upd), (caddr_t *)&sc->sc_upd, 245 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 246 aprint_error("%s: can't map upload descriptors, error = %d\n", 247 sc->sc_dev.dv_xname, error); 248 goto fail; 249 } 250 251 attach_stage = 2; 252 253 if ((error = bus_dmamap_create(sc->sc_dmat, 254 EX_NUPD * sizeof (struct ex_upd), 1, 255 EX_NUPD * sizeof (struct ex_upd), 0, BUS_DMA_NOWAIT, 256 &sc->sc_upd_dmamap)) != 0) { 257 aprint_error( 258 "%s: can't create upload desc. DMA map, error = %d\n", 259 sc->sc_dev.dv_xname, error); 260 goto fail; 261 } 262 263 attach_stage = 3; 264 265 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_upd_dmamap, 266 sc->sc_upd, EX_NUPD * sizeof (struct ex_upd), NULL, 267 BUS_DMA_NOWAIT)) != 0) { 268 aprint_error( 269 "%s: can't load upload desc. DMA map, error = %d\n", 270 sc->sc_dev.dv_xname, error); 271 goto fail; 272 } 273 274 attach_stage = 4; 275 276 /* 277 * Allocate the download descriptors, and create and load the DMA 278 * map for them. 279 */ 280 if ((error = bus_dmamem_alloc(sc->sc_dmat, 281 EX_NDPD * sizeof (struct ex_dpd), PAGE_SIZE, 0, &sc->sc_dseg, 1, 282 &sc->sc_drseg, BUS_DMA_NOWAIT)) != 0) { 283 aprint_error( 284 "%s: can't allocate download descriptors, error = %d\n", 285 sc->sc_dev.dv_xname, error); 286 goto fail; 287 } 288 289 attach_stage = 5; 290 291 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg, 292 EX_NDPD * sizeof (struct ex_dpd), (caddr_t *)&sc->sc_dpd, 293 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 294 aprint_error("%s: can't map download descriptors, error = %d\n", 295 sc->sc_dev.dv_xname, error); 296 goto fail; 297 } 298 memset(sc->sc_dpd, 0, EX_NDPD * sizeof (struct ex_dpd)); 299 300 attach_stage = 6; 301 302 if ((error = bus_dmamap_create(sc->sc_dmat, 303 EX_NDPD * sizeof (struct ex_dpd), 1, 304 EX_NDPD * sizeof (struct ex_dpd), 0, BUS_DMA_NOWAIT, 305 &sc->sc_dpd_dmamap)) != 0) { 306 aprint_error( 307 "%s: can't create download desc. DMA map, error = %d\n", 308 sc->sc_dev.dv_xname, error); 309 goto fail; 310 } 311 312 attach_stage = 7; 313 314 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dpd_dmamap, 315 sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd), NULL, 316 BUS_DMA_NOWAIT)) != 0) { 317 aprint_error( 318 "%s: can't load download desc. DMA map, error = %d\n", 319 sc->sc_dev.dv_xname, error); 320 goto fail; 321 } 322 323 attach_stage = 8; 324 325 326 /* 327 * Create the transmit buffer DMA maps. 328 */ 329 for (i = 0; i < EX_NDPD; i++) { 330 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 331 EX_NTFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 332 &sc->sc_tx_dmamaps[i])) != 0) { 333 aprint_error( 334 "%s: can't create tx DMA map %d, error = %d\n", 335 sc->sc_dev.dv_xname, i, error); 336 goto fail; 337 } 338 } 339 340 attach_stage = 9; 341 342 /* 343 * Create the receive buffer DMA maps. 344 */ 345 for (i = 0; i < EX_NUPD; i++) { 346 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 347 EX_NRFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 348 &sc->sc_rx_dmamaps[i])) != 0) { 349 aprint_error( 350 "%s: can't create rx DMA map %d, error = %d\n", 351 sc->sc_dev.dv_xname, i, error); 352 goto fail; 353 } 354 } 355 356 attach_stage = 10; 357 358 /* 359 * Create ring of upload descriptors, only once. The DMA engine 360 * will loop over this when receiving packets, stalling if it 361 * hits an UPD with a finished receive. 362 */ 363 for (i = 0; i < EX_NUPD; i++) { 364 sc->sc_rxdescs[i].rx_dmamap = sc->sc_rx_dmamaps[i]; 365 sc->sc_rxdescs[i].rx_upd = &sc->sc_upd[i]; 366 sc->sc_upd[i].upd_frags[0].fr_len = 367 htole32((MCLBYTES - 2) | EX_FR_LAST); 368 if (ex_add_rxbuf(sc, &sc->sc_rxdescs[i]) != 0) { 369 aprint_error("%s: can't allocate or map rx buffers\n", 370 sc->sc_dev.dv_xname); 371 goto fail; 372 } 373 } 374 375 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 0, 376 EX_NUPD * sizeof (struct ex_upd), 377 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 378 379 ex_init_txdescs(sc); 380 381 attach_stage = 11; 382 383 384 GO_WINDOW(3); 385 val = bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS); 386 if (val & ELINK_MEDIACAP_MII) 387 sc->ex_conf |= EX_CONF_MII; 388 389 ifp = &sc->sc_ethercom.ec_if; 390 391 /* 392 * Initialize our media structures and MII info. We'll 393 * probe the MII if we discover that we have one. 394 */ 395 sc->ex_mii.mii_ifp = ifp; 396 sc->ex_mii.mii_readreg = ex_mii_readreg; 397 sc->ex_mii.mii_writereg = ex_mii_writereg; 398 sc->ex_mii.mii_statchg = ex_mii_statchg; 399 ifmedia_init(&sc->ex_mii.mii_media, IFM_IMASK, ex_media_chg, 400 ex_media_stat); 401 402 if (sc->ex_conf & EX_CONF_MII) { 403 /* 404 * Find PHY, extract media information from it. 405 * First, select the right transceiver. 406 */ 407 ex_set_xcvr(sc, val); 408 409 mii_attach(&sc->sc_dev, &sc->ex_mii, 0xffffffff, 410 MII_PHY_ANY, MII_OFFSET_ANY, 0); 411 if (LIST_FIRST(&sc->ex_mii.mii_phys) == NULL) { 412 ifmedia_add(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE, 413 0, NULL); 414 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE); 415 } else { 416 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_AUTO); 417 } 418 } else 419 ex_probemedia(sc); 420 421 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 422 ifp->if_softc = sc; 423 ifp->if_start = ex_start; 424 ifp->if_ioctl = ex_ioctl; 425 ifp->if_watchdog = ex_watchdog; 426 ifp->if_init = ex_init; 427 ifp->if_stop = ex_stop; 428 ifp->if_flags = 429 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 430 sc->sc_if_flags = ifp->if_flags; 431 IFQ_SET_READY(&ifp->if_snd); 432 433 /* 434 * We can support 802.1Q VLAN-sized frames. 435 */ 436 sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU; 437 438 /* 439 * The 3c90xB has hardware IPv4/TCPv4/UDPv4 checksum support. 440 */ 441 if (sc->ex_conf & EX_CONF_90XB) 442 sc->sc_ethercom.ec_if.if_capabilities |= 443 IFCAP_CSUM_IPv4_Tx | IFCAP_CSUM_IPv4_Rx | 444 IFCAP_CSUM_TCPv4_Tx | IFCAP_CSUM_TCPv4_Rx | 445 IFCAP_CSUM_UDPv4_Tx | IFCAP_CSUM_UDPv4_Rx; 446 447 if_attach(ifp); 448 ether_ifattach(ifp, macaddr); 449 450 GO_WINDOW(1); 451 452 sc->tx_start_thresh = 20; 453 sc->tx_succ_ok = 0; 454 455 /* TODO: set queues to 0 */ 456 457 #if NRND > 0 458 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 459 RND_TYPE_NET, 0); 460 #endif 461 462 /* Establish callback to reset card when we reboot. */ 463 sc->sc_sdhook = shutdownhook_establish(ex_shutdown, sc); 464 if (sc->sc_sdhook == NULL) 465 aprint_error("%s: WARNING: unable to establish shutdown hook\n", 466 sc->sc_dev.dv_xname); 467 468 /* Add a suspend hook to make sure we come back up after a resume. */ 469 sc->sc_powerhook = powerhook_establish(ex_power, sc); 470 if (sc->sc_powerhook == NULL) 471 aprint_error("%s: WARNING: unable to establish power hook\n", 472 sc->sc_dev.dv_xname); 473 474 /* The attach is successful. */ 475 sc->ex_flags |= EX_FLAGS_ATTACHED; 476 return; 477 478 fail: 479 /* 480 * Free any resources we've allocated during the failed attach 481 * attempt. Do this in reverse order and fall though. 482 */ 483 switch (attach_stage) { 484 case 11: 485 { 486 struct ex_rxdesc *rxd; 487 488 for (i = 0; i < EX_NUPD; i++) { 489 rxd = &sc->sc_rxdescs[i]; 490 if (rxd->rx_mbhead != NULL) { 491 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap); 492 m_freem(rxd->rx_mbhead); 493 } 494 } 495 } 496 /* FALLTHROUGH */ 497 498 case 10: 499 for (i = 0; i < EX_NUPD; i++) 500 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]); 501 /* FALLTHROUGH */ 502 503 case 9: 504 for (i = 0; i < EX_NDPD; i++) 505 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]); 506 /* FALLTHROUGH */ 507 case 8: 508 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap); 509 /* FALLTHROUGH */ 510 511 case 7: 512 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap); 513 /* FALLTHROUGH */ 514 515 case 6: 516 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd, 517 EX_NDPD * sizeof (struct ex_dpd)); 518 /* FALLTHROUGH */ 519 520 case 5: 521 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg); 522 break; 523 524 case 4: 525 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap); 526 /* FALLTHROUGH */ 527 528 case 3: 529 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap); 530 /* FALLTHROUGH */ 531 532 case 2: 533 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd, 534 EX_NUPD * sizeof (struct ex_upd)); 535 /* FALLTHROUGH */ 536 537 case 1: 538 bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg); 539 break; 540 } 541 542 } 543 544 /* 545 * Find the media present on non-MII chips. 546 */ 547 void 548 ex_probemedia(sc) 549 struct ex_softc *sc; 550 { 551 bus_space_tag_t iot = sc->sc_iot; 552 bus_space_handle_t ioh = sc->sc_ioh; 553 struct ifmedia *ifm = &sc->ex_mii.mii_media; 554 struct ex_media *exm; 555 u_int16_t config1, reset_options, default_media; 556 int defmedia = 0; 557 const char *sep = "", *defmedianame = NULL; 558 559 GO_WINDOW(3); 560 config1 = bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2); 561 reset_options = bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 562 GO_WINDOW(0); 563 564 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 565 566 aprint_normal("%s: ", sc->sc_dev.dv_xname); 567 568 /* Sanity check that there are any media! */ 569 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 570 aprint_error("no media present!\n"); 571 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 572 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 573 return; 574 } 575 576 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", " 577 578 for (exm = ex_native_media; exm->exm_name != NULL; exm++) { 579 if (reset_options & exm->exm_mpbit) { 580 /* 581 * Default media is a little complicated. We 582 * support full-duplex which uses the same 583 * reset options bit. 584 * 585 * XXX Check EEPROM for default to FDX? 586 */ 587 if (exm->exm_epmedia == default_media) { 588 if ((exm->exm_ifmedia & IFM_FDX) == 0) { 589 defmedia = exm->exm_ifmedia; 590 defmedianame = exm->exm_name; 591 } 592 } else if (defmedia == 0) { 593 defmedia = exm->exm_ifmedia; 594 defmedianame = exm->exm_name; 595 } 596 ifmedia_add(ifm, exm->exm_ifmedia, exm->exm_epmedia, 597 NULL); 598 PRINT(exm->exm_name); 599 } 600 } 601 602 #undef PRINT 603 604 #ifdef DIAGNOSTIC 605 if (defmedia == 0) 606 panic("ex_probemedia: impossible"); 607 #endif 608 609 aprint_normal(", default %s\n", defmedianame); 610 ifmedia_set(ifm, defmedia); 611 } 612 613 /* 614 * Bring device up. 615 */ 616 int 617 ex_init(ifp) 618 struct ifnet *ifp; 619 { 620 struct ex_softc *sc = ifp->if_softc; 621 bus_space_tag_t iot = sc->sc_iot; 622 bus_space_handle_t ioh = sc->sc_ioh; 623 int i; 624 int error = 0; 625 626 if ((error = ex_enable(sc)) != 0) 627 goto out; 628 629 ex_waitcmd(sc); 630 ex_stop(ifp, 0); 631 632 /* 633 * Set the station address and clear the station mask. The latter 634 * is needed for 90x cards, 0 is the default for 90xB cards. 635 */ 636 GO_WINDOW(2); 637 for (i = 0; i < ETHER_ADDR_LEN; i++) { 638 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 639 LLADDR(ifp->if_sadl)[i]); 640 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 641 } 642 643 GO_WINDOW(3); 644 645 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_RESET); 646 ex_waitcmd(sc); 647 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_RESET); 648 ex_waitcmd(sc); 649 650 /* 651 * Disable reclaim threshold for 90xB, set free threshold to 652 * 6 * 256 = 1536 for 90x. 653 */ 654 if (sc->ex_conf & EX_CONF_90XB) 655 bus_space_write_2(iot, ioh, ELINK_COMMAND, 656 ELINK_TXRECLTHRESH | 255); 657 else 658 bus_space_write_1(iot, ioh, ELINK_TXFREETHRESH, 6); 659 660 bus_space_write_2(iot, ioh, ELINK_COMMAND, 661 SET_RX_EARLY_THRESH | ELINK_THRESH_DISABLE); 662 663 bus_space_write_4(iot, ioh, ELINK_DMACTRL, 664 bus_space_read_4(iot, ioh, ELINK_DMACTRL) | ELINK_DMAC_UPRXEAREN); 665 666 bus_space_write_2(iot, ioh, ELINK_COMMAND, 667 SET_RD_0_MASK | XL_WATCHED_INTERRUPTS); 668 bus_space_write_2(iot, ioh, ELINK_COMMAND, 669 SET_INTR_MASK | XL_WATCHED_INTERRUPTS); 670 671 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 672 if (sc->intr_ack) 673 (* sc->intr_ack)(sc); 674 ex_set_media(sc); 675 ex_set_mc(sc); 676 677 678 bus_space_write_2(iot, ioh, ELINK_COMMAND, STATS_ENABLE); 679 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 680 bus_space_write_4(iot, ioh, ELINK_UPLISTPTR, sc->sc_upddma); 681 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 682 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_UPUNSTALL); 683 684 if (sc->ex_conf & (EX_CONF_PHY_POWER | EX_CONF_INV_LED_POLARITY)) { 685 u_int16_t cbcard_config; 686 687 GO_WINDOW(2); 688 cbcard_config = bus_space_read_2(sc->sc_iot, sc->sc_ioh, 0x0c); 689 if (sc->ex_conf & EX_CONF_PHY_POWER) { 690 cbcard_config |= 0x4000; /* turn on PHY power */ 691 } 692 if (sc->ex_conf & EX_CONF_INV_LED_POLARITY) { 693 cbcard_config |= 0x0010; /* invert LED polarity */ 694 } 695 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 0x0c, cbcard_config); 696 697 GO_WINDOW(3); 698 } 699 700 ifp->if_flags |= IFF_RUNNING; 701 ifp->if_flags &= ~IFF_OACTIVE; 702 ex_start(ifp); 703 sc->sc_if_flags = ifp->if_flags; 704 705 GO_WINDOW(1); 706 707 callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc); 708 709 out: 710 if (error) { 711 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 712 ifp->if_timer = 0; 713 printf("%s: interface not running\n", sc->sc_dev.dv_xname); 714 } 715 return (error); 716 } 717 718 #define MCHASHSIZE 256 719 #define ex_mchash(addr) (ether_crc32_be((addr), ETHER_ADDR_LEN) & \ 720 (MCHASHSIZE - 1)) 721 722 /* 723 * Set multicast receive filter. Also take care of promiscuous mode 724 * here (XXX). 725 */ 726 void 727 ex_set_mc(sc) 728 struct ex_softc *sc; 729 { 730 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 731 struct ethercom *ec = &sc->sc_ethercom; 732 struct ether_multi *enm; 733 struct ether_multistep estep; 734 int i; 735 u_int16_t mask = FIL_INDIVIDUAL | FIL_BRDCST; 736 737 if (ifp->if_flags & IFF_PROMISC) { 738 mask |= FIL_PROMISC; 739 goto allmulti; 740 } 741 742 ETHER_FIRST_MULTI(estep, ec, enm); 743 if (enm == NULL) 744 goto nomulti; 745 746 if ((sc->ex_conf & EX_CONF_90XB) == 0) 747 /* No multicast hash filtering. */ 748 goto allmulti; 749 750 for (i = 0; i < MCHASHSIZE; i++) 751 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 752 ELINK_COMMAND, ELINK_CLEARHASHFILBIT | i); 753 754 do { 755 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 756 ETHER_ADDR_LEN) != 0) 757 goto allmulti; 758 759 i = ex_mchash(enm->enm_addrlo); 760 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 761 ELINK_COMMAND, ELINK_SETHASHFILBIT | i); 762 ETHER_NEXT_MULTI(estep, enm); 763 } while (enm != NULL); 764 mask |= FIL_MULTIHASH; 765 766 nomulti: 767 ifp->if_flags &= ~IFF_ALLMULTI; 768 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 769 SET_RX_FILTER | mask); 770 return; 771 772 allmulti: 773 ifp->if_flags |= IFF_ALLMULTI; 774 mask |= FIL_MULTICAST; 775 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 776 SET_RX_FILTER | mask); 777 } 778 779 780 static void 781 ex_txstat(sc) 782 struct ex_softc *sc; 783 { 784 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 785 bus_space_tag_t iot = sc->sc_iot; 786 bus_space_handle_t ioh = sc->sc_ioh; 787 int i; 788 789 /* 790 * We need to read+write TX_STATUS until we get a 0 status 791 * in order to turn off the interrupt flag. 792 * ELINK_TXSTATUS is in the upper byte of 2 with ELINK_TIMER 793 * XXX: Big Endian? Can we assume that TXSTATUS will be the 794 * upper byte? 795 */ 796 while ((i = bus_space_read_2(iot, ioh, ELINK_TIMER)) & TXS_COMPLETE) { 797 bus_space_write_2(iot, ioh, ELINK_TIMER, 0x0); 798 799 if (i & TXS_JABBER) { 800 ++sc->sc_ethercom.ec_if.if_oerrors; 801 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 802 printf("%s: jabber (%x)\n", 803 sc->sc_dev.dv_xname, i); 804 ex_init(ifp); 805 /* TODO: be more subtle here */ 806 } else if (i & TXS_UNDERRUN) { 807 ++sc->sc_ethercom.ec_if.if_oerrors; 808 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 809 printf("%s: fifo underrun (%x) @%d\n", 810 sc->sc_dev.dv_xname, i, 811 sc->tx_start_thresh); 812 if (sc->tx_succ_ok < 100) 813 sc->tx_start_thresh = min(ETHER_MAX_LEN, 814 sc->tx_start_thresh + 20); 815 sc->tx_succ_ok = 0; 816 ex_init(ifp); 817 /* TODO: be more subtle here */ 818 } else if (i & TXS_MAX_COLLISION) { 819 ++sc->sc_ethercom.ec_if.if_oerrors; 820 ++sc->sc_ethercom.ec_if.if_collisions; 821 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 822 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 823 } else if (sc->tx_succ_ok < 100) 824 sc->tx_succ_ok++; 825 } 826 } 827 828 int 829 ex_media_chg(ifp) 830 struct ifnet *ifp; 831 { 832 833 if (ifp->if_flags & IFF_UP) 834 ex_init(ifp); 835 return 0; 836 } 837 838 void 839 ex_set_xcvr(sc, media) 840 struct ex_softc *sc; 841 const u_int16_t media; 842 { 843 bus_space_tag_t iot = sc->sc_iot; 844 bus_space_handle_t ioh = sc->sc_ioh; 845 u_int32_t icfg; 846 847 /* 848 * We're already in Window 3 849 */ 850 icfg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 851 icfg &= ~(CONFIG_XCVR_SEL << 16); 852 if (media & (ELINK_MEDIACAP_MII | ELINK_MEDIACAP_100BASET4)) 853 icfg |= ELINKMEDIA_MII << (CONFIG_XCVR_SEL_SHIFT + 16); 854 if (media & ELINK_MEDIACAP_100BASETX) 855 icfg |= ELINKMEDIA_AUTO << (CONFIG_XCVR_SEL_SHIFT + 16); 856 if (media & ELINK_MEDIACAP_100BASEFX) 857 icfg |= ELINKMEDIA_100BASE_FX 858 << (CONFIG_XCVR_SEL_SHIFT + 16); 859 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, icfg); 860 } 861 862 void 863 ex_set_media(sc) 864 struct ex_softc *sc; 865 { 866 bus_space_tag_t iot = sc->sc_iot; 867 bus_space_handle_t ioh = sc->sc_ioh; 868 u_int32_t configreg; 869 870 if (((sc->ex_conf & EX_CONF_MII) && 871 (sc->ex_mii.mii_media_active & IFM_FDX)) 872 || (!(sc->ex_conf & EX_CONF_MII) && 873 (sc->ex_mii.mii_media.ifm_media & IFM_FDX))) { 874 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 875 MAC_CONTROL_FDX); 876 } else { 877 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 0); 878 } 879 880 /* 881 * If the device has MII, select it, and then tell the 882 * PHY which media to use. 883 */ 884 if (sc->ex_conf & EX_CONF_MII) { 885 u_int16_t val; 886 887 GO_WINDOW(3); 888 val = bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS); 889 ex_set_xcvr(sc, val); 890 mii_mediachg(&sc->ex_mii); 891 return; 892 } 893 894 GO_WINDOW(4); 895 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0); 896 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 897 delay(800); 898 899 /* 900 * Now turn on the selected media/transceiver. 901 */ 902 switch (IFM_SUBTYPE(sc->ex_mii.mii_media.ifm_cur->ifm_media)) { 903 case IFM_10_T: 904 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 905 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 906 break; 907 908 case IFM_10_2: 909 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 910 DELAY(800); 911 break; 912 913 case IFM_100_TX: 914 case IFM_100_FX: 915 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 916 LINKBEAT_ENABLE); 917 DELAY(800); 918 break; 919 920 case IFM_10_5: 921 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 922 SQE_ENABLE); 923 DELAY(800); 924 break; 925 926 case IFM_MANUAL: 927 break; 928 929 case IFM_NONE: 930 return; 931 932 default: 933 panic("ex_set_media: impossible"); 934 } 935 936 GO_WINDOW(3); 937 configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 938 939 configreg &= ~(CONFIG_MEDIAMASK << 16); 940 configreg |= (sc->ex_mii.mii_media.ifm_cur->ifm_data << 941 (CONFIG_MEDIAMASK_SHIFT + 16)); 942 943 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg); 944 } 945 946 /* 947 * Get currently-selected media from card. 948 * (if_media callback, may be called before interface is brought up). 949 */ 950 void 951 ex_media_stat(ifp, req) 952 struct ifnet *ifp; 953 struct ifmediareq *req; 954 { 955 struct ex_softc *sc = ifp->if_softc; 956 u_int16_t help; 957 958 if ((ifp->if_flags & (IFF_UP|IFF_RUNNING)) == (IFF_UP|IFF_RUNNING)) { 959 if (sc->ex_conf & EX_CONF_MII) { 960 mii_pollstat(&sc->ex_mii); 961 req->ifm_status = sc->ex_mii.mii_media_status; 962 req->ifm_active = sc->ex_mii.mii_media_active; 963 } else { 964 GO_WINDOW(4); 965 req->ifm_status = IFM_AVALID; 966 req->ifm_active = 967 sc->ex_mii.mii_media.ifm_cur->ifm_media; 968 help = bus_space_read_2(sc->sc_iot, sc->sc_ioh, 969 ELINK_W4_MEDIA_TYPE); 970 if (help & LINKBEAT_DETECT) 971 req->ifm_status |= IFM_ACTIVE; 972 GO_WINDOW(1); 973 } 974 } 975 } 976 977 978 979 /* 980 * Start outputting on the interface. 981 */ 982 static void 983 ex_start(ifp) 984 struct ifnet *ifp; 985 { 986 struct ex_softc *sc = ifp->if_softc; 987 bus_space_tag_t iot = sc->sc_iot; 988 bus_space_handle_t ioh = sc->sc_ioh; 989 volatile struct ex_fraghdr *fr = NULL; 990 volatile struct ex_dpd *dpd = NULL, *prevdpd = NULL; 991 struct ex_txdesc *txp; 992 struct mbuf *mb_head; 993 bus_dmamap_t dmamap; 994 int offset, totlen, segment, error; 995 u_int32_t csum_flags; 996 997 if (sc->tx_head || sc->tx_free == NULL) 998 return; 999 1000 txp = NULL; 1001 1002 /* 1003 * We're finished if there is nothing more to add to the list or if 1004 * we're all filled up with buffers to transmit. 1005 */ 1006 while (sc->tx_free != NULL) { 1007 /* 1008 * Grab a packet to transmit. 1009 */ 1010 IFQ_DEQUEUE(&ifp->if_snd, mb_head); 1011 if (mb_head == NULL) 1012 break; 1013 1014 /* 1015 * Get pointer to next available tx desc. 1016 */ 1017 txp = sc->tx_free; 1018 dmamap = txp->tx_dmamap; 1019 1020 /* 1021 * Go through each of the mbufs in the chain and initialize 1022 * the transmit buffer descriptors with the physical address 1023 * and size of the mbuf. 1024 */ 1025 reload: 1026 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 1027 mb_head, BUS_DMA_WRITE|BUS_DMA_NOWAIT); 1028 switch (error) { 1029 case 0: 1030 /* Success. */ 1031 break; 1032 1033 case EFBIG: 1034 { 1035 struct mbuf *mn; 1036 1037 /* 1038 * We ran out of segments. We have to recopy this 1039 * mbuf chain first. Bail out if we can't get the 1040 * new buffers. 1041 */ 1042 printf("%s: too many segments, ", sc->sc_dev.dv_xname); 1043 1044 MGETHDR(mn, M_DONTWAIT, MT_DATA); 1045 if (mn == NULL) { 1046 m_freem(mb_head); 1047 printf("aborting\n"); 1048 goto out; 1049 } 1050 if (mb_head->m_pkthdr.len > MHLEN) { 1051 MCLGET(mn, M_DONTWAIT); 1052 if ((mn->m_flags & M_EXT) == 0) { 1053 m_freem(mn); 1054 m_freem(mb_head); 1055 printf("aborting\n"); 1056 goto out; 1057 } 1058 } 1059 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, 1060 mtod(mn, caddr_t)); 1061 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; 1062 m_freem(mb_head); 1063 mb_head = mn; 1064 printf("retrying\n"); 1065 goto reload; 1066 } 1067 1068 default: 1069 /* 1070 * Some other problem; report it. 1071 */ 1072 printf("%s: can't load mbuf chain, error = %d\n", 1073 sc->sc_dev.dv_xname, error); 1074 m_freem(mb_head); 1075 goto out; 1076 } 1077 1078 /* 1079 * remove our tx desc from freelist. 1080 */ 1081 sc->tx_free = txp->tx_next; 1082 txp->tx_next = NULL; 1083 1084 fr = &txp->tx_dpd->dpd_frags[0]; 1085 totlen = 0; 1086 for (segment = 0; segment < dmamap->dm_nsegs; segment++, fr++) { 1087 fr->fr_addr = htole32(dmamap->dm_segs[segment].ds_addr); 1088 fr->fr_len = htole32(dmamap->dm_segs[segment].ds_len); 1089 totlen += dmamap->dm_segs[segment].ds_len; 1090 } 1091 fr--; 1092 fr->fr_len |= htole32(EX_FR_LAST); 1093 txp->tx_mbhead = mb_head; 1094 1095 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 1096 BUS_DMASYNC_PREWRITE); 1097 1098 dpd = txp->tx_dpd; 1099 dpd->dpd_nextptr = 0; 1100 dpd->dpd_fsh = htole32(totlen); 1101 1102 /* Byte-swap constants so compiler can optimize. */ 1103 1104 if (sc->ex_conf & EX_CONF_90XB) { 1105 csum_flags = 0; 1106 1107 if (mb_head->m_pkthdr.csum_flags & M_CSUM_IPv4) 1108 csum_flags |= htole32(EX_DPD_IPCKSUM); 1109 1110 if (mb_head->m_pkthdr.csum_flags & M_CSUM_TCPv4) 1111 csum_flags |= htole32(EX_DPD_TCPCKSUM); 1112 else if (mb_head->m_pkthdr.csum_flags & M_CSUM_UDPv4) 1113 csum_flags |= htole32(EX_DPD_UDPCKSUM); 1114 1115 dpd->dpd_fsh |= csum_flags; 1116 } else { 1117 KDASSERT((mb_head->m_pkthdr.csum_flags & 1118 (M_CSUM_IPv4|M_CSUM_TCPv4|M_CSUM_UDPv4)) == 0); 1119 } 1120 1121 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1122 ((const char *)(intptr_t)dpd - (const char *)sc->sc_dpd), 1123 sizeof (struct ex_dpd), 1124 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1125 1126 /* 1127 * No need to stall the download engine, we know it's 1128 * not busy right now. 1129 * 1130 * Fix up pointers in both the "soft" tx and the physical 1131 * tx list. 1132 */ 1133 if (sc->tx_head != NULL) { 1134 prevdpd = sc->tx_tail->tx_dpd; 1135 offset = ((const char *)(intptr_t)prevdpd - (const char *)sc->sc_dpd); 1136 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1137 offset, sizeof (struct ex_dpd), 1138 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1139 prevdpd->dpd_nextptr = htole32(DPD_DMADDR(sc, txp)); 1140 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1141 offset, sizeof (struct ex_dpd), 1142 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1143 sc->tx_tail->tx_next = txp; 1144 sc->tx_tail = txp; 1145 } else { 1146 sc->tx_tail = sc->tx_head = txp; 1147 } 1148 1149 #if NBPFILTER > 0 1150 /* 1151 * Pass packet to bpf if there is a listener. 1152 */ 1153 if (ifp->if_bpf) 1154 bpf_mtap(ifp->if_bpf, mb_head); 1155 #endif 1156 } 1157 out: 1158 if (sc->tx_head) { 1159 sc->tx_tail->tx_dpd->dpd_fsh |= htole32(EX_DPD_DNIND); 1160 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1161 ((caddr_t)sc->tx_tail->tx_dpd - (caddr_t)sc->sc_dpd), 1162 sizeof (struct ex_dpd), 1163 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1164 ifp->if_flags |= IFF_OACTIVE; 1165 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_DNUNSTALL); 1166 bus_space_write_4(iot, ioh, ELINK_DNLISTPTR, 1167 DPD_DMADDR(sc, sc->tx_head)); 1168 1169 /* trigger watchdog */ 1170 ifp->if_timer = 5; 1171 } 1172 } 1173 1174 1175 int 1176 ex_intr(arg) 1177 void *arg; 1178 { 1179 struct ex_softc *sc = arg; 1180 bus_space_tag_t iot = sc->sc_iot; 1181 bus_space_handle_t ioh = sc->sc_ioh; 1182 u_int16_t stat; 1183 int ret = 0; 1184 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1185 1186 if ((ifp->if_flags & IFF_RUNNING) == 0 || 1187 !device_is_active(&sc->sc_dev)) 1188 return (0); 1189 1190 for (;;) { 1191 stat = bus_space_read_2(iot, ioh, ELINK_STATUS); 1192 1193 if ((stat & XL_WATCHED_INTERRUPTS) == 0) { 1194 if ((stat & INTR_LATCH) == 0) { 1195 #if 0 1196 printf("%s: intr latch cleared\n", 1197 sc->sc_dev.dv_xname); 1198 #endif 1199 break; 1200 } 1201 } 1202 1203 ret = 1; 1204 1205 /* 1206 * Acknowledge interrupts. 1207 */ 1208 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1209 (stat & (XL_WATCHED_INTERRUPTS | INTR_LATCH))); 1210 if (sc->intr_ack) 1211 (*sc->intr_ack)(sc); 1212 1213 if (stat & HOST_ERROR) { 1214 printf("%s: adapter failure (%x)\n", 1215 sc->sc_dev.dv_xname, stat); 1216 ex_reset(sc); 1217 ex_init(ifp); 1218 return 1; 1219 } 1220 if (stat & TX_COMPLETE) { 1221 ex_txstat(sc); 1222 } 1223 if (stat & UPD_STATS) { 1224 ex_getstats(sc); 1225 } 1226 if (stat & DN_COMPLETE) { 1227 struct ex_txdesc *txp, *ptxp = NULL; 1228 bus_dmamap_t txmap; 1229 1230 /* reset watchdog timer, was set in ex_start() */ 1231 ifp->if_timer = 0; 1232 1233 for (txp = sc->tx_head; txp != NULL; 1234 txp = txp->tx_next) { 1235 bus_dmamap_sync(sc->sc_dmat, 1236 sc->sc_dpd_dmamap, 1237 (caddr_t)txp->tx_dpd - (caddr_t)sc->sc_dpd, 1238 sizeof (struct ex_dpd), 1239 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1240 if (txp->tx_mbhead != NULL) { 1241 txmap = txp->tx_dmamap; 1242 bus_dmamap_sync(sc->sc_dmat, txmap, 1243 0, txmap->dm_mapsize, 1244 BUS_DMASYNC_POSTWRITE); 1245 bus_dmamap_unload(sc->sc_dmat, txmap); 1246 m_freem(txp->tx_mbhead); 1247 txp->tx_mbhead = NULL; 1248 } 1249 ptxp = txp; 1250 } 1251 1252 /* 1253 * Move finished tx buffers back to the tx free list. 1254 */ 1255 if (sc->tx_free) { 1256 sc->tx_ftail->tx_next = sc->tx_head; 1257 sc->tx_ftail = ptxp; 1258 } else 1259 sc->tx_ftail = sc->tx_free = sc->tx_head; 1260 1261 sc->tx_head = sc->tx_tail = NULL; 1262 ifp->if_flags &= ~IFF_OACTIVE; 1263 } 1264 1265 if (stat & UP_COMPLETE) { 1266 struct ex_rxdesc *rxd; 1267 struct mbuf *m; 1268 struct ex_upd *upd; 1269 bus_dmamap_t rxmap; 1270 u_int32_t pktstat; 1271 1272 rcvloop: 1273 rxd = sc->rx_head; 1274 rxmap = rxd->rx_dmamap; 1275 m = rxd->rx_mbhead; 1276 upd = rxd->rx_upd; 1277 1278 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, 1279 rxmap->dm_mapsize, 1280 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1281 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1282 ((caddr_t)upd - (caddr_t)sc->sc_upd), 1283 sizeof (struct ex_upd), 1284 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1285 pktstat = le32toh(upd->upd_pktstatus); 1286 1287 if (pktstat & EX_UPD_COMPLETE) { 1288 /* 1289 * Remove first packet from the chain. 1290 */ 1291 sc->rx_head = rxd->rx_next; 1292 rxd->rx_next = NULL; 1293 1294 /* 1295 * Add a new buffer to the receive chain. 1296 * If this fails, the old buffer is recycled 1297 * instead. 1298 */ 1299 if (ex_add_rxbuf(sc, rxd) == 0) { 1300 u_int16_t total_len; 1301 1302 if (pktstat & 1303 ((sc->sc_ethercom.ec_capenable & 1304 ETHERCAP_VLAN_MTU) ? 1305 EX_UPD_ERR_VLAN : EX_UPD_ERR)) { 1306 ifp->if_ierrors++; 1307 m_freem(m); 1308 goto rcvloop; 1309 } 1310 1311 total_len = pktstat & EX_UPD_PKTLENMASK; 1312 if (total_len < 1313 sizeof(struct ether_header)) { 1314 m_freem(m); 1315 goto rcvloop; 1316 } 1317 m->m_pkthdr.rcvif = ifp; 1318 m->m_pkthdr.len = m->m_len = total_len; 1319 #if NBPFILTER > 0 1320 if (ifp->if_bpf) 1321 bpf_mtap(ifp->if_bpf, m); 1322 #endif 1323 /* 1324 * Set the incoming checksum information for the packet. 1325 */ 1326 if ((sc->ex_conf & EX_CONF_90XB) != 0 && 1327 (pktstat & EX_UPD_IPCHECKED) != 0) { 1328 m->m_pkthdr.csum_flags |= M_CSUM_IPv4; 1329 if (pktstat & EX_UPD_IPCKSUMERR) 1330 m->m_pkthdr.csum_flags |= M_CSUM_IPv4_BAD; 1331 if (pktstat & EX_UPD_TCPCHECKED) { 1332 m->m_pkthdr.csum_flags |= M_CSUM_TCPv4; 1333 if (pktstat & EX_UPD_TCPCKSUMERR) 1334 m->m_pkthdr.csum_flags |= 1335 M_CSUM_TCP_UDP_BAD; 1336 } else if (pktstat & EX_UPD_UDPCHECKED) { 1337 m->m_pkthdr.csum_flags |= M_CSUM_UDPv4; 1338 if (pktstat & EX_UPD_UDPCKSUMERR) 1339 m->m_pkthdr.csum_flags |= 1340 M_CSUM_TCP_UDP_BAD; 1341 } 1342 } 1343 (*ifp->if_input)(ifp, m); 1344 } 1345 goto rcvloop; 1346 } 1347 /* 1348 * Just in case we filled up all UPDs and the DMA engine 1349 * stalled. We could be more subtle about this. 1350 */ 1351 if (bus_space_read_4(iot, ioh, ELINK_UPLISTPTR) == 0) { 1352 printf("%s: uplistptr was 0\n", 1353 sc->sc_dev.dv_xname); 1354 ex_init(ifp); 1355 } else if (bus_space_read_4(iot, ioh, ELINK_UPPKTSTATUS) 1356 & 0x2000) { 1357 printf("%s: receive stalled\n", 1358 sc->sc_dev.dv_xname); 1359 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1360 ELINK_UPUNSTALL); 1361 } 1362 } 1363 1364 #if NRND > 0 1365 if (stat) 1366 rnd_add_uint32(&sc->rnd_source, stat); 1367 #endif 1368 } 1369 1370 /* no more interrupts */ 1371 if (ret && IFQ_IS_EMPTY(&ifp->if_snd) == 0) 1372 ex_start(ifp); 1373 return ret; 1374 } 1375 1376 int 1377 ex_ioctl(ifp, cmd, data) 1378 struct ifnet *ifp; 1379 u_long cmd; 1380 caddr_t data; 1381 { 1382 struct ex_softc *sc = ifp->if_softc; 1383 struct ifreq *ifr = (struct ifreq *)data; 1384 int s, error; 1385 1386 s = splnet(); 1387 1388 switch (cmd) { 1389 case SIOCSIFMEDIA: 1390 case SIOCGIFMEDIA: 1391 error = ifmedia_ioctl(ifp, ifr, &sc->ex_mii.mii_media, cmd); 1392 break; 1393 case SIOCSIFFLAGS: 1394 /* If the interface is up and running, only modify the receive 1395 * filter when setting promiscuous or debug mode. Otherwise 1396 * fall through to ether_ioctl, which will reset the chip. 1397 */ 1398 #define RESETIGN (IFF_CANTCHANGE|IFF_DEBUG) 1399 if (((ifp->if_flags & (IFF_UP|IFF_RUNNING)) 1400 == (IFF_UP|IFF_RUNNING)) 1401 && ((ifp->if_flags & (~RESETIGN)) 1402 == (sc->sc_if_flags & (~RESETIGN)))) { 1403 ex_set_mc(sc); 1404 error = 0; 1405 break; 1406 #undef RESETIGN 1407 } 1408 /* FALLTHROUGH */ 1409 default: 1410 error = ether_ioctl(ifp, cmd, data); 1411 if (error == ENETRESET) { 1412 /* 1413 * Multicast list has changed; set the hardware filter 1414 * accordingly. 1415 */ 1416 if (ifp->if_flags & IFF_RUNNING) 1417 ex_set_mc(sc); 1418 error = 0; 1419 } 1420 break; 1421 } 1422 1423 sc->sc_if_flags = ifp->if_flags; 1424 splx(s); 1425 return (error); 1426 } 1427 1428 void 1429 ex_getstats(sc) 1430 struct ex_softc *sc; 1431 { 1432 bus_space_handle_t ioh = sc->sc_ioh; 1433 bus_space_tag_t iot = sc->sc_iot; 1434 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1435 u_int8_t upperok; 1436 1437 GO_WINDOW(6); 1438 upperok = bus_space_read_1(iot, ioh, UPPER_FRAMES_OK); 1439 ifp->if_ipackets += bus_space_read_1(iot, ioh, RX_FRAMES_OK); 1440 ifp->if_ipackets += (upperok & 0x03) << 8; 1441 ifp->if_opackets += bus_space_read_1(iot, ioh, TX_FRAMES_OK); 1442 ifp->if_opackets += (upperok & 0x30) << 4; 1443 ifp->if_ierrors += bus_space_read_1(iot, ioh, RX_OVERRUNS); 1444 ifp->if_collisions += bus_space_read_1(iot, ioh, TX_COLLISIONS); 1445 /* 1446 * There seems to be no way to get the exact number of collisions, 1447 * this is the number that occurred at the very least. 1448 */ 1449 ifp->if_collisions += 2 * bus_space_read_1(iot, ioh, 1450 TX_AFTER_X_COLLISIONS); 1451 /* 1452 * Interface byte counts are counted by ether_input() and 1453 * ether_output(), so don't accumulate them here. Just 1454 * read the NIC counters so they don't generate overflow interrupts. 1455 * Upper byte counters are latched from reading the totals, so 1456 * they don't need to be read if we don't need their values. 1457 */ 1458 (void)bus_space_read_2(iot, ioh, RX_TOTAL_OK); 1459 (void)bus_space_read_2(iot, ioh, TX_TOTAL_OK); 1460 1461 /* 1462 * Clear the following to avoid stats overflow interrupts 1463 */ 1464 (void)bus_space_read_1(iot, ioh, TX_DEFERRALS); 1465 (void)bus_space_read_1(iot, ioh, TX_AFTER_1_COLLISION); 1466 (void)bus_space_read_1(iot, ioh, TX_NO_SQE); 1467 (void)bus_space_read_1(iot, ioh, TX_CD_LOST); 1468 GO_WINDOW(4); 1469 (void)bus_space_read_1(iot, ioh, ELINK_W4_BADSSD); 1470 GO_WINDOW(1); 1471 } 1472 1473 void 1474 ex_printstats(sc) 1475 struct ex_softc *sc; 1476 { 1477 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1478 1479 ex_getstats(sc); 1480 printf("in %llu out %llu ierror %llu oerror %llu ibytes %llu obytes " 1481 "%llu\n", (unsigned long long)ifp->if_ipackets, 1482 (unsigned long long)ifp->if_opackets, 1483 (unsigned long long)ifp->if_ierrors, 1484 (unsigned long long)ifp->if_oerrors, 1485 (unsigned long long)ifp->if_ibytes, 1486 (unsigned long long)ifp->if_obytes); 1487 } 1488 1489 void 1490 ex_tick(arg) 1491 void *arg; 1492 { 1493 struct ex_softc *sc = arg; 1494 int s; 1495 1496 if (!device_is_active(&sc->sc_dev)) 1497 return; 1498 1499 s = splnet(); 1500 1501 if (sc->ex_conf & EX_CONF_MII) 1502 mii_tick(&sc->ex_mii); 1503 1504 if (!(bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, ELINK_STATUS) 1505 & COMMAND_IN_PROGRESS)) 1506 ex_getstats(sc); 1507 1508 splx(s); 1509 1510 callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc); 1511 } 1512 1513 void 1514 ex_reset(sc) 1515 struct ex_softc *sc; 1516 { 1517 u_int16_t val = GLOBAL_RESET; 1518 1519 if (sc->ex_conf & EX_CONF_RESETHACK) 1520 val |= 0x10; 1521 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, val); 1522 /* 1523 * XXX apparently the command in progress bit can't be trusted 1524 * during a reset, so we just always wait this long. Fortunately 1525 * we normally only reset the chip during autoconfig. 1526 */ 1527 delay(100000); 1528 ex_waitcmd(sc); 1529 } 1530 1531 void 1532 ex_watchdog(ifp) 1533 struct ifnet *ifp; 1534 { 1535 struct ex_softc *sc = ifp->if_softc; 1536 1537 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1538 ++sc->sc_ethercom.ec_if.if_oerrors; 1539 1540 ex_reset(sc); 1541 ex_init(ifp); 1542 } 1543 1544 void 1545 ex_stop(ifp, disable) 1546 struct ifnet *ifp; 1547 int disable; 1548 { 1549 struct ex_softc *sc = ifp->if_softc; 1550 bus_space_tag_t iot = sc->sc_iot; 1551 bus_space_handle_t ioh = sc->sc_ioh; 1552 struct ex_txdesc *tx; 1553 struct ex_rxdesc *rx; 1554 int i; 1555 1556 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1557 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1558 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1559 1560 for (tx = sc->tx_head ; tx != NULL; tx = tx->tx_next) { 1561 if (tx->tx_mbhead == NULL) 1562 continue; 1563 m_freem(tx->tx_mbhead); 1564 tx->tx_mbhead = NULL; 1565 bus_dmamap_unload(sc->sc_dmat, tx->tx_dmamap); 1566 tx->tx_dpd->dpd_fsh = tx->tx_dpd->dpd_nextptr = 0; 1567 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1568 ((caddr_t)tx->tx_dpd - (caddr_t)sc->sc_dpd), 1569 sizeof (struct ex_dpd), 1570 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1571 } 1572 sc->tx_tail = sc->tx_head = NULL; 1573 ex_init_txdescs(sc); 1574 1575 sc->rx_tail = sc->rx_head = 0; 1576 for (i = 0; i < EX_NUPD; i++) { 1577 rx = &sc->sc_rxdescs[i]; 1578 if (rx->rx_mbhead != NULL) { 1579 bus_dmamap_unload(sc->sc_dmat, rx->rx_dmamap); 1580 m_freem(rx->rx_mbhead); 1581 rx->rx_mbhead = NULL; 1582 } 1583 ex_add_rxbuf(sc, rx); 1584 } 1585 1586 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | INTR_LATCH); 1587 1588 callout_stop(&sc->ex_mii_callout); 1589 if (sc->ex_conf & EX_CONF_MII) 1590 mii_down(&sc->ex_mii); 1591 1592 if (disable) 1593 ex_disable(sc); 1594 1595 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1596 sc->sc_if_flags = ifp->if_flags; 1597 ifp->if_timer = 0; 1598 } 1599 1600 static void 1601 ex_init_txdescs(sc) 1602 struct ex_softc *sc; 1603 { 1604 int i; 1605 1606 for (i = 0; i < EX_NDPD; i++) { 1607 sc->sc_txdescs[i].tx_dmamap = sc->sc_tx_dmamaps[i]; 1608 sc->sc_txdescs[i].tx_dpd = &sc->sc_dpd[i]; 1609 if (i < EX_NDPD - 1) 1610 sc->sc_txdescs[i].tx_next = &sc->sc_txdescs[i + 1]; 1611 else 1612 sc->sc_txdescs[i].tx_next = NULL; 1613 } 1614 sc->tx_free = &sc->sc_txdescs[0]; 1615 sc->tx_ftail = &sc->sc_txdescs[EX_NDPD-1]; 1616 } 1617 1618 1619 int 1620 ex_activate(self, act) 1621 struct device *self; 1622 enum devact act; 1623 { 1624 struct ex_softc *sc = (void *) self; 1625 int s, error = 0; 1626 1627 s = splnet(); 1628 switch (act) { 1629 case DVACT_ACTIVATE: 1630 error = EOPNOTSUPP; 1631 break; 1632 1633 case DVACT_DEACTIVATE: 1634 if (sc->ex_conf & EX_CONF_MII) 1635 mii_activate(&sc->ex_mii, act, MII_PHY_ANY, 1636 MII_OFFSET_ANY); 1637 if_deactivate(&sc->sc_ethercom.ec_if); 1638 break; 1639 } 1640 splx(s); 1641 1642 return (error); 1643 } 1644 1645 int 1646 ex_detach(sc) 1647 struct ex_softc *sc; 1648 { 1649 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1650 struct ex_rxdesc *rxd; 1651 int i; 1652 1653 /* Succeed now if there's no work to do. */ 1654 if ((sc->ex_flags & EX_FLAGS_ATTACHED) == 0) 1655 return (0); 1656 1657 /* Unhook our tick handler. */ 1658 callout_stop(&sc->ex_mii_callout); 1659 1660 if (sc->ex_conf & EX_CONF_MII) { 1661 /* Detach all PHYs */ 1662 mii_detach(&sc->ex_mii, MII_PHY_ANY, MII_OFFSET_ANY); 1663 } 1664 1665 /* Delete all remaining media. */ 1666 ifmedia_delete_instance(&sc->ex_mii.mii_media, IFM_INST_ANY); 1667 1668 #if NRND > 0 1669 rnd_detach_source(&sc->rnd_source); 1670 #endif 1671 ether_ifdetach(ifp); 1672 if_detach(ifp); 1673 1674 for (i = 0; i < EX_NUPD; i++) { 1675 rxd = &sc->sc_rxdescs[i]; 1676 if (rxd->rx_mbhead != NULL) { 1677 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap); 1678 m_freem(rxd->rx_mbhead); 1679 rxd->rx_mbhead = NULL; 1680 } 1681 } 1682 for (i = 0; i < EX_NUPD; i++) 1683 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]); 1684 for (i = 0; i < EX_NDPD; i++) 1685 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]); 1686 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap); 1687 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap); 1688 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd, 1689 EX_NDPD * sizeof (struct ex_dpd)); 1690 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg); 1691 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap); 1692 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap); 1693 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd, 1694 EX_NUPD * sizeof (struct ex_upd)); 1695 bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg); 1696 1697 shutdownhook_disestablish(sc->sc_sdhook); 1698 powerhook_disestablish(sc->sc_powerhook); 1699 1700 return (0); 1701 } 1702 1703 /* 1704 * Before reboots, reset card completely. 1705 */ 1706 static void 1707 ex_shutdown(arg) 1708 void *arg; 1709 { 1710 struct ex_softc *sc = arg; 1711 1712 ex_stop(&sc->sc_ethercom.ec_if, 1); 1713 /* 1714 * Make sure the interface is powered up when we reboot, 1715 * otherwise firmware on some systems gets really confused. 1716 */ 1717 (void) ex_enable(sc); 1718 } 1719 1720 /* 1721 * Read EEPROM data. 1722 * XXX what to do if EEPROM doesn't unbusy? 1723 */ 1724 u_int16_t 1725 ex_read_eeprom(sc, offset) 1726 struct ex_softc *sc; 1727 int offset; 1728 { 1729 bus_space_tag_t iot = sc->sc_iot; 1730 bus_space_handle_t ioh = sc->sc_ioh; 1731 u_int16_t data = 0, cmd = READ_EEPROM; 1732 int off; 1733 1734 off = sc->ex_conf & EX_CONF_EEPROM_OFF ? 0x30 : 0; 1735 cmd = sc->ex_conf & EX_CONF_EEPROM_8BIT ? READ_EEPROM8 : READ_EEPROM; 1736 1737 GO_WINDOW(0); 1738 if (ex_eeprom_busy(sc)) 1739 goto out; 1740 bus_space_write_2(iot, ioh, ELINK_W0_EEPROM_COMMAND, 1741 cmd | (off + (offset & 0x3f))); 1742 if (ex_eeprom_busy(sc)) 1743 goto out; 1744 data = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_DATA); 1745 out: 1746 return data; 1747 } 1748 1749 static int 1750 ex_eeprom_busy(sc) 1751 struct ex_softc *sc; 1752 { 1753 bus_space_tag_t iot = sc->sc_iot; 1754 bus_space_handle_t ioh = sc->sc_ioh; 1755 int i = 100; 1756 1757 while (i--) { 1758 if (!(bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND) & 1759 EEPROM_BUSY)) 1760 return 0; 1761 delay(100); 1762 } 1763 printf("\n%s: eeprom stays busy.\n", sc->sc_dev.dv_xname); 1764 return (1); 1765 } 1766 1767 /* 1768 * Create a new rx buffer and add it to the 'soft' rx list. 1769 */ 1770 static int 1771 ex_add_rxbuf(sc, rxd) 1772 struct ex_softc *sc; 1773 struct ex_rxdesc *rxd; 1774 { 1775 struct mbuf *m, *oldm; 1776 bus_dmamap_t rxmap; 1777 int error, rval = 0; 1778 1779 oldm = rxd->rx_mbhead; 1780 rxmap = rxd->rx_dmamap; 1781 1782 MGETHDR(m, M_DONTWAIT, MT_DATA); 1783 if (m != NULL) { 1784 MCLGET(m, M_DONTWAIT); 1785 if ((m->m_flags & M_EXT) == 0) { 1786 m_freem(m); 1787 if (oldm == NULL) 1788 return 1; 1789 m = oldm; 1790 MRESETDATA(m); 1791 rval = 1; 1792 } 1793 } else { 1794 if (oldm == NULL) 1795 return 1; 1796 m = oldm; 1797 MRESETDATA(m); 1798 rval = 1; 1799 } 1800 1801 /* 1802 * Setup the DMA map for this receive buffer. 1803 */ 1804 if (m != oldm) { 1805 if (oldm != NULL) 1806 bus_dmamap_unload(sc->sc_dmat, rxmap); 1807 error = bus_dmamap_load(sc->sc_dmat, rxmap, 1808 m->m_ext.ext_buf, MCLBYTES, NULL, 1809 BUS_DMA_READ|BUS_DMA_NOWAIT); 1810 if (error) { 1811 printf("%s: can't load rx buffer, error = %d\n", 1812 sc->sc_dev.dv_xname, error); 1813 panic("ex_add_rxbuf"); /* XXX */ 1814 } 1815 } 1816 1817 /* 1818 * Align for data after 14 byte header. 1819 */ 1820 m->m_data += 2; 1821 1822 rxd->rx_mbhead = m; 1823 rxd->rx_upd->upd_pktstatus = htole32(MCLBYTES - 2); 1824 rxd->rx_upd->upd_frags[0].fr_addr = 1825 htole32(rxmap->dm_segs[0].ds_addr + 2); 1826 rxd->rx_upd->upd_nextptr = 0; 1827 1828 /* 1829 * Attach it to the end of the list. 1830 */ 1831 if (sc->rx_head != NULL) { 1832 sc->rx_tail->rx_next = rxd; 1833 sc->rx_tail->rx_upd->upd_nextptr = htole32(sc->sc_upddma + 1834 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd)); 1835 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1836 (caddr_t)sc->rx_tail->rx_upd - (caddr_t)sc->sc_upd, 1837 sizeof (struct ex_upd), 1838 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1839 } else { 1840 sc->rx_head = rxd; 1841 } 1842 sc->rx_tail = rxd; 1843 1844 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, rxmap->dm_mapsize, 1845 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1846 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1847 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd), 1848 sizeof (struct ex_upd), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1849 return (rval); 1850 } 1851 1852 u_int32_t 1853 ex_mii_bitbang_read(self) 1854 struct device *self; 1855 { 1856 struct ex_softc *sc = (void *) self; 1857 1858 /* We're already in Window 4. */ 1859 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT)); 1860 } 1861 1862 void 1863 ex_mii_bitbang_write(self, val) 1864 struct device *self; 1865 u_int32_t val; 1866 { 1867 struct ex_softc *sc = (void *) self; 1868 1869 /* We're already in Window 4. */ 1870 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT, val); 1871 } 1872 1873 int 1874 ex_mii_readreg(v, phy, reg) 1875 struct device *v; 1876 int phy, reg; 1877 { 1878 struct ex_softc *sc = (struct ex_softc *)v; 1879 int val; 1880 1881 if ((sc->ex_conf & EX_CONF_INTPHY) && phy != ELINK_INTPHY_ID) 1882 return 0; 1883 1884 GO_WINDOW(4); 1885 1886 val = mii_bitbang_readreg(v, &ex_mii_bitbang_ops, phy, reg); 1887 1888 GO_WINDOW(1); 1889 1890 return (val); 1891 } 1892 1893 void 1894 ex_mii_writereg(v, phy, reg, data) 1895 struct device *v; 1896 int phy; 1897 int reg; 1898 int data; 1899 { 1900 struct ex_softc *sc = (struct ex_softc *)v; 1901 1902 GO_WINDOW(4); 1903 1904 mii_bitbang_writereg(v, &ex_mii_bitbang_ops, phy, reg, data); 1905 1906 GO_WINDOW(1); 1907 } 1908 1909 void 1910 ex_mii_statchg(v) 1911 struct device *v; 1912 { 1913 struct ex_softc *sc = (struct ex_softc *)v; 1914 bus_space_tag_t iot = sc->sc_iot; 1915 bus_space_handle_t ioh = sc->sc_ioh; 1916 int mctl; 1917 1918 GO_WINDOW(3); 1919 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1920 if (sc->ex_mii.mii_media_active & IFM_FDX) 1921 mctl |= MAC_CONTROL_FDX; 1922 else 1923 mctl &= ~MAC_CONTROL_FDX; 1924 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1925 GO_WINDOW(1); /* back to operating window */ 1926 } 1927 1928 int 1929 ex_enable(sc) 1930 struct ex_softc *sc; 1931 { 1932 if (sc->enabled == 0 && sc->enable != NULL) { 1933 if ((*sc->enable)(sc) != 0) { 1934 printf("%s: de/vice enable failed\n", 1935 sc->sc_dev.dv_xname); 1936 return (EIO); 1937 } 1938 sc->enabled = 1; 1939 } 1940 return (0); 1941 } 1942 1943 void 1944 ex_disable(sc) 1945 struct ex_softc *sc; 1946 { 1947 if (sc->enabled == 1 && sc->disable != NULL) { 1948 (*sc->disable)(sc); 1949 sc->enabled = 0; 1950 } 1951 } 1952 1953 void 1954 ex_power(why, arg) 1955 int why; 1956 void *arg; 1957 { 1958 struct ex_softc *sc = (void *)arg; 1959 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1960 int s; 1961 1962 s = splnet(); 1963 switch (why) { 1964 case PWR_SUSPEND: 1965 case PWR_STANDBY: 1966 ex_stop(ifp, 0); 1967 if (sc->power != NULL) 1968 (*sc->power)(sc, why); 1969 break; 1970 case PWR_RESUME: 1971 if (ifp->if_flags & IFF_UP) { 1972 if (sc->power != NULL) 1973 (*sc->power)(sc, why); 1974 ex_init(ifp); 1975 } 1976 break; 1977 case PWR_SOFTSUSPEND: 1978 case PWR_SOFTSTANDBY: 1979 case PWR_SOFTRESUME: 1980 break; 1981 } 1982 splx(s); 1983 } 1984
Indexes created Tue Oct 21 08:09:48 GMT 2025