elinkxl.c revision 1.88.8.1
1 /* $NetBSD: elinkxl.c,v 1.88.8.1 2006/10/22 06:05:44 yamt Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Frank van der Linden. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: elinkxl.c,v 1.88.8.1 2006/10/22 06:05:44 yamt Exp $"); 41 42 #include "bpfilter.h" 43 #include "rnd.h" 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/callout.h> 48 #include <sys/kernel.h> 49 #include <sys/mbuf.h> 50 #include <sys/socket.h> 51 #include <sys/ioctl.h> 52 #include <sys/errno.h> 53 #include <sys/syslog.h> 54 #include <sys/select.h> 55 #include <sys/device.h> 56 #if NRND > 0 57 #include <sys/rnd.h> 58 #endif 59 60 #include <uvm/uvm_extern.h> 61 62 #include <net/if.h> 63 #include <net/if_dl.h> 64 #include <net/if_ether.h> 65 #include <net/if_media.h> 66 67 #if NBPFILTER > 0 68 #include <net/bpf.h> 69 #include <net/bpfdesc.h> 70 #endif 71 72 #include <machine/cpu.h> 73 #include <machine/bus.h> 74 #include <machine/intr.h> 75 #include <machine/endian.h> 76 77 #include <dev/mii/miivar.h> 78 #include <dev/mii/mii.h> 79 #include <dev/mii/mii_bitbang.h> 80 81 #include <dev/ic/elink3reg.h> 82 /* #include <dev/ic/elink3var.h> */ 83 #include <dev/ic/elinkxlreg.h> 84 #include <dev/ic/elinkxlvar.h> 85 86 #ifdef DEBUG 87 int exdebug = 0; 88 #endif 89 90 /* ifmedia callbacks */ 91 int ex_media_chg(struct ifnet *ifp); 92 void ex_media_stat(struct ifnet *ifp, struct ifmediareq *req); 93 94 void ex_probe_media(struct ex_softc *); 95 void ex_set_filter(struct ex_softc *); 96 void ex_set_media(struct ex_softc *); 97 void ex_set_xcvr(struct ex_softc *, u_int16_t); 98 struct mbuf *ex_get(struct ex_softc *, int); 99 u_int16_t ex_read_eeprom(struct ex_softc *, int); 100 int ex_init(struct ifnet *); 101 void ex_read(struct ex_softc *); 102 void ex_reset(struct ex_softc *); 103 void ex_set_mc(struct ex_softc *); 104 void ex_getstats(struct ex_softc *); 105 void ex_printstats(struct ex_softc *); 106 void ex_tick(void *); 107 108 void ex_power(int, void *); 109 110 static int ex_eeprom_busy(struct ex_softc *); 111 static int ex_add_rxbuf(struct ex_softc *, struct ex_rxdesc *); 112 static void ex_init_txdescs(struct ex_softc *); 113 114 static void ex_shutdown(void *); 115 static void ex_start(struct ifnet *); 116 static void ex_txstat(struct ex_softc *); 117 118 int ex_mii_readreg(struct device *, int, int); 119 void ex_mii_writereg(struct device *, int, int, int); 120 void ex_mii_statchg(struct device *); 121 122 void ex_probemedia(struct ex_softc *); 123 124 /* 125 * Structure to map media-present bits in boards to ifmedia codes and 126 * printable media names. Used for table-driven ifmedia initialization. 127 */ 128 struct ex_media { 129 int exm_mpbit; /* media present bit */ 130 const char *exm_name; /* name of medium */ 131 int exm_ifmedia; /* ifmedia word for medium */ 132 int exm_epmedia; /* ELINKMEDIA_* constant */ 133 }; 134 135 /* 136 * Media table for 3c90x chips. Note that chips with MII have no 137 * `native' media. 138 */ 139 struct ex_media ex_native_media[] = { 140 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 141 ELINKMEDIA_10BASE_T }, 142 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 143 ELINKMEDIA_10BASE_T }, 144 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 145 ELINKMEDIA_AUI }, 146 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 147 ELINKMEDIA_10BASE_2 }, 148 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 149 ELINKMEDIA_100BASE_TX }, 150 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 151 ELINKMEDIA_100BASE_TX }, 152 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 153 ELINKMEDIA_100BASE_FX }, 154 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 155 ELINKMEDIA_MII }, 156 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 157 ELINKMEDIA_100BASE_T4 }, 158 { 0, NULL, 0, 159 0 }, 160 }; 161 162 /* 163 * MII bit-bang glue. 164 */ 165 u_int32_t ex_mii_bitbang_read(struct device *); 166 void ex_mii_bitbang_write(struct device *, u_int32_t); 167 168 const struct mii_bitbang_ops ex_mii_bitbang_ops = { 169 ex_mii_bitbang_read, 170 ex_mii_bitbang_write, 171 { 172 ELINK_PHY_DATA, /* MII_BIT_MDO */ 173 ELINK_PHY_DATA, /* MII_BIT_MDI */ 174 ELINK_PHY_CLK, /* MII_BIT_MDC */ 175 ELINK_PHY_DIR, /* MII_BIT_DIR_HOST_PHY */ 176 0, /* MII_BIT_DIR_PHY_HOST */ 177 } 178 }; 179 180 /* 181 * Back-end attach and configure. 182 */ 183 void 184 ex_config(sc) 185 struct ex_softc *sc; 186 { 187 struct ifnet *ifp; 188 u_int16_t val; 189 u_int8_t macaddr[ETHER_ADDR_LEN] = {0}; 190 bus_space_tag_t iot = sc->sc_iot; 191 bus_space_handle_t ioh = sc->sc_ioh; 192 int i, error, attach_stage; 193 194 callout_init(&sc->ex_mii_callout); 195 196 ex_reset(sc); 197 198 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR0); 199 macaddr[0] = val >> 8; 200 macaddr[1] = val & 0xff; 201 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR1); 202 macaddr[2] = val >> 8; 203 macaddr[3] = val & 0xff; 204 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR2); 205 macaddr[4] = val >> 8; 206 macaddr[5] = val & 0xff; 207 208 aprint_normal("%s: MAC address %s\n", sc->sc_dev.dv_xname, 209 ether_sprintf(macaddr)); 210 211 if (sc->ex_conf & (EX_CONF_INV_LED_POLARITY|EX_CONF_PHY_POWER)) { 212 GO_WINDOW(2); 213 val = bus_space_read_2(iot, ioh, ELINK_W2_RESET_OPTIONS); 214 if (sc->ex_conf & EX_CONF_INV_LED_POLARITY) 215 val |= ELINK_RESET_OPT_LEDPOLAR; 216 if (sc->ex_conf & EX_CONF_PHY_POWER) 217 val |= ELINK_RESET_OPT_PHYPOWER; 218 bus_space_write_2(iot, ioh, ELINK_W2_RESET_OPTIONS, val); 219 } 220 if (sc->ex_conf & EX_CONF_NO_XCVR_PWR) { 221 GO_WINDOW(0); 222 bus_space_write_2(iot, ioh, ELINK_W0_MFG_ID, 223 EX_XCVR_PWR_MAGICBITS); 224 } 225 226 attach_stage = 0; 227 228 /* 229 * Allocate the upload descriptors, and create and load the DMA 230 * map for them. 231 */ 232 if ((error = bus_dmamem_alloc(sc->sc_dmat, 233 EX_NUPD * sizeof (struct ex_upd), PAGE_SIZE, 0, &sc->sc_useg, 1, 234 &sc->sc_urseg, BUS_DMA_NOWAIT)) != 0) { 235 aprint_error( 236 "%s: can't allocate upload descriptors, error = %d\n", 237 sc->sc_dev.dv_xname, error); 238 goto fail; 239 } 240 241 attach_stage = 1; 242 243 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg, 244 EX_NUPD * sizeof (struct ex_upd), (caddr_t *)&sc->sc_upd, 245 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 246 aprint_error("%s: can't map upload descriptors, error = %d\n", 247 sc->sc_dev.dv_xname, error); 248 goto fail; 249 } 250 251 attach_stage = 2; 252 253 if ((error = bus_dmamap_create(sc->sc_dmat, 254 EX_NUPD * sizeof (struct ex_upd), 1, 255 EX_NUPD * sizeof (struct ex_upd), 0, BUS_DMA_NOWAIT, 256 &sc->sc_upd_dmamap)) != 0) { 257 aprint_error( 258 "%s: can't create upload desc. DMA map, error = %d\n", 259 sc->sc_dev.dv_xname, error); 260 goto fail; 261 } 262 263 attach_stage = 3; 264 265 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_upd_dmamap, 266 sc->sc_upd, EX_NUPD * sizeof (struct ex_upd), NULL, 267 BUS_DMA_NOWAIT)) != 0) { 268 aprint_error( 269 "%s: can't load upload desc. DMA map, error = %d\n", 270 sc->sc_dev.dv_xname, error); 271 goto fail; 272 } 273 274 attach_stage = 4; 275 276 /* 277 * Allocate the download descriptors, and create and load the DMA 278 * map for them. 279 */ 280 if ((error = bus_dmamem_alloc(sc->sc_dmat, 281 EX_NDPD * sizeof (struct ex_dpd), PAGE_SIZE, 0, &sc->sc_dseg, 1, 282 &sc->sc_drseg, BUS_DMA_NOWAIT)) != 0) { 283 aprint_error( 284 "%s: can't allocate download descriptors, error = %d\n", 285 sc->sc_dev.dv_xname, error); 286 goto fail; 287 } 288 289 attach_stage = 5; 290 291 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg, 292 EX_NDPD * sizeof (struct ex_dpd), (caddr_t *)&sc->sc_dpd, 293 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 294 aprint_error("%s: can't map download descriptors, error = %d\n", 295 sc->sc_dev.dv_xname, error); 296 goto fail; 297 } 298 memset(sc->sc_dpd, 0, EX_NDPD * sizeof (struct ex_dpd)); 299 300 attach_stage = 6; 301 302 if ((error = bus_dmamap_create(sc->sc_dmat, 303 EX_NDPD * sizeof (struct ex_dpd), 1, 304 EX_NDPD * sizeof (struct ex_dpd), 0, BUS_DMA_NOWAIT, 305 &sc->sc_dpd_dmamap)) != 0) { 306 aprint_error( 307 "%s: can't create download desc. DMA map, error = %d\n", 308 sc->sc_dev.dv_xname, error); 309 goto fail; 310 } 311 312 attach_stage = 7; 313 314 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dpd_dmamap, 315 sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd), NULL, 316 BUS_DMA_NOWAIT)) != 0) { 317 aprint_error( 318 "%s: can't load download desc. DMA map, error = %d\n", 319 sc->sc_dev.dv_xname, error); 320 goto fail; 321 } 322 323 attach_stage = 8; 324 325 326 /* 327 * Create the transmit buffer DMA maps. 328 */ 329 for (i = 0; i < EX_NDPD; i++) { 330 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 331 EX_NTFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 332 &sc->sc_tx_dmamaps[i])) != 0) { 333 aprint_error( 334 "%s: can't create tx DMA map %d, error = %d\n", 335 sc->sc_dev.dv_xname, i, error); 336 goto fail; 337 } 338 } 339 340 attach_stage = 9; 341 342 /* 343 * Create the receive buffer DMA maps. 344 */ 345 for (i = 0; i < EX_NUPD; i++) { 346 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 347 EX_NRFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 348 &sc->sc_rx_dmamaps[i])) != 0) { 349 aprint_error( 350 "%s: can't create rx DMA map %d, error = %d\n", 351 sc->sc_dev.dv_xname, i, error); 352 goto fail; 353 } 354 } 355 356 attach_stage = 10; 357 358 /* 359 * Create ring of upload descriptors, only once. The DMA engine 360 * will loop over this when receiving packets, stalling if it 361 * hits an UPD with a finished receive. 362 */ 363 for (i = 0; i < EX_NUPD; i++) { 364 sc->sc_rxdescs[i].rx_dmamap = sc->sc_rx_dmamaps[i]; 365 sc->sc_rxdescs[i].rx_upd = &sc->sc_upd[i]; 366 sc->sc_upd[i].upd_frags[0].fr_len = 367 htole32((MCLBYTES - 2) | EX_FR_LAST); 368 if (ex_add_rxbuf(sc, &sc->sc_rxdescs[i]) != 0) { 369 aprint_error("%s: can't allocate or map rx buffers\n", 370 sc->sc_dev.dv_xname); 371 goto fail; 372 } 373 } 374 375 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 0, 376 EX_NUPD * sizeof (struct ex_upd), 377 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 378 379 ex_init_txdescs(sc); 380 381 attach_stage = 11; 382 383 384 GO_WINDOW(3); 385 val = bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS); 386 if (val & ELINK_MEDIACAP_MII) 387 sc->ex_conf |= EX_CONF_MII; 388 389 ifp = &sc->sc_ethercom.ec_if; 390 391 /* 392 * Initialize our media structures and MII info. We'll 393 * probe the MII if we discover that we have one. 394 */ 395 sc->ex_mii.mii_ifp = ifp; 396 sc->ex_mii.mii_readreg = ex_mii_readreg; 397 sc->ex_mii.mii_writereg = ex_mii_writereg; 398 sc->ex_mii.mii_statchg = ex_mii_statchg; 399 ifmedia_init(&sc->ex_mii.mii_media, IFM_IMASK, ex_media_chg, 400 ex_media_stat); 401 402 if (sc->ex_conf & EX_CONF_MII) { 403 /* 404 * Find PHY, extract media information from it. 405 * First, select the right transceiver. 406 */ 407 ex_set_xcvr(sc, val); 408 409 mii_attach(&sc->sc_dev, &sc->ex_mii, 0xffffffff, 410 MII_PHY_ANY, MII_OFFSET_ANY, 0); 411 if (LIST_FIRST(&sc->ex_mii.mii_phys) == NULL) { 412 ifmedia_add(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE, 413 0, NULL); 414 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE); 415 } else { 416 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_AUTO); 417 } 418 } else 419 ex_probemedia(sc); 420 421 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 422 ifp->if_softc = sc; 423 ifp->if_start = ex_start; 424 ifp->if_ioctl = ex_ioctl; 425 ifp->if_watchdog = ex_watchdog; 426 ifp->if_init = ex_init; 427 ifp->if_stop = ex_stop; 428 ifp->if_flags = 429 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 430 sc->sc_if_flags = ifp->if_flags; 431 IFQ_SET_READY(&ifp->if_snd); 432 433 /* 434 * We can support 802.1Q VLAN-sized frames. 435 */ 436 sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU; 437 438 /* 439 * The 3c90xB has hardware IPv4/TCPv4/UDPv4 checksum support. 440 */ 441 if (sc->ex_conf & EX_CONF_90XB) 442 sc->sc_ethercom.ec_if.if_capabilities |= 443 IFCAP_CSUM_IPv4_Tx | IFCAP_CSUM_IPv4_Rx | 444 IFCAP_CSUM_TCPv4_Tx | IFCAP_CSUM_TCPv4_Rx | 445 IFCAP_CSUM_UDPv4_Tx | IFCAP_CSUM_UDPv4_Rx; 446 447 if_attach(ifp); 448 ether_ifattach(ifp, macaddr); 449 450 GO_WINDOW(1); 451 452 sc->tx_start_thresh = 20; 453 sc->tx_succ_ok = 0; 454 455 /* TODO: set queues to 0 */ 456 457 #if NRND > 0 458 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 459 RND_TYPE_NET, 0); 460 #endif 461 462 /* Establish callback to reset card when we reboot. */ 463 sc->sc_sdhook = shutdownhook_establish(ex_shutdown, sc); 464 if (sc->sc_sdhook == NULL) 465 aprint_error("%s: WARNING: unable to establish shutdown hook\n", 466 sc->sc_dev.dv_xname); 467 468 /* Add a suspend hook to make sure we come back up after a resume. */ 469 sc->sc_powerhook = powerhook_establish(sc->sc_dev.dv_xname, 470 ex_power, sc); 471 if (sc->sc_powerhook == NULL) 472 aprint_error("%s: WARNING: unable to establish power hook\n", 473 sc->sc_dev.dv_xname); 474 475 /* The attach is successful. */ 476 sc->ex_flags |= EX_FLAGS_ATTACHED; 477 return; 478 479 fail: 480 /* 481 * Free any resources we've allocated during the failed attach 482 * attempt. Do this in reverse order and fall though. 483 */ 484 switch (attach_stage) { 485 case 11: 486 { 487 struct ex_rxdesc *rxd; 488 489 for (i = 0; i < EX_NUPD; i++) { 490 rxd = &sc->sc_rxdescs[i]; 491 if (rxd->rx_mbhead != NULL) { 492 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap); 493 m_freem(rxd->rx_mbhead); 494 } 495 } 496 } 497 /* FALLTHROUGH */ 498 499 case 10: 500 for (i = 0; i < EX_NUPD; i++) 501 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]); 502 /* FALLTHROUGH */ 503 504 case 9: 505 for (i = 0; i < EX_NDPD; i++) 506 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]); 507 /* FALLTHROUGH */ 508 case 8: 509 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap); 510 /* FALLTHROUGH */ 511 512 case 7: 513 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap); 514 /* FALLTHROUGH */ 515 516 case 6: 517 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd, 518 EX_NDPD * sizeof (struct ex_dpd)); 519 /* FALLTHROUGH */ 520 521 case 5: 522 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg); 523 break; 524 525 case 4: 526 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap); 527 /* FALLTHROUGH */ 528 529 case 3: 530 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap); 531 /* FALLTHROUGH */ 532 533 case 2: 534 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd, 535 EX_NUPD * sizeof (struct ex_upd)); 536 /* FALLTHROUGH */ 537 538 case 1: 539 bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg); 540 break; 541 } 542 543 } 544 545 /* 546 * Find the media present on non-MII chips. 547 */ 548 void 549 ex_probemedia(sc) 550 struct ex_softc *sc; 551 { 552 bus_space_tag_t iot = sc->sc_iot; 553 bus_space_handle_t ioh = sc->sc_ioh; 554 struct ifmedia *ifm = &sc->ex_mii.mii_media; 555 struct ex_media *exm; 556 u_int16_t config1, reset_options, default_media; 557 int defmedia = 0; 558 const char *sep = "", *defmedianame = NULL; 559 560 GO_WINDOW(3); 561 config1 = bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2); 562 reset_options = bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 563 GO_WINDOW(0); 564 565 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 566 567 aprint_normal("%s: ", sc->sc_dev.dv_xname); 568 569 /* Sanity check that there are any media! */ 570 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 571 aprint_error("no media present!\n"); 572 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 573 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 574 return; 575 } 576 577 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", " 578 579 for (exm = ex_native_media; exm->exm_name != NULL; exm++) { 580 if (reset_options & exm->exm_mpbit) { 581 /* 582 * Default media is a little complicated. We 583 * support full-duplex which uses the same 584 * reset options bit. 585 * 586 * XXX Check EEPROM for default to FDX? 587 */ 588 if (exm->exm_epmedia == default_media) { 589 if ((exm->exm_ifmedia & IFM_FDX) == 0) { 590 defmedia = exm->exm_ifmedia; 591 defmedianame = exm->exm_name; 592 } 593 } else if (defmedia == 0) { 594 defmedia = exm->exm_ifmedia; 595 defmedianame = exm->exm_name; 596 } 597 ifmedia_add(ifm, exm->exm_ifmedia, exm->exm_epmedia, 598 NULL); 599 PRINT(exm->exm_name); 600 } 601 } 602 603 #undef PRINT 604 605 #ifdef DIAGNOSTIC 606 if (defmedia == 0) 607 panic("ex_probemedia: impossible"); 608 #endif 609 610 aprint_normal(", default %s\n", defmedianame); 611 ifmedia_set(ifm, defmedia); 612 } 613 614 /* 615 * Bring device up. 616 */ 617 int 618 ex_init(ifp) 619 struct ifnet *ifp; 620 { 621 struct ex_softc *sc = ifp->if_softc; 622 bus_space_tag_t iot = sc->sc_iot; 623 bus_space_handle_t ioh = sc->sc_ioh; 624 int i; 625 int error = 0; 626 627 if ((error = ex_enable(sc)) != 0) 628 goto out; 629 630 ex_waitcmd(sc); 631 ex_stop(ifp, 0); 632 633 /* 634 * Set the station address and clear the station mask. The latter 635 * is needed for 90x cards, 0 is the default for 90xB cards. 636 */ 637 GO_WINDOW(2); 638 for (i = 0; i < ETHER_ADDR_LEN; i++) { 639 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 640 LLADDR(ifp->if_sadl)[i]); 641 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 642 } 643 644 GO_WINDOW(3); 645 646 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_RESET); 647 ex_waitcmd(sc); 648 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_RESET); 649 ex_waitcmd(sc); 650 651 /* 652 * Disable reclaim threshold for 90xB, set free threshold to 653 * 6 * 256 = 1536 for 90x. 654 */ 655 if (sc->ex_conf & EX_CONF_90XB) 656 bus_space_write_2(iot, ioh, ELINK_COMMAND, 657 ELINK_TXRECLTHRESH | 255); 658 else 659 bus_space_write_1(iot, ioh, ELINK_TXFREETHRESH, 6); 660 661 bus_space_write_2(iot, ioh, ELINK_COMMAND, 662 SET_RX_EARLY_THRESH | ELINK_THRESH_DISABLE); 663 664 bus_space_write_4(iot, ioh, ELINK_DMACTRL, 665 bus_space_read_4(iot, ioh, ELINK_DMACTRL) | ELINK_DMAC_UPRXEAREN); 666 667 bus_space_write_2(iot, ioh, ELINK_COMMAND, 668 SET_RD_0_MASK | XL_WATCHED_INTERRUPTS); 669 bus_space_write_2(iot, ioh, ELINK_COMMAND, 670 SET_INTR_MASK | XL_WATCHED_INTERRUPTS); 671 672 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 673 if (sc->intr_ack) 674 (* sc->intr_ack)(sc); 675 ex_set_media(sc); 676 ex_set_mc(sc); 677 678 679 bus_space_write_2(iot, ioh, ELINK_COMMAND, STATS_ENABLE); 680 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 681 bus_space_write_4(iot, ioh, ELINK_UPLISTPTR, sc->sc_upddma); 682 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 683 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_UPUNSTALL); 684 685 if (sc->ex_conf & (EX_CONF_PHY_POWER | EX_CONF_INV_LED_POLARITY)) { 686 u_int16_t cbcard_config; 687 688 GO_WINDOW(2); 689 cbcard_config = bus_space_read_2(sc->sc_iot, sc->sc_ioh, 0x0c); 690 if (sc->ex_conf & EX_CONF_PHY_POWER) { 691 cbcard_config |= 0x4000; /* turn on PHY power */ 692 } 693 if (sc->ex_conf & EX_CONF_INV_LED_POLARITY) { 694 cbcard_config |= 0x0010; /* invert LED polarity */ 695 } 696 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 0x0c, cbcard_config); 697 698 GO_WINDOW(3); 699 } 700 701 ifp->if_flags |= IFF_RUNNING; 702 ifp->if_flags &= ~IFF_OACTIVE; 703 ex_start(ifp); 704 sc->sc_if_flags = ifp->if_flags; 705 706 GO_WINDOW(1); 707 708 callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc); 709 710 out: 711 if (error) { 712 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 713 ifp->if_timer = 0; 714 printf("%s: interface not running\n", sc->sc_dev.dv_xname); 715 } 716 return (error); 717 } 718 719 #define MCHASHSIZE 256 720 #define ex_mchash(addr) (ether_crc32_be((addr), ETHER_ADDR_LEN) & \ 721 (MCHASHSIZE - 1)) 722 723 /* 724 * Set multicast receive filter. Also take care of promiscuous mode 725 * here (XXX). 726 */ 727 void 728 ex_set_mc(sc) 729 struct ex_softc *sc; 730 { 731 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 732 struct ethercom *ec = &sc->sc_ethercom; 733 struct ether_multi *enm; 734 struct ether_multistep estep; 735 int i; 736 u_int16_t mask = FIL_INDIVIDUAL | FIL_BRDCST; 737 738 if (ifp->if_flags & IFF_PROMISC) { 739 mask |= FIL_PROMISC; 740 goto allmulti; 741 } 742 743 ETHER_FIRST_MULTI(estep, ec, enm); 744 if (enm == NULL) 745 goto nomulti; 746 747 if ((sc->ex_conf & EX_CONF_90XB) == 0) 748 /* No multicast hash filtering. */ 749 goto allmulti; 750 751 for (i = 0; i < MCHASHSIZE; i++) 752 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 753 ELINK_COMMAND, ELINK_CLEARHASHFILBIT | i); 754 755 do { 756 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 757 ETHER_ADDR_LEN) != 0) 758 goto allmulti; 759 760 i = ex_mchash(enm->enm_addrlo); 761 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 762 ELINK_COMMAND, ELINK_SETHASHFILBIT | i); 763 ETHER_NEXT_MULTI(estep, enm); 764 } while (enm != NULL); 765 mask |= FIL_MULTIHASH; 766 767 nomulti: 768 ifp->if_flags &= ~IFF_ALLMULTI; 769 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 770 SET_RX_FILTER | mask); 771 return; 772 773 allmulti: 774 ifp->if_flags |= IFF_ALLMULTI; 775 mask |= FIL_MULTICAST; 776 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 777 SET_RX_FILTER | mask); 778 } 779 780 781 static void 782 ex_txstat(sc) 783 struct ex_softc *sc; 784 { 785 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 786 bus_space_tag_t iot = sc->sc_iot; 787 bus_space_handle_t ioh = sc->sc_ioh; 788 int i; 789 790 /* 791 * We need to read+write TX_STATUS until we get a 0 status 792 * in order to turn off the interrupt flag. 793 * ELINK_TXSTATUS is in the upper byte of 2 with ELINK_TIMER 794 * XXX: Big Endian? Can we assume that TXSTATUS will be the 795 * upper byte? 796 */ 797 while ((i = bus_space_read_2(iot, ioh, ELINK_TIMER)) & TXS_COMPLETE) { 798 bus_space_write_2(iot, ioh, ELINK_TIMER, 0x0); 799 800 if (i & TXS_JABBER) { 801 ++sc->sc_ethercom.ec_if.if_oerrors; 802 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 803 printf("%s: jabber (%x)\n", 804 sc->sc_dev.dv_xname, i); 805 ex_init(ifp); 806 /* TODO: be more subtle here */ 807 } else if (i & TXS_UNDERRUN) { 808 ++sc->sc_ethercom.ec_if.if_oerrors; 809 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 810 printf("%s: fifo underrun (%x) @%d\n", 811 sc->sc_dev.dv_xname, i, 812 sc->tx_start_thresh); 813 if (sc->tx_succ_ok < 100) 814 sc->tx_start_thresh = min(ETHER_MAX_LEN, 815 sc->tx_start_thresh + 20); 816 sc->tx_succ_ok = 0; 817 ex_init(ifp); 818 /* TODO: be more subtle here */ 819 } else if (i & TXS_MAX_COLLISION) { 820 ++sc->sc_ethercom.ec_if.if_oerrors; 821 ++sc->sc_ethercom.ec_if.if_collisions; 822 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 823 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 824 } else if (sc->tx_succ_ok < 100) 825 sc->tx_succ_ok++; 826 } 827 } 828 829 int 830 ex_media_chg(ifp) 831 struct ifnet *ifp; 832 { 833 834 if (ifp->if_flags & IFF_UP) 835 ex_init(ifp); 836 return 0; 837 } 838 839 void 840 ex_set_xcvr(sc, media) 841 struct ex_softc *sc; 842 const u_int16_t media; 843 { 844 bus_space_tag_t iot = sc->sc_iot; 845 bus_space_handle_t ioh = sc->sc_ioh; 846 u_int32_t icfg; 847 848 /* 849 * We're already in Window 3 850 */ 851 icfg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 852 icfg &= ~(CONFIG_XCVR_SEL << 16); 853 if (media & (ELINK_MEDIACAP_MII | ELINK_MEDIACAP_100BASET4)) 854 icfg |= ELINKMEDIA_MII << (CONFIG_XCVR_SEL_SHIFT + 16); 855 if (media & ELINK_MEDIACAP_100BASETX) 856 icfg |= ELINKMEDIA_AUTO << (CONFIG_XCVR_SEL_SHIFT + 16); 857 if (media & ELINK_MEDIACAP_100BASEFX) 858 icfg |= ELINKMEDIA_100BASE_FX 859 << (CONFIG_XCVR_SEL_SHIFT + 16); 860 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, icfg); 861 } 862 863 void 864 ex_set_media(sc) 865 struct ex_softc *sc; 866 { 867 bus_space_tag_t iot = sc->sc_iot; 868 bus_space_handle_t ioh = sc->sc_ioh; 869 u_int32_t configreg; 870 871 if (((sc->ex_conf & EX_CONF_MII) && 872 (sc->ex_mii.mii_media_active & IFM_FDX)) 873 || (!(sc->ex_conf & EX_CONF_MII) && 874 (sc->ex_mii.mii_media.ifm_media & IFM_FDX))) { 875 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 876 MAC_CONTROL_FDX); 877 } else { 878 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 0); 879 } 880 881 /* 882 * If the device has MII, select it, and then tell the 883 * PHY which media to use. 884 */ 885 if (sc->ex_conf & EX_CONF_MII) { 886 u_int16_t val; 887 888 GO_WINDOW(3); 889 val = bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS); 890 ex_set_xcvr(sc, val); 891 mii_mediachg(&sc->ex_mii); 892 return; 893 } 894 895 GO_WINDOW(4); 896 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0); 897 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 898 delay(800); 899 900 /* 901 * Now turn on the selected media/transceiver. 902 */ 903 switch (IFM_SUBTYPE(sc->ex_mii.mii_media.ifm_cur->ifm_media)) { 904 case IFM_10_T: 905 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 906 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 907 break; 908 909 case IFM_10_2: 910 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 911 DELAY(800); 912 break; 913 914 case IFM_100_TX: 915 case IFM_100_FX: 916 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 917 LINKBEAT_ENABLE); 918 DELAY(800); 919 break; 920 921 case IFM_10_5: 922 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 923 SQE_ENABLE); 924 DELAY(800); 925 break; 926 927 case IFM_MANUAL: 928 break; 929 930 case IFM_NONE: 931 return; 932 933 default: 934 panic("ex_set_media: impossible"); 935 } 936 937 GO_WINDOW(3); 938 configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 939 940 configreg &= ~(CONFIG_MEDIAMASK << 16); 941 configreg |= (sc->ex_mii.mii_media.ifm_cur->ifm_data << 942 (CONFIG_MEDIAMASK_SHIFT + 16)); 943 944 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg); 945 } 946 947 /* 948 * Get currently-selected media from card. 949 * (if_media callback, may be called before interface is brought up). 950 */ 951 void 952 ex_media_stat(ifp, req) 953 struct ifnet *ifp; 954 struct ifmediareq *req; 955 { 956 struct ex_softc *sc = ifp->if_softc; 957 u_int16_t help; 958 959 if ((ifp->if_flags & (IFF_UP|IFF_RUNNING)) == (IFF_UP|IFF_RUNNING)) { 960 if (sc->ex_conf & EX_CONF_MII) { 961 mii_pollstat(&sc->ex_mii); 962 req->ifm_status = sc->ex_mii.mii_media_status; 963 req->ifm_active = sc->ex_mii.mii_media_active; 964 } else { 965 GO_WINDOW(4); 966 req->ifm_status = IFM_AVALID; 967 req->ifm_active = 968 sc->ex_mii.mii_media.ifm_cur->ifm_media; 969 help = bus_space_read_2(sc->sc_iot, sc->sc_ioh, 970 ELINK_W4_MEDIA_TYPE); 971 if (help & LINKBEAT_DETECT) 972 req->ifm_status |= IFM_ACTIVE; 973 GO_WINDOW(1); 974 } 975 } 976 } 977 978 979 980 /* 981 * Start outputting on the interface. 982 */ 983 static void 984 ex_start(ifp) 985 struct ifnet *ifp; 986 { 987 struct ex_softc *sc = ifp->if_softc; 988 bus_space_tag_t iot = sc->sc_iot; 989 bus_space_handle_t ioh = sc->sc_ioh; 990 volatile struct ex_fraghdr *fr = NULL; 991 volatile struct ex_dpd *dpd = NULL, *prevdpd = NULL; 992 struct ex_txdesc *txp; 993 struct mbuf *mb_head; 994 bus_dmamap_t dmamap; 995 int offset, totlen, segment, error; 996 u_int32_t csum_flags; 997 998 if (sc->tx_head || sc->tx_free == NULL) 999 return; 1000 1001 txp = NULL; 1002 1003 /* 1004 * We're finished if there is nothing more to add to the list or if 1005 * we're all filled up with buffers to transmit. 1006 */ 1007 while (sc->tx_free != NULL) { 1008 /* 1009 * Grab a packet to transmit. 1010 */ 1011 IFQ_DEQUEUE(&ifp->if_snd, mb_head); 1012 if (mb_head == NULL) 1013 break; 1014 1015 /* 1016 * Get pointer to next available tx desc. 1017 */ 1018 txp = sc->tx_free; 1019 dmamap = txp->tx_dmamap; 1020 1021 /* 1022 * Go through each of the mbufs in the chain and initialize 1023 * the transmit buffer descriptors with the physical address 1024 * and size of the mbuf. 1025 */ 1026 reload: 1027 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 1028 mb_head, BUS_DMA_WRITE|BUS_DMA_NOWAIT); 1029 switch (error) { 1030 case 0: 1031 /* Success. */ 1032 break; 1033 1034 case EFBIG: 1035 { 1036 struct mbuf *mn; 1037 1038 /* 1039 * We ran out of segments. We have to recopy this 1040 * mbuf chain first. Bail out if we can't get the 1041 * new buffers. 1042 */ 1043 printf("%s: too many segments, ", sc->sc_dev.dv_xname); 1044 1045 MGETHDR(mn, M_DONTWAIT, MT_DATA); 1046 if (mn == NULL) { 1047 m_freem(mb_head); 1048 printf("aborting\n"); 1049 goto out; 1050 } 1051 if (mb_head->m_pkthdr.len > MHLEN) { 1052 MCLGET(mn, M_DONTWAIT); 1053 if ((mn->m_flags & M_EXT) == 0) { 1054 m_freem(mn); 1055 m_freem(mb_head); 1056 printf("aborting\n"); 1057 goto out; 1058 } 1059 } 1060 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, 1061 mtod(mn, caddr_t)); 1062 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; 1063 m_freem(mb_head); 1064 mb_head = mn; 1065 printf("retrying\n"); 1066 goto reload; 1067 } 1068 1069 default: 1070 /* 1071 * Some other problem; report it. 1072 */ 1073 printf("%s: can't load mbuf chain, error = %d\n", 1074 sc->sc_dev.dv_xname, error); 1075 m_freem(mb_head); 1076 goto out; 1077 } 1078 1079 /* 1080 * remove our tx desc from freelist. 1081 */ 1082 sc->tx_free = txp->tx_next; 1083 txp->tx_next = NULL; 1084 1085 fr = &txp->tx_dpd->dpd_frags[0]; 1086 totlen = 0; 1087 for (segment = 0; segment < dmamap->dm_nsegs; segment++, fr++) { 1088 fr->fr_addr = htole32(dmamap->dm_segs[segment].ds_addr); 1089 fr->fr_len = htole32(dmamap->dm_segs[segment].ds_len); 1090 totlen += dmamap->dm_segs[segment].ds_len; 1091 } 1092 fr--; 1093 fr->fr_len |= htole32(EX_FR_LAST); 1094 txp->tx_mbhead = mb_head; 1095 1096 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 1097 BUS_DMASYNC_PREWRITE); 1098 1099 dpd = txp->tx_dpd; 1100 dpd->dpd_nextptr = 0; 1101 dpd->dpd_fsh = htole32(totlen); 1102 1103 /* Byte-swap constants so compiler can optimize. */ 1104 1105 if (sc->ex_conf & EX_CONF_90XB) { 1106 csum_flags = 0; 1107 1108 if (mb_head->m_pkthdr.csum_flags & M_CSUM_IPv4) 1109 csum_flags |= htole32(EX_DPD_IPCKSUM); 1110 1111 if (mb_head->m_pkthdr.csum_flags & M_CSUM_TCPv4) 1112 csum_flags |= htole32(EX_DPD_TCPCKSUM); 1113 else if (mb_head->m_pkthdr.csum_flags & M_CSUM_UDPv4) 1114 csum_flags |= htole32(EX_DPD_UDPCKSUM); 1115 1116 dpd->dpd_fsh |= csum_flags; 1117 } else { 1118 KDASSERT((mb_head->m_pkthdr.csum_flags & 1119 (M_CSUM_IPv4|M_CSUM_TCPv4|M_CSUM_UDPv4)) == 0); 1120 } 1121 1122 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1123 ((const char *)(intptr_t)dpd - (const char *)sc->sc_dpd), 1124 sizeof (struct ex_dpd), 1125 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1126 1127 /* 1128 * No need to stall the download engine, we know it's 1129 * not busy right now. 1130 * 1131 * Fix up pointers in both the "soft" tx and the physical 1132 * tx list. 1133 */ 1134 if (sc->tx_head != NULL) { 1135 prevdpd = sc->tx_tail->tx_dpd; 1136 offset = ((const char *)(intptr_t)prevdpd - (const char *)sc->sc_dpd); 1137 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1138 offset, sizeof (struct ex_dpd), 1139 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1140 prevdpd->dpd_nextptr = htole32(DPD_DMADDR(sc, txp)); 1141 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1142 offset, sizeof (struct ex_dpd), 1143 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1144 sc->tx_tail->tx_next = txp; 1145 sc->tx_tail = txp; 1146 } else { 1147 sc->tx_tail = sc->tx_head = txp; 1148 } 1149 1150 #if NBPFILTER > 0 1151 /* 1152 * Pass packet to bpf if there is a listener. 1153 */ 1154 if (ifp->if_bpf) 1155 bpf_mtap(ifp->if_bpf, mb_head); 1156 #endif 1157 } 1158 out: 1159 if (sc->tx_head) { 1160 sc->tx_tail->tx_dpd->dpd_fsh |= htole32(EX_DPD_DNIND); 1161 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1162 ((caddr_t)sc->tx_tail->tx_dpd - (caddr_t)sc->sc_dpd), 1163 sizeof (struct ex_dpd), 1164 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1165 ifp->if_flags |= IFF_OACTIVE; 1166 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_DNUNSTALL); 1167 bus_space_write_4(iot, ioh, ELINK_DNLISTPTR, 1168 DPD_DMADDR(sc, sc->tx_head)); 1169 1170 /* trigger watchdog */ 1171 ifp->if_timer = 5; 1172 } 1173 } 1174 1175 1176 int 1177 ex_intr(arg) 1178 void *arg; 1179 { 1180 struct ex_softc *sc = arg; 1181 bus_space_tag_t iot = sc->sc_iot; 1182 bus_space_handle_t ioh = sc->sc_ioh; 1183 u_int16_t stat; 1184 int ret = 0; 1185 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1186 1187 if ((ifp->if_flags & IFF_RUNNING) == 0 || 1188 !device_is_active(&sc->sc_dev)) 1189 return (0); 1190 1191 for (;;) { 1192 stat = bus_space_read_2(iot, ioh, ELINK_STATUS); 1193 1194 if ((stat & XL_WATCHED_INTERRUPTS) == 0) { 1195 if ((stat & INTR_LATCH) == 0) { 1196 #if 0 1197 printf("%s: intr latch cleared\n", 1198 sc->sc_dev.dv_xname); 1199 #endif 1200 break; 1201 } 1202 } 1203 1204 ret = 1; 1205 1206 /* 1207 * Acknowledge interrupts. 1208 */ 1209 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1210 (stat & (XL_WATCHED_INTERRUPTS | INTR_LATCH))); 1211 if (sc->intr_ack) 1212 (*sc->intr_ack)(sc); 1213 1214 if (stat & HOST_ERROR) { 1215 printf("%s: adapter failure (%x)\n", 1216 sc->sc_dev.dv_xname, stat); 1217 ex_reset(sc); 1218 ex_init(ifp); 1219 return 1; 1220 } 1221 if (stat & TX_COMPLETE) { 1222 ex_txstat(sc); 1223 } 1224 if (stat & UPD_STATS) { 1225 ex_getstats(sc); 1226 } 1227 if (stat & DN_COMPLETE) { 1228 struct ex_txdesc *txp, *ptxp = NULL; 1229 bus_dmamap_t txmap; 1230 1231 /* reset watchdog timer, was set in ex_start() */ 1232 ifp->if_timer = 0; 1233 1234 for (txp = sc->tx_head; txp != NULL; 1235 txp = txp->tx_next) { 1236 bus_dmamap_sync(sc->sc_dmat, 1237 sc->sc_dpd_dmamap, 1238 (caddr_t)txp->tx_dpd - (caddr_t)sc->sc_dpd, 1239 sizeof (struct ex_dpd), 1240 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1241 if (txp->tx_mbhead != NULL) { 1242 txmap = txp->tx_dmamap; 1243 bus_dmamap_sync(sc->sc_dmat, txmap, 1244 0, txmap->dm_mapsize, 1245 BUS_DMASYNC_POSTWRITE); 1246 bus_dmamap_unload(sc->sc_dmat, txmap); 1247 m_freem(txp->tx_mbhead); 1248 txp->tx_mbhead = NULL; 1249 } 1250 ptxp = txp; 1251 } 1252 1253 /* 1254 * Move finished tx buffers back to the tx free list. 1255 */ 1256 if (sc->tx_free) { 1257 sc->tx_ftail->tx_next = sc->tx_head; 1258 sc->tx_ftail = ptxp; 1259 } else 1260 sc->tx_ftail = sc->tx_free = sc->tx_head; 1261 1262 sc->tx_head = sc->tx_tail = NULL; 1263 ifp->if_flags &= ~IFF_OACTIVE; 1264 } 1265 1266 if (stat & UP_COMPLETE) { 1267 struct ex_rxdesc *rxd; 1268 struct mbuf *m; 1269 struct ex_upd *upd; 1270 bus_dmamap_t rxmap; 1271 u_int32_t pktstat; 1272 1273 rcvloop: 1274 rxd = sc->rx_head; 1275 rxmap = rxd->rx_dmamap; 1276 m = rxd->rx_mbhead; 1277 upd = rxd->rx_upd; 1278 1279 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, 1280 rxmap->dm_mapsize, 1281 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1282 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1283 ((caddr_t)upd - (caddr_t)sc->sc_upd), 1284 sizeof (struct ex_upd), 1285 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1286 pktstat = le32toh(upd->upd_pktstatus); 1287 1288 if (pktstat & EX_UPD_COMPLETE) { 1289 /* 1290 * Remove first packet from the chain. 1291 */ 1292 sc->rx_head = rxd->rx_next; 1293 rxd->rx_next = NULL; 1294 1295 /* 1296 * Add a new buffer to the receive chain. 1297 * If this fails, the old buffer is recycled 1298 * instead. 1299 */ 1300 if (ex_add_rxbuf(sc, rxd) == 0) { 1301 u_int16_t total_len; 1302 1303 if (pktstat & 1304 ((sc->sc_ethercom.ec_capenable & 1305 ETHERCAP_VLAN_MTU) ? 1306 EX_UPD_ERR_VLAN : EX_UPD_ERR)) { 1307 ifp->if_ierrors++; 1308 m_freem(m); 1309 goto rcvloop; 1310 } 1311 1312 total_len = pktstat & EX_UPD_PKTLENMASK; 1313 if (total_len < 1314 sizeof(struct ether_header)) { 1315 m_freem(m); 1316 goto rcvloop; 1317 } 1318 m->m_pkthdr.rcvif = ifp; 1319 m->m_pkthdr.len = m->m_len = total_len; 1320 #if NBPFILTER > 0 1321 if (ifp->if_bpf) 1322 bpf_mtap(ifp->if_bpf, m); 1323 #endif 1324 /* 1325 * Set the incoming checksum information for the packet. 1326 */ 1327 if ((sc->ex_conf & EX_CONF_90XB) != 0 && 1328 (pktstat & EX_UPD_IPCHECKED) != 0) { 1329 m->m_pkthdr.csum_flags |= M_CSUM_IPv4; 1330 if (pktstat & EX_UPD_IPCKSUMERR) 1331 m->m_pkthdr.csum_flags |= M_CSUM_IPv4_BAD; 1332 if (pktstat & EX_UPD_TCPCHECKED) { 1333 m->m_pkthdr.csum_flags |= M_CSUM_TCPv4; 1334 if (pktstat & EX_UPD_TCPCKSUMERR) 1335 m->m_pkthdr.csum_flags |= 1336 M_CSUM_TCP_UDP_BAD; 1337 } else if (pktstat & EX_UPD_UDPCHECKED) { 1338 m->m_pkthdr.csum_flags |= M_CSUM_UDPv4; 1339 if (pktstat & EX_UPD_UDPCKSUMERR) 1340 m->m_pkthdr.csum_flags |= 1341 M_CSUM_TCP_UDP_BAD; 1342 } 1343 } 1344 (*ifp->if_input)(ifp, m); 1345 } 1346 goto rcvloop; 1347 } 1348 /* 1349 * Just in case we filled up all UPDs and the DMA engine 1350 * stalled. We could be more subtle about this. 1351 */ 1352 if (bus_space_read_4(iot, ioh, ELINK_UPLISTPTR) == 0) { 1353 printf("%s: uplistptr was 0\n", 1354 sc->sc_dev.dv_xname); 1355 ex_init(ifp); 1356 } else if (bus_space_read_4(iot, ioh, ELINK_UPPKTSTATUS) 1357 & 0x2000) { 1358 printf("%s: receive stalled\n", 1359 sc->sc_dev.dv_xname); 1360 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1361 ELINK_UPUNSTALL); 1362 } 1363 } 1364 1365 #if NRND > 0 1366 if (stat) 1367 rnd_add_uint32(&sc->rnd_source, stat); 1368 #endif 1369 } 1370 1371 /* no more interrupts */ 1372 if (ret && IFQ_IS_EMPTY(&ifp->if_snd) == 0) 1373 ex_start(ifp); 1374 return ret; 1375 } 1376 1377 int 1378 ex_ioctl(ifp, cmd, data) 1379 struct ifnet *ifp; 1380 u_long cmd; 1381 caddr_t data; 1382 { 1383 struct ex_softc *sc = ifp->if_softc; 1384 struct ifreq *ifr = (struct ifreq *)data; 1385 int s, error; 1386 1387 s = splnet(); 1388 1389 switch (cmd) { 1390 case SIOCSIFMEDIA: 1391 case SIOCGIFMEDIA: 1392 error = ifmedia_ioctl(ifp, ifr, &sc->ex_mii.mii_media, cmd); 1393 break; 1394 case SIOCSIFFLAGS: 1395 /* If the interface is up and running, only modify the receive 1396 * filter when setting promiscuous or debug mode. Otherwise 1397 * fall through to ether_ioctl, which will reset the chip. 1398 */ 1399 #define RESETIGN (IFF_CANTCHANGE|IFF_DEBUG) 1400 if (((ifp->if_flags & (IFF_UP|IFF_RUNNING)) 1401 == (IFF_UP|IFF_RUNNING)) 1402 && ((ifp->if_flags & (~RESETIGN)) 1403 == (sc->sc_if_flags & (~RESETIGN)))) { 1404 ex_set_mc(sc); 1405 error = 0; 1406 break; 1407 #undef RESETIGN 1408 } 1409 /* FALLTHROUGH */ 1410 default: 1411 error = ether_ioctl(ifp, cmd, data); 1412 if (error == ENETRESET) { 1413 /* 1414 * Multicast list has changed; set the hardware filter 1415 * accordingly. 1416 */ 1417 if (ifp->if_flags & IFF_RUNNING) 1418 ex_set_mc(sc); 1419 error = 0; 1420 } 1421 break; 1422 } 1423 1424 sc->sc_if_flags = ifp->if_flags; 1425 splx(s); 1426 return (error); 1427 } 1428 1429 void 1430 ex_getstats(sc) 1431 struct ex_softc *sc; 1432 { 1433 bus_space_handle_t ioh = sc->sc_ioh; 1434 bus_space_tag_t iot = sc->sc_iot; 1435 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1436 u_int8_t upperok; 1437 1438 GO_WINDOW(6); 1439 upperok = bus_space_read_1(iot, ioh, UPPER_FRAMES_OK); 1440 ifp->if_ipackets += bus_space_read_1(iot, ioh, RX_FRAMES_OK); 1441 ifp->if_ipackets += (upperok & 0x03) << 8; 1442 ifp->if_opackets += bus_space_read_1(iot, ioh, TX_FRAMES_OK); 1443 ifp->if_opackets += (upperok & 0x30) << 4; 1444 ifp->if_ierrors += bus_space_read_1(iot, ioh, RX_OVERRUNS); 1445 ifp->if_collisions += bus_space_read_1(iot, ioh, TX_COLLISIONS); 1446 /* 1447 * There seems to be no way to get the exact number of collisions, 1448 * this is the number that occurred at the very least. 1449 */ 1450 ifp->if_collisions += 2 * bus_space_read_1(iot, ioh, 1451 TX_AFTER_X_COLLISIONS); 1452 /* 1453 * Interface byte counts are counted by ether_input() and 1454 * ether_output(), so don't accumulate them here. Just 1455 * read the NIC counters so they don't generate overflow interrupts. 1456 * Upper byte counters are latched from reading the totals, so 1457 * they don't need to be read if we don't need their values. 1458 */ 1459 (void)bus_space_read_2(iot, ioh, RX_TOTAL_OK); 1460 (void)bus_space_read_2(iot, ioh, TX_TOTAL_OK); 1461 1462 /* 1463 * Clear the following to avoid stats overflow interrupts 1464 */ 1465 (void)bus_space_read_1(iot, ioh, TX_DEFERRALS); 1466 (void)bus_space_read_1(iot, ioh, TX_AFTER_1_COLLISION); 1467 (void)bus_space_read_1(iot, ioh, TX_NO_SQE); 1468 (void)bus_space_read_1(iot, ioh, TX_CD_LOST); 1469 GO_WINDOW(4); 1470 (void)bus_space_read_1(iot, ioh, ELINK_W4_BADSSD); 1471 GO_WINDOW(1); 1472 } 1473 1474 void 1475 ex_printstats(sc) 1476 struct ex_softc *sc; 1477 { 1478 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1479 1480 ex_getstats(sc); 1481 printf("in %llu out %llu ierror %llu oerror %llu ibytes %llu obytes " 1482 "%llu\n", (unsigned long long)ifp->if_ipackets, 1483 (unsigned long long)ifp->if_opackets, 1484 (unsigned long long)ifp->if_ierrors, 1485 (unsigned long long)ifp->if_oerrors, 1486 (unsigned long long)ifp->if_ibytes, 1487 (unsigned long long)ifp->if_obytes); 1488 } 1489 1490 void 1491 ex_tick(arg) 1492 void *arg; 1493 { 1494 struct ex_softc *sc = arg; 1495 int s; 1496 1497 if (!device_is_active(&sc->sc_dev)) 1498 return; 1499 1500 s = splnet(); 1501 1502 if (sc->ex_conf & EX_CONF_MII) 1503 mii_tick(&sc->ex_mii); 1504 1505 if (!(bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, ELINK_STATUS) 1506 & COMMAND_IN_PROGRESS)) 1507 ex_getstats(sc); 1508 1509 splx(s); 1510 1511 callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc); 1512 } 1513 1514 void 1515 ex_reset(sc) 1516 struct ex_softc *sc; 1517 { 1518 u_int16_t val = GLOBAL_RESET; 1519 1520 if (sc->ex_conf & EX_CONF_RESETHACK) 1521 val |= 0x10; 1522 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, val); 1523 /* 1524 * XXX apparently the command in progress bit can't be trusted 1525 * during a reset, so we just always wait this long. Fortunately 1526 * we normally only reset the chip during autoconfig. 1527 */ 1528 delay(100000); 1529 ex_waitcmd(sc); 1530 } 1531 1532 void 1533 ex_watchdog(ifp) 1534 struct ifnet *ifp; 1535 { 1536 struct ex_softc *sc = ifp->if_softc; 1537 1538 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1539 ++sc->sc_ethercom.ec_if.if_oerrors; 1540 1541 ex_reset(sc); 1542 ex_init(ifp); 1543 } 1544 1545 void 1546 ex_stop(ifp, disable) 1547 struct ifnet *ifp; 1548 int disable; 1549 { 1550 struct ex_softc *sc = ifp->if_softc; 1551 bus_space_tag_t iot = sc->sc_iot; 1552 bus_space_handle_t ioh = sc->sc_ioh; 1553 struct ex_txdesc *tx; 1554 struct ex_rxdesc *rx; 1555 int i; 1556 1557 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1558 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1559 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1560 1561 for (tx = sc->tx_head ; tx != NULL; tx = tx->tx_next) { 1562 if (tx->tx_mbhead == NULL) 1563 continue; 1564 m_freem(tx->tx_mbhead); 1565 tx->tx_mbhead = NULL; 1566 bus_dmamap_unload(sc->sc_dmat, tx->tx_dmamap); 1567 tx->tx_dpd->dpd_fsh = tx->tx_dpd->dpd_nextptr = 0; 1568 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1569 ((caddr_t)tx->tx_dpd - (caddr_t)sc->sc_dpd), 1570 sizeof (struct ex_dpd), 1571 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1572 } 1573 sc->tx_tail = sc->tx_head = NULL; 1574 ex_init_txdescs(sc); 1575 1576 sc->rx_tail = sc->rx_head = 0; 1577 for (i = 0; i < EX_NUPD; i++) { 1578 rx = &sc->sc_rxdescs[i]; 1579 if (rx->rx_mbhead != NULL) { 1580 bus_dmamap_unload(sc->sc_dmat, rx->rx_dmamap); 1581 m_freem(rx->rx_mbhead); 1582 rx->rx_mbhead = NULL; 1583 } 1584 ex_add_rxbuf(sc, rx); 1585 } 1586 1587 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | INTR_LATCH); 1588 1589 callout_stop(&sc->ex_mii_callout); 1590 if (sc->ex_conf & EX_CONF_MII) 1591 mii_down(&sc->ex_mii); 1592 1593 if (disable) 1594 ex_disable(sc); 1595 1596 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1597 sc->sc_if_flags = ifp->if_flags; 1598 ifp->if_timer = 0; 1599 } 1600 1601 static void 1602 ex_init_txdescs(sc) 1603 struct ex_softc *sc; 1604 { 1605 int i; 1606 1607 for (i = 0; i < EX_NDPD; i++) { 1608 sc->sc_txdescs[i].tx_dmamap = sc->sc_tx_dmamaps[i]; 1609 sc->sc_txdescs[i].tx_dpd = &sc->sc_dpd[i]; 1610 if (i < EX_NDPD - 1) 1611 sc->sc_txdescs[i].tx_next = &sc->sc_txdescs[i + 1]; 1612 else 1613 sc->sc_txdescs[i].tx_next = NULL; 1614 } 1615 sc->tx_free = &sc->sc_txdescs[0]; 1616 sc->tx_ftail = &sc->sc_txdescs[EX_NDPD-1]; 1617 } 1618 1619 1620 int 1621 ex_activate(self, act) 1622 struct device *self; 1623 enum devact act; 1624 { 1625 struct ex_softc *sc = (void *) self; 1626 int s, error = 0; 1627 1628 s = splnet(); 1629 switch (act) { 1630 case DVACT_ACTIVATE: 1631 error = EOPNOTSUPP; 1632 break; 1633 1634 case DVACT_DEACTIVATE: 1635 if (sc->ex_conf & EX_CONF_MII) 1636 mii_activate(&sc->ex_mii, act, MII_PHY_ANY, 1637 MII_OFFSET_ANY); 1638 if_deactivate(&sc->sc_ethercom.ec_if); 1639 break; 1640 } 1641 splx(s); 1642 1643 return (error); 1644 } 1645 1646 int 1647 ex_detach(sc) 1648 struct ex_softc *sc; 1649 { 1650 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1651 struct ex_rxdesc *rxd; 1652 int i; 1653 1654 /* Succeed now if there's no work to do. */ 1655 if ((sc->ex_flags & EX_FLAGS_ATTACHED) == 0) 1656 return (0); 1657 1658 /* Unhook our tick handler. */ 1659 callout_stop(&sc->ex_mii_callout); 1660 1661 if (sc->ex_conf & EX_CONF_MII) { 1662 /* Detach all PHYs */ 1663 mii_detach(&sc->ex_mii, MII_PHY_ANY, MII_OFFSET_ANY); 1664 } 1665 1666 /* Delete all remaining media. */ 1667 ifmedia_delete_instance(&sc->ex_mii.mii_media, IFM_INST_ANY); 1668 1669 #if NRND > 0 1670 rnd_detach_source(&sc->rnd_source); 1671 #endif 1672 ether_ifdetach(ifp); 1673 if_detach(ifp); 1674 1675 for (i = 0; i < EX_NUPD; i++) { 1676 rxd = &sc->sc_rxdescs[i]; 1677 if (rxd->rx_mbhead != NULL) { 1678 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap); 1679 m_freem(rxd->rx_mbhead); 1680 rxd->rx_mbhead = NULL; 1681 } 1682 } 1683 for (i = 0; i < EX_NUPD; i++) 1684 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]); 1685 for (i = 0; i < EX_NDPD; i++) 1686 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]); 1687 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap); 1688 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap); 1689 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd, 1690 EX_NDPD * sizeof (struct ex_dpd)); 1691 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg); 1692 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap); 1693 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap); 1694 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd, 1695 EX_NUPD * sizeof (struct ex_upd)); 1696 bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg); 1697 1698 shutdownhook_disestablish(sc->sc_sdhook); 1699 powerhook_disestablish(sc->sc_powerhook); 1700 1701 return (0); 1702 } 1703 1704 /* 1705 * Before reboots, reset card completely. 1706 */ 1707 static void 1708 ex_shutdown(arg) 1709 void *arg; 1710 { 1711 struct ex_softc *sc = arg; 1712 1713 ex_stop(&sc->sc_ethercom.ec_if, 1); 1714 /* 1715 * Make sure the interface is powered up when we reboot, 1716 * otherwise firmware on some systems gets really confused. 1717 */ 1718 (void) ex_enable(sc); 1719 } 1720 1721 /* 1722 * Read EEPROM data. 1723 * XXX what to do if EEPROM doesn't unbusy? 1724 */ 1725 u_int16_t 1726 ex_read_eeprom(sc, offset) 1727 struct ex_softc *sc; 1728 int offset; 1729 { 1730 bus_space_tag_t iot = sc->sc_iot; 1731 bus_space_handle_t ioh = sc->sc_ioh; 1732 u_int16_t data = 0, cmd = READ_EEPROM; 1733 int off; 1734 1735 off = sc->ex_conf & EX_CONF_EEPROM_OFF ? 0x30 : 0; 1736 cmd = sc->ex_conf & EX_CONF_EEPROM_8BIT ? READ_EEPROM8 : READ_EEPROM; 1737 1738 GO_WINDOW(0); 1739 if (ex_eeprom_busy(sc)) 1740 goto out; 1741 bus_space_write_2(iot, ioh, ELINK_W0_EEPROM_COMMAND, 1742 cmd | (off + (offset & 0x3f))); 1743 if (ex_eeprom_busy(sc)) 1744 goto out; 1745 data = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_DATA); 1746 out: 1747 return data; 1748 } 1749 1750 static int 1751 ex_eeprom_busy(sc) 1752 struct ex_softc *sc; 1753 { 1754 bus_space_tag_t iot = sc->sc_iot; 1755 bus_space_handle_t ioh = sc->sc_ioh; 1756 int i = 100; 1757 1758 while (i--) { 1759 if (!(bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND) & 1760 EEPROM_BUSY)) 1761 return 0; 1762 delay(100); 1763 } 1764 printf("\n%s: eeprom stays busy.\n", sc->sc_dev.dv_xname); 1765 return (1); 1766 } 1767 1768 /* 1769 * Create a new rx buffer and add it to the 'soft' rx list. 1770 */ 1771 static int 1772 ex_add_rxbuf(sc, rxd) 1773 struct ex_softc *sc; 1774 struct ex_rxdesc *rxd; 1775 { 1776 struct mbuf *m, *oldm; 1777 bus_dmamap_t rxmap; 1778 int error, rval = 0; 1779 1780 oldm = rxd->rx_mbhead; 1781 rxmap = rxd->rx_dmamap; 1782 1783 MGETHDR(m, M_DONTWAIT, MT_DATA); 1784 if (m != NULL) { 1785 MCLGET(m, M_DONTWAIT); 1786 if ((m->m_flags & M_EXT) == 0) { 1787 m_freem(m); 1788 if (oldm == NULL) 1789 return 1; 1790 m = oldm; 1791 MRESETDATA(m); 1792 rval = 1; 1793 } 1794 } else { 1795 if (oldm == NULL) 1796 return 1; 1797 m = oldm; 1798 MRESETDATA(m); 1799 rval = 1; 1800 } 1801 1802 /* 1803 * Setup the DMA map for this receive buffer. 1804 */ 1805 if (m != oldm) { 1806 if (oldm != NULL) 1807 bus_dmamap_unload(sc->sc_dmat, rxmap); 1808 error = bus_dmamap_load(sc->sc_dmat, rxmap, 1809 m->m_ext.ext_buf, MCLBYTES, NULL, 1810 BUS_DMA_READ|BUS_DMA_NOWAIT); 1811 if (error) { 1812 printf("%s: can't load rx buffer, error = %d\n", 1813 sc->sc_dev.dv_xname, error); 1814 panic("ex_add_rxbuf"); /* XXX */ 1815 } 1816 } 1817 1818 /* 1819 * Align for data after 14 byte header. 1820 */ 1821 m->m_data += 2; 1822 1823 rxd->rx_mbhead = m; 1824 rxd->rx_upd->upd_pktstatus = htole32(MCLBYTES - 2); 1825 rxd->rx_upd->upd_frags[0].fr_addr = 1826 htole32(rxmap->dm_segs[0].ds_addr + 2); 1827 rxd->rx_upd->upd_nextptr = 0; 1828 1829 /* 1830 * Attach it to the end of the list. 1831 */ 1832 if (sc->rx_head != NULL) { 1833 sc->rx_tail->rx_next = rxd; 1834 sc->rx_tail->rx_upd->upd_nextptr = htole32(sc->sc_upddma + 1835 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd)); 1836 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1837 (caddr_t)sc->rx_tail->rx_upd - (caddr_t)sc->sc_upd, 1838 sizeof (struct ex_upd), 1839 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1840 } else { 1841 sc->rx_head = rxd; 1842 } 1843 sc->rx_tail = rxd; 1844 1845 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, rxmap->dm_mapsize, 1846 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1847 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1848 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd), 1849 sizeof (struct ex_upd), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1850 return (rval); 1851 } 1852 1853 u_int32_t 1854 ex_mii_bitbang_read(self) 1855 struct device *self; 1856 { 1857 struct ex_softc *sc = (void *) self; 1858 1859 /* We're already in Window 4. */ 1860 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT)); 1861 } 1862 1863 void 1864 ex_mii_bitbang_write(self, val) 1865 struct device *self; 1866 u_int32_t val; 1867 { 1868 struct ex_softc *sc = (void *) self; 1869 1870 /* We're already in Window 4. */ 1871 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT, val); 1872 } 1873 1874 int 1875 ex_mii_readreg(v, phy, reg) 1876 struct device *v; 1877 int phy, reg; 1878 { 1879 struct ex_softc *sc = (struct ex_softc *)v; 1880 int val; 1881 1882 if ((sc->ex_conf & EX_CONF_INTPHY) && phy != ELINK_INTPHY_ID) 1883 return 0; 1884 1885 GO_WINDOW(4); 1886 1887 val = mii_bitbang_readreg(v, &ex_mii_bitbang_ops, phy, reg); 1888 1889 GO_WINDOW(1); 1890 1891 return (val); 1892 } 1893 1894 void 1895 ex_mii_writereg(v, phy, reg, data) 1896 struct device *v; 1897 int phy; 1898 int reg; 1899 int data; 1900 { 1901 struct ex_softc *sc = (struct ex_softc *)v; 1902 1903 GO_WINDOW(4); 1904 1905 mii_bitbang_writereg(v, &ex_mii_bitbang_ops, phy, reg, data); 1906 1907 GO_WINDOW(1); 1908 } 1909 1910 void 1911 ex_mii_statchg(v) 1912 struct device *v; 1913 { 1914 struct ex_softc *sc = (struct ex_softc *)v; 1915 bus_space_tag_t iot = sc->sc_iot; 1916 bus_space_handle_t ioh = sc->sc_ioh; 1917 int mctl; 1918 1919 GO_WINDOW(3); 1920 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1921 if (sc->ex_mii.mii_media_active & IFM_FDX) 1922 mctl |= MAC_CONTROL_FDX; 1923 else 1924 mctl &= ~MAC_CONTROL_FDX; 1925 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1926 GO_WINDOW(1); /* back to operating window */ 1927 } 1928 1929 int 1930 ex_enable(sc) 1931 struct ex_softc *sc; 1932 { 1933 if (sc->enabled == 0 && sc->enable != NULL) { 1934 if ((*sc->enable)(sc) != 0) { 1935 printf("%s: de/vice enable failed\n", 1936 sc->sc_dev.dv_xname); 1937 return (EIO); 1938 } 1939 sc->enabled = 1; 1940 } 1941 return (0); 1942 } 1943 1944 void 1945 ex_disable(sc) 1946 struct ex_softc *sc; 1947 { 1948 if (sc->enabled == 1 && sc->disable != NULL) { 1949 (*sc->disable)(sc); 1950 sc->enabled = 0; 1951 } 1952 } 1953 1954 void 1955 ex_power(why, arg) 1956 int why; 1957 void *arg; 1958 { 1959 struct ex_softc *sc = (void *)arg; 1960 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1961 int s; 1962 1963 s = splnet(); 1964 switch (why) { 1965 case PWR_SUSPEND: 1966 case PWR_STANDBY: 1967 ex_stop(ifp, 0); 1968 if (sc->power != NULL) 1969 (*sc->power)(sc, why); 1970 break; 1971 case PWR_RESUME: 1972 if (ifp->if_flags & IFF_UP) { 1973 if (sc->power != NULL) 1974 (*sc->power)(sc, why); 1975 ex_init(ifp); 1976 } 1977 break; 1978 case PWR_SOFTSUSPEND: 1979 case PWR_SOFTSTANDBY: 1980 case PWR_SOFTRESUME: 1981 break; 1982 } 1983 splx(s); 1984 } 1985
Indexes created Sat Oct 25 16:10:12 GMT 2025