elinkxl.c revision 1.91
1 /* $NetBSD: elinkxl.c,v 1.91 2006/11/04 05:18:26 tsutsui Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Frank van der Linden. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: elinkxl.c,v 1.91 2006/11/04 05:18:26 tsutsui Exp $"); 41 42 #include "bpfilter.h" 43 #include "rnd.h" 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/callout.h> 48 #include <sys/kernel.h> 49 #include <sys/mbuf.h> 50 #include <sys/socket.h> 51 #include <sys/ioctl.h> 52 #include <sys/errno.h> 53 #include <sys/syslog.h> 54 #include <sys/select.h> 55 #include <sys/device.h> 56 #if NRND > 0 57 #include <sys/rnd.h> 58 #endif 59 60 #include <uvm/uvm_extern.h> 61 62 #include <net/if.h> 63 #include <net/if_dl.h> 64 #include <net/if_ether.h> 65 #include <net/if_media.h> 66 67 #if NBPFILTER > 0 68 #include <net/bpf.h> 69 #include <net/bpfdesc.h> 70 #endif 71 72 #include <machine/cpu.h> 73 #include <machine/bus.h> 74 #include <machine/intr.h> 75 #include <machine/endian.h> 76 77 #include <dev/mii/miivar.h> 78 #include <dev/mii/mii.h> 79 #include <dev/mii/mii_bitbang.h> 80 81 #include <dev/ic/elink3reg.h> 82 /* #include <dev/ic/elink3var.h> */ 83 #include <dev/ic/elinkxlreg.h> 84 #include <dev/ic/elinkxlvar.h> 85 86 #ifdef DEBUG 87 int exdebug = 0; 88 #endif 89 90 /* ifmedia callbacks */ 91 int ex_media_chg(struct ifnet *ifp); 92 void ex_media_stat(struct ifnet *ifp, struct ifmediareq *req); 93 94 void ex_probe_media(struct ex_softc *); 95 void ex_set_filter(struct ex_softc *); 96 void ex_set_media(struct ex_softc *); 97 void ex_set_xcvr(struct ex_softc *, u_int16_t); 98 struct mbuf *ex_get(struct ex_softc *, int); 99 u_int16_t ex_read_eeprom(struct ex_softc *, int); 100 int ex_init(struct ifnet *); 101 void ex_read(struct ex_softc *); 102 void ex_reset(struct ex_softc *); 103 void ex_set_mc(struct ex_softc *); 104 void ex_getstats(struct ex_softc *); 105 void ex_printstats(struct ex_softc *); 106 void ex_tick(void *); 107 108 void ex_power(int, void *); 109 110 static int ex_eeprom_busy(struct ex_softc *); 111 static int ex_add_rxbuf(struct ex_softc *, struct ex_rxdesc *); 112 static void ex_init_txdescs(struct ex_softc *); 113 114 static void ex_shutdown(void *); 115 static void ex_start(struct ifnet *); 116 static void ex_txstat(struct ex_softc *); 117 118 int ex_mii_readreg(struct device *, int, int); 119 void ex_mii_writereg(struct device *, int, int, int); 120 void ex_mii_statchg(struct device *); 121 122 void ex_probemedia(struct ex_softc *); 123 124 /* 125 * Structure to map media-present bits in boards to ifmedia codes and 126 * printable media names. Used for table-driven ifmedia initialization. 127 */ 128 struct ex_media { 129 int exm_mpbit; /* media present bit */ 130 const char *exm_name; /* name of medium */ 131 int exm_ifmedia; /* ifmedia word for medium */ 132 int exm_epmedia; /* ELINKMEDIA_* constant */ 133 }; 134 135 /* 136 * Media table for 3c90x chips. Note that chips with MII have no 137 * `native' media. 138 */ 139 struct ex_media ex_native_media[] = { 140 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 141 ELINKMEDIA_10BASE_T }, 142 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 143 ELINKMEDIA_10BASE_T }, 144 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 145 ELINKMEDIA_AUI }, 146 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 147 ELINKMEDIA_10BASE_2 }, 148 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 149 ELINKMEDIA_100BASE_TX }, 150 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 151 ELINKMEDIA_100BASE_TX }, 152 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 153 ELINKMEDIA_100BASE_FX }, 154 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 155 ELINKMEDIA_MII }, 156 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 157 ELINKMEDIA_100BASE_T4 }, 158 { 0, NULL, 0, 159 0 }, 160 }; 161 162 /* 163 * MII bit-bang glue. 164 */ 165 u_int32_t ex_mii_bitbang_read(struct device *); 166 void ex_mii_bitbang_write(struct device *, u_int32_t); 167 168 const struct mii_bitbang_ops ex_mii_bitbang_ops = { 169 ex_mii_bitbang_read, 170 ex_mii_bitbang_write, 171 { 172 ELINK_PHY_DATA, /* MII_BIT_MDO */ 173 ELINK_PHY_DATA, /* MII_BIT_MDI */ 174 ELINK_PHY_CLK, /* MII_BIT_MDC */ 175 ELINK_PHY_DIR, /* MII_BIT_DIR_HOST_PHY */ 176 0, /* MII_BIT_DIR_PHY_HOST */ 177 } 178 }; 179 180 /* 181 * Back-end attach and configure. 182 */ 183 void 184 ex_config(sc) 185 struct ex_softc *sc; 186 { 187 struct ifnet *ifp; 188 u_int16_t val; 189 u_int8_t macaddr[ETHER_ADDR_LEN] = {0}; 190 bus_space_tag_t iot = sc->sc_iot; 191 bus_space_handle_t ioh = sc->sc_ioh; 192 int i, error, attach_stage; 193 194 callout_init(&sc->ex_mii_callout); 195 196 ex_reset(sc); 197 198 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR0); 199 macaddr[0] = val >> 8; 200 macaddr[1] = val & 0xff; 201 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR1); 202 macaddr[2] = val >> 8; 203 macaddr[3] = val & 0xff; 204 val = ex_read_eeprom(sc, EEPROM_OEM_ADDR2); 205 macaddr[4] = val >> 8; 206 macaddr[5] = val & 0xff; 207 208 aprint_normal("%s: MAC address %s\n", sc->sc_dev.dv_xname, 209 ether_sprintf(macaddr)); 210 211 if (sc->ex_conf & (EX_CONF_INV_LED_POLARITY|EX_CONF_PHY_POWER)) { 212 GO_WINDOW(2); 213 val = bus_space_read_2(iot, ioh, ELINK_W2_RESET_OPTIONS); 214 if (sc->ex_conf & EX_CONF_INV_LED_POLARITY) 215 val |= ELINK_RESET_OPT_LEDPOLAR; 216 if (sc->ex_conf & EX_CONF_PHY_POWER) 217 val |= ELINK_RESET_OPT_PHYPOWER; 218 bus_space_write_2(iot, ioh, ELINK_W2_RESET_OPTIONS, val); 219 } 220 if (sc->ex_conf & EX_CONF_NO_XCVR_PWR) { 221 GO_WINDOW(0); 222 bus_space_write_2(iot, ioh, ELINK_W0_MFG_ID, 223 EX_XCVR_PWR_MAGICBITS); 224 } 225 226 attach_stage = 0; 227 228 /* 229 * Allocate the upload descriptors, and create and load the DMA 230 * map for them. 231 */ 232 if ((error = bus_dmamem_alloc(sc->sc_dmat, 233 EX_NUPD * sizeof (struct ex_upd), PAGE_SIZE, 0, &sc->sc_useg, 1, 234 &sc->sc_urseg, BUS_DMA_NOWAIT)) != 0) { 235 aprint_error( 236 "%s: can't allocate upload descriptors, error = %d\n", 237 sc->sc_dev.dv_xname, error); 238 goto fail; 239 } 240 241 attach_stage = 1; 242 243 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg, 244 EX_NUPD * sizeof (struct ex_upd), (caddr_t *)&sc->sc_upd, 245 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 246 aprint_error("%s: can't map upload descriptors, error = %d\n", 247 sc->sc_dev.dv_xname, error); 248 goto fail; 249 } 250 251 attach_stage = 2; 252 253 if ((error = bus_dmamap_create(sc->sc_dmat, 254 EX_NUPD * sizeof (struct ex_upd), 1, 255 EX_NUPD * sizeof (struct ex_upd), 0, BUS_DMA_NOWAIT, 256 &sc->sc_upd_dmamap)) != 0) { 257 aprint_error( 258 "%s: can't create upload desc. DMA map, error = %d\n", 259 sc->sc_dev.dv_xname, error); 260 goto fail; 261 } 262 263 attach_stage = 3; 264 265 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_upd_dmamap, 266 sc->sc_upd, EX_NUPD * sizeof (struct ex_upd), NULL, 267 BUS_DMA_NOWAIT)) != 0) { 268 aprint_error( 269 "%s: can't load upload desc. DMA map, error = %d\n", 270 sc->sc_dev.dv_xname, error); 271 goto fail; 272 } 273 274 attach_stage = 4; 275 276 /* 277 * Allocate the download descriptors, and create and load the DMA 278 * map for them. 279 */ 280 if ((error = bus_dmamem_alloc(sc->sc_dmat, 281 EX_NDPD * sizeof (struct ex_dpd), PAGE_SIZE, 0, &sc->sc_dseg, 1, 282 &sc->sc_drseg, BUS_DMA_NOWAIT)) != 0) { 283 aprint_error( 284 "%s: can't allocate download descriptors, error = %d\n", 285 sc->sc_dev.dv_xname, error); 286 goto fail; 287 } 288 289 attach_stage = 5; 290 291 if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg, 292 EX_NDPD * sizeof (struct ex_dpd), (caddr_t *)&sc->sc_dpd, 293 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 294 aprint_error("%s: can't map download descriptors, error = %d\n", 295 sc->sc_dev.dv_xname, error); 296 goto fail; 297 } 298 memset(sc->sc_dpd, 0, EX_NDPD * sizeof (struct ex_dpd)); 299 300 attach_stage = 6; 301 302 if ((error = bus_dmamap_create(sc->sc_dmat, 303 EX_NDPD * sizeof (struct ex_dpd), 1, 304 EX_NDPD * sizeof (struct ex_dpd), 0, BUS_DMA_NOWAIT, 305 &sc->sc_dpd_dmamap)) != 0) { 306 aprint_error( 307 "%s: can't create download desc. DMA map, error = %d\n", 308 sc->sc_dev.dv_xname, error); 309 goto fail; 310 } 311 312 attach_stage = 7; 313 314 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dpd_dmamap, 315 sc->sc_dpd, EX_NDPD * sizeof (struct ex_dpd), NULL, 316 BUS_DMA_NOWAIT)) != 0) { 317 aprint_error( 318 "%s: can't load download desc. DMA map, error = %d\n", 319 sc->sc_dev.dv_xname, error); 320 goto fail; 321 } 322 323 attach_stage = 8; 324 325 326 /* 327 * Create the transmit buffer DMA maps. 328 */ 329 for (i = 0; i < EX_NDPD; i++) { 330 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 331 EX_NTFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 332 &sc->sc_tx_dmamaps[i])) != 0) { 333 aprint_error( 334 "%s: can't create tx DMA map %d, error = %d\n", 335 sc->sc_dev.dv_xname, i, error); 336 goto fail; 337 } 338 } 339 340 attach_stage = 9; 341 342 /* 343 * Create the receive buffer DMA maps. 344 */ 345 for (i = 0; i < EX_NUPD; i++) { 346 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 347 EX_NRFRAGS, MCLBYTES, 0, BUS_DMA_NOWAIT, 348 &sc->sc_rx_dmamaps[i])) != 0) { 349 aprint_error( 350 "%s: can't create rx DMA map %d, error = %d\n", 351 sc->sc_dev.dv_xname, i, error); 352 goto fail; 353 } 354 } 355 356 attach_stage = 10; 357 358 /* 359 * Create ring of upload descriptors, only once. The DMA engine 360 * will loop over this when receiving packets, stalling if it 361 * hits an UPD with a finished receive. 362 */ 363 for (i = 0; i < EX_NUPD; i++) { 364 sc->sc_rxdescs[i].rx_dmamap = sc->sc_rx_dmamaps[i]; 365 sc->sc_rxdescs[i].rx_upd = &sc->sc_upd[i]; 366 sc->sc_upd[i].upd_frags[0].fr_len = 367 htole32((MCLBYTES - 2) | EX_FR_LAST); 368 if (ex_add_rxbuf(sc, &sc->sc_rxdescs[i]) != 0) { 369 aprint_error("%s: can't allocate or map rx buffers\n", 370 sc->sc_dev.dv_xname); 371 goto fail; 372 } 373 } 374 375 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 0, 376 EX_NUPD * sizeof (struct ex_upd), 377 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 378 379 ex_init_txdescs(sc); 380 381 attach_stage = 11; 382 383 384 GO_WINDOW(3); 385 val = bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS); 386 if (val & ELINK_MEDIACAP_MII) 387 sc->ex_conf |= EX_CONF_MII; 388 389 ifp = &sc->sc_ethercom.ec_if; 390 391 /* 392 * Initialize our media structures and MII info. We'll 393 * probe the MII if we discover that we have one. 394 */ 395 sc->ex_mii.mii_ifp = ifp; 396 sc->ex_mii.mii_readreg = ex_mii_readreg; 397 sc->ex_mii.mii_writereg = ex_mii_writereg; 398 sc->ex_mii.mii_statchg = ex_mii_statchg; 399 ifmedia_init(&sc->ex_mii.mii_media, IFM_IMASK, ex_media_chg, 400 ex_media_stat); 401 402 if (sc->ex_conf & EX_CONF_MII) { 403 /* 404 * Find PHY, extract media information from it. 405 * First, select the right transceiver. 406 */ 407 ex_set_xcvr(sc, val); 408 409 mii_attach(&sc->sc_dev, &sc->ex_mii, 0xffffffff, 410 MII_PHY_ANY, MII_OFFSET_ANY, 0); 411 if (LIST_FIRST(&sc->ex_mii.mii_phys) == NULL) { 412 ifmedia_add(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE, 413 0, NULL); 414 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_NONE); 415 } else { 416 ifmedia_set(&sc->ex_mii.mii_media, IFM_ETHER|IFM_AUTO); 417 } 418 } else 419 ex_probemedia(sc); 420 421 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 422 ifp->if_softc = sc; 423 ifp->if_start = ex_start; 424 ifp->if_ioctl = ex_ioctl; 425 ifp->if_watchdog = ex_watchdog; 426 ifp->if_init = ex_init; 427 ifp->if_stop = ex_stop; 428 ifp->if_flags = 429 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 430 sc->sc_if_flags = ifp->if_flags; 431 IFQ_SET_READY(&ifp->if_snd); 432 433 /* 434 * We can support 802.1Q VLAN-sized frames. 435 */ 436 sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU; 437 438 /* 439 * The 3c90xB has hardware IPv4/TCPv4/UDPv4 checksum support. 440 */ 441 if (sc->ex_conf & EX_CONF_90XB) 442 sc->sc_ethercom.ec_if.if_capabilities |= 443 IFCAP_CSUM_IPv4_Tx | IFCAP_CSUM_IPv4_Rx | 444 IFCAP_CSUM_TCPv4_Tx | IFCAP_CSUM_TCPv4_Rx | 445 IFCAP_CSUM_UDPv4_Tx | IFCAP_CSUM_UDPv4_Rx; 446 447 if_attach(ifp); 448 ether_ifattach(ifp, macaddr); 449 450 GO_WINDOW(1); 451 452 sc->tx_start_thresh = 20; 453 sc->tx_succ_ok = 0; 454 455 /* TODO: set queues to 0 */ 456 457 #if NRND > 0 458 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 459 RND_TYPE_NET, 0); 460 #endif 461 462 /* Establish callback to reset card when we reboot. */ 463 sc->sc_sdhook = shutdownhook_establish(ex_shutdown, sc); 464 if (sc->sc_sdhook == NULL) 465 aprint_error("%s: WARNING: unable to establish shutdown hook\n", 466 sc->sc_dev.dv_xname); 467 468 /* Add a suspend hook to make sure we come back up after a resume. */ 469 sc->sc_powerhook = powerhook_establish(sc->sc_dev.dv_xname, 470 ex_power, sc); 471 if (sc->sc_powerhook == NULL) 472 aprint_error("%s: WARNING: unable to establish power hook\n", 473 sc->sc_dev.dv_xname); 474 475 /* The attach is successful. */ 476 sc->ex_flags |= EX_FLAGS_ATTACHED; 477 return; 478 479 fail: 480 /* 481 * Free any resources we've allocated during the failed attach 482 * attempt. Do this in reverse order and fall though. 483 */ 484 switch (attach_stage) { 485 case 11: 486 { 487 struct ex_rxdesc *rxd; 488 489 for (i = 0; i < EX_NUPD; i++) { 490 rxd = &sc->sc_rxdescs[i]; 491 if (rxd->rx_mbhead != NULL) { 492 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap); 493 m_freem(rxd->rx_mbhead); 494 } 495 } 496 } 497 /* FALLTHROUGH */ 498 499 case 10: 500 for (i = 0; i < EX_NUPD; i++) 501 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]); 502 /* FALLTHROUGH */ 503 504 case 9: 505 for (i = 0; i < EX_NDPD; i++) 506 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]); 507 /* FALLTHROUGH */ 508 case 8: 509 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap); 510 /* FALLTHROUGH */ 511 512 case 7: 513 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap); 514 /* FALLTHROUGH */ 515 516 case 6: 517 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd, 518 EX_NDPD * sizeof (struct ex_dpd)); 519 /* FALLTHROUGH */ 520 521 case 5: 522 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg); 523 break; 524 525 case 4: 526 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap); 527 /* FALLTHROUGH */ 528 529 case 3: 530 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap); 531 /* FALLTHROUGH */ 532 533 case 2: 534 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd, 535 EX_NUPD * sizeof (struct ex_upd)); 536 /* FALLTHROUGH */ 537 538 case 1: 539 bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg); 540 break; 541 } 542 543 } 544 545 /* 546 * Find the media present on non-MII chips. 547 */ 548 void 549 ex_probemedia(sc) 550 struct ex_softc *sc; 551 { 552 bus_space_tag_t iot = sc->sc_iot; 553 bus_space_handle_t ioh = sc->sc_ioh; 554 struct ifmedia *ifm = &sc->ex_mii.mii_media; 555 struct ex_media *exm; 556 u_int16_t config1, reset_options, default_media; 557 int defmedia = 0; 558 const char *sep = "", *defmedianame = NULL; 559 560 GO_WINDOW(3); 561 config1 = bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2); 562 reset_options = bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 563 GO_WINDOW(0); 564 565 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 566 567 aprint_normal("%s: ", sc->sc_dev.dv_xname); 568 569 /* Sanity check that there are any media! */ 570 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 571 aprint_error("no media present!\n"); 572 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 573 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 574 return; 575 } 576 577 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", " 578 579 for (exm = ex_native_media; exm->exm_name != NULL; exm++) { 580 if (reset_options & exm->exm_mpbit) { 581 /* 582 * Default media is a little complicated. We 583 * support full-duplex which uses the same 584 * reset options bit. 585 * 586 * XXX Check EEPROM for default to FDX? 587 */ 588 if (exm->exm_epmedia == default_media) { 589 if ((exm->exm_ifmedia & IFM_FDX) == 0) { 590 defmedia = exm->exm_ifmedia; 591 defmedianame = exm->exm_name; 592 } 593 } else if (defmedia == 0) { 594 defmedia = exm->exm_ifmedia; 595 defmedianame = exm->exm_name; 596 } 597 ifmedia_add(ifm, exm->exm_ifmedia, exm->exm_epmedia, 598 NULL); 599 PRINT(exm->exm_name); 600 } 601 } 602 603 #undef PRINT 604 605 #ifdef DIAGNOSTIC 606 if (defmedia == 0) 607 panic("ex_probemedia: impossible"); 608 #endif 609 610 aprint_normal(", default %s\n", defmedianame); 611 ifmedia_set(ifm, defmedia); 612 } 613 614 /* 615 * Bring device up. 616 */ 617 int 618 ex_init(ifp) 619 struct ifnet *ifp; 620 { 621 struct ex_softc *sc = ifp->if_softc; 622 bus_space_tag_t iot = sc->sc_iot; 623 bus_space_handle_t ioh = sc->sc_ioh; 624 int i; 625 u_int16_t val; 626 int error = 0; 627 628 if ((error = ex_enable(sc)) != 0) 629 goto out; 630 631 ex_waitcmd(sc); 632 ex_stop(ifp, 0); 633 634 GO_WINDOW(2); 635 636 /* Turn on PHY power. */ 637 if (sc->ex_conf & (EX_CONF_PHY_POWER | EX_CONF_INV_LED_POLARITY)) { 638 val = bus_space_read_2(iot, ioh, ELINK_W2_RESET_OPTIONS); 639 if (sc->ex_conf & EX_CONF_PHY_POWER) 640 val |= ELINK_RESET_OPT_PHYPOWER; /* turn on PHY power */ 641 if (sc->ex_conf & EX_CONF_INV_LED_POLARITY) 642 val |= ELINK_RESET_OPT_LEDPOLAR; /* invert LED polarity */ 643 bus_space_write_2(iot, ioh, ELINK_W2_RESET_OPTIONS, val); 644 } 645 646 /* 647 * Set the station address and clear the station mask. The latter 648 * is needed for 90x cards, 0 is the default for 90xB cards. 649 */ 650 for (i = 0; i < ETHER_ADDR_LEN; i++) { 651 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 652 LLADDR(ifp->if_sadl)[i]); 653 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 654 } 655 656 GO_WINDOW(3); 657 658 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_RESET); 659 ex_waitcmd(sc); 660 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_RESET); 661 ex_waitcmd(sc); 662 663 /* 664 * Disable reclaim threshold for 90xB, set free threshold to 665 * 6 * 256 = 1536 for 90x. 666 */ 667 if (sc->ex_conf & EX_CONF_90XB) 668 bus_space_write_2(iot, ioh, ELINK_COMMAND, 669 ELINK_TXRECLTHRESH | 255); 670 else 671 bus_space_write_1(iot, ioh, ELINK_TXFREETHRESH, 6); 672 673 bus_space_write_2(iot, ioh, ELINK_COMMAND, 674 SET_RX_EARLY_THRESH | ELINK_THRESH_DISABLE); 675 676 bus_space_write_4(iot, ioh, ELINK_DMACTRL, 677 bus_space_read_4(iot, ioh, ELINK_DMACTRL) | ELINK_DMAC_UPRXEAREN); 678 679 bus_space_write_2(iot, ioh, ELINK_COMMAND, 680 SET_RD_0_MASK | XL_WATCHED_INTERRUPTS); 681 bus_space_write_2(iot, ioh, ELINK_COMMAND, 682 SET_INTR_MASK | XL_WATCHED_INTERRUPTS); 683 684 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 685 if (sc->intr_ack) 686 (* sc->intr_ack)(sc); 687 ex_set_media(sc); 688 ex_set_mc(sc); 689 690 691 bus_space_write_2(iot, ioh, ELINK_COMMAND, STATS_ENABLE); 692 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 693 bus_space_write_4(iot, ioh, ELINK_UPLISTPTR, sc->sc_upddma); 694 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 695 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_UPUNSTALL); 696 697 ifp->if_flags |= IFF_RUNNING; 698 ifp->if_flags &= ~IFF_OACTIVE; 699 ex_start(ifp); 700 sc->sc_if_flags = ifp->if_flags; 701 702 GO_WINDOW(1); 703 704 callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc); 705 706 out: 707 if (error) { 708 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 709 ifp->if_timer = 0; 710 printf("%s: interface not running\n", sc->sc_dev.dv_xname); 711 } 712 return (error); 713 } 714 715 #define MCHASHSIZE 256 716 #define ex_mchash(addr) (ether_crc32_be((addr), ETHER_ADDR_LEN) & \ 717 (MCHASHSIZE - 1)) 718 719 /* 720 * Set multicast receive filter. Also take care of promiscuous mode 721 * here (XXX). 722 */ 723 void 724 ex_set_mc(sc) 725 struct ex_softc *sc; 726 { 727 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 728 struct ethercom *ec = &sc->sc_ethercom; 729 struct ether_multi *enm; 730 struct ether_multistep estep; 731 int i; 732 u_int16_t mask = FIL_INDIVIDUAL | FIL_BRDCST; 733 734 if (ifp->if_flags & IFF_PROMISC) { 735 mask |= FIL_PROMISC; 736 goto allmulti; 737 } 738 739 ETHER_FIRST_MULTI(estep, ec, enm); 740 if (enm == NULL) 741 goto nomulti; 742 743 if ((sc->ex_conf & EX_CONF_90XB) == 0) 744 /* No multicast hash filtering. */ 745 goto allmulti; 746 747 for (i = 0; i < MCHASHSIZE; i++) 748 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 749 ELINK_COMMAND, ELINK_CLEARHASHFILBIT | i); 750 751 do { 752 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 753 ETHER_ADDR_LEN) != 0) 754 goto allmulti; 755 756 i = ex_mchash(enm->enm_addrlo); 757 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 758 ELINK_COMMAND, ELINK_SETHASHFILBIT | i); 759 ETHER_NEXT_MULTI(estep, enm); 760 } while (enm != NULL); 761 mask |= FIL_MULTIHASH; 762 763 nomulti: 764 ifp->if_flags &= ~IFF_ALLMULTI; 765 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 766 SET_RX_FILTER | mask); 767 return; 768 769 allmulti: 770 ifp->if_flags |= IFF_ALLMULTI; 771 mask |= FIL_MULTICAST; 772 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 773 SET_RX_FILTER | mask); 774 } 775 776 777 static void 778 ex_txstat(sc) 779 struct ex_softc *sc; 780 { 781 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 782 bus_space_tag_t iot = sc->sc_iot; 783 bus_space_handle_t ioh = sc->sc_ioh; 784 int i; 785 786 /* 787 * We need to read+write TX_STATUS until we get a 0 status 788 * in order to turn off the interrupt flag. 789 * ELINK_TXSTATUS is in the upper byte of 2 with ELINK_TIMER 790 * XXX: Big Endian? Can we assume that TXSTATUS will be the 791 * upper byte? 792 */ 793 while ((i = bus_space_read_2(iot, ioh, ELINK_TIMER)) & TXS_COMPLETE) { 794 bus_space_write_2(iot, ioh, ELINK_TIMER, 0x0); 795 796 if (i & TXS_JABBER) { 797 ++sc->sc_ethercom.ec_if.if_oerrors; 798 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 799 printf("%s: jabber (%x)\n", 800 sc->sc_dev.dv_xname, i); 801 ex_init(ifp); 802 /* TODO: be more subtle here */ 803 } else if (i & TXS_UNDERRUN) { 804 ++sc->sc_ethercom.ec_if.if_oerrors; 805 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 806 printf("%s: fifo underrun (%x) @%d\n", 807 sc->sc_dev.dv_xname, i, 808 sc->tx_start_thresh); 809 if (sc->tx_succ_ok < 100) 810 sc->tx_start_thresh = min(ETHER_MAX_LEN, 811 sc->tx_start_thresh + 20); 812 sc->tx_succ_ok = 0; 813 ex_init(ifp); 814 /* TODO: be more subtle here */ 815 } else if (i & TXS_MAX_COLLISION) { 816 ++sc->sc_ethercom.ec_if.if_oerrors; 817 ++sc->sc_ethercom.ec_if.if_collisions; 818 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 819 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 820 } else if (sc->tx_succ_ok < 100) 821 sc->tx_succ_ok++; 822 } 823 } 824 825 int 826 ex_media_chg(ifp) 827 struct ifnet *ifp; 828 { 829 830 if (ifp->if_flags & IFF_UP) 831 ex_init(ifp); 832 return 0; 833 } 834 835 void 836 ex_set_xcvr(sc, media) 837 struct ex_softc *sc; 838 const u_int16_t media; 839 { 840 bus_space_tag_t iot = sc->sc_iot; 841 bus_space_handle_t ioh = sc->sc_ioh; 842 u_int32_t icfg; 843 844 /* 845 * We're already in Window 3 846 */ 847 icfg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 848 icfg &= ~(CONFIG_XCVR_SEL << 16); 849 if (media & (ELINK_MEDIACAP_MII | ELINK_MEDIACAP_100BASET4)) 850 icfg |= ELINKMEDIA_MII << (CONFIG_XCVR_SEL_SHIFT + 16); 851 if (media & ELINK_MEDIACAP_100BASETX) 852 icfg |= ELINKMEDIA_AUTO << (CONFIG_XCVR_SEL_SHIFT + 16); 853 if (media & ELINK_MEDIACAP_100BASEFX) 854 icfg |= ELINKMEDIA_100BASE_FX 855 << (CONFIG_XCVR_SEL_SHIFT + 16); 856 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, icfg); 857 } 858 859 void 860 ex_set_media(sc) 861 struct ex_softc *sc; 862 { 863 bus_space_tag_t iot = sc->sc_iot; 864 bus_space_handle_t ioh = sc->sc_ioh; 865 u_int32_t configreg; 866 867 if (((sc->ex_conf & EX_CONF_MII) && 868 (sc->ex_mii.mii_media_active & IFM_FDX)) 869 || (!(sc->ex_conf & EX_CONF_MII) && 870 (sc->ex_mii.mii_media.ifm_media & IFM_FDX))) { 871 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 872 MAC_CONTROL_FDX); 873 } else { 874 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, 0); 875 } 876 877 /* 878 * If the device has MII, select it, and then tell the 879 * PHY which media to use. 880 */ 881 if (sc->ex_conf & EX_CONF_MII) { 882 u_int16_t val; 883 884 GO_WINDOW(3); 885 val = bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS); 886 ex_set_xcvr(sc, val); 887 mii_mediachg(&sc->ex_mii); 888 return; 889 } 890 891 GO_WINDOW(4); 892 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0); 893 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 894 delay(800); 895 896 /* 897 * Now turn on the selected media/transceiver. 898 */ 899 switch (IFM_SUBTYPE(sc->ex_mii.mii_media.ifm_cur->ifm_media)) { 900 case IFM_10_T: 901 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 902 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 903 break; 904 905 case IFM_10_2: 906 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 907 DELAY(800); 908 break; 909 910 case IFM_100_TX: 911 case IFM_100_FX: 912 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 913 LINKBEAT_ENABLE); 914 DELAY(800); 915 break; 916 917 case IFM_10_5: 918 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 919 SQE_ENABLE); 920 DELAY(800); 921 break; 922 923 case IFM_MANUAL: 924 break; 925 926 case IFM_NONE: 927 return; 928 929 default: 930 panic("ex_set_media: impossible"); 931 } 932 933 GO_WINDOW(3); 934 configreg = bus_space_read_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 935 936 configreg &= ~(CONFIG_MEDIAMASK << 16); 937 configreg |= (sc->ex_mii.mii_media.ifm_cur->ifm_data << 938 (CONFIG_MEDIAMASK_SHIFT + 16)); 939 940 bus_space_write_4(iot, ioh, ELINK_W3_INTERNAL_CONFIG, configreg); 941 } 942 943 /* 944 * Get currently-selected media from card. 945 * (if_media callback, may be called before interface is brought up). 946 */ 947 void 948 ex_media_stat(ifp, req) 949 struct ifnet *ifp; 950 struct ifmediareq *req; 951 { 952 struct ex_softc *sc = ifp->if_softc; 953 u_int16_t help; 954 955 if ((ifp->if_flags & (IFF_UP|IFF_RUNNING)) == (IFF_UP|IFF_RUNNING)) { 956 if (sc->ex_conf & EX_CONF_MII) { 957 mii_pollstat(&sc->ex_mii); 958 req->ifm_status = sc->ex_mii.mii_media_status; 959 req->ifm_active = sc->ex_mii.mii_media_active; 960 } else { 961 GO_WINDOW(4); 962 req->ifm_status = IFM_AVALID; 963 req->ifm_active = 964 sc->ex_mii.mii_media.ifm_cur->ifm_media; 965 help = bus_space_read_2(sc->sc_iot, sc->sc_ioh, 966 ELINK_W4_MEDIA_TYPE); 967 if (help & LINKBEAT_DETECT) 968 req->ifm_status |= IFM_ACTIVE; 969 GO_WINDOW(1); 970 } 971 } 972 } 973 974 975 976 /* 977 * Start outputting on the interface. 978 */ 979 static void 980 ex_start(ifp) 981 struct ifnet *ifp; 982 { 983 struct ex_softc *sc = ifp->if_softc; 984 bus_space_tag_t iot = sc->sc_iot; 985 bus_space_handle_t ioh = sc->sc_ioh; 986 volatile struct ex_fraghdr *fr = NULL; 987 volatile struct ex_dpd *dpd = NULL, *prevdpd = NULL; 988 struct ex_txdesc *txp; 989 struct mbuf *mb_head; 990 bus_dmamap_t dmamap; 991 int m_csumflags, offset, totlen, segment, error; 992 u_int32_t csum_flags; 993 994 if (sc->tx_head || sc->tx_free == NULL) 995 return; 996 997 txp = NULL; 998 999 /* 1000 * We're finished if there is nothing more to add to the list or if 1001 * we're all filled up with buffers to transmit. 1002 */ 1003 while (sc->tx_free != NULL) { 1004 /* 1005 * Grab a packet to transmit. 1006 */ 1007 IFQ_DEQUEUE(&ifp->if_snd, mb_head); 1008 if (mb_head == NULL) 1009 break; 1010 1011 /* 1012 * mb_head might be updated later, 1013 * so preserve csum_flags here. 1014 */ 1015 m_csumflags = mb_head->m_pkthdr.csum_flags; 1016 1017 /* 1018 * Get pointer to next available tx desc. 1019 */ 1020 txp = sc->tx_free; 1021 dmamap = txp->tx_dmamap; 1022 1023 /* 1024 * Go through each of the mbufs in the chain and initialize 1025 * the transmit buffer descriptors with the physical address 1026 * and size of the mbuf. 1027 */ 1028 reload: 1029 error = bus_dmamap_load_mbuf(sc->sc_dmat, dmamap, 1030 mb_head, BUS_DMA_WRITE|BUS_DMA_NOWAIT); 1031 switch (error) { 1032 case 0: 1033 /* Success. */ 1034 break; 1035 1036 case EFBIG: 1037 { 1038 struct mbuf *mn; 1039 1040 /* 1041 * We ran out of segments. We have to recopy this 1042 * mbuf chain first. Bail out if we can't get the 1043 * new buffers. 1044 */ 1045 printf("%s: too many segments, ", sc->sc_dev.dv_xname); 1046 1047 MGETHDR(mn, M_DONTWAIT, MT_DATA); 1048 if (mn == NULL) { 1049 m_freem(mb_head); 1050 printf("aborting\n"); 1051 goto out; 1052 } 1053 if (mb_head->m_pkthdr.len > MHLEN) { 1054 MCLGET(mn, M_DONTWAIT); 1055 if ((mn->m_flags & M_EXT) == 0) { 1056 m_freem(mn); 1057 m_freem(mb_head); 1058 printf("aborting\n"); 1059 goto out; 1060 } 1061 } 1062 m_copydata(mb_head, 0, mb_head->m_pkthdr.len, 1063 mtod(mn, caddr_t)); 1064 mn->m_pkthdr.len = mn->m_len = mb_head->m_pkthdr.len; 1065 m_freem(mb_head); 1066 mb_head = mn; 1067 printf("retrying\n"); 1068 goto reload; 1069 } 1070 1071 default: 1072 /* 1073 * Some other problem; report it. 1074 */ 1075 printf("%s: can't load mbuf chain, error = %d\n", 1076 sc->sc_dev.dv_xname, error); 1077 m_freem(mb_head); 1078 goto out; 1079 } 1080 1081 /* 1082 * remove our tx desc from freelist. 1083 */ 1084 sc->tx_free = txp->tx_next; 1085 txp->tx_next = NULL; 1086 1087 fr = &txp->tx_dpd->dpd_frags[0]; 1088 totlen = 0; 1089 for (segment = 0; segment < dmamap->dm_nsegs; segment++, fr++) { 1090 fr->fr_addr = htole32(dmamap->dm_segs[segment].ds_addr); 1091 fr->fr_len = htole32(dmamap->dm_segs[segment].ds_len); 1092 totlen += dmamap->dm_segs[segment].ds_len; 1093 } 1094 fr--; 1095 fr->fr_len |= htole32(EX_FR_LAST); 1096 txp->tx_mbhead = mb_head; 1097 1098 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize, 1099 BUS_DMASYNC_PREWRITE); 1100 1101 dpd = txp->tx_dpd; 1102 dpd->dpd_nextptr = 0; 1103 dpd->dpd_fsh = htole32(totlen); 1104 1105 /* Byte-swap constants so compiler can optimize. */ 1106 1107 if (sc->ex_conf & EX_CONF_90XB) { 1108 csum_flags = 0; 1109 1110 if (m_csumflags & M_CSUM_IPv4) 1111 csum_flags |= htole32(EX_DPD_IPCKSUM); 1112 1113 if (m_csumflags & M_CSUM_TCPv4) 1114 csum_flags |= htole32(EX_DPD_TCPCKSUM); 1115 else if (m_csumflags & M_CSUM_UDPv4) 1116 csum_flags |= htole32(EX_DPD_UDPCKSUM); 1117 1118 dpd->dpd_fsh |= csum_flags; 1119 } else { 1120 KDASSERT((mb_head->m_pkthdr.csum_flags & 1121 (M_CSUM_IPv4|M_CSUM_TCPv4|M_CSUM_UDPv4)) == 0); 1122 } 1123 1124 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1125 ((const char *)(intptr_t)dpd - (const char *)sc->sc_dpd), 1126 sizeof (struct ex_dpd), 1127 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1128 1129 /* 1130 * No need to stall the download engine, we know it's 1131 * not busy right now. 1132 * 1133 * Fix up pointers in both the "soft" tx and the physical 1134 * tx list. 1135 */ 1136 if (sc->tx_head != NULL) { 1137 prevdpd = sc->tx_tail->tx_dpd; 1138 offset = ((const char *)(intptr_t)prevdpd - (const char *)sc->sc_dpd); 1139 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1140 offset, sizeof (struct ex_dpd), 1141 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1142 prevdpd->dpd_nextptr = htole32(DPD_DMADDR(sc, txp)); 1143 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1144 offset, sizeof (struct ex_dpd), 1145 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1146 sc->tx_tail->tx_next = txp; 1147 sc->tx_tail = txp; 1148 } else { 1149 sc->tx_tail = sc->tx_head = txp; 1150 } 1151 1152 #if NBPFILTER > 0 1153 /* 1154 * Pass packet to bpf if there is a listener. 1155 */ 1156 if (ifp->if_bpf) 1157 bpf_mtap(ifp->if_bpf, mb_head); 1158 #endif 1159 } 1160 out: 1161 if (sc->tx_head) { 1162 sc->tx_tail->tx_dpd->dpd_fsh |= htole32(EX_DPD_DNIND); 1163 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1164 ((caddr_t)sc->tx_tail->tx_dpd - (caddr_t)sc->sc_dpd), 1165 sizeof (struct ex_dpd), 1166 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1167 ifp->if_flags |= IFF_OACTIVE; 1168 bus_space_write_2(iot, ioh, ELINK_COMMAND, ELINK_DNUNSTALL); 1169 bus_space_write_4(iot, ioh, ELINK_DNLISTPTR, 1170 DPD_DMADDR(sc, sc->tx_head)); 1171 1172 /* trigger watchdog */ 1173 ifp->if_timer = 5; 1174 } 1175 } 1176 1177 1178 int 1179 ex_intr(arg) 1180 void *arg; 1181 { 1182 struct ex_softc *sc = arg; 1183 bus_space_tag_t iot = sc->sc_iot; 1184 bus_space_handle_t ioh = sc->sc_ioh; 1185 u_int16_t stat; 1186 int ret = 0; 1187 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1188 1189 if ((ifp->if_flags & IFF_RUNNING) == 0 || 1190 !device_is_active(&sc->sc_dev)) 1191 return (0); 1192 1193 for (;;) { 1194 stat = bus_space_read_2(iot, ioh, ELINK_STATUS); 1195 1196 if ((stat & XL_WATCHED_INTERRUPTS) == 0) { 1197 if ((stat & INTR_LATCH) == 0) { 1198 #if 0 1199 printf("%s: intr latch cleared\n", 1200 sc->sc_dev.dv_xname); 1201 #endif 1202 break; 1203 } 1204 } 1205 1206 ret = 1; 1207 1208 /* 1209 * Acknowledge interrupts. 1210 */ 1211 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1212 (stat & (XL_WATCHED_INTERRUPTS | INTR_LATCH))); 1213 if (sc->intr_ack) 1214 (*sc->intr_ack)(sc); 1215 1216 if (stat & HOST_ERROR) { 1217 printf("%s: adapter failure (%x)\n", 1218 sc->sc_dev.dv_xname, stat); 1219 ex_reset(sc); 1220 ex_init(ifp); 1221 return 1; 1222 } 1223 if (stat & TX_COMPLETE) { 1224 ex_txstat(sc); 1225 } 1226 if (stat & UPD_STATS) { 1227 ex_getstats(sc); 1228 } 1229 if (stat & DN_COMPLETE) { 1230 struct ex_txdesc *txp, *ptxp = NULL; 1231 bus_dmamap_t txmap; 1232 1233 /* reset watchdog timer, was set in ex_start() */ 1234 ifp->if_timer = 0; 1235 1236 for (txp = sc->tx_head; txp != NULL; 1237 txp = txp->tx_next) { 1238 bus_dmamap_sync(sc->sc_dmat, 1239 sc->sc_dpd_dmamap, 1240 (caddr_t)txp->tx_dpd - (caddr_t)sc->sc_dpd, 1241 sizeof (struct ex_dpd), 1242 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1243 if (txp->tx_mbhead != NULL) { 1244 txmap = txp->tx_dmamap; 1245 bus_dmamap_sync(sc->sc_dmat, txmap, 1246 0, txmap->dm_mapsize, 1247 BUS_DMASYNC_POSTWRITE); 1248 bus_dmamap_unload(sc->sc_dmat, txmap); 1249 m_freem(txp->tx_mbhead); 1250 txp->tx_mbhead = NULL; 1251 } 1252 ptxp = txp; 1253 } 1254 1255 /* 1256 * Move finished tx buffers back to the tx free list. 1257 */ 1258 if (sc->tx_free) { 1259 sc->tx_ftail->tx_next = sc->tx_head; 1260 sc->tx_ftail = ptxp; 1261 } else 1262 sc->tx_ftail = sc->tx_free = sc->tx_head; 1263 1264 sc->tx_head = sc->tx_tail = NULL; 1265 ifp->if_flags &= ~IFF_OACTIVE; 1266 } 1267 1268 if (stat & UP_COMPLETE) { 1269 struct ex_rxdesc *rxd; 1270 struct mbuf *m; 1271 struct ex_upd *upd; 1272 bus_dmamap_t rxmap; 1273 u_int32_t pktstat; 1274 1275 rcvloop: 1276 rxd = sc->rx_head; 1277 rxmap = rxd->rx_dmamap; 1278 m = rxd->rx_mbhead; 1279 upd = rxd->rx_upd; 1280 1281 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, 1282 rxmap->dm_mapsize, 1283 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1284 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1285 ((caddr_t)upd - (caddr_t)sc->sc_upd), 1286 sizeof (struct ex_upd), 1287 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 1288 pktstat = le32toh(upd->upd_pktstatus); 1289 1290 if (pktstat & EX_UPD_COMPLETE) { 1291 /* 1292 * Remove first packet from the chain. 1293 */ 1294 sc->rx_head = rxd->rx_next; 1295 rxd->rx_next = NULL; 1296 1297 /* 1298 * Add a new buffer to the receive chain. 1299 * If this fails, the old buffer is recycled 1300 * instead. 1301 */ 1302 if (ex_add_rxbuf(sc, rxd) == 0) { 1303 u_int16_t total_len; 1304 1305 if (pktstat & 1306 ((sc->sc_ethercom.ec_capenable & 1307 ETHERCAP_VLAN_MTU) ? 1308 EX_UPD_ERR_VLAN : EX_UPD_ERR)) { 1309 ifp->if_ierrors++; 1310 m_freem(m); 1311 goto rcvloop; 1312 } 1313 1314 total_len = pktstat & EX_UPD_PKTLENMASK; 1315 if (total_len < 1316 sizeof(struct ether_header)) { 1317 m_freem(m); 1318 goto rcvloop; 1319 } 1320 m->m_pkthdr.rcvif = ifp; 1321 m->m_pkthdr.len = m->m_len = total_len; 1322 #if NBPFILTER > 0 1323 if (ifp->if_bpf) 1324 bpf_mtap(ifp->if_bpf, m); 1325 #endif 1326 /* 1327 * Set the incoming checksum information for the packet. 1328 */ 1329 if ((sc->ex_conf & EX_CONF_90XB) != 0 && 1330 (pktstat & EX_UPD_IPCHECKED) != 0) { 1331 m->m_pkthdr.csum_flags |= M_CSUM_IPv4; 1332 if (pktstat & EX_UPD_IPCKSUMERR) 1333 m->m_pkthdr.csum_flags |= M_CSUM_IPv4_BAD; 1334 if (pktstat & EX_UPD_TCPCHECKED) { 1335 m->m_pkthdr.csum_flags |= M_CSUM_TCPv4; 1336 if (pktstat & EX_UPD_TCPCKSUMERR) 1337 m->m_pkthdr.csum_flags |= 1338 M_CSUM_TCP_UDP_BAD; 1339 } else if (pktstat & EX_UPD_UDPCHECKED) { 1340 m->m_pkthdr.csum_flags |= M_CSUM_UDPv4; 1341 if (pktstat & EX_UPD_UDPCKSUMERR) 1342 m->m_pkthdr.csum_flags |= 1343 M_CSUM_TCP_UDP_BAD; 1344 } 1345 } 1346 (*ifp->if_input)(ifp, m); 1347 } 1348 goto rcvloop; 1349 } 1350 /* 1351 * Just in case we filled up all UPDs and the DMA engine 1352 * stalled. We could be more subtle about this. 1353 */ 1354 if (bus_space_read_4(iot, ioh, ELINK_UPLISTPTR) == 0) { 1355 printf("%s: uplistptr was 0\n", 1356 sc->sc_dev.dv_xname); 1357 ex_init(ifp); 1358 } else if (bus_space_read_4(iot, ioh, ELINK_UPPKTSTATUS) 1359 & 0x2000) { 1360 printf("%s: receive stalled\n", 1361 sc->sc_dev.dv_xname); 1362 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1363 ELINK_UPUNSTALL); 1364 } 1365 } 1366 1367 #if NRND > 0 1368 if (stat) 1369 rnd_add_uint32(&sc->rnd_source, stat); 1370 #endif 1371 } 1372 1373 /* no more interrupts */ 1374 if (ret && IFQ_IS_EMPTY(&ifp->if_snd) == 0) 1375 ex_start(ifp); 1376 return ret; 1377 } 1378 1379 int 1380 ex_ioctl(ifp, cmd, data) 1381 struct ifnet *ifp; 1382 u_long cmd; 1383 caddr_t data; 1384 { 1385 struct ex_softc *sc = ifp->if_softc; 1386 struct ifreq *ifr = (struct ifreq *)data; 1387 int s, error; 1388 1389 s = splnet(); 1390 1391 switch (cmd) { 1392 case SIOCSIFMEDIA: 1393 case SIOCGIFMEDIA: 1394 error = ifmedia_ioctl(ifp, ifr, &sc->ex_mii.mii_media, cmd); 1395 break; 1396 case SIOCSIFFLAGS: 1397 /* If the interface is up and running, only modify the receive 1398 * filter when setting promiscuous or debug mode. Otherwise 1399 * fall through to ether_ioctl, which will reset the chip. 1400 */ 1401 #define RESETIGN (IFF_CANTCHANGE|IFF_DEBUG) 1402 if (((ifp->if_flags & (IFF_UP|IFF_RUNNING)) 1403 == (IFF_UP|IFF_RUNNING)) 1404 && ((ifp->if_flags & (~RESETIGN)) 1405 == (sc->sc_if_flags & (~RESETIGN)))) { 1406 ex_set_mc(sc); 1407 error = 0; 1408 break; 1409 #undef RESETIGN 1410 } 1411 /* FALLTHROUGH */ 1412 default: 1413 error = ether_ioctl(ifp, cmd, data); 1414 if (error == ENETRESET) { 1415 /* 1416 * Multicast list has changed; set the hardware filter 1417 * accordingly. 1418 */ 1419 if (ifp->if_flags & IFF_RUNNING) 1420 ex_set_mc(sc); 1421 error = 0; 1422 } 1423 break; 1424 } 1425 1426 sc->sc_if_flags = ifp->if_flags; 1427 splx(s); 1428 return (error); 1429 } 1430 1431 void 1432 ex_getstats(sc) 1433 struct ex_softc *sc; 1434 { 1435 bus_space_handle_t ioh = sc->sc_ioh; 1436 bus_space_tag_t iot = sc->sc_iot; 1437 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1438 u_int8_t upperok; 1439 1440 GO_WINDOW(6); 1441 upperok = bus_space_read_1(iot, ioh, UPPER_FRAMES_OK); 1442 ifp->if_ipackets += bus_space_read_1(iot, ioh, RX_FRAMES_OK); 1443 ifp->if_ipackets += (upperok & 0x03) << 8; 1444 ifp->if_opackets += bus_space_read_1(iot, ioh, TX_FRAMES_OK); 1445 ifp->if_opackets += (upperok & 0x30) << 4; 1446 ifp->if_ierrors += bus_space_read_1(iot, ioh, RX_OVERRUNS); 1447 ifp->if_collisions += bus_space_read_1(iot, ioh, TX_COLLISIONS); 1448 /* 1449 * There seems to be no way to get the exact number of collisions, 1450 * this is the number that occurred at the very least. 1451 */ 1452 ifp->if_collisions += 2 * bus_space_read_1(iot, ioh, 1453 TX_AFTER_X_COLLISIONS); 1454 /* 1455 * Interface byte counts are counted by ether_input() and 1456 * ether_output(), so don't accumulate them here. Just 1457 * read the NIC counters so they don't generate overflow interrupts. 1458 * Upper byte counters are latched from reading the totals, so 1459 * they don't need to be read if we don't need their values. 1460 */ 1461 (void)bus_space_read_2(iot, ioh, RX_TOTAL_OK); 1462 (void)bus_space_read_2(iot, ioh, TX_TOTAL_OK); 1463 1464 /* 1465 * Clear the following to avoid stats overflow interrupts 1466 */ 1467 (void)bus_space_read_1(iot, ioh, TX_DEFERRALS); 1468 (void)bus_space_read_1(iot, ioh, TX_AFTER_1_COLLISION); 1469 (void)bus_space_read_1(iot, ioh, TX_NO_SQE); 1470 (void)bus_space_read_1(iot, ioh, TX_CD_LOST); 1471 GO_WINDOW(4); 1472 (void)bus_space_read_1(iot, ioh, ELINK_W4_BADSSD); 1473 GO_WINDOW(1); 1474 } 1475 1476 void 1477 ex_printstats(sc) 1478 struct ex_softc *sc; 1479 { 1480 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1481 1482 ex_getstats(sc); 1483 printf("in %llu out %llu ierror %llu oerror %llu ibytes %llu obytes " 1484 "%llu\n", (unsigned long long)ifp->if_ipackets, 1485 (unsigned long long)ifp->if_opackets, 1486 (unsigned long long)ifp->if_ierrors, 1487 (unsigned long long)ifp->if_oerrors, 1488 (unsigned long long)ifp->if_ibytes, 1489 (unsigned long long)ifp->if_obytes); 1490 } 1491 1492 void 1493 ex_tick(arg) 1494 void *arg; 1495 { 1496 struct ex_softc *sc = arg; 1497 int s; 1498 1499 if (!device_is_active(&sc->sc_dev)) 1500 return; 1501 1502 s = splnet(); 1503 1504 if (sc->ex_conf & EX_CONF_MII) 1505 mii_tick(&sc->ex_mii); 1506 1507 if (!(bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, ELINK_STATUS) 1508 & COMMAND_IN_PROGRESS)) 1509 ex_getstats(sc); 1510 1511 splx(s); 1512 1513 callout_reset(&sc->ex_mii_callout, hz, ex_tick, sc); 1514 } 1515 1516 void 1517 ex_reset(sc) 1518 struct ex_softc *sc; 1519 { 1520 u_int16_t val = GLOBAL_RESET; 1521 1522 if (sc->ex_conf & EX_CONF_RESETHACK) 1523 val |= 0x10; 1524 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, val); 1525 /* 1526 * XXX apparently the command in progress bit can't be trusted 1527 * during a reset, so we just always wait this long. Fortunately 1528 * we normally only reset the chip during autoconfig. 1529 */ 1530 delay(100000); 1531 ex_waitcmd(sc); 1532 } 1533 1534 void 1535 ex_watchdog(ifp) 1536 struct ifnet *ifp; 1537 { 1538 struct ex_softc *sc = ifp->if_softc; 1539 1540 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1541 ++sc->sc_ethercom.ec_if.if_oerrors; 1542 1543 ex_reset(sc); 1544 ex_init(ifp); 1545 } 1546 1547 void 1548 ex_stop(ifp, disable) 1549 struct ifnet *ifp; 1550 int disable; 1551 { 1552 struct ex_softc *sc = ifp->if_softc; 1553 bus_space_tag_t iot = sc->sc_iot; 1554 bus_space_handle_t ioh = sc->sc_ioh; 1555 struct ex_txdesc *tx; 1556 struct ex_rxdesc *rx; 1557 int i; 1558 1559 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1560 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1561 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1562 1563 for (tx = sc->tx_head ; tx != NULL; tx = tx->tx_next) { 1564 if (tx->tx_mbhead == NULL) 1565 continue; 1566 m_freem(tx->tx_mbhead); 1567 tx->tx_mbhead = NULL; 1568 bus_dmamap_unload(sc->sc_dmat, tx->tx_dmamap); 1569 tx->tx_dpd->dpd_fsh = tx->tx_dpd->dpd_nextptr = 0; 1570 bus_dmamap_sync(sc->sc_dmat, sc->sc_dpd_dmamap, 1571 ((caddr_t)tx->tx_dpd - (caddr_t)sc->sc_dpd), 1572 sizeof (struct ex_dpd), 1573 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1574 } 1575 sc->tx_tail = sc->tx_head = NULL; 1576 ex_init_txdescs(sc); 1577 1578 sc->rx_tail = sc->rx_head = 0; 1579 for (i = 0; i < EX_NUPD; i++) { 1580 rx = &sc->sc_rxdescs[i]; 1581 if (rx->rx_mbhead != NULL) { 1582 bus_dmamap_unload(sc->sc_dmat, rx->rx_dmamap); 1583 m_freem(rx->rx_mbhead); 1584 rx->rx_mbhead = NULL; 1585 } 1586 ex_add_rxbuf(sc, rx); 1587 } 1588 1589 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | INTR_LATCH); 1590 1591 callout_stop(&sc->ex_mii_callout); 1592 if (sc->ex_conf & EX_CONF_MII) 1593 mii_down(&sc->ex_mii); 1594 1595 if (disable) 1596 ex_disable(sc); 1597 1598 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1599 sc->sc_if_flags = ifp->if_flags; 1600 ifp->if_timer = 0; 1601 } 1602 1603 static void 1604 ex_init_txdescs(sc) 1605 struct ex_softc *sc; 1606 { 1607 int i; 1608 1609 for (i = 0; i < EX_NDPD; i++) { 1610 sc->sc_txdescs[i].tx_dmamap = sc->sc_tx_dmamaps[i]; 1611 sc->sc_txdescs[i].tx_dpd = &sc->sc_dpd[i]; 1612 if (i < EX_NDPD - 1) 1613 sc->sc_txdescs[i].tx_next = &sc->sc_txdescs[i + 1]; 1614 else 1615 sc->sc_txdescs[i].tx_next = NULL; 1616 } 1617 sc->tx_free = &sc->sc_txdescs[0]; 1618 sc->tx_ftail = &sc->sc_txdescs[EX_NDPD-1]; 1619 } 1620 1621 1622 int 1623 ex_activate(self, act) 1624 struct device *self; 1625 enum devact act; 1626 { 1627 struct ex_softc *sc = (void *) self; 1628 int s, error = 0; 1629 1630 s = splnet(); 1631 switch (act) { 1632 case DVACT_ACTIVATE: 1633 error = EOPNOTSUPP; 1634 break; 1635 1636 case DVACT_DEACTIVATE: 1637 if (sc->ex_conf & EX_CONF_MII) 1638 mii_activate(&sc->ex_mii, act, MII_PHY_ANY, 1639 MII_OFFSET_ANY); 1640 if_deactivate(&sc->sc_ethercom.ec_if); 1641 break; 1642 } 1643 splx(s); 1644 1645 return (error); 1646 } 1647 1648 int 1649 ex_detach(sc) 1650 struct ex_softc *sc; 1651 { 1652 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1653 struct ex_rxdesc *rxd; 1654 int i; 1655 1656 /* Succeed now if there's no work to do. */ 1657 if ((sc->ex_flags & EX_FLAGS_ATTACHED) == 0) 1658 return (0); 1659 1660 /* Unhook our tick handler. */ 1661 callout_stop(&sc->ex_mii_callout); 1662 1663 if (sc->ex_conf & EX_CONF_MII) { 1664 /* Detach all PHYs */ 1665 mii_detach(&sc->ex_mii, MII_PHY_ANY, MII_OFFSET_ANY); 1666 } 1667 1668 /* Delete all remaining media. */ 1669 ifmedia_delete_instance(&sc->ex_mii.mii_media, IFM_INST_ANY); 1670 1671 #if NRND > 0 1672 rnd_detach_source(&sc->rnd_source); 1673 #endif 1674 ether_ifdetach(ifp); 1675 if_detach(ifp); 1676 1677 for (i = 0; i < EX_NUPD; i++) { 1678 rxd = &sc->sc_rxdescs[i]; 1679 if (rxd->rx_mbhead != NULL) { 1680 bus_dmamap_unload(sc->sc_dmat, rxd->rx_dmamap); 1681 m_freem(rxd->rx_mbhead); 1682 rxd->rx_mbhead = NULL; 1683 } 1684 } 1685 for (i = 0; i < EX_NUPD; i++) 1686 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_dmamaps[i]); 1687 for (i = 0; i < EX_NDPD; i++) 1688 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_dmamaps[i]); 1689 bus_dmamap_unload(sc->sc_dmat, sc->sc_dpd_dmamap); 1690 bus_dmamap_destroy(sc->sc_dmat, sc->sc_dpd_dmamap); 1691 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_dpd, 1692 EX_NDPD * sizeof (struct ex_dpd)); 1693 bus_dmamem_free(sc->sc_dmat, &sc->sc_dseg, sc->sc_drseg); 1694 bus_dmamap_unload(sc->sc_dmat, sc->sc_upd_dmamap); 1695 bus_dmamap_destroy(sc->sc_dmat, sc->sc_upd_dmamap); 1696 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_upd, 1697 EX_NUPD * sizeof (struct ex_upd)); 1698 bus_dmamem_free(sc->sc_dmat, &sc->sc_useg, sc->sc_urseg); 1699 1700 shutdownhook_disestablish(sc->sc_sdhook); 1701 powerhook_disestablish(sc->sc_powerhook); 1702 1703 return (0); 1704 } 1705 1706 /* 1707 * Before reboots, reset card completely. 1708 */ 1709 static void 1710 ex_shutdown(arg) 1711 void *arg; 1712 { 1713 struct ex_softc *sc = arg; 1714 1715 ex_stop(&sc->sc_ethercom.ec_if, 1); 1716 /* 1717 * Make sure the interface is powered up when we reboot, 1718 * otherwise firmware on some systems gets really confused. 1719 */ 1720 (void) ex_enable(sc); 1721 } 1722 1723 /* 1724 * Read EEPROM data. 1725 * XXX what to do if EEPROM doesn't unbusy? 1726 */ 1727 u_int16_t 1728 ex_read_eeprom(sc, offset) 1729 struct ex_softc *sc; 1730 int offset; 1731 { 1732 bus_space_tag_t iot = sc->sc_iot; 1733 bus_space_handle_t ioh = sc->sc_ioh; 1734 u_int16_t data = 0, cmd = READ_EEPROM; 1735 int off; 1736 1737 off = sc->ex_conf & EX_CONF_EEPROM_OFF ? 0x30 : 0; 1738 cmd = sc->ex_conf & EX_CONF_EEPROM_8BIT ? READ_EEPROM8 : READ_EEPROM; 1739 1740 GO_WINDOW(0); 1741 if (ex_eeprom_busy(sc)) 1742 goto out; 1743 bus_space_write_2(iot, ioh, ELINK_W0_EEPROM_COMMAND, 1744 cmd | (off + (offset & 0x3f))); 1745 if (ex_eeprom_busy(sc)) 1746 goto out; 1747 data = bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_DATA); 1748 out: 1749 return data; 1750 } 1751 1752 static int 1753 ex_eeprom_busy(sc) 1754 struct ex_softc *sc; 1755 { 1756 bus_space_tag_t iot = sc->sc_iot; 1757 bus_space_handle_t ioh = sc->sc_ioh; 1758 int i = 100; 1759 1760 while (i--) { 1761 if (!(bus_space_read_2(iot, ioh, ELINK_W0_EEPROM_COMMAND) & 1762 EEPROM_BUSY)) 1763 return 0; 1764 delay(100); 1765 } 1766 printf("\n%s: eeprom stays busy.\n", sc->sc_dev.dv_xname); 1767 return (1); 1768 } 1769 1770 /* 1771 * Create a new rx buffer and add it to the 'soft' rx list. 1772 */ 1773 static int 1774 ex_add_rxbuf(sc, rxd) 1775 struct ex_softc *sc; 1776 struct ex_rxdesc *rxd; 1777 { 1778 struct mbuf *m, *oldm; 1779 bus_dmamap_t rxmap; 1780 int error, rval = 0; 1781 1782 oldm = rxd->rx_mbhead; 1783 rxmap = rxd->rx_dmamap; 1784 1785 MGETHDR(m, M_DONTWAIT, MT_DATA); 1786 if (m != NULL) { 1787 MCLGET(m, M_DONTWAIT); 1788 if ((m->m_flags & M_EXT) == 0) { 1789 m_freem(m); 1790 if (oldm == NULL) 1791 return 1; 1792 m = oldm; 1793 MRESETDATA(m); 1794 rval = 1; 1795 } 1796 } else { 1797 if (oldm == NULL) 1798 return 1; 1799 m = oldm; 1800 MRESETDATA(m); 1801 rval = 1; 1802 } 1803 1804 /* 1805 * Setup the DMA map for this receive buffer. 1806 */ 1807 if (m != oldm) { 1808 if (oldm != NULL) 1809 bus_dmamap_unload(sc->sc_dmat, rxmap); 1810 error = bus_dmamap_load(sc->sc_dmat, rxmap, 1811 m->m_ext.ext_buf, MCLBYTES, NULL, 1812 BUS_DMA_READ|BUS_DMA_NOWAIT); 1813 if (error) { 1814 printf("%s: can't load rx buffer, error = %d\n", 1815 sc->sc_dev.dv_xname, error); 1816 panic("ex_add_rxbuf"); /* XXX */ 1817 } 1818 } 1819 1820 /* 1821 * Align for data after 14 byte header. 1822 */ 1823 m->m_data += 2; 1824 1825 rxd->rx_mbhead = m; 1826 rxd->rx_upd->upd_pktstatus = htole32(MCLBYTES - 2); 1827 rxd->rx_upd->upd_frags[0].fr_addr = 1828 htole32(rxmap->dm_segs[0].ds_addr + 2); 1829 rxd->rx_upd->upd_nextptr = 0; 1830 1831 /* 1832 * Attach it to the end of the list. 1833 */ 1834 if (sc->rx_head != NULL) { 1835 sc->rx_tail->rx_next = rxd; 1836 sc->rx_tail->rx_upd->upd_nextptr = htole32(sc->sc_upddma + 1837 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd)); 1838 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1839 (caddr_t)sc->rx_tail->rx_upd - (caddr_t)sc->sc_upd, 1840 sizeof (struct ex_upd), 1841 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1842 } else { 1843 sc->rx_head = rxd; 1844 } 1845 sc->rx_tail = rxd; 1846 1847 bus_dmamap_sync(sc->sc_dmat, rxmap, 0, rxmap->dm_mapsize, 1848 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1849 bus_dmamap_sync(sc->sc_dmat, sc->sc_upd_dmamap, 1850 ((caddr_t)rxd->rx_upd - (caddr_t)sc->sc_upd), 1851 sizeof (struct ex_upd), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1852 return (rval); 1853 } 1854 1855 u_int32_t 1856 ex_mii_bitbang_read(self) 1857 struct device *self; 1858 { 1859 struct ex_softc *sc = (void *) self; 1860 1861 /* We're already in Window 4. */ 1862 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT)); 1863 } 1864 1865 void 1866 ex_mii_bitbang_write(self, val) 1867 struct device *self; 1868 u_int32_t val; 1869 { 1870 struct ex_softc *sc = (void *) self; 1871 1872 /* We're already in Window 4. */ 1873 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_W4_PHYSMGMT, val); 1874 } 1875 1876 int 1877 ex_mii_readreg(v, phy, reg) 1878 struct device *v; 1879 int phy, reg; 1880 { 1881 struct ex_softc *sc = (struct ex_softc *)v; 1882 int val; 1883 1884 if ((sc->ex_conf & EX_CONF_INTPHY) && phy != ELINK_INTPHY_ID) 1885 return 0; 1886 1887 GO_WINDOW(4); 1888 1889 val = mii_bitbang_readreg(v, &ex_mii_bitbang_ops, phy, reg); 1890 1891 GO_WINDOW(1); 1892 1893 return (val); 1894 } 1895 1896 void 1897 ex_mii_writereg(v, phy, reg, data) 1898 struct device *v; 1899 int phy; 1900 int reg; 1901 int data; 1902 { 1903 struct ex_softc *sc = (struct ex_softc *)v; 1904 1905 GO_WINDOW(4); 1906 1907 mii_bitbang_writereg(v, &ex_mii_bitbang_ops, phy, reg, data); 1908 1909 GO_WINDOW(1); 1910 } 1911 1912 void 1913 ex_mii_statchg(v) 1914 struct device *v; 1915 { 1916 struct ex_softc *sc = (struct ex_softc *)v; 1917 bus_space_tag_t iot = sc->sc_iot; 1918 bus_space_handle_t ioh = sc->sc_ioh; 1919 int mctl; 1920 1921 GO_WINDOW(3); 1922 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1923 if (sc->ex_mii.mii_media_active & IFM_FDX) 1924 mctl |= MAC_CONTROL_FDX; 1925 else 1926 mctl &= ~MAC_CONTROL_FDX; 1927 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1928 GO_WINDOW(1); /* back to operating window */ 1929 } 1930 1931 int 1932 ex_enable(sc) 1933 struct ex_softc *sc; 1934 { 1935 if (sc->enabled == 0 && sc->enable != NULL) { 1936 if ((*sc->enable)(sc) != 0) { 1937 printf("%s: de/vice enable failed\n", 1938 sc->sc_dev.dv_xname); 1939 return (EIO); 1940 } 1941 sc->enabled = 1; 1942 } 1943 return (0); 1944 } 1945 1946 void 1947 ex_disable(sc) 1948 struct ex_softc *sc; 1949 { 1950 if (sc->enabled == 1 && sc->disable != NULL) { 1951 (*sc->disable)(sc); 1952 sc->enabled = 0; 1953 } 1954 } 1955 1956 void 1957 ex_power(why, arg) 1958 int why; 1959 void *arg; 1960 { 1961 struct ex_softc *sc = (void *)arg; 1962 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1963 int s; 1964 1965 s = splnet(); 1966 switch (why) { 1967 case PWR_SUSPEND: 1968 case PWR_STANDBY: 1969 ex_stop(ifp, 0); 1970 if (sc->power != NULL) 1971 (*sc->power)(sc, why); 1972 break; 1973 case PWR_RESUME: 1974 if (ifp->if_flags & IFF_UP) { 1975 if (sc->power != NULL) 1976 (*sc->power)(sc, why); 1977 ex_init(ifp); 1978 } 1979 break; 1980 case PWR_SOFTSUSPEND: 1981 case PWR_SOFTSTANDBY: 1982 case PWR_SOFTRESUME: 1983 break; 1984 } 1985 splx(s); 1986 } 1987
Indexes created Thu Oct 23 22:10:10 GMT 2025