esiop.c revision 1.13
1 /* $NetBSD: esiop.c,v 1.13 2002/04/29 15:44:16 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 */ 32 33 /* SYM53c7/8xx PCI-SCSI I/O Processors driver */ 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: esiop.c,v 1.13 2002/04/29 15:44:16 bouyer Exp $"); 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/device.h> 41 #include <sys/malloc.h> 42 #include <sys/buf.h> 43 #include <sys/kernel.h> 44 45 #include <uvm/uvm_extern.h> 46 47 #include <machine/endian.h> 48 #include <machine/bus.h> 49 50 #include <dev/microcode/siop/esiop.out> 51 52 #include <dev/scsipi/scsi_all.h> 53 #include <dev/scsipi/scsi_message.h> 54 #include <dev/scsipi/scsipi_all.h> 55 56 #include <dev/scsipi/scsiconf.h> 57 58 #include <dev/ic/siopreg.h> 59 #include <dev/ic/siopvar_common.h> 60 #include <dev/ic/esiopvar.h> 61 62 #include "opt_siop.h" 63 64 #ifndef DEBUG 65 #undef DEBUG 66 #endif 67 #undef SIOP_DEBUG 68 #undef SIOP_DEBUG_DR 69 #undef SIOP_DEBUG_INTR 70 #undef SIOP_DEBUG_SCHED 71 #undef DUMP_SCRIPT 72 73 #define SIOP_STATS 74 75 #ifndef SIOP_DEFAULT_TARGET 76 #define SIOP_DEFAULT_TARGET 7 77 #endif 78 79 /* number of cmd descriptors per block */ 80 #define SIOP_NCMDPB (PAGE_SIZE / sizeof(struct esiop_xfer)) 81 82 void esiop_reset __P((struct esiop_softc *)); 83 void esiop_checkdone __P((struct esiop_softc *)); 84 void esiop_handle_reset __P((struct esiop_softc *)); 85 void esiop_scsicmd_end __P((struct esiop_cmd *)); 86 void esiop_unqueue __P((struct esiop_softc *, int, int)); 87 int esiop_handle_qtag_reject __P((struct esiop_cmd *)); 88 static void esiop_start __P((struct esiop_softc *, struct esiop_cmd *)); 89 void esiop_timeout __P((void *)); 90 int esiop_scsicmd __P((struct scsipi_xfer *)); 91 void esiop_scsipi_request __P((struct scsipi_channel *, 92 scsipi_adapter_req_t, void *)); 93 void esiop_dump_script __P((struct esiop_softc *)); 94 void esiop_morecbd __P((struct esiop_softc *)); 95 void esiop_moretagtbl __P((struct esiop_softc *)); 96 void siop_add_reselsw __P((struct esiop_softc *, int)); 97 void esiop_target_register __P((struct esiop_softc *, u_int32_t)); 98 99 void esiop_update_scntl3 __P((struct esiop_softc *, 100 struct siop_common_target *)); 101 102 #ifdef SIOP_STATS 103 static int esiop_stat_intr = 0; 104 static int esiop_stat_intr_shortxfer = 0; 105 static int esiop_stat_intr_sdp = 0; 106 static int esiop_stat_intr_done = 0; 107 static int esiop_stat_intr_xferdisc = 0; 108 static int esiop_stat_intr_lunresel = 0; 109 static int esiop_stat_intr_qfull = 0; 110 void esiop_printstats __P((void)); 111 #define INCSTAT(x) x++ 112 #else 113 #define INCSTAT(x) 114 #endif 115 116 static __inline__ void esiop_script_sync __P((struct esiop_softc *, int)); 117 static __inline__ void 118 esiop_script_sync(sc, ops) 119 struct esiop_softc *sc; 120 int ops; 121 { 122 if ((sc->sc_c.features & SF_CHIP_RAM) == 0) 123 bus_dmamap_sync(sc->sc_c.sc_dmat, sc->sc_c.sc_scriptdma, 0, 124 PAGE_SIZE, ops); 125 } 126 127 static __inline__ u_int32_t esiop_script_read __P((struct esiop_softc *, u_int)); 128 static __inline__ u_int32_t 129 esiop_script_read(sc, offset) 130 struct esiop_softc *sc; 131 u_int offset; 132 { 133 if (sc->sc_c.features & SF_CHIP_RAM) { 134 return bus_space_read_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh, 135 offset * 4); 136 } else { 137 return le32toh(sc->sc_c.sc_script[offset]); 138 } 139 } 140 141 static __inline__ void esiop_script_write __P((struct esiop_softc *, u_int, 142 u_int32_t)); 143 static __inline__ void 144 esiop_script_write(sc, offset, val) 145 struct esiop_softc *sc; 146 u_int offset; 147 u_int32_t val; 148 { 149 if (sc->sc_c.features & SF_CHIP_RAM) { 150 bus_space_write_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh, 151 offset * 4, val); 152 } else { 153 sc->sc_c.sc_script[offset] = htole32(val); 154 } 155 } 156 157 void 158 esiop_attach(sc) 159 struct esiop_softc *sc; 160 { 161 struct esiop_dsatbl *tagtbl_donering; 162 163 if (siop_common_attach(&sc->sc_c) != 0 ) 164 return; 165 166 TAILQ_INIT(&sc->free_list); 167 TAILQ_INIT(&sc->cmds); 168 TAILQ_INIT(&sc->free_tagtbl); 169 TAILQ_INIT(&sc->tag_tblblk); 170 sc->sc_currschedslot = 0; 171 #ifdef SIOP_DEBUG 172 printf("%s: script size = %d, PHY addr=0x%x, VIRT=%p\n", 173 sc->sc_c.sc_dev.dv_xname, (int)sizeof(esiop_script), 174 (u_int32_t)sc->sc_c.sc_scriptaddr, sc->sc_c.sc_script); 175 #endif 176 177 sc->sc_c.sc_adapt.adapt_max_periph = ESIOP_NTAG; 178 sc->sc_c.sc_adapt.adapt_request = esiop_scsipi_request; 179 180 /* 181 * get space for the CMD done slot. For this we use a tag table entry. 182 * It's the same size and allows us to not waste 3/4 of a page 183 */ 184 #ifdef DIAGNOSTIC 185 if (ESIOP_NTAG != A_ndone_slots) { 186 printf("%s: size of tag DSA table different from the done" 187 "ring\n", sc->sc_c.sc_dev.dv_xname); 188 return; 189 } 190 #endif 191 esiop_moretagtbl(sc); 192 tagtbl_donering = TAILQ_FIRST(&sc->free_tagtbl); 193 if (tagtbl_donering == NULL) { 194 printf("%s: no memory for command done ring\n", 195 "ring\n", sc->sc_c.sc_dev.dv_xname); 196 return; 197 } 198 TAILQ_REMOVE(&sc->free_tagtbl, tagtbl_donering, next); 199 sc->sc_done_map = tagtbl_donering->tblblk->blkmap; 200 sc->sc_done_offset = tagtbl_donering->tbl_offset; 201 sc->sc_done_slot = &tagtbl_donering->tbl[0]; 202 203 /* Do a bus reset, so that devices fall back to narrow/async */ 204 siop_resetbus(&sc->sc_c); 205 /* 206 * siop_reset() will reset the chip, thus clearing pending interrupts 207 */ 208 esiop_reset(sc); 209 #ifdef DUMP_SCRIPT 210 esiop_dump_script(sc); 211 #endif 212 213 config_found((struct device*)sc, &sc->sc_c.sc_chan, scsiprint); 214 } 215 216 void 217 esiop_reset(sc) 218 struct esiop_softc *sc; 219 { 220 int i, j; 221 u_int32_t addr; 222 u_int32_t msgin_addr, sem_addr; 223 224 siop_common_reset(&sc->sc_c); 225 226 /* 227 * we copy the script at the beggining of RAM. Then there is 4 bytes 228 * for messages in, and 4 bytes for semaphore 229 */ 230 sc->sc_free_offset = sizeof(esiop_script) / sizeof(esiop_script[0]); 231 msgin_addr = 232 sc->sc_free_offset * sizeof(u_int32_t) + sc->sc_c.sc_scriptaddr; 233 sc->sc_free_offset += 1; 234 sc->sc_semoffset = sc->sc_free_offset; 235 sem_addr = 236 sc->sc_semoffset * sizeof(u_int32_t) + sc->sc_c.sc_scriptaddr; 237 sc->sc_free_offset += 1; 238 /* then we have the scheduler ring */ 239 sc->sc_shedoffset = sc->sc_free_offset; 240 sc->sc_free_offset += A_ncmd_slots * CMD_SLOTSIZE; 241 /* then the targets DSA table */ 242 sc->sc_target_table_offset = sc->sc_free_offset; 243 sc->sc_free_offset += sc->sc_c.sc_chan.chan_ntargets; 244 /* copy and patch the script */ 245 if (sc->sc_c.features & SF_CHIP_RAM) { 246 bus_space_write_region_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh, 0, 247 esiop_script, 248 sizeof(esiop_script) / sizeof(esiop_script[0])); 249 for (j = 0; j < 250 (sizeof(E_tlq_offset_Used) / sizeof(E_tlq_offset_Used[0])); 251 j++) { 252 bus_space_write_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh, 253 E_tlq_offset_Used[j] * 4, 254 sizeof(struct siop_common_xfer)); 255 } 256 for (j = 0; j < 257 (sizeof(E_abs_msgin2_Used) / sizeof(E_abs_msgin2_Used[0])); 258 j++) { 259 bus_space_write_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh, 260 E_abs_msgin2_Used[j] * 4, msgin_addr); 261 } 262 for (j = 0; j < 263 (sizeof(E_abs_sem_Used) / sizeof(E_abs_sem_Used[0])); 264 j++) { 265 bus_space_write_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh, 266 E_abs_sem_Used[j] * 4, sem_addr); 267 } 268 269 if (sc->sc_c.features & SF_CHIP_LED0) { 270 bus_space_write_region_4(sc->sc_c.sc_ramt, 271 sc->sc_c.sc_ramh, 272 Ent_led_on1, esiop_led_on, 273 sizeof(esiop_led_on) / sizeof(esiop_led_on[0])); 274 bus_space_write_region_4(sc->sc_c.sc_ramt, 275 sc->sc_c.sc_ramh, 276 Ent_led_on2, esiop_led_on, 277 sizeof(esiop_led_on) / sizeof(esiop_led_on[0])); 278 bus_space_write_region_4(sc->sc_c.sc_ramt, 279 sc->sc_c.sc_ramh, 280 Ent_led_off, esiop_led_off, 281 sizeof(esiop_led_off) / sizeof(esiop_led_off[0])); 282 } 283 } else { 284 for (j = 0; 285 j < (sizeof(esiop_script) / sizeof(esiop_script[0])); j++) { 286 sc->sc_c.sc_script[j] = htole32(esiop_script[j]); 287 } 288 for (j = 0; j < 289 (sizeof(E_tlq_offset_Used) / sizeof(E_tlq_offset_Used[0])); 290 j++) { 291 sc->sc_c.sc_script[E_tlq_offset_Used[j]] = 292 htole32(sizeof(struct siop_common_xfer)); 293 } 294 for (j = 0; j < 295 (sizeof(E_abs_msgin2_Used) / sizeof(E_abs_msgin2_Used[0])); 296 j++) { 297 sc->sc_c.sc_script[E_abs_msgin2_Used[j]] = 298 htole32(msgin_addr); 299 } 300 for (j = 0; j < 301 (sizeof(E_abs_sem_Used) / sizeof(E_abs_sem_Used[0])); 302 j++) { 303 sc->sc_c.sc_script[E_abs_sem_Used[j]] = 304 htole32(sem_addr); 305 } 306 307 if (sc->sc_c.features & SF_CHIP_LED0) { 308 for (j = 0; j < (sizeof(esiop_led_on) / 309 sizeof(esiop_led_on[0])); j++) 310 sc->sc_c.sc_script[ 311 Ent_led_on1 / sizeof(esiop_led_on[0]) + j 312 ] = htole32(esiop_led_on[j]); 313 for (j = 0; j < (sizeof(esiop_led_on) / 314 sizeof(esiop_led_on[0])); j++) 315 sc->sc_c.sc_script[ 316 Ent_led_on2 / sizeof(esiop_led_on[0]) + j 317 ] = htole32(esiop_led_on[j]); 318 for (j = 0; j < (sizeof(esiop_led_off) / 319 sizeof(esiop_led_off[0])); j++) 320 sc->sc_c.sc_script[ 321 Ent_led_off / sizeof(esiop_led_off[0]) + j 322 ] = htole32(esiop_led_off[j]); 323 } 324 } 325 /* get base of scheduler ring */ 326 addr = sc->sc_c.sc_scriptaddr + sc->sc_shedoffset * sizeof(u_int32_t); 327 /* init scheduler */ 328 for (i = 0; i < A_ncmd_slots; i++) { 329 esiop_script_write(sc, 330 sc->sc_shedoffset + i * CMD_SLOTSIZE, A_f_cmd_free); 331 } 332 sc->sc_currschedslot = 0; 333 bus_space_write_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_SCRATCHE, 0); 334 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_SCRATCHD, addr); 335 /* 336 * 0x78000000 is a 'move data8 to reg'. data8 is the second 337 * octet, reg offset is the third. 338 */ 339 esiop_script_write(sc, Ent_cmdr0 / 4, 340 0x78640000 | ((addr & 0x000000ff) << 8)); 341 esiop_script_write(sc, Ent_cmdr1 / 4, 342 0x78650000 | ((addr & 0x0000ff00) )); 343 esiop_script_write(sc, Ent_cmdr2 / 4, 344 0x78660000 | ((addr & 0x00ff0000) >> 8)); 345 esiop_script_write(sc, Ent_cmdr3 / 4, 346 0x78670000 | ((addr & 0xff000000) >> 16)); 347 /* done ring */ 348 for (i = 0; i < A_ndone_slots; i++) 349 sc->sc_done_slot[i] = 0; 350 bus_dmamap_sync(sc->sc_c.sc_dmat, sc->sc_done_map, 351 sc->sc_done_offset, A_ndone_slots * sizeof(u_int32_t), 352 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 353 addr = sc->sc_done_map->dm_segs[0].ds_addr + sc->sc_done_offset; 354 sc->sc_currdoneslot = 0; 355 bus_space_write_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_SCRATCHE + 2, 0); 356 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_SCRATCHF, addr); 357 esiop_script_write(sc, Ent_doner0 / 4, 358 0x786c0000 | ((addr & 0x000000ff) << 8)); 359 esiop_script_write(sc, Ent_doner1 / 4, 360 0x786d0000 | ((addr & 0x0000ff00) )); 361 esiop_script_write(sc, Ent_doner2 / 4, 362 0x786e0000 | ((addr & 0x00ff0000) >> 8)); 363 esiop_script_write(sc, Ent_doner3 / 4, 364 0x786f0000 | ((addr & 0xff000000) >> 16)); 365 366 /* set flags */ 367 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_SCRATCHC, 0); 368 /* write pointer of base of target DSA table */ 369 addr = (sc->sc_target_table_offset * sizeof(u_int32_t)) + 370 sc->sc_c.sc_scriptaddr; 371 esiop_script_write(sc, (Ent_load_targtable / 4) + 0, 372 esiop_script_read(sc,(Ent_load_targtable / 4) + 0) | 373 ((addr & 0x000000ff) << 8)); 374 esiop_script_write(sc, (Ent_load_targtable / 4) + 2, 375 esiop_script_read(sc,(Ent_load_targtable / 4) + 2) | 376 ((addr & 0x0000ff00) )); 377 esiop_script_write(sc, (Ent_load_targtable / 4) + 4, 378 esiop_script_read(sc,(Ent_load_targtable / 4) + 4) | 379 ((addr & 0x00ff0000) >> 8)); 380 esiop_script_write(sc, (Ent_load_targtable / 4) + 6, 381 esiop_script_read(sc,(Ent_load_targtable / 4) + 6) | 382 ((addr & 0xff000000) >> 16)); 383 #ifdef SIOP_DEBUG 384 printf("%s: target table offset %d free offset %d\n", 385 sc->sc_c.sc_dev.dv_xname, sc->sc_target_table_offset, 386 sc->sc_free_offset); 387 #endif 388 389 /* register existing targets */ 390 for (i = 0; i < sc->sc_c.sc_chan.chan_ntargets; i++) { 391 if (sc->sc_c.targets[i]) 392 esiop_target_register(sc, i); 393 } 394 /* start script */ 395 if ((sc->sc_c.features & SF_CHIP_RAM) == 0) { 396 bus_dmamap_sync(sc->sc_c.sc_dmat, sc->sc_c.sc_scriptdma, 0, 397 PAGE_SIZE, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 398 } 399 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSP, 400 sc->sc_c.sc_scriptaddr + Ent_reselect); 401 } 402 403 #if 0 404 #define CALL_SCRIPT(ent) do {\ 405 printf ("start script DSA 0x%lx DSP 0x%lx\n", \ 406 esiop_cmd->cmd_c.dsa, \ 407 sc->sc_c.sc_scriptaddr + ent); \ 408 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSP, sc->sc_c.sc_scriptaddr + ent); \ 409 } while (0) 410 #else 411 #define CALL_SCRIPT(ent) do {\ 412 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSP, sc->sc_c.sc_scriptaddr + ent); \ 413 } while (0) 414 #endif 415 416 int 417 esiop_intr(v) 418 void *v; 419 { 420 struct esiop_softc *sc = v; 421 struct esiop_target *esiop_target; 422 struct esiop_cmd *esiop_cmd; 423 struct esiop_lun *esiop_lun; 424 struct scsipi_xfer *xs; 425 int istat, sist, sstat1, dstat; 426 u_int32_t irqcode; 427 int need_reset = 0; 428 int offset, target, lun, tag; 429 u_int32_t tflags; 430 u_int32_t addr; 431 int freetarget = 0; 432 int slot; 433 int retval = 0; 434 435 again: 436 istat = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_ISTAT); 437 if ((istat & (ISTAT_INTF | ISTAT_DIP | ISTAT_SIP)) == 0) { 438 return retval; 439 } 440 retval = 1; 441 INCSTAT(esiop_stat_intr); 442 esiop_checkdone(sc); 443 if (istat & ISTAT_INTF) { 444 bus_space_write_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 445 SIOP_ISTAT, ISTAT_INTF); 446 goto again; 447 } 448 449 if ((istat &(ISTAT_DIP | ISTAT_SIP | ISTAT_ABRT)) == 450 (ISTAT_DIP | ISTAT_ABRT)) { 451 /* clear abort */ 452 bus_space_write_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 453 SIOP_ISTAT, 0); 454 } 455 456 /* get CMD from T/L/Q */ 457 tflags = bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 458 SIOP_SCRATCHC); 459 #ifdef SIOP_DEBUG_INTR 460 printf("interrupt, istat=0x%x tflags=0x%x " 461 "DSA=0x%x DSP=0x%lx\n", istat, tflags, 462 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA), 463 (u_long)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 464 SIOP_DSP) - 465 sc->sc_c.sc_scriptaddr)); 466 #endif 467 target = (tflags & A_f_c_target) ? ((tflags >> 8) & 0xff) : -1; 468 if (target > sc->sc_c.sc_chan.chan_ntargets) target = -1; 469 lun = (tflags & A_f_c_lun) ? ((tflags >> 16) & 0xff) : -1; 470 if (lun > sc->sc_c.sc_chan.chan_nluns) lun = -1; 471 tag = (tflags & A_f_c_tag) ? ((tflags >> 24) & 0xff) : -1; 472 473 if (target >= 0 && lun >= 0) { 474 esiop_target = (struct esiop_target *)sc->sc_c.targets[target]; 475 if (esiop_target == NULL) { 476 printf("esiop_target (target %d) not valid\n", target); 477 goto none; 478 } 479 esiop_lun = esiop_target->esiop_lun[lun]; 480 if (esiop_lun == NULL) { 481 printf("esiop_lun (target %d lun %d) not valid\n", 482 target, lun); 483 goto none; 484 } 485 esiop_cmd = 486 (tag >= 0) ? esiop_lun->tactive[tag] : esiop_lun->active; 487 if (esiop_cmd == NULL) { 488 printf("esiop_cmd (target %d lun %d tag %d) not valid\n", 489 target, lun, tag); 490 goto none; 491 } 492 xs = esiop_cmd->cmd_c.xs; 493 #ifdef DIAGNOSTIC 494 if (esiop_cmd->cmd_c.status != CMDST_ACTIVE) { 495 printf("esiop_cmd (target %d lun %d) " 496 "not active (%d)\n", target, lun, 497 esiop_cmd->cmd_c.status); 498 goto none; 499 } 500 #endif 501 esiop_table_sync(esiop_cmd, 502 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 503 } else { 504 none: 505 xs = NULL; 506 esiop_target = NULL; 507 esiop_lun = NULL; 508 esiop_cmd = NULL; 509 } 510 if (istat & ISTAT_DIP) { 511 dstat = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 512 SIOP_DSTAT); 513 if (dstat & DSTAT_ABRT) { 514 /* was probably generated by a bus reset IOCTL */ 515 if ((dstat & DSTAT_DFE) == 0) 516 siop_clearfifo(&sc->sc_c); 517 goto reset; 518 } 519 if (dstat & DSTAT_SSI) { 520 printf("single step dsp 0x%08x dsa 0x08%x\n", 521 (int)(bus_space_read_4(sc->sc_c.sc_rt, 522 sc->sc_c.sc_rh, SIOP_DSP) - 523 sc->sc_c.sc_scriptaddr), 524 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 525 SIOP_DSA)); 526 if ((dstat & ~(DSTAT_DFE | DSTAT_SSI)) == 0 && 527 (istat & ISTAT_SIP) == 0) { 528 bus_space_write_1(sc->sc_c.sc_rt, 529 sc->sc_c.sc_rh, SIOP_DCNTL, 530 bus_space_read_1(sc->sc_c.sc_rt, 531 sc->sc_c.sc_rh, SIOP_DCNTL) | DCNTL_STD); 532 } 533 return 1; 534 } 535 536 if (dstat & ~(DSTAT_SIR | DSTAT_DFE | DSTAT_SSI)) { 537 printf("%s: DMA IRQ:", sc->sc_c.sc_dev.dv_xname); 538 if (dstat & DSTAT_IID) 539 printf(" Illegal instruction"); 540 if (dstat & DSTAT_BF) 541 printf(" bus fault"); 542 if (dstat & DSTAT_MDPE) 543 printf(" parity"); 544 if (dstat & DSTAT_DFE) 545 printf(" dma fifo empty"); 546 else 547 siop_clearfifo(&sc->sc_c); 548 printf(", DSP=0x%x DSA=0x%x: ", 549 (int)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 550 SIOP_DSP) - sc->sc_c.sc_scriptaddr), 551 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA)); 552 if (esiop_cmd) 553 printf("T/L/Q=%d/%d/%d last msg_in=0x%x status=0x%x\n", 554 target, lun, tag, esiop_cmd->cmd_tables->msg_in[0], 555 le32toh(esiop_cmd->cmd_tables->status)); 556 else 557 printf(" current T/L/Q invalid\n"); 558 need_reset = 1; 559 } 560 } 561 if (istat & ISTAT_SIP) { 562 if (istat & ISTAT_DIP) 563 delay(10); 564 /* 565 * Can't read sist0 & sist1 independantly, or we have to 566 * insert delay 567 */ 568 sist = bus_space_read_2(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 569 SIOP_SIST0); 570 sstat1 = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 571 SIOP_SSTAT1); 572 #ifdef SIOP_DEBUG_INTR 573 printf("scsi interrupt, sist=0x%x sstat1=0x%x " 574 "DSA=0x%x DSP=0x%lx\n", sist, sstat1, 575 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA), 576 (u_long)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 577 SIOP_DSP) - 578 sc->sc_c.sc_scriptaddr)); 579 #endif 580 if (sist & SIST0_RST) { 581 esiop_handle_reset(sc); 582 /* no table to flush here */ 583 return 1; 584 } 585 if (sist & SIST0_SGE) { 586 if (esiop_cmd) 587 scsipi_printaddr(xs->xs_periph); 588 else 589 printf("%s:", sc->sc_c.sc_dev.dv_xname); 590 printf("scsi gross error\n"); 591 if (esiop_target) 592 esiop_target->target_c.flags &= ~TARF_DT; 593 #ifdef DEBUG 594 printf("DSA=0x%x DSP=0x%lx\n", 595 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA), 596 (u_long)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 597 SIOP_DSP) - 598 sc->sc_c.sc_scriptaddr)); 599 #endif 600 goto reset; 601 } 602 if ((sist & SIST0_MA) && need_reset == 0) { 603 if (esiop_cmd) { 604 int scratchc0; 605 dstat = bus_space_read_1(sc->sc_c.sc_rt, 606 sc->sc_c.sc_rh, SIOP_DSTAT); 607 /* 608 * first restore DSA, in case we were in a S/G 609 * operation. 610 */ 611 bus_space_write_4(sc->sc_c.sc_rt, 612 sc->sc_c.sc_rh, 613 SIOP_DSA, esiop_cmd->cmd_c.dsa); 614 scratchc0 = bus_space_read_1(sc->sc_c.sc_rt, 615 sc->sc_c.sc_rh, SIOP_SCRATCHC); 616 switch (sstat1 & SSTAT1_PHASE_MASK) { 617 case SSTAT1_PHASE_STATUS: 618 /* 619 * previous phase may be aborted for any reason 620 * ( for example, the target has less data to 621 * transfer than requested). Just go to status 622 * and the command should terminate. 623 */ 624 INCSTAT(esiop_stat_intr_shortxfer); 625 if ((dstat & DSTAT_DFE) == 0) 626 siop_clearfifo(&sc->sc_c); 627 /* no table to flush here */ 628 CALL_SCRIPT(Ent_status); 629 return 1; 630 case SSTAT1_PHASE_MSGIN: 631 /* 632 * target may be ready to disconnect 633 * Save data pointers just in case. 634 */ 635 INCSTAT(esiop_stat_intr_xferdisc); 636 if (scratchc0 & A_f_c_data) 637 siop_sdp(&esiop_cmd->cmd_c); 638 else if ((dstat & DSTAT_DFE) == 0) 639 siop_clearfifo(&sc->sc_c); 640 bus_space_write_1(sc->sc_c.sc_rt, 641 sc->sc_c.sc_rh, SIOP_SCRATCHC, 642 scratchc0 & ~A_f_c_data); 643 esiop_table_sync(esiop_cmd, 644 BUS_DMASYNC_PREREAD | 645 BUS_DMASYNC_PREWRITE); 646 CALL_SCRIPT(Ent_msgin); 647 return 1; 648 } 649 printf("%s: unexpected phase mismatch %d\n", 650 sc->sc_c.sc_dev.dv_xname, 651 sstat1 & SSTAT1_PHASE_MASK); 652 } else { 653 printf("%s: phase mismatch without command\n", 654 sc->sc_c.sc_dev.dv_xname); 655 } 656 need_reset = 1; 657 } 658 if (sist & SIST0_PAR) { 659 /* parity error, reset */ 660 if (esiop_cmd) 661 scsipi_printaddr(xs->xs_periph); 662 else 663 printf("%s:", sc->sc_c.sc_dev.dv_xname); 664 printf("parity error\n"); 665 if (esiop_target) 666 esiop_target->target_c.flags &= ~TARF_DT; 667 goto reset; 668 } 669 if ((sist & (SIST1_STO << 8)) && need_reset == 0) { 670 /* 671 * selection time out, assume there's no device here 672 * We also have to update the ring pointer ourselve 673 */ 674 slot = bus_space_read_1(sc->sc_c.sc_rt, 675 sc->sc_c.sc_rh, SIOP_SCRATCHE); 676 esiop_script_sync(sc, 677 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 678 #ifdef SIOP_DEBUG_SCHED 679 printf("sel timeout target %d, slot %d\n", target, slot); 680 #endif 681 /* 682 * mark this slot as free, and advance to next slot 683 */ 684 esiop_script_write(sc, 685 sc->sc_shedoffset + slot * CMD_SLOTSIZE, 686 A_f_cmd_free); 687 addr = bus_space_read_4(sc->sc_c.sc_rt, 688 sc->sc_c.sc_rh, SIOP_SCRATCHD); 689 if (slot < (A_ncmd_slots - 1)) { 690 bus_space_write_1(sc->sc_c.sc_rt, 691 sc->sc_c.sc_rh, SIOP_SCRATCHE, slot + 1); 692 addr = addr + sizeof(struct esiop_slot); 693 } else { 694 bus_space_write_1(sc->sc_c.sc_rt, 695 sc->sc_c.sc_rh, SIOP_SCRATCHE, 0); 696 addr = sc->sc_c.sc_scriptaddr + 697 sc->sc_shedoffset * sizeof(u_int32_t); 698 } 699 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 700 SIOP_SCRATCHD, addr); 701 esiop_script_sync(sc, 702 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 703 if (esiop_cmd) { 704 esiop_cmd->cmd_c.status = CMDST_DONE; 705 xs->error = XS_SELTIMEOUT; 706 freetarget = 1; 707 goto end; 708 } else { 709 printf("%s: selection timeout without " 710 "command, target %d (sdid 0x%x), " 711 "slot %d\n", 712 sc->sc_c.sc_dev.dv_xname, target, 713 bus_space_read_1(sc->sc_c.sc_rt, 714 sc->sc_c.sc_rh, SIOP_SDID), slot); 715 need_reset = 1; 716 } 717 } 718 if (sist & SIST0_UDC) { 719 /* 720 * unexpected disconnect. Usually the target signals 721 * a fatal condition this way. Attempt to get sense. 722 */ 723 if (esiop_cmd) { 724 esiop_cmd->cmd_tables->status = 725 htole32(SCSI_CHECK); 726 goto end; 727 } 728 printf("%s: unexpected disconnect without " 729 "command\n", sc->sc_c.sc_dev.dv_xname); 730 goto reset; 731 } 732 if (sist & (SIST1_SBMC << 8)) { 733 /* SCSI bus mode change */ 734 if (siop_modechange(&sc->sc_c) == 0 || need_reset == 1) 735 goto reset; 736 if ((istat & ISTAT_DIP) && (dstat & DSTAT_SIR)) { 737 /* 738 * we have a script interrupt, it will 739 * restart the script. 740 */ 741 goto scintr; 742 } 743 /* 744 * else we have to restart it ourselve, at the 745 * interrupted instruction. 746 */ 747 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 748 SIOP_DSP, 749 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 750 SIOP_DSP) - 8); 751 return 1; 752 } 753 /* Else it's an unhandled exeption (for now). */ 754 printf("%s: unhandled scsi interrupt, sist=0x%x sstat1=0x%x " 755 "DSA=0x%x DSP=0x%x\n", sc->sc_c.sc_dev.dv_xname, sist, 756 bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 757 SIOP_SSTAT1), 758 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA), 759 (int)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 760 SIOP_DSP) - sc->sc_c.sc_scriptaddr)); 761 if (esiop_cmd) { 762 esiop_cmd->cmd_c.status = CMDST_DONE; 763 xs->error = XS_SELTIMEOUT; 764 goto end; 765 } 766 need_reset = 1; 767 } 768 if (need_reset) { 769 reset: 770 /* fatal error, reset the bus */ 771 siop_resetbus(&sc->sc_c); 772 /* no table to flush here */ 773 return 1; 774 } 775 776 scintr: 777 if ((istat & ISTAT_DIP) && (dstat & DSTAT_SIR)) { /* script interrupt */ 778 irqcode = bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 779 SIOP_DSPS); 780 #ifdef SIOP_DEBUG_INTR 781 printf("script interrupt 0x%x\n", irqcode); 782 #endif 783 /* 784 * no command, or an inactive command is only valid for a 785 * reselect interrupt 786 */ 787 if ((irqcode & 0x80) == 0) { 788 if (esiop_cmd == NULL) { 789 printf( 790 "%s: script interrupt (0x%x) with invalid DSA !!!\n", 791 sc->sc_c.sc_dev.dv_xname, irqcode); 792 goto reset; 793 } 794 if (esiop_cmd->cmd_c.status != CMDST_ACTIVE) { 795 printf("%s: command with invalid status " 796 "(IRQ code 0x%x current status %d) !\n", 797 sc->sc_c.sc_dev.dv_xname, 798 irqcode, esiop_cmd->cmd_c.status); 799 xs = NULL; 800 } 801 } 802 switch(irqcode) { 803 case A_int_err: 804 printf("error, DSP=0x%x\n", 805 (int)(bus_space_read_4(sc->sc_c.sc_rt, 806 sc->sc_c.sc_rh, SIOP_DSP) - sc->sc_c.sc_scriptaddr)); 807 if (xs) { 808 xs->error = XS_SELTIMEOUT; 809 goto end; 810 } else { 811 goto reset; 812 } 813 case A_int_msgin: 814 { 815 int msgin = bus_space_read_1(sc->sc_c.sc_rt, 816 sc->sc_c.sc_rh, SIOP_SFBR); 817 if (msgin == MSG_MESSAGE_REJECT) { 818 int msg, extmsg; 819 if (esiop_cmd->cmd_tables->msg_out[0] & 0x80) { 820 /* 821 * message was part of a identify + 822 * something else. Identify shoudl't 823 * have been rejected. 824 */ 825 msg = 826 esiop_cmd->cmd_tables->msg_out[1]; 827 extmsg = 828 esiop_cmd->cmd_tables->msg_out[3]; 829 } else { 830 msg = 831 esiop_cmd->cmd_tables->msg_out[0]; 832 extmsg = 833 esiop_cmd->cmd_tables->msg_out[2]; 834 } 835 if (msg == MSG_MESSAGE_REJECT) { 836 /* MSG_REJECT for a MSG_REJECT !*/ 837 if (xs) 838 scsipi_printaddr(xs->xs_periph); 839 else 840 printf("%s: ", 841 sc->sc_c.sc_dev.dv_xname); 842 printf("our reject message was " 843 "rejected\n"); 844 goto reset; 845 } 846 if (msg == MSG_EXTENDED && 847 extmsg == MSG_EXT_WDTR) { 848 /* WDTR rejected, initiate sync */ 849 if ((esiop_target->target_c.flags & 850 TARF_SYNC) == 0) { 851 esiop_target->target_c.status = 852 TARST_OK; 853 siop_update_xfer_mode(&sc->sc_c, 854 target); 855 /* no table to flush here */ 856 CALL_SCRIPT(Ent_msgin_ack); 857 return 1; 858 } 859 esiop_target->target_c.status = 860 TARST_SYNC_NEG; 861 siop_sdtr_msg(&esiop_cmd->cmd_c, 0, 862 sc->sc_c.st_minsync, 863 sc->sc_c.maxoff); 864 esiop_table_sync(esiop_cmd, 865 BUS_DMASYNC_PREREAD | 866 BUS_DMASYNC_PREWRITE); 867 CALL_SCRIPT(Ent_send_msgout); 868 return 1; 869 } else if (msg == MSG_EXTENDED && 870 extmsg == MSG_EXT_SDTR) { 871 /* sync rejected */ 872 esiop_target->target_c.offset = 0; 873 esiop_target->target_c.period = 0; 874 esiop_target->target_c.status = 875 TARST_OK; 876 siop_update_xfer_mode(&sc->sc_c, 877 target); 878 /* no table to flush here */ 879 CALL_SCRIPT(Ent_msgin_ack); 880 return 1; 881 } else if (msg == MSG_EXTENDED && 882 extmsg == MSG_EXT_PPR) { 883 /* PPR rejected */ 884 esiop_target->target_c.offset = 0; 885 esiop_target->target_c.period = 0; 886 esiop_target->target_c.status = 887 TARST_OK; 888 siop_update_xfer_mode(&sc->sc_c, 889 target); 890 /* no table to flush here */ 891 CALL_SCRIPT(Ent_msgin_ack); 892 return 1; 893 } else if (msg == MSG_SIMPLE_Q_TAG || 894 msg == MSG_HEAD_OF_Q_TAG || 895 msg == MSG_ORDERED_Q_TAG) { 896 if (esiop_handle_qtag_reject( 897 esiop_cmd) == -1) 898 goto reset; 899 CALL_SCRIPT(Ent_msgin_ack); 900 return 1; 901 } 902 if (xs) 903 scsipi_printaddr(xs->xs_periph); 904 else 905 printf("%s: ", 906 sc->sc_c.sc_dev.dv_xname); 907 if (msg == MSG_EXTENDED) { 908 printf("scsi message reject, extended " 909 "message sent was 0x%x\n", extmsg); 910 } else { 911 printf("scsi message reject, message " 912 "sent was 0x%x\n", msg); 913 } 914 /* no table to flush here */ 915 CALL_SCRIPT(Ent_msgin_ack); 916 return 1; 917 } 918 if (xs) 919 scsipi_printaddr(xs->xs_periph); 920 else 921 printf("%s: ", sc->sc_c.sc_dev.dv_xname); 922 printf("unhandled message 0x%x\n", 923 esiop_cmd->cmd_tables->msg_in[0]); 924 esiop_cmd->cmd_tables->msg_out[0] = MSG_MESSAGE_REJECT; 925 esiop_cmd->cmd_tables->t_msgout.count= htole32(1); 926 esiop_table_sync(esiop_cmd, 927 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 928 CALL_SCRIPT(Ent_send_msgout); 929 return 1; 930 } 931 case A_int_extmsgin: 932 #ifdef SIOP_DEBUG_INTR 933 printf("extended message: msg 0x%x len %d\n", 934 esiop_cmd->cmd_tables->msg_in[2], 935 esiop_cmd->cmd_tables->msg_in[1]); 936 #endif 937 if (esiop_cmd->cmd_tables->msg_in[1] > 938 sizeof(esiop_cmd->cmd_tables->msg_in) - 2) 939 printf("%s: extended message too big (%d)\n", 940 sc->sc_c.sc_dev.dv_xname, 941 esiop_cmd->cmd_tables->msg_in[1]); 942 esiop_cmd->cmd_tables->t_extmsgdata.count = 943 htole32(esiop_cmd->cmd_tables->msg_in[1] - 1); 944 esiop_table_sync(esiop_cmd, 945 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 946 CALL_SCRIPT(Ent_get_extmsgdata); 947 return 1; 948 case A_int_extmsgdata: 949 #ifdef SIOP_DEBUG_INTR 950 { 951 int i; 952 printf("extended message: 0x%x, data:", 953 esiop_cmd->cmd_tables->msg_in[2]); 954 for (i = 3; i < 2 + esiop_cmd->cmd_tables->msg_in[1]; 955 i++) 956 printf(" 0x%x", 957 esiop_cmd->cmd_tables->msg_in[i]); 958 printf("\n"); 959 } 960 #endif 961 if (esiop_cmd->cmd_tables->msg_in[2] == MSG_EXT_PPR) { 962 switch (siop_ppr_neg(&esiop_cmd->cmd_c)) { 963 case SIOP_NEG_MSGOUT: 964 esiop_update_scntl3(sc, 965 esiop_cmd->cmd_c.siop_target); 966 esiop_table_sync(esiop_cmd, 967 BUS_DMASYNC_PREREAD | 968 BUS_DMASYNC_PREWRITE); 969 CALL_SCRIPT(Ent_send_msgout); 970 return 1; 971 case SIOP_NEG_ACK: 972 esiop_update_scntl3(sc, 973 esiop_cmd->cmd_c.siop_target); 974 CALL_SCRIPT(Ent_msgin_ack); 975 return 1; 976 default: 977 panic("invalid retval from " 978 "siop_wdtr_neg()"); 979 } 980 return 1; 981 } 982 if (esiop_cmd->cmd_tables->msg_in[2] == MSG_EXT_WDTR) { 983 switch (siop_wdtr_neg(&esiop_cmd->cmd_c)) { 984 case SIOP_NEG_MSGOUT: 985 esiop_update_scntl3(sc, 986 esiop_cmd->cmd_c.siop_target); 987 esiop_table_sync(esiop_cmd, 988 BUS_DMASYNC_PREREAD | 989 BUS_DMASYNC_PREWRITE); 990 CALL_SCRIPT(Ent_send_msgout); 991 return 1; 992 case SIOP_NEG_ACK: 993 esiop_update_scntl3(sc, 994 esiop_cmd->cmd_c.siop_target); 995 CALL_SCRIPT(Ent_msgin_ack); 996 return 1; 997 default: 998 panic("invalid retval from " 999 "siop_wdtr_neg()"); 1000 } 1001 return 1; 1002 } 1003 if (esiop_cmd->cmd_tables->msg_in[2] == MSG_EXT_SDTR) { 1004 switch (siop_sdtr_neg(&esiop_cmd->cmd_c)) { 1005 case SIOP_NEG_MSGOUT: 1006 esiop_update_scntl3(sc, 1007 esiop_cmd->cmd_c.siop_target); 1008 esiop_table_sync(esiop_cmd, 1009 BUS_DMASYNC_PREREAD | 1010 BUS_DMASYNC_PREWRITE); 1011 CALL_SCRIPT(Ent_send_msgout); 1012 return 1; 1013 case SIOP_NEG_ACK: 1014 esiop_update_scntl3(sc, 1015 esiop_cmd->cmd_c.siop_target); 1016 CALL_SCRIPT(Ent_msgin_ack); 1017 return 1; 1018 default: 1019 panic("invalid retval from " 1020 "siop_wdtr_neg()"); 1021 } 1022 return 1; 1023 } 1024 /* send a message reject */ 1025 esiop_cmd->cmd_tables->msg_out[0] = MSG_MESSAGE_REJECT; 1026 esiop_cmd->cmd_tables->t_msgout.count = htole32(1); 1027 esiop_table_sync(esiop_cmd, 1028 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1029 CALL_SCRIPT(Ent_send_msgout); 1030 return 1; 1031 case A_int_disc: 1032 INCSTAT(esiop_stat_intr_sdp); 1033 offset = bus_space_read_1(sc->sc_c.sc_rt, 1034 sc->sc_c.sc_rh, SIOP_SCRATCHA + 1); 1035 #ifdef SIOP_DEBUG_DR 1036 printf("disconnect offset %d\n", offset); 1037 #endif 1038 if (offset > SIOP_NSG) { 1039 printf("%s: bad offset for disconnect (%d)\n", 1040 sc->sc_c.sc_dev.dv_xname, offset); 1041 goto reset; 1042 } 1043 /* 1044 * offset == SIOP_NSG may be a valid condition if 1045 * we get a sdp when the xfer is done. 1046 * Don't call memmove in this case. 1047 */ 1048 if (offset < SIOP_NSG) { 1049 memmove(&esiop_cmd->cmd_tables->data[0], 1050 &esiop_cmd->cmd_tables->data[offset], 1051 (SIOP_NSG - offset) * sizeof(scr_table_t)); 1052 esiop_table_sync(esiop_cmd, 1053 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1054 } 1055 CALL_SCRIPT(Ent_script_sched); 1056 return 1; 1057 case A_int_resfail: 1058 printf("reselect failed\n"); 1059 CALL_SCRIPT(Ent_script_sched); 1060 return 1; 1061 case A_int_done: 1062 if (xs == NULL) { 1063 printf("%s: done without command\n", 1064 sc->sc_c.sc_dev.dv_xname); 1065 CALL_SCRIPT(Ent_script_sched); 1066 return 1; 1067 } 1068 #ifdef SIOP_DEBUG_INTR 1069 printf("done, DSA=0x%lx target id 0x%x last msg " 1070 "in=0x%x status=0x%x\n", (u_long)esiop_cmd->cmd_c.dsa, 1071 le32toh(esiop_cmd->cmd_tables->id), 1072 esiop_cmd->cmd_tables->msg_in[0], 1073 le32toh(esiop_cmd->cmd_tables->status)); 1074 #endif 1075 INCSTAT(esiop_stat_intr_done); 1076 esiop_cmd->cmd_c.status = CMDST_DONE; 1077 goto end; 1078 default: 1079 printf("unknown irqcode %x\n", irqcode); 1080 if (xs) { 1081 xs->error = XS_SELTIMEOUT; 1082 goto end; 1083 } 1084 goto reset; 1085 } 1086 return 1; 1087 } 1088 /* We just should't get there */ 1089 panic("siop_intr: I shouldn't be there !"); 1090 1091 end: 1092 /* 1093 * restart the script now if command completed properly 1094 * Otherwise wait for siop_scsicmd_end(), we may need to cleanup the 1095 * queue 1096 */ 1097 xs->status = le32toh(esiop_cmd->cmd_tables->status); 1098 #ifdef SIOP_DEBUG_INTR 1099 printf("esiop_intr end: status %d\n", xs->status); 1100 #endif 1101 if (tag >= 0) 1102 esiop_lun->tactive[tag] = NULL; 1103 else 1104 esiop_lun->active = NULL; 1105 esiop_scsicmd_end(esiop_cmd); 1106 if (freetarget && esiop_target->target_c.status == TARST_PROBING) 1107 esiop_del_dev(sc, target, lun); 1108 CALL_SCRIPT(Ent_script_sched); 1109 return 1; 1110 } 1111 1112 void 1113 esiop_scsicmd_end(esiop_cmd) 1114 struct esiop_cmd *esiop_cmd; 1115 { 1116 struct scsipi_xfer *xs = esiop_cmd->cmd_c.xs; 1117 struct esiop_softc *sc = (struct esiop_softc *)esiop_cmd->cmd_c.siop_sc; 1118 1119 switch(xs->status) { 1120 case SCSI_OK: 1121 xs->error = XS_NOERROR; 1122 break; 1123 case SCSI_BUSY: 1124 xs->error = XS_BUSY; 1125 break; 1126 case SCSI_CHECK: 1127 xs->error = XS_BUSY; 1128 /* remove commands in the queue and scheduler */ 1129 esiop_unqueue(sc, xs->xs_periph->periph_target, 1130 xs->xs_periph->periph_lun); 1131 break; 1132 case SCSI_QUEUE_FULL: 1133 INCSTAT(esiop_stat_intr_qfull); 1134 #ifdef SIOP_DEBUG 1135 printf("%s:%d:%d: queue full (tag %d)\n", 1136 sc->sc_c.sc_dev.dv_xname, 1137 xs->xs_periph->periph_target, 1138 xs->xs_periph->periph_lun, esiop_cmd->cmd_c.tag); 1139 #endif 1140 xs->error = XS_BUSY; 1141 break; 1142 case SCSI_SIOP_NOCHECK: 1143 /* 1144 * don't check status, xs->error is already valid 1145 */ 1146 break; 1147 case SCSI_SIOP_NOSTATUS: 1148 /* 1149 * the status byte was not updated, cmd was 1150 * aborted 1151 */ 1152 xs->error = XS_SELTIMEOUT; 1153 break; 1154 default: 1155 xs->error = XS_DRIVER_STUFFUP; 1156 } 1157 if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) { 1158 bus_dmamap_sync(sc->sc_c.sc_dmat, 1159 esiop_cmd->cmd_c.dmamap_data, 0, 1160 esiop_cmd->cmd_c.dmamap_data->dm_mapsize, 1161 (xs->xs_control & XS_CTL_DATA_IN) ? 1162 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1163 bus_dmamap_unload(sc->sc_c.sc_dmat, 1164 esiop_cmd->cmd_c.dmamap_data); 1165 } 1166 bus_dmamap_unload(sc->sc_c.sc_dmat, esiop_cmd->cmd_c.dmamap_cmd); 1167 callout_stop(&esiop_cmd->cmd_c.xs->xs_callout); 1168 esiop_cmd->cmd_c.status = CMDST_FREE; 1169 TAILQ_INSERT_TAIL(&sc->free_list, esiop_cmd, next); 1170 xs->resid = 0; 1171 scsipi_done (xs); 1172 } 1173 1174 void 1175 esiop_checkdone(sc) 1176 struct esiop_softc *sc; 1177 { 1178 int target, lun, tag; 1179 struct esiop_target *esiop_target; 1180 struct esiop_lun *esiop_lun; 1181 struct esiop_cmd *esiop_cmd; 1182 u_int32_t slot; 1183 int needsync = 0; 1184 int status; 1185 u_int32_t sem; 1186 1187 esiop_script_sync(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1188 sem = esiop_script_read(sc, sc->sc_semoffset); 1189 esiop_script_write(sc, sc->sc_semoffset, sem & ~A_sem_done); 1190 if ((sc->sc_flags & SCF_CHAN_NOSLOT) && (sem & A_sem_start)) { 1191 /* 1192 * at last one command have been started, 1193 * so we should have free slots now 1194 */ 1195 sc->sc_flags &= ~SCF_CHAN_NOSLOT; 1196 scsipi_channel_thaw(&sc->sc_c.sc_chan, 1); 1197 } 1198 esiop_script_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1199 1200 if ((sem & A_sem_done) == 0) { 1201 /* no pending done command */ 1202 return; 1203 } 1204 1205 bus_dmamap_sync(sc->sc_c.sc_dmat, sc->sc_done_map, 1206 sc->sc_done_offset, A_ndone_slots * sizeof(u_int32_t), 1207 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1208 next: 1209 if (sc->sc_done_slot[sc->sc_currdoneslot] == 0) { 1210 if (needsync) 1211 bus_dmamap_sync(sc->sc_c.sc_dmat, sc->sc_done_map, 1212 sc->sc_done_offset, 1213 A_ndone_slots * sizeof(u_int32_t), 1214 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1215 return; 1216 } 1217 1218 needsync = 1; 1219 1220 slot = htole32(sc->sc_done_slot[sc->sc_currdoneslot]); 1221 sc->sc_done_slot[sc->sc_currdoneslot] = 0; 1222 sc->sc_currdoneslot += 1; 1223 if (sc->sc_currdoneslot == A_ndone_slots) 1224 sc->sc_currdoneslot = 0; 1225 1226 target = (slot & A_f_c_target) ? (slot >> 8) & 0xff : -1; 1227 lun = (slot & A_f_c_lun) ? (slot >> 16) & 0xff : -1; 1228 tag = (slot & A_f_c_tag) ? (slot >> 24) & 0xff : -1; 1229 1230 esiop_target = (target >= 0) ? 1231 (struct esiop_target *)sc->sc_c.targets[target] : NULL; 1232 if (esiop_target == NULL) { 1233 printf("esiop_target (target %d) not valid\n", target); 1234 goto next; 1235 } 1236 esiop_lun = (lun >= 0) ? esiop_target->esiop_lun[lun] : NULL; 1237 if (esiop_lun == NULL) { 1238 printf("esiop_lun (target %d lun %d) not valid\n", 1239 target, lun); 1240 goto next; 1241 } 1242 esiop_cmd = (tag >= 0) ? esiop_lun->tactive[tag] : esiop_lun->active; 1243 if (esiop_cmd == NULL) { 1244 printf("esiop_cmd (target %d lun %d tag %d) not valid\n", 1245 target, lun, tag); 1246 goto next; 1247 } 1248 1249 esiop_table_sync(esiop_cmd, 1250 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1251 status = le32toh(esiop_cmd->cmd_tables->status); 1252 #ifdef DIAGNOSTIC 1253 if (status != SCSI_OK) { 1254 printf("command for T/L/Q %d/%d/%d status %d\n", 1255 target, lun, tag, status); 1256 goto next; 1257 } 1258 1259 #endif 1260 /* Ok, this command has been handled */ 1261 esiop_cmd->cmd_c.xs->status = status; 1262 if (tag >= 0) 1263 esiop_lun->tactive[tag] = NULL; 1264 else 1265 esiop_lun->active = NULL; 1266 esiop_scsicmd_end(esiop_cmd); 1267 goto next; 1268 } 1269 1270 void 1271 esiop_unqueue(sc, target, lun) 1272 struct esiop_softc *sc; 1273 int target; 1274 int lun; 1275 { 1276 int slot, tag; 1277 u_int32_t slotdsa; 1278 struct esiop_cmd *esiop_cmd; 1279 struct esiop_lun *esiop_lun = 1280 ((struct esiop_target *)sc->sc_c.targets[target])->esiop_lun[lun]; 1281 1282 /* first make sure to read valid data */ 1283 esiop_script_sync(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1284 1285 for (tag = 0; tag < ESIOP_NTAG; tag++) { 1286 /* look for commands in the scheduler, not yet started */ 1287 if (esiop_lun->tactive[tag] == NULL) 1288 continue; 1289 esiop_cmd = esiop_lun->tactive[tag]; 1290 for (slot = 0; slot < A_ncmd_slots; slot++) { 1291 slotdsa = esiop_script_read(sc, 1292 sc->sc_shedoffset + slot * CMD_SLOTSIZE); 1293 /* if the slot has any flag, it won't match the DSA */ 1294 if (slotdsa == esiop_cmd->cmd_c.dsa) { /* found it */ 1295 /* Mark this slot as ignore */ 1296 esiop_script_write(sc, 1297 sc->sc_shedoffset + slot * CMD_SLOTSIZE, 1298 esiop_cmd->cmd_c.dsa | A_f_cmd_ignore); 1299 /* ask to requeue */ 1300 esiop_cmd->cmd_c.xs->error = XS_REQUEUE; 1301 esiop_cmd->cmd_c.xs->status = SCSI_SIOP_NOCHECK; 1302 esiop_lun->tactive[tag] = NULL; 1303 esiop_scsicmd_end(esiop_cmd); 1304 break; 1305 } 1306 } 1307 } 1308 esiop_script_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1309 } 1310 1311 /* 1312 * handle a rejected queue tag message: the command will run untagged, 1313 * has to adjust the reselect script. 1314 */ 1315 1316 1317 int 1318 esiop_handle_qtag_reject(esiop_cmd) 1319 struct esiop_cmd *esiop_cmd; 1320 { 1321 struct esiop_softc *sc = (struct esiop_softc *)esiop_cmd->cmd_c.siop_sc; 1322 int target = esiop_cmd->cmd_c.xs->xs_periph->periph_target; 1323 int lun = esiop_cmd->cmd_c.xs->xs_periph->periph_lun; 1324 int tag = esiop_cmd->cmd_tables->msg_out[2]; 1325 struct esiop_target *esiop_target = 1326 (struct esiop_target*)sc->sc_c.targets[target]; 1327 struct esiop_lun *esiop_lun = esiop_target->esiop_lun[lun]; 1328 1329 #ifdef SIOP_DEBUG 1330 printf("%s:%d:%d: tag message %d (%d) rejected (status %d)\n", 1331 sc->sc_c.sc_dev.dv_xname, target, lun, tag, esiop_cmd->cmd_c.tag, 1332 esiop_cmd->cmd_c.status); 1333 #endif 1334 1335 if (esiop_lun->active != NULL) { 1336 printf("%s: untagged command already running for target %d " 1337 "lun %d (status %d)\n", sc->sc_c.sc_dev.dv_xname, 1338 target, lun, esiop_lun->active->cmd_c.status); 1339 return -1; 1340 } 1341 /* clear tag slot */ 1342 esiop_lun->tactive[tag] = NULL; 1343 /* add command to non-tagged slot */ 1344 esiop_lun->active = esiop_cmd; 1345 esiop_cmd->cmd_c.flags &= ~CMDFL_TAG; 1346 esiop_cmd->cmd_c.tag = -1; 1347 /* update DSA table */ 1348 esiop_script_write(sc, esiop_target->lun_table_offset + 1349 lun * 2 + A_target_luntbl / sizeof(u_int32_t), 1350 esiop_cmd->cmd_c.dsa); 1351 esiop_script_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1352 return 0; 1353 } 1354 1355 /* 1356 * handle a bus reset: reset chip, unqueue all active commands, free all 1357 * target struct and report loosage to upper layer. 1358 * As the upper layer may requeue immediatly we have to first store 1359 * all active commands in a temporary queue. 1360 */ 1361 void 1362 esiop_handle_reset(sc) 1363 struct esiop_softc *sc; 1364 { 1365 struct esiop_cmd *esiop_cmd; 1366 struct esiop_lun *esiop_lun; 1367 int target, lun, tag; 1368 /* 1369 * scsi bus reset. reset the chip and restart 1370 * the queue. Need to clean up all active commands 1371 */ 1372 printf("%s: scsi bus reset\n", sc->sc_c.sc_dev.dv_xname); 1373 /* stop, reset and restart the chip */ 1374 esiop_reset(sc); 1375 1376 if (sc->sc_flags & SCF_CHAN_NOSLOT) { 1377 /* chip has been reset, all slots are free now */ 1378 sc->sc_flags &= ~SCF_CHAN_NOSLOT; 1379 scsipi_channel_thaw(&sc->sc_c.sc_chan, 1); 1380 } 1381 /* 1382 * Process all commands: first commmands completes, then commands 1383 * being executed 1384 */ 1385 esiop_checkdone(sc); 1386 for (target = 0; target < sc->sc_c.sc_chan.chan_ntargets; 1387 target++) { 1388 struct esiop_target *esiop_target = 1389 (struct esiop_target *)sc->sc_c.targets[target]; 1390 if (esiop_target == NULL) 1391 continue; 1392 for (lun = 0; lun < 8; lun++) { 1393 esiop_lun = esiop_target->esiop_lun[lun]; 1394 if (esiop_lun == NULL) 1395 continue; 1396 for (tag = -1; tag < 1397 ((sc->sc_c.targets[target]->flags & TARF_TAG) ? 1398 ESIOP_NTAG : 0); 1399 tag++) { 1400 if (tag >= 0) 1401 esiop_cmd = esiop_lun->tactive[tag]; 1402 else 1403 esiop_cmd = esiop_lun->active; 1404 if (esiop_cmd == NULL) 1405 continue; 1406 scsipi_printaddr(esiop_cmd->cmd_c.xs->xs_periph); 1407 printf("command with tag id %d reset\n", tag); 1408 esiop_cmd->cmd_c.xs->error = 1409 (esiop_cmd->cmd_c.flags & CMDFL_TIMEOUT) ? 1410 XS_TIMEOUT : XS_RESET; 1411 esiop_cmd->cmd_c.xs->status = SCSI_SIOP_NOCHECK; 1412 if (tag >= 0) 1413 esiop_lun->tactive[tag] = NULL; 1414 else 1415 esiop_lun->active = NULL; 1416 esiop_cmd->cmd_c.status = CMDST_DONE; 1417 esiop_scsicmd_end(esiop_cmd); 1418 } 1419 } 1420 sc->sc_c.targets[target]->status = TARST_ASYNC; 1421 sc->sc_c.targets[target]->flags &= ~(TARF_ISWIDE | TARF_ISDT); 1422 sc->sc_c.targets[target]->period = 1423 sc->sc_c.targets[target]->offset = 0; 1424 siop_update_xfer_mode(&sc->sc_c, target); 1425 } 1426 1427 scsipi_async_event(&sc->sc_c.sc_chan, ASYNC_EVENT_RESET, NULL); 1428 } 1429 1430 void 1431 esiop_scsipi_request(chan, req, arg) 1432 struct scsipi_channel *chan; 1433 scsipi_adapter_req_t req; 1434 void *arg; 1435 { 1436 struct scsipi_xfer *xs; 1437 struct scsipi_periph *periph; 1438 struct esiop_softc *sc = (void *)chan->chan_adapter->adapt_dev; 1439 struct esiop_cmd *esiop_cmd; 1440 struct esiop_target *esiop_target; 1441 int s, error, i; 1442 int target; 1443 int lun; 1444 1445 switch (req) { 1446 case ADAPTER_REQ_RUN_XFER: 1447 xs = arg; 1448 periph = xs->xs_periph; 1449 target = periph->periph_target; 1450 lun = periph->periph_lun; 1451 1452 s = splbio(); 1453 /* 1454 * first check if there are pending complete commands. 1455 * this can free us some resources (in the rings for example). 1456 * we have to lock it to avoid recursion. 1457 */ 1458 if ((sc->sc_flags & SCF_CHAN_ADAPTREQ) == 0) { 1459 sc->sc_flags |= SCF_CHAN_ADAPTREQ; 1460 esiop_checkdone(sc); 1461 sc->sc_flags &= ~SCF_CHAN_ADAPTREQ; 1462 } 1463 #ifdef SIOP_DEBUG_SCHED 1464 printf("starting cmd for %d:%d tag %d(%d)\n", target, lun, 1465 xs->xs_tag_type, xs->xs_tag_id); 1466 #endif 1467 esiop_cmd = TAILQ_FIRST(&sc->free_list); 1468 if (esiop_cmd == NULL) { 1469 xs->error = XS_RESOURCE_SHORTAGE; 1470 scsipi_done(xs); 1471 splx(s); 1472 return; 1473 } 1474 TAILQ_REMOVE(&sc->free_list, esiop_cmd, next); 1475 #ifdef DIAGNOSTIC 1476 if (esiop_cmd->cmd_c.status != CMDST_FREE) 1477 panic("siop_scsicmd: new cmd not free"); 1478 #endif 1479 esiop_target = (struct esiop_target*)sc->sc_c.targets[target]; 1480 if (esiop_target == NULL) { 1481 #ifdef SIOP_DEBUG 1482 printf("%s: alloc siop_target for target %d\n", 1483 sc->sc_c.sc_dev.dv_xname, target); 1484 #endif 1485 sc->sc_c.targets[target] = 1486 malloc(sizeof(struct esiop_target), 1487 M_DEVBUF, M_NOWAIT | M_ZERO); 1488 if (sc->sc_c.targets[target] == NULL) { 1489 printf("%s: can't malloc memory for " 1490 "target %d\n", sc->sc_c.sc_dev.dv_xname, 1491 target); 1492 xs->error = XS_RESOURCE_SHORTAGE; 1493 scsipi_done(xs); 1494 splx(s); 1495 return; 1496 } 1497 esiop_target = 1498 (struct esiop_target*)sc->sc_c.targets[target]; 1499 esiop_target->target_c.status = TARST_PROBING; 1500 esiop_target->target_c.flags = 0; 1501 esiop_target->target_c.id = 1502 sc->sc_c.clock_div << 24; /* scntl3 */ 1503 esiop_target->target_c.id |= target << 16; /* id */ 1504 /* esiop_target->target_c.id |= 0x0 << 8; scxfer is 0 */ 1505 1506 for (i=0; i < 8; i++) 1507 esiop_target->esiop_lun[i] = NULL; 1508 esiop_target_register(sc, target); 1509 } 1510 if (esiop_target->esiop_lun[lun] == NULL) { 1511 esiop_target->esiop_lun[lun] = 1512 malloc(sizeof(struct esiop_lun), M_DEVBUF, 1513 M_NOWAIT|M_ZERO); 1514 if (esiop_target->esiop_lun[lun] == NULL) { 1515 printf("%s: can't alloc esiop_lun for " 1516 "target %d lun %d\n", 1517 sc->sc_c.sc_dev.dv_xname, target, lun); 1518 xs->error = XS_RESOURCE_SHORTAGE; 1519 scsipi_done(xs); 1520 splx(s); 1521 return; 1522 } 1523 } 1524 esiop_cmd->cmd_c.siop_target = sc->sc_c.targets[target]; 1525 esiop_cmd->cmd_c.xs = xs; 1526 esiop_cmd->cmd_c.flags = 0; 1527 esiop_cmd->cmd_c.status = CMDST_READY; 1528 1529 /* load the DMA maps */ 1530 error = bus_dmamap_load(sc->sc_c.sc_dmat, 1531 esiop_cmd->cmd_c.dmamap_cmd, 1532 xs->cmd, xs->cmdlen, NULL, BUS_DMA_NOWAIT); 1533 if (error) { 1534 printf("%s: unable to load cmd DMA map: %d\n", 1535 sc->sc_c.sc_dev.dv_xname, error); 1536 xs->error = XS_DRIVER_STUFFUP; 1537 scsipi_done(xs); 1538 splx(s); 1539 return; 1540 } 1541 if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) { 1542 error = bus_dmamap_load(sc->sc_c.sc_dmat, 1543 esiop_cmd->cmd_c.dmamap_data, xs->data, xs->datalen, 1544 NULL, BUS_DMA_NOWAIT | BUS_DMA_STREAMING | 1545 ((xs->xs_control & XS_CTL_DATA_IN) ? 1546 BUS_DMA_READ : BUS_DMA_WRITE)); 1547 if (error) { 1548 printf("%s: unable to load cmd DMA map: %d", 1549 sc->sc_c.sc_dev.dv_xname, error); 1550 xs->error = XS_DRIVER_STUFFUP; 1551 scsipi_done(xs); 1552 bus_dmamap_unload(sc->sc_c.sc_dmat, 1553 esiop_cmd->cmd_c.dmamap_cmd); 1554 splx(s); 1555 return; 1556 } 1557 bus_dmamap_sync(sc->sc_c.sc_dmat, 1558 esiop_cmd->cmd_c.dmamap_data, 0, 1559 esiop_cmd->cmd_c.dmamap_data->dm_mapsize, 1560 (xs->xs_control & XS_CTL_DATA_IN) ? 1561 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1562 } 1563 bus_dmamap_sync(sc->sc_c.sc_dmat, esiop_cmd->cmd_c.dmamap_cmd, 1564 0, esiop_cmd->cmd_c.dmamap_cmd->dm_mapsize, 1565 BUS_DMASYNC_PREWRITE); 1566 1567 if (xs->xs_tag_type) 1568 esiop_cmd->cmd_c.tag = xs->xs_tag_id; 1569 else 1570 esiop_cmd->cmd_c.tag = -1; 1571 siop_setuptables(&esiop_cmd->cmd_c); 1572 ((struct esiop_xfer *)esiop_cmd->cmd_tables)->tlq = 1573 htole32(A_f_c_target | A_f_c_lun); 1574 ((struct esiop_xfer *)esiop_cmd->cmd_tables)->tlq |= 1575 htole32((target << 8) | (lun << 16)); 1576 if (esiop_cmd->cmd_c.flags & CMDFL_TAG) { 1577 ((struct esiop_xfer *)esiop_cmd->cmd_tables)->tlq |= 1578 htole32(A_f_c_tag); 1579 ((struct esiop_xfer *)esiop_cmd->cmd_tables)->tlq |= 1580 htole32(esiop_cmd->cmd_c.tag << 24); 1581 } 1582 1583 esiop_table_sync(esiop_cmd, 1584 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1585 esiop_start(sc, esiop_cmd); 1586 if (xs->xs_control & XS_CTL_POLL) { 1587 /* poll for command completion */ 1588 while ((xs->xs_status & XS_STS_DONE) == 0) { 1589 delay(1000); 1590 esiop_intr(sc); 1591 } 1592 } 1593 splx(s); 1594 return; 1595 1596 case ADAPTER_REQ_GROW_RESOURCES: 1597 #ifdef SIOP_DEBUG 1598 printf("%s grow resources (%d)\n", sc->sc_c.sc_dev.dv_xname, 1599 sc->sc_c.sc_adapt.adapt_openings); 1600 #endif 1601 esiop_morecbd(sc); 1602 return; 1603 1604 case ADAPTER_REQ_SET_XFER_MODE: 1605 { 1606 struct scsipi_xfer_mode *xm = arg; 1607 if (sc->sc_c.targets[xm->xm_target] == NULL) 1608 return; 1609 s = splbio(); 1610 if ((xm->xm_mode & PERIPH_CAP_TQING) && 1611 (sc->sc_c.targets[xm->xm_target]->flags & TARF_TAG) == 0) { 1612 sc->sc_c.targets[xm->xm_target]->flags |= TARF_TAG; 1613 /* allocate tag tables for this device */ 1614 for (lun = 0; 1615 lun < sc->sc_c.sc_chan.chan_nluns; lun++) { 1616 if (sc->sc_c.sc_chan.chan_periphs[ 1617 xm->xm_target][lun]) 1618 esiop_add_dev(sc, xm->xm_target, lun); 1619 } 1620 } 1621 if ((xm->xm_mode & PERIPH_CAP_WIDE16) && 1622 (sc->sc_c.features & SF_BUS_WIDE)) 1623 sc->sc_c.targets[xm->xm_target]->flags |= TARF_WIDE; 1624 if (xm->xm_mode & PERIPH_CAP_SYNC) 1625 sc->sc_c.targets[xm->xm_target]->flags |= TARF_SYNC; 1626 if ((xm->xm_mode & PERIPH_CAP_DT) && 1627 (sc->sc_c.features & SF_CHIP_DT)) 1628 sc->sc_c.targets[xm->xm_target]->flags |= TARF_DT; 1629 if ((xm->xm_mode & 1630 (PERIPH_CAP_SYNC | PERIPH_CAP_WIDE16 | PERIPH_CAP_DT)) || 1631 sc->sc_c.targets[xm->xm_target]->status == TARST_PROBING) 1632 sc->sc_c.targets[xm->xm_target]->status = TARST_ASYNC; 1633 1634 splx(s); 1635 } 1636 } 1637 } 1638 1639 static void 1640 esiop_start(sc, esiop_cmd) 1641 struct esiop_softc *sc; 1642 struct esiop_cmd *esiop_cmd; 1643 { 1644 struct esiop_lun *esiop_lun; 1645 struct esiop_target *esiop_target; 1646 int timeout; 1647 int target, lun, slot; 1648 1649 /* 1650 * first make sure to read valid data 1651 */ 1652 esiop_script_sync(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1653 1654 /* 1655 * We use a circular queue here. sc->sc_currschedslot points to a 1656 * free slot, unless we have filled the queue. Check this. 1657 */ 1658 slot = sc->sc_currschedslot; 1659 if ((esiop_script_read(sc, sc->sc_shedoffset + slot * CMD_SLOTSIZE) & 1660 A_f_cmd_free) == 0) { 1661 /* 1662 * no more free slot, no need to continue. freeze the queue 1663 * and requeue this command. 1664 */ 1665 scsipi_channel_freeze(&sc->sc_c.sc_chan, 1); 1666 sc->sc_flags |= SCF_CHAN_NOSLOT; 1667 esiop_script_sync(sc, 1668 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1669 esiop_script_write(sc, sc->sc_semoffset, 1670 esiop_script_read(sc, sc->sc_semoffset) & ~A_sem_start); 1671 esiop_script_sync(sc, 1672 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1673 esiop_cmd->cmd_c.xs->error = XS_REQUEUE; 1674 esiop_cmd->cmd_c.xs->status = SCSI_SIOP_NOCHECK; 1675 esiop_scsicmd_end(esiop_cmd); 1676 return; 1677 } 1678 /* OK, we can use this slot */ 1679 1680 target = esiop_cmd->cmd_c.xs->xs_periph->periph_target; 1681 lun = esiop_cmd->cmd_c.xs->xs_periph->periph_lun; 1682 esiop_target = (struct esiop_target*)sc->sc_c.targets[target]; 1683 esiop_lun = esiop_target->esiop_lun[lun]; 1684 /* if non-tagged command active, panic: this shouldn't happen */ 1685 if (esiop_lun->active != NULL) { 1686 panic("esiop_start: tagged cmd while untagged running"); 1687 } 1688 #ifdef DIAGNOSTIC 1689 /* sanity check the tag if needed */ 1690 if (esiop_cmd->cmd_c.flags & CMDFL_TAG) { 1691 if (esiop_lun->tactive[esiop_cmd->cmd_c.tag] != NULL) 1692 panic("esiop_start: tag not free"); 1693 if (esiop_cmd->cmd_c.tag >= ESIOP_NTAG || 1694 esiop_cmd->cmd_c.tag < 0) { 1695 scsipi_printaddr(esiop_cmd->cmd_c.xs->xs_periph); 1696 printf(": tag id %d\n", esiop_cmd->cmd_c.tag); 1697 panic("esiop_start: invalid tag id"); 1698 } 1699 } 1700 #endif 1701 #ifdef SIOP_DEBUG_SCHED 1702 printf("using slot %d for DSA 0x%lx\n", slot, 1703 (u_long)esiop_cmd->cmd_c.dsa); 1704 #endif 1705 /* mark command as active */ 1706 if (esiop_cmd->cmd_c.status == CMDST_READY) 1707 esiop_cmd->cmd_c.status = CMDST_ACTIVE; 1708 else 1709 panic("esiop_start: bad status"); 1710 /* DSA table for reselect */ 1711 if (esiop_cmd->cmd_c.flags & CMDFL_TAG) { 1712 esiop_lun->tactive[esiop_cmd->cmd_c.tag] = esiop_cmd; 1713 /* DSA table for reselect */ 1714 esiop_lun->lun_tagtbl->tbl[esiop_cmd->cmd_c.tag] = 1715 htole32(esiop_cmd->cmd_c.dsa); 1716 bus_dmamap_sync(sc->sc_c.sc_dmat, 1717 esiop_lun->lun_tagtbl->tblblk->blkmap, 1718 esiop_lun->lun_tagtbl->tbl_offset, 1719 sizeof(u_int32_t) * ESIOP_NTAG, BUS_DMASYNC_PREWRITE); 1720 } else { 1721 esiop_lun->active = esiop_cmd; 1722 esiop_script_write(sc, 1723 esiop_target->lun_table_offset + 1724 lun * 2 + A_target_luntbl / sizeof(u_int32_t), 1725 esiop_cmd->cmd_c.dsa); 1726 } 1727 /* scheduler slot: DSA */ 1728 esiop_script_write(sc, sc->sc_shedoffset + slot * CMD_SLOTSIZE, 1729 esiop_cmd->cmd_c.dsa); 1730 /* make sure SCRIPT processor will read valid data */ 1731 esiop_script_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1732 /* handle timeout */ 1733 if ((esiop_cmd->cmd_c.xs->xs_control & XS_CTL_POLL) == 0) { 1734 /* start exire timer */ 1735 timeout = mstohz(esiop_cmd->cmd_c.xs->timeout); 1736 if (timeout == 0) 1737 timeout = 1; 1738 callout_reset( &esiop_cmd->cmd_c.xs->xs_callout, 1739 timeout, esiop_timeout, esiop_cmd); 1740 } 1741 /* Signal script it has some work to do */ 1742 bus_space_write_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 1743 SIOP_ISTAT, ISTAT_SIGP); 1744 /* update the current slot, and wait for IRQ */ 1745 sc->sc_currschedslot++; 1746 if (sc->sc_currschedslot >= A_ncmd_slots) 1747 sc->sc_currschedslot = 0; 1748 return; 1749 } 1750 1751 void 1752 esiop_timeout(v) 1753 void *v; 1754 { 1755 struct esiop_cmd *esiop_cmd = v; 1756 struct esiop_softc *sc = 1757 (struct esiop_softc *)esiop_cmd->cmd_c.siop_sc; 1758 int s; 1759 #ifdef SIOP_DEBUG 1760 int slot, slotdsa; 1761 #endif 1762 1763 s = splbio(); 1764 esiop_table_sync(esiop_cmd, 1765 BUS_DMASYNC_POSTREAD | 1766 BUS_DMASYNC_POSTWRITE); 1767 scsipi_printaddr(esiop_cmd->cmd_c.xs->xs_periph); 1768 #ifdef SIOP_DEBUG 1769 printf("command timeout (status %d)\n", le32toh(esiop_cmd->cmd_tables->status)); 1770 1771 esiop_script_sync(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1772 for (slot = 0; slot < A_ncmd_slots; slot++) { 1773 slotdsa = esiop_script_read(sc, 1774 sc->sc_shedoffset + slot * CMD_SLOTSIZE); 1775 if ((slotdsa & 0x01) == 0) 1776 printf("slot %d not free (0x%x)\n", slot, slotdsa); 1777 } 1778 printf("istat 0x%x ", bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_ISTAT)); 1779 printf("DSP 0x%lx DSA 0x%x\n", 1780 (u_long)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSP) - sc->sc_c.sc_scriptaddr), 1781 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA)); 1782 bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_CTEST2); 1783 printf("istat 0x%x\n", bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_ISTAT)); 1784 #else 1785 printf("command timeout\n"); 1786 #endif 1787 /* reset the scsi bus */ 1788 siop_resetbus(&sc->sc_c); 1789 1790 /* deactivate callout */ 1791 callout_stop(&esiop_cmd->cmd_c.xs->xs_callout); 1792 /* 1793 * mark command has being timed out and just return; 1794 * the bus reset will generate an interrupt, 1795 * it will be handled in siop_intr() 1796 */ 1797 esiop_cmd->cmd_c.flags |= CMDFL_TIMEOUT; 1798 splx(s); 1799 return; 1800 1801 } 1802 1803 void 1804 esiop_dump_script(sc) 1805 struct esiop_softc *sc; 1806 { 1807 int i; 1808 for (i = 0; i < PAGE_SIZE / 4; i += 2) { 1809 printf("0x%04x: 0x%08x 0x%08x", i * 4, 1810 le32toh(sc->sc_c.sc_script[i]), 1811 le32toh(sc->sc_c.sc_script[i+1])); 1812 if ((le32toh(sc->sc_c.sc_script[i]) & 0xe0000000) == 1813 0xc0000000) { 1814 i++; 1815 printf(" 0x%08x", le32toh(sc->sc_c.sc_script[i+1])); 1816 } 1817 printf("\n"); 1818 } 1819 } 1820 1821 void 1822 esiop_morecbd(sc) 1823 struct esiop_softc *sc; 1824 { 1825 int error, i, s; 1826 bus_dma_segment_t seg; 1827 int rseg; 1828 struct esiop_cbd *newcbd; 1829 struct esiop_xfer *xfer; 1830 bus_addr_t dsa; 1831 1832 /* allocate a new list head */ 1833 newcbd = malloc(sizeof(struct esiop_cbd), M_DEVBUF, M_NOWAIT|M_ZERO); 1834 if (newcbd == NULL) { 1835 printf("%s: can't allocate memory for command descriptors " 1836 "head\n", sc->sc_c.sc_dev.dv_xname); 1837 return; 1838 } 1839 1840 /* allocate cmd list */ 1841 newcbd->cmds = malloc(sizeof(struct esiop_cmd) * SIOP_NCMDPB, 1842 M_DEVBUF, M_NOWAIT|M_ZERO); 1843 if (newcbd->cmds == NULL) { 1844 printf("%s: can't allocate memory for command descriptors\n", 1845 sc->sc_c.sc_dev.dv_xname); 1846 goto bad3; 1847 } 1848 error = bus_dmamem_alloc(sc->sc_c.sc_dmat, PAGE_SIZE, PAGE_SIZE, 0, 1849 &seg, 1, &rseg, BUS_DMA_NOWAIT); 1850 if (error) { 1851 printf("%s: unable to allocate cbd DMA memory, error = %d\n", 1852 sc->sc_c.sc_dev.dv_xname, error); 1853 goto bad2; 1854 } 1855 error = bus_dmamem_map(sc->sc_c.sc_dmat, &seg, rseg, PAGE_SIZE, 1856 (caddr_t *)&newcbd->xfers, BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 1857 if (error) { 1858 printf("%s: unable to map cbd DMA memory, error = %d\n", 1859 sc->sc_c.sc_dev.dv_xname, error); 1860 goto bad2; 1861 } 1862 error = bus_dmamap_create(sc->sc_c.sc_dmat, PAGE_SIZE, 1, PAGE_SIZE, 0, 1863 BUS_DMA_NOWAIT, &newcbd->xferdma); 1864 if (error) { 1865 printf("%s: unable to create cbd DMA map, error = %d\n", 1866 sc->sc_c.sc_dev.dv_xname, error); 1867 goto bad1; 1868 } 1869 error = bus_dmamap_load(sc->sc_c.sc_dmat, newcbd->xferdma, 1870 newcbd->xfers, PAGE_SIZE, NULL, BUS_DMA_NOWAIT); 1871 if (error) { 1872 printf("%s: unable to load cbd DMA map, error = %d\n", 1873 sc->sc_c.sc_dev.dv_xname, error); 1874 goto bad0; 1875 } 1876 #ifdef DEBUG 1877 printf("%s: alloc newcdb at PHY addr 0x%lx\n", sc->sc_c.sc_dev.dv_xname, 1878 (unsigned long)newcbd->xferdma->dm_segs[0].ds_addr); 1879 #endif 1880 for (i = 0; i < SIOP_NCMDPB; i++) { 1881 error = bus_dmamap_create(sc->sc_c.sc_dmat, MAXPHYS, SIOP_NSG, 1882 MAXPHYS, 0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 1883 &newcbd->cmds[i].cmd_c.dmamap_data); 1884 if (error) { 1885 printf("%s: unable to create data DMA map for cbd: " 1886 "error %d\n", 1887 sc->sc_c.sc_dev.dv_xname, error); 1888 goto bad0; 1889 } 1890 error = bus_dmamap_create(sc->sc_c.sc_dmat, 1891 sizeof(struct scsipi_generic), 1, 1892 sizeof(struct scsipi_generic), 0, 1893 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 1894 &newcbd->cmds[i].cmd_c.dmamap_cmd); 1895 if (error) { 1896 printf("%s: unable to create cmd DMA map for cbd %d\n", 1897 sc->sc_c.sc_dev.dv_xname, error); 1898 goto bad0; 1899 } 1900 newcbd->cmds[i].cmd_c.siop_sc = &sc->sc_c; 1901 newcbd->cmds[i].esiop_cbdp = newcbd; 1902 xfer = &newcbd->xfers[i]; 1903 newcbd->cmds[i].cmd_tables = (struct siop_common_xfer *)xfer; 1904 memset(newcbd->cmds[i].cmd_tables, 0, 1905 sizeof(struct esiop_xfer)); 1906 dsa = newcbd->xferdma->dm_segs[0].ds_addr + 1907 i * sizeof(struct esiop_xfer); 1908 newcbd->cmds[i].cmd_c.dsa = dsa; 1909 newcbd->cmds[i].cmd_c.status = CMDST_FREE; 1910 xfer->siop_tables.t_msgout.count= htole32(1); 1911 xfer->siop_tables.t_msgout.addr = htole32(dsa); 1912 xfer->siop_tables.t_msgin.count= htole32(1); 1913 xfer->siop_tables.t_msgin.addr = htole32(dsa + 1914 offsetof(struct siop_common_xfer, msg_in)); 1915 xfer->siop_tables.t_extmsgin.count= htole32(2); 1916 xfer->siop_tables.t_extmsgin.addr = htole32(dsa + 1917 offsetof(struct siop_common_xfer, msg_in) + 1); 1918 xfer->siop_tables.t_extmsgdata.addr = htole32(dsa + 1919 offsetof(struct siop_common_xfer, msg_in) + 3); 1920 xfer->siop_tables.t_status.count= htole32(1); 1921 xfer->siop_tables.t_status.addr = htole32(dsa + 1922 offsetof(struct siop_common_xfer, status)); 1923 1924 s = splbio(); 1925 TAILQ_INSERT_TAIL(&sc->free_list, &newcbd->cmds[i], next); 1926 splx(s); 1927 #ifdef SIOP_DEBUG 1928 printf("tables[%d]: in=0x%x out=0x%x status=0x%x\n", i, 1929 le32toh(newcbd->cmds[i].cmd_tables->t_msgin.addr), 1930 le32toh(newcbd->cmds[i].cmd_tables->t_msgout.addr), 1931 le32toh(newcbd->cmds[i].cmd_tables->t_status.addr)); 1932 #endif 1933 } 1934 s = splbio(); 1935 TAILQ_INSERT_TAIL(&sc->cmds, newcbd, next); 1936 sc->sc_c.sc_adapt.adapt_openings += SIOP_NCMDPB; 1937 splx(s); 1938 return; 1939 bad0: 1940 bus_dmamap_unload(sc->sc_c.sc_dmat, newcbd->xferdma); 1941 bus_dmamap_destroy(sc->sc_c.sc_dmat, newcbd->xferdma); 1942 bad1: 1943 bus_dmamem_free(sc->sc_c.sc_dmat, &seg, rseg); 1944 bad2: 1945 free(newcbd->cmds, M_DEVBUF); 1946 bad3: 1947 free(newcbd, M_DEVBUF); 1948 return; 1949 } 1950 1951 void 1952 esiop_moretagtbl(sc) 1953 struct esiop_softc *sc; 1954 { 1955 int error, i, j, s; 1956 bus_dma_segment_t seg; 1957 int rseg; 1958 struct esiop_dsatblblk *newtblblk; 1959 struct esiop_dsatbl *newtbls; 1960 u_int32_t *tbls; 1961 1962 /* allocate a new list head */ 1963 newtblblk = malloc(sizeof(struct esiop_dsatblblk), 1964 M_DEVBUF, M_NOWAIT|M_ZERO); 1965 if (newtblblk == NULL) { 1966 printf("%s: can't allocate memory for tag DSA table block\n", 1967 sc->sc_c.sc_dev.dv_xname); 1968 return; 1969 } 1970 1971 /* allocate tbl list */ 1972 newtbls = malloc(sizeof(struct esiop_dsatbl) * ESIOP_NTPB, 1973 M_DEVBUF, M_NOWAIT|M_ZERO); 1974 if (newtbls == NULL) { 1975 printf("%s: can't allocate memory for command descriptors\n", 1976 sc->sc_c.sc_dev.dv_xname); 1977 goto bad3; 1978 } 1979 error = bus_dmamem_alloc(sc->sc_c.sc_dmat, PAGE_SIZE, PAGE_SIZE, 0, 1980 &seg, 1, &rseg, BUS_DMA_NOWAIT); 1981 if (error) { 1982 printf("%s: unable to allocate tbl DMA memory, error = %d\n", 1983 sc->sc_c.sc_dev.dv_xname, error); 1984 goto bad2; 1985 } 1986 error = bus_dmamem_map(sc->sc_c.sc_dmat, &seg, rseg, PAGE_SIZE, 1987 (caddr_t *)&tbls, BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 1988 if (error) { 1989 printf("%s: unable to map tbls DMA memory, error = %d\n", 1990 sc->sc_c.sc_dev.dv_xname, error); 1991 goto bad2; 1992 } 1993 error = bus_dmamap_create(sc->sc_c.sc_dmat, PAGE_SIZE, 1, PAGE_SIZE, 0, 1994 BUS_DMA_NOWAIT, &newtblblk->blkmap); 1995 if (error) { 1996 printf("%s: unable to create tbl DMA map, error = %d\n", 1997 sc->sc_c.sc_dev.dv_xname, error); 1998 goto bad1; 1999 } 2000 error = bus_dmamap_load(sc->sc_c.sc_dmat, newtblblk->blkmap, 2001 tbls, PAGE_SIZE, NULL, BUS_DMA_NOWAIT); 2002 if (error) { 2003 printf("%s: unable to load tbl DMA map, error = %d\n", 2004 sc->sc_c.sc_dev.dv_xname, error); 2005 goto bad0; 2006 } 2007 #ifdef DEBUG 2008 printf("%s: alloc new tag DSA table at PHY addr 0x%lx\n", 2009 sc->sc_c.sc_dev.dv_xname, 2010 (unsigned long)newtblblk->blkmap->dm_segs[0].ds_addr); 2011 #endif 2012 for (i = 0; i < ESIOP_NTPB; i++) { 2013 newtbls[i].tblblk = newtblblk; 2014 newtbls[i].tbl = &tbls[i * ESIOP_NTAG]; 2015 newtbls[i].tbl_offset = i * ESIOP_NTAG * sizeof(u_int32_t); 2016 newtbls[i].tbl_dsa = newtblblk->blkmap->dm_segs[0].ds_addr + 2017 newtbls[i].tbl_offset; 2018 for (j = 0; j < ESIOP_NTAG; j++) 2019 newtbls[i].tbl[j] = j; 2020 s = splbio(); 2021 TAILQ_INSERT_TAIL(&sc->free_tagtbl, &newtbls[i], next); 2022 splx(s); 2023 } 2024 s = splbio(); 2025 TAILQ_INSERT_TAIL(&sc->tag_tblblk, newtblblk, next); 2026 splx(s); 2027 return; 2028 bad0: 2029 bus_dmamap_unload(sc->sc_c.sc_dmat, newtblblk->blkmap); 2030 bus_dmamap_destroy(sc->sc_c.sc_dmat, newtblblk->blkmap); 2031 bad1: 2032 bus_dmamem_free(sc->sc_c.sc_dmat, &seg, rseg); 2033 bad2: 2034 free(newtbls, M_DEVBUF); 2035 bad3: 2036 free(newtblblk, M_DEVBUF); 2037 return; 2038 } 2039 2040 void 2041 esiop_update_scntl3(sc, _siop_target) 2042 struct esiop_softc *sc; 2043 struct siop_common_target *_siop_target; 2044 { 2045 struct esiop_target *esiop_target = (struct esiop_target *)_siop_target; 2046 esiop_script_write(sc, esiop_target->lun_table_offset, 2047 esiop_target->target_c.id); 2048 esiop_script_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 2049 } 2050 2051 void 2052 esiop_add_dev(sc, target, lun) 2053 struct esiop_softc *sc; 2054 int target; 2055 int lun; 2056 { 2057 struct esiop_target *esiop_target = 2058 (struct esiop_target *)sc->sc_c.targets[target]; 2059 struct esiop_lun *esiop_lun = esiop_target->esiop_lun[lun]; 2060 2061 /* we need a tag DSA table */ 2062 esiop_lun->lun_tagtbl= TAILQ_FIRST(&sc->free_tagtbl); 2063 if (esiop_lun->lun_tagtbl == NULL) { 2064 esiop_moretagtbl(sc); 2065 esiop_lun->lun_tagtbl= TAILQ_FIRST(&sc->free_tagtbl); 2066 if (esiop_lun->lun_tagtbl == NULL) { 2067 /* no resources, run untagged */ 2068 esiop_target->target_c.flags &= ~TARF_TAG; 2069 return; 2070 } 2071 } 2072 TAILQ_REMOVE(&sc->free_tagtbl, esiop_lun->lun_tagtbl, next); 2073 /* Update LUN DSA table */ 2074 esiop_script_write(sc, esiop_target->lun_table_offset + 2075 lun * 2 + A_target_luntbl_tag / sizeof(u_int32_t), 2076 esiop_lun->lun_tagtbl->tbl_dsa); 2077 esiop_script_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 2078 } 2079 2080 void 2081 esiop_del_dev(sc, target, lun) 2082 struct esiop_softc *sc; 2083 int target; 2084 int lun; 2085 { 2086 struct esiop_target *esiop_target; 2087 #ifdef SIOP_DEBUG 2088 printf("%s:%d:%d: free lun sw entry\n", 2089 sc->sc_c.sc_dev.dv_xname, target, lun); 2090 #endif 2091 if (sc->sc_c.targets[target] == NULL) 2092 return; 2093 esiop_target = (struct esiop_target *)sc->sc_c.targets[target]; 2094 free(esiop_target->esiop_lun[lun], M_DEVBUF); 2095 esiop_target->esiop_lun[lun] = NULL; 2096 } 2097 2098 void 2099 esiop_target_register(sc, target) 2100 struct esiop_softc *sc; 2101 u_int32_t target; 2102 { 2103 struct esiop_target *esiop_target = 2104 (struct esiop_target *)sc->sc_c.targets[target]; 2105 struct esiop_lun *esiop_lun; 2106 int lun; 2107 2108 /* get a DSA table for this target */ 2109 esiop_target->lun_table_offset = sc->sc_free_offset; 2110 sc->sc_free_offset += sc->sc_c.sc_chan.chan_nluns * 2 + 2; 2111 #ifdef SIOP_DEBUG 2112 printf("%s: lun table for target %d offset %d free offset %d\n", 2113 sc->sc_c.sc_dev.dv_xname, target, esiop_target->lun_table_offset, 2114 sc->sc_free_offset); 2115 #endif 2116 /* first 32 bytes are ID (for select) */ 2117 esiop_script_write(sc, esiop_target->lun_table_offset, 2118 esiop_target->target_c.id); 2119 /* Record this table in the target DSA table */ 2120 esiop_script_write(sc, 2121 sc->sc_target_table_offset + target, 2122 (esiop_target->lun_table_offset * sizeof(u_int32_t)) + 2123 sc->sc_c.sc_scriptaddr); 2124 /* if we have a tag table, register it */ 2125 for (lun = 0; lun < sc->sc_c.sc_chan.chan_nluns; lun++) { 2126 esiop_lun = esiop_target->esiop_lun[lun]; 2127 if (esiop_lun == NULL) 2128 continue; 2129 if (esiop_lun->lun_tagtbl) 2130 esiop_script_write(sc, esiop_target->lun_table_offset + 2131 lun * 2 + A_target_luntbl_tag / sizeof(u_int32_t), 2132 esiop_lun->lun_tagtbl->tbl_dsa); 2133 } 2134 esiop_script_sync(sc, 2135 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 2136 } 2137 2138 #ifdef SIOP_STATS 2139 void 2140 esiop_printstats() 2141 { 2142 printf("esiop_stat_intr %d\n", esiop_stat_intr); 2143 printf("esiop_stat_intr_shortxfer %d\n", esiop_stat_intr_shortxfer); 2144 printf("esiop_stat_intr_xferdisc %d\n", esiop_stat_intr_xferdisc); 2145 printf("esiop_stat_intr_sdp %d\n", esiop_stat_intr_sdp); 2146 printf("esiop_stat_intr_done %d\n", esiop_stat_intr_done); 2147 printf("esiop_stat_intr_lunresel %d\n", esiop_stat_intr_lunresel); 2148 printf("esiop_stat_intr_qfull %d\n", esiop_stat_intr_qfull); 2149 } 2150 #endif 2151
Indexes created Tue Sep 30 20:09:53 GMT 2025