esiop.c revision 1.29
1 /* $NetBSD: esiop.c,v 1.29 2004/05/17 18:37:02 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 */ 32 33 /* SYM53c7/8xx PCI-SCSI I/O Processors driver */ 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: esiop.c,v 1.29 2004/05/17 18:37:02 bouyer Exp $"); 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/device.h> 41 #include <sys/malloc.h> 42 #include <sys/buf.h> 43 #include <sys/kernel.h> 44 45 #include <uvm/uvm_extern.h> 46 47 #include <machine/endian.h> 48 #include <machine/bus.h> 49 50 #include <dev/microcode/siop/esiop.out> 51 52 #include <dev/scsipi/scsi_all.h> 53 #include <dev/scsipi/scsi_message.h> 54 #include <dev/scsipi/scsipi_all.h> 55 56 #include <dev/scsipi/scsiconf.h> 57 58 #include <dev/ic/siopreg.h> 59 #include <dev/ic/siopvar_common.h> 60 #include <dev/ic/esiopvar.h> 61 62 #include "opt_siop.h" 63 64 #ifndef DEBUG 65 #undef DEBUG 66 #endif 67 #undef SIOP_DEBUG 68 #undef SIOP_DEBUG_DR 69 #undef SIOP_DEBUG_INTR 70 #undef SIOP_DEBUG_SCHED 71 #undef DUMP_SCRIPT 72 73 #define SIOP_STATS 74 75 #ifndef SIOP_DEFAULT_TARGET 76 #define SIOP_DEFAULT_TARGET 7 77 #endif 78 79 /* number of cmd descriptors per block */ 80 #define SIOP_NCMDPB (PAGE_SIZE / sizeof(struct esiop_xfer)) 81 82 void esiop_reset __P((struct esiop_softc *)); 83 void esiop_checkdone __P((struct esiop_softc *)); 84 void esiop_handle_reset __P((struct esiop_softc *)); 85 void esiop_scsicmd_end __P((struct esiop_cmd *, int)); 86 void esiop_unqueue __P((struct esiop_softc *, int, int)); 87 int esiop_handle_qtag_reject __P((struct esiop_cmd *)); 88 static void esiop_start __P((struct esiop_softc *, struct esiop_cmd *)); 89 void esiop_timeout __P((void *)); 90 void esiop_scsipi_request __P((struct scsipi_channel *, 91 scsipi_adapter_req_t, void *)); 92 void esiop_dump_script __P((struct esiop_softc *)); 93 void esiop_morecbd __P((struct esiop_softc *)); 94 void esiop_moretagtbl __P((struct esiop_softc *)); 95 void siop_add_reselsw __P((struct esiop_softc *, int)); 96 void esiop_target_register __P((struct esiop_softc *, u_int32_t)); 97 98 void esiop_update_scntl3 __P((struct esiop_softc *, 99 struct siop_common_target *)); 100 101 #ifdef SIOP_STATS 102 static int esiop_stat_intr = 0; 103 static int esiop_stat_intr_shortxfer = 0; 104 static int esiop_stat_intr_sdp = 0; 105 static int esiop_stat_intr_done = 0; 106 static int esiop_stat_intr_xferdisc = 0; 107 static int esiop_stat_intr_lunresel = 0; 108 static int esiop_stat_intr_qfull = 0; 109 void esiop_printstats __P((void)); 110 #define INCSTAT(x) x++ 111 #else 112 #define INCSTAT(x) 113 #endif 114 115 static __inline__ void esiop_script_sync __P((struct esiop_softc *, int)); 116 static __inline__ void 117 esiop_script_sync(sc, ops) 118 struct esiop_softc *sc; 119 int ops; 120 { 121 if ((sc->sc_c.features & SF_CHIP_RAM) == 0) 122 bus_dmamap_sync(sc->sc_c.sc_dmat, sc->sc_c.sc_scriptdma, 0, 123 PAGE_SIZE, ops); 124 } 125 126 static __inline__ u_int32_t esiop_script_read __P((struct esiop_softc *, u_int)); 127 static __inline__ u_int32_t 128 esiop_script_read(sc, offset) 129 struct esiop_softc *sc; 130 u_int offset; 131 { 132 if (sc->sc_c.features & SF_CHIP_RAM) { 133 return bus_space_read_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh, 134 offset * 4); 135 } else { 136 return le32toh(sc->sc_c.sc_script[offset]); 137 } 138 } 139 140 static __inline__ void esiop_script_write __P((struct esiop_softc *, u_int, 141 u_int32_t)); 142 static __inline__ void 143 esiop_script_write(sc, offset, val) 144 struct esiop_softc *sc; 145 u_int offset; 146 u_int32_t val; 147 { 148 if (sc->sc_c.features & SF_CHIP_RAM) { 149 bus_space_write_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh, 150 offset * 4, val); 151 } else { 152 sc->sc_c.sc_script[offset] = htole32(val); 153 } 154 } 155 156 void 157 esiop_attach(sc) 158 struct esiop_softc *sc; 159 { 160 struct esiop_dsatbl *tagtbl_donering; 161 162 if (siop_common_attach(&sc->sc_c) != 0 ) 163 return; 164 165 TAILQ_INIT(&sc->free_list); 166 TAILQ_INIT(&sc->cmds); 167 TAILQ_INIT(&sc->free_tagtbl); 168 TAILQ_INIT(&sc->tag_tblblk); 169 sc->sc_currschedslot = 0; 170 #ifdef SIOP_DEBUG 171 aprint_debug("%s: script size = %d, PHY addr=0x%x, VIRT=%p\n", 172 sc->sc_c.sc_dev.dv_xname, (int)sizeof(esiop_script), 173 (u_int32_t)sc->sc_c.sc_scriptaddr, sc->sc_c.sc_script); 174 #endif 175 176 sc->sc_c.sc_adapt.adapt_max_periph = ESIOP_NTAG; 177 sc->sc_c.sc_adapt.adapt_request = esiop_scsipi_request; 178 179 /* 180 * get space for the CMD done slot. For this we use a tag table entry. 181 * It's the same size and allows us to not waste 3/4 of a page 182 */ 183 #ifdef DIAGNOSTIC 184 if (ESIOP_NTAG != A_ndone_slots) { 185 aprint_error("%s: size of tag DSA table different from the done" 186 " ring\n", sc->sc_c.sc_dev.dv_xname); 187 return; 188 } 189 #endif 190 esiop_moretagtbl(sc); 191 tagtbl_donering = TAILQ_FIRST(&sc->free_tagtbl); 192 if (tagtbl_donering == NULL) { 193 aprint_error("%s: no memory for command done ring\n", 194 sc->sc_c.sc_dev.dv_xname); 195 return; 196 } 197 TAILQ_REMOVE(&sc->free_tagtbl, tagtbl_donering, next); 198 sc->sc_done_map = tagtbl_donering->tblblk->blkmap; 199 sc->sc_done_offset = tagtbl_donering->tbl_offset; 200 sc->sc_done_slot = &tagtbl_donering->tbl[0]; 201 202 /* Do a bus reset, so that devices fall back to narrow/async */ 203 siop_resetbus(&sc->sc_c); 204 /* 205 * siop_reset() will reset the chip, thus clearing pending interrupts 206 */ 207 esiop_reset(sc); 208 #ifdef DUMP_SCRIPT 209 esiop_dump_script(sc); 210 #endif 211 212 config_found((struct device*)sc, &sc->sc_c.sc_chan, scsiprint); 213 } 214 215 void 216 esiop_reset(sc) 217 struct esiop_softc *sc; 218 { 219 int i, j; 220 u_int32_t addr; 221 u_int32_t msgin_addr, sem_addr; 222 223 siop_common_reset(&sc->sc_c); 224 225 /* 226 * we copy the script at the beggining of RAM. Then there is 4 bytes 227 * for messages in, and 4 bytes for semaphore 228 */ 229 sc->sc_free_offset = sizeof(esiop_script) / sizeof(esiop_script[0]); 230 msgin_addr = 231 sc->sc_free_offset * sizeof(u_int32_t) + sc->sc_c.sc_scriptaddr; 232 sc->sc_free_offset += 1; 233 sc->sc_semoffset = sc->sc_free_offset; 234 sem_addr = 235 sc->sc_semoffset * sizeof(u_int32_t) + sc->sc_c.sc_scriptaddr; 236 sc->sc_free_offset += 1; 237 /* then we have the scheduler ring */ 238 sc->sc_shedoffset = sc->sc_free_offset; 239 sc->sc_free_offset += A_ncmd_slots * CMD_SLOTSIZE; 240 /* then the targets DSA table */ 241 sc->sc_target_table_offset = sc->sc_free_offset; 242 sc->sc_free_offset += sc->sc_c.sc_chan.chan_ntargets; 243 /* copy and patch the script */ 244 if (sc->sc_c.features & SF_CHIP_RAM) { 245 bus_space_write_region_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh, 0, 246 esiop_script, 247 sizeof(esiop_script) / sizeof(esiop_script[0])); 248 for (j = 0; j < 249 (sizeof(E_tlq_offset_Used) / sizeof(E_tlq_offset_Used[0])); 250 j++) { 251 bus_space_write_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh, 252 E_tlq_offset_Used[j] * 4, 253 sizeof(struct siop_common_xfer)); 254 } 255 for (j = 0; j < 256 (sizeof(E_abs_msgin2_Used) / sizeof(E_abs_msgin2_Used[0])); 257 j++) { 258 bus_space_write_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh, 259 E_abs_msgin2_Used[j] * 4, msgin_addr); 260 } 261 for (j = 0; j < 262 (sizeof(E_abs_sem_Used) / sizeof(E_abs_sem_Used[0])); 263 j++) { 264 bus_space_write_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh, 265 E_abs_sem_Used[j] * 4, sem_addr); 266 } 267 268 if (sc->sc_c.features & SF_CHIP_LED0) { 269 bus_space_write_region_4(sc->sc_c.sc_ramt, 270 sc->sc_c.sc_ramh, 271 Ent_led_on1, esiop_led_on, 272 sizeof(esiop_led_on) / sizeof(esiop_led_on[0])); 273 bus_space_write_region_4(sc->sc_c.sc_ramt, 274 sc->sc_c.sc_ramh, 275 Ent_led_on2, esiop_led_on, 276 sizeof(esiop_led_on) / sizeof(esiop_led_on[0])); 277 bus_space_write_region_4(sc->sc_c.sc_ramt, 278 sc->sc_c.sc_ramh, 279 Ent_led_off, esiop_led_off, 280 sizeof(esiop_led_off) / sizeof(esiop_led_off[0])); 281 } 282 } else { 283 for (j = 0; 284 j < (sizeof(esiop_script) / sizeof(esiop_script[0])); j++) { 285 sc->sc_c.sc_script[j] = htole32(esiop_script[j]); 286 } 287 for (j = 0; j < 288 (sizeof(E_tlq_offset_Used) / sizeof(E_tlq_offset_Used[0])); 289 j++) { 290 sc->sc_c.sc_script[E_tlq_offset_Used[j]] = 291 htole32(sizeof(struct siop_common_xfer)); 292 } 293 for (j = 0; j < 294 (sizeof(E_abs_msgin2_Used) / sizeof(E_abs_msgin2_Used[0])); 295 j++) { 296 sc->sc_c.sc_script[E_abs_msgin2_Used[j]] = 297 htole32(msgin_addr); 298 } 299 for (j = 0; j < 300 (sizeof(E_abs_sem_Used) / sizeof(E_abs_sem_Used[0])); 301 j++) { 302 sc->sc_c.sc_script[E_abs_sem_Used[j]] = 303 htole32(sem_addr); 304 } 305 306 if (sc->sc_c.features & SF_CHIP_LED0) { 307 for (j = 0; j < (sizeof(esiop_led_on) / 308 sizeof(esiop_led_on[0])); j++) 309 sc->sc_c.sc_script[ 310 Ent_led_on1 / sizeof(esiop_led_on[0]) + j 311 ] = htole32(esiop_led_on[j]); 312 for (j = 0; j < (sizeof(esiop_led_on) / 313 sizeof(esiop_led_on[0])); j++) 314 sc->sc_c.sc_script[ 315 Ent_led_on2 / sizeof(esiop_led_on[0]) + j 316 ] = htole32(esiop_led_on[j]); 317 for (j = 0; j < (sizeof(esiop_led_off) / 318 sizeof(esiop_led_off[0])); j++) 319 sc->sc_c.sc_script[ 320 Ent_led_off / sizeof(esiop_led_off[0]) + j 321 ] = htole32(esiop_led_off[j]); 322 } 323 } 324 /* get base of scheduler ring */ 325 addr = sc->sc_c.sc_scriptaddr + sc->sc_shedoffset * sizeof(u_int32_t); 326 /* init scheduler */ 327 for (i = 0; i < A_ncmd_slots; i++) { 328 esiop_script_write(sc, 329 sc->sc_shedoffset + i * CMD_SLOTSIZE, A_f_cmd_free); 330 } 331 sc->sc_currschedslot = 0; 332 bus_space_write_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_SCRATCHE, 0); 333 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_SCRATCHD, addr); 334 /* 335 * 0x78000000 is a 'move data8 to reg'. data8 is the second 336 * octet, reg offset is the third. 337 */ 338 esiop_script_write(sc, Ent_cmdr0 / 4, 339 0x78640000 | ((addr & 0x000000ff) << 8)); 340 esiop_script_write(sc, Ent_cmdr1 / 4, 341 0x78650000 | ((addr & 0x0000ff00) )); 342 esiop_script_write(sc, Ent_cmdr2 / 4, 343 0x78660000 | ((addr & 0x00ff0000) >> 8)); 344 esiop_script_write(sc, Ent_cmdr3 / 4, 345 0x78670000 | ((addr & 0xff000000) >> 16)); 346 /* done ring */ 347 for (i = 0; i < A_ndone_slots; i++) 348 sc->sc_done_slot[i] = 0; 349 bus_dmamap_sync(sc->sc_c.sc_dmat, sc->sc_done_map, 350 sc->sc_done_offset, A_ndone_slots * sizeof(u_int32_t), 351 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 352 addr = sc->sc_done_map->dm_segs[0].ds_addr + sc->sc_done_offset; 353 sc->sc_currdoneslot = 0; 354 bus_space_write_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_SCRATCHE + 2, 0); 355 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_SCRATCHF, addr); 356 esiop_script_write(sc, Ent_doner0 / 4, 357 0x786c0000 | ((addr & 0x000000ff) << 8)); 358 esiop_script_write(sc, Ent_doner1 / 4, 359 0x786d0000 | ((addr & 0x0000ff00) )); 360 esiop_script_write(sc, Ent_doner2 / 4, 361 0x786e0000 | ((addr & 0x00ff0000) >> 8)); 362 esiop_script_write(sc, Ent_doner3 / 4, 363 0x786f0000 | ((addr & 0xff000000) >> 16)); 364 365 /* set flags */ 366 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_SCRATCHC, 0); 367 /* write pointer of base of target DSA table */ 368 addr = (sc->sc_target_table_offset * sizeof(u_int32_t)) + 369 sc->sc_c.sc_scriptaddr; 370 esiop_script_write(sc, (Ent_load_targtable / 4) + 0, 371 esiop_script_read(sc,(Ent_load_targtable / 4) + 0) | 372 ((addr & 0x000000ff) << 8)); 373 esiop_script_write(sc, (Ent_load_targtable / 4) + 2, 374 esiop_script_read(sc,(Ent_load_targtable / 4) + 2) | 375 ((addr & 0x0000ff00) )); 376 esiop_script_write(sc, (Ent_load_targtable / 4) + 4, 377 esiop_script_read(sc,(Ent_load_targtable / 4) + 4) | 378 ((addr & 0x00ff0000) >> 8)); 379 esiop_script_write(sc, (Ent_load_targtable / 4) + 6, 380 esiop_script_read(sc,(Ent_load_targtable / 4) + 6) | 381 ((addr & 0xff000000) >> 16)); 382 #ifdef SIOP_DEBUG 383 printf("%s: target table offset %d free offset %d\n", 384 sc->sc_c.sc_dev.dv_xname, sc->sc_target_table_offset, 385 sc->sc_free_offset); 386 #endif 387 388 /* register existing targets */ 389 for (i = 0; i < sc->sc_c.sc_chan.chan_ntargets; i++) { 390 if (sc->sc_c.targets[i]) 391 esiop_target_register(sc, i); 392 } 393 /* start script */ 394 if ((sc->sc_c.features & SF_CHIP_RAM) == 0) { 395 bus_dmamap_sync(sc->sc_c.sc_dmat, sc->sc_c.sc_scriptdma, 0, 396 PAGE_SIZE, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 397 } 398 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSP, 399 sc->sc_c.sc_scriptaddr + Ent_reselect); 400 } 401 402 #if 0 403 #define CALL_SCRIPT(ent) do {\ 404 printf ("start script DSA 0x%lx DSP 0x%lx\n", \ 405 esiop_cmd->cmd_c.dsa, \ 406 sc->sc_c.sc_scriptaddr + ent); \ 407 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSP, sc->sc_c.sc_scriptaddr + ent); \ 408 } while (0) 409 #else 410 #define CALL_SCRIPT(ent) do {\ 411 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSP, sc->sc_c.sc_scriptaddr + ent); \ 412 } while (0) 413 #endif 414 415 int 416 esiop_intr(v) 417 void *v; 418 { 419 struct esiop_softc *sc = v; 420 struct esiop_target *esiop_target; 421 struct esiop_cmd *esiop_cmd; 422 struct esiop_lun *esiop_lun; 423 struct scsipi_xfer *xs; 424 int istat, sist, sstat1, dstat = 0; /* XXX: gcc */ 425 u_int32_t irqcode; 426 int need_reset = 0; 427 int offset, target, lun, tag; 428 u_int32_t tflags; 429 u_int32_t addr; 430 int freetarget = 0; 431 int slot; 432 int retval = 0; 433 434 again: 435 istat = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_ISTAT); 436 if ((istat & (ISTAT_INTF | ISTAT_DIP | ISTAT_SIP)) == 0) { 437 return retval; 438 } 439 retval = 1; 440 INCSTAT(esiop_stat_intr); 441 esiop_checkdone(sc); 442 if (istat & ISTAT_INTF) { 443 bus_space_write_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 444 SIOP_ISTAT, ISTAT_INTF); 445 goto again; 446 } 447 448 if ((istat &(ISTAT_DIP | ISTAT_SIP | ISTAT_ABRT)) == 449 (ISTAT_DIP | ISTAT_ABRT)) { 450 /* clear abort */ 451 bus_space_write_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 452 SIOP_ISTAT, 0); 453 } 454 455 /* get CMD from T/L/Q */ 456 tflags = bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 457 SIOP_SCRATCHC); 458 #ifdef SIOP_DEBUG_INTR 459 printf("interrupt, istat=0x%x tflags=0x%x " 460 "DSA=0x%x DSP=0x%lx\n", istat, tflags, 461 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA), 462 (u_long)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 463 SIOP_DSP) - 464 sc->sc_c.sc_scriptaddr)); 465 #endif 466 target = (tflags & A_f_c_target) ? ((tflags >> 8) & 0xff) : -1; 467 if (target > sc->sc_c.sc_chan.chan_ntargets) target = -1; 468 lun = (tflags & A_f_c_lun) ? ((tflags >> 16) & 0xff) : -1; 469 if (lun > sc->sc_c.sc_chan.chan_nluns) lun = -1; 470 tag = (tflags & A_f_c_tag) ? ((tflags >> 24) & 0xff) : -1; 471 472 if (target >= 0 && lun >= 0) { 473 esiop_target = (struct esiop_target *)sc->sc_c.targets[target]; 474 if (esiop_target == NULL) { 475 printf("esiop_target (target %d) not valid\n", target); 476 goto none; 477 } 478 esiop_lun = esiop_target->esiop_lun[lun]; 479 if (esiop_lun == NULL) { 480 printf("esiop_lun (target %d lun %d) not valid\n", 481 target, lun); 482 goto none; 483 } 484 esiop_cmd = 485 (tag >= 0) ? esiop_lun->tactive[tag] : esiop_lun->active; 486 if (esiop_cmd == NULL) { 487 printf("esiop_cmd (target %d lun %d tag %d) not valid\n", 488 target, lun, tag); 489 goto none; 490 } 491 xs = esiop_cmd->cmd_c.xs; 492 #ifdef DIAGNOSTIC 493 if (esiop_cmd->cmd_c.status != CMDST_ACTIVE) { 494 printf("esiop_cmd (target %d lun %d) " 495 "not active (%d)\n", target, lun, 496 esiop_cmd->cmd_c.status); 497 goto none; 498 } 499 #endif 500 esiop_table_sync(esiop_cmd, 501 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 502 } else { 503 none: 504 xs = NULL; 505 esiop_target = NULL; 506 esiop_lun = NULL; 507 esiop_cmd = NULL; 508 } 509 if (istat & ISTAT_DIP) { 510 dstat = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 511 SIOP_DSTAT); 512 if (dstat & DSTAT_ABRT) { 513 /* was probably generated by a bus reset IOCTL */ 514 if ((dstat & DSTAT_DFE) == 0) 515 siop_clearfifo(&sc->sc_c); 516 goto reset; 517 } 518 if (dstat & DSTAT_SSI) { 519 printf("single step dsp 0x%08x dsa 0x08%x\n", 520 (int)(bus_space_read_4(sc->sc_c.sc_rt, 521 sc->sc_c.sc_rh, SIOP_DSP) - 522 sc->sc_c.sc_scriptaddr), 523 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 524 SIOP_DSA)); 525 if ((dstat & ~(DSTAT_DFE | DSTAT_SSI)) == 0 && 526 (istat & ISTAT_SIP) == 0) { 527 bus_space_write_1(sc->sc_c.sc_rt, 528 sc->sc_c.sc_rh, SIOP_DCNTL, 529 bus_space_read_1(sc->sc_c.sc_rt, 530 sc->sc_c.sc_rh, SIOP_DCNTL) | DCNTL_STD); 531 } 532 return 1; 533 } 534 535 if (dstat & ~(DSTAT_SIR | DSTAT_DFE | DSTAT_SSI)) { 536 printf("%s: DMA IRQ:", sc->sc_c.sc_dev.dv_xname); 537 if (dstat & DSTAT_IID) 538 printf(" Illegal instruction"); 539 if (dstat & DSTAT_BF) 540 printf(" bus fault"); 541 if (dstat & DSTAT_MDPE) 542 printf(" parity"); 543 if (dstat & DSTAT_DFE) 544 printf(" DMA fifo empty"); 545 else 546 siop_clearfifo(&sc->sc_c); 547 printf(", DSP=0x%x DSA=0x%x: ", 548 (int)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 549 SIOP_DSP) - sc->sc_c.sc_scriptaddr), 550 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA)); 551 if (esiop_cmd) 552 printf("T/L/Q=%d/%d/%d last msg_in=0x%x status=0x%x\n", 553 target, lun, tag, esiop_cmd->cmd_tables->msg_in[0], 554 le32toh(esiop_cmd->cmd_tables->status)); 555 else 556 printf(" current T/L/Q invalid\n"); 557 need_reset = 1; 558 } 559 } 560 if (istat & ISTAT_SIP) { 561 if (istat & ISTAT_DIP) 562 delay(10); 563 /* 564 * Can't read sist0 & sist1 independently, or we have to 565 * insert delay 566 */ 567 sist = bus_space_read_2(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 568 SIOP_SIST0); 569 sstat1 = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 570 SIOP_SSTAT1); 571 #ifdef SIOP_DEBUG_INTR 572 printf("scsi interrupt, sist=0x%x sstat1=0x%x " 573 "DSA=0x%x DSP=0x%lx\n", sist, sstat1, 574 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA), 575 (u_long)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 576 SIOP_DSP) - 577 sc->sc_c.sc_scriptaddr)); 578 #endif 579 if (sist & SIST0_RST) { 580 esiop_handle_reset(sc); 581 /* no table to flush here */ 582 return 1; 583 } 584 if (sist & SIST0_SGE) { 585 if (esiop_cmd) 586 scsipi_printaddr(xs->xs_periph); 587 else 588 printf("%s:", sc->sc_c.sc_dev.dv_xname); 589 printf("scsi gross error\n"); 590 if (esiop_target) 591 esiop_target->target_c.flags &= ~TARF_DT; 592 #ifdef DEBUG 593 printf("DSA=0x%x DSP=0x%lx\n", 594 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA), 595 (u_long)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 596 SIOP_DSP) - 597 sc->sc_c.sc_scriptaddr)); 598 printf("SDID 0x%x SCNTL3 0x%x SXFER 0x%x SCNTL4 0x%x\n", 599 bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_SDID), 600 bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_SCNTL3), 601 bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_SXFER), 602 bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_SCNTL4)); 603 604 #endif 605 goto reset; 606 } 607 if ((sist & SIST0_MA) && need_reset == 0) { 608 if (esiop_cmd) { 609 int scratchc0; 610 dstat = bus_space_read_1(sc->sc_c.sc_rt, 611 sc->sc_c.sc_rh, SIOP_DSTAT); 612 /* 613 * first restore DSA, in case we were in a S/G 614 * operation. 615 */ 616 bus_space_write_4(sc->sc_c.sc_rt, 617 sc->sc_c.sc_rh, 618 SIOP_DSA, esiop_cmd->cmd_c.dsa); 619 scratchc0 = bus_space_read_1(sc->sc_c.sc_rt, 620 sc->sc_c.sc_rh, SIOP_SCRATCHC); 621 switch (sstat1 & SSTAT1_PHASE_MASK) { 622 case SSTAT1_PHASE_STATUS: 623 /* 624 * previous phase may be aborted for any reason 625 * ( for example, the target has less data to 626 * transfer than requested). Compute resid and 627 * just go to status, the command should 628 * terminate. 629 */ 630 INCSTAT(esiop_stat_intr_shortxfer); 631 if (scratchc0 & A_f_c_data) 632 siop_ma(&esiop_cmd->cmd_c); 633 else if ((dstat & DSTAT_DFE) == 0) 634 siop_clearfifo(&sc->sc_c); 635 CALL_SCRIPT(Ent_status); 636 return 1; 637 case SSTAT1_PHASE_MSGIN: 638 /* 639 * target may be ready to disconnect 640 * Compute resid which would be used later 641 * if a save data pointer is needed. 642 */ 643 INCSTAT(esiop_stat_intr_xferdisc); 644 if (scratchc0 & A_f_c_data) 645 siop_ma(&esiop_cmd->cmd_c); 646 else if ((dstat & DSTAT_DFE) == 0) 647 siop_clearfifo(&sc->sc_c); 648 bus_space_write_1(sc->sc_c.sc_rt, 649 sc->sc_c.sc_rh, SIOP_SCRATCHC, 650 scratchc0 & ~A_f_c_data); 651 CALL_SCRIPT(Ent_msgin); 652 return 1; 653 } 654 printf("%s: unexpected phase mismatch %d\n", 655 sc->sc_c.sc_dev.dv_xname, 656 sstat1 & SSTAT1_PHASE_MASK); 657 } else { 658 printf("%s: phase mismatch without command\n", 659 sc->sc_c.sc_dev.dv_xname); 660 } 661 need_reset = 1; 662 } 663 if (sist & SIST0_PAR) { 664 /* parity error, reset */ 665 if (esiop_cmd) 666 scsipi_printaddr(xs->xs_periph); 667 else 668 printf("%s:", sc->sc_c.sc_dev.dv_xname); 669 printf("parity error\n"); 670 if (esiop_target) 671 esiop_target->target_c.flags &= ~TARF_DT; 672 goto reset; 673 } 674 if ((sist & (SIST1_STO << 8)) && need_reset == 0) { 675 /* 676 * selection time out, assume there's no device here 677 * We also have to update the ring pointer ourselve 678 */ 679 slot = bus_space_read_1(sc->sc_c.sc_rt, 680 sc->sc_c.sc_rh, SIOP_SCRATCHE); 681 esiop_script_sync(sc, 682 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 683 #ifdef SIOP_DEBUG_SCHED 684 printf("sel timeout target %d, slot %d\n", target, slot); 685 #endif 686 /* 687 * mark this slot as free, and advance to next slot 688 */ 689 esiop_script_write(sc, 690 sc->sc_shedoffset + slot * CMD_SLOTSIZE, 691 A_f_cmd_free); 692 addr = bus_space_read_4(sc->sc_c.sc_rt, 693 sc->sc_c.sc_rh, SIOP_SCRATCHD); 694 if (slot < (A_ncmd_slots - 1)) { 695 bus_space_write_1(sc->sc_c.sc_rt, 696 sc->sc_c.sc_rh, SIOP_SCRATCHE, slot + 1); 697 addr = addr + sizeof(struct esiop_slot); 698 } else { 699 bus_space_write_1(sc->sc_c.sc_rt, 700 sc->sc_c.sc_rh, SIOP_SCRATCHE, 0); 701 addr = sc->sc_c.sc_scriptaddr + 702 sc->sc_shedoffset * sizeof(u_int32_t); 703 } 704 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 705 SIOP_SCRATCHD, addr); 706 esiop_script_sync(sc, 707 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 708 if (esiop_cmd) { 709 esiop_cmd->cmd_c.status = CMDST_DONE; 710 xs->error = XS_SELTIMEOUT; 711 freetarget = 1; 712 goto end; 713 } else { 714 printf("%s: selection timeout without " 715 "command, target %d (sdid 0x%x), " 716 "slot %d\n", 717 sc->sc_c.sc_dev.dv_xname, target, 718 bus_space_read_1(sc->sc_c.sc_rt, 719 sc->sc_c.sc_rh, SIOP_SDID), slot); 720 need_reset = 1; 721 } 722 } 723 if (sist & SIST0_UDC) { 724 /* 725 * unexpected disconnect. Usually the target signals 726 * a fatal condition this way. Attempt to get sense. 727 */ 728 if (esiop_cmd) { 729 esiop_cmd->cmd_tables->status = 730 htole32(SCSI_CHECK); 731 goto end; 732 } 733 printf("%s: unexpected disconnect without " 734 "command\n", sc->sc_c.sc_dev.dv_xname); 735 goto reset; 736 } 737 if (sist & (SIST1_SBMC << 8)) { 738 /* SCSI bus mode change */ 739 if (siop_modechange(&sc->sc_c) == 0 || need_reset == 1) 740 goto reset; 741 if ((istat & ISTAT_DIP) && (dstat & DSTAT_SIR)) { 742 /* 743 * we have a script interrupt, it will 744 * restart the script. 745 */ 746 goto scintr; 747 } 748 /* 749 * else we have to restart it ourselve, at the 750 * interrupted instruction. 751 */ 752 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 753 SIOP_DSP, 754 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 755 SIOP_DSP) - 8); 756 return 1; 757 } 758 /* Else it's an unhandled exception (for now). */ 759 printf("%s: unhandled scsi interrupt, sist=0x%x sstat1=0x%x " 760 "DSA=0x%x DSP=0x%x\n", sc->sc_c.sc_dev.dv_xname, sist, 761 bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 762 SIOP_SSTAT1), 763 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA), 764 (int)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 765 SIOP_DSP) - sc->sc_c.sc_scriptaddr)); 766 if (esiop_cmd) { 767 esiop_cmd->cmd_c.status = CMDST_DONE; 768 xs->error = XS_SELTIMEOUT; 769 goto end; 770 } 771 need_reset = 1; 772 } 773 if (need_reset) { 774 reset: 775 /* fatal error, reset the bus */ 776 siop_resetbus(&sc->sc_c); 777 /* no table to flush here */ 778 return 1; 779 } 780 781 scintr: 782 if ((istat & ISTAT_DIP) && (dstat & DSTAT_SIR)) { /* script interrupt */ 783 irqcode = bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 784 SIOP_DSPS); 785 #ifdef SIOP_DEBUG_INTR 786 printf("script interrupt 0x%x\n", irqcode); 787 #endif 788 /* 789 * no command, or an inactive command is only valid for a 790 * reselect interrupt 791 */ 792 if ((irqcode & 0x80) == 0) { 793 if (esiop_cmd == NULL) { 794 printf( 795 "%s: script interrupt (0x%x) with invalid DSA !!!\n", 796 sc->sc_c.sc_dev.dv_xname, irqcode); 797 goto reset; 798 } 799 if (esiop_cmd->cmd_c.status != CMDST_ACTIVE) { 800 printf("%s: command with invalid status " 801 "(IRQ code 0x%x current status %d) !\n", 802 sc->sc_c.sc_dev.dv_xname, 803 irqcode, esiop_cmd->cmd_c.status); 804 xs = NULL; 805 } 806 } 807 switch(irqcode) { 808 case A_int_err: 809 printf("error, DSP=0x%x\n", 810 (int)(bus_space_read_4(sc->sc_c.sc_rt, 811 sc->sc_c.sc_rh, SIOP_DSP) - sc->sc_c.sc_scriptaddr)); 812 if (xs) { 813 xs->error = XS_SELTIMEOUT; 814 goto end; 815 } else { 816 goto reset; 817 } 818 case A_int_msgin: 819 { 820 int msgin = bus_space_read_1(sc->sc_c.sc_rt, 821 sc->sc_c.sc_rh, SIOP_SFBR); 822 if (msgin == MSG_MESSAGE_REJECT) { 823 int msg, extmsg; 824 if (esiop_cmd->cmd_tables->msg_out[0] & 0x80) { 825 /* 826 * message was part of a identify + 827 * something else. Identify shouldn't 828 * have been rejected. 829 */ 830 msg = 831 esiop_cmd->cmd_tables->msg_out[1]; 832 extmsg = 833 esiop_cmd->cmd_tables->msg_out[3]; 834 } else { 835 msg = 836 esiop_cmd->cmd_tables->msg_out[0]; 837 extmsg = 838 esiop_cmd->cmd_tables->msg_out[2]; 839 } 840 if (msg == MSG_MESSAGE_REJECT) { 841 /* MSG_REJECT for a MSG_REJECT !*/ 842 if (xs) 843 scsipi_printaddr(xs->xs_periph); 844 else 845 printf("%s: ", 846 sc->sc_c.sc_dev.dv_xname); 847 printf("our reject message was " 848 "rejected\n"); 849 goto reset; 850 } 851 if (msg == MSG_EXTENDED && 852 extmsg == MSG_EXT_WDTR) { 853 /* WDTR rejected, initiate sync */ 854 if ((esiop_target->target_c.flags & 855 TARF_SYNC) == 0) { 856 esiop_target->target_c.status = 857 TARST_OK; 858 siop_update_xfer_mode(&sc->sc_c, 859 target); 860 /* no table to flush here */ 861 CALL_SCRIPT(Ent_msgin_ack); 862 return 1; 863 } 864 esiop_target->target_c.status = 865 TARST_SYNC_NEG; 866 siop_sdtr_msg(&esiop_cmd->cmd_c, 0, 867 sc->sc_c.st_minsync, 868 sc->sc_c.maxoff); 869 esiop_table_sync(esiop_cmd, 870 BUS_DMASYNC_PREREAD | 871 BUS_DMASYNC_PREWRITE); 872 CALL_SCRIPT(Ent_send_msgout); 873 return 1; 874 } else if (msg == MSG_EXTENDED && 875 extmsg == MSG_EXT_SDTR) { 876 /* sync rejected */ 877 esiop_target->target_c.offset = 0; 878 esiop_target->target_c.period = 0; 879 esiop_target->target_c.status = 880 TARST_OK; 881 siop_update_xfer_mode(&sc->sc_c, 882 target); 883 /* no table to flush here */ 884 CALL_SCRIPT(Ent_msgin_ack); 885 return 1; 886 } else if (msg == MSG_EXTENDED && 887 extmsg == MSG_EXT_PPR) { 888 /* PPR rejected */ 889 esiop_target->target_c.offset = 0; 890 esiop_target->target_c.period = 0; 891 esiop_target->target_c.status = 892 TARST_OK; 893 siop_update_xfer_mode(&sc->sc_c, 894 target); 895 /* no table to flush here */ 896 CALL_SCRIPT(Ent_msgin_ack); 897 return 1; 898 } else if (msg == MSG_SIMPLE_Q_TAG || 899 msg == MSG_HEAD_OF_Q_TAG || 900 msg == MSG_ORDERED_Q_TAG) { 901 if (esiop_handle_qtag_reject( 902 esiop_cmd) == -1) 903 goto reset; 904 CALL_SCRIPT(Ent_msgin_ack); 905 return 1; 906 } 907 if (xs) 908 scsipi_printaddr(xs->xs_periph); 909 else 910 printf("%s: ", 911 sc->sc_c.sc_dev.dv_xname); 912 if (msg == MSG_EXTENDED) { 913 printf("scsi message reject, extended " 914 "message sent was 0x%x\n", extmsg); 915 } else { 916 printf("scsi message reject, message " 917 "sent was 0x%x\n", msg); 918 } 919 /* no table to flush here */ 920 CALL_SCRIPT(Ent_msgin_ack); 921 return 1; 922 } 923 if (xs) 924 scsipi_printaddr(xs->xs_periph); 925 else 926 printf("%s: ", sc->sc_c.sc_dev.dv_xname); 927 printf("unhandled message 0x%x\n", msgin); 928 esiop_cmd->cmd_tables->msg_out[0] = MSG_MESSAGE_REJECT; 929 esiop_cmd->cmd_tables->t_msgout.count= htole32(1); 930 esiop_table_sync(esiop_cmd, 931 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 932 CALL_SCRIPT(Ent_send_msgout); 933 return 1; 934 } 935 case A_int_extmsgin: 936 #ifdef SIOP_DEBUG_INTR 937 printf("extended message: msg 0x%x len %d\n", 938 esiop_cmd->cmd_tables->msg_in[2], 939 esiop_cmd->cmd_tables->msg_in[1]); 940 #endif 941 if (esiop_cmd->cmd_tables->msg_in[1] > 942 sizeof(esiop_cmd->cmd_tables->msg_in) - 2) 943 printf("%s: extended message too big (%d)\n", 944 sc->sc_c.sc_dev.dv_xname, 945 esiop_cmd->cmd_tables->msg_in[1]); 946 esiop_cmd->cmd_tables->t_extmsgdata.count = 947 htole32(esiop_cmd->cmd_tables->msg_in[1] - 1); 948 esiop_table_sync(esiop_cmd, 949 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 950 CALL_SCRIPT(Ent_get_extmsgdata); 951 return 1; 952 case A_int_extmsgdata: 953 #ifdef SIOP_DEBUG_INTR 954 { 955 int i; 956 printf("extended message: 0x%x, data:", 957 esiop_cmd->cmd_tables->msg_in[2]); 958 for (i = 3; i < 2 + esiop_cmd->cmd_tables->msg_in[1]; 959 i++) 960 printf(" 0x%x", 961 esiop_cmd->cmd_tables->msg_in[i]); 962 printf("\n"); 963 } 964 #endif 965 if (esiop_cmd->cmd_tables->msg_in[2] == MSG_EXT_PPR) { 966 switch (siop_ppr_neg(&esiop_cmd->cmd_c)) { 967 case SIOP_NEG_MSGOUT: 968 esiop_update_scntl3(sc, 969 esiop_cmd->cmd_c.siop_target); 970 esiop_table_sync(esiop_cmd, 971 BUS_DMASYNC_PREREAD | 972 BUS_DMASYNC_PREWRITE); 973 CALL_SCRIPT(Ent_send_msgout); 974 return 1; 975 case SIOP_NEG_ACK: 976 esiop_update_scntl3(sc, 977 esiop_cmd->cmd_c.siop_target); 978 CALL_SCRIPT(Ent_msgin_ack); 979 return 1; 980 default: 981 panic("invalid retval from " 982 "siop_wdtr_neg()"); 983 } 984 return 1; 985 } 986 if (esiop_cmd->cmd_tables->msg_in[2] == MSG_EXT_WDTR) { 987 switch (siop_wdtr_neg(&esiop_cmd->cmd_c)) { 988 case SIOP_NEG_MSGOUT: 989 esiop_update_scntl3(sc, 990 esiop_cmd->cmd_c.siop_target); 991 esiop_table_sync(esiop_cmd, 992 BUS_DMASYNC_PREREAD | 993 BUS_DMASYNC_PREWRITE); 994 CALL_SCRIPT(Ent_send_msgout); 995 return 1; 996 case SIOP_NEG_ACK: 997 esiop_update_scntl3(sc, 998 esiop_cmd->cmd_c.siop_target); 999 CALL_SCRIPT(Ent_msgin_ack); 1000 return 1; 1001 default: 1002 panic("invalid retval from " 1003 "siop_wdtr_neg()"); 1004 } 1005 return 1; 1006 } 1007 if (esiop_cmd->cmd_tables->msg_in[2] == MSG_EXT_SDTR) { 1008 switch (siop_sdtr_neg(&esiop_cmd->cmd_c)) { 1009 case SIOP_NEG_MSGOUT: 1010 esiop_update_scntl3(sc, 1011 esiop_cmd->cmd_c.siop_target); 1012 esiop_table_sync(esiop_cmd, 1013 BUS_DMASYNC_PREREAD | 1014 BUS_DMASYNC_PREWRITE); 1015 CALL_SCRIPT(Ent_send_msgout); 1016 return 1; 1017 case SIOP_NEG_ACK: 1018 esiop_update_scntl3(sc, 1019 esiop_cmd->cmd_c.siop_target); 1020 CALL_SCRIPT(Ent_msgin_ack); 1021 return 1; 1022 default: 1023 panic("invalid retval from " 1024 "siop_wdtr_neg()"); 1025 } 1026 return 1; 1027 } 1028 /* send a message reject */ 1029 esiop_cmd->cmd_tables->msg_out[0] = MSG_MESSAGE_REJECT; 1030 esiop_cmd->cmd_tables->t_msgout.count = htole32(1); 1031 esiop_table_sync(esiop_cmd, 1032 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1033 CALL_SCRIPT(Ent_send_msgout); 1034 return 1; 1035 case A_int_disc: 1036 INCSTAT(esiop_stat_intr_sdp); 1037 offset = bus_space_read_1(sc->sc_c.sc_rt, 1038 sc->sc_c.sc_rh, SIOP_SCRATCHA + 1); 1039 #ifdef SIOP_DEBUG_DR 1040 printf("disconnect offset %d\n", offset); 1041 #endif 1042 siop_sdp(&esiop_cmd->cmd_c, offset); 1043 esiop_table_sync(esiop_cmd, 1044 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1045 CALL_SCRIPT(Ent_script_sched); 1046 return 1; 1047 case A_int_resfail: 1048 printf("reselect failed\n"); 1049 CALL_SCRIPT(Ent_script_sched); 1050 return 1; 1051 case A_int_done: 1052 if (xs == NULL) { 1053 printf("%s: done without command\n", 1054 sc->sc_c.sc_dev.dv_xname); 1055 CALL_SCRIPT(Ent_script_sched); 1056 return 1; 1057 } 1058 #ifdef SIOP_DEBUG_INTR 1059 printf("done, DSA=0x%lx target id 0x%x last msg " 1060 "in=0x%x status=0x%x\n", (u_long)esiop_cmd->cmd_c.dsa, 1061 le32toh(esiop_cmd->cmd_tables->id), 1062 esiop_cmd->cmd_tables->msg_in[0], 1063 le32toh(esiop_cmd->cmd_tables->status)); 1064 #endif 1065 INCSTAT(esiop_stat_intr_done); 1066 esiop_cmd->cmd_c.status = CMDST_DONE; 1067 goto end; 1068 default: 1069 printf("unknown irqcode %x\n", irqcode); 1070 if (xs) { 1071 xs->error = XS_SELTIMEOUT; 1072 goto end; 1073 } 1074 goto reset; 1075 } 1076 return 1; 1077 } 1078 /* We just should't get there */ 1079 panic("siop_intr: I shouldn't be there !"); 1080 1081 end: 1082 /* 1083 * restart the script now if command completed properly 1084 * Otherwise wait for siop_scsicmd_end(), we may need to cleanup the 1085 * queue 1086 */ 1087 xs->status = le32toh(esiop_cmd->cmd_tables->status); 1088 #ifdef SIOP_DEBUG_INTR 1089 printf("esiop_intr end: status %d\n", xs->status); 1090 #endif 1091 if (tag >= 0) 1092 esiop_lun->tactive[tag] = NULL; 1093 else 1094 esiop_lun->active = NULL; 1095 offset = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 1096 SIOP_SCRATCHA + 1); 1097 esiop_scsicmd_end(esiop_cmd, offset); 1098 if (freetarget && esiop_target->target_c.status == TARST_PROBING) 1099 esiop_del_dev(sc, target, lun); 1100 CALL_SCRIPT(Ent_script_sched); 1101 return 1; 1102 } 1103 1104 void 1105 esiop_scsicmd_end(esiop_cmd, offset) 1106 struct esiop_cmd *esiop_cmd; 1107 int offset; 1108 { 1109 struct scsipi_xfer *xs = esiop_cmd->cmd_c.xs; 1110 struct esiop_softc *sc = (struct esiop_softc *)esiop_cmd->cmd_c.siop_sc; 1111 1112 siop_update_resid(&esiop_cmd->cmd_c, offset); 1113 1114 switch(xs->status) { 1115 case SCSI_OK: 1116 xs->error = XS_NOERROR; 1117 break; 1118 case SCSI_BUSY: 1119 xs->error = XS_BUSY; 1120 break; 1121 case SCSI_CHECK: 1122 xs->error = XS_BUSY; 1123 /* remove commands in the queue and scheduler */ 1124 esiop_unqueue(sc, xs->xs_periph->periph_target, 1125 xs->xs_periph->periph_lun); 1126 break; 1127 case SCSI_QUEUE_FULL: 1128 INCSTAT(esiop_stat_intr_qfull); 1129 #ifdef SIOP_DEBUG 1130 printf("%s:%d:%d: queue full (tag %d)\n", 1131 sc->sc_c.sc_dev.dv_xname, 1132 xs->xs_periph->periph_target, 1133 xs->xs_periph->periph_lun, esiop_cmd->cmd_c.tag); 1134 #endif 1135 xs->error = XS_BUSY; 1136 break; 1137 case SCSI_SIOP_NOCHECK: 1138 /* 1139 * don't check status, xs->error is already valid 1140 */ 1141 break; 1142 case SCSI_SIOP_NOSTATUS: 1143 /* 1144 * the status byte was not updated, cmd was 1145 * aborted 1146 */ 1147 xs->error = XS_SELTIMEOUT; 1148 break; 1149 default: 1150 scsipi_printaddr(xs->xs_periph); 1151 printf("invalid status code %d\n", xs->status); 1152 xs->error = XS_DRIVER_STUFFUP; 1153 } 1154 if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) { 1155 bus_dmamap_sync(sc->sc_c.sc_dmat, 1156 esiop_cmd->cmd_c.dmamap_data, 0, 1157 esiop_cmd->cmd_c.dmamap_data->dm_mapsize, 1158 (xs->xs_control & XS_CTL_DATA_IN) ? 1159 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1160 bus_dmamap_unload(sc->sc_c.sc_dmat, 1161 esiop_cmd->cmd_c.dmamap_data); 1162 } 1163 bus_dmamap_unload(sc->sc_c.sc_dmat, esiop_cmd->cmd_c.dmamap_cmd); 1164 callout_stop(&esiop_cmd->cmd_c.xs->xs_callout); 1165 esiop_cmd->cmd_c.status = CMDST_FREE; 1166 TAILQ_INSERT_TAIL(&sc->free_list, esiop_cmd, next); 1167 #if 0 1168 if (xs->resid != 0) 1169 printf("resid %d datalen %d\n", xs->resid, xs->datalen); 1170 #endif 1171 scsipi_done (xs); 1172 } 1173 1174 void 1175 esiop_checkdone(sc) 1176 struct esiop_softc *sc; 1177 { 1178 int target, lun, tag; 1179 struct esiop_target *esiop_target; 1180 struct esiop_lun *esiop_lun; 1181 struct esiop_cmd *esiop_cmd; 1182 u_int32_t slot; 1183 int needsync = 0; 1184 int status; 1185 u_int32_t sem; 1186 1187 esiop_script_sync(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1188 sem = esiop_script_read(sc, sc->sc_semoffset); 1189 esiop_script_write(sc, sc->sc_semoffset, sem & ~A_sem_done); 1190 if ((sc->sc_flags & SCF_CHAN_NOSLOT) && (sem & A_sem_start)) { 1191 /* 1192 * at last one command have been started, 1193 * so we should have free slots now 1194 */ 1195 sc->sc_flags &= ~SCF_CHAN_NOSLOT; 1196 scsipi_channel_thaw(&sc->sc_c.sc_chan, 1); 1197 } 1198 esiop_script_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1199 1200 if ((sem & A_sem_done) == 0) { 1201 /* no pending done command */ 1202 return; 1203 } 1204 1205 bus_dmamap_sync(sc->sc_c.sc_dmat, sc->sc_done_map, 1206 sc->sc_done_offset, A_ndone_slots * sizeof(u_int32_t), 1207 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1208 next: 1209 if (sc->sc_done_slot[sc->sc_currdoneslot] == 0) { 1210 if (needsync) 1211 bus_dmamap_sync(sc->sc_c.sc_dmat, sc->sc_done_map, 1212 sc->sc_done_offset, 1213 A_ndone_slots * sizeof(u_int32_t), 1214 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1215 return; 1216 } 1217 1218 needsync = 1; 1219 1220 slot = htole32(sc->sc_done_slot[sc->sc_currdoneslot]); 1221 sc->sc_done_slot[sc->sc_currdoneslot] = 0; 1222 sc->sc_currdoneslot += 1; 1223 if (sc->sc_currdoneslot == A_ndone_slots) 1224 sc->sc_currdoneslot = 0; 1225 1226 target = (slot & A_f_c_target) ? (slot >> 8) & 0xff : -1; 1227 lun = (slot & A_f_c_lun) ? (slot >> 16) & 0xff : -1; 1228 tag = (slot & A_f_c_tag) ? (slot >> 24) & 0xff : -1; 1229 1230 esiop_target = (target >= 0) ? 1231 (struct esiop_target *)sc->sc_c.targets[target] : NULL; 1232 if (esiop_target == NULL) { 1233 printf("esiop_target (target %d) not valid\n", target); 1234 goto next; 1235 } 1236 esiop_lun = (lun >= 0) ? esiop_target->esiop_lun[lun] : NULL; 1237 if (esiop_lun == NULL) { 1238 printf("esiop_lun (target %d lun %d) not valid\n", 1239 target, lun); 1240 goto next; 1241 } 1242 esiop_cmd = (tag >= 0) ? esiop_lun->tactive[tag] : esiop_lun->active; 1243 if (esiop_cmd == NULL) { 1244 printf("esiop_cmd (target %d lun %d tag %d) not valid\n", 1245 target, lun, tag); 1246 goto next; 1247 } 1248 1249 esiop_table_sync(esiop_cmd, 1250 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1251 status = le32toh(esiop_cmd->cmd_tables->status); 1252 #ifdef DIAGNOSTIC 1253 if (status != SCSI_OK) { 1254 printf("command for T/L/Q %d/%d/%d status %d\n", 1255 target, lun, tag, status); 1256 goto next; 1257 } 1258 1259 #endif 1260 /* Ok, this command has been handled */ 1261 esiop_cmd->cmd_c.xs->status = status; 1262 if (tag >= 0) 1263 esiop_lun->tactive[tag] = NULL; 1264 else 1265 esiop_lun->active = NULL; 1266 /* scratcha was saved in tlq by script. fetch offset from it */ 1267 esiop_scsicmd_end(esiop_cmd, 1268 (le32toh(((struct esiop_xfer *)esiop_cmd->cmd_tables)->tlq) >> 8) 1269 & 0xff); 1270 goto next; 1271 } 1272 1273 void 1274 esiop_unqueue(sc, target, lun) 1275 struct esiop_softc *sc; 1276 int target; 1277 int lun; 1278 { 1279 int slot, tag; 1280 u_int32_t slotdsa; 1281 struct esiop_cmd *esiop_cmd; 1282 struct esiop_lun *esiop_lun = 1283 ((struct esiop_target *)sc->sc_c.targets[target])->esiop_lun[lun]; 1284 1285 /* first make sure to read valid data */ 1286 esiop_script_sync(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1287 1288 for (tag = 0; tag < ESIOP_NTAG; tag++) { 1289 /* look for commands in the scheduler, not yet started */ 1290 if (esiop_lun->tactive[tag] == NULL) 1291 continue; 1292 esiop_cmd = esiop_lun->tactive[tag]; 1293 for (slot = 0; slot < A_ncmd_slots; slot++) { 1294 slotdsa = esiop_script_read(sc, 1295 sc->sc_shedoffset + slot * CMD_SLOTSIZE); 1296 /* if the slot has any flag, it won't match the DSA */ 1297 if (slotdsa == esiop_cmd->cmd_c.dsa) { /* found it */ 1298 /* Mark this slot as ignore */ 1299 esiop_script_write(sc, 1300 sc->sc_shedoffset + slot * CMD_SLOTSIZE, 1301 esiop_cmd->cmd_c.dsa | A_f_cmd_ignore); 1302 /* ask to requeue */ 1303 esiop_cmd->cmd_c.xs->error = XS_REQUEUE; 1304 esiop_cmd->cmd_c.xs->status = SCSI_SIOP_NOCHECK; 1305 esiop_lun->tactive[tag] = NULL; 1306 esiop_scsicmd_end(esiop_cmd, 0); 1307 break; 1308 } 1309 } 1310 } 1311 esiop_script_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1312 } 1313 1314 /* 1315 * handle a rejected queue tag message: the command will run untagged, 1316 * has to adjust the reselect script. 1317 */ 1318 1319 1320 int 1321 esiop_handle_qtag_reject(esiop_cmd) 1322 struct esiop_cmd *esiop_cmd; 1323 { 1324 struct esiop_softc *sc = (struct esiop_softc *)esiop_cmd->cmd_c.siop_sc; 1325 int target = esiop_cmd->cmd_c.xs->xs_periph->periph_target; 1326 int lun = esiop_cmd->cmd_c.xs->xs_periph->periph_lun; 1327 int tag = esiop_cmd->cmd_tables->msg_out[2]; 1328 struct esiop_target *esiop_target = 1329 (struct esiop_target*)sc->sc_c.targets[target]; 1330 struct esiop_lun *esiop_lun = esiop_target->esiop_lun[lun]; 1331 1332 #ifdef SIOP_DEBUG 1333 printf("%s:%d:%d: tag message %d (%d) rejected (status %d)\n", 1334 sc->sc_c.sc_dev.dv_xname, target, lun, tag, esiop_cmd->cmd_c.tag, 1335 esiop_cmd->cmd_c.status); 1336 #endif 1337 1338 if (esiop_lun->active != NULL) { 1339 printf("%s: untagged command already running for target %d " 1340 "lun %d (status %d)\n", sc->sc_c.sc_dev.dv_xname, 1341 target, lun, esiop_lun->active->cmd_c.status); 1342 return -1; 1343 } 1344 /* clear tag slot */ 1345 esiop_lun->tactive[tag] = NULL; 1346 /* add command to non-tagged slot */ 1347 esiop_lun->active = esiop_cmd; 1348 esiop_cmd->cmd_c.flags &= ~CMDFL_TAG; 1349 esiop_cmd->cmd_c.tag = -1; 1350 /* update DSA table */ 1351 esiop_script_write(sc, esiop_target->lun_table_offset + 1352 lun * 2 + A_target_luntbl / sizeof(u_int32_t), 1353 esiop_cmd->cmd_c.dsa); 1354 esiop_script_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1355 return 0; 1356 } 1357 1358 /* 1359 * handle a bus reset: reset chip, unqueue all active commands, free all 1360 * target struct and report lossage to upper layer. 1361 * As the upper layer may requeue immediatly we have to first store 1362 * all active commands in a temporary queue. 1363 */ 1364 void 1365 esiop_handle_reset(sc) 1366 struct esiop_softc *sc; 1367 { 1368 struct esiop_cmd *esiop_cmd; 1369 struct esiop_lun *esiop_lun; 1370 int target, lun, tag; 1371 /* 1372 * scsi bus reset. reset the chip and restart 1373 * the queue. Need to clean up all active commands 1374 */ 1375 printf("%s: scsi bus reset\n", sc->sc_c.sc_dev.dv_xname); 1376 /* stop, reset and restart the chip */ 1377 esiop_reset(sc); 1378 1379 if (sc->sc_flags & SCF_CHAN_NOSLOT) { 1380 /* chip has been reset, all slots are free now */ 1381 sc->sc_flags &= ~SCF_CHAN_NOSLOT; 1382 scsipi_channel_thaw(&sc->sc_c.sc_chan, 1); 1383 } 1384 /* 1385 * Process all commands: first commands completes, then commands 1386 * being executed 1387 */ 1388 esiop_checkdone(sc); 1389 for (target = 0; target < sc->sc_c.sc_chan.chan_ntargets; 1390 target++) { 1391 struct esiop_target *esiop_target = 1392 (struct esiop_target *)sc->sc_c.targets[target]; 1393 if (esiop_target == NULL) 1394 continue; 1395 for (lun = 0; lun < 8; lun++) { 1396 esiop_lun = esiop_target->esiop_lun[lun]; 1397 if (esiop_lun == NULL) 1398 continue; 1399 for (tag = -1; tag < 1400 ((sc->sc_c.targets[target]->flags & TARF_TAG) ? 1401 ESIOP_NTAG : 0); 1402 tag++) { 1403 if (tag >= 0) 1404 esiop_cmd = esiop_lun->tactive[tag]; 1405 else 1406 esiop_cmd = esiop_lun->active; 1407 if (esiop_cmd == NULL) 1408 continue; 1409 scsipi_printaddr(esiop_cmd->cmd_c.xs->xs_periph); 1410 printf("command with tag id %d reset\n", tag); 1411 esiop_cmd->cmd_c.xs->error = 1412 (esiop_cmd->cmd_c.flags & CMDFL_TIMEOUT) ? 1413 XS_TIMEOUT : XS_RESET; 1414 esiop_cmd->cmd_c.xs->status = SCSI_SIOP_NOCHECK; 1415 if (tag >= 0) 1416 esiop_lun->tactive[tag] = NULL; 1417 else 1418 esiop_lun->active = NULL; 1419 esiop_cmd->cmd_c.status = CMDST_DONE; 1420 esiop_scsicmd_end(esiop_cmd, 0); 1421 } 1422 } 1423 sc->sc_c.targets[target]->status = TARST_ASYNC; 1424 sc->sc_c.targets[target]->flags &= ~(TARF_ISWIDE | TARF_ISDT); 1425 sc->sc_c.targets[target]->period = 1426 sc->sc_c.targets[target]->offset = 0; 1427 siop_update_xfer_mode(&sc->sc_c, target); 1428 } 1429 1430 scsipi_async_event(&sc->sc_c.sc_chan, ASYNC_EVENT_RESET, NULL); 1431 } 1432 1433 void 1434 esiop_scsipi_request(chan, req, arg) 1435 struct scsipi_channel *chan; 1436 scsipi_adapter_req_t req; 1437 void *arg; 1438 { 1439 struct scsipi_xfer *xs; 1440 struct scsipi_periph *periph; 1441 struct esiop_softc *sc = (void *)chan->chan_adapter->adapt_dev; 1442 struct esiop_cmd *esiop_cmd; 1443 struct esiop_target *esiop_target; 1444 int s, error, i; 1445 int target; 1446 int lun; 1447 1448 switch (req) { 1449 case ADAPTER_REQ_RUN_XFER: 1450 xs = arg; 1451 periph = xs->xs_periph; 1452 target = periph->periph_target; 1453 lun = periph->periph_lun; 1454 1455 s = splbio(); 1456 /* 1457 * first check if there are pending complete commands. 1458 * this can free us some resources (in the rings for example). 1459 * we have to lock it to avoid recursion. 1460 */ 1461 if ((sc->sc_flags & SCF_CHAN_ADAPTREQ) == 0) { 1462 sc->sc_flags |= SCF_CHAN_ADAPTREQ; 1463 esiop_checkdone(sc); 1464 sc->sc_flags &= ~SCF_CHAN_ADAPTREQ; 1465 } 1466 #ifdef SIOP_DEBUG_SCHED 1467 printf("starting cmd for %d:%d tag %d(%d)\n", target, lun, 1468 xs->xs_tag_type, xs->xs_tag_id); 1469 #endif 1470 esiop_cmd = TAILQ_FIRST(&sc->free_list); 1471 if (esiop_cmd == NULL) { 1472 xs->error = XS_RESOURCE_SHORTAGE; 1473 scsipi_done(xs); 1474 splx(s); 1475 return; 1476 } 1477 TAILQ_REMOVE(&sc->free_list, esiop_cmd, next); 1478 #ifdef DIAGNOSTIC 1479 if (esiop_cmd->cmd_c.status != CMDST_FREE) 1480 panic("siop_scsicmd: new cmd not free"); 1481 #endif 1482 esiop_target = (struct esiop_target*)sc->sc_c.targets[target]; 1483 if (esiop_target == NULL) { 1484 #ifdef SIOP_DEBUG 1485 printf("%s: alloc siop_target for target %d\n", 1486 sc->sc_c.sc_dev.dv_xname, target); 1487 #endif 1488 sc->sc_c.targets[target] = 1489 malloc(sizeof(struct esiop_target), 1490 M_DEVBUF, M_NOWAIT | M_ZERO); 1491 if (sc->sc_c.targets[target] == NULL) { 1492 printf("%s: can't malloc memory for " 1493 "target %d\n", sc->sc_c.sc_dev.dv_xname, 1494 target); 1495 xs->error = XS_RESOURCE_SHORTAGE; 1496 scsipi_done(xs); 1497 splx(s); 1498 return; 1499 } 1500 esiop_target = 1501 (struct esiop_target*)sc->sc_c.targets[target]; 1502 esiop_target->target_c.status = TARST_PROBING; 1503 esiop_target->target_c.flags = 0; 1504 esiop_target->target_c.id = 1505 sc->sc_c.clock_div << 24; /* scntl3 */ 1506 esiop_target->target_c.id |= target << 16; /* id */ 1507 /* esiop_target->target_c.id |= 0x0 << 8; scxfer is 0 */ 1508 1509 for (i=0; i < 8; i++) 1510 esiop_target->esiop_lun[i] = NULL; 1511 esiop_target_register(sc, target); 1512 } 1513 if (esiop_target->esiop_lun[lun] == NULL) { 1514 esiop_target->esiop_lun[lun] = 1515 malloc(sizeof(struct esiop_lun), M_DEVBUF, 1516 M_NOWAIT|M_ZERO); 1517 if (esiop_target->esiop_lun[lun] == NULL) { 1518 printf("%s: can't alloc esiop_lun for " 1519 "target %d lun %d\n", 1520 sc->sc_c.sc_dev.dv_xname, target, lun); 1521 xs->error = XS_RESOURCE_SHORTAGE; 1522 scsipi_done(xs); 1523 splx(s); 1524 return; 1525 } 1526 } 1527 esiop_cmd->cmd_c.siop_target = sc->sc_c.targets[target]; 1528 esiop_cmd->cmd_c.xs = xs; 1529 esiop_cmd->cmd_c.flags = 0; 1530 esiop_cmd->cmd_c.status = CMDST_READY; 1531 1532 /* load the DMA maps */ 1533 error = bus_dmamap_load(sc->sc_c.sc_dmat, 1534 esiop_cmd->cmd_c.dmamap_cmd, 1535 xs->cmd, xs->cmdlen, NULL, BUS_DMA_NOWAIT); 1536 if (error) { 1537 printf("%s: unable to load cmd DMA map: %d\n", 1538 sc->sc_c.sc_dev.dv_xname, error); 1539 xs->error = XS_DRIVER_STUFFUP; 1540 scsipi_done(xs); 1541 splx(s); 1542 return; 1543 } 1544 if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) { 1545 error = bus_dmamap_load(sc->sc_c.sc_dmat, 1546 esiop_cmd->cmd_c.dmamap_data, xs->data, xs->datalen, 1547 NULL, BUS_DMA_NOWAIT | BUS_DMA_STREAMING | 1548 ((xs->xs_control & XS_CTL_DATA_IN) ? 1549 BUS_DMA_READ : BUS_DMA_WRITE)); 1550 if (error) { 1551 printf("%s: unable to load cmd DMA map: %d", 1552 sc->sc_c.sc_dev.dv_xname, error); 1553 xs->error = XS_DRIVER_STUFFUP; 1554 scsipi_done(xs); 1555 bus_dmamap_unload(sc->sc_c.sc_dmat, 1556 esiop_cmd->cmd_c.dmamap_cmd); 1557 splx(s); 1558 return; 1559 } 1560 bus_dmamap_sync(sc->sc_c.sc_dmat, 1561 esiop_cmd->cmd_c.dmamap_data, 0, 1562 esiop_cmd->cmd_c.dmamap_data->dm_mapsize, 1563 (xs->xs_control & XS_CTL_DATA_IN) ? 1564 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1565 } 1566 bus_dmamap_sync(sc->sc_c.sc_dmat, esiop_cmd->cmd_c.dmamap_cmd, 1567 0, esiop_cmd->cmd_c.dmamap_cmd->dm_mapsize, 1568 BUS_DMASYNC_PREWRITE); 1569 1570 if (xs->xs_tag_type) 1571 esiop_cmd->cmd_c.tag = xs->xs_tag_id; 1572 else 1573 esiop_cmd->cmd_c.tag = -1; 1574 siop_setuptables(&esiop_cmd->cmd_c); 1575 ((struct esiop_xfer *)esiop_cmd->cmd_tables)->tlq = 1576 htole32(A_f_c_target | A_f_c_lun); 1577 ((struct esiop_xfer *)esiop_cmd->cmd_tables)->tlq |= 1578 htole32((target << 8) | (lun << 16)); 1579 if (esiop_cmd->cmd_c.flags & CMDFL_TAG) { 1580 ((struct esiop_xfer *)esiop_cmd->cmd_tables)->tlq |= 1581 htole32(A_f_c_tag); 1582 ((struct esiop_xfer *)esiop_cmd->cmd_tables)->tlq |= 1583 htole32(esiop_cmd->cmd_c.tag << 24); 1584 } 1585 1586 esiop_table_sync(esiop_cmd, 1587 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1588 esiop_start(sc, esiop_cmd); 1589 if (xs->xs_control & XS_CTL_POLL) { 1590 /* poll for command completion */ 1591 while ((xs->xs_status & XS_STS_DONE) == 0) { 1592 delay(1000); 1593 esiop_intr(sc); 1594 } 1595 } 1596 splx(s); 1597 return; 1598 1599 case ADAPTER_REQ_GROW_RESOURCES: 1600 #ifdef SIOP_DEBUG 1601 printf("%s grow resources (%d)\n", sc->sc_c.sc_dev.dv_xname, 1602 sc->sc_c.sc_adapt.adapt_openings); 1603 #endif 1604 esiop_morecbd(sc); 1605 return; 1606 1607 case ADAPTER_REQ_SET_XFER_MODE: 1608 { 1609 struct scsipi_xfer_mode *xm = arg; 1610 if (sc->sc_c.targets[xm->xm_target] == NULL) 1611 return; 1612 s = splbio(); 1613 if ((xm->xm_mode & PERIPH_CAP_TQING) && 1614 (sc->sc_c.targets[xm->xm_target]->flags & TARF_TAG) == 0) { 1615 sc->sc_c.targets[xm->xm_target]->flags |= TARF_TAG; 1616 /* allocate tag tables for this device */ 1617 for (lun = 0; 1618 lun < sc->sc_c.sc_chan.chan_nluns; lun++) { 1619 if (scsipi_lookup_periph(chan, 1620 xm->xm_target, lun) != NULL) 1621 esiop_add_dev(sc, xm->xm_target, lun); 1622 } 1623 } 1624 if ((xm->xm_mode & PERIPH_CAP_WIDE16) && 1625 (sc->sc_c.features & SF_BUS_WIDE)) 1626 sc->sc_c.targets[xm->xm_target]->flags |= TARF_WIDE; 1627 if (xm->xm_mode & PERIPH_CAP_SYNC) 1628 sc->sc_c.targets[xm->xm_target]->flags |= TARF_SYNC; 1629 if ((xm->xm_mode & PERIPH_CAP_DT) && 1630 (sc->sc_c.features & SF_CHIP_DT)) 1631 sc->sc_c.targets[xm->xm_target]->flags |= TARF_DT; 1632 if ((xm->xm_mode & 1633 (PERIPH_CAP_SYNC | PERIPH_CAP_WIDE16 | PERIPH_CAP_DT)) || 1634 sc->sc_c.targets[xm->xm_target]->status == TARST_PROBING) 1635 sc->sc_c.targets[xm->xm_target]->status = TARST_ASYNC; 1636 1637 splx(s); 1638 } 1639 } 1640 } 1641 1642 static void 1643 esiop_start(sc, esiop_cmd) 1644 struct esiop_softc *sc; 1645 struct esiop_cmd *esiop_cmd; 1646 { 1647 struct esiop_lun *esiop_lun; 1648 struct esiop_target *esiop_target; 1649 int timeout; 1650 int target, lun, slot; 1651 1652 /* 1653 * first make sure to read valid data 1654 */ 1655 esiop_script_sync(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1656 1657 /* 1658 * We use a circular queue here. sc->sc_currschedslot points to a 1659 * free slot, unless we have filled the queue. Check this. 1660 */ 1661 slot = sc->sc_currschedslot; 1662 if ((esiop_script_read(sc, sc->sc_shedoffset + slot * CMD_SLOTSIZE) & 1663 A_f_cmd_free) == 0) { 1664 /* 1665 * no more free slot, no need to continue. freeze the queue 1666 * and requeue this command. 1667 */ 1668 scsipi_channel_freeze(&sc->sc_c.sc_chan, 1); 1669 sc->sc_flags |= SCF_CHAN_NOSLOT; 1670 esiop_script_sync(sc, 1671 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1672 esiop_script_write(sc, sc->sc_semoffset, 1673 esiop_script_read(sc, sc->sc_semoffset) & ~A_sem_start); 1674 esiop_script_sync(sc, 1675 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1676 esiop_cmd->cmd_c.xs->error = XS_REQUEUE; 1677 esiop_cmd->cmd_c.xs->status = SCSI_SIOP_NOCHECK; 1678 esiop_scsicmd_end(esiop_cmd, 0); 1679 return; 1680 } 1681 /* OK, we can use this slot */ 1682 1683 target = esiop_cmd->cmd_c.xs->xs_periph->periph_target; 1684 lun = esiop_cmd->cmd_c.xs->xs_periph->periph_lun; 1685 esiop_target = (struct esiop_target*)sc->sc_c.targets[target]; 1686 esiop_lun = esiop_target->esiop_lun[lun]; 1687 /* if non-tagged command active, panic: this shouldn't happen */ 1688 if (esiop_lun->active != NULL) { 1689 panic("esiop_start: tagged cmd while untagged running"); 1690 } 1691 #ifdef DIAGNOSTIC 1692 /* sanity check the tag if needed */ 1693 if (esiop_cmd->cmd_c.flags & CMDFL_TAG) { 1694 if (esiop_lun->tactive[esiop_cmd->cmd_c.tag] != NULL) 1695 panic("esiop_start: tag not free"); 1696 if (esiop_cmd->cmd_c.tag >= ESIOP_NTAG || 1697 esiop_cmd->cmd_c.tag < 0) { 1698 scsipi_printaddr(esiop_cmd->cmd_c.xs->xs_periph); 1699 printf(": tag id %d\n", esiop_cmd->cmd_c.tag); 1700 panic("esiop_start: invalid tag id"); 1701 } 1702 } 1703 #endif 1704 #ifdef SIOP_DEBUG_SCHED 1705 printf("using slot %d for DSA 0x%lx\n", slot, 1706 (u_long)esiop_cmd->cmd_c.dsa); 1707 #endif 1708 /* mark command as active */ 1709 if (esiop_cmd->cmd_c.status == CMDST_READY) 1710 esiop_cmd->cmd_c.status = CMDST_ACTIVE; 1711 else 1712 panic("esiop_start: bad status"); 1713 /* DSA table for reselect */ 1714 if (esiop_cmd->cmd_c.flags & CMDFL_TAG) { 1715 esiop_lun->tactive[esiop_cmd->cmd_c.tag] = esiop_cmd; 1716 /* DSA table for reselect */ 1717 esiop_lun->lun_tagtbl->tbl[esiop_cmd->cmd_c.tag] = 1718 htole32(esiop_cmd->cmd_c.dsa); 1719 bus_dmamap_sync(sc->sc_c.sc_dmat, 1720 esiop_lun->lun_tagtbl->tblblk->blkmap, 1721 esiop_lun->lun_tagtbl->tbl_offset, 1722 sizeof(u_int32_t) * ESIOP_NTAG, BUS_DMASYNC_PREWRITE); 1723 } else { 1724 esiop_lun->active = esiop_cmd; 1725 esiop_script_write(sc, 1726 esiop_target->lun_table_offset + 1727 lun * 2 + A_target_luntbl / sizeof(u_int32_t), 1728 esiop_cmd->cmd_c.dsa); 1729 } 1730 /* scheduler slot: DSA */ 1731 esiop_script_write(sc, sc->sc_shedoffset + slot * CMD_SLOTSIZE, 1732 esiop_cmd->cmd_c.dsa); 1733 /* make sure SCRIPT processor will read valid data */ 1734 esiop_script_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1735 /* handle timeout */ 1736 if ((esiop_cmd->cmd_c.xs->xs_control & XS_CTL_POLL) == 0) { 1737 /* start exire timer */ 1738 timeout = mstohz(esiop_cmd->cmd_c.xs->timeout); 1739 if (timeout == 0) 1740 timeout = 1; 1741 callout_reset( &esiop_cmd->cmd_c.xs->xs_callout, 1742 timeout, esiop_timeout, esiop_cmd); 1743 } 1744 /* Signal script it has some work to do */ 1745 bus_space_write_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 1746 SIOP_ISTAT, ISTAT_SIGP); 1747 /* update the current slot, and wait for IRQ */ 1748 sc->sc_currschedslot++; 1749 if (sc->sc_currschedslot >= A_ncmd_slots) 1750 sc->sc_currschedslot = 0; 1751 return; 1752 } 1753 1754 void 1755 esiop_timeout(v) 1756 void *v; 1757 { 1758 struct esiop_cmd *esiop_cmd = v; 1759 struct esiop_softc *sc = 1760 (struct esiop_softc *)esiop_cmd->cmd_c.siop_sc; 1761 int s; 1762 #ifdef SIOP_DEBUG 1763 int slot, slotdsa; 1764 #endif 1765 1766 s = splbio(); 1767 esiop_table_sync(esiop_cmd, 1768 BUS_DMASYNC_POSTREAD | 1769 BUS_DMASYNC_POSTWRITE); 1770 scsipi_printaddr(esiop_cmd->cmd_c.xs->xs_periph); 1771 #ifdef SIOP_DEBUG 1772 printf("command timeout (status %d)\n", le32toh(esiop_cmd->cmd_tables->status)); 1773 1774 esiop_script_sync(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1775 for (slot = 0; slot < A_ncmd_slots; slot++) { 1776 slotdsa = esiop_script_read(sc, 1777 sc->sc_shedoffset + slot * CMD_SLOTSIZE); 1778 if ((slotdsa & 0x01) == 0) 1779 printf("slot %d not free (0x%x)\n", slot, slotdsa); 1780 } 1781 printf("istat 0x%x ", bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_ISTAT)); 1782 printf("DSP 0x%lx DSA 0x%x\n", 1783 (u_long)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSP) - sc->sc_c.sc_scriptaddr), 1784 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA)); 1785 bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_CTEST2); 1786 printf("istat 0x%x\n", bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_ISTAT)); 1787 #else 1788 printf("command timeout, CDB: "); 1789 scsipi_print_cdb(esiop_cmd->cmd_c.xs->cmd); 1790 printf("\n"); 1791 #endif 1792 /* reset the scsi bus */ 1793 siop_resetbus(&sc->sc_c); 1794 1795 /* deactivate callout */ 1796 callout_stop(&esiop_cmd->cmd_c.xs->xs_callout); 1797 /* 1798 * mark command has being timed out and just return; 1799 * the bus reset will generate an interrupt, 1800 * it will be handled in siop_intr() 1801 */ 1802 esiop_cmd->cmd_c.flags |= CMDFL_TIMEOUT; 1803 splx(s); 1804 return; 1805 1806 } 1807 1808 void 1809 esiop_dump_script(sc) 1810 struct esiop_softc *sc; 1811 { 1812 int i; 1813 for (i = 0; i < PAGE_SIZE / 4; i += 2) { 1814 printf("0x%04x: 0x%08x 0x%08x", i * 4, 1815 le32toh(sc->sc_c.sc_script[i]), 1816 le32toh(sc->sc_c.sc_script[i+1])); 1817 if ((le32toh(sc->sc_c.sc_script[i]) & 0xe0000000) == 1818 0xc0000000) { 1819 i++; 1820 printf(" 0x%08x", le32toh(sc->sc_c.sc_script[i+1])); 1821 } 1822 printf("\n"); 1823 } 1824 } 1825 1826 void 1827 esiop_morecbd(sc) 1828 struct esiop_softc *sc; 1829 { 1830 int error, i, s; 1831 bus_dma_segment_t seg; 1832 int rseg; 1833 struct esiop_cbd *newcbd; 1834 struct esiop_xfer *xfer; 1835 bus_addr_t dsa; 1836 1837 /* allocate a new list head */ 1838 newcbd = malloc(sizeof(struct esiop_cbd), M_DEVBUF, M_NOWAIT|M_ZERO); 1839 if (newcbd == NULL) { 1840 printf("%s: can't allocate memory for command descriptors " 1841 "head\n", sc->sc_c.sc_dev.dv_xname); 1842 return; 1843 } 1844 1845 /* allocate cmd list */ 1846 newcbd->cmds = malloc(sizeof(struct esiop_cmd) * SIOP_NCMDPB, 1847 M_DEVBUF, M_NOWAIT|M_ZERO); 1848 if (newcbd->cmds == NULL) { 1849 printf("%s: can't allocate memory for command descriptors\n", 1850 sc->sc_c.sc_dev.dv_xname); 1851 goto bad3; 1852 } 1853 error = bus_dmamem_alloc(sc->sc_c.sc_dmat, PAGE_SIZE, PAGE_SIZE, 0, 1854 &seg, 1, &rseg, BUS_DMA_NOWAIT); 1855 if (error) { 1856 printf("%s: unable to allocate cbd DMA memory, error = %d\n", 1857 sc->sc_c.sc_dev.dv_xname, error); 1858 goto bad2; 1859 } 1860 error = bus_dmamem_map(sc->sc_c.sc_dmat, &seg, rseg, PAGE_SIZE, 1861 (caddr_t *)&newcbd->xfers, BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 1862 if (error) { 1863 printf("%s: unable to map cbd DMA memory, error = %d\n", 1864 sc->sc_c.sc_dev.dv_xname, error); 1865 goto bad2; 1866 } 1867 error = bus_dmamap_create(sc->sc_c.sc_dmat, PAGE_SIZE, 1, PAGE_SIZE, 0, 1868 BUS_DMA_NOWAIT, &newcbd->xferdma); 1869 if (error) { 1870 printf("%s: unable to create cbd DMA map, error = %d\n", 1871 sc->sc_c.sc_dev.dv_xname, error); 1872 goto bad1; 1873 } 1874 error = bus_dmamap_load(sc->sc_c.sc_dmat, newcbd->xferdma, 1875 newcbd->xfers, PAGE_SIZE, NULL, BUS_DMA_NOWAIT); 1876 if (error) { 1877 printf("%s: unable to load cbd DMA map, error = %d\n", 1878 sc->sc_c.sc_dev.dv_xname, error); 1879 goto bad0; 1880 } 1881 #ifdef DEBUG 1882 printf("%s: alloc newcdb at PHY addr 0x%lx\n", sc->sc_c.sc_dev.dv_xname, 1883 (unsigned long)newcbd->xferdma->dm_segs[0].ds_addr); 1884 #endif 1885 for (i = 0; i < SIOP_NCMDPB; i++) { 1886 error = bus_dmamap_create(sc->sc_c.sc_dmat, MAXPHYS, SIOP_NSG, 1887 MAXPHYS, 0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 1888 &newcbd->cmds[i].cmd_c.dmamap_data); 1889 if (error) { 1890 printf("%s: unable to create data DMA map for cbd: " 1891 "error %d\n", 1892 sc->sc_c.sc_dev.dv_xname, error); 1893 goto bad0; 1894 } 1895 error = bus_dmamap_create(sc->sc_c.sc_dmat, 1896 sizeof(struct scsipi_generic), 1, 1897 sizeof(struct scsipi_generic), 0, 1898 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 1899 &newcbd->cmds[i].cmd_c.dmamap_cmd); 1900 if (error) { 1901 printf("%s: unable to create cmd DMA map for cbd %d\n", 1902 sc->sc_c.sc_dev.dv_xname, error); 1903 goto bad0; 1904 } 1905 newcbd->cmds[i].cmd_c.siop_sc = &sc->sc_c; 1906 newcbd->cmds[i].esiop_cbdp = newcbd; 1907 xfer = &newcbd->xfers[i]; 1908 newcbd->cmds[i].cmd_tables = (struct siop_common_xfer *)xfer; 1909 memset(newcbd->cmds[i].cmd_tables, 0, 1910 sizeof(struct esiop_xfer)); 1911 dsa = newcbd->xferdma->dm_segs[0].ds_addr + 1912 i * sizeof(struct esiop_xfer); 1913 newcbd->cmds[i].cmd_c.dsa = dsa; 1914 newcbd->cmds[i].cmd_c.status = CMDST_FREE; 1915 xfer->siop_tables.t_msgout.count= htole32(1); 1916 xfer->siop_tables.t_msgout.addr = htole32(dsa); 1917 xfer->siop_tables.t_msgin.count= htole32(1); 1918 xfer->siop_tables.t_msgin.addr = htole32(dsa + 1919 offsetof(struct siop_common_xfer, msg_in)); 1920 xfer->siop_tables.t_extmsgin.count= htole32(2); 1921 xfer->siop_tables.t_extmsgin.addr = htole32(dsa + 1922 offsetof(struct siop_common_xfer, msg_in) + 1); 1923 xfer->siop_tables.t_extmsgdata.addr = htole32(dsa + 1924 offsetof(struct siop_common_xfer, msg_in) + 3); 1925 xfer->siop_tables.t_status.count= htole32(1); 1926 xfer->siop_tables.t_status.addr = htole32(dsa + 1927 offsetof(struct siop_common_xfer, status)); 1928 1929 s = splbio(); 1930 TAILQ_INSERT_TAIL(&sc->free_list, &newcbd->cmds[i], next); 1931 splx(s); 1932 #ifdef SIOP_DEBUG 1933 printf("tables[%d]: in=0x%x out=0x%x status=0x%x\n", i, 1934 le32toh(newcbd->cmds[i].cmd_tables->t_msgin.addr), 1935 le32toh(newcbd->cmds[i].cmd_tables->t_msgout.addr), 1936 le32toh(newcbd->cmds[i].cmd_tables->t_status.addr)); 1937 #endif 1938 } 1939 s = splbio(); 1940 TAILQ_INSERT_TAIL(&sc->cmds, newcbd, next); 1941 sc->sc_c.sc_adapt.adapt_openings += SIOP_NCMDPB; 1942 splx(s); 1943 return; 1944 bad0: 1945 bus_dmamap_unload(sc->sc_c.sc_dmat, newcbd->xferdma); 1946 bus_dmamap_destroy(sc->sc_c.sc_dmat, newcbd->xferdma); 1947 bad1: 1948 bus_dmamem_free(sc->sc_c.sc_dmat, &seg, rseg); 1949 bad2: 1950 free(newcbd->cmds, M_DEVBUF); 1951 bad3: 1952 free(newcbd, M_DEVBUF); 1953 return; 1954 } 1955 1956 void 1957 esiop_moretagtbl(sc) 1958 struct esiop_softc *sc; 1959 { 1960 int error, i, j, s; 1961 bus_dma_segment_t seg; 1962 int rseg; 1963 struct esiop_dsatblblk *newtblblk; 1964 struct esiop_dsatbl *newtbls; 1965 u_int32_t *tbls; 1966 1967 /* allocate a new list head */ 1968 newtblblk = malloc(sizeof(struct esiop_dsatblblk), 1969 M_DEVBUF, M_NOWAIT|M_ZERO); 1970 if (newtblblk == NULL) { 1971 printf("%s: can't allocate memory for tag DSA table block\n", 1972 sc->sc_c.sc_dev.dv_xname); 1973 return; 1974 } 1975 1976 /* allocate tbl list */ 1977 newtbls = malloc(sizeof(struct esiop_dsatbl) * ESIOP_NTPB, 1978 M_DEVBUF, M_NOWAIT|M_ZERO); 1979 if (newtbls == NULL) { 1980 printf("%s: can't allocate memory for command descriptors\n", 1981 sc->sc_c.sc_dev.dv_xname); 1982 goto bad3; 1983 } 1984 error = bus_dmamem_alloc(sc->sc_c.sc_dmat, PAGE_SIZE, PAGE_SIZE, 0, 1985 &seg, 1, &rseg, BUS_DMA_NOWAIT); 1986 if (error) { 1987 printf("%s: unable to allocate tbl DMA memory, error = %d\n", 1988 sc->sc_c.sc_dev.dv_xname, error); 1989 goto bad2; 1990 } 1991 error = bus_dmamem_map(sc->sc_c.sc_dmat, &seg, rseg, PAGE_SIZE, 1992 (void *)&tbls, BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 1993 if (error) { 1994 printf("%s: unable to map tbls DMA memory, error = %d\n", 1995 sc->sc_c.sc_dev.dv_xname, error); 1996 goto bad2; 1997 } 1998 error = bus_dmamap_create(sc->sc_c.sc_dmat, PAGE_SIZE, 1, PAGE_SIZE, 0, 1999 BUS_DMA_NOWAIT, &newtblblk->blkmap); 2000 if (error) { 2001 printf("%s: unable to create tbl DMA map, error = %d\n", 2002 sc->sc_c.sc_dev.dv_xname, error); 2003 goto bad1; 2004 } 2005 error = bus_dmamap_load(sc->sc_c.sc_dmat, newtblblk->blkmap, 2006 tbls, PAGE_SIZE, NULL, BUS_DMA_NOWAIT); 2007 if (error) { 2008 printf("%s: unable to load tbl DMA map, error = %d\n", 2009 sc->sc_c.sc_dev.dv_xname, error); 2010 goto bad0; 2011 } 2012 #ifdef DEBUG 2013 printf("%s: alloc new tag DSA table at PHY addr 0x%lx\n", 2014 sc->sc_c.sc_dev.dv_xname, 2015 (unsigned long)newtblblk->blkmap->dm_segs[0].ds_addr); 2016 #endif 2017 for (i = 0; i < ESIOP_NTPB; i++) { 2018 newtbls[i].tblblk = newtblblk; 2019 newtbls[i].tbl = &tbls[i * ESIOP_NTAG]; 2020 newtbls[i].tbl_offset = i * ESIOP_NTAG * sizeof(u_int32_t); 2021 newtbls[i].tbl_dsa = newtblblk->blkmap->dm_segs[0].ds_addr + 2022 newtbls[i].tbl_offset; 2023 for (j = 0; j < ESIOP_NTAG; j++) 2024 newtbls[i].tbl[j] = j; 2025 s = splbio(); 2026 TAILQ_INSERT_TAIL(&sc->free_tagtbl, &newtbls[i], next); 2027 splx(s); 2028 } 2029 s = splbio(); 2030 TAILQ_INSERT_TAIL(&sc->tag_tblblk, newtblblk, next); 2031 splx(s); 2032 return; 2033 bad0: 2034 bus_dmamap_unload(sc->sc_c.sc_dmat, newtblblk->blkmap); 2035 bus_dmamap_destroy(sc->sc_c.sc_dmat, newtblblk->blkmap); 2036 bad1: 2037 bus_dmamem_free(sc->sc_c.sc_dmat, &seg, rseg); 2038 bad2: 2039 free(newtbls, M_DEVBUF); 2040 bad3: 2041 free(newtblblk, M_DEVBUF); 2042 return; 2043 } 2044 2045 void 2046 esiop_update_scntl3(sc, _siop_target) 2047 struct esiop_softc *sc; 2048 struct siop_common_target *_siop_target; 2049 { 2050 struct esiop_target *esiop_target = (struct esiop_target *)_siop_target; 2051 esiop_script_write(sc, esiop_target->lun_table_offset, 2052 esiop_target->target_c.id); 2053 esiop_script_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 2054 } 2055 2056 void 2057 esiop_add_dev(sc, target, lun) 2058 struct esiop_softc *sc; 2059 int target; 2060 int lun; 2061 { 2062 struct esiop_target *esiop_target = 2063 (struct esiop_target *)sc->sc_c.targets[target]; 2064 struct esiop_lun *esiop_lun = esiop_target->esiop_lun[lun]; 2065 2066 /* we need a tag DSA table */ 2067 esiop_lun->lun_tagtbl= TAILQ_FIRST(&sc->free_tagtbl); 2068 if (esiop_lun->lun_tagtbl == NULL) { 2069 esiop_moretagtbl(sc); 2070 esiop_lun->lun_tagtbl= TAILQ_FIRST(&sc->free_tagtbl); 2071 if (esiop_lun->lun_tagtbl == NULL) { 2072 /* no resources, run untagged */ 2073 esiop_target->target_c.flags &= ~TARF_TAG; 2074 return; 2075 } 2076 } 2077 TAILQ_REMOVE(&sc->free_tagtbl, esiop_lun->lun_tagtbl, next); 2078 /* Update LUN DSA table */ 2079 esiop_script_write(sc, esiop_target->lun_table_offset + 2080 lun * 2 + A_target_luntbl_tag / sizeof(u_int32_t), 2081 esiop_lun->lun_tagtbl->tbl_dsa); 2082 esiop_script_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 2083 } 2084 2085 void 2086 esiop_del_dev(sc, target, lun) 2087 struct esiop_softc *sc; 2088 int target; 2089 int lun; 2090 { 2091 struct esiop_target *esiop_target; 2092 #ifdef SIOP_DEBUG 2093 printf("%s:%d:%d: free lun sw entry\n", 2094 sc->sc_c.sc_dev.dv_xname, target, lun); 2095 #endif 2096 if (sc->sc_c.targets[target] == NULL) 2097 return; 2098 esiop_target = (struct esiop_target *)sc->sc_c.targets[target]; 2099 free(esiop_target->esiop_lun[lun], M_DEVBUF); 2100 esiop_target->esiop_lun[lun] = NULL; 2101 } 2102 2103 void 2104 esiop_target_register(sc, target) 2105 struct esiop_softc *sc; 2106 u_int32_t target; 2107 { 2108 struct esiop_target *esiop_target = 2109 (struct esiop_target *)sc->sc_c.targets[target]; 2110 struct esiop_lun *esiop_lun; 2111 int lun; 2112 2113 /* get a DSA table for this target */ 2114 esiop_target->lun_table_offset = sc->sc_free_offset; 2115 sc->sc_free_offset += sc->sc_c.sc_chan.chan_nluns * 2 + 2; 2116 #ifdef SIOP_DEBUG 2117 printf("%s: lun table for target %d offset %d free offset %d\n", 2118 sc->sc_c.sc_dev.dv_xname, target, esiop_target->lun_table_offset, 2119 sc->sc_free_offset); 2120 #endif 2121 /* first 32 bytes are ID (for select) */ 2122 esiop_script_write(sc, esiop_target->lun_table_offset, 2123 esiop_target->target_c.id); 2124 /* Record this table in the target DSA table */ 2125 esiop_script_write(sc, 2126 sc->sc_target_table_offset + target, 2127 (esiop_target->lun_table_offset * sizeof(u_int32_t)) + 2128 sc->sc_c.sc_scriptaddr); 2129 /* if we have a tag table, register it */ 2130 for (lun = 0; lun < sc->sc_c.sc_chan.chan_nluns; lun++) { 2131 esiop_lun = esiop_target->esiop_lun[lun]; 2132 if (esiop_lun == NULL) 2133 continue; 2134 if (esiop_lun->lun_tagtbl) 2135 esiop_script_write(sc, esiop_target->lun_table_offset + 2136 lun * 2 + A_target_luntbl_tag / sizeof(u_int32_t), 2137 esiop_lun->lun_tagtbl->tbl_dsa); 2138 } 2139 esiop_script_sync(sc, 2140 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 2141 } 2142 2143 #ifdef SIOP_STATS 2144 void 2145 esiop_printstats() 2146 { 2147 printf("esiop_stat_intr %d\n", esiop_stat_intr); 2148 printf("esiop_stat_intr_shortxfer %d\n", esiop_stat_intr_shortxfer); 2149 printf("esiop_stat_intr_xferdisc %d\n", esiop_stat_intr_xferdisc); 2150 printf("esiop_stat_intr_sdp %d\n", esiop_stat_intr_sdp); 2151 printf("esiop_stat_intr_done %d\n", esiop_stat_intr_done); 2152 printf("esiop_stat_intr_lunresel %d\n", esiop_stat_intr_lunresel); 2153 printf("esiop_stat_intr_qfull %d\n", esiop_stat_intr_qfull); 2154 } 2155 #endif 2156
Indexes created Tue Sep 30 20:09:53 GMT 2025