esiop.c revision 1.31
1 /* $NetBSD: esiop.c,v 1.31 2004/05/20 20:57:50 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 2002 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 */ 32 33 /* SYM53c7/8xx PCI-SCSI I/O Processors driver */ 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: esiop.c,v 1.31 2004/05/20 20:57:50 bouyer Exp $"); 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/device.h> 41 #include <sys/malloc.h> 42 #include <sys/buf.h> 43 #include <sys/kernel.h> 44 45 #include <uvm/uvm_extern.h> 46 47 #include <machine/endian.h> 48 #include <machine/bus.h> 49 50 #include <dev/microcode/siop/esiop.out> 51 52 #include <dev/scsipi/scsi_all.h> 53 #include <dev/scsipi/scsi_message.h> 54 #include <dev/scsipi/scsipi_all.h> 55 56 #include <dev/scsipi/scsiconf.h> 57 58 #include <dev/ic/siopreg.h> 59 #include <dev/ic/siopvar_common.h> 60 #include <dev/ic/esiopvar.h> 61 62 #include "opt_siop.h" 63 64 #ifndef DEBUG 65 #undef DEBUG 66 #endif 67 #undef SIOP_DEBUG 68 #undef SIOP_DEBUG_DR 69 #undef SIOP_DEBUG_INTR 70 #undef SIOP_DEBUG_SCHED 71 #undef DUMP_SCRIPT 72 73 #define SIOP_STATS 74 75 #ifndef SIOP_DEFAULT_TARGET 76 #define SIOP_DEFAULT_TARGET 7 77 #endif 78 79 /* number of cmd descriptors per block */ 80 #define SIOP_NCMDPB (PAGE_SIZE / sizeof(struct esiop_xfer)) 81 82 void esiop_reset __P((struct esiop_softc *)); 83 void esiop_checkdone __P((struct esiop_softc *)); 84 void esiop_handle_reset __P((struct esiop_softc *)); 85 void esiop_scsicmd_end __P((struct esiop_cmd *, int)); 86 void esiop_unqueue __P((struct esiop_softc *, int, int)); 87 int esiop_handle_qtag_reject __P((struct esiop_cmd *)); 88 static void esiop_start __P((struct esiop_softc *, struct esiop_cmd *)); 89 void esiop_timeout __P((void *)); 90 void esiop_scsipi_request __P((struct scsipi_channel *, 91 scsipi_adapter_req_t, void *)); 92 void esiop_dump_script __P((struct esiop_softc *)); 93 void esiop_morecbd __P((struct esiop_softc *)); 94 void esiop_moretagtbl __P((struct esiop_softc *)); 95 void siop_add_reselsw __P((struct esiop_softc *, int)); 96 void esiop_target_register __P((struct esiop_softc *, u_int32_t)); 97 98 void esiop_update_scntl3 __P((struct esiop_softc *, 99 struct siop_common_target *)); 100 101 #ifdef SIOP_STATS 102 static int esiop_stat_intr = 0; 103 static int esiop_stat_intr_shortxfer = 0; 104 static int esiop_stat_intr_sdp = 0; 105 static int esiop_stat_intr_done = 0; 106 static int esiop_stat_intr_xferdisc = 0; 107 static int esiop_stat_intr_lunresel = 0; 108 static int esiop_stat_intr_qfull = 0; 109 void esiop_printstats __P((void)); 110 #define INCSTAT(x) x++ 111 #else 112 #define INCSTAT(x) 113 #endif 114 115 static __inline__ void esiop_script_sync __P((struct esiop_softc *, int)); 116 static __inline__ void 117 esiop_script_sync(sc, ops) 118 struct esiop_softc *sc; 119 int ops; 120 { 121 if ((sc->sc_c.features & SF_CHIP_RAM) == 0) 122 bus_dmamap_sync(sc->sc_c.sc_dmat, sc->sc_c.sc_scriptdma, 0, 123 PAGE_SIZE, ops); 124 } 125 126 static __inline__ u_int32_t esiop_script_read __P((struct esiop_softc *, u_int)); 127 static __inline__ u_int32_t 128 esiop_script_read(sc, offset) 129 struct esiop_softc *sc; 130 u_int offset; 131 { 132 if (sc->sc_c.features & SF_CHIP_RAM) { 133 return bus_space_read_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh, 134 offset * 4); 135 } else { 136 return le32toh(sc->sc_c.sc_script[offset]); 137 } 138 } 139 140 static __inline__ void esiop_script_write __P((struct esiop_softc *, u_int, 141 u_int32_t)); 142 static __inline__ void 143 esiop_script_write(sc, offset, val) 144 struct esiop_softc *sc; 145 u_int offset; 146 u_int32_t val; 147 { 148 if (sc->sc_c.features & SF_CHIP_RAM) { 149 bus_space_write_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh, 150 offset * 4, val); 151 } else { 152 sc->sc_c.sc_script[offset] = htole32(val); 153 } 154 } 155 156 void 157 esiop_attach(sc) 158 struct esiop_softc *sc; 159 { 160 struct esiop_dsatbl *tagtbl_donering; 161 162 if (siop_common_attach(&sc->sc_c) != 0 ) 163 return; 164 165 TAILQ_INIT(&sc->free_list); 166 TAILQ_INIT(&sc->cmds); 167 TAILQ_INIT(&sc->free_tagtbl); 168 TAILQ_INIT(&sc->tag_tblblk); 169 sc->sc_currschedslot = 0; 170 #ifdef SIOP_DEBUG 171 aprint_debug("%s: script size = %d, PHY addr=0x%x, VIRT=%p\n", 172 sc->sc_c.sc_dev.dv_xname, (int)sizeof(esiop_script), 173 (u_int32_t)sc->sc_c.sc_scriptaddr, sc->sc_c.sc_script); 174 #endif 175 176 sc->sc_c.sc_adapt.adapt_max_periph = ESIOP_NTAG; 177 sc->sc_c.sc_adapt.adapt_request = esiop_scsipi_request; 178 179 /* 180 * get space for the CMD done slot. For this we use a tag table entry. 181 * It's the same size and allows us to not waste 3/4 of a page 182 */ 183 #ifdef DIAGNOSTIC 184 if (ESIOP_NTAG != A_ndone_slots) { 185 aprint_error("%s: size of tag DSA table different from the done" 186 " ring\n", sc->sc_c.sc_dev.dv_xname); 187 return; 188 } 189 #endif 190 esiop_moretagtbl(sc); 191 tagtbl_donering = TAILQ_FIRST(&sc->free_tagtbl); 192 if (tagtbl_donering == NULL) { 193 aprint_error("%s: no memory for command done ring\n", 194 sc->sc_c.sc_dev.dv_xname); 195 return; 196 } 197 TAILQ_REMOVE(&sc->free_tagtbl, tagtbl_donering, next); 198 sc->sc_done_map = tagtbl_donering->tblblk->blkmap; 199 sc->sc_done_offset = tagtbl_donering->tbl_offset; 200 sc->sc_done_slot = &tagtbl_donering->tbl[0]; 201 202 /* Do a bus reset, so that devices fall back to narrow/async */ 203 siop_resetbus(&sc->sc_c); 204 /* 205 * siop_reset() will reset the chip, thus clearing pending interrupts 206 */ 207 esiop_reset(sc); 208 #ifdef DUMP_SCRIPT 209 esiop_dump_script(sc); 210 #endif 211 212 config_found((struct device*)sc, &sc->sc_c.sc_chan, scsiprint); 213 } 214 215 void 216 esiop_reset(sc) 217 struct esiop_softc *sc; 218 { 219 int i, j; 220 u_int32_t addr; 221 u_int32_t msgin_addr, sem_addr; 222 223 siop_common_reset(&sc->sc_c); 224 225 /* 226 * we copy the script at the beggining of RAM. Then there is 4 bytes 227 * for messages in, and 4 bytes for semaphore 228 */ 229 sc->sc_free_offset = sizeof(esiop_script) / sizeof(esiop_script[0]); 230 msgin_addr = 231 sc->sc_free_offset * sizeof(u_int32_t) + sc->sc_c.sc_scriptaddr; 232 sc->sc_free_offset += 1; 233 sc->sc_semoffset = sc->sc_free_offset; 234 sem_addr = 235 sc->sc_semoffset * sizeof(u_int32_t) + sc->sc_c.sc_scriptaddr; 236 sc->sc_free_offset += 1; 237 /* then we have the scheduler ring */ 238 sc->sc_shedoffset = sc->sc_free_offset; 239 sc->sc_free_offset += A_ncmd_slots * CMD_SLOTSIZE; 240 /* then the targets DSA table */ 241 sc->sc_target_table_offset = sc->sc_free_offset; 242 sc->sc_free_offset += sc->sc_c.sc_chan.chan_ntargets; 243 /* copy and patch the script */ 244 if (sc->sc_c.features & SF_CHIP_RAM) { 245 bus_space_write_region_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh, 0, 246 esiop_script, 247 sizeof(esiop_script) / sizeof(esiop_script[0])); 248 for (j = 0; j < 249 (sizeof(E_tlq_offset_Used) / sizeof(E_tlq_offset_Used[0])); 250 j++) { 251 bus_space_write_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh, 252 E_tlq_offset_Used[j] * 4, 253 sizeof(struct siop_common_xfer)); 254 } 255 for (j = 0; j < 256 (sizeof(E_abs_msgin2_Used) / sizeof(E_abs_msgin2_Used[0])); 257 j++) { 258 bus_space_write_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh, 259 E_abs_msgin2_Used[j] * 4, msgin_addr); 260 } 261 for (j = 0; j < 262 (sizeof(E_abs_sem_Used) / sizeof(E_abs_sem_Used[0])); 263 j++) { 264 bus_space_write_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh, 265 E_abs_sem_Used[j] * 4, sem_addr); 266 } 267 268 if (sc->sc_c.features & SF_CHIP_LED0) { 269 bus_space_write_region_4(sc->sc_c.sc_ramt, 270 sc->sc_c.sc_ramh, 271 Ent_led_on1, esiop_led_on, 272 sizeof(esiop_led_on) / sizeof(esiop_led_on[0])); 273 bus_space_write_region_4(sc->sc_c.sc_ramt, 274 sc->sc_c.sc_ramh, 275 Ent_led_on2, esiop_led_on, 276 sizeof(esiop_led_on) / sizeof(esiop_led_on[0])); 277 bus_space_write_region_4(sc->sc_c.sc_ramt, 278 sc->sc_c.sc_ramh, 279 Ent_led_off, esiop_led_off, 280 sizeof(esiop_led_off) / sizeof(esiop_led_off[0])); 281 } 282 } else { 283 for (j = 0; 284 j < (sizeof(esiop_script) / sizeof(esiop_script[0])); j++) { 285 sc->sc_c.sc_script[j] = htole32(esiop_script[j]); 286 } 287 for (j = 0; j < 288 (sizeof(E_tlq_offset_Used) / sizeof(E_tlq_offset_Used[0])); 289 j++) { 290 sc->sc_c.sc_script[E_tlq_offset_Used[j]] = 291 htole32(sizeof(struct siop_common_xfer)); 292 } 293 for (j = 0; j < 294 (sizeof(E_abs_msgin2_Used) / sizeof(E_abs_msgin2_Used[0])); 295 j++) { 296 sc->sc_c.sc_script[E_abs_msgin2_Used[j]] = 297 htole32(msgin_addr); 298 } 299 for (j = 0; j < 300 (sizeof(E_abs_sem_Used) / sizeof(E_abs_sem_Used[0])); 301 j++) { 302 sc->sc_c.sc_script[E_abs_sem_Used[j]] = 303 htole32(sem_addr); 304 } 305 306 if (sc->sc_c.features & SF_CHIP_LED0) { 307 for (j = 0; j < (sizeof(esiop_led_on) / 308 sizeof(esiop_led_on[0])); j++) 309 sc->sc_c.sc_script[ 310 Ent_led_on1 / sizeof(esiop_led_on[0]) + j 311 ] = htole32(esiop_led_on[j]); 312 for (j = 0; j < (sizeof(esiop_led_on) / 313 sizeof(esiop_led_on[0])); j++) 314 sc->sc_c.sc_script[ 315 Ent_led_on2 / sizeof(esiop_led_on[0]) + j 316 ] = htole32(esiop_led_on[j]); 317 for (j = 0; j < (sizeof(esiop_led_off) / 318 sizeof(esiop_led_off[0])); j++) 319 sc->sc_c.sc_script[ 320 Ent_led_off / sizeof(esiop_led_off[0]) + j 321 ] = htole32(esiop_led_off[j]); 322 } 323 } 324 /* get base of scheduler ring */ 325 addr = sc->sc_c.sc_scriptaddr + sc->sc_shedoffset * sizeof(u_int32_t); 326 /* init scheduler */ 327 for (i = 0; i < A_ncmd_slots; i++) { 328 esiop_script_write(sc, 329 sc->sc_shedoffset + i * CMD_SLOTSIZE, A_f_cmd_free); 330 } 331 sc->sc_currschedslot = 0; 332 bus_space_write_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_SCRATCHE, 0); 333 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_SCRATCHD, addr); 334 /* 335 * 0x78000000 is a 'move data8 to reg'. data8 is the second 336 * octet, reg offset is the third. 337 */ 338 esiop_script_write(sc, Ent_cmdr0 / 4, 339 0x78640000 | ((addr & 0x000000ff) << 8)); 340 esiop_script_write(sc, Ent_cmdr1 / 4, 341 0x78650000 | ((addr & 0x0000ff00) )); 342 esiop_script_write(sc, Ent_cmdr2 / 4, 343 0x78660000 | ((addr & 0x00ff0000) >> 8)); 344 esiop_script_write(sc, Ent_cmdr3 / 4, 345 0x78670000 | ((addr & 0xff000000) >> 16)); 346 /* done ring */ 347 for (i = 0; i < A_ndone_slots; i++) 348 sc->sc_done_slot[i] = 0; 349 bus_dmamap_sync(sc->sc_c.sc_dmat, sc->sc_done_map, 350 sc->sc_done_offset, A_ndone_slots * sizeof(u_int32_t), 351 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 352 addr = sc->sc_done_map->dm_segs[0].ds_addr + sc->sc_done_offset; 353 sc->sc_currdoneslot = 0; 354 bus_space_write_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_SCRATCHE + 2, 0); 355 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_SCRATCHF, addr); 356 esiop_script_write(sc, Ent_doner0 / 4, 357 0x786c0000 | ((addr & 0x000000ff) << 8)); 358 esiop_script_write(sc, Ent_doner1 / 4, 359 0x786d0000 | ((addr & 0x0000ff00) )); 360 esiop_script_write(sc, Ent_doner2 / 4, 361 0x786e0000 | ((addr & 0x00ff0000) >> 8)); 362 esiop_script_write(sc, Ent_doner3 / 4, 363 0x786f0000 | ((addr & 0xff000000) >> 16)); 364 365 /* set flags */ 366 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_SCRATCHC, 0); 367 /* write pointer of base of target DSA table */ 368 addr = (sc->sc_target_table_offset * sizeof(u_int32_t)) + 369 sc->sc_c.sc_scriptaddr; 370 esiop_script_write(sc, (Ent_load_targtable / 4) + 0, 371 esiop_script_read(sc,(Ent_load_targtable / 4) + 0) | 372 ((addr & 0x000000ff) << 8)); 373 esiop_script_write(sc, (Ent_load_targtable / 4) + 2, 374 esiop_script_read(sc,(Ent_load_targtable / 4) + 2) | 375 ((addr & 0x0000ff00) )); 376 esiop_script_write(sc, (Ent_load_targtable / 4) + 4, 377 esiop_script_read(sc,(Ent_load_targtable / 4) + 4) | 378 ((addr & 0x00ff0000) >> 8)); 379 esiop_script_write(sc, (Ent_load_targtable / 4) + 6, 380 esiop_script_read(sc,(Ent_load_targtable / 4) + 6) | 381 ((addr & 0xff000000) >> 16)); 382 #ifdef SIOP_DEBUG 383 printf("%s: target table offset %d free offset %d\n", 384 sc->sc_c.sc_dev.dv_xname, sc->sc_target_table_offset, 385 sc->sc_free_offset); 386 #endif 387 388 /* register existing targets */ 389 for (i = 0; i < sc->sc_c.sc_chan.chan_ntargets; i++) { 390 if (sc->sc_c.targets[i]) 391 esiop_target_register(sc, i); 392 } 393 /* start script */ 394 if ((sc->sc_c.features & SF_CHIP_RAM) == 0) { 395 bus_dmamap_sync(sc->sc_c.sc_dmat, sc->sc_c.sc_scriptdma, 0, 396 PAGE_SIZE, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 397 } 398 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSP, 399 sc->sc_c.sc_scriptaddr + Ent_reselect); 400 } 401 402 #if 0 403 #define CALL_SCRIPT(ent) do {\ 404 printf ("start script DSA 0x%lx DSP 0x%lx\n", \ 405 esiop_cmd->cmd_c.dsa, \ 406 sc->sc_c.sc_scriptaddr + ent); \ 407 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSP, sc->sc_c.sc_scriptaddr + ent); \ 408 } while (0) 409 #else 410 #define CALL_SCRIPT(ent) do {\ 411 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSP, sc->sc_c.sc_scriptaddr + ent); \ 412 } while (0) 413 #endif 414 415 int 416 esiop_intr(v) 417 void *v; 418 { 419 struct esiop_softc *sc = v; 420 struct esiop_target *esiop_target; 421 struct esiop_cmd *esiop_cmd; 422 struct esiop_lun *esiop_lun; 423 struct scsipi_xfer *xs; 424 int istat, sist, sstat1, dstat = 0; /* XXX: gcc */ 425 u_int32_t irqcode; 426 int need_reset = 0; 427 int offset, target, lun, tag; 428 u_int32_t tflags; 429 u_int32_t addr; 430 int freetarget = 0; 431 int slot; 432 int retval = 0; 433 434 again: 435 istat = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_ISTAT); 436 if ((istat & (ISTAT_INTF | ISTAT_DIP | ISTAT_SIP)) == 0) { 437 return retval; 438 } 439 retval = 1; 440 INCSTAT(esiop_stat_intr); 441 esiop_checkdone(sc); 442 if (istat & ISTAT_INTF) { 443 bus_space_write_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 444 SIOP_ISTAT, ISTAT_INTF); 445 goto again; 446 } 447 448 if ((istat &(ISTAT_DIP | ISTAT_SIP | ISTAT_ABRT)) == 449 (ISTAT_DIP | ISTAT_ABRT)) { 450 /* clear abort */ 451 bus_space_write_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 452 SIOP_ISTAT, 0); 453 } 454 455 /* get CMD from T/L/Q */ 456 tflags = bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 457 SIOP_SCRATCHC); 458 #ifdef SIOP_DEBUG_INTR 459 printf("interrupt, istat=0x%x tflags=0x%x " 460 "DSA=0x%x DSP=0x%lx\n", istat, tflags, 461 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA), 462 (u_long)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 463 SIOP_DSP) - 464 sc->sc_c.sc_scriptaddr)); 465 #endif 466 target = (tflags & A_f_c_target) ? ((tflags >> 8) & 0xff) : -1; 467 if (target > sc->sc_c.sc_chan.chan_ntargets) target = -1; 468 lun = (tflags & A_f_c_lun) ? ((tflags >> 16) & 0xff) : -1; 469 if (lun > sc->sc_c.sc_chan.chan_nluns) lun = -1; 470 tag = (tflags & A_f_c_tag) ? ((tflags >> 24) & 0xff) : -1; 471 472 if (target >= 0 && lun >= 0) { 473 esiop_target = (struct esiop_target *)sc->sc_c.targets[target]; 474 if (esiop_target == NULL) { 475 printf("esiop_target (target %d) not valid\n", target); 476 goto none; 477 } 478 esiop_lun = esiop_target->esiop_lun[lun]; 479 if (esiop_lun == NULL) { 480 printf("esiop_lun (target %d lun %d) not valid\n", 481 target, lun); 482 goto none; 483 } 484 esiop_cmd = 485 (tag >= 0) ? esiop_lun->tactive[tag] : esiop_lun->active; 486 if (esiop_cmd == NULL) { 487 printf("esiop_cmd (target %d lun %d tag %d) not valid\n", 488 target, lun, tag); 489 goto none; 490 } 491 xs = esiop_cmd->cmd_c.xs; 492 #ifdef DIAGNOSTIC 493 if (esiop_cmd->cmd_c.status != CMDST_ACTIVE) { 494 printf("esiop_cmd (target %d lun %d) " 495 "not active (%d)\n", target, lun, 496 esiop_cmd->cmd_c.status); 497 goto none; 498 } 499 #endif 500 esiop_table_sync(esiop_cmd, 501 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 502 } else { 503 none: 504 xs = NULL; 505 esiop_target = NULL; 506 esiop_lun = NULL; 507 esiop_cmd = NULL; 508 } 509 if (istat & ISTAT_DIP) { 510 dstat = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 511 SIOP_DSTAT); 512 if (dstat & DSTAT_ABRT) { 513 /* was probably generated by a bus reset IOCTL */ 514 if ((dstat & DSTAT_DFE) == 0) 515 siop_clearfifo(&sc->sc_c); 516 goto reset; 517 } 518 if (dstat & DSTAT_SSI) { 519 printf("single step dsp 0x%08x dsa 0x08%x\n", 520 (int)(bus_space_read_4(sc->sc_c.sc_rt, 521 sc->sc_c.sc_rh, SIOP_DSP) - 522 sc->sc_c.sc_scriptaddr), 523 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 524 SIOP_DSA)); 525 if ((dstat & ~(DSTAT_DFE | DSTAT_SSI)) == 0 && 526 (istat & ISTAT_SIP) == 0) { 527 bus_space_write_1(sc->sc_c.sc_rt, 528 sc->sc_c.sc_rh, SIOP_DCNTL, 529 bus_space_read_1(sc->sc_c.sc_rt, 530 sc->sc_c.sc_rh, SIOP_DCNTL) | DCNTL_STD); 531 } 532 return 1; 533 } 534 535 if (dstat & ~(DSTAT_SIR | DSTAT_DFE | DSTAT_SSI)) { 536 printf("%s: DMA IRQ:", sc->sc_c.sc_dev.dv_xname); 537 if (dstat & DSTAT_IID) 538 printf(" Illegal instruction"); 539 if (dstat & DSTAT_BF) 540 printf(" bus fault"); 541 if (dstat & DSTAT_MDPE) 542 printf(" parity"); 543 if (dstat & DSTAT_DFE) 544 printf(" DMA fifo empty"); 545 else 546 siop_clearfifo(&sc->sc_c); 547 printf(", DSP=0x%x DSA=0x%x: ", 548 (int)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 549 SIOP_DSP) - sc->sc_c.sc_scriptaddr), 550 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA)); 551 if (esiop_cmd) 552 printf("T/L/Q=%d/%d/%d last msg_in=0x%x status=0x%x\n", 553 target, lun, tag, esiop_cmd->cmd_tables->msg_in[0], 554 le32toh(esiop_cmd->cmd_tables->status)); 555 else 556 printf(" current T/L/Q invalid\n"); 557 need_reset = 1; 558 } 559 } 560 if (istat & ISTAT_SIP) { 561 if (istat & ISTAT_DIP) 562 delay(10); 563 /* 564 * Can't read sist0 & sist1 independently, or we have to 565 * insert delay 566 */ 567 sist = bus_space_read_2(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 568 SIOP_SIST0); 569 sstat1 = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 570 SIOP_SSTAT1); 571 #ifdef SIOP_DEBUG_INTR 572 printf("scsi interrupt, sist=0x%x sstat1=0x%x " 573 "DSA=0x%x DSP=0x%lx\n", sist, sstat1, 574 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA), 575 (u_long)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 576 SIOP_DSP) - 577 sc->sc_c.sc_scriptaddr)); 578 #endif 579 if (sist & SIST0_RST) { 580 esiop_handle_reset(sc); 581 /* no table to flush here */ 582 return 1; 583 } 584 if (sist & SIST0_SGE) { 585 if (esiop_cmd) 586 scsipi_printaddr(xs->xs_periph); 587 else 588 printf("%s:", sc->sc_c.sc_dev.dv_xname); 589 printf("scsi gross error\n"); 590 if (esiop_target) 591 esiop_target->target_c.flags &= ~TARF_DT; 592 #ifdef DEBUG 593 printf("DSA=0x%x DSP=0x%lx\n", 594 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA), 595 (u_long)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 596 SIOP_DSP) - 597 sc->sc_c.sc_scriptaddr)); 598 printf("SDID 0x%x SCNTL3 0x%x SXFER 0x%x SCNTL4 0x%x\n", 599 bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_SDID), 600 bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_SCNTL3), 601 bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_SXFER), 602 bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_SCNTL4)); 603 604 #endif 605 goto reset; 606 } 607 if ((sist & SIST0_MA) && need_reset == 0) { 608 if (esiop_cmd) { 609 int scratchc0; 610 dstat = bus_space_read_1(sc->sc_c.sc_rt, 611 sc->sc_c.sc_rh, SIOP_DSTAT); 612 /* 613 * first restore DSA, in case we were in a S/G 614 * operation. 615 */ 616 bus_space_write_4(sc->sc_c.sc_rt, 617 sc->sc_c.sc_rh, 618 SIOP_DSA, esiop_cmd->cmd_c.dsa); 619 scratchc0 = bus_space_read_1(sc->sc_c.sc_rt, 620 sc->sc_c.sc_rh, SIOP_SCRATCHC); 621 switch (sstat1 & SSTAT1_PHASE_MASK) { 622 case SSTAT1_PHASE_STATUS: 623 /* 624 * previous phase may be aborted for any reason 625 * ( for example, the target has less data to 626 * transfer than requested). Compute resid and 627 * just go to status, the command should 628 * terminate. 629 */ 630 INCSTAT(esiop_stat_intr_shortxfer); 631 if (scratchc0 & A_f_c_data) 632 siop_ma(&esiop_cmd->cmd_c); 633 else if ((dstat & DSTAT_DFE) == 0) 634 siop_clearfifo(&sc->sc_c); 635 CALL_SCRIPT(Ent_status); 636 return 1; 637 case SSTAT1_PHASE_MSGIN: 638 /* 639 * target may be ready to disconnect 640 * Compute resid which would be used later 641 * if a save data pointer is needed. 642 */ 643 INCSTAT(esiop_stat_intr_xferdisc); 644 if (scratchc0 & A_f_c_data) 645 siop_ma(&esiop_cmd->cmd_c); 646 else if ((dstat & DSTAT_DFE) == 0) 647 siop_clearfifo(&sc->sc_c); 648 bus_space_write_1(sc->sc_c.sc_rt, 649 sc->sc_c.sc_rh, SIOP_SCRATCHC, 650 scratchc0 & ~A_f_c_data); 651 CALL_SCRIPT(Ent_msgin); 652 return 1; 653 } 654 printf("%s: unexpected phase mismatch %d\n", 655 sc->sc_c.sc_dev.dv_xname, 656 sstat1 & SSTAT1_PHASE_MASK); 657 } else { 658 printf("%s: phase mismatch without command\n", 659 sc->sc_c.sc_dev.dv_xname); 660 } 661 need_reset = 1; 662 } 663 if (sist & SIST0_PAR) { 664 /* parity error, reset */ 665 if (esiop_cmd) 666 scsipi_printaddr(xs->xs_periph); 667 else 668 printf("%s:", sc->sc_c.sc_dev.dv_xname); 669 printf("parity error\n"); 670 if (esiop_target) 671 esiop_target->target_c.flags &= ~TARF_DT; 672 goto reset; 673 } 674 if ((sist & (SIST1_STO << 8)) && need_reset == 0) { 675 /* 676 * selection time out, assume there's no device here 677 * We also have to update the ring pointer ourselve 678 */ 679 slot = bus_space_read_1(sc->sc_c.sc_rt, 680 sc->sc_c.sc_rh, SIOP_SCRATCHE); 681 esiop_script_sync(sc, 682 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 683 #ifdef SIOP_DEBUG_SCHED 684 printf("sel timeout target %d, slot %d\n", target, slot); 685 #endif 686 /* 687 * mark this slot as free, and advance to next slot 688 */ 689 esiop_script_write(sc, 690 sc->sc_shedoffset + slot * CMD_SLOTSIZE, 691 A_f_cmd_free); 692 addr = bus_space_read_4(sc->sc_c.sc_rt, 693 sc->sc_c.sc_rh, SIOP_SCRATCHD); 694 if (slot < (A_ncmd_slots - 1)) { 695 bus_space_write_1(sc->sc_c.sc_rt, 696 sc->sc_c.sc_rh, SIOP_SCRATCHE, slot + 1); 697 addr = addr + sizeof(struct esiop_slot); 698 } else { 699 bus_space_write_1(sc->sc_c.sc_rt, 700 sc->sc_c.sc_rh, SIOP_SCRATCHE, 0); 701 addr = sc->sc_c.sc_scriptaddr + 702 sc->sc_shedoffset * sizeof(u_int32_t); 703 } 704 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 705 SIOP_SCRATCHD, addr); 706 esiop_script_sync(sc, 707 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 708 if (esiop_cmd) { 709 esiop_cmd->cmd_c.status = CMDST_DONE; 710 xs->error = XS_SELTIMEOUT; 711 freetarget = 1; 712 goto end; 713 } else { 714 printf("%s: selection timeout without " 715 "command, target %d (sdid 0x%x), " 716 "slot %d\n", 717 sc->sc_c.sc_dev.dv_xname, target, 718 bus_space_read_1(sc->sc_c.sc_rt, 719 sc->sc_c.sc_rh, SIOP_SDID), slot); 720 need_reset = 1; 721 } 722 } 723 if (sist & SIST0_UDC) { 724 /* 725 * unexpected disconnect. Usually the target signals 726 * a fatal condition this way. Attempt to get sense. 727 */ 728 if (esiop_cmd) { 729 esiop_cmd->cmd_tables->status = 730 htole32(SCSI_CHECK); 731 goto end; 732 } 733 printf("%s: unexpected disconnect without " 734 "command\n", sc->sc_c.sc_dev.dv_xname); 735 goto reset; 736 } 737 if (sist & (SIST1_SBMC << 8)) { 738 /* SCSI bus mode change */ 739 if (siop_modechange(&sc->sc_c) == 0 || need_reset == 1) 740 goto reset; 741 if ((istat & ISTAT_DIP) && (dstat & DSTAT_SIR)) { 742 /* 743 * we have a script interrupt, it will 744 * restart the script. 745 */ 746 goto scintr; 747 } 748 /* 749 * else we have to restart it ourselve, at the 750 * interrupted instruction. 751 */ 752 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 753 SIOP_DSP, 754 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 755 SIOP_DSP) - 8); 756 return 1; 757 } 758 /* Else it's an unhandled exception (for now). */ 759 printf("%s: unhandled scsi interrupt, sist=0x%x sstat1=0x%x " 760 "DSA=0x%x DSP=0x%x\n", sc->sc_c.sc_dev.dv_xname, sist, 761 bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 762 SIOP_SSTAT1), 763 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA), 764 (int)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 765 SIOP_DSP) - sc->sc_c.sc_scriptaddr)); 766 if (esiop_cmd) { 767 esiop_cmd->cmd_c.status = CMDST_DONE; 768 xs->error = XS_SELTIMEOUT; 769 goto end; 770 } 771 need_reset = 1; 772 } 773 if (need_reset) { 774 reset: 775 /* fatal error, reset the bus */ 776 siop_resetbus(&sc->sc_c); 777 /* no table to flush here */ 778 return 1; 779 } 780 781 scintr: 782 if ((istat & ISTAT_DIP) && (dstat & DSTAT_SIR)) { /* script interrupt */ 783 irqcode = bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 784 SIOP_DSPS); 785 #ifdef SIOP_DEBUG_INTR 786 printf("script interrupt 0x%x\n", irqcode); 787 #endif 788 /* 789 * no command, or an inactive command is only valid for a 790 * reselect interrupt 791 */ 792 if ((irqcode & 0x80) == 0) { 793 if (esiop_cmd == NULL) { 794 printf( 795 "%s: script interrupt (0x%x) with invalid DSA !!!\n", 796 sc->sc_c.sc_dev.dv_xname, irqcode); 797 goto reset; 798 } 799 if (esiop_cmd->cmd_c.status != CMDST_ACTIVE) { 800 printf("%s: command with invalid status " 801 "(IRQ code 0x%x current status %d) !\n", 802 sc->sc_c.sc_dev.dv_xname, 803 irqcode, esiop_cmd->cmd_c.status); 804 xs = NULL; 805 } 806 } 807 switch(irqcode) { 808 case A_int_err: 809 printf("error, DSP=0x%x\n", 810 (int)(bus_space_read_4(sc->sc_c.sc_rt, 811 sc->sc_c.sc_rh, SIOP_DSP) - sc->sc_c.sc_scriptaddr)); 812 if (xs) { 813 xs->error = XS_SELTIMEOUT; 814 goto end; 815 } else { 816 goto reset; 817 } 818 case A_int_msgin: 819 { 820 int msgin = bus_space_read_1(sc->sc_c.sc_rt, 821 sc->sc_c.sc_rh, SIOP_SFBR); 822 if (msgin == MSG_MESSAGE_REJECT) { 823 int msg, extmsg; 824 if (esiop_cmd->cmd_tables->msg_out[0] & 0x80) { 825 /* 826 * message was part of a identify + 827 * something else. Identify shouldn't 828 * have been rejected. 829 */ 830 msg = 831 esiop_cmd->cmd_tables->msg_out[1]; 832 extmsg = 833 esiop_cmd->cmd_tables->msg_out[3]; 834 } else { 835 msg = 836 esiop_cmd->cmd_tables->msg_out[0]; 837 extmsg = 838 esiop_cmd->cmd_tables->msg_out[2]; 839 } 840 if (msg == MSG_MESSAGE_REJECT) { 841 /* MSG_REJECT for a MSG_REJECT !*/ 842 if (xs) 843 scsipi_printaddr(xs->xs_periph); 844 else 845 printf("%s: ", 846 sc->sc_c.sc_dev.dv_xname); 847 printf("our reject message was " 848 "rejected\n"); 849 goto reset; 850 } 851 if (msg == MSG_EXTENDED && 852 extmsg == MSG_EXT_WDTR) { 853 /* WDTR rejected, initiate sync */ 854 if ((esiop_target->target_c.flags & 855 TARF_SYNC) == 0) { 856 esiop_target->target_c.status = 857 TARST_OK; 858 siop_update_xfer_mode(&sc->sc_c, 859 target); 860 /* no table to flush here */ 861 CALL_SCRIPT(Ent_msgin_ack); 862 return 1; 863 } 864 esiop_target->target_c.status = 865 TARST_SYNC_NEG; 866 siop_sdtr_msg(&esiop_cmd->cmd_c, 0, 867 sc->sc_c.st_minsync, 868 sc->sc_c.maxoff); 869 esiop_table_sync(esiop_cmd, 870 BUS_DMASYNC_PREREAD | 871 BUS_DMASYNC_PREWRITE); 872 CALL_SCRIPT(Ent_send_msgout); 873 return 1; 874 } else if (msg == MSG_EXTENDED && 875 extmsg == MSG_EXT_SDTR) { 876 /* sync rejected */ 877 esiop_target->target_c.offset = 0; 878 esiop_target->target_c.period = 0; 879 esiop_target->target_c.status = 880 TARST_OK; 881 siop_update_xfer_mode(&sc->sc_c, 882 target); 883 /* no table to flush here */ 884 CALL_SCRIPT(Ent_msgin_ack); 885 return 1; 886 } else if (msg == MSG_EXTENDED && 887 extmsg == MSG_EXT_PPR) { 888 /* PPR rejected */ 889 esiop_target->target_c.offset = 0; 890 esiop_target->target_c.period = 0; 891 esiop_target->target_c.status = 892 TARST_OK; 893 siop_update_xfer_mode(&sc->sc_c, 894 target); 895 /* no table to flush here */ 896 CALL_SCRIPT(Ent_msgin_ack); 897 return 1; 898 } else if (msg == MSG_SIMPLE_Q_TAG || 899 msg == MSG_HEAD_OF_Q_TAG || 900 msg == MSG_ORDERED_Q_TAG) { 901 if (esiop_handle_qtag_reject( 902 esiop_cmd) == -1) 903 goto reset; 904 CALL_SCRIPT(Ent_msgin_ack); 905 return 1; 906 } 907 if (xs) 908 scsipi_printaddr(xs->xs_periph); 909 else 910 printf("%s: ", 911 sc->sc_c.sc_dev.dv_xname); 912 if (msg == MSG_EXTENDED) { 913 printf("scsi message reject, extended " 914 "message sent was 0x%x\n", extmsg); 915 } else { 916 printf("scsi message reject, message " 917 "sent was 0x%x\n", msg); 918 } 919 /* no table to flush here */ 920 CALL_SCRIPT(Ent_msgin_ack); 921 return 1; 922 } 923 if (msgin == MSG_IGN_WIDE_RESIDUE) { 924 /* use the extmsgdata table to get the second byte */ 925 esiop_cmd->cmd_tables->t_extmsgdata.count = 926 htole32(1); 927 esiop_table_sync(esiop_cmd, 928 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 929 CALL_SCRIPT(Ent_get_extmsgdata); 930 return 1; 931 } 932 if (xs) 933 scsipi_printaddr(xs->xs_periph); 934 else 935 printf("%s: ", sc->sc_c.sc_dev.dv_xname); 936 printf("unhandled message 0x%x\n", msgin); 937 esiop_cmd->cmd_tables->msg_out[0] = MSG_MESSAGE_REJECT; 938 esiop_cmd->cmd_tables->t_msgout.count= htole32(1); 939 esiop_table_sync(esiop_cmd, 940 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 941 CALL_SCRIPT(Ent_send_msgout); 942 return 1; 943 } 944 case A_int_extmsgin: 945 #ifdef SIOP_DEBUG_INTR 946 printf("extended message: msg 0x%x len %d\n", 947 esiop_cmd->cmd_tables->msg_in[2], 948 esiop_cmd->cmd_tables->msg_in[1]); 949 #endif 950 if (esiop_cmd->cmd_tables->msg_in[1] > 951 sizeof(esiop_cmd->cmd_tables->msg_in) - 2) 952 printf("%s: extended message too big (%d)\n", 953 sc->sc_c.sc_dev.dv_xname, 954 esiop_cmd->cmd_tables->msg_in[1]); 955 esiop_cmd->cmd_tables->t_extmsgdata.count = 956 htole32(esiop_cmd->cmd_tables->msg_in[1] - 1); 957 esiop_table_sync(esiop_cmd, 958 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 959 CALL_SCRIPT(Ent_get_extmsgdata); 960 return 1; 961 case A_int_extmsgdata: 962 #ifdef SIOP_DEBUG_INTR 963 { 964 int i; 965 printf("extended message: 0x%x, data:", 966 esiop_cmd->cmd_tables->msg_in[2]); 967 for (i = 3; i < 2 + esiop_cmd->cmd_tables->msg_in[1]; 968 i++) 969 printf(" 0x%x", 970 esiop_cmd->cmd_tables->msg_in[i]); 971 printf("\n"); 972 } 973 #endif 974 if (esiop_cmd->cmd_tables->msg_in[0] == 975 MSG_IGN_WIDE_RESIDUE) { 976 /* we got the second byte of MSG_IGN_WIDE_RESIDUE */ 977 if (esiop_cmd->cmd_tables->msg_in[3] != 1) 978 printf("MSG_IGN_WIDE_RESIDUE: " 979 "bad len %d\n", 980 esiop_cmd->cmd_tables->msg_in[3]); 981 switch (siop_iwr(&esiop_cmd->cmd_c)) { 982 case SIOP_NEG_MSGOUT: 983 esiop_table_sync(esiop_cmd, 984 BUS_DMASYNC_PREREAD | 985 BUS_DMASYNC_PREWRITE); 986 CALL_SCRIPT(Ent_send_msgout); 987 return 1; 988 case SIOP_NEG_ACK: 989 CALL_SCRIPT(Ent_msgin_ack); 990 return 1; 991 default: 992 panic("invalid retval from " 993 "siop_iwr()"); 994 } 995 return 1; 996 } 997 if (esiop_cmd->cmd_tables->msg_in[2] == MSG_EXT_PPR) { 998 switch (siop_ppr_neg(&esiop_cmd->cmd_c)) { 999 case SIOP_NEG_MSGOUT: 1000 esiop_update_scntl3(sc, 1001 esiop_cmd->cmd_c.siop_target); 1002 esiop_table_sync(esiop_cmd, 1003 BUS_DMASYNC_PREREAD | 1004 BUS_DMASYNC_PREWRITE); 1005 CALL_SCRIPT(Ent_send_msgout); 1006 return 1; 1007 case SIOP_NEG_ACK: 1008 esiop_update_scntl3(sc, 1009 esiop_cmd->cmd_c.siop_target); 1010 CALL_SCRIPT(Ent_msgin_ack); 1011 return 1; 1012 default: 1013 panic("invalid retval from " 1014 "siop_wdtr_neg()"); 1015 } 1016 return 1; 1017 } 1018 if (esiop_cmd->cmd_tables->msg_in[2] == MSG_EXT_WDTR) { 1019 switch (siop_wdtr_neg(&esiop_cmd->cmd_c)) { 1020 case SIOP_NEG_MSGOUT: 1021 esiop_update_scntl3(sc, 1022 esiop_cmd->cmd_c.siop_target); 1023 esiop_table_sync(esiop_cmd, 1024 BUS_DMASYNC_PREREAD | 1025 BUS_DMASYNC_PREWRITE); 1026 CALL_SCRIPT(Ent_send_msgout); 1027 return 1; 1028 case SIOP_NEG_ACK: 1029 esiop_update_scntl3(sc, 1030 esiop_cmd->cmd_c.siop_target); 1031 CALL_SCRIPT(Ent_msgin_ack); 1032 return 1; 1033 default: 1034 panic("invalid retval from " 1035 "siop_wdtr_neg()"); 1036 } 1037 return 1; 1038 } 1039 if (esiop_cmd->cmd_tables->msg_in[2] == MSG_EXT_SDTR) { 1040 switch (siop_sdtr_neg(&esiop_cmd->cmd_c)) { 1041 case SIOP_NEG_MSGOUT: 1042 esiop_update_scntl3(sc, 1043 esiop_cmd->cmd_c.siop_target); 1044 esiop_table_sync(esiop_cmd, 1045 BUS_DMASYNC_PREREAD | 1046 BUS_DMASYNC_PREWRITE); 1047 CALL_SCRIPT(Ent_send_msgout); 1048 return 1; 1049 case SIOP_NEG_ACK: 1050 esiop_update_scntl3(sc, 1051 esiop_cmd->cmd_c.siop_target); 1052 CALL_SCRIPT(Ent_msgin_ack); 1053 return 1; 1054 default: 1055 panic("invalid retval from " 1056 "siop_wdtr_neg()"); 1057 } 1058 return 1; 1059 } 1060 /* send a message reject */ 1061 esiop_cmd->cmd_tables->msg_out[0] = MSG_MESSAGE_REJECT; 1062 esiop_cmd->cmd_tables->t_msgout.count = htole32(1); 1063 esiop_table_sync(esiop_cmd, 1064 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1065 CALL_SCRIPT(Ent_send_msgout); 1066 return 1; 1067 case A_int_disc: 1068 INCSTAT(esiop_stat_intr_sdp); 1069 offset = bus_space_read_1(sc->sc_c.sc_rt, 1070 sc->sc_c.sc_rh, SIOP_SCRATCHA + 1); 1071 #ifdef SIOP_DEBUG_DR 1072 printf("disconnect offset %d\n", offset); 1073 #endif 1074 siop_sdp(&esiop_cmd->cmd_c, offset); 1075 esiop_table_sync(esiop_cmd, 1076 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1077 CALL_SCRIPT(Ent_script_sched); 1078 return 1; 1079 case A_int_resfail: 1080 printf("reselect failed\n"); 1081 CALL_SCRIPT(Ent_script_sched); 1082 return 1; 1083 case A_int_done: 1084 if (xs == NULL) { 1085 printf("%s: done without command\n", 1086 sc->sc_c.sc_dev.dv_xname); 1087 CALL_SCRIPT(Ent_script_sched); 1088 return 1; 1089 } 1090 #ifdef SIOP_DEBUG_INTR 1091 printf("done, DSA=0x%lx target id 0x%x last msg " 1092 "in=0x%x status=0x%x\n", (u_long)esiop_cmd->cmd_c.dsa, 1093 le32toh(esiop_cmd->cmd_tables->id), 1094 esiop_cmd->cmd_tables->msg_in[0], 1095 le32toh(esiop_cmd->cmd_tables->status)); 1096 #endif 1097 INCSTAT(esiop_stat_intr_done); 1098 esiop_cmd->cmd_c.status = CMDST_DONE; 1099 goto end; 1100 default: 1101 printf("unknown irqcode %x\n", irqcode); 1102 if (xs) { 1103 xs->error = XS_SELTIMEOUT; 1104 goto end; 1105 } 1106 goto reset; 1107 } 1108 return 1; 1109 } 1110 /* We just should't get there */ 1111 panic("siop_intr: I shouldn't be there !"); 1112 1113 end: 1114 /* 1115 * restart the script now if command completed properly 1116 * Otherwise wait for siop_scsicmd_end(), we may need to cleanup the 1117 * queue 1118 */ 1119 xs->status = le32toh(esiop_cmd->cmd_tables->status); 1120 #ifdef SIOP_DEBUG_INTR 1121 printf("esiop_intr end: status %d\n", xs->status); 1122 #endif 1123 if (tag >= 0) 1124 esiop_lun->tactive[tag] = NULL; 1125 else 1126 esiop_lun->active = NULL; 1127 offset = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 1128 SIOP_SCRATCHA + 1); 1129 esiop_scsicmd_end(esiop_cmd, offset); 1130 if (freetarget && esiop_target->target_c.status == TARST_PROBING) 1131 esiop_del_dev(sc, target, lun); 1132 CALL_SCRIPT(Ent_script_sched); 1133 return 1; 1134 } 1135 1136 void 1137 esiop_scsicmd_end(esiop_cmd, offset) 1138 struct esiop_cmd *esiop_cmd; 1139 int offset; 1140 { 1141 struct scsipi_xfer *xs = esiop_cmd->cmd_c.xs; 1142 struct esiop_softc *sc = (struct esiop_softc *)esiop_cmd->cmd_c.siop_sc; 1143 1144 siop_update_resid(&esiop_cmd->cmd_c, offset); 1145 1146 switch(xs->status) { 1147 case SCSI_OK: 1148 xs->error = XS_NOERROR; 1149 break; 1150 case SCSI_BUSY: 1151 xs->error = XS_BUSY; 1152 break; 1153 case SCSI_CHECK: 1154 xs->error = XS_BUSY; 1155 /* remove commands in the queue and scheduler */ 1156 esiop_unqueue(sc, xs->xs_periph->periph_target, 1157 xs->xs_periph->periph_lun); 1158 break; 1159 case SCSI_QUEUE_FULL: 1160 INCSTAT(esiop_stat_intr_qfull); 1161 #ifdef SIOP_DEBUG 1162 printf("%s:%d:%d: queue full (tag %d)\n", 1163 sc->sc_c.sc_dev.dv_xname, 1164 xs->xs_periph->periph_target, 1165 xs->xs_periph->periph_lun, esiop_cmd->cmd_c.tag); 1166 #endif 1167 xs->error = XS_BUSY; 1168 break; 1169 case SCSI_SIOP_NOCHECK: 1170 /* 1171 * don't check status, xs->error is already valid 1172 */ 1173 break; 1174 case SCSI_SIOP_NOSTATUS: 1175 /* 1176 * the status byte was not updated, cmd was 1177 * aborted 1178 */ 1179 xs->error = XS_SELTIMEOUT; 1180 break; 1181 default: 1182 scsipi_printaddr(xs->xs_periph); 1183 printf("invalid status code %d\n", xs->status); 1184 xs->error = XS_DRIVER_STUFFUP; 1185 } 1186 if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) { 1187 bus_dmamap_sync(sc->sc_c.sc_dmat, 1188 esiop_cmd->cmd_c.dmamap_data, 0, 1189 esiop_cmd->cmd_c.dmamap_data->dm_mapsize, 1190 (xs->xs_control & XS_CTL_DATA_IN) ? 1191 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1192 bus_dmamap_unload(sc->sc_c.sc_dmat, 1193 esiop_cmd->cmd_c.dmamap_data); 1194 } 1195 bus_dmamap_unload(sc->sc_c.sc_dmat, esiop_cmd->cmd_c.dmamap_cmd); 1196 callout_stop(&esiop_cmd->cmd_c.xs->xs_callout); 1197 esiop_cmd->cmd_c.status = CMDST_FREE; 1198 TAILQ_INSERT_TAIL(&sc->free_list, esiop_cmd, next); 1199 #if 0 1200 if (xs->resid != 0) 1201 printf("resid %d datalen %d\n", xs->resid, xs->datalen); 1202 #endif 1203 scsipi_done (xs); 1204 } 1205 1206 void 1207 esiop_checkdone(sc) 1208 struct esiop_softc *sc; 1209 { 1210 int target, lun, tag; 1211 struct esiop_target *esiop_target; 1212 struct esiop_lun *esiop_lun; 1213 struct esiop_cmd *esiop_cmd; 1214 u_int32_t slot; 1215 int needsync = 0; 1216 int status; 1217 u_int32_t sem; 1218 1219 esiop_script_sync(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1220 sem = esiop_script_read(sc, sc->sc_semoffset); 1221 esiop_script_write(sc, sc->sc_semoffset, sem & ~A_sem_done); 1222 if ((sc->sc_flags & SCF_CHAN_NOSLOT) && (sem & A_sem_start)) { 1223 /* 1224 * at last one command have been started, 1225 * so we should have free slots now 1226 */ 1227 sc->sc_flags &= ~SCF_CHAN_NOSLOT; 1228 scsipi_channel_thaw(&sc->sc_c.sc_chan, 1); 1229 } 1230 esiop_script_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1231 1232 if ((sem & A_sem_done) == 0) { 1233 /* no pending done command */ 1234 return; 1235 } 1236 1237 bus_dmamap_sync(sc->sc_c.sc_dmat, sc->sc_done_map, 1238 sc->sc_done_offset, A_ndone_slots * sizeof(u_int32_t), 1239 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1240 next: 1241 if (sc->sc_done_slot[sc->sc_currdoneslot] == 0) { 1242 if (needsync) 1243 bus_dmamap_sync(sc->sc_c.sc_dmat, sc->sc_done_map, 1244 sc->sc_done_offset, 1245 A_ndone_slots * sizeof(u_int32_t), 1246 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1247 return; 1248 } 1249 1250 needsync = 1; 1251 1252 slot = htole32(sc->sc_done_slot[sc->sc_currdoneslot]); 1253 sc->sc_done_slot[sc->sc_currdoneslot] = 0; 1254 sc->sc_currdoneslot += 1; 1255 if (sc->sc_currdoneslot == A_ndone_slots) 1256 sc->sc_currdoneslot = 0; 1257 1258 target = (slot & A_f_c_target) ? (slot >> 8) & 0xff : -1; 1259 lun = (slot & A_f_c_lun) ? (slot >> 16) & 0xff : -1; 1260 tag = (slot & A_f_c_tag) ? (slot >> 24) & 0xff : -1; 1261 1262 esiop_target = (target >= 0) ? 1263 (struct esiop_target *)sc->sc_c.targets[target] : NULL; 1264 if (esiop_target == NULL) { 1265 printf("esiop_target (target %d) not valid\n", target); 1266 goto next; 1267 } 1268 esiop_lun = (lun >= 0) ? esiop_target->esiop_lun[lun] : NULL; 1269 if (esiop_lun == NULL) { 1270 printf("esiop_lun (target %d lun %d) not valid\n", 1271 target, lun); 1272 goto next; 1273 } 1274 esiop_cmd = (tag >= 0) ? esiop_lun->tactive[tag] : esiop_lun->active; 1275 if (esiop_cmd == NULL) { 1276 printf("esiop_cmd (target %d lun %d tag %d) not valid\n", 1277 target, lun, tag); 1278 goto next; 1279 } 1280 1281 esiop_table_sync(esiop_cmd, 1282 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1283 status = le32toh(esiop_cmd->cmd_tables->status); 1284 #ifdef DIAGNOSTIC 1285 if (status != SCSI_OK) { 1286 printf("command for T/L/Q %d/%d/%d status %d\n", 1287 target, lun, tag, status); 1288 goto next; 1289 } 1290 1291 #endif 1292 /* Ok, this command has been handled */ 1293 esiop_cmd->cmd_c.xs->status = status; 1294 if (tag >= 0) 1295 esiop_lun->tactive[tag] = NULL; 1296 else 1297 esiop_lun->active = NULL; 1298 /* scratcha was saved in tlq by script. fetch offset from it */ 1299 esiop_scsicmd_end(esiop_cmd, 1300 (le32toh(((struct esiop_xfer *)esiop_cmd->cmd_tables)->tlq) >> 8) 1301 & 0xff); 1302 goto next; 1303 } 1304 1305 void 1306 esiop_unqueue(sc, target, lun) 1307 struct esiop_softc *sc; 1308 int target; 1309 int lun; 1310 { 1311 int slot, tag; 1312 u_int32_t slotdsa; 1313 struct esiop_cmd *esiop_cmd; 1314 struct esiop_lun *esiop_lun = 1315 ((struct esiop_target *)sc->sc_c.targets[target])->esiop_lun[lun]; 1316 1317 /* first make sure to read valid data */ 1318 esiop_script_sync(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1319 1320 for (tag = 0; tag < ESIOP_NTAG; tag++) { 1321 /* look for commands in the scheduler, not yet started */ 1322 if (esiop_lun->tactive[tag] == NULL) 1323 continue; 1324 esiop_cmd = esiop_lun->tactive[tag]; 1325 for (slot = 0; slot < A_ncmd_slots; slot++) { 1326 slotdsa = esiop_script_read(sc, 1327 sc->sc_shedoffset + slot * CMD_SLOTSIZE); 1328 /* if the slot has any flag, it won't match the DSA */ 1329 if (slotdsa == esiop_cmd->cmd_c.dsa) { /* found it */ 1330 /* Mark this slot as ignore */ 1331 esiop_script_write(sc, 1332 sc->sc_shedoffset + slot * CMD_SLOTSIZE, 1333 esiop_cmd->cmd_c.dsa | A_f_cmd_ignore); 1334 /* ask to requeue */ 1335 esiop_cmd->cmd_c.xs->error = XS_REQUEUE; 1336 esiop_cmd->cmd_c.xs->status = SCSI_SIOP_NOCHECK; 1337 esiop_lun->tactive[tag] = NULL; 1338 esiop_scsicmd_end(esiop_cmd, 0); 1339 break; 1340 } 1341 } 1342 } 1343 esiop_script_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1344 } 1345 1346 /* 1347 * handle a rejected queue tag message: the command will run untagged, 1348 * has to adjust the reselect script. 1349 */ 1350 1351 1352 int 1353 esiop_handle_qtag_reject(esiop_cmd) 1354 struct esiop_cmd *esiop_cmd; 1355 { 1356 struct esiop_softc *sc = (struct esiop_softc *)esiop_cmd->cmd_c.siop_sc; 1357 int target = esiop_cmd->cmd_c.xs->xs_periph->periph_target; 1358 int lun = esiop_cmd->cmd_c.xs->xs_periph->periph_lun; 1359 int tag = esiop_cmd->cmd_tables->msg_out[2]; 1360 struct esiop_target *esiop_target = 1361 (struct esiop_target*)sc->sc_c.targets[target]; 1362 struct esiop_lun *esiop_lun = esiop_target->esiop_lun[lun]; 1363 1364 #ifdef SIOP_DEBUG 1365 printf("%s:%d:%d: tag message %d (%d) rejected (status %d)\n", 1366 sc->sc_c.sc_dev.dv_xname, target, lun, tag, esiop_cmd->cmd_c.tag, 1367 esiop_cmd->cmd_c.status); 1368 #endif 1369 1370 if (esiop_lun->active != NULL) { 1371 printf("%s: untagged command already running for target %d " 1372 "lun %d (status %d)\n", sc->sc_c.sc_dev.dv_xname, 1373 target, lun, esiop_lun->active->cmd_c.status); 1374 return -1; 1375 } 1376 /* clear tag slot */ 1377 esiop_lun->tactive[tag] = NULL; 1378 /* add command to non-tagged slot */ 1379 esiop_lun->active = esiop_cmd; 1380 esiop_cmd->cmd_c.flags &= ~CMDFL_TAG; 1381 esiop_cmd->cmd_c.tag = -1; 1382 /* update DSA table */ 1383 esiop_script_write(sc, esiop_target->lun_table_offset + 1384 lun * 2 + A_target_luntbl / sizeof(u_int32_t), 1385 esiop_cmd->cmd_c.dsa); 1386 esiop_script_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1387 return 0; 1388 } 1389 1390 /* 1391 * handle a bus reset: reset chip, unqueue all active commands, free all 1392 * target struct and report lossage to upper layer. 1393 * As the upper layer may requeue immediatly we have to first store 1394 * all active commands in a temporary queue. 1395 */ 1396 void 1397 esiop_handle_reset(sc) 1398 struct esiop_softc *sc; 1399 { 1400 struct esiop_cmd *esiop_cmd; 1401 struct esiop_lun *esiop_lun; 1402 int target, lun, tag; 1403 /* 1404 * scsi bus reset. reset the chip and restart 1405 * the queue. Need to clean up all active commands 1406 */ 1407 printf("%s: scsi bus reset\n", sc->sc_c.sc_dev.dv_xname); 1408 /* stop, reset and restart the chip */ 1409 esiop_reset(sc); 1410 1411 if (sc->sc_flags & SCF_CHAN_NOSLOT) { 1412 /* chip has been reset, all slots are free now */ 1413 sc->sc_flags &= ~SCF_CHAN_NOSLOT; 1414 scsipi_channel_thaw(&sc->sc_c.sc_chan, 1); 1415 } 1416 /* 1417 * Process all commands: first commands completes, then commands 1418 * being executed 1419 */ 1420 esiop_checkdone(sc); 1421 for (target = 0; target < sc->sc_c.sc_chan.chan_ntargets; 1422 target++) { 1423 struct esiop_target *esiop_target = 1424 (struct esiop_target *)sc->sc_c.targets[target]; 1425 if (esiop_target == NULL) 1426 continue; 1427 for (lun = 0; lun < 8; lun++) { 1428 esiop_lun = esiop_target->esiop_lun[lun]; 1429 if (esiop_lun == NULL) 1430 continue; 1431 for (tag = -1; tag < 1432 ((sc->sc_c.targets[target]->flags & TARF_TAG) ? 1433 ESIOP_NTAG : 0); 1434 tag++) { 1435 if (tag >= 0) 1436 esiop_cmd = esiop_lun->tactive[tag]; 1437 else 1438 esiop_cmd = esiop_lun->active; 1439 if (esiop_cmd == NULL) 1440 continue; 1441 scsipi_printaddr(esiop_cmd->cmd_c.xs->xs_periph); 1442 printf("command with tag id %d reset\n", tag); 1443 esiop_cmd->cmd_c.xs->error = 1444 (esiop_cmd->cmd_c.flags & CMDFL_TIMEOUT) ? 1445 XS_TIMEOUT : XS_RESET; 1446 esiop_cmd->cmd_c.xs->status = SCSI_SIOP_NOCHECK; 1447 if (tag >= 0) 1448 esiop_lun->tactive[tag] = NULL; 1449 else 1450 esiop_lun->active = NULL; 1451 esiop_cmd->cmd_c.status = CMDST_DONE; 1452 esiop_scsicmd_end(esiop_cmd, 0); 1453 } 1454 } 1455 sc->sc_c.targets[target]->status = TARST_ASYNC; 1456 sc->sc_c.targets[target]->flags &= ~(TARF_ISWIDE | TARF_ISDT); 1457 sc->sc_c.targets[target]->period = 1458 sc->sc_c.targets[target]->offset = 0; 1459 siop_update_xfer_mode(&sc->sc_c, target); 1460 } 1461 1462 scsipi_async_event(&sc->sc_c.sc_chan, ASYNC_EVENT_RESET, NULL); 1463 } 1464 1465 void 1466 esiop_scsipi_request(chan, req, arg) 1467 struct scsipi_channel *chan; 1468 scsipi_adapter_req_t req; 1469 void *arg; 1470 { 1471 struct scsipi_xfer *xs; 1472 struct scsipi_periph *periph; 1473 struct esiop_softc *sc = (void *)chan->chan_adapter->adapt_dev; 1474 struct esiop_cmd *esiop_cmd; 1475 struct esiop_target *esiop_target; 1476 int s, error, i; 1477 int target; 1478 int lun; 1479 1480 switch (req) { 1481 case ADAPTER_REQ_RUN_XFER: 1482 xs = arg; 1483 periph = xs->xs_periph; 1484 target = periph->periph_target; 1485 lun = periph->periph_lun; 1486 1487 s = splbio(); 1488 /* 1489 * first check if there are pending complete commands. 1490 * this can free us some resources (in the rings for example). 1491 * we have to lock it to avoid recursion. 1492 */ 1493 if ((sc->sc_flags & SCF_CHAN_ADAPTREQ) == 0) { 1494 sc->sc_flags |= SCF_CHAN_ADAPTREQ; 1495 esiop_checkdone(sc); 1496 sc->sc_flags &= ~SCF_CHAN_ADAPTREQ; 1497 } 1498 #ifdef SIOP_DEBUG_SCHED 1499 printf("starting cmd for %d:%d tag %d(%d)\n", target, lun, 1500 xs->xs_tag_type, xs->xs_tag_id); 1501 #endif 1502 esiop_cmd = TAILQ_FIRST(&sc->free_list); 1503 if (esiop_cmd == NULL) { 1504 xs->error = XS_RESOURCE_SHORTAGE; 1505 scsipi_done(xs); 1506 splx(s); 1507 return; 1508 } 1509 TAILQ_REMOVE(&sc->free_list, esiop_cmd, next); 1510 #ifdef DIAGNOSTIC 1511 if (esiop_cmd->cmd_c.status != CMDST_FREE) 1512 panic("siop_scsicmd: new cmd not free"); 1513 #endif 1514 esiop_target = (struct esiop_target*)sc->sc_c.targets[target]; 1515 if (esiop_target == NULL) { 1516 #ifdef SIOP_DEBUG 1517 printf("%s: alloc siop_target for target %d\n", 1518 sc->sc_c.sc_dev.dv_xname, target); 1519 #endif 1520 sc->sc_c.targets[target] = 1521 malloc(sizeof(struct esiop_target), 1522 M_DEVBUF, M_NOWAIT | M_ZERO); 1523 if (sc->sc_c.targets[target] == NULL) { 1524 printf("%s: can't malloc memory for " 1525 "target %d\n", sc->sc_c.sc_dev.dv_xname, 1526 target); 1527 xs->error = XS_RESOURCE_SHORTAGE; 1528 scsipi_done(xs); 1529 splx(s); 1530 return; 1531 } 1532 esiop_target = 1533 (struct esiop_target*)sc->sc_c.targets[target]; 1534 esiop_target->target_c.status = TARST_PROBING; 1535 esiop_target->target_c.flags = 0; 1536 esiop_target->target_c.id = 1537 sc->sc_c.clock_div << 24; /* scntl3 */ 1538 esiop_target->target_c.id |= target << 16; /* id */ 1539 /* esiop_target->target_c.id |= 0x0 << 8; scxfer is 0 */ 1540 1541 for (i=0; i < 8; i++) 1542 esiop_target->esiop_lun[i] = NULL; 1543 esiop_target_register(sc, target); 1544 } 1545 if (esiop_target->esiop_lun[lun] == NULL) { 1546 esiop_target->esiop_lun[lun] = 1547 malloc(sizeof(struct esiop_lun), M_DEVBUF, 1548 M_NOWAIT|M_ZERO); 1549 if (esiop_target->esiop_lun[lun] == NULL) { 1550 printf("%s: can't alloc esiop_lun for " 1551 "target %d lun %d\n", 1552 sc->sc_c.sc_dev.dv_xname, target, lun); 1553 xs->error = XS_RESOURCE_SHORTAGE; 1554 scsipi_done(xs); 1555 splx(s); 1556 return; 1557 } 1558 } 1559 esiop_cmd->cmd_c.siop_target = sc->sc_c.targets[target]; 1560 esiop_cmd->cmd_c.xs = xs; 1561 esiop_cmd->cmd_c.flags = 0; 1562 esiop_cmd->cmd_c.status = CMDST_READY; 1563 1564 /* load the DMA maps */ 1565 error = bus_dmamap_load(sc->sc_c.sc_dmat, 1566 esiop_cmd->cmd_c.dmamap_cmd, 1567 xs->cmd, xs->cmdlen, NULL, BUS_DMA_NOWAIT); 1568 if (error) { 1569 printf("%s: unable to load cmd DMA map: %d\n", 1570 sc->sc_c.sc_dev.dv_xname, error); 1571 xs->error = XS_DRIVER_STUFFUP; 1572 scsipi_done(xs); 1573 splx(s); 1574 return; 1575 } 1576 if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) { 1577 error = bus_dmamap_load(sc->sc_c.sc_dmat, 1578 esiop_cmd->cmd_c.dmamap_data, xs->data, xs->datalen, 1579 NULL, BUS_DMA_NOWAIT | BUS_DMA_STREAMING | 1580 ((xs->xs_control & XS_CTL_DATA_IN) ? 1581 BUS_DMA_READ : BUS_DMA_WRITE)); 1582 if (error) { 1583 printf("%s: unable to load cmd DMA map: %d", 1584 sc->sc_c.sc_dev.dv_xname, error); 1585 xs->error = XS_DRIVER_STUFFUP; 1586 scsipi_done(xs); 1587 bus_dmamap_unload(sc->sc_c.sc_dmat, 1588 esiop_cmd->cmd_c.dmamap_cmd); 1589 splx(s); 1590 return; 1591 } 1592 bus_dmamap_sync(sc->sc_c.sc_dmat, 1593 esiop_cmd->cmd_c.dmamap_data, 0, 1594 esiop_cmd->cmd_c.dmamap_data->dm_mapsize, 1595 (xs->xs_control & XS_CTL_DATA_IN) ? 1596 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1597 } 1598 bus_dmamap_sync(sc->sc_c.sc_dmat, esiop_cmd->cmd_c.dmamap_cmd, 1599 0, esiop_cmd->cmd_c.dmamap_cmd->dm_mapsize, 1600 BUS_DMASYNC_PREWRITE); 1601 1602 if (xs->xs_tag_type) 1603 esiop_cmd->cmd_c.tag = xs->xs_tag_id; 1604 else 1605 esiop_cmd->cmd_c.tag = -1; 1606 siop_setuptables(&esiop_cmd->cmd_c); 1607 ((struct esiop_xfer *)esiop_cmd->cmd_tables)->tlq = 1608 htole32(A_f_c_target | A_f_c_lun); 1609 ((struct esiop_xfer *)esiop_cmd->cmd_tables)->tlq |= 1610 htole32((target << 8) | (lun << 16)); 1611 if (esiop_cmd->cmd_c.flags & CMDFL_TAG) { 1612 ((struct esiop_xfer *)esiop_cmd->cmd_tables)->tlq |= 1613 htole32(A_f_c_tag); 1614 ((struct esiop_xfer *)esiop_cmd->cmd_tables)->tlq |= 1615 htole32(esiop_cmd->cmd_c.tag << 24); 1616 } 1617 1618 esiop_table_sync(esiop_cmd, 1619 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1620 esiop_start(sc, esiop_cmd); 1621 if (xs->xs_control & XS_CTL_POLL) { 1622 /* poll for command completion */ 1623 while ((xs->xs_status & XS_STS_DONE) == 0) { 1624 delay(1000); 1625 esiop_intr(sc); 1626 } 1627 } 1628 splx(s); 1629 return; 1630 1631 case ADAPTER_REQ_GROW_RESOURCES: 1632 #ifdef SIOP_DEBUG 1633 printf("%s grow resources (%d)\n", sc->sc_c.sc_dev.dv_xname, 1634 sc->sc_c.sc_adapt.adapt_openings); 1635 #endif 1636 esiop_morecbd(sc); 1637 return; 1638 1639 case ADAPTER_REQ_SET_XFER_MODE: 1640 { 1641 struct scsipi_xfer_mode *xm = arg; 1642 if (sc->sc_c.targets[xm->xm_target] == NULL) 1643 return; 1644 s = splbio(); 1645 if ((xm->xm_mode & PERIPH_CAP_TQING) && 1646 (sc->sc_c.targets[xm->xm_target]->flags & TARF_TAG) == 0) { 1647 sc->sc_c.targets[xm->xm_target]->flags |= TARF_TAG; 1648 /* allocate tag tables for this device */ 1649 for (lun = 0; 1650 lun < sc->sc_c.sc_chan.chan_nluns; lun++) { 1651 if (scsipi_lookup_periph(chan, 1652 xm->xm_target, lun) != NULL) 1653 esiop_add_dev(sc, xm->xm_target, lun); 1654 } 1655 } 1656 if ((xm->xm_mode & PERIPH_CAP_WIDE16) && 1657 (sc->sc_c.features & SF_BUS_WIDE)) 1658 sc->sc_c.targets[xm->xm_target]->flags |= TARF_WIDE; 1659 if (xm->xm_mode & PERIPH_CAP_SYNC) 1660 sc->sc_c.targets[xm->xm_target]->flags |= TARF_SYNC; 1661 if ((xm->xm_mode & PERIPH_CAP_DT) && 1662 (sc->sc_c.features & SF_CHIP_DT)) 1663 sc->sc_c.targets[xm->xm_target]->flags |= TARF_DT; 1664 if ((xm->xm_mode & 1665 (PERIPH_CAP_SYNC | PERIPH_CAP_WIDE16 | PERIPH_CAP_DT)) || 1666 sc->sc_c.targets[xm->xm_target]->status == TARST_PROBING) 1667 sc->sc_c.targets[xm->xm_target]->status = TARST_ASYNC; 1668 1669 splx(s); 1670 } 1671 } 1672 } 1673 1674 static void 1675 esiop_start(sc, esiop_cmd) 1676 struct esiop_softc *sc; 1677 struct esiop_cmd *esiop_cmd; 1678 { 1679 struct esiop_lun *esiop_lun; 1680 struct esiop_target *esiop_target; 1681 int timeout; 1682 int target, lun, slot; 1683 1684 /* 1685 * first make sure to read valid data 1686 */ 1687 esiop_script_sync(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1688 1689 /* 1690 * We use a circular queue here. sc->sc_currschedslot points to a 1691 * free slot, unless we have filled the queue. Check this. 1692 */ 1693 slot = sc->sc_currschedslot; 1694 if ((esiop_script_read(sc, sc->sc_shedoffset + slot * CMD_SLOTSIZE) & 1695 A_f_cmd_free) == 0) { 1696 /* 1697 * no more free slot, no need to continue. freeze the queue 1698 * and requeue this command. 1699 */ 1700 scsipi_channel_freeze(&sc->sc_c.sc_chan, 1); 1701 sc->sc_flags |= SCF_CHAN_NOSLOT; 1702 esiop_script_write(sc, sc->sc_semoffset, 1703 esiop_script_read(sc, sc->sc_semoffset) & ~A_sem_start); 1704 esiop_script_sync(sc, 1705 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1706 esiop_cmd->cmd_c.xs->error = XS_REQUEUE; 1707 esiop_cmd->cmd_c.xs->status = SCSI_SIOP_NOCHECK; 1708 esiop_scsicmd_end(esiop_cmd, 0); 1709 return; 1710 } 1711 /* OK, we can use this slot */ 1712 1713 target = esiop_cmd->cmd_c.xs->xs_periph->periph_target; 1714 lun = esiop_cmd->cmd_c.xs->xs_periph->periph_lun; 1715 esiop_target = (struct esiop_target*)sc->sc_c.targets[target]; 1716 esiop_lun = esiop_target->esiop_lun[lun]; 1717 /* if non-tagged command active, panic: this shouldn't happen */ 1718 if (esiop_lun->active != NULL) { 1719 panic("esiop_start: tagged cmd while untagged running"); 1720 } 1721 #ifdef DIAGNOSTIC 1722 /* sanity check the tag if needed */ 1723 if (esiop_cmd->cmd_c.flags & CMDFL_TAG) { 1724 if (esiop_lun->tactive[esiop_cmd->cmd_c.tag] != NULL) 1725 panic("esiop_start: tag not free"); 1726 if (esiop_cmd->cmd_c.tag >= ESIOP_NTAG || 1727 esiop_cmd->cmd_c.tag < 0) { 1728 scsipi_printaddr(esiop_cmd->cmd_c.xs->xs_periph); 1729 printf(": tag id %d\n", esiop_cmd->cmd_c.tag); 1730 panic("esiop_start: invalid tag id"); 1731 } 1732 } 1733 #endif 1734 #ifdef SIOP_DEBUG_SCHED 1735 printf("using slot %d for DSA 0x%lx\n", slot, 1736 (u_long)esiop_cmd->cmd_c.dsa); 1737 #endif 1738 /* mark command as active */ 1739 if (esiop_cmd->cmd_c.status == CMDST_READY) 1740 esiop_cmd->cmd_c.status = CMDST_ACTIVE; 1741 else 1742 panic("esiop_start: bad status"); 1743 /* DSA table for reselect */ 1744 if (esiop_cmd->cmd_c.flags & CMDFL_TAG) { 1745 esiop_lun->tactive[esiop_cmd->cmd_c.tag] = esiop_cmd; 1746 /* DSA table for reselect */ 1747 esiop_lun->lun_tagtbl->tbl[esiop_cmd->cmd_c.tag] = 1748 htole32(esiop_cmd->cmd_c.dsa); 1749 bus_dmamap_sync(sc->sc_c.sc_dmat, 1750 esiop_lun->lun_tagtbl->tblblk->blkmap, 1751 esiop_lun->lun_tagtbl->tbl_offset, 1752 sizeof(u_int32_t) * ESIOP_NTAG, BUS_DMASYNC_PREWRITE); 1753 } else { 1754 esiop_lun->active = esiop_cmd; 1755 esiop_script_write(sc, 1756 esiop_target->lun_table_offset + 1757 lun * 2 + A_target_luntbl / sizeof(u_int32_t), 1758 esiop_cmd->cmd_c.dsa); 1759 } 1760 /* scheduler slot: DSA */ 1761 esiop_script_write(sc, sc->sc_shedoffset + slot * CMD_SLOTSIZE, 1762 esiop_cmd->cmd_c.dsa); 1763 /* make sure SCRIPT processor will read valid data */ 1764 esiop_script_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1765 /* handle timeout */ 1766 if ((esiop_cmd->cmd_c.xs->xs_control & XS_CTL_POLL) == 0) { 1767 /* start exire timer */ 1768 timeout = mstohz(esiop_cmd->cmd_c.xs->timeout); 1769 if (timeout == 0) 1770 timeout = 1; 1771 callout_reset( &esiop_cmd->cmd_c.xs->xs_callout, 1772 timeout, esiop_timeout, esiop_cmd); 1773 } 1774 /* Signal script it has some work to do */ 1775 bus_space_write_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, 1776 SIOP_ISTAT, ISTAT_SIGP); 1777 /* update the current slot, and wait for IRQ */ 1778 sc->sc_currschedslot++; 1779 if (sc->sc_currschedslot >= A_ncmd_slots) 1780 sc->sc_currschedslot = 0; 1781 return; 1782 } 1783 1784 void 1785 esiop_timeout(v) 1786 void *v; 1787 { 1788 struct esiop_cmd *esiop_cmd = v; 1789 struct esiop_softc *sc = 1790 (struct esiop_softc *)esiop_cmd->cmd_c.siop_sc; 1791 int s; 1792 #ifdef SIOP_DEBUG 1793 int slot, slotdsa; 1794 #endif 1795 1796 s = splbio(); 1797 esiop_table_sync(esiop_cmd, 1798 BUS_DMASYNC_POSTREAD | 1799 BUS_DMASYNC_POSTWRITE); 1800 scsipi_printaddr(esiop_cmd->cmd_c.xs->xs_periph); 1801 #ifdef SIOP_DEBUG 1802 printf("command timeout (status %d)\n", le32toh(esiop_cmd->cmd_tables->status)); 1803 1804 esiop_script_sync(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1805 for (slot = 0; slot < A_ncmd_slots; slot++) { 1806 slotdsa = esiop_script_read(sc, 1807 sc->sc_shedoffset + slot * CMD_SLOTSIZE); 1808 if ((slotdsa & 0x01) == 0) 1809 printf("slot %d not free (0x%x)\n", slot, slotdsa); 1810 } 1811 printf("istat 0x%x ", bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_ISTAT)); 1812 printf("DSP 0x%lx DSA 0x%x\n", 1813 (u_long)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSP) - sc->sc_c.sc_scriptaddr), 1814 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA)); 1815 bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_CTEST2); 1816 printf("istat 0x%x\n", bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_ISTAT)); 1817 #else 1818 printf("command timeout, CDB: "); 1819 scsipi_print_cdb(esiop_cmd->cmd_c.xs->cmd); 1820 printf("\n"); 1821 #endif 1822 /* reset the scsi bus */ 1823 siop_resetbus(&sc->sc_c); 1824 1825 /* deactivate callout */ 1826 callout_stop(&esiop_cmd->cmd_c.xs->xs_callout); 1827 /* 1828 * mark command has being timed out and just return; 1829 * the bus reset will generate an interrupt, 1830 * it will be handled in siop_intr() 1831 */ 1832 esiop_cmd->cmd_c.flags |= CMDFL_TIMEOUT; 1833 splx(s); 1834 return; 1835 1836 } 1837 1838 void 1839 esiop_dump_script(sc) 1840 struct esiop_softc *sc; 1841 { 1842 int i; 1843 for (i = 0; i < PAGE_SIZE / 4; i += 2) { 1844 printf("0x%04x: 0x%08x 0x%08x", i * 4, 1845 le32toh(sc->sc_c.sc_script[i]), 1846 le32toh(sc->sc_c.sc_script[i+1])); 1847 if ((le32toh(sc->sc_c.sc_script[i]) & 0xe0000000) == 1848 0xc0000000) { 1849 i++; 1850 printf(" 0x%08x", le32toh(sc->sc_c.sc_script[i+1])); 1851 } 1852 printf("\n"); 1853 } 1854 } 1855 1856 void 1857 esiop_morecbd(sc) 1858 struct esiop_softc *sc; 1859 { 1860 int error, i, s; 1861 bus_dma_segment_t seg; 1862 int rseg; 1863 struct esiop_cbd *newcbd; 1864 struct esiop_xfer *xfer; 1865 bus_addr_t dsa; 1866 1867 /* allocate a new list head */ 1868 newcbd = malloc(sizeof(struct esiop_cbd), M_DEVBUF, M_NOWAIT|M_ZERO); 1869 if (newcbd == NULL) { 1870 printf("%s: can't allocate memory for command descriptors " 1871 "head\n", sc->sc_c.sc_dev.dv_xname); 1872 return; 1873 } 1874 1875 /* allocate cmd list */ 1876 newcbd->cmds = malloc(sizeof(struct esiop_cmd) * SIOP_NCMDPB, 1877 M_DEVBUF, M_NOWAIT|M_ZERO); 1878 if (newcbd->cmds == NULL) { 1879 printf("%s: can't allocate memory for command descriptors\n", 1880 sc->sc_c.sc_dev.dv_xname); 1881 goto bad3; 1882 } 1883 error = bus_dmamem_alloc(sc->sc_c.sc_dmat, PAGE_SIZE, PAGE_SIZE, 0, 1884 &seg, 1, &rseg, BUS_DMA_NOWAIT); 1885 if (error) { 1886 printf("%s: unable to allocate cbd DMA memory, error = %d\n", 1887 sc->sc_c.sc_dev.dv_xname, error); 1888 goto bad2; 1889 } 1890 error = bus_dmamem_map(sc->sc_c.sc_dmat, &seg, rseg, PAGE_SIZE, 1891 (caddr_t *)&newcbd->xfers, BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 1892 if (error) { 1893 printf("%s: unable to map cbd DMA memory, error = %d\n", 1894 sc->sc_c.sc_dev.dv_xname, error); 1895 goto bad2; 1896 } 1897 error = bus_dmamap_create(sc->sc_c.sc_dmat, PAGE_SIZE, 1, PAGE_SIZE, 0, 1898 BUS_DMA_NOWAIT, &newcbd->xferdma); 1899 if (error) { 1900 printf("%s: unable to create cbd DMA map, error = %d\n", 1901 sc->sc_c.sc_dev.dv_xname, error); 1902 goto bad1; 1903 } 1904 error = bus_dmamap_load(sc->sc_c.sc_dmat, newcbd->xferdma, 1905 newcbd->xfers, PAGE_SIZE, NULL, BUS_DMA_NOWAIT); 1906 if (error) { 1907 printf("%s: unable to load cbd DMA map, error = %d\n", 1908 sc->sc_c.sc_dev.dv_xname, error); 1909 goto bad0; 1910 } 1911 #ifdef DEBUG 1912 printf("%s: alloc newcdb at PHY addr 0x%lx\n", sc->sc_c.sc_dev.dv_xname, 1913 (unsigned long)newcbd->xferdma->dm_segs[0].ds_addr); 1914 #endif 1915 for (i = 0; i < SIOP_NCMDPB; i++) { 1916 error = bus_dmamap_create(sc->sc_c.sc_dmat, MAXPHYS, SIOP_NSG, 1917 MAXPHYS, 0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 1918 &newcbd->cmds[i].cmd_c.dmamap_data); 1919 if (error) { 1920 printf("%s: unable to create data DMA map for cbd: " 1921 "error %d\n", 1922 sc->sc_c.sc_dev.dv_xname, error); 1923 goto bad0; 1924 } 1925 error = bus_dmamap_create(sc->sc_c.sc_dmat, 1926 sizeof(struct scsipi_generic), 1, 1927 sizeof(struct scsipi_generic), 0, 1928 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 1929 &newcbd->cmds[i].cmd_c.dmamap_cmd); 1930 if (error) { 1931 printf("%s: unable to create cmd DMA map for cbd %d\n", 1932 sc->sc_c.sc_dev.dv_xname, error); 1933 goto bad0; 1934 } 1935 newcbd->cmds[i].cmd_c.siop_sc = &sc->sc_c; 1936 newcbd->cmds[i].esiop_cbdp = newcbd; 1937 xfer = &newcbd->xfers[i]; 1938 newcbd->cmds[i].cmd_tables = (struct siop_common_xfer *)xfer; 1939 memset(newcbd->cmds[i].cmd_tables, 0, 1940 sizeof(struct esiop_xfer)); 1941 dsa = newcbd->xferdma->dm_segs[0].ds_addr + 1942 i * sizeof(struct esiop_xfer); 1943 newcbd->cmds[i].cmd_c.dsa = dsa; 1944 newcbd->cmds[i].cmd_c.status = CMDST_FREE; 1945 xfer->siop_tables.t_msgout.count= htole32(1); 1946 xfer->siop_tables.t_msgout.addr = htole32(dsa); 1947 xfer->siop_tables.t_msgin.count= htole32(1); 1948 xfer->siop_tables.t_msgin.addr = htole32(dsa + 1949 offsetof(struct siop_common_xfer, msg_in)); 1950 xfer->siop_tables.t_extmsgin.count= htole32(2); 1951 xfer->siop_tables.t_extmsgin.addr = htole32(dsa + 1952 offsetof(struct siop_common_xfer, msg_in) + 1); 1953 xfer->siop_tables.t_extmsgdata.addr = htole32(dsa + 1954 offsetof(struct siop_common_xfer, msg_in) + 3); 1955 xfer->siop_tables.t_status.count= htole32(1); 1956 xfer->siop_tables.t_status.addr = htole32(dsa + 1957 offsetof(struct siop_common_xfer, status)); 1958 1959 s = splbio(); 1960 TAILQ_INSERT_TAIL(&sc->free_list, &newcbd->cmds[i], next); 1961 splx(s); 1962 #ifdef SIOP_DEBUG 1963 printf("tables[%d]: in=0x%x out=0x%x status=0x%x\n", i, 1964 le32toh(newcbd->cmds[i].cmd_tables->t_msgin.addr), 1965 le32toh(newcbd->cmds[i].cmd_tables->t_msgout.addr), 1966 le32toh(newcbd->cmds[i].cmd_tables->t_status.addr)); 1967 #endif 1968 } 1969 s = splbio(); 1970 TAILQ_INSERT_TAIL(&sc->cmds, newcbd, next); 1971 sc->sc_c.sc_adapt.adapt_openings += SIOP_NCMDPB; 1972 splx(s); 1973 return; 1974 bad0: 1975 bus_dmamap_unload(sc->sc_c.sc_dmat, newcbd->xferdma); 1976 bus_dmamap_destroy(sc->sc_c.sc_dmat, newcbd->xferdma); 1977 bad1: 1978 bus_dmamem_free(sc->sc_c.sc_dmat, &seg, rseg); 1979 bad2: 1980 free(newcbd->cmds, M_DEVBUF); 1981 bad3: 1982 free(newcbd, M_DEVBUF); 1983 return; 1984 } 1985 1986 void 1987 esiop_moretagtbl(sc) 1988 struct esiop_softc *sc; 1989 { 1990 int error, i, j, s; 1991 bus_dma_segment_t seg; 1992 int rseg; 1993 struct esiop_dsatblblk *newtblblk; 1994 struct esiop_dsatbl *newtbls; 1995 u_int32_t *tbls; 1996 1997 /* allocate a new list head */ 1998 newtblblk = malloc(sizeof(struct esiop_dsatblblk), 1999 M_DEVBUF, M_NOWAIT|M_ZERO); 2000 if (newtblblk == NULL) { 2001 printf("%s: can't allocate memory for tag DSA table block\n", 2002 sc->sc_c.sc_dev.dv_xname); 2003 return; 2004 } 2005 2006 /* allocate tbl list */ 2007 newtbls = malloc(sizeof(struct esiop_dsatbl) * ESIOP_NTPB, 2008 M_DEVBUF, M_NOWAIT|M_ZERO); 2009 if (newtbls == NULL) { 2010 printf("%s: can't allocate memory for command descriptors\n", 2011 sc->sc_c.sc_dev.dv_xname); 2012 goto bad3; 2013 } 2014 error = bus_dmamem_alloc(sc->sc_c.sc_dmat, PAGE_SIZE, PAGE_SIZE, 0, 2015 &seg, 1, &rseg, BUS_DMA_NOWAIT); 2016 if (error) { 2017 printf("%s: unable to allocate tbl DMA memory, error = %d\n", 2018 sc->sc_c.sc_dev.dv_xname, error); 2019 goto bad2; 2020 } 2021 error = bus_dmamem_map(sc->sc_c.sc_dmat, &seg, rseg, PAGE_SIZE, 2022 (void *)&tbls, BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 2023 if (error) { 2024 printf("%s: unable to map tbls DMA memory, error = %d\n", 2025 sc->sc_c.sc_dev.dv_xname, error); 2026 goto bad2; 2027 } 2028 error = bus_dmamap_create(sc->sc_c.sc_dmat, PAGE_SIZE, 1, PAGE_SIZE, 0, 2029 BUS_DMA_NOWAIT, &newtblblk->blkmap); 2030 if (error) { 2031 printf("%s: unable to create tbl DMA map, error = %d\n", 2032 sc->sc_c.sc_dev.dv_xname, error); 2033 goto bad1; 2034 } 2035 error = bus_dmamap_load(sc->sc_c.sc_dmat, newtblblk->blkmap, 2036 tbls, PAGE_SIZE, NULL, BUS_DMA_NOWAIT); 2037 if (error) { 2038 printf("%s: unable to load tbl DMA map, error = %d\n", 2039 sc->sc_c.sc_dev.dv_xname, error); 2040 goto bad0; 2041 } 2042 #ifdef DEBUG 2043 printf("%s: alloc new tag DSA table at PHY addr 0x%lx\n", 2044 sc->sc_c.sc_dev.dv_xname, 2045 (unsigned long)newtblblk->blkmap->dm_segs[0].ds_addr); 2046 #endif 2047 for (i = 0; i < ESIOP_NTPB; i++) { 2048 newtbls[i].tblblk = newtblblk; 2049 newtbls[i].tbl = &tbls[i * ESIOP_NTAG]; 2050 newtbls[i].tbl_offset = i * ESIOP_NTAG * sizeof(u_int32_t); 2051 newtbls[i].tbl_dsa = newtblblk->blkmap->dm_segs[0].ds_addr + 2052 newtbls[i].tbl_offset; 2053 for (j = 0; j < ESIOP_NTAG; j++) 2054 newtbls[i].tbl[j] = j; 2055 s = splbio(); 2056 TAILQ_INSERT_TAIL(&sc->free_tagtbl, &newtbls[i], next); 2057 splx(s); 2058 } 2059 s = splbio(); 2060 TAILQ_INSERT_TAIL(&sc->tag_tblblk, newtblblk, next); 2061 splx(s); 2062 return; 2063 bad0: 2064 bus_dmamap_unload(sc->sc_c.sc_dmat, newtblblk->blkmap); 2065 bus_dmamap_destroy(sc->sc_c.sc_dmat, newtblblk->blkmap); 2066 bad1: 2067 bus_dmamem_free(sc->sc_c.sc_dmat, &seg, rseg); 2068 bad2: 2069 free(newtbls, M_DEVBUF); 2070 bad3: 2071 free(newtblblk, M_DEVBUF); 2072 return; 2073 } 2074 2075 void 2076 esiop_update_scntl3(sc, _siop_target) 2077 struct esiop_softc *sc; 2078 struct siop_common_target *_siop_target; 2079 { 2080 struct esiop_target *esiop_target = (struct esiop_target *)_siop_target; 2081 esiop_script_write(sc, esiop_target->lun_table_offset, 2082 esiop_target->target_c.id); 2083 esiop_script_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 2084 } 2085 2086 void 2087 esiop_add_dev(sc, target, lun) 2088 struct esiop_softc *sc; 2089 int target; 2090 int lun; 2091 { 2092 struct esiop_target *esiop_target = 2093 (struct esiop_target *)sc->sc_c.targets[target]; 2094 struct esiop_lun *esiop_lun = esiop_target->esiop_lun[lun]; 2095 2096 /* we need a tag DSA table */ 2097 esiop_lun->lun_tagtbl= TAILQ_FIRST(&sc->free_tagtbl); 2098 if (esiop_lun->lun_tagtbl == NULL) { 2099 esiop_moretagtbl(sc); 2100 esiop_lun->lun_tagtbl= TAILQ_FIRST(&sc->free_tagtbl); 2101 if (esiop_lun->lun_tagtbl == NULL) { 2102 /* no resources, run untagged */ 2103 esiop_target->target_c.flags &= ~TARF_TAG; 2104 return; 2105 } 2106 } 2107 TAILQ_REMOVE(&sc->free_tagtbl, esiop_lun->lun_tagtbl, next); 2108 /* Update LUN DSA table */ 2109 esiop_script_write(sc, esiop_target->lun_table_offset + 2110 lun * 2 + A_target_luntbl_tag / sizeof(u_int32_t), 2111 esiop_lun->lun_tagtbl->tbl_dsa); 2112 esiop_script_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 2113 } 2114 2115 void 2116 esiop_del_dev(sc, target, lun) 2117 struct esiop_softc *sc; 2118 int target; 2119 int lun; 2120 { 2121 struct esiop_target *esiop_target; 2122 #ifdef SIOP_DEBUG 2123 printf("%s:%d:%d: free lun sw entry\n", 2124 sc->sc_c.sc_dev.dv_xname, target, lun); 2125 #endif 2126 if (sc->sc_c.targets[target] == NULL) 2127 return; 2128 esiop_target = (struct esiop_target *)sc->sc_c.targets[target]; 2129 free(esiop_target->esiop_lun[lun], M_DEVBUF); 2130 esiop_target->esiop_lun[lun] = NULL; 2131 } 2132 2133 void 2134 esiop_target_register(sc, target) 2135 struct esiop_softc *sc; 2136 u_int32_t target; 2137 { 2138 struct esiop_target *esiop_target = 2139 (struct esiop_target *)sc->sc_c.targets[target]; 2140 struct esiop_lun *esiop_lun; 2141 int lun; 2142 2143 /* get a DSA table for this target */ 2144 esiop_target->lun_table_offset = sc->sc_free_offset; 2145 sc->sc_free_offset += sc->sc_c.sc_chan.chan_nluns * 2 + 2; 2146 #ifdef SIOP_DEBUG 2147 printf("%s: lun table for target %d offset %d free offset %d\n", 2148 sc->sc_c.sc_dev.dv_xname, target, esiop_target->lun_table_offset, 2149 sc->sc_free_offset); 2150 #endif 2151 /* first 32 bytes are ID (for select) */ 2152 esiop_script_write(sc, esiop_target->lun_table_offset, 2153 esiop_target->target_c.id); 2154 /* Record this table in the target DSA table */ 2155 esiop_script_write(sc, 2156 sc->sc_target_table_offset + target, 2157 (esiop_target->lun_table_offset * sizeof(u_int32_t)) + 2158 sc->sc_c.sc_scriptaddr); 2159 /* if we have a tag table, register it */ 2160 for (lun = 0; lun < sc->sc_c.sc_chan.chan_nluns; lun++) { 2161 esiop_lun = esiop_target->esiop_lun[lun]; 2162 if (esiop_lun == NULL) 2163 continue; 2164 if (esiop_lun->lun_tagtbl) 2165 esiop_script_write(sc, esiop_target->lun_table_offset + 2166 lun * 2 + A_target_luntbl_tag / sizeof(u_int32_t), 2167 esiop_lun->lun_tagtbl->tbl_dsa); 2168 } 2169 esiop_script_sync(sc, 2170 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 2171 } 2172 2173 #ifdef SIOP_STATS 2174 void 2175 esiop_printstats() 2176 { 2177 printf("esiop_stat_intr %d\n", esiop_stat_intr); 2178 printf("esiop_stat_intr_shortxfer %d\n", esiop_stat_intr_shortxfer); 2179 printf("esiop_stat_intr_xferdisc %d\n", esiop_stat_intr_xferdisc); 2180 printf("esiop_stat_intr_sdp %d\n", esiop_stat_intr_sdp); 2181 printf("esiop_stat_intr_done %d\n", esiop_stat_intr_done); 2182 printf("esiop_stat_intr_lunresel %d\n", esiop_stat_intr_lunresel); 2183 printf("esiop_stat_intr_qfull %d\n", esiop_stat_intr_qfull); 2184 } 2185 #endif 2186
Indexes created Tue Sep 30 11:09:46 GMT 2025