gemvar.h revision 1.15 1 1.15 martin /* $NetBSD: gemvar.h,v 1.15 2006/11/24 13:01:07 martin Exp $ */
2 1.1 eeh
3 1.1 eeh /*
4 1.10 heas *
5 1.1 eeh * Copyright (C) 2001 Eduardo Horvath.
6 1.1 eeh * All rights reserved.
7 1.1 eeh *
8 1.1 eeh *
9 1.1 eeh * Redistribution and use in source and binary forms, with or without
10 1.1 eeh * modification, are permitted provided that the following conditions
11 1.1 eeh * are met:
12 1.1 eeh * 1. Redistributions of source code must retain the above copyright
13 1.1 eeh * notice, this list of conditions and the following disclaimer.
14 1.1 eeh * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 eeh * notice, this list of conditions and the following disclaimer in the
16 1.1 eeh * documentation and/or other materials provided with the distribution.
17 1.10 heas *
18 1.1 eeh * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
19 1.1 eeh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 1.1 eeh * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 1.1 eeh * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
22 1.1 eeh * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 1.1 eeh * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 1.1 eeh * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 1.1 eeh * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 1.1 eeh * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 1.1 eeh * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 1.1 eeh * SUCH DAMAGE.
29 1.1 eeh *
30 1.1 eeh */
31 1.1 eeh
32 1.1 eeh #ifndef _IF_GEMVAR_H
33 1.1 eeh #define _IF_GEMVAR_H
34 1.1 eeh
35 1.1 eeh
36 1.1 eeh #include "rnd.h"
37 1.1 eeh
38 1.1 eeh #include <sys/queue.h>
39 1.1 eeh #include <sys/callout.h>
40 1.1 eeh
41 1.1 eeh #if NRND > 0
42 1.1 eeh #include <sys/rnd.h>
43 1.1 eeh #endif
44 1.1 eeh
45 1.1 eeh /*
46 1.10 heas * Misc. definitions for the Sun ``Gem'' Ethernet controller family driver.
47 1.1 eeh */
48 1.1 eeh
49 1.1 eeh /*
50 1.1 eeh * Transmit descriptor list size. This is arbitrary, but allocate
51 1.1 eeh * enough descriptors for 64 pending transmissions and 16 segments
52 1.10 heas * per packet.
53 1.1 eeh */
54 1.1 eeh #define GEM_NTXSEGS 16
55 1.1 eeh
56 1.1 eeh #define GEM_TXQUEUELEN 64
57 1.1 eeh #define GEM_NTXDESC (GEM_TXQUEUELEN * GEM_NTXSEGS)
58 1.1 eeh #define GEM_NTXDESC_MASK (GEM_NTXDESC - 1)
59 1.1 eeh #define GEM_NEXTTX(x) ((x + 1) & GEM_NTXDESC_MASK)
60 1.1 eeh
61 1.1 eeh /*
62 1.1 eeh * Receive descriptor list size. We have one Rx buffer per incoming
63 1.1 eeh * packet, so this logic is a little simpler.
64 1.1 eeh */
65 1.2 eeh #define GEM_NRXDESC 128
66 1.1 eeh #define GEM_NRXDESC_MASK (GEM_NRXDESC - 1)
67 1.8 matt #define GEM_PREVRX(x) ((x - 1) & GEM_NRXDESC_MASK)
68 1.1 eeh #define GEM_NEXTRX(x) ((x + 1) & GEM_NRXDESC_MASK)
69 1.1 eeh
70 1.1 eeh /*
71 1.1 eeh * Control structures are DMA'd to the GEM chip. We allocate them in
72 1.1 eeh * a single clump that maps to a single DMA segment to make several things
73 1.1 eeh * easier.
74 1.1 eeh */
75 1.1 eeh struct gem_control_data {
76 1.1 eeh /*
77 1.1 eeh * The transmit descriptors.
78 1.1 eeh */
79 1.1 eeh struct gem_desc gcd_txdescs[GEM_NTXDESC];
80 1.1 eeh
81 1.1 eeh /*
82 1.1 eeh * The receive descriptors.
83 1.1 eeh */
84 1.1 eeh struct gem_desc gcd_rxdescs[GEM_NRXDESC];
85 1.1 eeh };
86 1.1 eeh
87 1.1 eeh #define GEM_CDOFF(x) offsetof(struct gem_control_data, x)
88 1.1 eeh #define GEM_CDTXOFF(x) GEM_CDOFF(gcd_txdescs[(x)])
89 1.1 eeh #define GEM_CDRXOFF(x) GEM_CDOFF(gcd_rxdescs[(x)])
90 1.1 eeh
91 1.1 eeh /*
92 1.1 eeh * Software state for transmit jobs.
93 1.1 eeh */
94 1.1 eeh struct gem_txsoft {
95 1.1 eeh struct mbuf *txs_mbuf; /* head of our mbuf chain */
96 1.1 eeh bus_dmamap_t txs_dmamap; /* our DMA map */
97 1.1 eeh int txs_firstdesc; /* first descriptor in packet */
98 1.1 eeh int txs_lastdesc; /* last descriptor in packet */
99 1.1 eeh int txs_ndescs; /* number of descriptors */
100 1.1 eeh SIMPLEQ_ENTRY(gem_txsoft) txs_q;
101 1.1 eeh };
102 1.1 eeh
103 1.1 eeh SIMPLEQ_HEAD(gem_txsq, gem_txsoft);
104 1.1 eeh
105 1.1 eeh /*
106 1.1 eeh * Software state for receive jobs.
107 1.1 eeh */
108 1.1 eeh struct gem_rxsoft {
109 1.1 eeh struct mbuf *rxs_mbuf; /* head of our mbuf chain */
110 1.1 eeh bus_dmamap_t rxs_dmamap; /* our DMA map */
111 1.1 eeh };
112 1.1 eeh
113 1.1 eeh /*
114 1.1 eeh * Software state per device.
115 1.1 eeh */
116 1.1 eeh struct gem_softc {
117 1.1 eeh struct device sc_dev; /* generic device information */
118 1.1 eeh struct ethercom sc_ethercom; /* ethernet common data */
119 1.1 eeh struct mii_data sc_mii; /* MII media control */
120 1.1 eeh #define sc_media sc_mii.mii_media/* shorthand */
121 1.1 eeh struct callout sc_tick_ch; /* tick callout */
122 1.1 eeh
123 1.1 eeh /* The following bus handles are to be provided by the bus front-end */
124 1.1 eeh bus_space_tag_t sc_bustag; /* bus tag */
125 1.1 eeh bus_dma_tag_t sc_dmatag; /* bus dma tag */
126 1.1 eeh bus_dmamap_t sc_dmamap; /* bus dma handle */
127 1.15 martin bus_space_handle_t sc_h1; /* bus space handle for bank 1 regs */
128 1.15 martin bus_space_handle_t sc_h2; /* bus space handle for bank 2 regs */
129 1.5 thorpej
130 1.1 eeh int sc_phys[2]; /* MII instance -> PHY map */
131 1.1 eeh
132 1.1 eeh int sc_mif_config; /* Selected MII reg setting */
133 1.1 eeh
134 1.1 eeh int sc_pci; /* XXXXX -- PCI buses are LE. */
135 1.7 matt u_int sc_variant; /* which GEM are we dealing with? */
136 1.7 matt #define GEM_UNKNOWN 0 /* don't know */
137 1.7 matt #define GEM_SUN_GEM 1 /* Sun GEM variant */
138 1.7 matt #define GEM_APPLE_GMAC 2 /* Apple GMAC variant */
139 1.7 matt
140 1.7 matt u_int sc_flags; /* */
141 1.13 christos short sc_if_flags; /* copy of ifp->if_flags */
142 1.7 matt #define GEM_GIGABIT 0x0001 /* has a gigabit PHY */
143 1.1 eeh
144 1.1 eeh void *sc_sdhook; /* shutdown hook */
145 1.1 eeh void *sc_powerhook; /* power management hook */
146 1.1 eeh
147 1.1 eeh /*
148 1.1 eeh * Ring buffer DMA stuff.
149 1.1 eeh */
150 1.1 eeh bus_dma_segment_t sc_cdseg; /* control data memory */
151 1.1 eeh int sc_cdnseg; /* number of segments */
152 1.1 eeh bus_dmamap_t sc_cddmamap; /* control data DMA map */
153 1.1 eeh #define sc_cddma sc_cddmamap->dm_segs[0].ds_addr
154 1.1 eeh
155 1.12 bouyer bus_dmamap_t sc_nulldmamap; /* for small packets padding */
156 1.12 bouyer
157 1.1 eeh /*
158 1.1 eeh * Software state for transmit and receive descriptors.
159 1.1 eeh */
160 1.1 eeh struct gem_txsoft sc_txsoft[GEM_TXQUEUELEN];
161 1.1 eeh struct gem_rxsoft sc_rxsoft[GEM_NRXDESC];
162 1.1 eeh
163 1.1 eeh /*
164 1.1 eeh * Control data structures.
165 1.1 eeh */
166 1.1 eeh struct gem_control_data *sc_control_data;
167 1.1 eeh #define sc_txdescs sc_control_data->gcd_txdescs
168 1.1 eeh #define sc_rxdescs sc_control_data->gcd_rxdescs
169 1.1 eeh
170 1.5 thorpej int sc_txfree; /* number of free Tx descriptors */
171 1.5 thorpej int sc_txnext; /* next ready Tx descriptor */
172 1.6 matt int sc_txwin; /* Tx descriptors since last Tx int */
173 1.1 eeh
174 1.5 thorpej struct gem_txsq sc_txfreeq; /* free Tx descsofts */
175 1.5 thorpej struct gem_txsq sc_txdirtyq; /* dirty Tx descsofts */
176 1.1 eeh
177 1.5 thorpej int sc_rxptr; /* next ready RX descriptor/descsoft */
178 1.7 matt int sc_rxfifosize; /* Rx FIFO size (bytes) */
179 1.1 eeh
180 1.1 eeh /* ========== */
181 1.5 thorpej int sc_inited;
182 1.5 thorpej int sc_debug;
183 1.5 thorpej void *sc_sh; /* shutdownhook cookie */
184 1.1 eeh
185 1.1 eeh /* Special hardware hooks */
186 1.11 perry void (*sc_hwreset)(struct gem_softc *);
187 1.11 perry void (*sc_hwinit)(struct gem_softc *);
188 1.1 eeh
189 1.1 eeh #if NRND > 0
190 1.1 eeh rndsource_element_t rnd_source;
191 1.1 eeh #endif
192 1.8 matt
193 1.8 matt struct evcnt sc_ev_intr;
194 1.9 matt #ifdef GEM_COUNTERS
195 1.8 matt struct evcnt sc_ev_txint;
196 1.8 matt struct evcnt sc_ev_rxint;
197 1.8 matt struct evcnt sc_ev_rxnobuf;
198 1.8 matt struct evcnt sc_ev_rxfull;
199 1.8 matt struct evcnt sc_ev_rxhist[9];
200 1.9 matt #endif
201 1.1 eeh };
202 1.9 matt
203 1.9 matt #ifdef GEM_COUNTERS
204 1.9 matt #define GEM_COUNTER_INCR(sc, ctr) ((void) (sc->ctr.ev_count++))
205 1.9 matt #else
206 1.9 matt #define GEM_COUNTER_INCR(sc, ctr) ((void) sc)
207 1.9 matt #endif
208 1.1 eeh
209 1.1 eeh
210 1.2 eeh #define GEM_DMA_READ(sc, v) (((sc)->sc_pci) ? le64toh(v) : be64toh(v))
211 1.2 eeh #define GEM_DMA_WRITE(sc, v) (((sc)->sc_pci) ? htole64(v) : htobe64(v))
212 1.1 eeh
213 1.1 eeh #define GEM_CDTXADDR(sc, x) ((sc)->sc_cddma + GEM_CDTXOFF((x)))
214 1.1 eeh #define GEM_CDRXADDR(sc, x) ((sc)->sc_cddma + GEM_CDRXOFF((x)))
215 1.1 eeh
216 1.1 eeh #define GEM_CDSPADDR(sc) ((sc)->sc_cddma + GEM_CDSPOFF)
217 1.1 eeh
218 1.1 eeh #define GEM_CDTXSYNC(sc, x, n, ops) \
219 1.1 eeh do { \
220 1.1 eeh int __x, __n; \
221 1.1 eeh \
222 1.1 eeh __x = (x); \
223 1.1 eeh __n = (n); \
224 1.1 eeh \
225 1.1 eeh /* If it will wrap around, sync to the end of the ring. */ \
226 1.1 eeh if ((__x + __n) > GEM_NTXDESC) { \
227 1.1 eeh bus_dmamap_sync((sc)->sc_dmatag, (sc)->sc_cddmamap, \
228 1.1 eeh GEM_CDTXOFF(__x), sizeof(struct gem_desc) * \
229 1.1 eeh (GEM_NTXDESC - __x), (ops)); \
230 1.1 eeh __n -= (GEM_NTXDESC - __x); \
231 1.1 eeh __x = 0; \
232 1.1 eeh } \
233 1.1 eeh \
234 1.1 eeh /* Now sync whatever is left. */ \
235 1.1 eeh bus_dmamap_sync((sc)->sc_dmatag, (sc)->sc_cddmamap, \
236 1.1 eeh GEM_CDTXOFF(__x), sizeof(struct gem_desc) * __n, (ops)); \
237 1.1 eeh } while (0)
238 1.1 eeh
239 1.1 eeh #define GEM_CDRXSYNC(sc, x, ops) \
240 1.1 eeh bus_dmamap_sync((sc)->sc_dmatag, (sc)->sc_cddmamap, \
241 1.1 eeh GEM_CDRXOFF((x)), sizeof(struct gem_desc), (ops))
242 1.1 eeh
243 1.1 eeh #define GEM_CDSPSYNC(sc, ops) \
244 1.1 eeh bus_dmamap_sync((sc)->sc_dmatag, (sc)->sc_cddmamap, \
245 1.1 eeh GEM_CDSPOFF, GEM_SETUP_PACKET_LEN, (ops))
246 1.1 eeh
247 1.1 eeh #define GEM_INIT_RXDESC(sc, x) \
248 1.1 eeh do { \
249 1.1 eeh struct gem_rxsoft *__rxs = &sc->sc_rxsoft[(x)]; \
250 1.1 eeh struct gem_desc *__rxd = &sc->sc_rxdescs[(x)]; \
251 1.1 eeh struct mbuf *__m = __rxs->rxs_mbuf; \
252 1.1 eeh \
253 1.1 eeh __m->m_data = __m->m_ext.ext_buf; \
254 1.1 eeh __rxd->gd_addr = \
255 1.2 eeh GEM_DMA_WRITE((sc), __rxs->rxs_dmamap->dm_segs[0].ds_addr); \
256 1.1 eeh __rxd->gd_flags = \
257 1.2 eeh GEM_DMA_WRITE((sc), \
258 1.2 eeh (((__m->m_ext.ext_size)<<GEM_RD_BUFSHIFT) \
259 1.2 eeh & GEM_RD_BUFSIZE) | GEM_RD_OWN); \
260 1.1 eeh GEM_CDRXSYNC((sc), (x), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \
261 1.1 eeh } while (0)
262 1.1 eeh
263 1.1 eeh #ifdef _KERNEL
264 1.11 perry void gem_attach(struct gem_softc *, const uint8_t *);
265 1.11 perry int gem_intr(void *);
266 1.1 eeh
267 1.11 perry void gem_reset(struct gem_softc *);
268 1.1 eeh #endif /* _KERNEL */
269 1.1 eeh
270 1.1 eeh
271 1.1 eeh #endif
272