hd44780_subr.c revision 1.3 1 /* $NetBSD: hd44780_subr.c,v 1.3 2005/01/09 15:43:56 joff Exp $ */
2
3 /*
4 * Copyright (c) 2002 Dennis I. Chernoivanov
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30 /*
31 * Subroutines for Hitachi HD44870 style displays
32 */
33
34 #include <sys/cdefs.h>
35 __KERNEL_RCSID(0, "$NetBSD: hd44780_subr.c,v 1.3 2005/01/09 15:43:56 joff Exp $");
36
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/conf.h>
40 #include <sys/kernel.h>
41 #include <sys/types.h>
42 #include <sys/ioccom.h>
43
44 #include <machine/autoconf.h>
45 #include <machine/intr.h>
46 #include <machine/bus.h>
47
48 #include <dev/ic/hd44780reg.h>
49 #include <dev/ic/hd44780_subr.h>
50
51 /*
52 * Finish device attach. sc_writereg, sc_readreg and sc_flags must be properly
53 * initialized prior to this call.
54 */
55 void
56 hd44780_attach_subr(sc)
57 struct hd44780_chip *sc;
58 {
59 int err = 0;
60 /* Putc/getc are supposed to be set by platform-dependent code. */
61 if ((sc->sc_writereg == NULL) || (sc->sc_readreg == NULL))
62 sc->sc_dev_ok = 0;
63
64 /* Make sure that HD_MAX_CHARS is enough. */
65 if ((sc->sc_flags & HD_MULTILINE) && (2 * sc->sc_rows > HD_MAX_CHARS))
66 sc->sc_dev_ok = 0;
67 else if (sc->sc_rows > HD_MAX_CHARS)
68 sc->sc_dev_ok = 0;
69
70 if (sc->sc_dev_ok) {
71 if ((sc->sc_flags & HD_UP) == 0)
72 err = hd44780_init(sc);
73 if (err != 0)
74 printf("%s: not responding or unconnected\n", sc->sc_dev->dv_xname);
75
76 }
77 }
78
79 /*
80 * Initialize 4-bit or 8-bit connected device.
81 */
82 int
83 hd44780_init(sc)
84 struct hd44780_chip *sc;
85 {
86 u_int8_t cmd, dat;
87
88 sc->sc_flags &= ~(HD_TIMEDOUT|HD_UP);
89 sc->sc_dev_ok = 1;
90 cmd = cmd_init(sc->sc_flags & HD_8BIT);
91 hd44780_ir_write(sc, cmd);
92 delay(HD_TIMEOUT_LONG);
93 hd44780_ir_write(sc, cmd);
94 hd44780_ir_write(sc, cmd);
95
96 cmd = cmd_funcset(
97 sc->sc_flags & HD_8BIT,
98 sc->sc_flags & HD_MULTILINE,
99 sc->sc_flags & HD_BIGFONT);
100
101 if ((sc->sc_flags & HD_8BIT) == 0)
102 hd44780_ir_write(sc, cmd);
103
104 sc->sc_flags |= HD_UP;
105
106 hd44780_ir_write(sc, cmd);
107 hd44780_ir_write(sc, cmd_dispctl(0, 0, 0));
108 hd44780_ir_write(sc, cmd_clear());
109 hd44780_ir_write(sc, cmd_modset(1, 0));
110
111 if (sc->sc_flags & HD_TIMEDOUT) {
112 sc->sc_flags &= ~HD_UP;
113 return EIO;
114 }
115
116 /* Turn display on and clear it. */
117 hd44780_ir_write(sc, cmd_clear());
118 hd44780_ir_write(sc, cmd_dispctl(1, 0, 0));
119
120 /* Attempt a simple probe for presence */
121 hd44780_ir_write(sc, cmd_ddramset(0x5));
122 hd44780_ir_write(sc, cmd_shift(0, 1));
123 hd44780_busy_wait(sc);
124 if ((dat = hd44780_ir_read(sc) & 0x7f) != 0x6) {
125 sc->sc_dev_ok = 0;
126 sc->sc_flags &= ~HD_UP;
127 return EIO;
128 }
129 hd44780_ir_write(sc, cmd_ddramset(0));
130
131 return 0;
132 }
133
134 /*
135 * Standard hd44780 ioctl() functions.
136 */
137 int
138 hd44780_ioctl_subr(sc, cmd, data)
139 struct hd44780_chip *sc;
140 u_long cmd;
141 caddr_t data;
142 {
143 u_int8_t tmp;
144 int error = 0;
145
146 #define hd44780_io() ((struct hd44780_io *)data)
147 #define hd44780_info() ((struct hd44780_info*)data)
148 #define hd44780_ctrl() ((struct hd44780_dispctl*)data)
149
150 switch (cmd) {
151 /* Clear the LCD. */
152 case HLCD_CLEAR:
153 hd44780_ir_write(sc, cmd_clear());
154 break;
155
156 /* Move the cursor one position to the left. */
157 case HLCD_CURSOR_LEFT:
158 hd44780_ir_write(sc, cmd_shift(0, 0));
159 break;
160
161 /* Move the cursor one position to the right. */
162 case HLCD_CURSOR_RIGHT:
163 hd44780_ir_write(sc, cmd_shift(0, 1));
164 break;
165
166 /* Control the LCD. */
167 case HLCD_DISPCTL:
168 hd44780_ir_write(sc, cmd_dispctl(
169 hd44780_ctrl()->display_on,
170 hd44780_ctrl()->cursor_on,
171 hd44780_ctrl()->blink_on));
172 break;
173
174 /* Get LCD configuration. */
175 case HLCD_GET_INFO:
176 hd44780_info()->lines
177 = (sc->sc_flags & HD_MULTILINE) ? 2 : 1;
178 hd44780_info()->phys_rows = sc->sc_rows;
179 hd44780_info()->virt_rows = sc->sc_vrows;
180 hd44780_info()->is_wide = sc->sc_flags & HD_8BIT;
181 hd44780_info()->is_bigfont = sc->sc_flags & HD_BIGFONT;
182 hd44780_info()->kp_present = sc->sc_flags & HD_KEYPAD;
183 break;
184
185
186 /* Reset the LCD. */
187 case HLCD_RESET:
188 error = hd44780_init(sc);
189 break;
190
191 /* Get the current cursor position. */
192 case HLCD_GET_CURSOR_POS:
193 hd44780_io()->dat = (hd44780_ir_read(sc) & 0x7f);
194 break;
195
196 /* Set the cursor position. */
197 case HLCD_SET_CURSOR_POS:
198 hd44780_ir_write(sc, cmd_ddramset(hd44780_io()->dat));
199 break;
200
201 /* Get the value at the current cursor position. */
202 case HLCD_GETC:
203 tmp = (hd44780_ir_read(sc) & 0x7f);
204 hd44780_ir_write(sc, cmd_ddramset(tmp));
205 hd44780_io()->dat = hd44780_dr_read(sc);
206 break;
207
208 /* Set the character at the cursor position + advance cursor. */
209 case HLCD_PUTC:
210 hd44780_dr_write(sc, hd44780_io()->dat);
211 break;
212
213 /* Shift display left. */
214 case HLCD_SHIFT_LEFT:
215 hd44780_ir_write(sc, cmd_shift(1, 0));
216 break;
217
218 /* Shift display right. */
219 case HLCD_SHIFT_RIGHT:
220 hd44780_ir_write(sc, cmd_shift(1, 1));
221 break;
222
223 /* Return home. */
224 case HLCD_HOME:
225 hd44780_ir_write(sc, cmd_rethome());
226 break;
227
228 /* Write a string to the LCD virtual area. */
229 case HLCD_WRITE:
230 error = hd44780_ddram_io(sc, hd44780_io(), HD_DDRAM_WRITE);
231 break;
232
233 /* Read LCD virtual area. */
234 case HLCD_READ:
235 error = hd44780_ddram_io(sc, hd44780_io(), HD_DDRAM_READ);
236 break;
237
238 /* Write to the LCD visible area. */
239 case HLCD_REDRAW:
240 hd44780_ddram_redraw(sc, hd44780_io());
241 break;
242
243 /* Write raw instruction. */
244 case HLCD_WRITE_INST:
245 hd44780_ir_write(sc, hd44780_io()->dat);
246 break;
247
248 /* Write raw data. */
249 case HLCD_WRITE_DATA:
250 hd44780_dr_write(sc, hd44780_io()->dat);
251 break;
252
253 default:
254 error = EINVAL;
255 }
256
257 if (sc->sc_flags & HD_TIMEDOUT)
258 error = EIO;
259
260 return error;
261 }
262
263 /*
264 * Read/write particular area of the LCD screen.
265 */
266 int
267 hd44780_ddram_io(sc, io, dir)
268 struct hd44780_chip *sc;
269 struct hd44780_io *io;
270 u_char dir;
271 {
272 u_int8_t hi;
273 u_int8_t addr;
274
275 int error = 0;
276 u_int8_t i = 0;
277
278 if (io->dat < sc->sc_vrows) {
279 hi = HD_ROW1_ADDR + sc->sc_vrows;
280 addr = HD_ROW1_ADDR + io->dat;
281 for (; (addr < hi) && (i < io->len); addr++, i++) {
282 hd44780_ir_write(sc, cmd_ddramset(addr));
283 if (dir == HD_DDRAM_READ)
284 io->buf[i] = hd44780_dr_read(sc);
285 else
286 hd44780_dr_write(sc, io->buf[i]);
287 }
288 }
289 if (io->dat < 2 * sc->sc_vrows) {
290 hi = HD_ROW2_ADDR + sc->sc_vrows;
291 if (io->dat >= sc->sc_vrows)
292 addr = HD_ROW2_ADDR + io->dat - sc->sc_vrows;
293 else
294 addr = HD_ROW2_ADDR;
295 for (; (addr < hi) && (i < io->len); addr++, i++) {
296 hd44780_ir_write(sc, cmd_ddramset(addr));
297 if (dir == HD_DDRAM_READ)
298 io->buf[i] = hd44780_dr_read(sc);
299 else
300 hd44780_dr_write(sc, io->buf[i]);
301 }
302 if (i < io->len)
303 io->len = i;
304 } else {
305 error = EINVAL;
306 }
307 return error;
308 }
309
310 /*
311 * Write to the visible area of the display.
312 */
313 void
314 hd44780_ddram_redraw(sc, io)
315 struct hd44780_chip *sc;
316 struct hd44780_io *io;
317 {
318 u_int8_t i;
319
320 hd44780_ir_write(sc, cmd_clear());
321 hd44780_ir_write(sc, cmd_rethome());
322 for (i = 0; (i < io->len) && (i < sc->sc_rows); i++) {
323 hd44780_dr_write(sc, io->buf[i]);
324 }
325 hd44780_ir_write(sc, cmd_ddramset(HD_ROW2_ADDR));
326 for (; (i < io->len); i++)
327 hd44780_dr_write(sc, io->buf[i]);
328 }
329
330 void
331 hd44780_busy_wait(sc)
332 struct hd44780_chip *sc;
333 {
334 int nloops = 100;
335
336 if (sc->sc_flags & HD_TIMEDOUT)
337 return;
338
339 while(nloops-- && (hd44780_ir_read(sc) & BUSY_FLAG) == BUSY_FLAG);
340
341 if (nloops == 0) {
342 sc->sc_flags |= HD_TIMEDOUT;
343 sc->sc_dev_ok = 0;
344 }
345 }
346
347 #if defined(HD44780_STD_WIDE)
348 /*
349 * Standard 8-bit version of 'sc_writereg' (8-bit port, 8-bit access)
350 */
351 void
352 hd44780_writereg(sc, reg, cmd)
353 struct hd44780_chip *sc;
354 u_int32_t reg;
355 u_int8_t cmd;
356 {
357 bus_space_tag_t iot = sc->sc_iot;
358 bus_space_handle_t ioh;
359
360 if (sc->sc_dev_ok == 0)
361 return;
362
363 if (reg == 0)
364 ioh = sc->sc_ioir;
365 else
366 ioh = sc->sc_iodr;
367
368 bus_space_write_1(iot, ioh, 0x00, cmd);
369 delay(HD_TIMEOUT_NORMAL);
370 }
371
372 /*
373 * Standard 8-bit version of 'sc_readreg' (8-bit port, 8-bit access)
374 */
375 u_int8_t
376 hd44780_readreg(sc, reg)
377 struct hd44780_chip *sc;
378 u_int32_t reg;
379 {
380 bus_space_tag_t iot = sc->sc_iot;
381 bus_space_handle_t ioh;
382
383 if (sc->sc_dev_ok == 0)
384 return;
385
386 if (reg == 0)
387 ioh = sc->sc_ioir;
388 else
389 ioh = sc->sc_iodr;
390
391 delay(HD_TIMEOUT_NORMAL);
392 return bus_space_read_1(iot, ioh, 0x00);
393 }
394 #elif defined(HD44780_STD_SHORT)
395 /*
396 * Standard 4-bit version of 'sc_writereg' (4-bit port, 8-bit access)
397 */
398 void
399 hd44780_writereg(sc, reg, cmd)
400 struct hd44780_chip *sc;
401 u_int32_t reg;
402 u_int8_t cmd;
403 {
404 bus_space_tag_t iot = sc->sc_iot;
405 bus_space_handle_t ioh;
406
407 if (sc->sc_dev_ok == 0)
408 return;
409
410 if (reg == 0)
411 ioh = sc->sc_ioir;
412 else
413 ioh = sc->sc_iodr;
414
415 bus_space_write_1(iot, ioh, 0x00, hi_bits(cmd));
416 if (sc->sc_flags & HD_UP)
417 bus_space_write_1(iot, ioh, 0x00, lo_bits(cmd));
418 delay(HD_TIMEOUT_NORMAL);
419 }
420
421 /*
422 * Standard 4-bit version of 'sc_readreg' (4-bit port, 8-bit access)
423 */
424 u_int8_t
425 hd44780_readreg(sc, reg)
426 struct hd44780_chip *sc;
427 u_int32_t reg;
428 {
429 bus_space_tag_t iot = sc->sc_iot;
430 bus_space_handle_t ioh;
431 u_int8_t rd, dat;
432
433 if (sc->sc_dev_ok == 0)
434 return;
435
436 if (reg == 0)
437 ioh = sc->sc_ioir;
438 else
439 ioh = sc->sc_iodr;
440
441 rd = bus_space_read_1(iot, ioh, 0x00);
442 dat = (rd & 0x0f) << 4;
443 rd = bus_space_read_1(iot, ioh, 0x00);
444 return (dat | (rd & 0x0f));
445 }
446 #endif
447