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hd64570.c revision 1.13
      1  1.13   thorpej /*	$NetBSD: hd64570.c,v 1.13 2000/12/18 20:32:08 thorpej Exp $	*/
      2   1.1  explorer 
      3   1.1  explorer /*
      4   1.8    chopps  * Copyright (c) 1999 Christian E. Hopps
      5   1.1  explorer  * Copyright (c) 1998 Vixie Enterprises
      6   1.1  explorer  * All rights reserved.
      7   1.1  explorer  *
      8   1.1  explorer  * Redistribution and use in source and binary forms, with or without
      9   1.1  explorer  * modification, are permitted provided that the following conditions
     10   1.1  explorer  * are met:
     11   1.1  explorer  *
     12   1.1  explorer  * 1. Redistributions of source code must retain the above copyright
     13   1.1  explorer  *    notice, this list of conditions and the following disclaimer.
     14   1.1  explorer  * 2. Redistributions in binary form must reproduce the above copyright
     15   1.1  explorer  *    notice, this list of conditions and the following disclaimer in the
     16   1.1  explorer  *    documentation and/or other materials provided with the distribution.
     17   1.1  explorer  * 3. Neither the name of Vixie Enterprises nor the names
     18   1.1  explorer  *    of its contributors may be used to endorse or promote products derived
     19   1.1  explorer  *    from this software without specific prior written permission.
     20   1.1  explorer  *
     21   1.1  explorer  * THIS SOFTWARE IS PROVIDED BY VIXIE ENTERPRISES AND
     22   1.1  explorer  * CONTRIBUTORS ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
     23   1.1  explorer  * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     24   1.1  explorer  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     25   1.1  explorer  * DISCLAIMED.  IN NO EVENT SHALL VIXIE ENTERPRISES OR
     26   1.1  explorer  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     27   1.1  explorer  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
     28   1.1  explorer  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
     29   1.1  explorer  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
     30   1.1  explorer  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     31   1.1  explorer  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
     32   1.1  explorer  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     33   1.1  explorer  * SUCH DAMAGE.
     34   1.1  explorer  *
     35   1.1  explorer  * This software has been written for Vixie Enterprises by Michael Graff
     36   1.1  explorer  * <explorer (at) flame.org>.  To learn more about Vixie Enterprises, see
     37   1.1  explorer  * ``http://www.vix.com''.
     38   1.7       erh  */
     39   1.7       erh 
     40   1.7       erh /*
     41   1.1  explorer  * TODO:
     42   1.1  explorer  *
     43   1.1  explorer  *	o  teach the receive logic about errors, and about long frames that
     44   1.1  explorer  *         span more than one input buffer.  (Right now, receive/transmit is
     45   1.1  explorer  *	   limited to one descriptor's buffer space, which is MTU + 4 bytes.
     46   1.1  explorer  *	   This is currently 1504, which is large enough to hold the HDLC
     47   1.1  explorer  *	   header and the packet itself.  Packets which are too long are
     48   1.1  explorer  *	   silently dropped on transmit and silently dropped on receive.
     49   1.1  explorer  *	o  write code to handle the msci interrupts, needed only for CD
     50   1.1  explorer  *	   and CTS changes.
     51   1.1  explorer  *	o  consider switching back to a "queue tx with DMA active" model which
     52   1.1  explorer  *	   should help sustain outgoing traffic
     53   1.1  explorer  *	o  through clever use of bus_dma*() functions, it should be possible
     54   1.1  explorer  *	   to map the mbuf's data area directly into a descriptor transmit
     55   1.1  explorer  *	   buffer, removing the need to allocate extra memory.  If, however,
     56   1.1  explorer  *	   we run out of descriptors for this, we will need to then allocate
     57   1.1  explorer  *	   one large mbuf, copy the fragmented chain into it, and put it onto
     58   1.1  explorer  *	   a single descriptor.
     59   1.1  explorer  *	o  use bus_dmamap_sync() with the right offset and lengths, rather
     60   1.1  explorer  *	   than cheating and always sync'ing the whole region.
     61   1.8    chopps  *
     62   1.8    chopps  *	o  perhaps allow rx and tx to be in more than one page
     63   1.8    chopps  *	   if not using dma.  currently the assumption is that
     64   1.8    chopps  *	   rx uses a page and tx uses a page.
     65   1.1  explorer  */
     66   1.1  explorer 
     67   1.1  explorer #include "bpfilter.h"
     68   1.9    chopps #include "opt_inet.h"
     69   1.9    chopps #include "opt_iso.h"
     70   1.1  explorer 
     71   1.1  explorer #include <sys/param.h>
     72   1.1  explorer #include <sys/systm.h>
     73   1.1  explorer #include <sys/device.h>
     74   1.1  explorer #include <sys/mbuf.h>
     75   1.1  explorer #include <sys/socket.h>
     76   1.1  explorer #include <sys/sockio.h>
     77   1.1  explorer #include <sys/kernel.h>
     78   1.1  explorer 
     79   1.1  explorer #include <net/if.h>
     80   1.1  explorer #include <net/if_types.h>
     81   1.1  explorer #include <net/netisr.h>
     82   1.1  explorer 
     83   1.9    chopps #ifdef INET
     84   1.1  explorer #include <netinet/in.h>
     85   1.1  explorer #include <netinet/in_systm.h>
     86   1.1  explorer #include <netinet/in_var.h>
     87   1.1  explorer #include <netinet/ip.h>
     88   1.9    chopps #endif
     89   1.9    chopps 
     90   1.9    chopps #ifdef ISO
     91   1.9    chopps #include <net/if_llc.h>
     92   1.9    chopps #include <netiso/iso.h>
     93   1.9    chopps #include <netiso/iso_var.h>
     94   1.9    chopps #endif
     95   1.1  explorer 
     96   1.1  explorer #if NBPFILTER > 0
     97   1.1  explorer #include <net/bpf.h>
     98   1.1  explorer #endif
     99   1.1  explorer 
    100   1.1  explorer #include <machine/cpu.h>
    101   1.1  explorer #include <machine/bus.h>
    102   1.1  explorer #include <machine/intr.h>
    103   1.1  explorer 
    104   1.1  explorer #include <dev/pci/pcivar.h>
    105   1.1  explorer #include <dev/pci/pcireg.h>
    106   1.1  explorer #include <dev/pci/pcidevs.h>
    107   1.1  explorer 
    108   1.1  explorer #include <dev/ic/hd64570reg.h>
    109   1.1  explorer #include <dev/ic/hd64570var.h>
    110   1.1  explorer 
    111   1.1  explorer #define SCA_DEBUG_RX		0x0001
    112   1.1  explorer #define SCA_DEBUG_TX		0x0002
    113   1.1  explorer #define SCA_DEBUG_CISCO		0x0004
    114   1.1  explorer #define SCA_DEBUG_DMA		0x0008
    115   1.1  explorer #define SCA_DEBUG_RXPKT		0x0010
    116   1.1  explorer #define SCA_DEBUG_TXPKT		0x0020
    117   1.1  explorer #define SCA_DEBUG_INTR		0x0040
    118   1.8    chopps #define SCA_DEBUG_CLOCK		0x0080
    119   1.1  explorer 
    120   1.1  explorer #if 0
    121   1.8    chopps #define SCA_DEBUG_LEVEL	( 0xFFFF )
    122   1.1  explorer #else
    123   1.1  explorer #define SCA_DEBUG_LEVEL 0
    124   1.1  explorer #endif
    125   1.1  explorer 
    126   1.1  explorer u_int32_t sca_debug = SCA_DEBUG_LEVEL;
    127   1.1  explorer 
    128   1.1  explorer #if SCA_DEBUG_LEVEL > 0
    129   1.1  explorer #define SCA_DPRINTF(l, x) do { \
    130   1.1  explorer 	if ((l) & sca_debug) \
    131   1.1  explorer 		printf x;\
    132   1.1  explorer 	} while (0)
    133   1.1  explorer #else
    134   1.1  explorer #define SCA_DPRINTF(l, x)
    135   1.1  explorer #endif
    136   1.1  explorer 
    137   1.1  explorer #if 0
    138   1.1  explorer #define SCA_USE_FASTQ		/* use a split queue, one for fast traffic */
    139   1.1  explorer #endif
    140   1.1  explorer 
    141   1.1  explorer static inline void msci_write_1(sca_port_t *, u_int, u_int8_t);
    142   1.1  explorer static inline u_int8_t msci_read_1(sca_port_t *, u_int);
    143   1.1  explorer 
    144   1.1  explorer static inline void dmac_write_1(sca_port_t *, u_int, u_int8_t);
    145   1.1  explorer static inline void dmac_write_2(sca_port_t *, u_int, u_int16_t);
    146   1.1  explorer static inline u_int8_t dmac_read_1(sca_port_t *, u_int);
    147   1.1  explorer static inline u_int16_t dmac_read_2(sca_port_t *, u_int);
    148   1.1  explorer 
    149   1.1  explorer static	void sca_msci_init(struct sca_softc *, sca_port_t *);
    150   1.1  explorer static	void sca_dmac_init(struct sca_softc *, sca_port_t *);
    151   1.1  explorer static void sca_dmac_rxinit(sca_port_t *);
    152   1.1  explorer 
    153   1.1  explorer static	int sca_dmac_intr(sca_port_t *, u_int8_t);
    154   1.8    chopps static	int sca_msci_intr(sca_port_t *, u_int8_t);
    155   1.1  explorer 
    156   1.1  explorer static	void sca_get_packets(sca_port_t *);
    157   1.8    chopps static	int sca_frame_avail(sca_port_t *);
    158   1.8    chopps static	void sca_frame_process(sca_port_t *);
    159   1.8    chopps static	void sca_frame_read_done(sca_port_t *);
    160   1.1  explorer 
    161   1.1  explorer static	void sca_port_starttx(sca_port_t *);
    162   1.1  explorer 
    163   1.1  explorer static	void sca_port_up(sca_port_t *);
    164   1.1  explorer static	void sca_port_down(sca_port_t *);
    165   1.1  explorer 
    166   1.1  explorer static	int sca_output __P((struct ifnet *, struct mbuf *, struct sockaddr *,
    167   1.1  explorer 			    struct rtentry *));
    168   1.1  explorer static	int sca_ioctl __P((struct ifnet *, u_long, caddr_t));
    169   1.1  explorer static	void sca_start __P((struct ifnet *));
    170   1.1  explorer static	void sca_watchdog __P((struct ifnet *));
    171   1.1  explorer 
    172   1.8    chopps static struct mbuf *sca_mbuf_alloc(struct sca_softc *, caddr_t, u_int);
    173   1.1  explorer 
    174   1.1  explorer #if SCA_DEBUG_LEVEL > 0
    175   1.1  explorer static	void sca_frame_print(sca_port_t *, sca_desc_t *, u_int8_t *);
    176   1.1  explorer #endif
    177   1.1  explorer 
    178   1.1  explorer 
    179   1.8    chopps #define	sca_read_1(sc, reg)		(sc)->sc_read_1(sc, reg)
    180   1.8    chopps #define	sca_read_2(sc, reg)		(sc)->sc_read_2(sc, reg)
    181   1.8    chopps #define	sca_write_1(sc, reg, val)	(sc)->sc_write_1(sc, reg, val)
    182   1.8    chopps #define	sca_write_2(sc, reg, val)	(sc)->sc_write_2(sc, reg, val)
    183   1.1  explorer 
    184   1.8    chopps #define	sca_page_addr(sc, addr)	((bus_addr_t)(addr) & (sc)->scu_pagemask)
    185   1.1  explorer 
    186   1.1  explorer static inline void
    187   1.1  explorer msci_write_1(sca_port_t *scp, u_int reg, u_int8_t val)
    188   1.1  explorer {
    189   1.1  explorer 	sca_write_1(scp->sca, scp->msci_off + reg, val);
    190   1.1  explorer }
    191   1.1  explorer 
    192   1.1  explorer static inline u_int8_t
    193   1.1  explorer msci_read_1(sca_port_t *scp, u_int reg)
    194   1.1  explorer {
    195   1.1  explorer 	return sca_read_1(scp->sca, scp->msci_off + reg);
    196   1.1  explorer }
    197   1.1  explorer 
    198   1.1  explorer static inline void
    199   1.1  explorer dmac_write_1(sca_port_t *scp, u_int reg, u_int8_t val)
    200   1.1  explorer {
    201   1.1  explorer 	sca_write_1(scp->sca, scp->dmac_off + reg, val);
    202   1.1  explorer }
    203   1.1  explorer 
    204   1.1  explorer static inline void
    205   1.1  explorer dmac_write_2(sca_port_t *scp, u_int reg, u_int16_t val)
    206   1.1  explorer {
    207   1.1  explorer 	sca_write_2(scp->sca, scp->dmac_off + reg, val);
    208   1.1  explorer }
    209   1.1  explorer 
    210   1.1  explorer static inline u_int8_t
    211   1.1  explorer dmac_read_1(sca_port_t *scp, u_int reg)
    212   1.1  explorer {
    213   1.1  explorer 	return sca_read_1(scp->sca, scp->dmac_off + reg);
    214   1.1  explorer }
    215   1.1  explorer 
    216   1.1  explorer static inline u_int16_t
    217   1.1  explorer dmac_read_2(sca_port_t *scp, u_int reg)
    218   1.1  explorer {
    219   1.1  explorer 	return sca_read_2(scp->sca, scp->dmac_off + reg);
    220   1.1  explorer }
    221   1.1  explorer 
    222   1.8    chopps /*
    223   1.8    chopps  * read the chain pointer
    224   1.8    chopps  */
    225   1.8    chopps static inline u_int16_t
    226   1.8    chopps sca_desc_read_chainp(struct sca_softc *sc, struct sca_desc *dp)
    227   1.8    chopps {
    228   1.8    chopps 	if (sc->sc_usedma)
    229   1.8    chopps 		return ((dp)->sd_chainp);
    230   1.8    chopps 	return (bus_space_read_2(sc->scu_memt, sc->scu_memh,
    231   1.8    chopps 	    sca_page_addr(sc, dp) + offsetof(struct sca_desc, sd_chainp)));
    232   1.8    chopps }
    233   1.8    chopps 
    234   1.8    chopps /*
    235   1.8    chopps  * write the chain pointer
    236   1.8    chopps  */
    237   1.8    chopps static inline void
    238   1.8    chopps sca_desc_write_chainp(struct sca_softc *sc, struct sca_desc *dp, u_int16_t cp)
    239   1.8    chopps {
    240   1.8    chopps 	if (sc->sc_usedma)
    241   1.8    chopps 		(dp)->sd_chainp = cp;
    242   1.8    chopps 	else
    243   1.8    chopps 		bus_space_write_2(sc->scu_memt, sc->scu_memh,
    244   1.8    chopps 		    sca_page_addr(sc, dp)
    245   1.8    chopps 		    + offsetof(struct sca_desc, sd_chainp), cp);
    246   1.8    chopps }
    247   1.8    chopps 
    248   1.8    chopps /*
    249   1.8    chopps  * read the buffer pointer
    250   1.8    chopps  */
    251   1.8    chopps static inline u_int32_t
    252   1.8    chopps sca_desc_read_bufp(struct sca_softc *sc, struct sca_desc *dp)
    253   1.8    chopps {
    254   1.8    chopps 	u_int32_t address;
    255   1.8    chopps 
    256   1.8    chopps 	if (sc->sc_usedma)
    257   1.8    chopps 		address = dp->sd_bufp | dp->sd_hbufp << 16;
    258   1.8    chopps 	else {
    259   1.8    chopps 		address = bus_space_read_2(sc->scu_memt, sc->scu_memh,
    260   1.8    chopps 		    sca_page_addr(sc, dp) + offsetof(struct sca_desc, sd_bufp));
    261   1.8    chopps 		address |= bus_space_read_1(sc->scu_memt, sc->scu_memh,
    262   1.8    chopps 		    sca_page_addr(sc, dp)
    263   1.8    chopps 		    + offsetof(struct sca_desc, sd_hbufp)) << 16;
    264   1.8    chopps 	}
    265   1.8    chopps 	return (address);
    266   1.8    chopps }
    267   1.8    chopps 
    268   1.8    chopps /*
    269   1.8    chopps  * write the buffer pointer
    270   1.8    chopps  */
    271   1.8    chopps static inline void
    272   1.8    chopps sca_desc_write_bufp(struct sca_softc *sc, struct sca_desc *dp, u_int32_t bufp)
    273   1.8    chopps {
    274   1.8    chopps 	if (sc->sc_usedma) {
    275   1.8    chopps 		dp->sd_bufp = bufp & 0xFFFF;
    276   1.8    chopps 		dp->sd_hbufp = (bufp & 0x00FF0000) >> 16;
    277   1.8    chopps 	} else {
    278   1.8    chopps 		bus_space_write_2(sc->scu_memt, sc->scu_memh,
    279   1.8    chopps 		    sca_page_addr(sc, dp) + offsetof(struct sca_desc, sd_bufp),
    280   1.8    chopps 		    bufp & 0xFFFF);
    281   1.8    chopps 		bus_space_write_1(sc->scu_memt, sc->scu_memh,
    282   1.8    chopps 		    sca_page_addr(sc, dp) + offsetof(struct sca_desc, sd_hbufp),
    283   1.8    chopps 		    (bufp & 0x00FF0000) >> 16);
    284   1.8    chopps 	}
    285   1.8    chopps }
    286   1.8    chopps 
    287   1.8    chopps /*
    288   1.8    chopps  * read the buffer length
    289   1.8    chopps  */
    290   1.8    chopps static inline u_int16_t
    291   1.8    chopps sca_desc_read_buflen(struct sca_softc *sc, struct sca_desc *dp)
    292   1.8    chopps {
    293   1.8    chopps 	if (sc->sc_usedma)
    294   1.8    chopps 		return ((dp)->sd_buflen);
    295   1.8    chopps 	return (bus_space_read_2(sc->scu_memt, sc->scu_memh,
    296   1.8    chopps 	    sca_page_addr(sc, dp) + offsetof(struct sca_desc, sd_buflen)));
    297   1.8    chopps }
    298   1.8    chopps 
    299   1.8    chopps /*
    300   1.8    chopps  * write the buffer length
    301   1.8    chopps  */
    302   1.8    chopps static inline void
    303   1.8    chopps sca_desc_write_buflen(struct sca_softc *sc, struct sca_desc *dp, u_int16_t len)
    304   1.8    chopps {
    305   1.8    chopps 	if (sc->sc_usedma)
    306   1.8    chopps 		(dp)->sd_buflen = len;
    307   1.8    chopps 	else
    308   1.8    chopps 		bus_space_write_2(sc->scu_memt, sc->scu_memh,
    309   1.8    chopps 		    sca_page_addr(sc, dp)
    310   1.8    chopps 		    + offsetof(struct sca_desc, sd_buflen), len);
    311   1.8    chopps }
    312   1.8    chopps 
    313   1.8    chopps /*
    314   1.8    chopps  * read the descriptor status
    315   1.8    chopps  */
    316   1.8    chopps static inline u_int8_t
    317   1.8    chopps sca_desc_read_stat(struct sca_softc *sc, struct sca_desc *dp)
    318   1.1  explorer {
    319   1.8    chopps 	if (sc->sc_usedma)
    320   1.8    chopps 		return ((dp)->sd_stat);
    321   1.8    chopps 	return (bus_space_read_1(sc->scu_memt, sc->scu_memh,
    322   1.8    chopps 	    sca_page_addr(sc, dp) + offsetof(struct sca_desc, sd_stat)));
    323   1.8    chopps }
    324   1.1  explorer 
    325   1.8    chopps /*
    326   1.8    chopps  * write the descriptor status
    327   1.8    chopps  */
    328   1.8    chopps static inline void
    329   1.8    chopps sca_desc_write_stat(struct sca_softc *sc, struct sca_desc *dp, u_int8_t stat)
    330   1.8    chopps {
    331   1.8    chopps 	if (sc->sc_usedma)
    332   1.8    chopps 		(dp)->sd_stat = stat;
    333   1.8    chopps 	else
    334   1.8    chopps 		bus_space_write_1(sc->scu_memt, sc->scu_memh,
    335   1.8    chopps 		    sca_page_addr(sc, dp) + offsetof(struct sca_desc, sd_stat),
    336   1.8    chopps 		    stat);
    337   1.8    chopps }
    338   1.1  explorer 
    339   1.8    chopps void
    340   1.8    chopps sca_init(struct sca_softc *sc)
    341   1.8    chopps {
    342   1.1  explorer 	/*
    343   1.8    chopps 	 * Do a little sanity check:  check number of ports.
    344   1.1  explorer 	 */
    345   1.8    chopps 	if (sc->sc_numports < 1 || sc->sc_numports > 2)
    346   1.8    chopps 		panic("sca can\'t handle more than 2 or less than 1 ports");
    347   1.1  explorer 
    348   1.1  explorer 	/*
    349   1.1  explorer 	 * disable DMA and MSCI interrupts
    350   1.1  explorer 	 */
    351   1.1  explorer 	sca_write_1(sc, SCA_DMER, 0);
    352   1.1  explorer 	sca_write_1(sc, SCA_IER0, 0);
    353   1.1  explorer 	sca_write_1(sc, SCA_IER1, 0);
    354   1.1  explorer 	sca_write_1(sc, SCA_IER2, 0);
    355   1.1  explorer 
    356   1.1  explorer 	/*
    357   1.1  explorer 	 * configure interrupt system
    358   1.1  explorer 	 */
    359   1.8    chopps 	sca_write_1(sc, SCA_ITCR,
    360   1.8    chopps 	    SCA_ITCR_INTR_PRI_MSCI | SCA_ITCR_ACK_NONE | SCA_ITCR_VOUT_IVR);
    361   1.8    chopps #if 0
    362   1.8    chopps 	/* these are for the intrerrupt ack cycle which we don't use */
    363   1.1  explorer 	sca_write_1(sc, SCA_IVR, 0x40);
    364   1.1  explorer 	sca_write_1(sc, SCA_IMVR, 0x40);
    365   1.8    chopps #endif
    366   1.1  explorer 
    367   1.1  explorer 	/*
    368   1.1  explorer 	 * set wait control register to zero wait states
    369   1.1  explorer 	 */
    370   1.1  explorer 	sca_write_1(sc, SCA_PABR0, 0);
    371   1.1  explorer 	sca_write_1(sc, SCA_PABR1, 0);
    372   1.1  explorer 	sca_write_1(sc, SCA_WCRL, 0);
    373   1.1  explorer 	sca_write_1(sc, SCA_WCRM, 0);
    374   1.1  explorer 	sca_write_1(sc, SCA_WCRH, 0);
    375   1.1  explorer 
    376   1.1  explorer 	/*
    377   1.1  explorer 	 * disable DMA and reset status
    378   1.1  explorer 	 */
    379   1.1  explorer 	sca_write_1(sc, SCA_PCR, SCA_PCR_PR2);
    380   1.1  explorer 
    381   1.1  explorer 	/*
    382   1.1  explorer 	 * disable transmit DMA for all channels
    383   1.1  explorer 	 */
    384   1.1  explorer 	sca_write_1(sc, SCA_DSR0 + SCA_DMAC_OFF_0, 0);
    385   1.1  explorer 	sca_write_1(sc, SCA_DCR0 + SCA_DMAC_OFF_0, SCA_DCR_ABRT);
    386   1.1  explorer 	sca_write_1(sc, SCA_DSR1 + SCA_DMAC_OFF_0, 0);
    387   1.1  explorer 	sca_write_1(sc, SCA_DCR1 + SCA_DMAC_OFF_0, SCA_DCR_ABRT);
    388   1.1  explorer 	sca_write_1(sc, SCA_DSR0 + SCA_DMAC_OFF_1, 0);
    389   1.1  explorer 	sca_write_1(sc, SCA_DCR0 + SCA_DMAC_OFF_1, SCA_DCR_ABRT);
    390   1.1  explorer 	sca_write_1(sc, SCA_DSR1 + SCA_DMAC_OFF_1, 0);
    391   1.1  explorer 	sca_write_1(sc, SCA_DCR1 + SCA_DMAC_OFF_1, SCA_DCR_ABRT);
    392   1.1  explorer 
    393   1.1  explorer 	/*
    394   1.1  explorer 	 * enable DMA based on channel enable flags for each channel
    395   1.1  explorer 	 */
    396   1.1  explorer 	sca_write_1(sc, SCA_DMER, SCA_DMER_EN);
    397   1.1  explorer 
    398   1.1  explorer 	/*
    399   1.1  explorer 	 * Should check to see if the chip is responding, but for now
    400   1.1  explorer 	 * assume it is.
    401   1.1  explorer 	 */
    402   1.1  explorer }
    403   1.1  explorer 
    404   1.1  explorer /*
    405   1.1  explorer  * initialize the port and attach it to the networking layer
    406   1.1  explorer  */
    407   1.1  explorer void
    408   1.1  explorer sca_port_attach(struct sca_softc *sc, u_int port)
    409   1.1  explorer {
    410   1.1  explorer 	sca_port_t *scp = &sc->sc_ports[port];
    411   1.1  explorer 	struct ifnet *ifp;
    412   1.1  explorer 	static u_int ntwo_unit = 0;
    413   1.1  explorer 
    414   1.1  explorer 	scp->sca = sc;  /* point back to the parent */
    415   1.1  explorer 
    416   1.1  explorer 	scp->sp_port = port;
    417   1.1  explorer 
    418   1.1  explorer 	if (port == 0) {
    419   1.1  explorer 		scp->msci_off = SCA_MSCI_OFF_0;
    420   1.1  explorer 		scp->dmac_off = SCA_DMAC_OFF_0;
    421   1.8    chopps 		if(sc->sc_parent != NULL)
    422   1.8    chopps 			ntwo_unit=sc->sc_parent->dv_unit * 2 + 0;
    423   1.4       tls 		else
    424   1.4       tls 			ntwo_unit = 0;	/* XXX */
    425   1.1  explorer 	} else {
    426   1.1  explorer 		scp->msci_off = SCA_MSCI_OFF_1;
    427   1.1  explorer 		scp->dmac_off = SCA_DMAC_OFF_1;
    428   1.8    chopps 		if(sc->sc_parent != NULL)
    429   1.8    chopps 			ntwo_unit=sc->sc_parent->dv_unit * 2 + 1;
    430   1.4       tls 		else
    431   1.4       tls 			ntwo_unit = 1;	/* XXX */
    432   1.1  explorer 	}
    433   1.1  explorer 
    434   1.1  explorer 	sca_msci_init(sc, scp);
    435   1.1  explorer 	sca_dmac_init(sc, scp);
    436   1.1  explorer 
    437   1.1  explorer 	/*
    438   1.1  explorer 	 * attach to the network layer
    439   1.1  explorer 	 */
    440   1.1  explorer 	ifp = &scp->sp_if;
    441   1.1  explorer 	sprintf(ifp->if_xname, "ntwo%d", ntwo_unit);
    442   1.1  explorer 	ifp->if_softc = scp;
    443   1.1  explorer 	ifp->if_mtu = SCA_MTU;
    444   1.1  explorer 	ifp->if_flags = IFF_POINTOPOINT | IFF_MULTICAST;
    445   1.9    chopps 	ifp->if_type = IFT_PTPSERIAL;
    446   1.1  explorer 	ifp->if_hdrlen = HDLC_HDRLEN;
    447   1.1  explorer 	ifp->if_ioctl = sca_ioctl;
    448   1.1  explorer 	ifp->if_output = sca_output;
    449   1.1  explorer 	ifp->if_watchdog = sca_watchdog;
    450   1.1  explorer 	ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
    451   1.1  explorer 	scp->linkq.ifq_maxlen = 5; /* if we exceed this we are hosed already */
    452   1.1  explorer #ifdef SCA_USE_FASTQ
    453   1.1  explorer 	scp->fastq.ifq_maxlen = IFQ_MAXLEN;
    454   1.1  explorer #endif
    455   1.1  explorer 	if_attach(ifp);
    456   1.1  explorer 
    457   1.1  explorer #if NBPFILTER > 0
    458  1.12   thorpej 	bpfattach(ifp, DLT_HDLC, HDLC_HDRLEN);
    459   1.1  explorer #endif
    460   1.1  explorer 
    461   1.8    chopps 	if (sc->sc_parent == NULL)
    462   1.1  explorer 		printf("%s: port %d\n", ifp->if_xname, port);
    463   1.1  explorer 	else
    464   1.1  explorer 		printf("%s at %s port %d\n",
    465   1.8    chopps 		       ifp->if_xname, sc->sc_parent->dv_xname, port);
    466   1.1  explorer 
    467   1.1  explorer 	/*
    468   1.1  explorer 	 * reset the last seen times on the cisco keepalive protocol
    469   1.1  explorer 	 */
    470   1.1  explorer 	scp->cka_lasttx = time.tv_usec;
    471   1.1  explorer 	scp->cka_lastrx = 0;
    472   1.1  explorer }
    473   1.1  explorer 
    474   1.8    chopps #if 0
    475   1.8    chopps /*
    476   1.8    chopps  * returns log2(div), sets 'tmc' for the required freq 'hz'
    477   1.8    chopps  */
    478   1.8    chopps static u_int8_t
    479   1.8    chopps sca_msci_get_baud_rate_values(u_int32_t hz, u_int8_t *tmcp)
    480   1.8    chopps {
    481   1.8    chopps 	u_int32_t tmc, div;
    482   1.8    chopps 	u_int32_t clock;
    483   1.8    chopps 
    484   1.8    chopps 	/* clock hz = (chipclock / tmc) / 2^(div); */
    485   1.8    chopps 	/*
    486   1.8    chopps 	 * TD == tmc * 2^(n)
    487   1.8    chopps 	 *
    488   1.8    chopps 	 * note:
    489   1.8    chopps 	 * 1 <= TD <= 256		TD is inc of 1
    490   1.8    chopps 	 * 2 <= TD <= 512		TD is inc of 2
    491   1.8    chopps 	 * 4 <= TD <= 1024		TD is inc of 4
    492   1.8    chopps 	 * ...
    493   1.8    chopps 	 * 512 <= TD <= 256*512		TD is inc of 512
    494   1.8    chopps 	 *
    495   1.8    chopps 	 * so note there are overlaps.  We lose prec
    496   1.8    chopps 	 * as div increases so we wish to minize div.
    497   1.8    chopps 	 *
    498   1.8    chopps 	 * basically we want to do
    499   1.8    chopps 	 *
    500   1.8    chopps 	 * tmc = chip / hz, but have tmc <= 256
    501   1.8    chopps 	 */
    502   1.8    chopps 
    503   1.8    chopps 	/* assume system clock is 9.8304Mhz or 9830400hz */
    504   1.8    chopps 	clock = clock = 9830400 >> 1;
    505   1.8    chopps 
    506   1.8    chopps 	/* round down */
    507   1.8    chopps 	div = 0;
    508   1.8    chopps 	while ((tmc = clock / hz) > 256 || (tmc == 256 && (clock / tmc) > hz)) {
    509   1.8    chopps 		clock >>= 1;
    510   1.8    chopps 		div++;
    511   1.8    chopps 	}
    512   1.8    chopps 	if (clock / tmc > hz)
    513   1.8    chopps 		tmc++;
    514   1.8    chopps 	if (!tmc)
    515   1.8    chopps 		tmc = 1;
    516   1.8    chopps 
    517   1.8    chopps 	if (div > SCA_RXS_DIV_512) {
    518   1.8    chopps 		/* set to maximums */
    519   1.8    chopps 		div = SCA_RXS_DIV_512;
    520   1.8    chopps 		tmc = 0;
    521   1.8    chopps 	}
    522   1.8    chopps 
    523   1.8    chopps 	*tmcp = (tmc & 0xFF);	/* 0 == 256 */
    524   1.8    chopps 	return (div & 0xFF);
    525   1.8    chopps }
    526   1.8    chopps #endif
    527   1.8    chopps 
    528   1.1  explorer /*
    529   1.1  explorer  * initialize the port's MSCI
    530   1.1  explorer  */
    531   1.1  explorer static void
    532   1.1  explorer sca_msci_init(struct sca_softc *sc, sca_port_t *scp)
    533   1.1  explorer {
    534   1.8    chopps 	/* reset the channel */
    535   1.1  explorer 	msci_write_1(scp, SCA_CMD0, SCA_CMD_RESET);
    536   1.8    chopps 
    537   1.1  explorer 	msci_write_1(scp, SCA_MD00,
    538   1.1  explorer 		     (  SCA_MD0_CRC_1
    539   1.1  explorer 		      | SCA_MD0_CRC_CCITT
    540   1.1  explorer 		      | SCA_MD0_CRC_ENABLE
    541   1.1  explorer 		      | SCA_MD0_MODE_HDLC));
    542   1.8    chopps #if 0
    543   1.8    chopps 	/* immediately send receive reset so the above takes */
    544   1.8    chopps 	msci_write_1(scp, SCA_CMD0, SCA_CMD_RXRESET);
    545   1.8    chopps #endif
    546   1.8    chopps 
    547   1.1  explorer 	msci_write_1(scp, SCA_MD10, SCA_MD1_NOADDRCHK);
    548   1.1  explorer 	msci_write_1(scp, SCA_MD20,
    549   1.8    chopps 		     (SCA_MD2_DUPLEX | SCA_MD2_ADPLLx8 | SCA_MD2_NRZ));
    550   1.1  explorer 
    551   1.8    chopps 	/* be safe and do it again */
    552   1.1  explorer 	msci_write_1(scp, SCA_CMD0, SCA_CMD_RXRESET);
    553   1.8    chopps 
    554   1.8    chopps 	/* setup underrun and idle control, and initial RTS state */
    555   1.1  explorer 	msci_write_1(scp, SCA_CTL0,
    556   1.8    chopps 	     (SCA_CTL_IDLC_PATTERN
    557   1.8    chopps 	     | SCA_CTL_UDRNC_AFTER_FCS
    558   1.8    chopps 	     | SCA_CTL_RTS_LOW));
    559   1.8    chopps 
    560   1.8    chopps 	/* reset the transmitter */
    561   1.1  explorer 	msci_write_1(scp, SCA_CMD0, SCA_CMD_TXRESET);
    562   1.1  explorer 
    563   1.1  explorer 	/*
    564   1.8    chopps 	 * set the clock sources
    565   1.1  explorer 	 */
    566   1.8    chopps 	msci_write_1(scp, SCA_RXS0, scp->sp_rxs);
    567   1.8    chopps 	msci_write_1(scp, SCA_TXS0, scp->sp_txs);
    568   1.8    chopps 	msci_write_1(scp, SCA_TMC0, scp->sp_tmc);
    569   1.8    chopps 
    570   1.8    chopps 	/* set external clock generate as requested */
    571   1.8    chopps 	sc->sc_clock_callback(sc->sc_aux, scp->sp_port, scp->sp_eclock);
    572   1.1  explorer 
    573   1.1  explorer 	/*
    574   1.1  explorer 	 * XXX don't pay attention to CTS or CD changes right now.  I can't
    575   1.1  explorer 	 * simulate one, and the transmitter will try to transmit even if
    576   1.1  explorer 	 * CD isn't there anyway, so nothing bad SHOULD happen.
    577   1.1  explorer 	 */
    578   1.8    chopps #if 0
    579   1.1  explorer 	msci_write_1(scp, SCA_IE00, 0);
    580   1.1  explorer 	msci_write_1(scp, SCA_IE10, 0); /* 0x0c == CD and CTS changes only */
    581   1.8    chopps #else
    582   1.8    chopps 	/* this would deliver transmitter underrun to ST1/ISR1 */
    583   1.8    chopps 	msci_write_1(scp, SCA_IE10, SCA_ST1_UDRN);
    584   1.8    chopps 	msci_write_1(scp, SCA_IE00, SCA_ST0_TXINT);
    585   1.8    chopps #endif
    586   1.1  explorer 	msci_write_1(scp, SCA_IE20, 0);
    587   1.8    chopps 
    588   1.1  explorer 	msci_write_1(scp, SCA_FIE0, 0);
    589   1.1  explorer 
    590   1.1  explorer 	msci_write_1(scp, SCA_SA00, 0);
    591   1.1  explorer 	msci_write_1(scp, SCA_SA10, 0);
    592   1.1  explorer 
    593   1.1  explorer 	msci_write_1(scp, SCA_IDL0, 0x7e);
    594   1.1  explorer 
    595   1.1  explorer 	msci_write_1(scp, SCA_RRC0, 0x0e);
    596   1.8    chopps 	/* msci_write_1(scp, SCA_TRC00, 0x10); */
    597   1.8    chopps 	/*
    598   1.8    chopps 	 * the correct values here are important for avoiding underruns
    599   1.8    chopps 	 * for any value less than or equal to TRC0 txrdy is activated
    600   1.8    chopps 	 * which will start the dmac transfer to the fifo.
    601   1.8    chopps 	 * for buffer size >= TRC1 + 1 txrdy is cleared which will stop dma.
    602   1.8    chopps 	 *
    603   1.8    chopps 	 * thus if we are using a very fast clock that empties the fifo
    604   1.8    chopps 	 * quickly, delays in the dmac starting to fill the fifo can
    605   1.8    chopps 	 * lead to underruns so we want a fairly full fifo to still
    606   1.8    chopps 	 * cause the dmac to start.  for cards with on board ram this
    607   1.8    chopps 	 * has no effect on system performance.  For cards that dma
    608   1.8    chopps 	 * to/from system memory it will cause more, shorter,
    609   1.8    chopps 	 * bus accesses rather than fewer longer ones.
    610   1.8    chopps 	 */
    611   1.8    chopps 	msci_write_1(scp, SCA_TRC00, 0x00);
    612   1.1  explorer 	msci_write_1(scp, SCA_TRC10, 0x1f);
    613   1.1  explorer }
    614   1.1  explorer 
    615   1.1  explorer /*
    616   1.1  explorer  * Take the memory for the port and construct two circular linked lists of
    617   1.1  explorer  * descriptors (one tx, one rx) and set the pointers in these descriptors
    618   1.1  explorer  * to point to the buffer space for this port.
    619   1.1  explorer  */
    620   1.1  explorer static void
    621   1.1  explorer sca_dmac_init(struct sca_softc *sc, sca_port_t *scp)
    622   1.1  explorer {
    623   1.1  explorer 	sca_desc_t *desc;
    624   1.1  explorer 	u_int32_t desc_p;
    625   1.1  explorer 	u_int32_t buf_p;
    626   1.1  explorer 	int i;
    627   1.1  explorer 
    628   1.8    chopps 	if (sc->sc_usedma)
    629   1.8    chopps 		bus_dmamap_sync(sc->scu_dmat, sc->scu_dmam, 0, sc->scu_allocsize,
    630   1.8    chopps 		    BUS_DMASYNC_PREWRITE);
    631   1.8    chopps 	else {
    632   1.8    chopps 		/*
    633   1.8    chopps 		 * XXX assumes that all tx desc and bufs in same page
    634   1.8    chopps 		 */
    635   1.8    chopps 		sc->scu_page_on(sc);
    636   1.8    chopps 		sc->scu_set_page(sc, scp->sp_txdesc_p);
    637   1.8    chopps 	}
    638   1.1  explorer 
    639   1.8    chopps 	desc = scp->sp_txdesc;
    640   1.8    chopps 	desc_p = scp->sp_txdesc_p;
    641   1.8    chopps 	buf_p = scp->sp_txbuf_p;
    642   1.8    chopps 	scp->sp_txcur = 0;
    643   1.8    chopps 	scp->sp_txinuse = 0;
    644   1.8    chopps 
    645   1.8    chopps #ifdef DEBUG
    646   1.8    chopps 	/* make sure that we won't wrap */
    647   1.8    chopps 	if ((desc_p & 0xffff0000) !=
    648   1.8    chopps 	    ((desc_p + sizeof(*desc) * scp->sp_ntxdesc) & 0xffff0000))
    649   1.8    chopps 		panic("sca: tx descriptors cross architecural boundry");
    650   1.8    chopps 	if ((buf_p & 0xff000000) !=
    651   1.8    chopps 	    ((buf_p + SCA_BSIZE * scp->sp_ntxdesc) & 0xff000000))
    652   1.8    chopps 		panic("sca: tx buffers cross architecural boundry");
    653   1.8    chopps #endif
    654   1.1  explorer 
    655   1.8    chopps 	for (i = 0 ; i < scp->sp_ntxdesc ; i++) {
    656   1.1  explorer 		/*
    657   1.1  explorer 		 * desc_p points to the physcial address of the NEXT desc
    658   1.1  explorer 		 */
    659   1.1  explorer 		desc_p += sizeof(sca_desc_t);
    660   1.1  explorer 
    661   1.8    chopps 		sca_desc_write_chainp(sc, desc, desc_p & 0x0000ffff);
    662   1.8    chopps 		sca_desc_write_bufp(sc, desc, buf_p);
    663   1.8    chopps 		sca_desc_write_buflen(sc, desc, SCA_BSIZE);
    664   1.8    chopps 		sca_desc_write_stat(sc, desc, 0);
    665   1.1  explorer 
    666   1.1  explorer 		desc++;  /* point to the next descriptor */
    667   1.1  explorer 		buf_p += SCA_BSIZE;
    668   1.1  explorer 	}
    669   1.1  explorer 
    670   1.1  explorer 	/*
    671   1.1  explorer 	 * "heal" the circular list by making the last entry point to the
    672   1.1  explorer 	 * first.
    673   1.1  explorer 	 */
    674   1.8    chopps 	sca_desc_write_chainp(sc, desc - 1, scp->sp_txdesc_p & 0x0000ffff);
    675   1.1  explorer 
    676   1.1  explorer 	/*
    677   1.1  explorer 	 * Now, initialize the transmit DMA logic
    678   1.1  explorer 	 *
    679   1.1  explorer 	 * CPB == chain pointer base address
    680   1.1  explorer 	 */
    681   1.1  explorer 	dmac_write_1(scp, SCA_DSR1, 0);
    682   1.1  explorer 	dmac_write_1(scp, SCA_DCR1, SCA_DCR_ABRT);
    683   1.1  explorer 	dmac_write_1(scp, SCA_DMR1, SCA_DMR_TMOD | SCA_DMR_NF);
    684   1.8    chopps 	/* XXX1
    685   1.1  explorer 	dmac_write_1(scp, SCA_DIR1,
    686   1.1  explorer 		     (SCA_DIR_EOT | SCA_DIR_BOF | SCA_DIR_COF));
    687   1.8    chopps 	 */
    688   1.8    chopps 	dmac_write_1(scp, SCA_DIR1,
    689   1.8    chopps 		     (SCA_DIR_EOM | SCA_DIR_EOT | SCA_DIR_BOF | SCA_DIR_COF));
    690   1.1  explorer 	dmac_write_1(scp, SCA_CPB1,
    691   1.8    chopps 		     (u_int8_t)((scp->sp_txdesc_p & 0x00ff0000) >> 16));
    692   1.1  explorer 
    693   1.1  explorer 	/*
    694   1.1  explorer 	 * now, do the same thing for receive descriptors
    695   1.8    chopps 	 *
    696   1.8    chopps 	 * XXX assumes that all rx desc and bufs in same page
    697   1.1  explorer 	 */
    698   1.8    chopps 	if (!sc->sc_usedma)
    699   1.8    chopps 		sc->scu_set_page(sc, scp->sp_rxdesc_p);
    700   1.1  explorer 
    701   1.8    chopps 	desc = scp->sp_rxdesc;
    702   1.8    chopps 	desc_p = scp->sp_rxdesc_p;
    703   1.8    chopps 	buf_p = scp->sp_rxbuf_p;
    704   1.8    chopps 
    705   1.8    chopps #ifdef DEBUG
    706   1.8    chopps 	/* make sure that we won't wrap */
    707   1.8    chopps 	if ((desc_p & 0xffff0000) !=
    708   1.8    chopps 	    ((desc_p + sizeof(*desc) * scp->sp_nrxdesc) & 0xffff0000))
    709   1.8    chopps 		panic("sca: rx descriptors cross architecural boundry");
    710   1.8    chopps 	if ((buf_p & 0xff000000) !=
    711   1.8    chopps 	    ((buf_p + SCA_BSIZE * scp->sp_nrxdesc) & 0xff000000))
    712   1.8    chopps 		panic("sca: rx buffers cross architecural boundry");
    713   1.8    chopps #endif
    714   1.8    chopps 
    715   1.8    chopps 	for (i = 0 ; i < scp->sp_nrxdesc; i++) {
    716   1.1  explorer 		/*
    717   1.1  explorer 		 * desc_p points to the physcial address of the NEXT desc
    718   1.1  explorer 		 */
    719   1.1  explorer 		desc_p += sizeof(sca_desc_t);
    720   1.1  explorer 
    721   1.8    chopps 		sca_desc_write_chainp(sc, desc, desc_p & 0x0000ffff);
    722   1.8    chopps 		sca_desc_write_bufp(sc, desc, buf_p);
    723   1.8    chopps 		/* sca_desc_write_buflen(sc, desc, SCA_BSIZE); */
    724   1.8    chopps 		sca_desc_write_buflen(sc, desc, 0);
    725   1.8    chopps 		sca_desc_write_stat(sc, desc, 0);
    726   1.1  explorer 
    727   1.1  explorer 		desc++;  /* point to the next descriptor */
    728   1.1  explorer 		buf_p += SCA_BSIZE;
    729   1.1  explorer 	}
    730   1.1  explorer 
    731   1.1  explorer 	/*
    732   1.1  explorer 	 * "heal" the circular list by making the last entry point to the
    733   1.1  explorer 	 * first.
    734   1.1  explorer 	 */
    735   1.8    chopps 	sca_desc_write_chainp(sc, desc - 1, scp->sp_rxdesc_p & 0x0000ffff);
    736   1.1  explorer 
    737   1.1  explorer 	sca_dmac_rxinit(scp);
    738   1.1  explorer 
    739   1.8    chopps 	if (sc->sc_usedma)
    740   1.8    chopps 		bus_dmamap_sync(sc->scu_dmat, sc->scu_dmam,
    741   1.8    chopps 		    0, sc->scu_allocsize, BUS_DMASYNC_POSTWRITE);
    742   1.8    chopps 	else
    743   1.8    chopps 		sc->scu_page_off(sc);
    744   1.1  explorer }
    745   1.1  explorer 
    746   1.1  explorer /*
    747   1.1  explorer  * reset and reinitialize the receive DMA logic
    748   1.1  explorer  */
    749   1.1  explorer static void
    750   1.1  explorer sca_dmac_rxinit(sca_port_t *scp)
    751   1.1  explorer {
    752   1.1  explorer 	/*
    753   1.1  explorer 	 * ... and the receive DMA logic ...
    754   1.1  explorer 	 */
    755   1.1  explorer 	dmac_write_1(scp, SCA_DSR0, 0);  /* disable DMA */
    756   1.1  explorer 	dmac_write_1(scp, SCA_DCR0, SCA_DCR_ABRT);
    757   1.1  explorer 
    758   1.1  explorer 	dmac_write_1(scp, SCA_DMR0, SCA_DMR_TMOD | SCA_DMR_NF);
    759   1.1  explorer 	dmac_write_2(scp, SCA_BFLL0, SCA_BSIZE);
    760   1.1  explorer 
    761   1.8    chopps 	/* reset descriptors to initial state */
    762   1.8    chopps 	scp->sp_rxstart = 0;
    763   1.8    chopps 	scp->sp_rxend = scp->sp_nrxdesc - 1;
    764   1.8    chopps 
    765   1.1  explorer 	/*
    766   1.1  explorer 	 * CPB == chain pointer base
    767   1.1  explorer 	 * CDA == current descriptor address
    768   1.1  explorer 	 * EDA == error descriptor address (overwrite position)
    769   1.8    chopps 	 *	because cda can't be eda when starting we always
    770   1.8    chopps 	 *	have a single buffer gap between cda and eda
    771   1.1  explorer 	 */
    772   1.1  explorer 	dmac_write_1(scp, SCA_CPB0,
    773   1.8    chopps 	    (u_int8_t)((scp->sp_rxdesc_p & 0x00ff0000) >> 16));
    774   1.8    chopps 	dmac_write_2(scp, SCA_CDAL0, (u_int16_t)(scp->sp_rxdesc_p & 0xffff));
    775   1.8    chopps 	dmac_write_2(scp, SCA_EDAL0, (u_int16_t)
    776   1.8    chopps 	    (scp->sp_rxdesc_p + (sizeof(sca_desc_t) * scp->sp_rxend)));
    777   1.1  explorer 
    778   1.1  explorer 	/*
    779   1.1  explorer 	 * enable receiver DMA
    780   1.1  explorer 	 */
    781   1.1  explorer 	dmac_write_1(scp, SCA_DIR0,
    782   1.1  explorer 		     (SCA_DIR_EOT | SCA_DIR_EOM | SCA_DIR_BOF | SCA_DIR_COF));
    783   1.1  explorer 	dmac_write_1(scp, SCA_DSR0, SCA_DSR_DE);
    784   1.1  explorer }
    785   1.1  explorer 
    786   1.1  explorer /*
    787   1.1  explorer  * Queue the packet for our start routine to transmit
    788   1.1  explorer  */
    789   1.1  explorer static int
    790   1.1  explorer sca_output(ifp, m, dst, rt0)
    791   1.9    chopps 	struct ifnet *ifp;
    792   1.9    chopps 	struct mbuf *m;
    793   1.9    chopps 	struct sockaddr *dst;
    794   1.9    chopps 	struct rtentry *rt0;
    795   1.1  explorer {
    796  1.11    chopps #ifdef ISO
    797   1.9    chopps 	struct hdlc_llc_header *llc;
    798  1.11    chopps #endif
    799   1.9    chopps 	struct hdlc_header *hdlc;
    800  1.13   thorpej 	struct ifqueue *ifq = NULL;
    801  1.13   thorpej 	int s, error, len;
    802  1.13   thorpej 	short mflags;
    803  1.13   thorpej 	ALTQ_DECL(struct altq_pktattr pktattr;)
    804   1.1  explorer 
    805   1.1  explorer 	error = 0;
    806   1.1  explorer 	ifp->if_lastchange = time;
    807   1.1  explorer 
    808   1.1  explorer 	if ((ifp->if_flags & IFF_UP) != IFF_UP) {
    809   1.1  explorer 		error = ENETDOWN;
    810   1.1  explorer 		goto bad;
    811   1.1  explorer 	}
    812   1.1  explorer 
    813  1.13   thorpej 	/*
    814  1.13   thorpej 	 * If the queueing discipline needs packet classification,
    815  1.13   thorpej 	 * do it before prepending link headers.
    816  1.13   thorpej 	 */
    817  1.13   thorpej 	IFQ_CLASSIFY(&ifp->if_snd, m, dst->sa_family, &pktattr);
    818   1.1  explorer 
    819   1.1  explorer 	/*
    820   1.1  explorer 	 * determine address family, and priority for this packet
    821   1.1  explorer 	 */
    822   1.1  explorer 	switch (dst->sa_family) {
    823   1.9    chopps #ifdef INET
    824   1.1  explorer 	case AF_INET:
    825   1.1  explorer #ifdef SCA_USE_FASTQ
    826   1.9    chopps 		if ((mtod(m, struct ip *)->ip_tos & IPTOS_LOWDELAY)
    827   1.9    chopps 		    == IPTOS_LOWDELAY)
    828   1.9    chopps 			ifq = &((sca_port_t *)ifp->if_softc)->fastq;
    829   1.1  explorer #endif
    830   1.9    chopps 		/*
    831   1.9    chopps 		 * Add cisco serial line header. If there is no
    832   1.9    chopps 		 * space in the first mbuf, allocate another.
    833   1.9    chopps 		 */
    834   1.9    chopps 		M_PREPEND(m, sizeof(struct hdlc_header), M_DONTWAIT);
    835   1.9    chopps 		if (m == 0)
    836   1.9    chopps 			return (ENOBUFS);
    837   1.9    chopps 		hdlc = mtod(m, struct hdlc_header *);
    838   1.9    chopps 		hdlc->h_proto = htons(HDLC_PROTOCOL_IP);
    839   1.9    chopps 		break;
    840   1.9    chopps #endif
    841   1.9    chopps #ifdef ISO
    842   1.9    chopps        case AF_ISO:
    843   1.9    chopps                /*
    844   1.9    chopps                 * Add cisco llc serial line header. If there is no
    845   1.9    chopps                 * space in the first mbuf, allocate another.
    846   1.9    chopps                 */
    847   1.9    chopps 		M_PREPEND(m, sizeof(struct hdlc_llc_header), M_DONTWAIT);
    848   1.9    chopps 		if (m == 0)
    849   1.9    chopps 			return (ENOBUFS);
    850   1.9    chopps 		hdlc = mtod(m, struct hdlc_header *);
    851   1.9    chopps 		llc = mtod(m, struct hdlc_llc_header *);
    852   1.9    chopps 		llc->hl_dsap = llc->hl_ssap = LLC_ISO_LSAP;
    853  1.10    chopps 		llc->hl_ffb = 0;
    854   1.1  explorer 		break;
    855   1.9    chopps #endif
    856   1.1  explorer 	default:
    857   1.1  explorer 		printf("%s: address family %d unsupported\n",
    858   1.1  explorer 		       ifp->if_xname, dst->sa_family);
    859   1.1  explorer 		error = EAFNOSUPPORT;
    860   1.1  explorer 		goto bad;
    861   1.1  explorer 	}
    862   1.1  explorer 
    863   1.9    chopps 	/* finish */
    864   1.1  explorer 	if ((m->m_flags & (M_BCAST | M_MCAST)) != 0)
    865   1.9    chopps 		hdlc->h_addr = CISCO_MULTICAST;
    866   1.1  explorer 	else
    867   1.9    chopps 		hdlc->h_addr = CISCO_UNICAST;
    868   1.9    chopps 	hdlc->h_resv = 0;
    869   1.1  explorer 
    870   1.1  explorer 	/*
    871   1.1  explorer 	 * queue the packet.  If interactive, use the fast queue.
    872   1.1  explorer 	 */
    873  1.13   thorpej 	mflags = m->m_flags;
    874  1.13   thorpej 	len = m->m_pkthdr.len;
    875   1.2   mycroft 	s = splnet();
    876  1.13   thorpej 	if (ifq != NULL) {
    877  1.13   thorpej 		if (IF_QFULL(ifq)) {
    878  1.13   thorpej 			IF_DROP(ifq);
    879  1.13   thorpej 			m_freem(m);
    880  1.13   thorpej 			error = ENOBUFS;
    881  1.13   thorpej 		} else
    882  1.13   thorpej 			IF_ENQUEUE(ifq, m);
    883  1.13   thorpej 	} else
    884  1.13   thorpej 		IFQ_ENQUEUE(&ifp->if_snd, m, &pktattr, error);
    885  1.13   thorpej 	if (error != 0) {
    886  1.13   thorpej 		splx(s);
    887   1.1  explorer 		ifp->if_oerrors++;
    888   1.1  explorer 		ifp->if_collisions++;
    889  1.13   thorpej 		return (error);
    890   1.1  explorer 	}
    891  1.13   thorpej 	ifp->if_obytes += len;
    892   1.1  explorer 	ifp->if_lastchange = time;
    893  1.13   thorpej 	if (mflags & M_MCAST)
    894   1.1  explorer 		ifp->if_omcasts++;
    895   1.1  explorer 
    896   1.1  explorer 	sca_start(ifp);
    897   1.1  explorer 	splx(s);
    898   1.1  explorer 
    899   1.1  explorer 	return (error);
    900   1.1  explorer 
    901   1.1  explorer  bad:
    902   1.1  explorer 	if (m)
    903   1.1  explorer 		m_freem(m);
    904   1.1  explorer 	return (error);
    905   1.1  explorer }
    906   1.1  explorer 
    907   1.1  explorer static int
    908   1.1  explorer sca_ioctl(ifp, cmd, addr)
    909   1.1  explorer      struct ifnet *ifp;
    910   1.1  explorer      u_long cmd;
    911   1.1  explorer      caddr_t addr;
    912   1.1  explorer {
    913   1.1  explorer 	struct ifreq *ifr;
    914   1.1  explorer 	struct ifaddr *ifa;
    915   1.1  explorer 	int error;
    916   1.1  explorer 	int s;
    917   1.1  explorer 
    918   1.2   mycroft 	s = splnet();
    919   1.1  explorer 
    920   1.1  explorer 	ifr = (struct ifreq *)addr;
    921   1.1  explorer 	ifa = (struct ifaddr *)addr;
    922   1.1  explorer 	error = 0;
    923   1.1  explorer 
    924   1.1  explorer 	switch (cmd) {
    925   1.1  explorer 	case SIOCSIFADDR:
    926   1.9    chopps #ifdef INET
    927   1.9    chopps 		if (ifa->ifa_addr->sa_family == AF_INET) {
    928   1.9    chopps 			ifp->if_flags |= IFF_UP;
    929   1.1  explorer 			sca_port_up(ifp->if_softc);
    930   1.9    chopps 		} else
    931   1.9    chopps #endif
    932   1.1  explorer 			error = EAFNOSUPPORT;
    933   1.1  explorer 		break;
    934   1.1  explorer 
    935   1.1  explorer 	case SIOCSIFDSTADDR:
    936   1.9    chopps #ifdef INET
    937   1.1  explorer 		if (ifa->ifa_addr->sa_family != AF_INET)
    938   1.1  explorer 			error = EAFNOSUPPORT;
    939   1.9    chopps #else
    940   1.9    chopps 		error = EAFNOSUPPORT;
    941   1.9    chopps #endif
    942   1.1  explorer 		break;
    943   1.1  explorer 
    944   1.1  explorer 	case SIOCADDMULTI:
    945   1.1  explorer 	case SIOCDELMULTI:
    946   1.1  explorer 		if (ifr == 0) {
    947   1.1  explorer 			error = EAFNOSUPPORT;		/* XXX */
    948   1.1  explorer 			break;
    949   1.1  explorer 		}
    950   1.1  explorer 		switch (ifr->ifr_addr.sa_family) {
    951   1.1  explorer #ifdef INET
    952   1.1  explorer 		case AF_INET:
    953   1.1  explorer 			break;
    954   1.1  explorer #endif
    955   1.1  explorer 		default:
    956   1.1  explorer 			error = EAFNOSUPPORT;
    957   1.1  explorer 			break;
    958   1.1  explorer 		}
    959   1.1  explorer 		break;
    960   1.1  explorer 
    961   1.1  explorer 	case SIOCSIFFLAGS:
    962   1.9    chopps 		if (ifr->ifr_flags & IFF_UP) {
    963   1.9    chopps 			ifp->if_flags |= IFF_UP;
    964   1.1  explorer 			sca_port_up(ifp->if_softc);
    965   1.9    chopps 		} else {
    966   1.9    chopps 			ifp->if_flags &= ~IFF_UP;
    967   1.1  explorer 			sca_port_down(ifp->if_softc);
    968   1.9    chopps 		}
    969   1.1  explorer 
    970   1.1  explorer 		break;
    971   1.1  explorer 
    972   1.1  explorer 	default:
    973   1.1  explorer 		error = EINVAL;
    974   1.1  explorer 	}
    975   1.1  explorer 
    976   1.1  explorer 	splx(s);
    977   1.1  explorer 	return error;
    978   1.1  explorer }
    979   1.1  explorer 
    980   1.1  explorer /*
    981   1.1  explorer  * start packet transmission on the interface
    982   1.1  explorer  *
    983   1.2   mycroft  * MUST BE CALLED AT splnet()
    984   1.1  explorer  */
    985   1.1  explorer static void
    986   1.1  explorer sca_start(ifp)
    987   1.1  explorer 	struct ifnet *ifp;
    988   1.1  explorer {
    989   1.1  explorer 	sca_port_t *scp = ifp->if_softc;
    990   1.1  explorer 	struct sca_softc *sc = scp->sca;
    991   1.1  explorer 	struct mbuf *m, *mb_head;
    992   1.1  explorer 	sca_desc_t *desc;
    993   1.8    chopps 	u_int8_t *buf, stat;
    994   1.1  explorer 	u_int32_t buf_p;
    995   1.6       erh 	int nexttx;
    996   1.1  explorer 	int trigger_xmit;
    997   1.8    chopps 	u_int len;
    998   1.8    chopps 
    999   1.8    chopps 	SCA_DPRINTF(SCA_DEBUG_TX, ("TX: enter start\n"));
   1000   1.1  explorer 
   1001   1.1  explorer 	/*
   1002   1.1  explorer 	 * can't queue when we are full or transmitter is busy
   1003   1.1  explorer 	 */
   1004   1.8    chopps #ifdef oldcode
   1005   1.8    chopps 	if ((scp->sp_txinuse >= (scp->sp_ntxdesc - 1))
   1006   1.8    chopps 	    || ((ifp->if_flags & IFF_OACTIVE) == IFF_OACTIVE))
   1007   1.8    chopps 		return;
   1008   1.8    chopps #else
   1009   1.8    chopps 	if (scp->sp_txinuse
   1010   1.1  explorer 	    || ((ifp->if_flags & IFF_OACTIVE) == IFF_OACTIVE))
   1011   1.1  explorer 		return;
   1012   1.8    chopps #endif
   1013   1.8    chopps 	SCA_DPRINTF(SCA_DEBUG_TX, ("TX: txinuse %d\n", scp->sp_txinuse));
   1014   1.1  explorer 
   1015   1.8    chopps 	/*
   1016   1.8    chopps 	 * XXX assume that all tx desc and bufs in same page
   1017   1.8    chopps 	 */
   1018   1.8    chopps 	if (sc->sc_usedma)
   1019   1.8    chopps 		bus_dmamap_sync(sc->scu_dmat, sc->scu_dmam,
   1020   1.8    chopps 		    0, sc->scu_allocsize,
   1021   1.8    chopps 		    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
   1022   1.8    chopps 	else {
   1023   1.8    chopps 		sc->scu_page_on(sc);
   1024   1.8    chopps 		sc->scu_set_page(sc, scp->sp_txdesc_p);
   1025   1.8    chopps 	}
   1026   1.1  explorer 
   1027   1.1  explorer 	trigger_xmit = 0;
   1028   1.1  explorer 
   1029   1.1  explorer  txloop:
   1030   1.1  explorer 	IF_DEQUEUE(&scp->linkq, mb_head);
   1031   1.1  explorer 	if (mb_head == NULL)
   1032   1.1  explorer #ifdef SCA_USE_FASTQ
   1033   1.1  explorer 		IF_DEQUEUE(&scp->fastq, mb_head);
   1034   1.1  explorer 	if (mb_head == NULL)
   1035   1.1  explorer #endif
   1036   1.1  explorer 		IF_DEQUEUE(&ifp->if_snd, mb_head);
   1037   1.1  explorer 	if (mb_head == NULL)
   1038   1.1  explorer 		goto start_xmit;
   1039   1.1  explorer 
   1040   1.8    chopps 	SCA_DPRINTF(SCA_DEBUG_TX, ("TX: got mbuf\n"));
   1041   1.8    chopps #ifdef oldcode
   1042   1.1  explorer 	if (scp->txinuse != 0) {
   1043   1.6       erh 		/* Kill EOT interrupts on the previous descriptor. */
   1044   1.8    chopps 		desc = &scp->sp_txdesc[scp->txcur];
   1045   1.8    chopps 		stat = sca_desc_read_stat(sc, desc);
   1046   1.8    chopps 		sca_desc_write_stat(sc, desc, stat & ~SCA_DESC_EOT);
   1047   1.6       erh 
   1048   1.6       erh 		/* Figure out what the next free descriptor is. */
   1049   1.8    chopps 		nexttx = (scp->sp_txcur + 1) % scp->sp_ntxdesc;
   1050   1.6       erh 	} else
   1051   1.6       erh 		nexttx = 0;
   1052   1.8    chopps #endif	/* oldcode */
   1053   1.8    chopps 
   1054   1.8    chopps 	if (scp->sp_txinuse)
   1055   1.8    chopps 		nexttx = (scp->sp_txcur + 1) % scp->sp_ntxdesc;
   1056   1.8    chopps 	else
   1057   1.8    chopps 		nexttx = 0;
   1058   1.8    chopps 
   1059   1.8    chopps 	SCA_DPRINTF(SCA_DEBUG_TX, ("TX: nexttx %d\n", nexttx));
   1060   1.8    chopps 
   1061   1.8    chopps 	buf = scp->sp_txbuf + SCA_BSIZE * nexttx;
   1062   1.8    chopps 	buf_p = scp->sp_txbuf_p + SCA_BSIZE * nexttx;
   1063   1.8    chopps 
   1064   1.8    chopps 	/* XXX hoping we can delay the desc write till after we don't drop. */
   1065   1.8    chopps 	desc = &scp->sp_txdesc[nexttx];
   1066   1.8    chopps 
   1067   1.8    chopps 	/* XXX isn't this set already?? */
   1068   1.8    chopps 	sca_desc_write_bufp(sc, desc, buf_p);
   1069   1.8    chopps 	len = 0;
   1070   1.6       erh 
   1071   1.8    chopps 	SCA_DPRINTF(SCA_DEBUG_TX, ("TX: buf %x buf_p %x\n", (u_int)buf, buf_p));
   1072   1.1  explorer 
   1073   1.8    chopps #if 0	/* uncomment this for a core in cc1 */
   1074   1.8    chopps X
   1075   1.8    chopps #endif
   1076   1.1  explorer 	/*
   1077   1.1  explorer 	 * Run through the chain, copying data into the descriptor as we
   1078   1.1  explorer 	 * go.  If it won't fit in one transmission block, drop the packet.
   1079   1.1  explorer 	 * No, this isn't nice, but most of the time it _will_ fit.
   1080   1.1  explorer 	 */
   1081   1.1  explorer 	for (m = mb_head ; m != NULL ; m = m->m_next) {
   1082   1.1  explorer 		if (m->m_len != 0) {
   1083   1.8    chopps 			len += m->m_len;
   1084   1.8    chopps 			if (len > SCA_BSIZE) {
   1085   1.1  explorer 				m_freem(mb_head);
   1086   1.1  explorer 				goto txloop;
   1087   1.1  explorer 			}
   1088   1.8    chopps 			SCA_DPRINTF(SCA_DEBUG_TX,
   1089   1.8    chopps 			    ("TX: about to mbuf len %d\n", m->m_len));
   1090   1.8    chopps 
   1091   1.8    chopps 			if (sc->sc_usedma)
   1092   1.8    chopps 				bcopy(mtod(m, u_int8_t *), buf, m->m_len);
   1093   1.8    chopps 			else
   1094   1.8    chopps 				bus_space_write_region_1(sc->scu_memt,
   1095   1.8    chopps 				    sc->scu_memh, sca_page_addr(sc, buf_p),
   1096   1.8    chopps 				    mtod(m, u_int8_t *), m->m_len);
   1097   1.1  explorer 			buf += m->m_len;
   1098   1.8    chopps 			buf_p += m->m_len;
   1099   1.1  explorer 		}
   1100   1.1  explorer 	}
   1101   1.1  explorer 
   1102   1.8    chopps 	/* set the buffer, the length, and mark end of frame and end of xfer */
   1103   1.8    chopps 	sca_desc_write_buflen(sc, desc, len);
   1104   1.8    chopps 	sca_desc_write_stat(sc, desc, SCA_DESC_EOM);
   1105   1.8    chopps 
   1106   1.1  explorer 	ifp->if_opackets++;
   1107   1.1  explorer 
   1108   1.1  explorer #if NBPFILTER > 0
   1109   1.1  explorer 	/*
   1110   1.1  explorer 	 * Pass packet to bpf if there is a listener.
   1111   1.1  explorer 	 */
   1112  1.12   thorpej 	if (ifp->if_bpf)
   1113  1.12   thorpej 		bpf_mtap(ifp->if_bpf, mb_head);
   1114   1.1  explorer #endif
   1115   1.1  explorer 
   1116   1.1  explorer 	m_freem(mb_head);
   1117   1.1  explorer 
   1118   1.8    chopps 	scp->sp_txcur = nexttx;
   1119   1.8    chopps 	scp->sp_txinuse++;
   1120   1.1  explorer 	trigger_xmit = 1;
   1121   1.1  explorer 
   1122   1.1  explorer 	SCA_DPRINTF(SCA_DEBUG_TX,
   1123   1.8    chopps 	    ("TX: inuse %d index %d\n", scp->sp_txinuse, scp->sp_txcur));
   1124   1.1  explorer 
   1125   1.8    chopps 	/*
   1126   1.8    chopps 	 * XXX so didn't this used to limit us to 1?! - multi may be untested
   1127   1.8    chopps 	 * sp_ntxdesc used to be hard coded to 2 with claim of a too hard
   1128   1.8    chopps 	 * to find bug
   1129   1.8    chopps 	 */
   1130   1.8    chopps #ifdef oldcode
   1131   1.8    chopps 	if (scp->sp_txinuse < (scp->sp_ntxdesc - 1))
   1132   1.8    chopps #endif
   1133   1.8    chopps 	if (scp->sp_txinuse < scp->sp_ntxdesc)
   1134   1.1  explorer 		goto txloop;
   1135   1.1  explorer 
   1136   1.1  explorer  start_xmit:
   1137   1.8    chopps 	SCA_DPRINTF(SCA_DEBUG_TX, ("TX: trigger_xmit %d\n", trigger_xmit));
   1138   1.8    chopps 
   1139   1.8    chopps 	if (trigger_xmit != 0) {
   1140   1.8    chopps 		/* set EOT on final descriptor */
   1141   1.8    chopps 		desc = &scp->sp_txdesc[scp->sp_txcur];
   1142   1.8    chopps 		stat = sca_desc_read_stat(sc, desc);
   1143   1.8    chopps 		sca_desc_write_stat(sc, desc, stat | SCA_DESC_EOT);
   1144   1.8    chopps 	}
   1145   1.8    chopps 
   1146   1.8    chopps 	if (sc->sc_usedma)
   1147   1.8    chopps 		bus_dmamap_sync(sc->scu_dmat, sc->scu_dmam, 0,
   1148   1.8    chopps 		    sc->scu_allocsize,
   1149   1.8    chopps 		    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
   1150   1.1  explorer 
   1151   1.1  explorer 	if (trigger_xmit != 0)
   1152   1.1  explorer 		sca_port_starttx(scp);
   1153   1.8    chopps 
   1154   1.8    chopps 	if (!sc->sc_usedma)
   1155   1.8    chopps 		sc->scu_page_off(sc);
   1156   1.1  explorer }
   1157   1.1  explorer 
   1158   1.1  explorer static void
   1159   1.1  explorer sca_watchdog(ifp)
   1160   1.1  explorer 	struct ifnet *ifp;
   1161   1.1  explorer {
   1162   1.1  explorer }
   1163   1.1  explorer 
   1164   1.1  explorer int
   1165   1.1  explorer sca_hardintr(struct sca_softc *sc)
   1166   1.1  explorer {
   1167   1.1  explorer 	u_int8_t isr0, isr1, isr2;
   1168   1.1  explorer 	int	ret;
   1169   1.1  explorer 
   1170   1.1  explorer 	ret = 0;  /* non-zero means we processed at least one interrupt */
   1171   1.1  explorer 
   1172   1.8    chopps 	SCA_DPRINTF(SCA_DEBUG_INTR, ("sca_hardintr entered\n"));
   1173   1.8    chopps 
   1174   1.1  explorer 	while (1) {
   1175   1.1  explorer 		/*
   1176   1.1  explorer 		 * read SCA interrupts
   1177   1.1  explorer 		 */
   1178   1.1  explorer 		isr0 = sca_read_1(sc, SCA_ISR0);
   1179   1.1  explorer 		isr1 = sca_read_1(sc, SCA_ISR1);
   1180   1.1  explorer 		isr2 = sca_read_1(sc, SCA_ISR2);
   1181   1.1  explorer 
   1182   1.1  explorer 		if (isr0 == 0 && isr1 == 0 && isr2 == 0)
   1183   1.1  explorer 			break;
   1184   1.1  explorer 
   1185   1.1  explorer 		SCA_DPRINTF(SCA_DEBUG_INTR,
   1186   1.1  explorer 			    ("isr0 = %02x, isr1 = %02x, isr2 = %02x\n",
   1187   1.1  explorer 			     isr0, isr1, isr2));
   1188   1.1  explorer 
   1189   1.1  explorer 		/*
   1190   1.8    chopps 		 * check DMAC interrupt
   1191   1.1  explorer 		 */
   1192   1.1  explorer 		if (isr1 & 0x0f)
   1193   1.1  explorer 			ret += sca_dmac_intr(&sc->sc_ports[0],
   1194   1.1  explorer 					     isr1 & 0x0f);
   1195   1.8    chopps 
   1196   1.1  explorer 		if (isr1 & 0xf0)
   1197   1.1  explorer 			ret += sca_dmac_intr(&sc->sc_ports[1],
   1198   1.8    chopps 			     (isr1 & 0xf0) >> 4);
   1199   1.8    chopps 
   1200   1.8    chopps 		/*
   1201   1.8    chopps 		 * mcsi intterupts
   1202   1.8    chopps 		 */
   1203   1.8    chopps 		if (isr0 & 0x0f)
   1204   1.8    chopps 			ret += sca_msci_intr(&sc->sc_ports[0], isr0 & 0x0f);
   1205   1.1  explorer 
   1206   1.8    chopps 		if (isr0 & 0xf0)
   1207   1.8    chopps 			ret += sca_msci_intr(&sc->sc_ports[1],
   1208   1.8    chopps 			    (isr0 & 0xf0) >> 4);
   1209   1.1  explorer 
   1210   1.1  explorer #if 0 /* We don't GET timer interrupts, we have them disabled (msci IE20) */
   1211   1.1  explorer 		if (isr2)
   1212   1.1  explorer 			ret += sca_timer_intr(sc, isr2);
   1213   1.1  explorer #endif
   1214   1.1  explorer 	}
   1215   1.1  explorer 
   1216   1.1  explorer 	return (ret);
   1217   1.1  explorer }
   1218   1.1  explorer 
   1219   1.1  explorer static int
   1220   1.1  explorer sca_dmac_intr(sca_port_t *scp, u_int8_t isr)
   1221   1.1  explorer {
   1222   1.1  explorer 	u_int8_t	 dsr;
   1223   1.1  explorer 	int		 ret;
   1224   1.1  explorer 
   1225   1.1  explorer 	ret = 0;
   1226   1.1  explorer 
   1227   1.1  explorer 	/*
   1228   1.1  explorer 	 * Check transmit channel
   1229   1.1  explorer 	 */
   1230   1.8    chopps 	if (isr & (SCA_ISR1_DMAC_TX0A | SCA_ISR1_DMAC_TX0B)) {
   1231   1.1  explorer 		SCA_DPRINTF(SCA_DEBUG_INTR,
   1232   1.8    chopps 		    ("TX INTERRUPT port %d\n", scp->sp_port));
   1233   1.1  explorer 
   1234   1.1  explorer 		dsr = 1;
   1235   1.1  explorer 		while (dsr != 0) {
   1236   1.1  explorer 			ret++;
   1237   1.1  explorer 			/*
   1238   1.1  explorer 			 * reset interrupt
   1239   1.1  explorer 			 */
   1240   1.1  explorer 			dsr = dmac_read_1(scp, SCA_DSR1);
   1241   1.1  explorer 			dmac_write_1(scp, SCA_DSR1,
   1242   1.1  explorer 				     dsr | SCA_DSR_DEWD);
   1243   1.1  explorer 
   1244   1.1  explorer 			/*
   1245   1.1  explorer 			 * filter out the bits we don't care about
   1246   1.1  explorer 			 */
   1247   1.1  explorer 			dsr &= ( SCA_DSR_COF | SCA_DSR_BOF | SCA_DSR_EOT);
   1248   1.1  explorer 			if (dsr == 0)
   1249   1.1  explorer 				break;
   1250   1.1  explorer 
   1251   1.1  explorer 			/*
   1252   1.1  explorer 			 * check for counter overflow
   1253   1.1  explorer 			 */
   1254   1.1  explorer 			if (dsr & SCA_DSR_COF) {
   1255   1.1  explorer 				printf("%s: TXDMA counter overflow\n",
   1256   1.1  explorer 				       scp->sp_if.if_xname);
   1257   1.1  explorer 
   1258   1.1  explorer 				scp->sp_if.if_flags &= ~IFF_OACTIVE;
   1259   1.8    chopps 				scp->sp_txcur = 0;
   1260   1.8    chopps 				scp->sp_txinuse = 0;
   1261   1.1  explorer 			}
   1262   1.1  explorer 
   1263   1.1  explorer 			/*
   1264   1.1  explorer 			 * check for buffer overflow
   1265   1.1  explorer 			 */
   1266   1.1  explorer 			if (dsr & SCA_DSR_BOF) {
   1267   1.1  explorer 				printf("%s: TXDMA buffer overflow, cda 0x%04x, eda 0x%04x, cpb 0x%02x\n",
   1268   1.1  explorer 				       scp->sp_if.if_xname,
   1269   1.1  explorer 				       dmac_read_2(scp, SCA_CDAL1),
   1270   1.1  explorer 				       dmac_read_2(scp, SCA_EDAL1),
   1271   1.1  explorer 				       dmac_read_1(scp, SCA_CPB1));
   1272   1.1  explorer 
   1273   1.1  explorer 				/*
   1274   1.1  explorer 				 * Yikes.  Arrange for a full
   1275   1.1  explorer 				 * transmitter restart.
   1276   1.1  explorer 				 */
   1277   1.1  explorer 				scp->sp_if.if_flags &= ~IFF_OACTIVE;
   1278   1.8    chopps 				scp->sp_txcur = 0;
   1279   1.8    chopps 				scp->sp_txinuse = 0;
   1280   1.1  explorer 			}
   1281   1.1  explorer 
   1282   1.1  explorer 			/*
   1283   1.1  explorer 			 * check for end of transfer, which is not
   1284   1.1  explorer 			 * an error. It means that all data queued
   1285   1.1  explorer 			 * was transmitted, and we mark ourself as
   1286   1.1  explorer 			 * not in use and stop the watchdog timer.
   1287   1.1  explorer 			 */
   1288   1.1  explorer 			if (dsr & SCA_DSR_EOT) {
   1289   1.1  explorer 				SCA_DPRINTF(SCA_DEBUG_TX,
   1290   1.8    chopps 			    ("Transmit completed. cda %x eda %x dsr %x\n",
   1291   1.8    chopps 				    dmac_read_2(scp, SCA_CDAL1),
   1292   1.8    chopps 				    dmac_read_2(scp, SCA_EDAL1),
   1293   1.8    chopps 				    dsr));
   1294   1.1  explorer 
   1295   1.1  explorer 				scp->sp_if.if_flags &= ~IFF_OACTIVE;
   1296   1.8    chopps 				scp->sp_txcur = 0;
   1297   1.8    chopps 				scp->sp_txinuse = 0;
   1298   1.1  explorer 
   1299   1.1  explorer 				/*
   1300   1.1  explorer 				 * check for more packets
   1301   1.1  explorer 				 */
   1302   1.1  explorer 				sca_start(&scp->sp_if);
   1303   1.1  explorer 			}
   1304   1.1  explorer 		}
   1305   1.1  explorer 	}
   1306   1.1  explorer 	/*
   1307   1.1  explorer 	 * receive channel check
   1308   1.1  explorer 	 */
   1309   1.8    chopps 	if (isr & (SCA_ISR1_DMAC_RX0A | SCA_ISR1_DMAC_RX0B)) {
   1310   1.8    chopps 		SCA_DPRINTF(SCA_DEBUG_INTR, ("RX INTERRUPT port %d\n",
   1311   1.8    chopps 		    (scp == &scp->sca->sc_ports[0] ? 0 : 1)));
   1312   1.1  explorer 
   1313   1.1  explorer 		dsr = 1;
   1314   1.1  explorer 		while (dsr != 0) {
   1315   1.1  explorer 			ret++;
   1316   1.1  explorer 
   1317   1.1  explorer 			dsr = dmac_read_1(scp, SCA_DSR0);
   1318   1.1  explorer 			dmac_write_1(scp, SCA_DSR0, dsr | SCA_DSR_DEWD);
   1319   1.1  explorer 
   1320   1.1  explorer 			/*
   1321   1.1  explorer 			 * filter out the bits we don't care about
   1322   1.1  explorer 			 */
   1323   1.1  explorer 			dsr &= (SCA_DSR_EOM | SCA_DSR_COF
   1324   1.1  explorer 				| SCA_DSR_BOF | SCA_DSR_EOT);
   1325   1.1  explorer 			if (dsr == 0)
   1326   1.1  explorer 				break;
   1327   1.1  explorer 
   1328   1.1  explorer 			/*
   1329   1.1  explorer 			 * End of frame
   1330   1.1  explorer 			 */
   1331   1.1  explorer 			if (dsr & SCA_DSR_EOM) {
   1332   1.1  explorer 				SCA_DPRINTF(SCA_DEBUG_RX, ("Got a frame!\n"));
   1333   1.1  explorer 
   1334   1.1  explorer 				sca_get_packets(scp);
   1335   1.1  explorer 			}
   1336   1.1  explorer 
   1337   1.1  explorer 			/*
   1338   1.1  explorer 			 * check for counter overflow
   1339   1.1  explorer 			 */
   1340   1.1  explorer 			if (dsr & SCA_DSR_COF) {
   1341   1.1  explorer 				printf("%s: RXDMA counter overflow\n",
   1342   1.1  explorer 				       scp->sp_if.if_xname);
   1343   1.1  explorer 
   1344   1.1  explorer 				sca_dmac_rxinit(scp);
   1345   1.1  explorer 			}
   1346   1.1  explorer 
   1347   1.1  explorer 			/*
   1348   1.1  explorer 			 * check for end of transfer, which means we
   1349   1.1  explorer 			 * ran out of descriptors to receive into.
   1350   1.1  explorer 			 * This means the line is much faster than
   1351   1.1  explorer 			 * we can handle.
   1352   1.1  explorer 			 */
   1353   1.1  explorer 			if (dsr & (SCA_DSR_BOF | SCA_DSR_EOT)) {
   1354   1.1  explorer 				printf("%s: RXDMA buffer overflow\n",
   1355   1.1  explorer 				       scp->sp_if.if_xname);
   1356   1.1  explorer 
   1357   1.1  explorer 				sca_dmac_rxinit(scp);
   1358   1.1  explorer 			}
   1359   1.1  explorer 		}
   1360   1.1  explorer 	}
   1361   1.1  explorer 
   1362   1.1  explorer 	return ret;
   1363   1.1  explorer }
   1364   1.1  explorer 
   1365   1.1  explorer static int
   1366   1.8    chopps sca_msci_intr(sca_port_t *scp, u_int8_t isr)
   1367   1.1  explorer {
   1368   1.8    chopps 	u_int8_t st1, trc0;
   1369   1.1  explorer 
   1370   1.8    chopps 	/* get and clear the specific interrupt -- should act on it :)*/
   1371   1.8    chopps 	if ((st1 = msci_read_1(scp, SCA_ST10))) {
   1372   1.8    chopps 		/* clear the interrupt */
   1373   1.8    chopps 		msci_write_1(scp, SCA_ST10, st1);
   1374   1.8    chopps 
   1375   1.8    chopps 		if (st1 & SCA_ST1_UDRN) {
   1376   1.8    chopps 			/* underrun -- try to increase ready control */
   1377   1.8    chopps 			trc0 = msci_read_1(scp, SCA_TRC00);
   1378   1.8    chopps 			if (trc0 == 0x1f)
   1379   1.8    chopps 				printf("TX: underun - fifo depth maxed\n");
   1380   1.8    chopps 			else {
   1381   1.8    chopps 				if ((trc0 += 2) > 0x1f)
   1382   1.8    chopps 					trc0 = 0x1f;
   1383   1.8    chopps 				SCA_DPRINTF(SCA_DEBUG_TX,
   1384   1.8    chopps 				   ("TX: udrn - incr fifo to %d\n", trc0));
   1385   1.8    chopps 				msci_write_1(scp, SCA_TRC00, trc0);
   1386   1.8    chopps 			}
   1387   1.8    chopps 		}
   1388   1.8    chopps 	}
   1389   1.8    chopps 	return (0);
   1390   1.1  explorer }
   1391   1.1  explorer 
   1392   1.1  explorer static void
   1393   1.1  explorer sca_get_packets(sca_port_t *scp)
   1394   1.1  explorer {
   1395   1.8    chopps 	struct sca_softc *sc;
   1396   1.1  explorer 
   1397   1.8    chopps 	SCA_DPRINTF(SCA_DEBUG_RX, ("RX: sca_get_packets\n"));
   1398   1.1  explorer 
   1399   1.8    chopps 	sc = scp->sca;
   1400   1.8    chopps 	if (sc->sc_usedma)
   1401   1.8    chopps 		bus_dmamap_sync(sc->scu_dmat, sc->scu_dmam,
   1402   1.8    chopps 		    0, sc->scu_allocsize,
   1403   1.8    chopps 		    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
   1404   1.8    chopps 	else {
   1405   1.8    chopps 		/*
   1406   1.8    chopps 		 * XXX this code is unable to deal with rx stuff
   1407   1.8    chopps 		 * in more than 1 page
   1408   1.8    chopps 		 */
   1409   1.8    chopps 		sc->scu_page_on(sc);
   1410   1.8    chopps 		sc->scu_set_page(sc, scp->sp_rxdesc_p);
   1411   1.8    chopps 	}
   1412   1.1  explorer 
   1413   1.8    chopps 	/* process as many frames as are available */
   1414   1.8    chopps 	while (sca_frame_avail(scp)) {
   1415   1.8    chopps 		sca_frame_process(scp);
   1416   1.8    chopps 		sca_frame_read_done(scp);
   1417   1.1  explorer 	}
   1418   1.1  explorer 
   1419   1.8    chopps 	if (sc->sc_usedma)
   1420   1.8    chopps 		bus_dmamap_sync(sc->scu_dmat, sc->scu_dmam,
   1421   1.8    chopps 		    0, sc->scu_allocsize,
   1422   1.8    chopps 		    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
   1423   1.8    chopps 	else
   1424   1.8    chopps 		sc->scu_page_off(sc);
   1425   1.1  explorer }
   1426   1.1  explorer 
   1427   1.1  explorer /*
   1428   1.1  explorer  * Starting with the first descriptor we wanted to read into, up to but
   1429   1.1  explorer  * not including the current SCA read descriptor, look for a packet.
   1430   1.8    chopps  *
   1431   1.8    chopps  * must be called at splnet()
   1432   1.1  explorer  */
   1433   1.1  explorer static int
   1434   1.8    chopps sca_frame_avail(sca_port_t *scp)
   1435   1.1  explorer {
   1436   1.8    chopps 	struct sca_softc *sc;
   1437   1.8    chopps 	u_int16_t cda;
   1438   1.8    chopps 	u_int32_t desc_p;	/* physical address (lower 16 bits) */
   1439   1.8    chopps 	sca_desc_t *desc;
   1440   1.8    chopps 	u_int8_t rxstat;
   1441   1.8    chopps 	int cdaidx, toolong;
   1442   1.1  explorer 
   1443   1.1  explorer 	/*
   1444   1.1  explorer 	 * Read the current descriptor from the SCA.
   1445   1.1  explorer 	 */
   1446   1.8    chopps 	sc = scp->sca;
   1447   1.1  explorer 	cda = dmac_read_2(scp, SCA_CDAL0);
   1448   1.1  explorer 
   1449   1.1  explorer 	/*
   1450   1.1  explorer 	 * calculate the index of the current descriptor
   1451   1.1  explorer 	 */
   1452   1.8    chopps 	desc_p = (scp->sp_rxdesc_p & 0xFFFF);
   1453   1.8    chopps 	desc_p = cda - desc_p;
   1454   1.1  explorer 	cdaidx = desc_p / sizeof(sca_desc_t);
   1455   1.1  explorer 
   1456   1.8    chopps 	SCA_DPRINTF(SCA_DEBUG_RX,
   1457   1.8    chopps 	    ("RX: cda %x desc_p %x cdaidx %u, nrxdesc %d rxstart %d\n",
   1458   1.8    chopps 	    cda, desc_p, cdaidx, scp->sp_nrxdesc, scp->sp_rxstart));
   1459   1.8    chopps 
   1460   1.8    chopps 	/* note confusion */
   1461   1.8    chopps 	if (cdaidx >= scp->sp_nrxdesc)
   1462   1.8    chopps 		panic("current descriptor index out of range");
   1463   1.8    chopps 
   1464   1.8    chopps 	/* see if we have a valid frame available */
   1465   1.8    chopps 	toolong = 0;
   1466   1.8    chopps 	for (; scp->sp_rxstart != cdaidx; sca_frame_read_done(scp)) {
   1467   1.1  explorer 		/*
   1468   1.1  explorer 		 * We might have a valid descriptor.  Set up a pointer
   1469   1.1  explorer 		 * to the kva address for it so we can more easily examine
   1470   1.1  explorer 		 * the contents.
   1471   1.1  explorer 		 */
   1472   1.8    chopps 		desc = &scp->sp_rxdesc[scp->sp_rxstart];
   1473   1.8    chopps 		rxstat = sca_desc_read_stat(scp->sca, desc);
   1474   1.8    chopps 
   1475   1.8    chopps 		SCA_DPRINTF(SCA_DEBUG_RX, ("port %d RX: idx %d rxstat %x\n",
   1476   1.8    chopps 		    scp->sp_port, scp->sp_rxstart, rxstat));
   1477   1.1  explorer 
   1478   1.8    chopps 		SCA_DPRINTF(SCA_DEBUG_RX, ("port %d RX: buflen %d\n",
   1479   1.8    chopps 		    scp->sp_port, sca_desc_read_buflen(scp->sca, desc)));
   1480   1.1  explorer 
   1481   1.1  explorer 		/*
   1482   1.1  explorer 		 * check for errors
   1483   1.1  explorer 		 */
   1484   1.8    chopps 		if (rxstat & SCA_DESC_ERRORS) {
   1485   1.8    chopps 			/*
   1486   1.8    chopps 			 * consider an error condition the end
   1487   1.8    chopps 			 * of a frame
   1488   1.8    chopps 			 */
   1489   1.8    chopps 			scp->sp_if.if_ierrors++;
   1490   1.8    chopps 			toolong = 0;
   1491   1.8    chopps 			continue;
   1492   1.8    chopps 		}
   1493   1.1  explorer 
   1494   1.1  explorer 		/*
   1495   1.8    chopps 		 * if we aren't skipping overlong frames
   1496   1.8    chopps 		 * we are done, otherwise reset and look for
   1497   1.8    chopps 		 * another good frame
   1498   1.1  explorer 		 */
   1499   1.1  explorer 		if (rxstat & SCA_DESC_EOM) {
   1500   1.8    chopps 			if (!toolong)
   1501   1.8    chopps 				return (1);
   1502   1.8    chopps 			toolong = 0;
   1503   1.8    chopps 		} else if (!toolong) {
   1504   1.8    chopps 			/*
   1505   1.8    chopps 			 * we currently don't deal with frames
   1506   1.8    chopps 			 * larger than a single buffer (fixed MTU)
   1507   1.8    chopps 			 */
   1508   1.8    chopps 			scp->sp_if.if_ierrors++;
   1509   1.8    chopps 			toolong = 1;
   1510   1.1  explorer 		}
   1511   1.8    chopps 		SCA_DPRINTF(SCA_DEBUG_RX, ("RX: idx %d no EOM\n",
   1512   1.8    chopps 		    scp->sp_rxstart));
   1513   1.1  explorer 	}
   1514   1.1  explorer 
   1515   1.8    chopps 	SCA_DPRINTF(SCA_DEBUG_RX, ("RX: returning none\n"));
   1516   1.1  explorer 	return 0;
   1517   1.1  explorer }
   1518   1.1  explorer 
   1519   1.1  explorer /*
   1520   1.1  explorer  * Pass the packet up to the kernel if it is a packet we want to pay
   1521   1.1  explorer  * attention to.
   1522   1.1  explorer  *
   1523   1.2   mycroft  * MUST BE CALLED AT splnet()
   1524   1.1  explorer  */
   1525   1.1  explorer static void
   1526   1.8    chopps sca_frame_process(sca_port_t *scp)
   1527   1.1  explorer {
   1528   1.1  explorer 	struct ifqueue *ifq;
   1529   1.9    chopps 	struct hdlc_header *hdlc;
   1530   1.9    chopps 	struct cisco_pkt *cisco;
   1531   1.8    chopps 	sca_desc_t *desc;
   1532   1.8    chopps 	struct mbuf *m;
   1533   1.8    chopps 	u_int8_t *bufp;
   1534   1.8    chopps 	u_int16_t len;
   1535   1.8    chopps 	u_int32_t t;
   1536   1.8    chopps 
   1537   1.8    chopps 	t = (time.tv_sec - boottime.tv_sec) * 1000;
   1538   1.8    chopps 	desc = &scp->sp_rxdesc[scp->sp_rxstart];
   1539   1.8    chopps 	bufp = scp->sp_rxbuf + SCA_BSIZE * scp->sp_rxstart;
   1540   1.8    chopps 	len = sca_desc_read_buflen(scp->sca, desc);
   1541   1.8    chopps 
   1542   1.8    chopps 	SCA_DPRINTF(SCA_DEBUG_RX,
   1543   1.8    chopps 	    ("RX: desc %lx bufp %lx len %d\n", (bus_addr_t)desc,
   1544   1.8    chopps 	    (bus_addr_t)bufp, len));
   1545   1.1  explorer 
   1546   1.8    chopps #if SCA_DEBUG_LEVEL > 0
   1547   1.8    chopps 	if (sca_debug & SCA_DEBUG_RXPKT)
   1548   1.8    chopps 		sca_frame_print(scp, desc, bufp);
   1549   1.8    chopps #endif
   1550   1.1  explorer 	/*
   1551   1.1  explorer 	 * skip packets that are too short
   1552   1.1  explorer 	 */
   1553   1.9    chopps 	if (len < sizeof(struct hdlc_header)) {
   1554   1.9    chopps 		scp->sp_if.if_ierrors++;
   1555   1.1  explorer 		return;
   1556   1.9    chopps 	}
   1557   1.1  explorer 
   1558   1.8    chopps 	m = sca_mbuf_alloc(scp->sca, bufp, len);
   1559   1.8    chopps 	if (m == NULL) {
   1560   1.8    chopps 		SCA_DPRINTF(SCA_DEBUG_RX, ("RX: no mbuf!\n"));
   1561   1.8    chopps 		return;
   1562   1.8    chopps 	}
   1563   1.1  explorer 
   1564   1.1  explorer 	/*
   1565   1.1  explorer 	 * read and then strip off the HDLC information
   1566   1.1  explorer 	 */
   1567   1.9    chopps 	m = m_pullup(m, sizeof(struct hdlc_header));
   1568   1.8    chopps 	if (m == NULL) {
   1569   1.8    chopps 		SCA_DPRINTF(SCA_DEBUG_RX, ("RX: no m_pullup!\n"));
   1570   1.9    chopps 		return;
   1571   1.8    chopps 	}
   1572   1.8    chopps 
   1573   1.8    chopps #if NBPFILTER > 0
   1574  1.12   thorpej 	if (scp->sp_if.if_bpf)
   1575  1.12   thorpej 		bpf_mtap(scp->sp_if.if_bpf, m);
   1576   1.8    chopps #endif
   1577   1.1  explorer 
   1578   1.1  explorer 	scp->sp_if.if_ipackets++;
   1579   1.1  explorer 	scp->sp_if.if_lastchange = time;
   1580   1.1  explorer 
   1581   1.9    chopps 	hdlc = mtod(m, struct hdlc_header *);
   1582   1.9    chopps 	switch (ntohs(hdlc->h_proto)) {
   1583   1.9    chopps #ifdef INET
   1584   1.1  explorer 	case HDLC_PROTOCOL_IP:
   1585   1.1  explorer 		SCA_DPRINTF(SCA_DEBUG_RX, ("Received IP packet\n"));
   1586   1.1  explorer 		m->m_pkthdr.rcvif = &scp->sp_if;
   1587   1.9    chopps 		m->m_pkthdr.len -= sizeof(struct hdlc_header);
   1588   1.9    chopps 		m->m_data += sizeof(struct hdlc_header);
   1589   1.9    chopps 		m->m_len -= sizeof(struct hdlc_header);
   1590   1.9    chopps 		ifq = &ipintrq;
   1591   1.9    chopps 		schednetisr(NETISR_IP);
   1592   1.9    chopps 		break;
   1593   1.9    chopps #endif	/* INET */
   1594   1.9    chopps #ifdef ISO
   1595   1.9    chopps 	case HDLC_PROTOCOL_ISO:
   1596   1.9    chopps 		if (m->m_pkthdr.len < sizeof(struct hdlc_llc_header))
   1597   1.9    chopps                        goto dropit;
   1598   1.9    chopps 		m->m_pkthdr.rcvif = &scp->sp_if;
   1599   1.9    chopps 		m->m_pkthdr.len -= sizeof(struct hdlc_llc_header);
   1600   1.9    chopps 		m->m_data += sizeof(struct hdlc_llc_header);
   1601   1.9    chopps 		m->m_len -= sizeof(struct hdlc_llc_header);
   1602   1.9    chopps 		ifq = &clnlintrq;
   1603   1.9    chopps 		schednetisr(NETISR_ISO);
   1604   1.1  explorer 		break;
   1605   1.9    chopps #endif	/* ISO */
   1606   1.1  explorer 	case CISCO_KEEPALIVE:
   1607   1.1  explorer 		SCA_DPRINTF(SCA_DEBUG_CISCO,
   1608   1.1  explorer 			    ("Received CISCO keepalive packet\n"));
   1609   1.1  explorer 
   1610   1.1  explorer 		if (len < CISCO_PKT_LEN) {
   1611   1.1  explorer 			SCA_DPRINTF(SCA_DEBUG_CISCO,
   1612   1.1  explorer 				    ("short CISCO packet %d, wanted %d\n",
   1613   1.1  explorer 				     len, CISCO_PKT_LEN));
   1614   1.9    chopps 			scp->sp_if.if_ierrors++;
   1615   1.9    chopps 			goto dropit;
   1616   1.1  explorer 		}
   1617   1.1  explorer 
   1618   1.9    chopps 		m = m_pullup(m, sizeof(struct cisco_pkt));
   1619   1.8    chopps 		if (m == NULL) {
   1620   1.8    chopps 			SCA_DPRINTF(SCA_DEBUG_RX, ("RX: no m_pullup!\n"));
   1621   1.9    chopps 			return;
   1622   1.8    chopps 		}
   1623   1.1  explorer 
   1624   1.9    chopps 		cisco = (struct cisco_pkt *)
   1625   1.9    chopps 		    (mtod(m, u_int8_t *) + HDLC_HDRLEN);
   1626   1.1  explorer 		m->m_pkthdr.rcvif = &scp->sp_if;
   1627   1.1  explorer 
   1628   1.1  explorer 		switch (ntohl(cisco->type)) {
   1629   1.1  explorer 		case CISCO_ADDR_REQ:
   1630   1.1  explorer 			printf("Got CISCO addr_req, ignoring\n");
   1631   1.9    chopps 			scp->sp_if.if_ierrors++;
   1632   1.9    chopps 			goto dropit;
   1633   1.1  explorer 
   1634   1.1  explorer 		case CISCO_ADDR_REPLY:
   1635   1.1  explorer 			printf("Got CISCO addr_reply, ignoring\n");
   1636   1.9    chopps 			scp->sp_if.if_ierrors++;
   1637   1.9    chopps 			goto dropit;
   1638   1.1  explorer 
   1639   1.1  explorer 		case CISCO_KEEPALIVE_REQ:
   1640   1.8    chopps 
   1641   1.1  explorer 			SCA_DPRINTF(SCA_DEBUG_CISCO,
   1642   1.1  explorer 				    ("Received KA, mseq %d,"
   1643   1.1  explorer 				     " yseq %d, rel 0x%04x, t0"
   1644   1.1  explorer 				     " %04x, t1 %04x\n",
   1645   1.1  explorer 				     ntohl(cisco->par1), ntohl(cisco->par2),
   1646   1.1  explorer 				     ntohs(cisco->rel), ntohs(cisco->time0),
   1647   1.1  explorer 				     ntohs(cisco->time1)));
   1648   1.1  explorer 
   1649   1.1  explorer 			scp->cka_lastrx = ntohl(cisco->par1);
   1650   1.1  explorer 			scp->cka_lasttx++;
   1651   1.1  explorer 
   1652   1.1  explorer 			/*
   1653   1.1  explorer 			 * schedule the transmit right here.
   1654   1.1  explorer 			 */
   1655   1.8    chopps 			cisco->par2 = cisco->par1;
   1656   1.8    chopps 			cisco->par1 = htonl(scp->cka_lasttx);
   1657   1.8    chopps 			cisco->time0 = htons((u_int16_t)(t >> 16));
   1658   1.8    chopps 			cisco->time1 = htons((u_int16_t)(t & 0x0000ffff));
   1659   1.1  explorer 
   1660   1.1  explorer 			ifq = &scp->linkq;
   1661   1.1  explorer 			if (IF_QFULL(ifq)) {
   1662   1.1  explorer 				IF_DROP(ifq);
   1663   1.9    chopps 				goto dropit;
   1664   1.1  explorer 			}
   1665   1.1  explorer 			IF_ENQUEUE(ifq, m);
   1666   1.1  explorer 
   1667   1.1  explorer 			sca_start(&scp->sp_if);
   1668   1.1  explorer 
   1669   1.8    chopps 			/* since start may have reset this fix */
   1670   1.8    chopps 			if (!scp->sca->sc_usedma) {
   1671   1.8    chopps 				scp->sca->scu_set_page(scp->sca,
   1672   1.8    chopps 				    scp->sp_rxdesc_p);
   1673   1.8    chopps 				scp->sca->scu_page_on(scp->sca);
   1674   1.8    chopps 			}
   1675   1.9    chopps 			return;
   1676   1.1  explorer 		default:
   1677   1.1  explorer 			SCA_DPRINTF(SCA_DEBUG_CISCO,
   1678   1.1  explorer 				    ("Unknown CISCO keepalive protocol 0x%04x\n",
   1679   1.1  explorer 				     ntohl(cisco->type)));
   1680   1.9    chopps 
   1681   1.9    chopps 			scp->sp_if.if_noproto++;
   1682   1.9    chopps 			goto dropit;
   1683   1.1  explorer 		}
   1684   1.9    chopps 		return;
   1685   1.1  explorer 	default:
   1686   1.1  explorer 		SCA_DPRINTF(SCA_DEBUG_RX,
   1687   1.1  explorer 			    ("Unknown/unexpected ethertype 0x%04x\n",
   1688   1.9    chopps 			     ntohs(hdlc->h_proto)));
   1689   1.9    chopps 		scp->sp_if.if_noproto++;
   1690   1.9    chopps 		goto dropit;
   1691   1.9    chopps 	}
   1692   1.9    chopps 
   1693   1.9    chopps 	/* queue the packet */
   1694   1.9    chopps 	if (!IF_QFULL(ifq)) {
   1695   1.9    chopps 		IF_ENQUEUE(ifq, m);
   1696   1.9    chopps 	} else {
   1697   1.9    chopps 		IF_DROP(ifq);
   1698   1.9    chopps 		scp->sp_if.if_iqdrops++;
   1699   1.9    chopps 		goto dropit;
   1700   1.9    chopps 	}
   1701   1.9    chopps 	return;
   1702   1.9    chopps dropit:
   1703   1.9    chopps 	if (m)
   1704   1.8    chopps 		m_freem(m);
   1705   1.9    chopps 	return;
   1706   1.1  explorer }
   1707   1.1  explorer 
   1708   1.1  explorer #if SCA_DEBUG_LEVEL > 0
   1709   1.1  explorer /*
   1710   1.1  explorer  * do a hex dump of the packet received into descriptor "desc" with
   1711   1.1  explorer  * data buffer "p"
   1712   1.1  explorer  */
   1713   1.1  explorer static void
   1714   1.1  explorer sca_frame_print(sca_port_t *scp, sca_desc_t *desc, u_int8_t *p)
   1715   1.1  explorer {
   1716   1.1  explorer 	int i;
   1717   1.1  explorer 	int nothing_yet = 1;
   1718   1.8    chopps 	struct sca_softc *sc;
   1719   1.8    chopps 	u_int len;
   1720   1.1  explorer 
   1721   1.8    chopps 	sc = scp->sca;
   1722   1.8    chopps 	printf("desc va %p: chainp 0x%x bufp 0x%0x stat 0x%0x len %d\n",
   1723   1.8    chopps 	       desc,
   1724   1.8    chopps 	       sca_desc_read_chainp(sc, desc),
   1725   1.8    chopps 	       sca_desc_read_bufp(sc, desc),
   1726   1.8    chopps 	       sca_desc_read_stat(sc, desc),
   1727   1.8    chopps 	       (len = sca_desc_read_buflen(sc, desc)));
   1728   1.8    chopps 
   1729   1.8    chopps 	for (i = 0 ; i < len && i < 256; i++) {
   1730   1.8    chopps 		if (nothing_yet == 1 &&
   1731   1.8    chopps 		    (sc->sc_usedma ? *p
   1732   1.8    chopps 			: bus_space_read_1(sc->scu_memt, sc->scu_memh,
   1733   1.8    chopps 		    sca_page_addr(sc, p))) == 0) {
   1734   1.1  explorer 			p++;
   1735   1.1  explorer 			continue;
   1736   1.1  explorer 		}
   1737   1.1  explorer 		nothing_yet = 0;
   1738   1.1  explorer 		if (i % 16 == 0)
   1739   1.1  explorer 			printf("\n");
   1740   1.8    chopps 		printf("%02x ",
   1741   1.8    chopps 		    (sc->sc_usedma ? *p
   1742   1.8    chopps 		    : bus_space_read_1(sc->scu_memt, sc->scu_memh,
   1743   1.8    chopps 		    sca_page_addr(sc, p))));
   1744   1.8    chopps 		p++;
   1745   1.1  explorer 	}
   1746   1.1  explorer 
   1747   1.1  explorer 	if (i % 16 != 1)
   1748   1.1  explorer 		printf("\n");
   1749   1.1  explorer }
   1750   1.1  explorer #endif
   1751   1.1  explorer 
   1752   1.1  explorer /*
   1753   1.8    chopps  * adjust things becuase we have just read the current starting
   1754   1.8    chopps  * frame
   1755   1.8    chopps  *
   1756   1.8    chopps  * must be called at splnet()
   1757   1.1  explorer  */
   1758   1.1  explorer static void
   1759   1.8    chopps sca_frame_read_done(sca_port_t *scp)
   1760   1.1  explorer {
   1761   1.8    chopps 	u_int16_t edesc_p;
   1762   1.1  explorer 
   1763   1.8    chopps 	/* update where our indicies are */
   1764   1.8    chopps 	scp->sp_rxend = scp->sp_rxstart;
   1765   1.8    chopps 	scp->sp_rxstart = (scp->sp_rxstart + 1) % scp->sp_nrxdesc;
   1766   1.8    chopps 
   1767   1.8    chopps 	/* update the error [end] descriptor */
   1768   1.8    chopps 	edesc_p = (u_int16_t)scp->sp_rxdesc_p +
   1769   1.8    chopps 	    (sizeof(sca_desc_t) * scp->sp_rxend);
   1770   1.8    chopps 	dmac_write_2(scp, SCA_EDAL0, edesc_p);
   1771   1.1  explorer }
   1772   1.1  explorer 
   1773   1.1  explorer /*
   1774   1.1  explorer  * set a port to the "up" state
   1775   1.1  explorer  */
   1776   1.1  explorer static void
   1777   1.1  explorer sca_port_up(sca_port_t *scp)
   1778   1.1  explorer {
   1779   1.1  explorer 	struct sca_softc *sc = scp->sca;
   1780   1.8    chopps #if 0
   1781   1.8    chopps 	u_int8_t ier0, ier1;
   1782   1.8    chopps #endif
   1783   1.1  explorer 
   1784   1.1  explorer 	/*
   1785   1.1  explorer 	 * reset things
   1786   1.1  explorer 	 */
   1787   1.1  explorer #if 0
   1788   1.1  explorer 	msci_write_1(scp, SCA_CMD0, SCA_CMD_TXRESET);
   1789   1.1  explorer 	msci_write_1(scp, SCA_CMD0, SCA_CMD_RXRESET);
   1790   1.1  explorer #endif
   1791   1.1  explorer 	/*
   1792   1.1  explorer 	 * clear in-use flag
   1793   1.1  explorer 	 */
   1794   1.1  explorer 	scp->sp_if.if_flags &= ~IFF_OACTIVE;
   1795   1.8    chopps 	scp->sp_if.if_flags |= IFF_RUNNING;
   1796   1.1  explorer 
   1797   1.1  explorer 	/*
   1798   1.1  explorer 	 * raise DTR
   1799   1.1  explorer 	 */
   1800   1.8    chopps 	sc->sc_dtr_callback(sc->sc_aux, scp->sp_port, 1);
   1801   1.1  explorer 
   1802   1.1  explorer 	/*
   1803   1.1  explorer 	 * raise RTS
   1804   1.1  explorer 	 */
   1805   1.1  explorer 	msci_write_1(scp, SCA_CTL0,
   1806   1.8    chopps 	     (msci_read_1(scp, SCA_CTL0) & ~SCA_CTL_RTS_MASK)
   1807   1.8    chopps 	     | SCA_CTL_RTS_HIGH);
   1808   1.1  explorer 
   1809   1.8    chopps #if 0
   1810   1.1  explorer 	/*
   1811   1.8    chopps 	 * enable interrupts (no timer IER2)
   1812   1.1  explorer 	 */
   1813   1.8    chopps 	ier0 = SCA_IER0_MSCI_RXRDY0 | SCA_IER0_MSCI_TXRDY0
   1814   1.8    chopps 	    | SCA_IER0_MSCI_RXINT0 | SCA_IER0_MSCI_TXINT0;
   1815   1.8    chopps 	ier1 = SCA_IER1_DMAC_RX0A | SCA_IER1_DMAC_RX0B
   1816   1.8    chopps 	    | SCA_IER1_DMAC_TX0A | SCA_IER1_DMAC_TX0B;
   1817   1.8    chopps 	if (scp->sp_port == 1) {
   1818   1.8    chopps 		ier0 <<= 4;
   1819   1.8    chopps 		ier1 <<= 4;
   1820   1.8    chopps 	}
   1821   1.8    chopps 	sca_write_1(sc, SCA_IER0, sca_read_1(sc, SCA_IER0) | ier0);
   1822   1.8    chopps 	sca_write_1(sc, SCA_IER1, sca_read_1(sc, SCA_IER1) | ier1);
   1823   1.8    chopps #else
   1824   1.1  explorer 	if (scp->sp_port == 0) {
   1825   1.1  explorer 		sca_write_1(sc, SCA_IER0, sca_read_1(sc, SCA_IER0) | 0x0f);
   1826   1.1  explorer 		sca_write_1(sc, SCA_IER1, sca_read_1(sc, SCA_IER1) | 0x0f);
   1827   1.8    chopps 	} else {
   1828   1.1  explorer 		sca_write_1(sc, SCA_IER0, sca_read_1(sc, SCA_IER0) | 0xf0);
   1829   1.1  explorer 		sca_write_1(sc, SCA_IER1, sca_read_1(sc, SCA_IER1) | 0xf0);
   1830   1.1  explorer 	}
   1831   1.8    chopps #endif
   1832   1.1  explorer 
   1833   1.1  explorer 	/*
   1834   1.1  explorer 	 * enable transmit and receive
   1835   1.1  explorer 	 */
   1836   1.1  explorer 	msci_write_1(scp, SCA_CMD0, SCA_CMD_TXENABLE);
   1837   1.1  explorer 	msci_write_1(scp, SCA_CMD0, SCA_CMD_RXENABLE);
   1838   1.1  explorer 
   1839   1.1  explorer 	/*
   1840   1.1  explorer 	 * reset internal state
   1841   1.1  explorer 	 */
   1842   1.8    chopps 	scp->sp_txinuse = 0;
   1843   1.8    chopps 	scp->sp_txcur = 0;
   1844   1.1  explorer 	scp->cka_lasttx = time.tv_usec;
   1845   1.1  explorer 	scp->cka_lastrx = 0;
   1846   1.1  explorer }
   1847   1.1  explorer 
   1848   1.1  explorer /*
   1849   1.1  explorer  * set a port to the "down" state
   1850   1.1  explorer  */
   1851   1.1  explorer static void
   1852   1.1  explorer sca_port_down(sca_port_t *scp)
   1853   1.1  explorer {
   1854   1.1  explorer 	struct sca_softc *sc = scp->sca;
   1855   1.8    chopps #if 0
   1856   1.8    chopps 	u_int8_t ier0, ier1;
   1857   1.8    chopps #endif
   1858   1.1  explorer 
   1859   1.1  explorer 	/*
   1860   1.1  explorer 	 * lower DTR
   1861   1.1  explorer 	 */
   1862   1.8    chopps 	sc->sc_dtr_callback(sc->sc_aux, scp->sp_port, 0);
   1863   1.1  explorer 
   1864   1.1  explorer 	/*
   1865   1.1  explorer 	 * lower RTS
   1866   1.1  explorer 	 */
   1867   1.1  explorer 	msci_write_1(scp, SCA_CTL0,
   1868   1.8    chopps 	     (msci_read_1(scp, SCA_CTL0) & ~SCA_CTL_RTS_MASK)
   1869   1.8    chopps 	     | SCA_CTL_RTS_LOW);
   1870   1.1  explorer 
   1871   1.1  explorer 	/*
   1872   1.1  explorer 	 * disable interrupts
   1873   1.1  explorer 	 */
   1874   1.8    chopps #if 0
   1875   1.8    chopps 	ier0 = SCA_IER0_MSCI_RXRDY0 | SCA_IER0_MSCI_TXRDY0
   1876   1.8    chopps 	    | SCA_IER0_MSCI_RXINT0 | SCA_IER0_MSCI_TXINT0;
   1877   1.8    chopps 	ier1 = SCA_IER1_DMAC_RX0A | SCA_IER1_DMAC_RX0B
   1878   1.8    chopps 	    | SCA_IER1_DMAC_TX0A | SCA_IER1_DMAC_TX0B;
   1879   1.8    chopps 	if (scp->sp_port == 1) {
   1880   1.8    chopps 		ier0 <<= 4;
   1881   1.8    chopps 		ier1 <<= 4;
   1882   1.8    chopps 	}
   1883   1.8    chopps 	sca_write_1(sc, SCA_IER0, sca_read_1(sc, SCA_IER0) & ~ier0);
   1884   1.8    chopps 	sca_write_1(sc, SCA_IER1, sca_read_1(sc, SCA_IER1) & ~ier1);
   1885   1.8    chopps #else
   1886   1.1  explorer 	if (scp->sp_port == 0) {
   1887   1.1  explorer 		sca_write_1(sc, SCA_IER0, sca_read_1(sc, SCA_IER0) & 0xf0);
   1888   1.1  explorer 		sca_write_1(sc, SCA_IER1, sca_read_1(sc, SCA_IER1) & 0xf0);
   1889   1.8    chopps 	} else {
   1890   1.1  explorer 		sca_write_1(sc, SCA_IER0, sca_read_1(sc, SCA_IER0) & 0x0f);
   1891   1.1  explorer 		sca_write_1(sc, SCA_IER1, sca_read_1(sc, SCA_IER1) & 0x0f);
   1892   1.1  explorer 	}
   1893   1.8    chopps #endif
   1894   1.1  explorer 
   1895   1.1  explorer 	/*
   1896   1.1  explorer 	 * disable transmit and receive
   1897   1.1  explorer 	 */
   1898   1.1  explorer 	msci_write_1(scp, SCA_CMD0, SCA_CMD_RXDISABLE);
   1899   1.1  explorer 	msci_write_1(scp, SCA_CMD0, SCA_CMD_TXDISABLE);
   1900   1.1  explorer 
   1901   1.1  explorer 	/*
   1902   1.1  explorer 	 * no, we're not in use anymore
   1903   1.1  explorer 	 */
   1904   1.8    chopps 	scp->sp_if.if_flags &= ~(IFF_OACTIVE|IFF_RUNNING);
   1905   1.1  explorer }
   1906   1.1  explorer 
   1907   1.1  explorer /*
   1908   1.1  explorer  * disable all DMA and interrupts for all ports at once.
   1909   1.1  explorer  */
   1910   1.1  explorer void
   1911   1.1  explorer sca_shutdown(struct sca_softc *sca)
   1912   1.1  explorer {
   1913   1.1  explorer 	/*
   1914   1.1  explorer 	 * disable DMA and interrupts
   1915   1.1  explorer 	 */
   1916   1.1  explorer 	sca_write_1(sca, SCA_DMER, 0);
   1917   1.1  explorer 	sca_write_1(sca, SCA_IER0, 0);
   1918   1.1  explorer 	sca_write_1(sca, SCA_IER1, 0);
   1919   1.1  explorer }
   1920   1.1  explorer 
   1921   1.1  explorer /*
   1922   1.1  explorer  * If there are packets to transmit, start the transmit DMA logic.
   1923   1.1  explorer  */
   1924   1.1  explorer static void
   1925   1.1  explorer sca_port_starttx(sca_port_t *scp)
   1926   1.1  explorer {
   1927   1.1  explorer 	struct sca_softc *sc;
   1928   1.1  explorer 	u_int32_t	startdesc_p, enddesc_p;
   1929   1.1  explorer 	int enddesc;
   1930   1.1  explorer 
   1931   1.1  explorer 	sc = scp->sca;
   1932   1.1  explorer 
   1933   1.8    chopps 	SCA_DPRINTF(SCA_DEBUG_TX, ("TX: starttx\n"));
   1934   1.8    chopps 
   1935   1.1  explorer 	if (((scp->sp_if.if_flags & IFF_OACTIVE) == IFF_OACTIVE)
   1936   1.8    chopps 	    || scp->sp_txinuse == 0)
   1937   1.1  explorer 		return;
   1938   1.8    chopps 
   1939   1.8    chopps 	SCA_DPRINTF(SCA_DEBUG_TX, ("TX: setting oactive\n"));
   1940   1.8    chopps 
   1941   1.1  explorer 	scp->sp_if.if_flags |= IFF_OACTIVE;
   1942   1.1  explorer 
   1943   1.1  explorer 	/*
   1944   1.1  explorer 	 * We have something to do, since we have at least one packet
   1945   1.1  explorer 	 * waiting, and we are not already marked as active.
   1946   1.1  explorer 	 */
   1947   1.8    chopps 	enddesc = (scp->sp_txcur + 1) % scp->sp_ntxdesc;
   1948   1.8    chopps 	startdesc_p = scp->sp_txdesc_p;
   1949   1.8    chopps 	enddesc_p = scp->sp_txdesc_p + sizeof(sca_desc_t) * enddesc;
   1950   1.1  explorer 
   1951   1.8    chopps 	SCA_DPRINTF(SCA_DEBUG_TX, ("TX: start %x end %x\n",
   1952   1.8    chopps 	    startdesc_p, enddesc_p));
   1953   1.1  explorer 
   1954   1.1  explorer 	dmac_write_2(scp, SCA_EDAL1, (u_int16_t)(enddesc_p & 0x0000ffff));
   1955   1.1  explorer 	dmac_write_2(scp, SCA_CDAL1,
   1956   1.1  explorer 		     (u_int16_t)(startdesc_p & 0x0000ffff));
   1957   1.1  explorer 
   1958   1.1  explorer 	/*
   1959   1.1  explorer 	 * enable the DMA
   1960   1.1  explorer 	 */
   1961   1.1  explorer 	dmac_write_1(scp, SCA_DSR1, SCA_DSR_DE);
   1962   1.1  explorer }
   1963   1.1  explorer 
   1964   1.1  explorer /*
   1965   1.1  explorer  * allocate an mbuf at least long enough to hold "len" bytes.
   1966   1.1  explorer  * If "p" is non-NULL, copy "len" bytes from it into the new mbuf,
   1967   1.1  explorer  * otherwise let the caller handle copying the data in.
   1968   1.1  explorer  */
   1969   1.1  explorer static struct mbuf *
   1970   1.8    chopps sca_mbuf_alloc(struct sca_softc *sc, caddr_t p, u_int len)
   1971   1.1  explorer {
   1972   1.1  explorer 	struct mbuf *m;
   1973   1.1  explorer 
   1974   1.1  explorer 	/*
   1975   1.1  explorer 	 * allocate an mbuf and copy the important bits of data
   1976   1.1  explorer 	 * into it.  If the packet won't fit in the header,
   1977   1.1  explorer 	 * allocate a cluster for it and store it there.
   1978   1.1  explorer 	 */
   1979   1.1  explorer 	MGETHDR(m, M_DONTWAIT, MT_DATA);
   1980   1.1  explorer 	if (m == NULL)
   1981   1.1  explorer 		return NULL;
   1982   1.1  explorer 	if (len > MHLEN) {
   1983   1.1  explorer 		if (len > MCLBYTES) {
   1984   1.1  explorer 			m_freem(m);
   1985   1.1  explorer 			return NULL;
   1986   1.1  explorer 		}
   1987   1.1  explorer 		MCLGET(m, M_DONTWAIT);
   1988   1.1  explorer 		if ((m->m_flags & M_EXT) == 0) {
   1989   1.1  explorer 			m_freem(m);
   1990   1.1  explorer 			return NULL;
   1991   1.1  explorer 		}
   1992   1.1  explorer 	}
   1993   1.8    chopps 	if (p != NULL) {
   1994   1.8    chopps 		/* XXX do we need to sync here? */
   1995   1.8    chopps 		if (sc->sc_usedma)
   1996   1.8    chopps 			bcopy(p, mtod(m, caddr_t), len);
   1997   1.8    chopps 		else
   1998   1.8    chopps 			bus_space_read_region_1(sc->scu_memt, sc->scu_memh,
   1999   1.8    chopps 			    sca_page_addr(sc, p), mtod(m, u_int8_t *), len);
   2000   1.8    chopps 	}
   2001   1.1  explorer 	m->m_len = len;
   2002   1.1  explorer 	m->m_pkthdr.len = len;
   2003   1.1  explorer 
   2004   1.1  explorer 	return (m);
   2005   1.1  explorer }
   2006   1.8    chopps 
   2007   1.8    chopps /*
   2008   1.8    chopps  * get the base clock
   2009   1.8    chopps  */
   2010   1.8    chopps void
   2011   1.8    chopps sca_get_base_clock(struct sca_softc *sc)
   2012   1.8    chopps {
   2013   1.8    chopps 	struct timeval btv, ctv, dtv;
   2014   1.8    chopps 	u_int64_t bcnt;
   2015   1.8    chopps 	u_int32_t cnt;
   2016   1.8    chopps 	u_int16_t subcnt;
   2017   1.8    chopps 
   2018   1.8    chopps 	/* disable the timer, set prescale to 0 */
   2019   1.8    chopps 	sca_write_1(sc, SCA_TCSR0, 0);
   2020   1.8    chopps 	sca_write_1(sc, SCA_TEPR0, 0);
   2021   1.8    chopps 
   2022   1.8    chopps 	/* reset the counter */
   2023   1.8    chopps 	(void)sca_read_1(sc, SCA_TCSR0);
   2024   1.8    chopps 	subcnt = sca_read_2(sc, SCA_TCNTL0);
   2025   1.8    chopps 
   2026   1.8    chopps 	/* count to max */
   2027   1.8    chopps 	sca_write_2(sc, SCA_TCONRL0, 0xffff);
   2028   1.8    chopps 
   2029   1.8    chopps 	cnt = 0;
   2030   1.8    chopps 	microtime(&btv);
   2031   1.8    chopps 	/* start the timer -- no interrupt enable */
   2032   1.8    chopps 	sca_write_1(sc, SCA_TCSR0, SCA_TCSR_TME);
   2033   1.8    chopps 	for (;;) {
   2034   1.8    chopps 		microtime(&ctv);
   2035   1.8    chopps 
   2036   1.8    chopps 		/* end around 3/4 of a second */
   2037   1.8    chopps 		timersub(&ctv, &btv, &dtv);
   2038   1.8    chopps 		if (dtv.tv_usec >= 750000)
   2039   1.8    chopps 			break;
   2040   1.8    chopps 
   2041   1.8    chopps 		/* spin */
   2042   1.8    chopps 		while (!(sca_read_1(sc, SCA_TCSR0) & SCA_TCSR_CMF))
   2043   1.8    chopps 			;
   2044   1.8    chopps 		/* reset the timer */
   2045   1.8    chopps 		(void)sca_read_2(sc, SCA_TCNTL0);
   2046   1.8    chopps 		cnt++;
   2047   1.8    chopps 	}
   2048   1.8    chopps 
   2049   1.8    chopps 	/* stop the timer */
   2050   1.8    chopps 	sca_write_1(sc, SCA_TCSR0, 0);
   2051   1.8    chopps 
   2052   1.8    chopps 	subcnt = sca_read_2(sc, SCA_TCNTL0);
   2053   1.8    chopps 	/* add the slop in and get the total timer ticks */
   2054   1.8    chopps 	cnt = (cnt << 16) | subcnt;
   2055   1.8    chopps 
   2056   1.8    chopps 	/* cnt is 1/8 the actual time */
   2057   1.8    chopps 	bcnt = cnt * 8;
   2058   1.8    chopps 	/* make it proportional to 3/4 of a second */
   2059   1.8    chopps 	bcnt *= (u_int64_t)750000;
   2060   1.8    chopps 	bcnt /= (u_int64_t)dtv.tv_usec;
   2061   1.8    chopps 	cnt = bcnt;
   2062   1.8    chopps 
   2063   1.8    chopps 	/* make it Hz */
   2064   1.8    chopps 	cnt *= 4;
   2065   1.8    chopps 	cnt /= 3;
   2066   1.8    chopps 
   2067   1.8    chopps 	SCA_DPRINTF(SCA_DEBUG_CLOCK,
   2068   1.8    chopps 	    ("sca: unadjusted base %lu Hz\n", (u_long)cnt));
   2069   1.8    chopps 
   2070   1.8    chopps 	/*
   2071   1.8    chopps 	 * round to the nearest 200 -- this allows for +-3 ticks error
   2072   1.8    chopps 	 */
   2073   1.8    chopps 	sc->sc_baseclock = ((cnt + 100) / 200) * 200;
   2074   1.8    chopps }
   2075   1.8    chopps 
   2076   1.8    chopps /*
   2077   1.8    chopps  * print the information about the clock on the ports
   2078   1.8    chopps  */
   2079   1.8    chopps void
   2080   1.8    chopps sca_print_clock_info(struct sca_softc *sc)
   2081   1.8    chopps {
   2082   1.8    chopps 	struct sca_port *scp;
   2083   1.8    chopps 	u_int32_t mhz, div;
   2084   1.8    chopps 	int i;
   2085   1.8    chopps 
   2086   1.8    chopps 	printf("%s: base clock %d Hz\n", sc->sc_parent->dv_xname,
   2087   1.8    chopps 	    sc->sc_baseclock);
   2088   1.8    chopps 
   2089   1.8    chopps 	/* print the information about the port clock selection */
   2090   1.8    chopps 	for (i = 0; i < sc->sc_numports; i++) {
   2091   1.8    chopps 		scp = &sc->sc_ports[i];
   2092   1.8    chopps 		mhz = sc->sc_baseclock / (scp->sp_tmc ? scp->sp_tmc : 256);
   2093   1.8    chopps 		div = scp->sp_rxs & SCA_RXS_DIV_MASK;
   2094   1.8    chopps 
   2095   1.8    chopps 		printf("%s: rx clock: ", scp->sp_if.if_xname);
   2096   1.8    chopps 		switch (scp->sp_rxs & SCA_RXS_CLK_MASK) {
   2097   1.8    chopps 		case SCA_RXS_CLK_LINE:
   2098   1.8    chopps 			printf("line");
   2099   1.8    chopps 			break;
   2100   1.8    chopps 		case SCA_RXS_CLK_LINE_SN:
   2101   1.8    chopps 			printf("line with noise suppression");
   2102   1.8    chopps 			break;
   2103   1.8    chopps 		case SCA_RXS_CLK_INTERNAL:
   2104   1.8    chopps 			printf("internal %d Hz", (mhz >> div));
   2105   1.8    chopps 			break;
   2106   1.8    chopps 		case SCA_RXS_CLK_ADPLL_OUT:
   2107   1.8    chopps 			printf("adpll using internal %d Hz", (mhz >> div));
   2108   1.8    chopps 			break;
   2109   1.8    chopps 		case SCA_RXS_CLK_ADPLL_IN:
   2110   1.8    chopps 			printf("adpll using line clock");
   2111   1.8    chopps 			break;
   2112   1.8    chopps 		}
   2113   1.8    chopps 		printf("  tx clock: ");
   2114   1.8    chopps 		div = scp->sp_txs & SCA_TXS_DIV_MASK;
   2115   1.8    chopps 		switch (scp->sp_txs & SCA_TXS_CLK_MASK) {
   2116   1.8    chopps 		case SCA_TXS_CLK_LINE:
   2117   1.8    chopps 			printf("line\n");
   2118   1.8    chopps 			break;
   2119   1.8    chopps 		case SCA_TXS_CLK_INTERNAL:
   2120   1.8    chopps 			printf("internal %d Hz\n", (mhz >> div));
   2121   1.8    chopps 			break;
   2122   1.8    chopps 		case SCA_TXS_CLK_RXCLK:
   2123   1.8    chopps 			printf("rxclock\n");
   2124   1.8    chopps 			break;
   2125   1.8    chopps 		}
   2126   1.8    chopps 		if (scp->sp_eclock)
   2127   1.8    chopps 			printf("%s: outputting line clock\n",
   2128   1.8    chopps 			    scp->sp_if.if_xname);
   2129   1.8    chopps 	}
   2130   1.8    chopps }
   2131   1.8    chopps 
   2132