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hfa3861areg.h revision 1.1 
      1 #ifndef _DEV_IC_HFA3861A_H_
      2 #define _DEV_IC_HFA3861A_H_
      3 
      4 /* Register set for the Intersil HFA3861A. */
      5 
      6 #define	HFA3861A_CR49	0x62	/* Read-only register mux control */
      7 #define	HFA3861A_CR49_SEL	__BIT(7)	/* 0: read-only register set 'b'
      8 						 * 1: read-only register set 'a'
      9 						 */
     10 #define	HFA3861A_CR49_RSVD	__BITS(6, 0)
     11 
     12 #define	HFA3861A_CR61	0x7c	/* Rx status, read-only, sets 'a' & 'b' */
     13 
     14 #define	HFA3861A_CR62	0x7e	/* RSSI, read-only
     15 #define	HFA3861A_CR62_RSSI	__BITS(7, 0)	/* RSSI, sets 'a' & 'b' */
     16 
     17 #define	HFA3861A_CR63	0x80	/* Rx status, read-only */
     18 #define	HFA3861A_CR63_SIGNAL	__BITS(7, 6)	/* signal field value,
     19 						 * sets 'a' & 'b' */
     20 /* 1 Mbps */
     21 #define	HFA3861A_CR63_SIGNAL_1MBPS	__SHIFTIN(0, HFA3861A_CR63_SIGNAL)
     22 /* 2 Mbps */
     23 #define	HFA3861A_CR63_SIGNAL_2MBPS	__SHIFTIN(2, HFA3861A_CR63_SIGNAL)
     24 /* 5.5 or 11 Mbps */
     25 #define	HFA3861A_CR63_SIGNAL_OTHER_MBPS	__SHIFTIN(1, HFA3861A_CR63_SIGNAL)
     26 #define	HFA3861A_CR63_SFD	__BIT(5)	/* SFD found, sets 'a' & 'b' */
     27 #define	HFA3861A_CR63_SHORTPRE	__BIT(4)	/* short preamble detected,
     28 						 * sets 'a' & 'b'
     29 						 */
     30 #define	HFA3861A_CR63_SIGNAL_OK	__BIT(3)	/* valid signal field,
     31 						 * sets 'a' & 'b'
     32 						 */
     33 #define	HFA3861A_CR63_CRC16_OK	__BIT(2)	/* valid CRC 16,
     34 						 * sets 'a' & 'b'
     35 						 */
     36 #define	HFA3861A_CR63_ANTENNA	__BIT(1)	/* antenna used,
     37 						 * sets 'a' & 'b'
     38 						 */
     39 #define	HFA3861A_CR63_RSVD	__BIT(0)	/* reserved, sets 'a' & 'b' */
     40 
     41 #endif /* _DEV_IC_HFA3861A_H_ */
     42