hfa3861areg.h revision 1.2 1 /* $NetBSD: hfa3861areg.h,v 1.2 2007/11/16 04:31:34 dyoung Exp $ */
2 /* $Id: hfa3861areg.h,v 1.2 2007/11/16 04:31:34 dyoung Exp $ */
3 /*
4 * Copyright (c) 2007 David Young. All rights reserved.
5 *
6 * Written by David Young.
7 *
8 * Redistribution and use in source and binary forms, with or
9 * without modification, are permitted provided that the following
10 * conditions are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above
14 * copyright notice, this list of conditions and the following
15 * disclaimer in the documentation and/or other materials provided
16 * with the distribution.
17 * 3. David Young's name may not be used to endorse or promote
18 * products derived from this software without specific prior
19 * written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY DAVID YOUNG ``AS IS'' AND ANY
22 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
23 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
24 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL DAVID
25 * YOUNG BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
26 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
27 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
32 * OF SUCH DAMAGE.
33 */
34 #ifndef _DEV_IC_HFA3861A_H_
35 #define _DEV_IC_HFA3861A_H_
36
37 /* Register set for the Intersil HFA3861A. */
38
39 #define HFA3861A_CR49 0x62 /* Read-only register mux control */
40 #define HFA3861A_CR49_SEL __BIT(7) /* 0: read-only register set 'b'
41 * 1: read-only register set 'a'
42 */
43 #define HFA3861A_CR49_RSVD __BITS(6, 0)
44
45 #define HFA3861A_CR61 0x7c /* Rx status, read-only, sets 'a' & 'b' */
46
47 #define HFA3861A_CR62 0x7e /* RSSI, read-only */
48 #define HFA3861A_CR62_RSSI __BITS(7, 0) /* RSSI, sets 'a' & 'b' */
49
50 #define HFA3861A_CR63 0x80 /* Rx status, read-only */
51 #define HFA3861A_CR63_SIGNAL __BITS(7, 6) /* signal field value,
52 * sets 'a' & 'b' */
53 /* 1 Mbps */
54 #define HFA3861A_CR63_SIGNAL_1MBPS __SHIFTIN(0, HFA3861A_CR63_SIGNAL)
55 /* 2 Mbps */
56 #define HFA3861A_CR63_SIGNAL_2MBPS __SHIFTIN(2, HFA3861A_CR63_SIGNAL)
57 /* 5.5 or 11 Mbps */
58 #define HFA3861A_CR63_SIGNAL_OTHER_MBPS __SHIFTIN(1, HFA3861A_CR63_SIGNAL)
59 #define HFA3861A_CR63_SFD __BIT(5) /* SFD found, sets 'a' & 'b' */
60 #define HFA3861A_CR63_SHORTPRE __BIT(4) /* short preamble detected,
61 * sets 'a' & 'b'
62 */
63 #define HFA3861A_CR63_SIGNAL_OK __BIT(3) /* valid signal field,
64 * sets 'a' & 'b'
65 */
66 #define HFA3861A_CR63_CRC16_OK __BIT(2) /* valid CRC 16,
67 * sets 'a' & 'b'
68 */
69 #define HFA3861A_CR63_ANTENNA __BIT(1) /* antenna used,
70 * sets 'a' & 'b'
71 */
72 #define HFA3861A_CR63_RSVD __BIT(0) /* reserved, sets 'a' & 'b' */
73
74 #endif /* _DEV_IC_HFA3861A_H_ */
75