i82365var.h revision 1.1.2.1 1 #include <sys/device.h>
2
3 #include <dev/pcmcia/pcmciareg.h>
4 #include <dev/pcmcia/pcmciachip.h>
5
6 #include <dev/ic/i82365reg.h>
7
8 struct pcic_handle {
9 struct pcic_softc *sc;
10 int vendor;
11 int sock;
12 int flags;
13 int memalloc;
14 int ioalloc;
15 struct device *pcmcia;
16 };
17
18 #define C0SA PCIC_CHIP0_BASE+PCIC_SOCKETA_INDEX
19 #define C0SB PCIC_CHIP0_BASE+PCIC_SOCKETB_INDEX
20 #define C1SA PCIC_CHIP1_BASE+PCIC_SOCKETA_INDEX
21 #define C1SB PCIC_CHIP1_BASE+PCIC_SOCKETB_INDEX
22
23 /* This is sort of arbitrary. It merely needs to be "enough".
24 It can be overridden in the conf file, anyway. */
25
26 #define PCIC_MEM_PAGES 4
27 #define PCIC_MEMSIZE PCIC_MEM_PAGES*PCIC_MEM_PAGESIZE
28
29 #define PCIC_NSLOTS 4
30
31 struct pcic_softc {
32 struct device dev;
33
34 bus_space_tag_t memt;
35 bus_space_handle_t memh;
36 bus_space_tag_t iot;
37 bus_space_handle_t ioh;
38
39 /* XXX isa_chipset_tag_t, pci_chipset_tag_t, etc. */
40 caddr_t intr_est;
41
42 pcmcia_chipset_tag_t pct;
43
44 /* this needs to be large enough to hold PCIC_MEM_PAGES bits */
45 int subregionmask;
46
47 /* used by memory window mapping functions */
48 bus_addr_t membase;
49
50 int irq;
51 void *ih;
52
53 struct pcic_handle handle[PCIC_NSLOTS];
54 };
55
56
57 int pcic_ident_ok __P((int));
58 int pcic_vendor __P((struct pcic_handle *));
59 char *pcic_vendor_to_string __P((int));
60
61 void pcic_attach __P((struct pcic_softc *));
62 void pcic_attach_sockets __P((struct pcic_softc *));
63 int pcic_intr __P((void *arg));
64
65 static inline int pcic_read __P((struct pcic_handle *, int));
66 static inline void pcic_write __P((struct pcic_handle *, int, int));
67 static inline void pcic_wait_ready __P((struct pcic_handle *));
68
69 int pcic_chip_mem_alloc __P((pcmcia_chipset_handle_t, bus_size_t,
70 struct pcmcia_mem_handle *));
71 void pcic_chip_mem_free __P((pcmcia_chipset_handle_t,
72 struct pcmcia_mem_handle *));
73 int pcic_chip_mem_map __P((pcmcia_chipset_handle_t, int, bus_addr_t,
74 bus_size_t, struct pcmcia_mem_handle *,
75 bus_addr_t *, int *));
76 void pcic_chip_mem_unmap __P((pcmcia_chipset_handle_t, int));
77
78 int pcic_chip_io_alloc __P((pcmcia_chipset_handle_t, bus_addr_t, bus_size_t,
79 struct pcmcia_io_handle *));
80 void pcic_chip_io_free __P((pcmcia_chipset_handle_t,
81 struct pcmcia_io_handle *));
82 int pcic_chip_io_map __P((pcmcia_chipset_handle_t, int, bus_addr_t, bus_size_t,
83 struct pcmcia_io_handle *, int *));
84 void pcic_chip_io_unmap __P((pcmcia_chipset_handle_t, int));
85
86 void pcic_chip_socket_enable __P((pcmcia_chipset_handle_t));
87 void pcic_chip_socket_disable __P((pcmcia_chipset_handle_t));
88
89 static inline int
90 pcic_read(h, idx)
91 struct pcic_handle *h;
92 int idx;
93 {
94 if (idx != -1)
95 bus_space_write_1(h->sc->iot, h->sc->ioh, PCIC_REG_INDEX, h->sock+idx);
96 return(bus_space_read_1(h->sc->iot, h->sc->ioh, PCIC_REG_DATA));
97 }
98
99 static inline void
100 pcic_write(h, idx, data)
101 struct pcic_handle *h;
102 int idx;
103 int data;
104 {
105 if (idx != -1)
106 bus_space_write_1(h->sc->iot, h->sc->ioh, PCIC_REG_INDEX, h->sock+idx);
107 bus_space_write_1(h->sc->iot, h->sc->ioh, PCIC_REG_DATA, (data));
108 }
109
110 static inline void
111 pcic_wait_ready(h)
112 struct pcic_handle *h;
113 {
114 int i;
115
116 for (i=0; i<10000; i++) {
117 if (pcic_read(h, PCIC_IF_STATUS) & PCIC_IF_STATUS_READY)
118 return;
119 delay(500);
120 }
121
122 #ifdef DIAGNOSTIC
123 printf("pcic_wait_ready ready never happened\n");
124 #endif
125 }
126
127