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i82365var.h revision 1.1.2.3 
      1 #include <sys/device.h>
      2 
      3 #include <dev/pcmcia/pcmciareg.h>
      4 #include <dev/pcmcia/pcmciachip.h>
      5 
      6 #include <dev/ic/i82365reg.h>
      7 
      8 struct pcic_handle {
      9     struct pcic_softc *sc;
     10     int vendor;
     11     int sock;
     12     int flags;
     13     int memalloc;
     14     struct {
     15 	bus_addr_t addr;
     16 	bus_size_t size;
     17 	long offset;
     18 	int kind;
     19     } mem[PCIC_MEM_WINS];
     20     int ioalloc;
     21     struct {
     22 	bus_addr_t addr;
     23 	bus_size_t size;
     24 	int width;
     25     } io[PCIC_IO_WINS];
     26     int ih_irq;
     27     struct device *pcmcia;
     28 };
     29 
     30 #define PCIC_FLAG_SOCKETP	0x0001
     31 #define PCIC_FLAG_CARDP		0x0002
     32 
     33 #define C0SA PCIC_CHIP0_BASE+PCIC_SOCKETA_INDEX
     34 #define C0SB PCIC_CHIP0_BASE+PCIC_SOCKETB_INDEX
     35 #define C1SA PCIC_CHIP1_BASE+PCIC_SOCKETA_INDEX
     36 #define C1SB PCIC_CHIP1_BASE+PCIC_SOCKETB_INDEX
     37 
     38 /* This is sort of arbitrary.  It merely needs to be "enough".
     39    It can be overridden in the conf file, anyway. */
     40 
     41 #define PCIC_MEM_PAGES	4
     42 #define PCIC_MEMSIZE	PCIC_MEM_PAGES*PCIC_MEM_PAGESIZE
     43 
     44 #define PCIC_NSLOTS	4
     45 
     46 struct pcic_softc {
     47     struct device dev;
     48 
     49     bus_space_tag_t memt;
     50     bus_space_handle_t memh;
     51     bus_space_tag_t iot;
     52     bus_space_handle_t ioh;
     53 
     54     /* XXX isa_chipset_tag_t, pci_chipset_tag_t, etc. */
     55     caddr_t intr_est;
     56 
     57     pcmcia_chipset_tag_t pct;
     58 
     59     /* this needs to be large enough to hold PCIC_MEM_PAGES bits */
     60     int subregionmask;
     61 
     62     /* used by memory window mapping functions */
     63     bus_addr_t membase;
     64 
     65     /* used by io window mapping functions.  These can actually overlap
     66        with another pcic, since the underlying extent mapper will deal
     67        with individual allocations.  This is here to deal with the fact
     68        that different busses have different real widths (different pc
     69        hardware seems to use 10 or 12 bits for the I/O bus). */
     70     bus_addr_t iobase;
     71     bus_addr_t iosize;
     72 
     73     int irq;
     74     void *ih;
     75 
     76     struct pcic_handle handle[PCIC_NSLOTS];
     77 };
     78 
     79 
     80 int pcic_ident_ok __P((int));
     81 int pcic_vendor __P((struct pcic_handle *));
     82 char *pcic_vendor_to_string __P((int));
     83 
     84 void pcic_attach __P((struct pcic_softc *));
     85 void pcic_attach_sockets __P((struct pcic_softc *));
     86 int pcic_intr __P((void *arg));
     87 
     88 static inline int pcic_read __P((struct pcic_handle *, int));
     89 static inline void pcic_write __P((struct pcic_handle *, int, int));
     90 static inline void pcic_wait_ready __P((struct pcic_handle *));
     91 
     92 int pcic_chip_mem_alloc __P((pcmcia_chipset_handle_t, bus_size_t,
     93 			     struct pcmcia_mem_handle *));
     94 void pcic_chip_mem_free __P((pcmcia_chipset_handle_t,
     95 			     struct pcmcia_mem_handle *));
     96 int pcic_chip_mem_map __P((pcmcia_chipset_handle_t, int, bus_addr_t,
     97 			   bus_size_t, struct pcmcia_mem_handle *,
     98 			   bus_addr_t *, int *));
     99 void pcic_chip_mem_unmap __P((pcmcia_chipset_handle_t, int));
    100 
    101 int pcic_chip_io_alloc __P((pcmcia_chipset_handle_t, bus_addr_t, bus_size_t,
    102 			    bus_size_t, struct pcmcia_io_handle *));
    103 void pcic_chip_io_free __P((pcmcia_chipset_handle_t,
    104 			    struct pcmcia_io_handle *));
    105 int pcic_chip_io_map __P((pcmcia_chipset_handle_t, int, bus_addr_t, bus_size_t,
    106 			  struct pcmcia_io_handle *, int *));
    107 void pcic_chip_io_unmap __P((pcmcia_chipset_handle_t, int));
    108 
    109 void pcic_chip_socket_enable __P((pcmcia_chipset_handle_t));
    110 void pcic_chip_socket_disable __P((pcmcia_chipset_handle_t));
    111 
    112 static inline int
    113 pcic_read(h, idx)
    114      struct pcic_handle *h;
    115      int idx;
    116 {
    117     if (idx != -1)
    118 	bus_space_write_1(h->sc->iot, h->sc->ioh, PCIC_REG_INDEX, h->sock+idx);
    119     return(bus_space_read_1(h->sc->iot, h->sc->ioh, PCIC_REG_DATA));
    120 }
    121 
    122 static inline void
    123 pcic_write(h, idx, data)
    124      struct pcic_handle *h;
    125      int idx;
    126      int data;
    127 {
    128     if (idx != -1)
    129 	bus_space_write_1(h->sc->iot, h->sc->ioh, PCIC_REG_INDEX, h->sock+idx);
    130     bus_space_write_1(h->sc->iot, h->sc->ioh, PCIC_REG_DATA, (data));
    131 }
    132 
    133 static inline void
    134 pcic_wait_ready(h)
    135      struct pcic_handle *h;
    136 {
    137     int i;
    138 
    139     for (i=0; i<10000; i++) {
    140 	if (pcic_read(h, PCIC_IF_STATUS) & PCIC_IF_STATUS_READY)
    141 	    return;
    142 	delay(500);
    143     }
    144 
    145 #ifdef DIAGNOSTIC
    146     printf("pcic_wait_ready ready never happened\n");
    147 #endif
    148 }
    149 
    150