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i82365var.h revision 1.1.2.4 
      1 /*	$NetBSD: i82365var.h,v 1.1.2.4 1997/10/16 02:37:10 thorpej Exp $	*/
      2 
      3 #include <sys/device.h>
      4 
      5 #include <dev/pcmcia/pcmciareg.h>
      6 #include <dev/pcmcia/pcmciachip.h>
      7 
      8 #include <dev/ic/i82365reg.h>
      9 
     10 struct pcic_handle {
     11 	struct pcic_softc *sc;
     12 	int	vendor;
     13 	int	sock;
     14 	int	flags;
     15 	int	memalloc;
     16 	struct {
     17 		bus_addr_t	addr;
     18 		bus_size_t	size;
     19 		long		offset;
     20 		int		kind;
     21 	} mem[PCIC_MEM_WINS];
     22 	int	ioalloc;
     23 	struct {
     24 		bus_addr_t	addr;
     25 		bus_size_t	size;
     26 		int		width;
     27 	} io[PCIC_IO_WINS];
     28 	int	ih_irq;
     29 	struct device *pcmcia;
     30 };
     31 
     32 #define	PCIC_FLAG_SOCKETP	0x0001
     33 #define	PCIC_FLAG_CARDP		0x0002
     34 
     35 #define	C0SA PCIC_CHIP0_BASE+PCIC_SOCKETA_INDEX
     36 #define	C0SB PCIC_CHIP0_BASE+PCIC_SOCKETB_INDEX
     37 #define	C1SA PCIC_CHIP1_BASE+PCIC_SOCKETA_INDEX
     38 #define	C1SB PCIC_CHIP1_BASE+PCIC_SOCKETB_INDEX
     39 
     40 /*
     41  * This is sort of arbitrary.  It merely needs to be "enough". It can be
     42  * overridden in the conf file, anyway.
     43  */
     44 
     45 #define	PCIC_MEM_PAGES	4
     46 #define	PCIC_MEMSIZE	PCIC_MEM_PAGES*PCIC_MEM_PAGESIZE
     47 
     48 #define	PCIC_NSLOTS	4
     49 
     50 struct pcic_softc {
     51 	struct device dev;
     52 
     53 	bus_space_tag_t memt;
     54 	bus_space_handle_t memh;
     55 	bus_space_tag_t iot;
     56 	bus_space_handle_t ioh;
     57 
     58 	/* XXX isa_chipset_tag_t, pci_chipset_tag_t, etc. */
     59 	caddr_t	intr_est;
     60 
     61 	pcmcia_chipset_tag_t pct;
     62 
     63 	/* this needs to be large enough to hold PCIC_MEM_PAGES bits */
     64 	int	subregionmask;
     65 
     66 	/* used by memory window mapping functions */
     67 	bus_addr_t membase;
     68 
     69 	/*
     70 	 * used by io window mapping functions.  These can actually overlap
     71 	 * with another pcic, since the underlying extent mapper will deal
     72 	 * with individual allocations.  This is here to deal with the fact
     73 	 * that different busses have different real widths (different pc
     74 	 * hardware seems to use 10 or 12 bits for the I/O bus).
     75 	 */
     76 	bus_addr_t iobase;
     77 	bus_addr_t iosize;
     78 
     79 	int	irq;
     80 	void	*ih;
     81 
     82 	struct pcic_handle handle[PCIC_NSLOTS];
     83 };
     84 
     85 
     86 int	pcic_ident_ok __P((int));
     87 int	pcic_vendor __P((struct pcic_handle *));
     88 char	*pcic_vendor_to_string __P((int));
     89 
     90 void	pcic_attach __P((struct pcic_softc *));
     91 void	pcic_attach_sockets __P((struct pcic_softc *));
     92 int	pcic_intr __P((void *arg));
     93 
     94 static inline int pcic_read __P((struct pcic_handle *, int));
     95 static inline void pcic_write __P((struct pcic_handle *, int, int));
     96 static inline void pcic_wait_ready __P((struct pcic_handle *));
     97 
     98 int	pcic_chip_mem_alloc __P((pcmcia_chipset_handle_t, bus_size_t,
     99 	    struct pcmcia_mem_handle *));
    100 void	pcic_chip_mem_free __P((pcmcia_chipset_handle_t,
    101 	    struct pcmcia_mem_handle *));
    102 int	pcic_chip_mem_map __P((pcmcia_chipset_handle_t, int, bus_addr_t,
    103 	    bus_size_t, struct pcmcia_mem_handle *, bus_addr_t *, int *));
    104 void	pcic_chip_mem_unmap __P((pcmcia_chipset_handle_t, int));
    105 
    106 int	pcic_chip_io_alloc __P((pcmcia_chipset_handle_t, bus_addr_t,
    107 	    bus_size_t, bus_size_t, struct pcmcia_io_handle *));
    108 void	pcic_chip_io_free __P((pcmcia_chipset_handle_t,
    109 	    struct pcmcia_io_handle *));
    110 int	pcic_chip_io_map __P((pcmcia_chipset_handle_t, int, bus_addr_t,
    111 	    bus_size_t, struct pcmcia_io_handle *, int *));
    112 void	pcic_chip_io_unmap __P((pcmcia_chipset_handle_t, int));
    113 
    114 void	pcic_chip_socket_enable __P((pcmcia_chipset_handle_t));
    115 void	pcic_chip_socket_disable __P((pcmcia_chipset_handle_t));
    116 
    117 static __inline int pcic_read __P((struct pcic_handle *, int));
    118 static __inline int
    119 pcic_read(h, idx)
    120 	struct pcic_handle *h;
    121 	int idx;
    122 {
    123 	if (idx != -1)
    124 		bus_space_write_1(h->sc->iot, h->sc->ioh, PCIC_REG_INDEX,
    125 		    h->sock + idx);
    126 	return (bus_space_read_1(h->sc->iot, h->sc->ioh, PCIC_REG_DATA));
    127 }
    128 
    129 static __inline void pcic_write __P((struct pcic_handle *, int, int));
    130 static __inline void
    131 pcic_write(h, idx, data)
    132 	struct pcic_handle *h;
    133 	int idx;
    134 	int data;
    135 {
    136 	if (idx != -1)
    137 		bus_space_write_1(h->sc->iot, h->sc->ioh, PCIC_REG_INDEX,
    138 		    h->sock + idx);
    139 	bus_space_write_1(h->sc->iot, h->sc->ioh, PCIC_REG_DATA, (data));
    140 }
    141 
    142 static __inline void pcic_wait_ready __P((struct pcic_handle *));
    143 static __inline void
    144 pcic_wait_ready(h)
    145 	struct pcic_handle *h;
    146 {
    147 	int i;
    148 
    149 	for (i = 0; i < 10000; i++) {
    150 		if (pcic_read(h, PCIC_IF_STATUS) & PCIC_IF_STATUS_READY)
    151 			return;
    152 		delay(500);
    153 	}
    154 
    155 #ifdef DIAGNOSTIC
    156 	printf("pcic_wait_ready ready never happened\n");
    157 #endif
    158 }
    159