Home | History | Annotate | Line # | Download | only in ic
i82365var.h revision 1.2 
      1 /*	$NetBSD: i82365var.h,v 1.2 1997/10/16 23:18:22 thorpej Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1997 Marc Horowitz.  All rights reserved.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. All advertising materials mentioning features or use of this software
     15  *    must display the following acknowledgement:
     16  *	This product includes software developed by Marc Horowitz.
     17  * 4. The name of the author may not be used to endorse or promote products
     18  *    derived from this software without specific prior written permission.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     23  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     24  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     25  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     26  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     27  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     28  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     29  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #include <sys/device.h>
     33 
     34 #include <dev/pcmcia/pcmciareg.h>
     35 #include <dev/pcmcia/pcmciachip.h>
     36 
     37 #include <dev/ic/i82365reg.h>
     38 
     39 struct pcic_handle {
     40 	struct pcic_softc *sc;
     41 	int	vendor;
     42 	int	sock;
     43 	int	flags;
     44 	int	memalloc;
     45 	struct {
     46 		bus_addr_t	addr;
     47 		bus_size_t	size;
     48 		long		offset;
     49 		int		kind;
     50 	} mem[PCIC_MEM_WINS];
     51 	int	ioalloc;
     52 	struct {
     53 		bus_addr_t	addr;
     54 		bus_size_t	size;
     55 		int		width;
     56 	} io[PCIC_IO_WINS];
     57 	int	ih_irq;
     58 	struct device *pcmcia;
     59 };
     60 
     61 #define	PCIC_FLAG_SOCKETP	0x0001
     62 #define	PCIC_FLAG_CARDP		0x0002
     63 
     64 #define	C0SA PCIC_CHIP0_BASE+PCIC_SOCKETA_INDEX
     65 #define	C0SB PCIC_CHIP0_BASE+PCIC_SOCKETB_INDEX
     66 #define	C1SA PCIC_CHIP1_BASE+PCIC_SOCKETA_INDEX
     67 #define	C1SB PCIC_CHIP1_BASE+PCIC_SOCKETB_INDEX
     68 
     69 /*
     70  * This is sort of arbitrary.  It merely needs to be "enough". It can be
     71  * overridden in the conf file, anyway.
     72  */
     73 
     74 #define	PCIC_MEM_PAGES	4
     75 #define	PCIC_MEMSIZE	PCIC_MEM_PAGES*PCIC_MEM_PAGESIZE
     76 
     77 #define	PCIC_NSLOTS	4
     78 
     79 struct pcic_softc {
     80 	struct device dev;
     81 
     82 	bus_space_tag_t memt;
     83 	bus_space_handle_t memh;
     84 	bus_space_tag_t iot;
     85 	bus_space_handle_t ioh;
     86 
     87 	/* XXX isa_chipset_tag_t, pci_chipset_tag_t, etc. */
     88 	caddr_t	intr_est;
     89 
     90 	pcmcia_chipset_tag_t pct;
     91 
     92 	/* this needs to be large enough to hold PCIC_MEM_PAGES bits */
     93 	int	subregionmask;
     94 
     95 	/* used by memory window mapping functions */
     96 	bus_addr_t membase;
     97 
     98 	/*
     99 	 * used by io window mapping functions.  These can actually overlap
    100 	 * with another pcic, since the underlying extent mapper will deal
    101 	 * with individual allocations.  This is here to deal with the fact
    102 	 * that different busses have different real widths (different pc
    103 	 * hardware seems to use 10 or 12 bits for the I/O bus).
    104 	 */
    105 	bus_addr_t iobase;
    106 	bus_addr_t iosize;
    107 
    108 	int	irq;
    109 	void	*ih;
    110 
    111 	struct pcic_handle handle[PCIC_NSLOTS];
    112 };
    113 
    114 
    115 int	pcic_ident_ok __P((int));
    116 int	pcic_vendor __P((struct pcic_handle *));
    117 char	*pcic_vendor_to_string __P((int));
    118 
    119 void	pcic_attach __P((struct pcic_softc *));
    120 void	pcic_attach_sockets __P((struct pcic_softc *));
    121 int	pcic_intr __P((void *arg));
    122 
    123 static inline int pcic_read __P((struct pcic_handle *, int));
    124 static inline void pcic_write __P((struct pcic_handle *, int, int));
    125 static inline void pcic_wait_ready __P((struct pcic_handle *));
    126 
    127 int	pcic_chip_mem_alloc __P((pcmcia_chipset_handle_t, bus_size_t,
    128 	    struct pcmcia_mem_handle *));
    129 void	pcic_chip_mem_free __P((pcmcia_chipset_handle_t,
    130 	    struct pcmcia_mem_handle *));
    131 int	pcic_chip_mem_map __P((pcmcia_chipset_handle_t, int, bus_addr_t,
    132 	    bus_size_t, struct pcmcia_mem_handle *, bus_addr_t *, int *));
    133 void	pcic_chip_mem_unmap __P((pcmcia_chipset_handle_t, int));
    134 
    135 int	pcic_chip_io_alloc __P((pcmcia_chipset_handle_t, bus_addr_t,
    136 	    bus_size_t, bus_size_t, struct pcmcia_io_handle *));
    137 void	pcic_chip_io_free __P((pcmcia_chipset_handle_t,
    138 	    struct pcmcia_io_handle *));
    139 int	pcic_chip_io_map __P((pcmcia_chipset_handle_t, int, bus_addr_t,
    140 	    bus_size_t, struct pcmcia_io_handle *, int *));
    141 void	pcic_chip_io_unmap __P((pcmcia_chipset_handle_t, int));
    142 
    143 void	pcic_chip_socket_enable __P((pcmcia_chipset_handle_t));
    144 void	pcic_chip_socket_disable __P((pcmcia_chipset_handle_t));
    145 
    146 static __inline int pcic_read __P((struct pcic_handle *, int));
    147 static __inline int
    148 pcic_read(h, idx)
    149 	struct pcic_handle *h;
    150 	int idx;
    151 {
    152 	if (idx != -1)
    153 		bus_space_write_1(h->sc->iot, h->sc->ioh, PCIC_REG_INDEX,
    154 		    h->sock + idx);
    155 	return (bus_space_read_1(h->sc->iot, h->sc->ioh, PCIC_REG_DATA));
    156 }
    157 
    158 static __inline void pcic_write __P((struct pcic_handle *, int, int));
    159 static __inline void
    160 pcic_write(h, idx, data)
    161 	struct pcic_handle *h;
    162 	int idx;
    163 	int data;
    164 {
    165 	if (idx != -1)
    166 		bus_space_write_1(h->sc->iot, h->sc->ioh, PCIC_REG_INDEX,
    167 		    h->sock + idx);
    168 	bus_space_write_1(h->sc->iot, h->sc->ioh, PCIC_REG_DATA, (data));
    169 }
    170 
    171 static __inline void pcic_wait_ready __P((struct pcic_handle *));
    172 static __inline void
    173 pcic_wait_ready(h)
    174 	struct pcic_handle *h;
    175 {
    176 	int i;
    177 
    178 	for (i = 0; i < 10000; i++) {
    179 		if (pcic_read(h, PCIC_IF_STATUS) & PCIC_IF_STATUS_READY)
    180 			return;
    181 		delay(500);
    182 	}
    183 
    184 #ifdef DIAGNOSTIC
    185 	printf("pcic_wait_ready ready never happened\n");
    186 #endif
    187 }
    188