i82365var.h revision 1.7
1 /* $NetBSD: i82365var.h,v 1.7 1999/01/21 07:43:33 msaitoh Exp $ */ 2 3 /* 4 * Copyright (c) 1997 Marc Horowitz. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Marc Horowitz. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/device.h> 33 34 #include <dev/pcmcia/pcmciareg.h> 35 #include <dev/pcmcia/pcmciachip.h> 36 37 #include <dev/ic/i82365reg.h> 38 39 struct proc; 40 41 struct pcic_event { 42 SIMPLEQ_ENTRY(pcic_event) pe_q; 43 int pe_type; 44 }; 45 46 /* pe_type */ 47 #define PCIC_EVENT_INSERTION 0 48 #define PCIC_EVENT_REMOVAL 1 49 50 struct pcic_handle { 51 struct pcic_softc *sc; 52 int vendor; 53 int sock; 54 int flags; 55 int laststate; 56 int memalloc; 57 struct { 58 bus_addr_t addr; 59 bus_size_t size; 60 long offset; 61 int kind; 62 } mem[PCIC_MEM_WINS]; 63 int ioalloc; 64 struct { 65 bus_addr_t addr; 66 bus_size_t size; 67 int width; 68 } io[PCIC_IO_WINS]; 69 int ih_irq; 70 struct device *pcmcia; 71 72 int shutdown; 73 struct proc *event_thread; 74 SIMPLEQ_HEAD(, pcic_event) events; 75 }; 76 77 #define PCIC_FLAG_SOCKETP 0x0001 78 #define PCIC_FLAG_CARDP 0x0002 79 80 #define PCIC_LASTSTATE_PRESENT 0x0002 81 #define PCIC_LASTSTATE_HALF 0x0001 82 #define PCIC_LASTSTATE_EMPTY 0x0000 83 84 #define C0SA PCIC_CHIP0_BASE+PCIC_SOCKETA_INDEX 85 #define C0SB PCIC_CHIP0_BASE+PCIC_SOCKETB_INDEX 86 #define C1SA PCIC_CHIP1_BASE+PCIC_SOCKETA_INDEX 87 #define C1SB PCIC_CHIP1_BASE+PCIC_SOCKETB_INDEX 88 89 /* 90 * This is sort of arbitrary. It merely needs to be "enough". It can be 91 * overridden in the conf file, anyway. 92 */ 93 94 #define PCIC_MEM_PAGES 4 95 #define PCIC_MEMSIZE PCIC_MEM_PAGES*PCIC_MEM_PAGESIZE 96 97 #define PCIC_NSLOTS 4 98 99 struct pcic_softc { 100 struct device dev; 101 102 bus_space_tag_t memt; 103 bus_space_handle_t memh; 104 bus_space_tag_t iot; 105 bus_space_handle_t ioh; 106 107 /* XXX isa_chipset_tag_t, pci_chipset_tag_t, etc. */ 108 void *intr_est; 109 110 pcmcia_chipset_tag_t pct; 111 112 /* this needs to be large enough to hold PCIC_MEM_PAGES bits */ 113 int subregionmask; 114 #define PCIC_MAX_MEM_PAGES (8 * sizeof(int)) 115 116 /* used by memory window mapping functions */ 117 bus_addr_t membase; 118 119 /* 120 * used by io window mapping functions. These can actually overlap 121 * with another pcic, since the underlying extent mapper will deal 122 * with individual allocations. This is here to deal with the fact 123 * that different busses have different real widths (different pc 124 * hardware seems to use 10 or 12 bits for the I/O bus). 125 */ 126 bus_addr_t iobase; 127 bus_addr_t iosize; 128 129 int irq; 130 void *ih; 131 132 struct pcic_handle handle[PCIC_NSLOTS]; 133 }; 134 135 136 int pcic_ident_ok __P((int)); 137 int pcic_vendor __P((struct pcic_handle *)); 138 char *pcic_vendor_to_string __P((int)); 139 140 void pcic_attach __P((struct pcic_softc *)); 141 void pcic_attach_sockets __P((struct pcic_softc *)); 142 int pcic_intr __P((void *arg)); 143 144 static inline int pcic_read __P((struct pcic_handle *, int)); 145 static inline void pcic_write __P((struct pcic_handle *, int, int)); 146 147 int pcic_chip_mem_alloc __P((pcmcia_chipset_handle_t, bus_size_t, 148 struct pcmcia_mem_handle *)); 149 void pcic_chip_mem_free __P((pcmcia_chipset_handle_t, 150 struct pcmcia_mem_handle *)); 151 int pcic_chip_mem_map __P((pcmcia_chipset_handle_t, int, bus_addr_t, 152 bus_size_t, struct pcmcia_mem_handle *, bus_addr_t *, int *)); 153 void pcic_chip_mem_unmap __P((pcmcia_chipset_handle_t, int)); 154 155 int pcic_chip_io_alloc __P((pcmcia_chipset_handle_t, bus_addr_t, 156 bus_size_t, bus_size_t, struct pcmcia_io_handle *)); 157 void pcic_chip_io_free __P((pcmcia_chipset_handle_t, 158 struct pcmcia_io_handle *)); 159 int pcic_chip_io_map __P((pcmcia_chipset_handle_t, int, bus_addr_t, 160 bus_size_t, struct pcmcia_io_handle *, int *)); 161 void pcic_chip_io_unmap __P((pcmcia_chipset_handle_t, int)); 162 163 void pcic_chip_socket_enable __P((pcmcia_chipset_handle_t)); 164 void pcic_chip_socket_disable __P((pcmcia_chipset_handle_t)); 165 166 static __inline int pcic_read __P((struct pcic_handle *, int)); 167 static __inline int 168 pcic_read(h, idx) 169 struct pcic_handle *h; 170 int idx; 171 { 172 if (idx != -1) 173 bus_space_write_1(h->sc->iot, h->sc->ioh, PCIC_REG_INDEX, 174 h->sock + idx); 175 return (bus_space_read_1(h->sc->iot, h->sc->ioh, PCIC_REG_DATA)); 176 } 177 178 static __inline void pcic_write __P((struct pcic_handle *, int, int)); 179 static __inline void 180 pcic_write(h, idx, data) 181 struct pcic_handle *h; 182 int idx; 183 int data; 184 { 185 if (idx != -1) 186 bus_space_write_1(h->sc->iot, h->sc->ioh, PCIC_REG_INDEX, 187 h->sock + idx); 188 bus_space_write_1(h->sc->iot, h->sc->ioh, PCIC_REG_DATA, (data)); 189 } 190
Indexes created Mon Sep 29 21:09:56 GMT 2025