Home | History | Annotate | Line # | Download | only in ic
i82557var.h revision 1.2
      1 /*	$NetBSD: i82557var.h,v 1.2 1999/08/03 22:43:28 thorpej Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1997, 1998, 1999 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  * NASA Ames Research Center.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. All advertising materials mentioning features or use of this software
     20  *    must display the following acknowledgement:
     21  *	This product includes software developed by the NetBSD
     22  *	Foundation, Inc. and its contributors.
     23  * 4. Neither the name of The NetBSD Foundation nor the names of its
     24  *    contributors may be used to endorse or promote products derived
     25  *    from this software without specific prior written permission.
     26  *
     27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37  * POSSIBILITY OF SUCH DAMAGE.
     38  */
     39 
     40 /*
     41  * Copyright (c) 1995, David Greenman
     42  * All rights reserved.
     43  *
     44  * Redistribution and use in source and binary forms, with or without
     45  * modification, are permitted provided that the following conditions
     46  * are met:
     47  * 1. Redistributions of source code must retain the above copyright
     48  *    notice unmodified, this list of conditions, and the following
     49  *    disclaimer.
     50  * 2. Redistributions in binary form must reproduce the above copyright
     51  *    notice, this list of conditions and the following disclaimer in the
     52  *    documentation and/or other materials provided with the distribution.
     53  *
     54  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     55  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     56  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     57  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     58  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     59  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     60  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     61  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     62  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     63  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     64  * SUCH DAMAGE.
     65  *
     66  *	Id: if_fxpvar.h,v 1.4 1997/11/29 08:11:01 davidg Exp
     67  */
     68 
     69 /*
     70  * Misc. defintions for the Intel i82557 fast Ethernet controller
     71  * driver.
     72  */
     73 
     74 /*
     75  * Transmit descriptor list size.
     76  */
     77 #define	FXP_NTXCB		128
     78 #define	FXP_NTXCB_MASK		(FXP_NTXCB - 1)
     79 #define	FXP_NEXTTX(x)		((x + 1) & FXP_NTXCB_MASK)
     80 #define	FXP_NTXSEG		16
     81 
     82 /*
     83  * Number of receive frame area buffers.  These are large, so
     84  * choose wisely.
     85  */
     86 #define	FXP_NRFABUFS		64
     87 
     88 /*
     89  * Maximum number of seconds that the reciever can be idle before we
     90  * assume it's dead and attempt to reset it by reprogramming the
     91  * multicast filter.  This is part of a work-around for a bug in the
     92  * NIC.  See fxp_stats_update().
     93  */
     94 #define	FXP_MAX_RX_IDLE	15
     95 
     96 /*
     97  * Misc. DMA'd data structures are allocated in a single clump, that
     98  * maps to a single DMA segment, to make several things easier (computing
     99  * offsets, setting up DMA maps, etc.)
    100  */
    101 struct fxp_control_data {
    102 	/*
    103 	 * The transmit control blocks.  The first if these
    104 	 * is also used as the config CB.
    105 	 */
    106 	struct fxp_cb_tx fcd_txcbs[FXP_NTXCB];
    107 
    108 	/*
    109 	 * The transmit buffer descriptors.
    110 	 */
    111 	struct fxp_tbdlist {
    112 		struct fxp_tbd tbd_d[FXP_NTXSEG];
    113 	} fcd_tbdl[FXP_NTXCB];
    114 
    115 	/*
    116 	 * The configuration CB.
    117 	 */
    118 	struct fxp_cb_config fcd_configcb;
    119 
    120 	/*
    121 	 * The Individual Address CB.
    122 	 */
    123 	struct fxp_cb_ias fcd_iascb;
    124 
    125 	/*
    126 	 * The multicast setup CB.
    127 	 */
    128 	struct fxp_cb_mcs fcd_mcscb;
    129 
    130 	/*
    131 	 * The NIC statistics.
    132 	 */
    133 	struct fxp_stats fcd_stats;
    134 };
    135 
    136 #define	FXP_CDOFF(x)	offsetof(struct fxp_control_data, x)
    137 #define	FXP_CDTXOFF(x)	FXP_CDOFF(fcd_txcbs[(x)])
    138 #define	FXP_CDTBDOFF(x)	FXP_CDOFF(fcd_tbdl[(x)])
    139 #define	FXP_CDCONFIGOFF	FXP_CDOFF(fcd_configcb)
    140 #define	FXP_CDIASOFF	FXP_CDOFF(fcd_iascb)
    141 #define	FXP_CDMCSOFF	FXP_CDOFF(fcd_mcscb)
    142 #define	FXP_CDSTATSOFF	FXP_CDOFF(fcd_stats)
    143 
    144 /*
    145  * Software state for transmit descriptors.
    146  */
    147 struct fxp_txsoft {
    148 	struct mbuf *txs_mbuf;		/* head of mbuf chain */
    149 	bus_dmamap_t txs_dmamap;	/* our DMA map */
    150 };
    151 
    152 /*
    153  * Software state for receive descriptors.
    154  */
    155 struct fxp_rxdesc {
    156 	struct fxp_rxdesc *fr_next;	/* next in the chain */
    157 	struct mbuf *fr_mbhead;		/* pointer to mbuf chain */
    158 	bus_dmamap_t fr_dmamap;		/* our DMA map */
    159 };
    160 
    161 /*
    162  * Software state per device.
    163  */
    164 struct fxp_softc {
    165 	struct device sc_dev;		/* generic device structures */
    166 	bus_space_tag_t sc_st;		/* bus space tag */
    167 	bus_space_handle_t sc_sh;	/* bus space handle */
    168 	bus_dma_tag_t sc_dmat;		/* bus dma tag */
    169 	struct ethercom sc_ethercom;	/* ethernet common part */
    170 	void *sc_sdhook;		/* shutdown hook */
    171 	void *sc_ih;			/* interrupt handler cookie */
    172 
    173 	struct mii_data sc_mii;		/* MII/media information */
    174 
    175 	/*
    176 	 * We create a single DMA map that maps all data structure
    177 	 * overhead, except for RFAs, which are mapped by the
    178 	 * fxp_rxdesc DMA map on a per-mbuf basis.
    179 	 */
    180 	bus_dmamap_t sc_dmamap;
    181 #define	sc_cddma	sc_dmamap->dm_segs[0].ds_addr
    182 
    183 	/*
    184 	 * Software state for transmit and receive descriptors.
    185 	 */
    186 	struct fxp_txsoft sc_txsoft[FXP_NTXCB];
    187 
    188 	bus_dmamap_t sc_rx_dmamaps[FXP_NRFABUFS];
    189 	struct fxp_rxdesc sc_rxdescs[FXP_NRFABUFS];
    190 
    191 	/*
    192 	 * Control data structures.
    193 	 */
    194 	struct fxp_control_data *sc_control_data;
    195 
    196 	int	sc_flags;		/* misc. flags */
    197 
    198 #define	FXPF_NEEDMCSETUP	0x01	/* multicast setup needed */
    199 #define	FXPF_DOINGMCSETUP	0x02	/* multicast setup in-progress */
    200 
    201 	int	sc_txpending;		/* number of TX requests pending */
    202 	int	sc_txdirty;		/* first dirty TX descriptor */
    203 	int	sc_txlast;		/* last used TX descriptor */
    204 
    205 	struct fxp_rxdesc *rfa_head;	/* first mbuf in receive frame area */
    206 	struct fxp_rxdesc *rfa_tail;	/* last mbuf in receive frame area */
    207 	int rx_idle_secs;		/* # of seconds RX has been idle */
    208 
    209 	int phy_primary_addr;		/* address of primary PHY */
    210 	int phy_primary_device;		/* device type of primary PHY */
    211 	int phy_10Mbps_only;		/* PHY is 10Mbps-only device */
    212 #if NRND > 0
    213 	rndsource_element_t rnd_source;	/* random source */
    214 #endif
    215 };
    216 
    217 #define	FXP_CDTXADDR(sc, x)	((sc)->sc_cddma + FXP_CDTXOFF((x)))
    218 #define	FXP_CDTBDADDR(sc, x)	((sc)->sc_cddma + FXP_CDTBDOFF((x)))
    219 
    220 #define	FXP_CDTX(sc, x)		(&(sc)->sc_control_data->fcd_txcbs[(x)])
    221 #define	FXP_CDTBD(sc, x)	(&(sc)->sc_control_data->fcd_tbdl[(x)])
    222 
    223 #define	FXP_DSTX(sc, x)		(&(sc)->sc_txsoft[(x)])
    224 
    225 #define	FXP_CDTXSYNC(sc, x, ops)					\
    226 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap,			\
    227 	    FXP_CDTXOFF((x)), sizeof(struct fxp_cb_tx), (ops))
    228 
    229 #define	FXP_CDTBDSYNC(sc, x, ops)					\
    230 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap,			\
    231 	    FXP_CDTBDOFF((x)), sizeof(struct fxp_tbdlist), (ops))
    232 
    233 #define	FXP_CDCONFIGSYNC(sc, ops)					\
    234 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap,			\
    235 	    FXP_CDCONFIGOFF, sizeof(struct fxp_cb_config), (ops))
    236 
    237 #define	FXP_CDIASSYNC(sc, ops)						\
    238 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap,			\
    239 	    FXP_CDIASOFF, sizeof(struct fxp_cb_ias), (ops))
    240 
    241 #define	FXP_CDMCSSYNC(sc, ops)						\
    242 	bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap,			\
    243 	    FXP_CDMCSOFF, sizeof(struct fxp_cb_mcs), (ops))
    244 
    245 /* Macros to ease CSR access. */
    246 #define	CSR_READ_1(sc, reg)						\
    247 	bus_space_read_1((sc)->sc_st, (sc)->sc_sh, (reg))
    248 #define	CSR_READ_2(sc, reg)						\
    249 	bus_space_read_2((sc)->sc_st, (sc)->sc_sh, (reg))
    250 #define	CSR_READ_4(sc, reg)						\
    251 	bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
    252 #define	CSR_WRITE_1(sc, reg, val)					\
    253 	bus_space_write_1((sc)->sc_st, (sc)->sc_sh, (reg), (val))
    254 #define	CSR_WRITE_2(sc, reg, val)					\
    255 	bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))
    256 #define	CSR_WRITE_4(sc, reg, val)					\
    257 	bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
    258 
    259 void	fxp_attach __P((struct fxp_softc *));
    260 int	fxp_intr __P((void *));
    261