i82596.c revision 1.19
1 /* $NetBSD: i82596.c,v 1.19 2008/04/04 17:03:42 tsutsui Exp $ */ 2 3 /* 4 * Copyright (c) 2003 Jochen Kunz. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of Jochen Kunz may not be used to endorse or promote 16 * products derived from this software without specific prior 17 * written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY JOCHEN KUNZ 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL JOCHEN KUNZ 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Driver for the Intel i82596CA and i82596DX/SX 10MBit/s Ethernet chips. 34 * 35 * It operates the i82596 in 32-Bit Linear Mode, opposed to the old i82586 36 * ie(4) driver (src/sys/dev/ic/i82586.c), that degrades the i82596 to 37 * i82586 compatibility mode. 38 * 39 * Documentation about these chips can be found at 40 * 41 * http://developer.intel.com/design/network/datashts/290218.htm 42 * http://developer.intel.com/design/network/datashts/290219.htm 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: i82596.c,v 1.19 2008/04/04 17:03:42 tsutsui Exp $"); 47 48 /* autoconfig and device stuff */ 49 #include <sys/param.h> 50 #include <sys/device.h> 51 #include <sys/conf.h> 52 #include "locators.h" 53 #include "ioconf.h" 54 55 /* bus_space / bus_dma etc. */ 56 #include <sys/bus.h> 57 #include <sys/intr.h> 58 59 /* general system data and functions */ 60 #include <sys/systm.h> 61 #include <sys/ioctl.h> 62 63 /* tsleep / sleep / wakeup */ 64 #include <sys/proc.h> 65 /* hz for above */ 66 #include <sys/kernel.h> 67 68 /* network stuff */ 69 #include <net/if.h> 70 #include <net/if_dl.h> 71 #include <net/if_media.h> 72 #include <net/if_ether.h> 73 #include <sys/socket.h> 74 #include <sys/mbuf.h> 75 76 #include "bpfilter.h" 77 #if NBPFILTER > 0 78 #include <net/bpf.h> 79 #endif 80 81 #include <dev/ic/i82596reg.h> 82 #include <dev/ic/i82596var.h> 83 84 /* Supported chip variants */ 85 const char *i82596_typenames[] = { "unknown", "DX/SX", "CA" }; 86 87 /* media change and status callback */ 88 static int iee_mediachange(struct ifnet *); 89 static void iee_mediastatus(struct ifnet *, struct ifmediareq *); 90 91 /* interface routines to upper protocols */ 92 static void iee_start(struct ifnet *); /* initiate output */ 93 static int iee_ioctl(struct ifnet *, u_long, void *); /* ioctl routine */ 94 static int iee_init(struct ifnet *); /* init routine */ 95 static void iee_stop(struct ifnet *, int); /* stop routine */ 96 static void iee_watchdog(struct ifnet *); /* timer routine */ 97 98 /* internal helper functions */ 99 static void iee_cb_setup(struct iee_softc *, uint32_t); 100 101 /* 102 * Things a MD frontend has to provide: 103 * 104 * The functions via function pointers in the softc: 105 * int (*sc_iee_cmd)(struct iee_softc *sc, uint32_t cmd); 106 * int (*sc_iee_reset)(struct iee_softc *sc); 107 * void (*sc_mediastatus)(struct ifnet *, struct ifmediareq *); 108 * int (*sc_mediachange)(struct ifnet *); 109 * 110 * sc_iee_cmd(): send a command to the i82596 by writing the cmd parameter 111 * to the SCP cmd word and issuing a Channel Attention. 112 * sc_iee_reset(): initiate a reset, supply the address of the SCP to the 113 * chip, wait for the chip to initialize and ACK interrupts that 114 * this may have caused by calling (sc->sc_iee_cmd)(sc, IEE_SCB_ACK); 115 * This functions must carefully bus_dmamap_sync() all data they have touched! 116 * 117 * sc_mediastatus() and sc_mediachange() are just MD hooks to the according 118 * MI functions. The MD frontend may set this pointers to NULL when they 119 * are not needed. 120 * 121 * sc->sc_type has to be set to I82596_UNKNOWN or I82596_DX or I82596_CA. 122 * This is for printing out the correct chip type at attach time only. The 123 * MI backend doesn't distinguish different chip types when programming 124 * the chip. 125 * 126 * sc->sc_flags has to be set to 0 on little endian hardware and to 127 * IEE_NEED_SWAP on big endian hardware, when endianess conversion is not 128 * done by the bus attachment. Usually you need to set IEE_NEED_SWAP 129 * when IEE_SYSBUS_BE is set in the sysbus byte. 130 * 131 * sc->sc_cl_align must be set to 1 or to the cache line size. When set to 132 * 1 no special alignment of DMA descriptors is done. If sc->sc_cl_align != 1 133 * it forces alignment of the data structures in the shared memory to a multiple 134 * of sc->sc_cl_align. This is needed on archs like hp700 that have non DMA 135 * I/O coherent caches and are unable to map the shared memory uncachable. 136 * (At least pre PA7100LC CPUs are unable to map memory uncachable.) 137 * 138 * sc->sc_cl_align MUST BE INITIALIZED BEFORE THE FOLLOWING MACROS ARE USED: 139 * SC_* IEE_*_SZ IEE_*_OFF IEE_SHMEM_MAX (shell style glob(3) pattern) 140 * 141 * The MD frontend has to allocate a piece of DMA memory at least of 142 * IEE_SHMEM_MAX bytes size. All communication with the chip is done via 143 * this shared memory. If possible map this memory non-cachable on 144 * archs with non DMA I/O coherent caches. The base of the memory needs 145 * to be aligned to an even address if sc->sc_cl_align == 1 and aligned 146 * to a cache line if sc->sc_cl_align != 1. 147 * 148 * An interrupt with iee_intr() as handler must be established. 149 * 150 * Call void iee_attach(struct iee_softc *sc, uint8_t *ether_address, 151 * int *media, int nmedia, int defmedia); when everything is set up. First 152 * parameter is a pointer to the MI softc, ether_address is an array that 153 * contains the ethernet address. media is an array of the media types 154 * provided by the hardware. The members of this array are supplied to 155 * ifmedia_add() in sequence. nmedia is the count of elements in media. 156 * defmedia is the default media that is set via ifmedia_set(). 157 * nmedia and defmedia are ignored when media == NULL. 158 * 159 * The MD backend may call iee_detach() to detach the device. 160 * 161 * See sys/arch/hp700/gsc/if_iee_gsc.c for an example. 162 */ 163 164 165 /* 166 * How frame reception is done: 167 * Each Receive Frame Descriptor has one associated Receive Buffer Descriptor. 168 * Each RBD points to the data area of an mbuf cluster. The RFDs are linked 169 * together in a circular list. sc->sc_rx_done is the count of RFDs in the 170 * list already processed / the number of the RFD that has to be checked for 171 * a new frame first at the next RX interrupt. Upon successful reception of 172 * a frame the mbuf cluster is handled to upper protocol layers, a new mbuf 173 * cluster is allocated and the RFD / RBD are reinitialized accordingly. 174 * 175 * When a RFD list overrun occurred the whole RFD and RBD lists are reinitialized 176 * and frame reception is started again. 177 */ 178 int 179 iee_intr(void *intarg) 180 { 181 struct iee_softc *sc = intarg; 182 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 183 struct iee_rfd *rfd; 184 struct iee_rbd *rbd; 185 bus_dmamap_t rx_map; 186 struct mbuf *rx_mbuf; 187 struct mbuf *new_mbuf; 188 int scb_status; 189 int scb_cmd; 190 int n, col; 191 192 if ((ifp->if_flags & IFF_RUNNING) == 0) { 193 (sc->sc_iee_cmd)(sc, IEE_SCB_ACK); 194 return 1; 195 } 196 bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map, 0, IEE_SHMEM_MAX, 197 BUS_DMASYNC_POSTREAD); 198 scb_status = SC_SCB->scb_status; 199 scb_cmd = SC_SCB->scb_cmd; 200 rfd = SC_RFD(sc->sc_rx_done); 201 while ((rfd->rfd_status & IEE_RFD_C) != 0) { 202 /* At least one packet was received. */ 203 rbd = SC_RBD(sc->sc_rx_done); 204 rx_map = sc->sc_rx_map[sc->sc_rx_done]; 205 rx_mbuf = sc->sc_rx_mbuf[sc->sc_rx_done]; 206 SC_RBD((sc->sc_rx_done + IEE_NRFD - 1) % IEE_NRFD)->rbd_size 207 &= ~IEE_RBD_EL; 208 if ((rfd->rfd_status & IEE_RFD_OK) == 0 209 || (rbd->rbd_count & IEE_RBD_EOF) == 0 210 || (rbd->rbd_count & IEE_RBD_F) == 0){ 211 /* Receive error, skip frame and reuse buffer. */ 212 rfd->rfd_status = 0; 213 rbd->rbd_count = 0; 214 rbd->rbd_size = IEE_RBD_EL | rx_map->dm_segs[0].ds_len; 215 printf("%s: iee_intr: receive error %d, rfd_status=" 216 "0x%.4x, rfd_count=0x%.4x\n", 217 device_xname(sc->sc_dev), 218 ++sc->sc_rx_err, rfd->rfd_status, rbd->rbd_count); 219 sc->sc_rx_done = (sc->sc_rx_done + 1) % IEE_NRFD; 220 continue; 221 } 222 rfd->rfd_status = 0; 223 bus_dmamap_sync(sc->sc_dmat, rx_map, 0, rx_mbuf->m_ext.ext_size, 224 BUS_DMASYNC_POSTREAD); 225 rx_mbuf->m_pkthdr.len = rx_mbuf->m_len = 226 rbd->rbd_count & IEE_RBD_COUNT; 227 rx_mbuf->m_pkthdr.rcvif = ifp; 228 MGETHDR(new_mbuf, M_DONTWAIT, MT_DATA); 229 if (new_mbuf == NULL) { 230 printf("%s: iee_intr: can't allocate mbuf\n", 231 device_xname(sc->sc_dev)); 232 break; 233 } 234 MCLAIM(new_mbuf, &sc->sc_ethercom.ec_rx_mowner); 235 MCLGET(new_mbuf, M_DONTWAIT); 236 if ((new_mbuf->m_flags & M_EXT) == 0) { 237 printf("%s: iee_intr: can't alloc mbuf cluster\n", 238 device_xname(sc->sc_dev)); 239 m_freem(new_mbuf); 240 break; 241 } 242 bus_dmamap_unload(sc->sc_dmat, rx_map); 243 if (bus_dmamap_load(sc->sc_dmat, rx_map, 244 new_mbuf->m_ext.ext_buf, new_mbuf->m_ext.ext_size, 245 NULL, BUS_DMA_READ | BUS_DMA_NOWAIT) != 0) 246 panic("%s: iee_intr: can't load RX DMA map\n", 247 device_xname(sc->sc_dev)); 248 bus_dmamap_sync(sc->sc_dmat, rx_map, 0, 249 new_mbuf->m_ext.ext_size, BUS_DMASYNC_PREREAD); 250 #if NBPFILTER > 0 251 if (ifp->if_bpf != 0) 252 bpf_mtap(ifp->if_bpf, rx_mbuf); 253 #endif /* NBPFILTER > 0 */ 254 (*ifp->if_input)(ifp, rx_mbuf); 255 ifp->if_ipackets++; 256 sc->sc_rx_mbuf[sc->sc_rx_done] = new_mbuf; 257 rbd->rbd_count = 0; 258 rbd->rbd_size = IEE_RBD_EL | rx_map->dm_segs[0].ds_len; 259 rbd->rbd_rb_addr = rx_map->dm_segs[0].ds_addr; 260 sc->sc_rx_done = (sc->sc_rx_done + 1) % IEE_NRFD; 261 rfd = SC_RFD(sc->sc_rx_done); 262 } 263 if ((scb_status & IEE_SCB_RUS) == IEE_SCB_RUS_NR1 264 || (scb_status & IEE_SCB_RUS) == IEE_SCB_RUS_NR2 265 || (scb_status & IEE_SCB_RUS) == IEE_SCB_RUS_NR3) { 266 /* Receive Overrun, reinit receive ring buffer. */ 267 for (n = 0 ; n < IEE_NRFD ; n++) { 268 SC_RFD(n)->rfd_cmd = IEE_RFD_SF; 269 SC_RFD(n)->rfd_link_addr = IEE_PHYS_SHMEM(IEE_RFD_OFF 270 + IEE_RFD_SZ * ((n + 1) % IEE_NRFD)); 271 SC_RBD(n)->rbd_next_rbd = IEE_PHYS_SHMEM(IEE_RBD_OFF 272 + IEE_RBD_SZ * ((n + 1) % IEE_NRFD)); 273 SC_RBD(n)->rbd_size = IEE_RBD_EL | 274 sc->sc_rx_map[n]->dm_segs[0].ds_len; 275 SC_RBD(n)->rbd_rb_addr = 276 sc->sc_rx_map[n]->dm_segs[0].ds_addr; 277 } 278 SC_RFD(0)->rfd_rbd_addr = IEE_PHYS_SHMEM(IEE_RBD_OFF); 279 sc->sc_rx_done = 0; 280 bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map, IEE_RFD_OFF, 281 IEE_RFD_LIST_SZ + IEE_RBD_LIST_SZ, BUS_DMASYNC_PREWRITE); 282 (sc->sc_iee_cmd)(sc, IEE_SCB_RUC_ST); 283 printf("%s: iee_intr: receive ring buffer overrun\n", 284 device_xname(sc->sc_dev)); 285 } 286 287 if (sc->sc_next_cb != 0 288 && (SC_CB(sc->sc_next_cb - 1)->cb_status & IEE_CB_C) != 0) { 289 /* CMD list finished */ 290 ifp->if_timer = 0; 291 if (sc->sc_next_tbd != 0) { 292 /* A TX CMD list finished, cleanup */ 293 for (n = 0 ; n < sc->sc_next_cb ; n++) { 294 m_freem(sc->sc_tx_mbuf[n]); 295 sc->sc_tx_mbuf[n] = NULL; 296 bus_dmamap_unload(sc->sc_dmat,sc->sc_tx_map[n]); 297 if ((SC_CB(n)->cb_status & IEE_CB_COL) != 0 && 298 (SC_CB(n)->cb_status & IEE_CB_MAXCOL) == 0) 299 col = 16; 300 else 301 col = SC_CB(n)->cb_status 302 & IEE_CB_MAXCOL; 303 sc->sc_tx_col += col; 304 if ((SC_CB(n)->cb_status & IEE_CB_OK) != 0) { 305 ifp->if_opackets++; 306 ifp->if_collisions += col; 307 } 308 } 309 sc->sc_next_tbd = 0; 310 ifp->if_flags &= ~IFF_OACTIVE; 311 } 312 for (n = 0 ; n < sc->sc_next_cb ; n++) { 313 /* Check if a CMD failed, but ignore TX errors. */ 314 if ((SC_CB(n)->cb_cmd & IEE_CB_CMD) != IEE_CB_CMD_TR 315 && ((SC_CB(n)->cb_status & IEE_CB_OK) == 0)) 316 printf("%s: iee_intr: scb_status=0x%x " 317 "scb_cmd=0x%x failed command %d: " 318 "cb_status[%d]=0x%.4x cb_cmd[%d]=0x%.4x\n", 319 device_xname(sc->sc_dev), 320 scb_status, scb_cmd, 321 ++sc->sc_cmd_err, n, SC_CB(n)->cb_status, 322 n, SC_CB(n)->cb_cmd); 323 } 324 sc->sc_next_cb = 0; 325 if ((sc->sc_flags & IEE_WANT_MCAST) != 0) { 326 iee_cb_setup(sc, IEE_CB_CMD_MCS | IEE_CB_S | IEE_CB_EL 327 | IEE_CB_I); 328 (sc->sc_iee_cmd)(sc, IEE_SCB_CUC_EXE); 329 } else 330 /* Try to get deferred packets going. */ 331 iee_start(ifp); 332 } 333 if (IEE_SWAP(SC_SCB->scb_crc_err) != sc->sc_crc_err) { 334 sc->sc_crc_err = IEE_SWAP(SC_SCB->scb_crc_err); 335 printf("%s: iee_intr: crc_err=%d\n", device_xname(sc->sc_dev), 336 sc->sc_crc_err); 337 } 338 if (IEE_SWAP(SC_SCB->scb_align_err) != sc->sc_align_err) { 339 sc->sc_align_err = IEE_SWAP(SC_SCB->scb_align_err); 340 printf("%s: iee_intr: align_err=%d\n", device_xname(sc->sc_dev), 341 sc->sc_align_err); 342 } 343 if (IEE_SWAP(SC_SCB->scb_resource_err) != sc->sc_resource_err) { 344 sc->sc_resource_err = IEE_SWAP(SC_SCB->scb_resource_err); 345 printf("%s: iee_intr: resource_err=%d\n", 346 device_xname(sc->sc_dev), sc->sc_resource_err); 347 } 348 if (IEE_SWAP(SC_SCB->scb_overrun_err) != sc->sc_overrun_err) { 349 sc->sc_overrun_err = IEE_SWAP(SC_SCB->scb_overrun_err); 350 printf("%s: iee_intr: overrun_err=%d\n", 351 device_xname(sc->sc_dev), sc->sc_overrun_err); 352 } 353 if (IEE_SWAP(SC_SCB->scb_rcvcdt_err) != sc->sc_rcvcdt_err) { 354 sc->sc_rcvcdt_err = IEE_SWAP(SC_SCB->scb_rcvcdt_err); 355 printf("%s: iee_intr: rcvcdt_err=%d\n", 356 device_xname(sc->sc_dev), sc->sc_rcvcdt_err); 357 } 358 if (IEE_SWAP(SC_SCB->scb_short_fr_err) != sc->sc_short_fr_err) { 359 sc->sc_short_fr_err = IEE_SWAP(SC_SCB->scb_short_fr_err); 360 printf("%s: iee_intr: short_fr_err=%d\n", 361 device_xname(sc->sc_dev), sc->sc_short_fr_err); 362 } 363 bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map, 0, IEE_SHMEM_MAX, 364 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 365 (sc->sc_iee_cmd)(sc, IEE_SCB_ACK); 366 return 1; 367 } 368 369 370 371 /* 372 * How Command Block List Processing is done. 373 * 374 * A running CBL is never manipulated. If there is a CBL already running, 375 * further CMDs are deferred until the current list is done. A new list is 376 * setup when the old one has finished. 377 * This eases programming. To manipulate a running CBL it is necessary to 378 * suspend the Command Unit to avoid race conditions. After a suspend 379 * is sent we have to wait for an interrupt that ACKs the suspend. Then 380 * we can manipulate the CBL and resume operation. I am not sure that this 381 * is more effective then the current, much simpler approach. => KISS 382 * See i82596CA data sheet page 26. 383 * 384 * A CBL is running or on the way to be set up when (sc->sc_next_cb != 0). 385 * 386 * A CBL may consist of TX CMDs, and _only_ TX CMDs. 387 * A TX CBL is running or on the way to be set up when 388 * ((sc->sc_next_cb != 0) && (sc->sc_next_tbd != 0)). 389 * 390 * A CBL may consist of other non-TX CMDs like IAS or CONF, and _only_ 391 * non-TX CMDs. 392 * 393 * This comes mostly through the way how an Ethernet driver works and 394 * because running CBLs are not manipulated when they are on the way. If 395 * if_start() is called there will be TX CMDs enqueued so we have a running 396 * CBL and other CMDs from e.g. if_ioctl() will be deferred and vice versa. 397 * 398 * The Multicast Setup Command is special. A MCS needs more space than 399 * a single CB has. Actual space requirement depends on the length of the 400 * multicast list. So we always defer MCS until other CBLs are finished, 401 * then we setup a CONF CMD in the first CB. The CONF CMD is needed to 402 * turn ALLMULTI on the hardware on or off. The MCS is the 2nd CB and may 403 * use all the remaining space in the CBL and the Transmit Buffer Descriptor 404 * List. (Therefore CBL and TBDL must be continuous in physical and virtual 405 * memory. This is guaranteed through the definitions of the list offsets 406 * in i82596reg.h and because it is only a single DMA segment used for all 407 * lists.) When ALLMULTI is enabled via the CONF CMD, the MCS is run with 408 * a multicast list length of 0, thus disabling the multicast filter. 409 * A deferred MCS is signaled via ((sc->sc_flags & IEE_WANT_MCAST) != 0) 410 */ 411 void 412 iee_cb_setup(struct iee_softc *sc, uint32_t cmd) 413 { 414 struct iee_cb *cb = SC_CB(sc->sc_next_cb); 415 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 416 struct ether_multistep step; 417 struct ether_multi *enm; 418 419 memset(cb, 0, IEE_CB_SZ); 420 cb->cb_cmd = cmd; 421 switch(cmd & IEE_CB_CMD) { 422 case IEE_CB_CMD_NOP: /* NOP CMD */ 423 break; 424 case IEE_CB_CMD_IAS: /* Individual Address Setup */ 425 memcpy(__UNVOLATILE(cb->cb_ind_addr), CLLADDR(ifp->if_sadl), 426 ETHER_ADDR_LEN); 427 break; 428 case IEE_CB_CMD_CONF: /* Configure */ 429 memcpy(__UNVOLATILE(cb->cb_cf), sc->sc_cf, sc->sc_cf[0] 430 & IEE_CF_0_CNT_M); 431 break; 432 case IEE_CB_CMD_MCS: /* Multicast Setup */ 433 if (sc->sc_next_cb != 0) { 434 sc->sc_flags |= IEE_WANT_MCAST; 435 return; 436 } 437 sc->sc_flags &= ~IEE_WANT_MCAST; 438 if ((sc->sc_cf[8] & IEE_CF_8_PRM) != 0) { 439 /* Need no multicast filter in promisc mode. */ 440 iee_cb_setup(sc, IEE_CB_CMD_CONF | IEE_CB_S | IEE_CB_EL 441 | IEE_CB_I); 442 return; 443 } 444 /* Leave room for a CONF CMD to en/dis-able ALLMULTI mode */ 445 cb = SC_CB(sc->sc_next_cb + 1); 446 cb->cb_cmd = cmd; 447 cb->cb_mcast.mc_size = 0; 448 ETHER_FIRST_MULTI(step, &sc->sc_ethercom, enm); 449 while (enm != NULL) { 450 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 451 ETHER_ADDR_LEN) != 0 || cb->cb_mcast.mc_size 452 * ETHER_ADDR_LEN + 2 * IEE_CB_SZ 453 > IEE_CB_LIST_SZ + IEE_TBD_LIST_SZ) { 454 cb->cb_mcast.mc_size = 0; 455 break; 456 } 457 memcpy(__UNVOLATILE(&cb->cb_mcast.mc_addrs[ 458 cb->cb_mcast.mc_size * ETHER_ADDR_LEN]), 459 enm->enm_addrlo, ETHER_ADDR_LEN); 460 ETHER_NEXT_MULTI(step, enm); 461 cb->cb_mcast.mc_size++; 462 } 463 if (cb->cb_mcast.mc_size == 0) { 464 /* Can't do exact mcast filtering, do ALLMULTI mode. */ 465 ifp->if_flags |= IFF_ALLMULTI; 466 sc->sc_cf[11] &= ~IEE_CF_11_MCALL; 467 } else { 468 /* disable ALLMULTI and load mcast list */ 469 ifp->if_flags &= ~IFF_ALLMULTI; 470 sc->sc_cf[11] |= IEE_CF_11_MCALL; 471 /* Mcast setup may need more then IEE_CB_SZ bytes. */ 472 bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map, 473 IEE_CB_OFF, IEE_CB_LIST_SZ + IEE_TBD_LIST_SZ, 474 BUS_DMASYNC_PREWRITE); 475 } 476 iee_cb_setup(sc, IEE_CB_CMD_CONF); 477 break; 478 case IEE_CB_CMD_TR: /* Transmit */ 479 cb->cb_transmit.tx_tbd_addr = IEE_PHYS_SHMEM(IEE_TBD_OFF 480 + IEE_TBD_SZ * sc->sc_next_tbd); 481 cb->cb_cmd |= IEE_CB_SF; /* Always use Flexible Mode. */ 482 break; 483 case IEE_CB_CMD_TDR: /* Time Domain Reflectometry */ 484 break; 485 case IEE_CB_CMD_DUMP: /* Dump */ 486 break; 487 case IEE_CB_CMD_DIAG: /* Diagnose */ 488 break; 489 default: 490 /* can't happen */ 491 break; 492 } 493 cb->cb_link_addr = IEE_PHYS_SHMEM(IEE_CB_OFF + IEE_CB_SZ * 494 (sc->sc_next_cb + 1)); 495 bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map, IEE_CB_OFF 496 + IEE_CB_SZ * sc->sc_next_cb, IEE_CB_SZ, BUS_DMASYNC_PREWRITE); 497 sc->sc_next_cb++; 498 ifp->if_timer = 5; 499 return; 500 } 501 502 503 504 void 505 iee_attach(struct iee_softc *sc, uint8_t *eth_addr, int *media, int nmedia, 506 int defmedia) 507 { 508 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 509 int n; 510 511 /* Set pointer to Intermediate System Configuration Pointer. */ 512 /* Phys. addr. in big endian order. (Big endian as defined by Intel.) */ 513 SC_SCP->scp_iscp_addr = IEE_SWAP(IEE_PHYS_SHMEM(IEE_ISCP_OFF)); 514 /* Set pointer to System Control Block. */ 515 /* Phys. addr. in big endian order. (Big endian as defined by Intel.) */ 516 SC_ISCP->iscp_scb_addr = IEE_SWAP(IEE_PHYS_SHMEM(IEE_SCB_OFF)); 517 /* Set pointer to Receive Frame Area. (physical address) */ 518 SC_SCB->scb_rfa_addr = IEE_PHYS_SHMEM(IEE_RFD_OFF); 519 /* Set pointer to Command Block. (physical address) */ 520 SC_SCB->scb_cmd_blk_addr = IEE_PHYS_SHMEM(IEE_CB_OFF); 521 522 ifmedia_init(&sc->sc_ifmedia, 0, iee_mediachange, iee_mediastatus); 523 if (media != NULL) { 524 for (n = 0 ; n < nmedia ; n++) 525 ifmedia_add(&sc->sc_ifmedia, media[n], 0, NULL); 526 ifmedia_set(&sc->sc_ifmedia, defmedia); 527 } else { 528 ifmedia_add(&sc->sc_ifmedia, IFM_ETHER | IFM_NONE, 0, NULL); 529 ifmedia_set(&sc->sc_ifmedia, IFM_ETHER | IFM_NONE); 530 } 531 532 ifp->if_softc = sc; 533 strcpy(ifp->if_xname, device_xname(sc->sc_dev)); 534 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 535 ifp->if_start = iee_start; /* initiate output routine */ 536 ifp->if_ioctl = iee_ioctl; /* ioctl routine */ 537 ifp->if_init = iee_init; /* init routine */ 538 ifp->if_stop = iee_stop; /* stop routine */ 539 ifp->if_watchdog = iee_watchdog; /* timer routine */ 540 IFQ_SET_READY(&ifp->if_snd); 541 /* iee supports IEEE 802.1Q Virtual LANs, see vlan(4). */ 542 sc->sc_ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU; 543 544 if_attach(ifp); 545 ether_ifattach(ifp, eth_addr); 546 547 aprint_normal(": Intel 82596%s address %s\n", 548 i82596_typenames[sc->sc_type], ether_sprintf(eth_addr)); 549 550 for (n = 0 ; n < IEE_NCB ; n++) 551 sc->sc_tx_map[n] = NULL; 552 for (n = 0 ; n < IEE_NRFD ; n++) { 553 sc->sc_rx_mbuf[n] = NULL; 554 sc->sc_rx_map[n] = NULL; 555 } 556 sc->sc_tx_timeout = 0; 557 sc->sc_setup_timeout = 0; 558 (sc->sc_iee_reset)(sc); 559 } 560 561 562 563 void 564 iee_detach(struct iee_softc *sc, int flags) 565 { 566 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 567 568 if ((ifp->if_flags & IFF_RUNNING) != 0) 569 iee_stop(ifp, 1); 570 ether_ifdetach(ifp); 571 if_detach(ifp); 572 } 573 574 575 576 /* media change and status callback */ 577 int 578 iee_mediachange(struct ifnet *ifp) 579 { 580 struct iee_softc *sc = ifp->if_softc; 581 582 if (sc->sc_mediachange != NULL) 583 return (sc->sc_mediachange)(ifp); 584 return 0; 585 } 586 587 588 589 void 590 iee_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmreq) 591 { 592 struct iee_softc *sc = ifp->if_softc; 593 594 if (sc->sc_mediastatus != NULL) 595 (sc->sc_mediastatus)(ifp, ifmreq); 596 } 597 598 599 600 /* initiate output routine */ 601 void 602 iee_start(struct ifnet *ifp) 603 { 604 struct iee_softc *sc = ifp->if_softc; 605 struct mbuf *m = NULL; 606 int t; 607 int n; 608 609 if (sc->sc_next_cb != 0) 610 /* There is already a CMD running. Defer packet enqueuing. */ 611 return; 612 for (t = 0 ; t < IEE_NCB ; t++) { 613 IFQ_DEQUEUE(&ifp->if_snd, sc->sc_tx_mbuf[t]); 614 if (sc->sc_tx_mbuf[t] == NULL) 615 break; 616 if (bus_dmamap_load_mbuf(sc->sc_dmat, sc->sc_tx_map[t], 617 sc->sc_tx_mbuf[t], BUS_DMA_WRITE | BUS_DMA_NOWAIT) != 0) { 618 /* 619 * The packet needs more TBD then we support. 620 * Copy the packet into a mbuf cluster to get it out. 621 */ 622 printf("%s: iee_start: failed to load DMA map\n", 623 device_xname(sc->sc_dev)); 624 MGETHDR(m, M_DONTWAIT, MT_DATA); 625 if (m == NULL) { 626 printf("%s: iee_start: can't allocate mbuf\n", 627 device_xname(sc->sc_dev)); 628 m_freem(sc->sc_tx_mbuf[t]); 629 t--; 630 continue; 631 } 632 MCLAIM(m, &sc->sc_ethercom.ec_rx_mowner); 633 MCLGET(m, M_DONTWAIT); 634 if ((m->m_flags & M_EXT) == 0) { 635 printf("%s: iee_start: can't allocate mbuf " 636 "cluster\n", device_xname(sc->sc_dev)); 637 m_freem(sc->sc_tx_mbuf[t]); 638 m_freem(m); 639 t--; 640 continue; 641 } 642 m_copydata(sc->sc_tx_mbuf[t], 0, 643 sc->sc_tx_mbuf[t]->m_pkthdr.len, mtod(m, void *)); 644 m->m_pkthdr.len = sc->sc_tx_mbuf[t]->m_pkthdr.len; 645 m->m_len = sc->sc_tx_mbuf[t]->m_pkthdr.len; 646 m_freem(sc->sc_tx_mbuf[t]); 647 sc->sc_tx_mbuf[t] = m; 648 if(bus_dmamap_load_mbuf(sc->sc_dmat, sc->sc_tx_map[t], 649 m, BUS_DMA_WRITE | BUS_DMA_NOWAIT) != 0) { 650 printf("%s: iee_start: can't load TX DMA map\n", 651 device_xname(sc->sc_dev)); 652 m_freem(sc->sc_tx_mbuf[t]); 653 t--; 654 continue; 655 } 656 } 657 for (n = 0 ; n < sc->sc_tx_map[t]->dm_nsegs ; n++) { 658 SC_TBD(sc->sc_next_tbd + n)->tbd_tb_addr = 659 sc->sc_tx_map[t]->dm_segs[n].ds_addr; 660 SC_TBD(sc->sc_next_tbd + n)->tbd_size = 661 sc->sc_tx_map[t]->dm_segs[n].ds_len; 662 SC_TBD(sc->sc_next_tbd + n)->tbd_link_addr = 663 IEE_PHYS_SHMEM(IEE_TBD_OFF + IEE_TBD_SZ 664 * (sc->sc_next_tbd + n + 1)); 665 } 666 SC_TBD(sc->sc_next_tbd + n - 1)->tbd_size |= IEE_CB_EL; 667 bus_dmamap_sync(sc->sc_dmat, sc->sc_tx_map[t], 0, 668 sc->sc_tx_map[t]->dm_mapsize, BUS_DMASYNC_PREWRITE); 669 IFQ_POLL(&ifp->if_snd, m); 670 if (m == NULL) 671 iee_cb_setup(sc, IEE_CB_CMD_TR | IEE_CB_S | IEE_CB_EL 672 | IEE_CB_I); 673 else 674 iee_cb_setup(sc, IEE_CB_CMD_TR); 675 sc->sc_next_tbd += n; 676 #if NBPFILTER > 0 677 /* Pass packet to bpf if someone listens. */ 678 if (ifp->if_bpf) 679 bpf_mtap(ifp->if_bpf, sc->sc_tx_mbuf[t]); 680 #endif 681 } 682 if (t == 0) 683 /* No packets got set up for TX. */ 684 return; 685 if (t == IEE_NCB) 686 ifp->if_flags |= IFF_OACTIVE; 687 bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map, IEE_CB_SZ, 688 IEE_CB_LIST_SZ + IEE_TBD_LIST_SZ, BUS_DMASYNC_PREWRITE); 689 (sc->sc_iee_cmd)(sc, IEE_SCB_CUC_EXE); 690 } 691 692 693 694 /* ioctl routine */ 695 int 696 iee_ioctl(struct ifnet *ifp, u_long cmd, void *data) 697 { 698 struct iee_softc *sc = ifp->if_softc; 699 int s; 700 int err; 701 702 s = splnet(); 703 switch (cmd) { 704 case SIOCSIFMEDIA: 705 case SIOCGIFMEDIA: 706 err = ifmedia_ioctl(ifp, (struct ifreq *) data, 707 &sc->sc_ifmedia, cmd); 708 break; 709 710 default: 711 err = ether_ioctl(ifp, cmd, data); 712 if (err == ENETRESET) { 713 /* 714 * Multicast list as changed; set the hardware filter 715 * accordingly. 716 */ 717 if (ifp->if_flags & IFF_RUNNING) { 718 iee_cb_setup(sc, IEE_CB_CMD_MCS | IEE_CB_S | 719 IEE_CB_EL | IEE_CB_I); 720 if ((sc->sc_flags & IEE_WANT_MCAST) == 0) 721 (*sc->sc_iee_cmd)(sc, IEE_SCB_CUC_EXE); 722 } 723 err = 0; 724 } 725 break; 726 } 727 splx(s); 728 return err; 729 } 730 731 732 733 /* init routine */ 734 int 735 iee_init(struct ifnet *ifp) 736 { 737 struct iee_softc *sc = ifp->if_softc; 738 int r; 739 int t; 740 int n; 741 int err; 742 743 sc->sc_next_cb = 0; 744 sc->sc_next_tbd = 0; 745 sc->sc_flags &= ~IEE_WANT_MCAST; 746 sc->sc_rx_done = 0; 747 SC_SCB->scb_crc_err = 0; 748 SC_SCB->scb_align_err = 0; 749 SC_SCB->scb_resource_err = 0; 750 SC_SCB->scb_overrun_err = 0; 751 SC_SCB->scb_rcvcdt_err = 0; 752 SC_SCB->scb_short_fr_err = 0; 753 sc->sc_crc_err = 0; 754 sc->sc_align_err = 0; 755 sc->sc_resource_err = 0; 756 sc->sc_overrun_err = 0; 757 sc->sc_rcvcdt_err = 0; 758 sc->sc_short_fr_err = 0; 759 sc->sc_tx_col = 0; 760 sc->sc_rx_err = 0; 761 sc->sc_cmd_err = 0; 762 /* Create Transmit DMA maps. */ 763 for (t = 0 ; t < IEE_NCB ; t++) { 764 if (sc->sc_tx_map[t] == NULL && bus_dmamap_create(sc->sc_dmat, 765 MCLBYTES, IEE_NTBD, MCLBYTES, 0, BUS_DMA_NOWAIT, 766 &sc->sc_tx_map[t]) != 0) { 767 printf("%s: iee_init: can't create TX DMA map\n", 768 device_xname(sc->sc_dev)); 769 for (n = 0 ; n < t ; n++) 770 bus_dmamap_destroy(sc->sc_dmat, 771 sc->sc_tx_map[n]); 772 return ENOBUFS; 773 } 774 } 775 /* Initialize Receive Frame and Receive Buffer Descriptors */ 776 err = 0; 777 memset(SC_RFD(0), 0, IEE_RFD_LIST_SZ); 778 memset(SC_RBD(0), 0, IEE_RBD_LIST_SZ); 779 for (r = 0 ; r < IEE_NRFD ; r++) { 780 SC_RFD(r)->rfd_cmd = IEE_RFD_SF; 781 SC_RFD(r)->rfd_link_addr = IEE_PHYS_SHMEM(IEE_RFD_OFF 782 + IEE_RFD_SZ * ((r + 1) % IEE_NRFD)); 783 784 SC_RBD(r)->rbd_next_rbd = IEE_PHYS_SHMEM(IEE_RBD_OFF 785 + IEE_RBD_SZ * ((r + 1) % IEE_NRFD)); 786 if (sc->sc_rx_mbuf[r] == NULL) { 787 MGETHDR(sc->sc_rx_mbuf[r], M_DONTWAIT, MT_DATA); 788 if (sc->sc_rx_mbuf[r] == NULL) { 789 printf("%s: iee_init: can't allocate mbuf\n", 790 device_xname(sc->sc_dev)); 791 err = 1; 792 break; 793 } 794 MCLAIM(sc->sc_rx_mbuf[r],&sc->sc_ethercom.ec_rx_mowner); 795 MCLGET(sc->sc_rx_mbuf[r], M_DONTWAIT); 796 if ((sc->sc_rx_mbuf[r]->m_flags & M_EXT) == 0) { 797 printf("%s: iee_init: can't allocate mbuf" 798 " cluster\n", device_xname(sc->sc_dev)); 799 m_freem(sc->sc_rx_mbuf[r]); 800 err = 1; 801 break; 802 } 803 } 804 if (sc->sc_rx_map[r] == NULL && bus_dmamap_create(sc->sc_dmat, 805 MCLBYTES, 1, MCLBYTES , 0, BUS_DMA_NOWAIT, 806 &sc->sc_rx_map[r]) != 0) { 807 printf("%s: iee_init: can't create RX " 808 "DMA map\n", device_xname(sc->sc_dev)); 809 m_freem(sc->sc_rx_mbuf[r]); 810 err = 1; 811 break; 812 } 813 if (bus_dmamap_load(sc->sc_dmat, sc->sc_rx_map[r], 814 sc->sc_rx_mbuf[r]->m_ext.ext_buf, 815 sc->sc_rx_mbuf[r]->m_ext.ext_size, NULL, 816 BUS_DMA_READ | BUS_DMA_NOWAIT) != 0) { 817 printf("%s: iee_init: can't load RX DMA map\n", 818 device_xname(sc->sc_dev)); 819 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_map[r]); 820 m_freem(sc->sc_rx_mbuf[r]); 821 err = 1; 822 break; 823 } 824 bus_dmamap_sync(sc->sc_dmat, sc->sc_rx_map[r], 0, 825 sc->sc_rx_mbuf[r]->m_ext.ext_size, BUS_DMASYNC_PREREAD); 826 SC_RBD(r)->rbd_size = sc->sc_rx_map[r]->dm_segs[0].ds_len; 827 SC_RBD(r)->rbd_rb_addr= sc->sc_rx_map[r]->dm_segs[0].ds_addr; 828 } 829 SC_RFD(0)->rfd_rbd_addr = IEE_PHYS_SHMEM(IEE_RBD_OFF); 830 if (err != 0) { 831 for (n = 0 ; n < r; n++) { 832 m_freem(sc->sc_rx_mbuf[n]); 833 sc->sc_rx_mbuf[n] = NULL; 834 bus_dmamap_unload(sc->sc_dmat, sc->sc_rx_map[n]); 835 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_map[n]); 836 sc->sc_rx_map[n] = NULL; 837 } 838 for (n = 0 ; n < t ; n++) { 839 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_map[n]); 840 sc->sc_tx_map[n] = NULL; 841 } 842 return ENOBUFS; 843 } 844 845 (sc->sc_iee_reset)(sc); 846 iee_cb_setup(sc, IEE_CB_CMD_IAS); 847 sc->sc_cf[0] = IEE_CF_0_DEF | IEE_CF_0_PREF; 848 sc->sc_cf[1] = IEE_CF_1_DEF; 849 sc->sc_cf[2] = IEE_CF_2_DEF; 850 sc->sc_cf[3] = IEE_CF_3_ADDRLEN_DEF | IEE_CF_3_NSAI 851 | IEE_CF_3_PREAMLEN_DEF; 852 sc->sc_cf[4] = IEE_CF_4_DEF; 853 sc->sc_cf[5] = IEE_CF_5_DEF; 854 sc->sc_cf[6] = IEE_CF_6_DEF; 855 sc->sc_cf[7] = IEE_CF_7_DEF; 856 sc->sc_cf[8] = IEE_CF_8_DEF; 857 sc->sc_cf[9] = IEE_CF_9_DEF; 858 sc->sc_cf[10] = IEE_CF_10_DEF; 859 sc->sc_cf[11] = IEE_CF_11_DEF & ~IEE_CF_11_LNGFLD; 860 sc->sc_cf[12] = IEE_CF_12_DEF; 861 sc->sc_cf[13] = IEE_CF_13_DEF; 862 iee_cb_setup(sc, IEE_CB_CMD_CONF | IEE_CB_S | IEE_CB_EL); 863 SC_SCB->scb_rfa_addr = IEE_PHYS_SHMEM(IEE_RFD_OFF); 864 bus_dmamap_sync(sc->sc_dmat, sc->sc_shmem_map, 0, IEE_SHMEM_MAX, 865 BUS_DMASYNC_PREWRITE); 866 (sc->sc_iee_cmd)(sc, IEE_SCB_CUC_EXE | IEE_SCB_RUC_ST); 867 /* Issue a Channel Attention to ACK interrupts we may have caused. */ 868 (sc->sc_iee_cmd)(sc, IEE_SCB_ACK); 869 870 /* Mark the interface as running and ready to RX/TX packets. */ 871 ifp->if_flags |= IFF_RUNNING; 872 ifp->if_flags &= ~IFF_OACTIVE; 873 return 0; 874 } 875 876 877 878 /* stop routine */ 879 void 880 iee_stop(struct ifnet *ifp, int disable) 881 { 882 struct iee_softc *sc = ifp->if_softc; 883 int n; 884 885 ifp->if_flags &= ~IFF_RUNNING; 886 ifp->if_flags |= IFF_OACTIVE; 887 ifp->if_timer = 0; 888 /* Reset the chip to get it quiet. */ 889 (sc->sc_iee_reset)(ifp->if_softc); 890 /* Issue a Channel Attention to ACK interrupts we may have caused. */ 891 (sc->sc_iee_cmd)(ifp->if_softc, IEE_SCB_ACK); 892 /* Release any dynamically allocated resources. */ 893 for (n = 0 ; n < IEE_NCB ; n++) { 894 if (sc->sc_tx_map[n] != NULL) 895 bus_dmamap_destroy(sc->sc_dmat, sc->sc_tx_map[n]); 896 sc->sc_tx_map[n] = NULL; 897 } 898 for (n = 0 ; n < IEE_NRFD ; n++) { 899 if (sc->sc_rx_mbuf[n] != NULL) 900 m_freem(sc->sc_rx_mbuf[n]); 901 sc->sc_rx_mbuf[n] = NULL; 902 if (sc->sc_rx_map[n] != NULL) { 903 bus_dmamap_unload(sc->sc_dmat, sc->sc_rx_map[n]); 904 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rx_map[n]); 905 } 906 sc->sc_rx_map[n] = NULL; 907 } 908 } 909 910 911 912 /* timer routine */ 913 void 914 iee_watchdog(struct ifnet *ifp) 915 { 916 struct iee_softc *sc = ifp->if_softc; 917 918 (sc->sc_iee_reset)(sc); 919 if (sc->sc_next_tbd != 0) 920 printf("%s: iee_watchdog: transmit timeout %d\n", 921 device_xname(sc->sc_dev), ++sc->sc_tx_timeout); 922 else 923 printf("%s: iee_watchdog: setup timeout %d\n", 924 device_xname(sc->sc_dev), ++sc->sc_setup_timeout); 925 iee_init(ifp); 926 } 927
Indexes created Fri Oct 31 04:09:52 GMT 2025