i82596var.h revision 1.1
1 /* $NetBSD: i82596var.h,v 1.1 2004/03/12 11:37:17 jkunz Exp $ */ 2 3 /* 4 * Copyright (c) 2003 Jochen Kunz. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of Jochen Kunz may not be used to endorse or promote 16 * products derived from this software without specific prior 17 * written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY JOCHEN KUNZ 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL JOCHEN KUNZ 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* All definitions are for a Intel 82596 DX/SX / CA in linear 32 bit mode. */ 33 34 35 36 /* Supported chip variants */ 37 extern char *i82596_typenames[]; 38 enum i82596_types { I82596_UNKNOWN, I82596_DX, I82596_CA }; 39 40 41 42 /* System Configuration Pointer */ 43 struct iee_scp { 44 volatile u_int16_t scp_pad1; 45 volatile u_int16_t scp_sysbus; /* Sysbus Byte */ 46 volatile u_int32_t scp_pad2; 47 volatile u_int32_t scp_iscp_addr; /* Int. Sys. Conf. Pointer */ 48 }; 49 50 51 52 /* Intermediate System Configuration Pointer */ 53 struct iee_iscp { 54 volatile u_int16_t iscp_bussy; /* Even Word, bits 0..15 */ 55 volatile u_int16_t iscp_pad; /* Odd Word, bits 16..32 */ 56 volatile u_int32_t iscp_scb_addr; /* address of SCB */ 57 }; 58 59 60 61 /* System Control Block */ 62 struct iee_scb { 63 volatile u_int16_t scb_status; /* Status Bits */ 64 volatile u_int16_t scb_cmd; /* Command Bits */ 65 volatile u_int32_t scb_cmd_blk_addr; /* Command Block Address */ 66 volatile u_int32_t scb_rfa_addr; /* Receive Frame Area Address */ 67 volatile u_int32_t scb_crc_err; /* CRC Errors */ 68 volatile u_int32_t scb_align_err; /* Alignment Errors */ 69 volatile u_int32_t scb_resource_err; /* Resource Errors [1] */ 70 volatile u_int32_t scb_overrun_err; /* Overrun Errors [1] */ 71 volatile u_int32_t scb_rcvcdt_err; /* RCVCDT Errors [1] */ 72 volatile u_int32_t scb_short_fr_err; /* Short Frame Errors */ 73 volatile u_int16_t scb_tt_off; /* Bus Throtle Off Timer */ 74 volatile u_int16_t scb_tt_on; /* Bus Throtle On Timer */ 75 }; 76 /* [1] In MONITOR mode these counters change function. */ 77 78 79 80 /* Command Block */ 81 struct iee_cb { 82 volatile u_int16_t cb_status; /* Status Bits */ 83 volatile u_int16_t cb_cmd; /* Command Bits */ 84 volatile u_int32_t cb_link_addr; /* Link Address to next CMD */ 85 union { 86 volatile u_int8_t cb_ind_addr[8];/* Individual Address */ 87 volatile u_int8_t cb_cf[16]; /* Configuration Bytes */ 88 struct { 89 volatile u_int16_t mc_size;/* Num bytes of Mcast Addr.*/ 90 volatile u_int8_t mc_addrs[6]; /* List of Mcast Addr. */ 91 } cb_mcast; 92 struct { 93 volatile u_int32_t tx_tbd_addr;/* TX Buf. Descr. Addr.*/ 94 volatile u_int16_t tx_tcb_count; /* Len. of opt. data */ 95 volatile u_int16_t tx_pad; 96 volatile u_int8_t tx_dest_addr[6]; /* Dest. Addr. */ 97 volatile u_int16_t tx_length; /* Length of data */ 98 /* u_int8_t data; Data to send, optional */ 99 } cb_transmit; 100 volatile u_int32_t cb_tdr; /* Time & Flags from TDR CMD */ 101 volatile u_int32_t cb_dump_addr;/* Address of Dump buffer */ 102 }; 103 }; 104 105 106 107 /* Transmit Buffer Descriptor */ 108 struct iee_tbd { 109 volatile u_int16_t tbd_size; /* Size of buffer & Flags */ 110 volatile u_int16_t tbd_pad; 111 volatile u_int32_t tbd_link_addr; /* Link Address to next RFD */ 112 volatile u_int32_t tbd_tb_addr; /* Transmit Buffer Address */ 113 }; 114 115 116 117 /* Receive Frame Descriptor */ 118 struct iee_rfd { 119 volatile u_int16_t rfd_status; /* Status Bits */ 120 volatile u_int16_t rfd_cmd; /* Command Bits */ 121 volatile u_int32_t rfd_link_addr; /* Link Address to next RFD */ 122 volatile u_int32_t rfd_rbd_addr; /* Address of first free RBD */ 123 volatile u_int16_t rfd_count; /* Actual Count */ 124 volatile u_int16_t rfd_size; /* Size */ 125 volatile u_int8_t rfd_dest_addr[6]; /* Destiantion Address */ 126 volatile u_int8_t rfd_src_addr[6]; /* Source Address */ 127 volatile u_int16_t rfd_length; /* Length Field */ 128 volatile u_int16_t rfd_pad; /* Optional Data */ 129 }; 130 131 132 133 /* Receive Buffer Descriptor */ 134 struct iee_rbd { 135 volatile u_int16_t rbd_count; /* Actual Cont of bytes */ 136 volatile u_int16_t rbd_pad1; 137 volatile u_int32_t rbd_next_rbd; /* Address of Next RBD */ 138 volatile u_int32_t rbd_rb_addr; /* Receive Buffer Address */ 139 volatile u_int16_t rbd_size; /* Size of Receive Buffer */ 140 volatile u_int16_t rbd_pad2; 141 }; 142 143 144 145 #define IEE_NRFD 32 /* Number of RFDs == length of receive queue */ 146 #define IEE_NCB 32 /* Number of Command Blocks == transmit queue */ 147 #define IEE_NTBD 16 /* Number of TBDs per CB */ 148 149 150 151 struct iee_softc { 152 struct device sc_dev; /* common device data */ 153 struct ifmedia sc_ifmedia; /* media interface */ 154 struct ethercom sc_ethercom; /* ethernet speciffic stuff */ 155 enum i82596_types sc_type; 156 bus_dma_tag_t sc_dmat; 157 bus_dmamap_t sc_shmem_map; 158 bus_dma_segment_t sc_dma_segs; 159 bus_dmamap_t sc_rx_map[IEE_NRFD]; 160 bus_dmamap_t sc_tx_map[IEE_NCB]; 161 struct mbuf *sc_rx_mbuf[IEE_NRFD]; 162 struct mbuf *sc_tx_mbuf[IEE_NCB]; 163 caddr_t sc_shmem_addr; 164 int sc_next_cb; 165 int sc_next_tbd; 166 int sc_rx_done; 167 u_int8_t sc_cf[14]; 168 int sc_flags; 169 int sc_cl_align; 170 u_int32_t sc_crc_err; 171 u_int32_t sc_align_err; 172 u_int32_t sc_resource_err; 173 u_int32_t sc_overrun_err; 174 u_int32_t sc_rcvcdt_err; 175 u_int32_t sc_short_fr_err; 176 u_int32_t sc_receive_err; 177 u_int32_t sc_tx_col; 178 u_int32_t sc_rx_err; 179 u_int32_t sc_cmd_err; 180 u_int32_t sc_tx_timeout; 181 u_int32_t sc_setup_timeout; 182 int (*sc_iee_cmd)(struct iee_softc *, u_int32_t); 183 int (*sc_iee_reset)(struct iee_softc *); 184 void (*sc_mediastatus)(struct ifnet *, struct ifmediareq *); 185 int (*sc_mediachange)(struct ifnet *); 186 }; 187 188 189 190 /* Flags */ 191 #define IEE_NEED_SWAP 0x01 192 #define IEE_WANT_MCAST 0x02 193 194 #define IEE_SWAP(x) ((sc->sc_flags & IEE_NEED_SWAP) == 0 ? x : \ 195 (((x) << 16) | ((x) >> 16))) 196 #define IEE_PHYS_SHMEM(x) ((u_int32_t) (sc->sc_shmem_map->dm_segs[0].ds_addr \ 197 + (x))) 198 199 200 /* Offsets in shared memory */ 201 #define IEE_SCP_SZ (((sizeof(struct iee_scp) - 1) / (sc)->sc_cl_align + 1)\ 202 * (sc)->sc_cl_align) 203 #define IEE_SCP_OFF 0 204 205 #define IEE_ISCP_SZ (((sizeof(struct iee_iscp) - 1) / (sc)->sc_cl_align + 1)\ 206 * (sc)->sc_cl_align) 207 #define IEE_ISCP_OFF IEE_SCP_SZ 208 209 #define IEE_SCB_SZ (((sizeof(struct iee_scb) - 1) / (sc)->sc_cl_align + 1)\ 210 * (sc)->sc_cl_align) 211 #define IEE_SCB_OFF (IEE_SCP_SZ + IEE_ISCP_SZ) 212 213 #define IEE_RFD_SZ (((sizeof(struct iee_rfd) - 1) / (sc)->sc_cl_align + 1)\ 214 * (sc)->sc_cl_align) 215 #define IEE_RFD_LIST_SZ (IEE_RFD_SZ * IEE_NRFD) 216 #define IEE_RFD_OFF (IEE_SCP_SZ + IEE_ISCP_SZ + IEE_SCB_SZ) 217 218 #define IEE_RBD_SZ (((sizeof(struct iee_rbd) - 1) / (sc)->sc_cl_align + 1)\ 219 * (sc)->sc_cl_align) 220 #define IEE_RBD_LIST_SZ (IEE_RBD_SZ * IEE_NRFD) 221 #define IEE_RBD_OFF (IEE_SCP_SZ + IEE_ISCP_SZ + IEE_SCB_SZ \ 222 + IEE_RFD_SZ * IEE_NRFD) 223 224 #define IEE_CB_SZ (((sizeof(struct iee_cb) - 1) / (sc)->sc_cl_align + 1)\ 225 * (sc)->sc_cl_align) 226 #define IEE_CB_LIST_SZ (IEE_CB_SZ * IEE_NCB) 227 #define IEE_CB_OFF (IEE_SCP_SZ + IEE_ISCP_SZ + IEE_SCB_SZ \ 228 + IEE_RFD_SZ * IEE_NRFD + IEE_RBD_SZ * IEE_NRFD) 229 230 #define IEE_TBD_SZ (((sizeof(struct iee_tbd) - 1) / (sc)->sc_cl_align + 1)\ 231 * (sc)->sc_cl_align) 232 #define IEE_TBD_LIST_SZ (IEE_TBD_SZ * IEE_NTBD * IEE_NCB) 233 #define IEE_TBD_OFF (IEE_SCP_SZ + IEE_ISCP_SZ + IEE_SCB_SZ \ 234 + IEE_RFD_SZ * IEE_NRFD + IEE_RBD_SZ * IEE_NRFD \ 235 + IEE_CB_SZ * IEE_NCB) 236 237 #define IEE_SHMEM_MAX (IEE_SCP_SZ + IEE_ISCP_SZ + IEE_SCB_SZ \ 238 + IEE_RFD_SZ * IEE_NRFD + IEE_RBD_SZ * IEE_NRFD \ 239 + IEE_CB_SZ * IEE_NCB + IEE_TBD_SZ * IEE_NTBD * IEE_NCB) 240 241 242 #define SC_SCP ((struct iee_scp*)((sc)->sc_shmem_addr + IEE_SCP_OFF)) 243 #define SC_ISCP ((struct iee_iscp*)((sc)->sc_shmem_addr + IEE_ISCP_OFF)) 244 #define SC_SCB ((struct iee_scb*)((sc)->sc_shmem_addr + IEE_SCB_OFF)) 245 #define SC_RFD(n) ((struct iee_rfd*)((sc)->sc_shmem_addr + IEE_RFD_OFF \ 246 + (n) * IEE_RFD_SZ)) 247 #define SC_RBD(n) ((struct iee_rbd*)((sc)->sc_shmem_addr + IEE_RBD_OFF \ 248 + (n) * IEE_RBD_SZ)) 249 #define SC_CB(n) ((struct iee_cb*)((sc)->sc_shmem_addr + IEE_CB_OFF \ 250 + (n) * IEE_CB_SZ)) 251 #define SC_TBD(n) ((struct iee_tbd*)((sc)->sc_shmem_addr + IEE_TBD_OFF \ 252 + (n) * IEE_TBD_SZ)) 253 254 255 256 void iee_attach(struct iee_softc *, u_int8_t *, int *, int, int); 257 void iee_detach(struct iee_softc *, int); 258 int iee_intr(void *); 259 260 261 262 263
Indexes created Mon Sep 29 21:09:56 GMT 2025