1 1.4 andvar /* $NetBSD: ibm82660reg.h,v 1.4 2021/08/21 23:00:31 andvar Exp $ */ 2 1.1 garbled 3 1.1 garbled /*- 4 1.1 garbled * Copyright (c) 2007 The NetBSD Foundation, Inc. 5 1.1 garbled * All rights reserved. 6 1.1 garbled * 7 1.1 garbled * This code is derived from software contributed to The NetBSD Foundation 8 1.1 garbled * by Tim Rightnour 9 1.1 garbled * 10 1.1 garbled * Redistribution and use in source and binary forms, with or without 11 1.1 garbled * modification, are permitted provided that the following conditions 12 1.1 garbled * are met: 13 1.1 garbled * 1. Redistributions of source code must retain the above copyright 14 1.1 garbled * notice, this list of conditions and the following disclaimer. 15 1.1 garbled * 2. Redistributions in binary form must reproduce the above copyright 16 1.1 garbled * notice, this list of conditions and the following disclaimer in the 17 1.1 garbled * documentation and/or other materials provided with the distribution. 18 1.1 garbled * 19 1.1 garbled * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.1 garbled * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.1 garbled * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.1 garbled * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.1 garbled * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.1 garbled * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.1 garbled * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.1 garbled * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.1 garbled * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.1 garbled * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.1 garbled * POSSIBILITY OF SUCH DAMAGE. 30 1.1 garbled */ 31 1.1 garbled 32 1.1 garbled #ifndef _DEV_IC_IBM82660REG_H_ 33 1.1 garbled #define _DEV_IC_IBM82660REG_H_ 34 1.1 garbled 35 1.1 garbled /* Register definitions for the IBM 82660 PCI Bridge Controller. 36 1.1 garbled * Also known as a Lanai/Kauai. 37 1.1 garbled */ 38 1.1 garbled 39 1.4 andvar /* Memory Bank Starting Addresses */ 40 1.3 mjf #define IBM_82660_MEM_BANK0_START 0x80 41 1.3 mjf #define IBM_82660_MEM_BANK1_START 0x81 42 1.3 mjf #define IBM_82660_MEM_BANK2_START 0x82 43 1.3 mjf #define IBM_82660_MEM_BANK3_START 0x83 44 1.3 mjf #define IBM_82660_MEM_BANK4_START 0x84 45 1.3 mjf #define IBM_82660_MEM_BANK5_START 0x85 46 1.3 mjf #define IBM_82660_MEM_BANK6_START 0x86 47 1.3 mjf #define IBM_82660_MEM_BANK7_START 0x87 48 1.3 mjf 49 1.3 mjf /* Memory Bank Extended Starting Addresses */ 50 1.3 mjf #define IBM_82660_MEM_BANK0_EXTSTART 0x88 51 1.3 mjf #define IBM_82660_MEM_BANK1_EXTSTART 0x89 52 1.3 mjf #define IBM_82660_MEM_BANK2_EXTSTART 0x8A 53 1.3 mjf #define IBM_82660_MEM_BANK3_EXTSTART 0x8B 54 1.3 mjf #define IBM_82660_MEM_BANK4_EXTSTART 0x8C 55 1.3 mjf #define IBM_82660_MEM_BANK5_EXTSTART 0x8D 56 1.3 mjf #define IBM_82660_MEM_BANK6_EXTSTART 0x8E 57 1.3 mjf #define IBM_82660_MEM_BANK7_EXTSTART 0x8F 58 1.3 mjf 59 1.3 mjf /* Memory Bank Ending Addresses */ 60 1.3 mjf #define IBM_82660_MEM_BANK0_END 0x90 61 1.3 mjf #define IBM_82660_MEM_BANK1_END 0x91 62 1.3 mjf #define IBM_82660_MEM_BANK2_END 0x92 63 1.3 mjf #define IBM_82660_MEM_BANK3_END 0x93 64 1.3 mjf #define IBM_82660_MEM_BANK4_END 0x94 65 1.3 mjf #define IBM_82660_MEM_BANK5_END 0x95 66 1.3 mjf #define IBM_82660_MEM_BANK6_END 0x96 67 1.3 mjf #define IBM_82660_MEM_BANK7_END 0x97 68 1.3 mjf 69 1.3 mjf /* 70 1.3 mjf * Helper functions for working with the Memory Bank 71 1.3 mjf * Start/End Address registers. 72 1.3 mjf */ 73 1.3 mjf #define IBM_82660_BANK0_ADDR(x) ((x) & 0xFF) 74 1.3 mjf #define IBM_82660_BANK1_ADDR(x) (((x) & 0xFF00) >> 8) 75 1.3 mjf #define IBM_82660_BANK2_ADDR(x) (((x) & 0xFF0000) >> 16) 76 1.3 mjf #define IBM_82660_BANK3_ADDR(x) (((x) & 0xFF000000) >> 24) 77 1.3 mjf 78 1.3 mjf /* Memory Bank Extended Ending Addresses */ 79 1.3 mjf #define IBM_82660_MEM_BANK0_EXTEND 0x98 80 1.3 mjf #define IBM_82660_MEM_BANK1_EXTEND 0x99 81 1.3 mjf #define IBM_82660_MEM_BANK2_EXTEND 0x9A 82 1.3 mjf #define IBM_82660_MEM_BANK3_EXTEND 0x9B 83 1.3 mjf #define IBM_82660_MEM_BANK4_EXTEND 0x9C 84 1.3 mjf #define IBM_82660_MEM_BANK5_EXTEND 0x9D 85 1.3 mjf #define IBM_82660_MEM_BANK6_EXTEND 0x9E 86 1.3 mjf #define IBM_82660_MEM_BANK7_EXTEND 0x9F 87 1.3 mjf 88 1.3 mjf #define IBM_82660_MEM_BANK_ENABLE 0xA0 89 1.3 mjf #define IBM_82660_MEM_BANK0_ENABLED 0x01 90 1.3 mjf #define IBM_82660_MEM_BANK1_ENABLED 0x02 91 1.3 mjf #define IBM_82660_MEM_BANK2_ENABLED 0x04 92 1.3 mjf #define IBM_82660_MEM_BANK3_ENABLED 0x08 93 1.3 mjf 94 1.3 mjf #define IBM_82660_MEM_TIMING_1 0xA1 95 1.3 mjf #define IBM_82660_MEM_TIMING_2 0xA2 96 1.3 mjf 97 1.3 mjf /* Memory Bank Addressing Modes */ 98 1.3 mjf #define IBM_82660_MEM_BANK01_ADDR_MODE 0xA4 /* Bank 0 and 1 */ 99 1.3 mjf #define IBM_82660_MEM_BANK23_ADDR_MODE 0xA5 /* Bank 2 and 3 */ 100 1.3 mjf #define IBM_82660_MEM_BANK45_ADDR_MODE 0xA6 /* Bank 4 and 5 */ 101 1.3 mjf #define IBM_82660_MEM_BANK67_ADDR_MODE 0xA7 /* Bank 6 and 7 */ 102 1.3 mjf 103 1.1 garbled #define IBM_82660_CACHE_STATUS 0xB1 104 1.1 garbled #define IBM_82660_CACHE_STATUS_L1_EN 0x01 105 1.1 garbled #define IBM_82660_CACHE_STATUS_L2_EN 0x02 106 1.1 garbled 107 1.3 mjf #define IBM_82660_RAS_WATCHDOG_TIMER 0xB6 108 1.3 mjf 109 1.3 mjf #define IBM_82660_SINGLEBIT_ERR_CNTR 0xB8 110 1.3 mjf #define IBM_82660_SINGLEBIT_ERR_LEVEL 0xB9 111 1.3 mjf 112 1.3 mjf /* Bridge Options */ 113 1.1 garbled #define IBM_82660_OPTIONS_1 0xBA 114 1.1 garbled #define IBM_82660_OPTIONS_1_MCP 0x01 115 1.1 garbled #define IBM_82660_OPTIONS_1_TEA 0x02 116 1.1 garbled #define IBM_82660_OPTIONS_1_ISA 0x04 117 1.1 garbled 118 1.3 mjf #define IBM_82660_OPTIONS_2 0xBB 119 1.3 mjf 120 1.3 mjf #define IBM_82660_ERR_ENABLE_1 0xC0 121 1.3 mjf #define IBM_82660_ERR_STATUS_1 0xC1 122 1.3 mjf 123 1.3 mjf #define IBM_82660_CPU_ERR_STATUS 0xC3 124 1.3 mjf 125 1.3 mjf #define IBM_82660_ERR_ENABLE_2 0xC4 126 1.3 mjf #define IBM_82660_ERR_STATUS_2 0xC5 127 1.3 mjf 128 1.3 mjf #define IBM_82660_PCI_ERR_STATUS 0xC7 129 1.3 mjf 130 1.1 garbled #define IBM_82660_OPTIONS_3 0xD4 131 1.1 garbled #define IBM_82660_OPTIONS_3_ECC 0x01 132 1.1 garbled #define IBM_82660_OPTIONS_3_DRAM 0x04 133 1.1 garbled #define IBM_82660_OPTIONS_3_SRAM 0x08 134 1.1 garbled #define IBM_82660_OPTIONS_3_SNOOP 0x80 135 1.1 garbled 136 1.1 garbled #define IBM_82660_SYSTEM_CTRL 0x81C 137 1.1 garbled #define IBM_82660_SYSTEM_CTRL_L2_EN 0x40 138 1.1 garbled #define IBM_82660_SYSTEM_CTRL_L2_MI 0x80 139 1.1 garbled 140 1.1 garbled #endif /* _DEV_IC_IBM82660REG_H_ */ 141
Indexes created Thu Sep 25 16:09:42 GMT 2025