igsfbvar.h revision 1.5
1 /* $NetBSD: igsfbvar.h,v 1.5 2003/05/10 01:51:56 uwe Exp $ */ 2 3 /* 4 * Copyright (c) 2002, 2003 Valeriy E. Ushakov 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * Integraphics Systems IGA 168x and CyberPro series. 32 */ 33 #ifndef _DEV_IC_IGSFBVAR_H_ 34 #define _DEV_IC_IGSFBVAR_H_ 35 36 #define IGS_CMAP_SIZE 256 /* 256 R/G/B entries */ 37 struct igs_hwcmap { 38 u_int8_t r[IGS_CMAP_SIZE]; 39 u_int8_t g[IGS_CMAP_SIZE]; 40 u_int8_t b[IGS_CMAP_SIZE]; 41 }; 42 43 44 #define IGS_CURSOR_MAX_SIZE 64 /* 64x64 sprite */ 45 struct igs_hwcursor { 46 struct wsdisplay_curpos cc_pos; 47 struct wsdisplay_curpos cc_hot; 48 struct wsdisplay_curpos cc_size; 49 u_int8_t cc_image[512]; /* save copy of image for GCURSOR */ 50 u_int8_t cc_mask[512]; /* save copy of mask for GCURSOR */ 51 u_int16_t cc_sprite[512]; /* sprite in device 2bpp format */ 52 u_int8_t cc_color[6]; /* 2 colors, 3 rgb components */ 53 }; 54 55 56 /* 57 * Precomputed bit tables to convert 1bpp image/mask to 2bpp hw cursor 58 * sprite. For IGSFB_HW_BSWAP attachments they are pre-bswapped as well. 59 */ 60 struct igs_bittab { 61 u_int16_t iexpand[256]; /* image: 0 -> 00, 1 -> 01 */ 62 u_int16_t mexpand[256]; /* mask: 0 -> 00, 1 -> 11 */ 63 }; 64 65 66 struct igsfb_devconfig { 67 /* io space, may be memory mapped */ 68 bus_space_tag_t dc_iot; 69 bus_addr_t dc_iobase; 70 int dc_ioflags; 71 72 /* io registers */ 73 bus_space_handle_t dc_ioh; 74 75 /* linear memory */ 76 bus_space_tag_t dc_memt; 77 bus_addr_t dc_memaddr; 78 bus_size_t dc_memsz; /* size of linear address space including mmio */ 79 int dc_memflags; 80 81 /* actual video memory size */ 82 bus_size_t dc_vmemsz; 83 84 /* resolution */ 85 int dc_width, dc_height, dc_depth; 86 87 /* part of video memory mapped for wsscreen */ 88 bus_space_handle_t dc_fbh; 89 bus_size_t dc_fbsz; 90 91 /* 1KB of cursor sprite data */ 92 bus_space_handle_t dc_crh; 93 94 /* XXX: notyet 95 * graphic coprocessor can be accessed either via i/o space 96 * or via memory-mapped i/o access through memory space 97 */ 98 bus_space_tag_t dc_copt; 99 bus_space_handle_t dc_coph; 100 101 /* product id: IGA 168x, CyberPro 2k &c */ 102 int dc_id; 103 104 /* flags that control driver operation */ 105 int dc_hwflags; 106 #define IGSFB_HW_BSWAP 0x1 /* endianness mismatch */ 107 #define IGSFB_HW_BE_SELECT 0x2 /* big endian magic (cyberpro) */ 108 109 /* do we need to do bswap in software? */ 110 #define IGSFB_HW_SOFT_BSWAP(dc) \ 111 ((((dc)->dc_hwflags) & (IGSFB_HW_BSWAP | IGSFB_HW_BE_SELECT)) \ 112 == IGSFB_HW_BSWAP) 113 114 struct rasops_info dc_ri; 115 116 struct igs_hwcmap dc_cmap; /* software copy of colormap */ 117 struct igs_hwcursor dc_cursor; /* software copy of cursor sprite */ 118 119 /* precomputed bit tables for cursor sprite 1bpp -> 2bpp conversion */ 120 struct igs_bittab dc_bittab; 121 122 int dc_nscreens; /* can do only a single screen */ 123 124 int dc_blanked; /* screen is currently blanked */ 125 int dc_curenb; /* cursor sprite enabled */ 126 }; 127 128 129 struct igsfb_softc { 130 struct device sc_dev; 131 struct igsfb_devconfig *sc_dc; 132 }; 133 134 135 136 /* 137 * Access sugar for indexed registers 138 */ 139 140 static __inline__ u_int8_t 141 igs_idx_read(bus_space_tag_t, bus_space_handle_t, u_int, u_int8_t); 142 static __inline__ void 143 igs_idx_write(bus_space_tag_t, bus_space_handle_t, u_int, u_int8_t, u_int8_t); 144 145 static __inline__ u_int8_t 146 igs_idx_read(t, h, idxport, idx) 147 bus_space_tag_t t; 148 bus_space_handle_t h; 149 u_int idxport; 150 u_int8_t idx; 151 { 152 bus_space_write_1(t, h, idxport, idx); 153 return (bus_space_read_1(t, h, idxport + 1)); 154 } 155 156 static __inline__ void 157 igs_idx_write(t, h, idxport, idx, val) 158 bus_space_tag_t t; 159 bus_space_handle_t h; 160 u_int idxport; 161 u_int8_t idx, val; 162 { 163 bus_space_write_1(t, h, idxport, idx); 164 bus_space_write_1(t, h, idxport + 1, val); 165 } 166 167 168 /* sugar for sequencer controller */ 169 #define igs_seq_read(t,h,x) \ 170 (igs_idx_read((t),(h),IGS_SEQ_IDX,(x))) 171 #define igs_seq_write(t,h,x,v) \ 172 (igs_idx_write((t),(h),IGS_SEQ_IDX,(x),(v))) 173 174 175 /* sugar for CRT controller */ 176 #define igs_crtc_read(t,h,x) \ 177 (igs_idx_read((t),(h),IGS_CRTC_IDX,(x))) 178 #define igs_crtc_write(t,h,x,v) \ 179 (igs_idx_write((t),(h),IGS_CRTC_IDX,(x),(v))) 180 181 182 /* sugar for attribute controller */ 183 #define igs_attr_flip_flop(t,h) \ 184 ((void)bus_space_read_1((t),(h),IGS_INPUT_STATUS1)); 185 #define igs_attr_read(t,h,x) \ 186 (igs_idx_read((t),(h),IGS_ATTR_IDX,(x))) 187 188 static __inline__ void 189 igs_attr_write(bus_space_tag_t, bus_space_handle_t, u_int8_t, u_int8_t); 190 191 static __inline__ void 192 igs_attr_write(t, h, idx, val) 193 bus_space_tag_t t; 194 bus_space_handle_t h; 195 u_int8_t idx, val; 196 { 197 bus_space_write_1(t, h, IGS_ATTR_IDX, idx); 198 bus_space_write_1(t, h, IGS_ATTR_IDX, val); /* sic, same register */ 199 } 200 201 202 /* sugar for graphics controller registers */ 203 #define igs_grfx_read(t,h,x) (igs_idx_read((t),(h),IGS_GRFX_IDX,(x))) 204 #define igs_grfx_write(t,h,x,v) (igs_idx_write((t),(h),IGS_GRFX_IDX,(x),(v))) 205 206 207 /* sugar for extended registers */ 208 #define igs_ext_read(t,h,x) (igs_idx_read((t),(h),IGS_EXT_IDX,(x))) 209 #define igs_ext_write(t,h,x,v) (igs_idx_write((t),(h),IGS_EXT_IDX,(x),(v))) 210 211 212 /* igsfb_subr.c */ 213 int igsfb_enable(bus_space_tag_t, bus_addr_t, int); 214 void igsfb_hw_setup(struct igsfb_devconfig *); 215 void igsfb_1024x768_8bpp_60Hz(struct igsfb_devconfig *); 216 217 /* igsfb.c */ 218 int igsfb_cnattach_subr(struct igsfb_devconfig *); 219 void igsfb_attach_subr(struct igsfb_softc *, int); 220 221 222 extern struct igsfb_devconfig igsfb_console_dc; 223 224 #endif /* _DEV_IC_IGSFBVAR_H_ */ 225
Indexes created Fri Sep 26 20:09:58 GMT 2025