iha.c revision 1.11
1 /* $NetBSD: iha.c,v 1.11 2001/11/13 13:14:38 lukem Exp $ */ 2 /* 3 * Initio INI-9xxxU/UW SCSI Device Driver 4 * 5 * Copyright (c) 2000 Ken Westerback 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer, 13 * without modification, immediately at the beginning of the file. 14 * 2. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 21 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 22 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 23 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 25 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 26 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 *------------------------------------------------------------------------- 30 * 31 * Ported from i91u.c, provided by Initio Corporation, which credits: 32 * 33 * Device driver for the INI-9XXXU/UW or INIC-940/950 PCI SCSI Controller. 34 * 35 * FreeBSD 36 * 37 * Written for 386bsd and FreeBSD by 38 * Winston Hung <winstonh (at) initio.com> 39 * 40 * Copyright (c) 1997-99 Initio Corp. All rights reserved. 41 * 42 *------------------------------------------------------------------------- 43 */ 44 45 /* 46 * Ported to NetBSD by Izumi Tsutsui <tsutsui (at) ceres.dti.ne.jp> from OpenBSD: 47 * $OpenBSD: iha.c,v 1.3 2001/02/20 00:47:33 krw Exp $ 48 */ 49 50 #include <sys/cdefs.h> 51 __KERNEL_RCSID(0, "$NetBSD: iha.c,v 1.11 2001/11/13 13:14:38 lukem Exp $"); 52 53 #include <sys/param.h> 54 #include <sys/systm.h> 55 #include <sys/kernel.h> 56 #include <sys/buf.h> 57 #include <sys/device.h> 58 #include <sys/malloc.h> 59 60 #include <uvm/uvm_extern.h> 61 62 #include <machine/bus.h> 63 #include <machine/intr.h> 64 65 #include <dev/scsipi/scsi_all.h> 66 #include <dev/scsipi/scsipi_all.h> 67 #include <dev/scsipi/scsiconf.h> 68 #include <dev/scsipi/scsi_message.h> 69 70 #include <dev/ic/ihareg.h> 71 #include <dev/ic/ihavar.h> 72 73 /* 74 * SCSI Rate Table, indexed by FLAG_SCSI_RATE field of 75 * tcs flags. 76 */ 77 static const u_int8_t iha_rate_tbl[8] = { 78 /* fast 20 */ 79 /* nanosecond divide by 4 */ 80 12, /* 50ns, 20M */ 81 18, /* 75ns, 13.3M */ 82 25, /* 100ns, 10M */ 83 31, /* 125ns, 8M */ 84 37, /* 150ns, 6.6M */ 85 43, /* 175ns, 5.7M */ 86 50, /* 200ns, 5M */ 87 62 /* 250ns, 4M */ 88 }; 89 90 #ifdef notused 91 static u_int16_t eeprom_default[EEPROM_SIZE] = { 92 /* -- Header ------------------------------------ */ 93 /* signature */ 94 EEP_SIGNATURE, 95 /* size, revision */ 96 EEP_WORD(EEPROM_SIZE * 2, 0x01), 97 /* -- Host Adapter Structure -------------------- */ 98 /* model */ 99 0x0095, 100 /* model info, number of channel */ 101 EEP_WORD(0x00, 1), 102 /* BIOS config */ 103 EEP_BIOSCFG_DEFAULT, 104 /* host adapter config */ 105 0, 106 107 /* -- eeprom_adapter[0] ------------------------------- */ 108 /* ID, adapter config 1 */ 109 EEP_WORD(7, CFG_DEFAULT), 110 /* adapter config 2, number of targets */ 111 EEP_WORD(0x00, 8), 112 /* target flags */ 113 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 114 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 115 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 116 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 117 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 118 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 119 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 120 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 121 122 /* -- eeprom_adapter[1] ------------------------------- */ 123 /* ID, adapter config 1 */ 124 EEP_WORD(7, CFG_DEFAULT), 125 /* adapter config 2, number of targets */ 126 EEP_WORD(0x00, 8), 127 /* target flags */ 128 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 129 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 130 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 131 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 132 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 133 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 134 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 135 EEP_WORD(FLAG_DEFAULT, FLAG_DEFAULT), 136 /* reserved[5] */ 137 0, 0, 0, 0, 0, 138 /* checksum */ 139 0 140 }; 141 #endif 142 143 static u_int8_t iha_data_over_run(struct iha_scsi_req_q *); 144 145 static int iha_push_sense_request(struct iha_softc *, struct iha_scsi_req_q *); 146 static void iha_timeout(void *); 147 static int iha_alloc_sglist(struct iha_softc *); 148 149 static void iha_read_eeprom(struct iha_softc *, struct iha_eeprom *); 150 static int iha_se2_rd_all(struct iha_softc *, u_int16_t *); 151 static void iha_se2_instr(struct iha_softc *, int); 152 static u_int16_t iha_se2_rd(struct iha_softc *, int); 153 #ifdef notused 154 static void iha_se2_update_all(struct iha_softc *); 155 static void iha_se2_wr(struct iha_softc *, int, u_int16_t); 156 #endif 157 158 static void iha_reset_scsi_bus(struct iha_softc *); 159 static void iha_reset_chip(struct iha_softc *); 160 static void iha_reset_dma(struct iha_softc *); 161 162 static void iha_reset_tcs(struct tcs *, u_int8_t); 163 164 static void iha_done_scb(struct iha_softc *, struct iha_scsi_req_q *); 165 static void iha_exec_scb(struct iha_softc *, struct iha_scsi_req_q *); 166 167 static void iha_main(struct iha_softc *); 168 static void iha_scsi(struct iha_softc *); 169 170 static int iha_wait(struct iha_softc *, u_int8_t); 171 172 static __inline void iha_mark_busy_scb(struct iha_scsi_req_q *); 173 174 static void iha_append_free_scb(struct iha_softc *, struct iha_scsi_req_q *); 175 static void iha_append_done_scb(struct iha_softc *, struct iha_scsi_req_q *, 176 u_int8_t); 177 static __inline struct iha_scsi_req_q *iha_pop_done_scb(struct iha_softc *); 178 179 static __inline void iha_append_pend_scb(struct iha_softc *, 180 struct iha_scsi_req_q *); 181 static __inline void iha_push_pend_scb(struct iha_softc *, 182 struct iha_scsi_req_q *); 183 static __inline void iha_del_pend_scb(struct iha_softc *, 184 struct iha_scsi_req_q *); 185 static struct iha_scsi_req_q *iha_find_pend_scb(struct iha_softc *); 186 187 static void iha_sync_done(struct iha_softc *); 188 static void iha_wide_done(struct iha_softc *); 189 static void iha_bad_seq(struct iha_softc *); 190 191 static int iha_next_state(struct iha_softc *); 192 static int iha_state_1(struct iha_softc *); 193 static int iha_state_2(struct iha_softc *); 194 static int iha_state_3(struct iha_softc *); 195 static int iha_state_4(struct iha_softc *); 196 static int iha_state_5(struct iha_softc *); 197 static int iha_state_6(struct iha_softc *); 198 static int iha_state_8(struct iha_softc *); 199 200 static void iha_set_ssig(struct iha_softc *, u_int8_t, u_int8_t); 201 202 static int iha_xpad_in(struct iha_softc *); 203 static int iha_xpad_out(struct iha_softc *); 204 205 static int iha_xfer_data(struct iha_softc *, struct iha_scsi_req_q *, 206 int direction); 207 208 static int iha_status_msg(struct iha_softc *); 209 210 static int iha_msgin(struct iha_softc *); 211 static int iha_msgin_sdtr(struct iha_softc *); 212 static int iha_msgin_extended(struct iha_softc *); 213 static int iha_msgin_ignore_wid_resid(struct iha_softc *); 214 215 static int iha_msgout(struct iha_softc *, u_int8_t); 216 static int iha_msgout_extended(struct iha_softc *); 217 static void iha_msgout_abort(struct iha_softc *, u_int8_t); 218 static int iha_msgout_reject(struct iha_softc *); 219 static int iha_msgout_sdtr(struct iha_softc *); 220 static int iha_msgout_wdtr(struct iha_softc *); 221 222 static void iha_select(struct iha_softc *, struct iha_scsi_req_q *, u_int8_t); 223 224 static void iha_busfree(struct iha_softc *); 225 static int iha_resel(struct iha_softc *); 226 227 static void iha_abort_xs(struct iha_softc *, struct scsipi_xfer *, u_int8_t); 228 229 void iha_scsipi_request(struct scsipi_channel *, scsipi_adapter_req_t, 230 void *arg); 231 232 /* 233 * iha_intr - the interrupt service routine for the iha driver 234 */ 235 int 236 iha_intr(arg) 237 void *arg; 238 { 239 bus_space_tag_t iot; 240 bus_space_handle_t ioh; 241 struct iha_softc *sc; 242 int s; 243 244 sc = (struct iha_softc *)arg; 245 iot = sc->sc_iot; 246 ioh = sc->sc_ioh; 247 248 if ((bus_space_read_1(iot, ioh, TUL_STAT0) & INTPD) == 0) 249 return (0); 250 251 s = splbio(); /* XXX - Or are interrupts off when ISR's are called? */ 252 253 if (sc->sc_semaph != SEMAPH_IN_MAIN) { 254 /* XXX - need these inside a splbio()/splx()? */ 255 bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL); 256 sc->sc_semaph = SEMAPH_IN_MAIN; 257 258 iha_main(sc); 259 260 sc->sc_semaph = ~SEMAPH_IN_MAIN; 261 bus_space_write_1(iot, ioh, TUL_IMSK, (MASK_ALL & ~MSCMP)); 262 } 263 264 splx(s); 265 266 return (1); 267 } 268 269 void 270 iha_scsipi_request(chan, req, arg) 271 struct scsipi_channel *chan; 272 scsipi_adapter_req_t req; 273 void *arg; 274 { 275 struct scsipi_xfer *xs; 276 struct scsipi_periph *periph; 277 struct iha_scsi_req_q *scb; 278 struct iha_softc *sc; 279 int error, flags, s; 280 281 sc = (struct iha_softc *)chan->chan_adapter->adapt_dev; 282 283 switch (req) { 284 case ADAPTER_REQ_RUN_XFER: 285 xs = arg; 286 periph = xs->xs_periph; 287 flags = xs->xs_control; 288 289 if (xs->cmdlen > sizeof(struct scsi_generic) || 290 periph->periph_target >= IHA_MAX_TARGETS) { 291 xs->error = XS_DRIVER_STUFFUP; 292 return; 293 } 294 295 s = splbio(); 296 scb = TAILQ_FIRST(&sc->sc_freescb); 297 if (scb != NULL) { 298 scb->status = STATUS_RENT; 299 TAILQ_REMOVE(&sc->sc_freescb, scb, chain); 300 } 301 #ifdef DIAGNOSTIC 302 else { 303 scsipi_printaddr(periph); 304 printf("unable to allocate scb\n"); 305 panic("iha_scsipi_request"); 306 } 307 #endif 308 splx(s); 309 310 scb->target = periph->periph_target; 311 scb->lun = periph->periph_lun; 312 scb->tcs = &sc->sc_tcs[scb->target]; 313 scb->flags = xs->xs_control; /* XXX */ 314 scb->scb_id = MSG_IDENTIFY(periph->periph_lun, 315 (xs->xs_control & XS_CTL_REQSENSE) == 0); 316 317 scb->xs = xs; 318 scb->timeout = xs->timeout; 319 scb->cmdlen = xs->cmdlen; 320 memcpy(&scb->cmd, xs->cmd, xs->cmdlen); 321 322 scb->buflen = xs->datalen; 323 324 if (scb->buflen > 0) { 325 error = bus_dmamap_load(sc->sc_dmat, scb->dmap, 326 xs->data, scb->buflen, NULL, 327 ((xs->xs_control & XS_CTL_NOSLEEP) ? 328 BUS_DMA_NOWAIT : BUS_DMA_WAITOK) | 329 BUS_DMA_STREAMING | 330 ((xs->xs_control & XS_CTL_DATA_IN) ? 331 BUS_DMA_READ : BUS_DMA_WRITE)); 332 333 if (error) { 334 printf("%s: error %d loading dma map\n", 335 sc->sc_dev.dv_xname, error); 336 iha_append_free_scb(sc, scb); 337 xs->error = XS_DRIVER_STUFFUP; 338 scsipi_done(xs); 339 return; 340 } 341 bus_dmamap_sync(sc->sc_dmat, scb->dmap, 342 0, scb->dmap->dm_mapsize, 343 (xs->xs_control & XS_CTL_DATA_IN) ? 344 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 345 } 346 347 iha_exec_scb(sc, scb); 348 return; 349 350 case ADAPTER_REQ_GROW_RESOURCES: 351 return; /* XXX */ 352 353 case ADAPTER_REQ_SET_XFER_MODE: 354 return; /* XXX */ 355 } 356 } 357 358 void 359 iha_attach(sc) 360 struct iha_softc *sc; 361 { 362 bus_space_tag_t iot = sc->sc_iot; 363 bus_space_handle_t ioh = sc->sc_ioh; 364 struct iha_scsi_req_q *scb; 365 struct iha_eeprom eeprom; 366 struct eeprom_adapter *conf; 367 int i, error, reg; 368 369 iha_read_eeprom(sc, &eeprom); 370 371 conf = &eeprom.adapter[0]; 372 373 /* 374 * fill in the rest of the iha_softc fields 375 */ 376 sc->sc_id = CFG_ID(conf->config1); 377 sc->sc_semaph = ~SEMAPH_IN_MAIN; 378 sc->sc_status0 = 0; 379 sc->sc_actscb = NULL; 380 381 TAILQ_INIT(&sc->sc_freescb); 382 TAILQ_INIT(&sc->sc_pendscb); 383 TAILQ_INIT(&sc->sc_donescb); 384 error = iha_alloc_sglist(sc); 385 if (error != 0) { 386 printf(": cannot allocate sglist\n"); 387 return; 388 } 389 390 sc->sc_scb = malloc(sizeof(struct iha_scsi_req_q) * IHA_MAX_SCB, 391 M_DEVBUF, M_NOWAIT); 392 if (sc->sc_scb == NULL) { 393 printf(": cannot allocate SCB\n"); 394 return; 395 } 396 memset(sc->sc_scb, 0, sizeof(struct iha_scsi_req_q) * IHA_MAX_SCB); 397 398 for (i = 0, scb = sc->sc_scb; i < IHA_MAX_SCB; i++, scb++) { 399 scb->scb_tagid = i; 400 scb->sgoffset = IHA_SG_SIZE * i; 401 scb->sglist = sc->sc_sglist + IHA_MAX_SG_ENTRIES * i; 402 scb->sg_addr = 403 sc->sc_dmamap->dm_segs[0].ds_addr + scb->sgoffset; 404 405 error = bus_dmamap_create(sc->sc_dmat, 406 MAXPHYS, IHA_MAX_SG_ENTRIES, MAXPHYS, 0, 407 BUS_DMA_NOWAIT, &scb->dmap); 408 409 if (error != 0) { 410 printf(": couldn't create SCB DMA map, error = %d\n", 411 error); 412 return; 413 } 414 TAILQ_INSERT_TAIL(&sc->sc_freescb, scb, chain); 415 } 416 417 /* Mask all the interrupts */ 418 bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL); 419 420 /* Stop any I/O and reset the scsi module */ 421 iha_reset_dma(sc); 422 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSMOD); 423 424 /* Program HBA's SCSI ID */ 425 bus_space_write_1(iot, ioh, TUL_SID, sc->sc_id << 4); 426 427 /* 428 * Configure the channel as requested by the NVRAM settings read 429 * by iha_read_eeprom() above. 430 */ 431 432 sc->sc_sconf1 = SCONFIG0DEFAULT; 433 if ((conf->config1 & CFG_EN_PAR) != 0) 434 sc->sc_sconf1 |= SPCHK; 435 bus_space_write_1(iot, ioh, TUL_SCONFIG0, sc->sc_sconf1); 436 437 /* set selection time out 250 ms */ 438 bus_space_write_1(iot, ioh, TUL_STIMO, STIMO_250MS); 439 440 /* Enable desired SCSI termination configuration read from eeprom */ 441 reg = 0; 442 if (conf->config1 & CFG_ACT_TERM1) 443 reg |= ENTMW; 444 if (conf->config1 & CFG_ACT_TERM2) 445 reg |= ENTM; 446 bus_space_write_1(iot, ioh, TUL_DCTRL0, reg); 447 448 reg = bus_space_read_1(iot, ioh, TUL_GCTRL1) & ~ATDEN; 449 if (conf->config1 & CFG_AUTO_TERM) 450 reg |= ATDEN; 451 bus_space_write_1(iot, ioh, TUL_GCTRL1, reg); 452 453 for (i = 0; i < IHA_MAX_TARGETS / 2; i++) { 454 sc->sc_tcs[i * 2 ].flags = EEP_LBYTE(conf->tflags[i]); 455 sc->sc_tcs[i * 2 + 1].flags = EEP_HBYTE(conf->tflags[i]); 456 iha_reset_tcs(&sc->sc_tcs[i * 2 ], sc->sc_sconf1); 457 iha_reset_tcs(&sc->sc_tcs[i * 2 + 1], sc->sc_sconf1); 458 } 459 460 iha_reset_chip(sc); 461 bus_space_write_1(iot, ioh, TUL_SIEN, ALL_INTERRUPTS); 462 463 /* 464 * fill in the adapter. 465 */ 466 sc->sc_adapter.adapt_dev = &sc->sc_dev; 467 sc->sc_adapter.adapt_nchannels = 1; 468 sc->sc_adapter.adapt_openings = IHA_MAX_SCB; 469 sc->sc_adapter.adapt_max_periph = IHA_MAX_SCB; 470 sc->sc_adapter.adapt_ioctl = NULL; 471 sc->sc_adapter.adapt_minphys = minphys; 472 sc->sc_adapter.adapt_request = iha_scsipi_request; 473 474 /* 475 * fill in the channel. 476 */ 477 sc->sc_channel.chan_adapter = &sc->sc_adapter; 478 sc->sc_channel.chan_bustype = &scsi_bustype; 479 sc->sc_channel.chan_channel = 0; 480 sc->sc_channel.chan_ntargets = CFG_TARGET(conf->config2); 481 sc->sc_channel.chan_nluns = 8; 482 sc->sc_channel.chan_id = sc->sc_id; 483 484 /* 485 * Now try to attach all the sub devices. 486 */ 487 config_found(&sc->sc_dev, &sc->sc_channel, scsiprint); 488 } 489 490 /* 491 * iha_reset_dma - abort any active DMA xfer, reset tulip FIFO. 492 */ 493 static void 494 iha_reset_dma(sc) 495 struct iha_softc *sc; 496 { 497 bus_space_tag_t iot = sc->sc_iot; 498 bus_space_handle_t ioh = sc->sc_ioh; 499 500 if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) { 501 /* if DMA xfer is pending, abort DMA xfer */ 502 bus_space_write_1(iot, ioh, TUL_DCMD, ABTXFR); 503 /* wait Abort DMA xfer done */ 504 while ((bus_space_read_1(iot, ioh, TUL_ISTUS0) & DABT) == 0) 505 ; 506 } 507 508 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 509 } 510 511 /* 512 * iha_append_free_scb - append the supplied SCB to the tail of the 513 * sc_freescb queue after clearing and resetting 514 * everything possible. 515 */ 516 static void 517 iha_append_free_scb(sc, scb) 518 struct iha_softc *sc; 519 struct iha_scsi_req_q *scb; 520 { 521 int s; 522 523 s = splbio(); 524 525 if (scb == sc->sc_actscb) 526 sc->sc_actscb = NULL; 527 528 scb->status = STATUS_QUEUED; 529 scb->ha_stat = HOST_OK; 530 scb->ta_stat = SCSI_OK; 531 532 scb->nextstat = 0; 533 scb->sg_index = 0; 534 scb->sg_max = 0; 535 scb->flags = 0; 536 scb->target = 0; 537 scb->lun = 0; 538 scb->buflen = 0; 539 scb->sg_size = 0; 540 scb->cmdlen = 0; 541 scb->scb_id = 0; 542 scb->scb_tagmsg = 0; 543 scb->timeout = 0; 544 scb->bufaddr = 0; 545 546 scb->xs = NULL; 547 scb->tcs = NULL; 548 549 memset(scb->cmd, 0, sizeof(scb->cmd)); 550 memset(scb->sglist, 0, sizeof(scb->sglist)); 551 552 /* 553 * scb_tagid, sg_addr, sglist 554 * SCB_SensePtr are set at initialization 555 * and never change 556 */ 557 558 TAILQ_INSERT_TAIL(&sc->sc_freescb, scb, chain); 559 560 splx(s); 561 } 562 563 static __inline void 564 iha_append_pend_scb(sc, scb) 565 struct iha_softc *sc; 566 struct iha_scsi_req_q *scb; 567 { 568 /* ASSUMPTION: only called within a splbio()/splx() pair */ 569 570 if (scb == sc->sc_actscb) 571 sc->sc_actscb = NULL; 572 573 scb->status = STATUS_QUEUED; 574 575 TAILQ_INSERT_TAIL(&sc->sc_pendscb, scb, chain); 576 } 577 578 static __inline void 579 iha_push_pend_scb(sc, scb) 580 struct iha_softc *sc; 581 struct iha_scsi_req_q *scb; 582 { 583 int s; 584 585 s = splbio(); 586 587 if (scb == sc->sc_actscb) 588 sc->sc_actscb = NULL; 589 590 scb->status = STATUS_QUEUED; 591 592 TAILQ_INSERT_HEAD(&sc->sc_pendscb, scb, chain); 593 594 splx(s); 595 } 596 597 /* 598 * iha_find_pend_scb - scan the pending queue for a SCB that can be 599 * processed immediately. Return NULL if none found 600 * and a pointer to the SCB if one is found. If there 601 * is an active SCB, return NULL! 602 */ 603 static struct iha_scsi_req_q * 604 iha_find_pend_scb(sc) 605 struct iha_softc *sc; 606 { 607 struct iha_scsi_req_q *scb; 608 struct tcs *tcs; 609 int s; 610 611 s = splbio(); 612 613 if (sc->sc_actscb != NULL) 614 scb = NULL; 615 616 else 617 TAILQ_FOREACH(scb, &sc->sc_pendscb, chain) { 618 if ((scb->flags & XS_CTL_RESET) != 0) 619 /* ALWAYS willing to reset a device */ 620 break; 621 622 tcs = scb->tcs; 623 624 if ((scb->scb_tagmsg) != 0) { 625 /* 626 * A Tagged I/O. OK to start If no 627 * non-tagged I/O is active on the same 628 * target 629 */ 630 if (tcs->ntagscb == NULL) 631 break; 632 633 } else if (scb->cmd[0] == REQUEST_SENSE) { 634 /* 635 * OK to do a non-tagged request sense 636 * even if a non-tagged I/O has been 637 * started, 'cuz we don't allow any 638 * disconnect during a request sense op 639 */ 640 break; 641 642 } else if (tcs->tagcnt == 0) { 643 /* 644 * No tagged I/O active on this target, 645 * ok to start a non-tagged one if one 646 * is not already active 647 */ 648 if (tcs->ntagscb == NULL) 649 break; 650 } 651 } 652 653 splx(s); 654 655 return (scb); 656 } 657 658 /* 659 * iha_del_pend_scb - remove scb from sc_pendscb 660 */ 661 static __inline void 662 iha_del_pend_scb(sc, scb) 663 struct iha_softc *sc; 664 struct iha_scsi_req_q *scb; 665 { 666 int s; 667 668 s = splbio(); 669 670 TAILQ_REMOVE(&sc->sc_pendscb, scb, chain); 671 672 splx(s); 673 } 674 675 static __inline void 676 iha_mark_busy_scb(scb) 677 struct iha_scsi_req_q *scb; 678 { 679 int s; 680 681 s = splbio(); 682 683 scb->status = STATUS_BUSY; 684 685 if (scb->scb_tagmsg == 0) 686 scb->tcs->ntagscb = scb; 687 else 688 scb->tcs->tagcnt++; 689 690 splx(s); 691 } 692 693 static void 694 iha_append_done_scb(sc, scb, hastat) 695 struct iha_softc *sc; 696 struct iha_scsi_req_q *scb; 697 u_int8_t hastat; 698 { 699 struct tcs *tcs; 700 int s; 701 702 s = splbio(); 703 704 if (scb->xs != NULL) 705 callout_stop(&scb->xs->xs_callout); 706 707 if (scb == sc->sc_actscb) 708 sc->sc_actscb = NULL; 709 710 tcs = scb->tcs; 711 712 if (scb->scb_tagmsg != 0) { 713 if (tcs->tagcnt) 714 tcs->tagcnt--; 715 } else if (tcs->ntagscb == scb) 716 tcs->ntagscb = NULL; 717 718 scb->status = STATUS_QUEUED; 719 scb->ha_stat = hastat; 720 721 TAILQ_INSERT_TAIL(&sc->sc_donescb, scb, chain); 722 723 splx(s); 724 } 725 726 static __inline struct iha_scsi_req_q * 727 iha_pop_done_scb(sc) 728 struct iha_softc *sc; 729 { 730 struct iha_scsi_req_q *scb; 731 int s; 732 733 s = splbio(); 734 735 scb = TAILQ_FIRST(&sc->sc_donescb); 736 737 if (scb != NULL) { 738 scb->status = STATUS_RENT; 739 TAILQ_REMOVE(&sc->sc_donescb, scb, chain); 740 } 741 742 splx(s); 743 744 return (scb); 745 } 746 747 /* 748 * iha_abort_xs - find the SCB associated with the supplied xs and 749 * stop all processing on it, moving it to the done 750 * queue with the supplied host status value. 751 */ 752 static void 753 iha_abort_xs(sc, xs, hastat) 754 struct iha_softc *sc; 755 struct scsipi_xfer *xs; 756 u_int8_t hastat; 757 { 758 struct iha_scsi_req_q *scb; 759 int i, s; 760 761 s = splbio(); 762 763 /* Check the pending queue for the SCB pointing to xs */ 764 765 TAILQ_FOREACH(scb, &sc->sc_pendscb, chain) 766 if (scb->xs == xs) { 767 iha_del_pend_scb(sc, scb); 768 iha_append_done_scb(sc, scb, hastat); 769 splx(s); 770 return; 771 } 772 773 /* 774 * If that didn't work, check all BUSY/SELECTING SCB's for one 775 * pointing to xs 776 */ 777 778 for (i = 0, scb = sc->sc_scb; i < IHA_MAX_SCB; i++, scb++) 779 switch (scb->status) { 780 case STATUS_BUSY: 781 case STATUS_SELECT: 782 if (scb->xs == xs) { 783 iha_append_done_scb(sc, scb, hastat); 784 splx(s); 785 return; 786 } 787 break; 788 default: 789 break; 790 } 791 792 splx(s); 793 } 794 795 /* 796 * iha_bad_seq - a SCSI bus phase was encountered out of the 797 * correct/expected sequence. Reset the SCSI bus. 798 */ 799 static void 800 iha_bad_seq(sc) 801 struct iha_softc *sc; 802 { 803 struct iha_scsi_req_q *scb = sc->sc_actscb; 804 805 if (scb != NULL) 806 iha_append_done_scb(sc, scb, HOST_BAD_PHAS); 807 808 iha_reset_scsi_bus(sc); 809 iha_reset_chip(sc); 810 } 811 812 /* 813 * iha_push_sense_request - obtain auto sense data by pushing the 814 * SCB needing it back onto the pending 815 * queue with a REQUEST_SENSE CDB. 816 */ 817 static int 818 iha_push_sense_request(sc, scb) 819 struct iha_softc *sc; 820 struct iha_scsi_req_q *scb; 821 { 822 struct scsipi_xfer *xs = scb->xs; 823 struct scsipi_periph *periph = xs->xs_periph; 824 struct scsipi_sense *ss = (struct scsipi_sense *)scb->cmd; 825 int lun = periph->periph_lun; 826 int err; 827 828 ss->opcode = REQUEST_SENSE; 829 ss->byte2 = lun << SCSI_CMD_LUN_SHIFT; 830 ss->unused[0] = ss->unused[1] = 0; 831 ss->length = sizeof(struct scsipi_sense_data); 832 ss->control = 0; 833 834 scb->flags &= ~(FLAG_SG | XS_CTL_DATA_OUT); 835 scb->flags |= FLAG_RSENS | XS_CTL_DATA_IN; 836 837 scb->scb_id &= ~MSG_IDENTIFY_DISCFLAG; 838 839 scb->scb_tagmsg = 0; 840 scb->ta_stat = SCSI_OK; 841 842 scb->cmdlen = sizeof(struct scsipi_sense); 843 scb->buflen = ss->length; 844 845 err = bus_dmamap_load(sc->sc_dmat, scb->dmap, 846 &xs->sense.scsi_sense, scb->buflen, NULL, 847 BUS_DMA_READ|BUS_DMA_NOWAIT); 848 if (err != 0) { 849 printf("iha_push_sense_request: cannot bus_dmamap_load()\n"); 850 xs->error = XS_DRIVER_STUFFUP; 851 return 1; 852 } 853 bus_dmamap_sync(sc->sc_dmat, scb->dmap, 854 0, scb->buflen, BUS_DMASYNC_PREREAD); 855 856 /* XXX What about queued command? */ 857 iha_exec_scb(sc, scb); 858 859 return 0; 860 } 861 862 /* 863 * iha_main - process the active SCB, taking one off pending and making it 864 * active if necessary, and any done SCB's created as 865 * a result until there are no interrupts pending and no pending 866 * SCB's that can be started. 867 */ 868 static void 869 iha_main(sc) 870 struct iha_softc *sc; 871 { 872 bus_space_tag_t iot = sc->sc_iot; 873 bus_space_handle_t ioh =sc->sc_ioh; 874 struct iha_scsi_req_q *scb; 875 876 for (;;) { 877 iha_scsi(sc); 878 879 while ((scb = iha_pop_done_scb(sc)) != NULL) 880 iha_done_scb(sc, scb); 881 882 /* 883 * If there are no interrupts pending, or we can't start 884 * a pending sc, break out of the for(;;). Otherwise 885 * continue the good work with another call to 886 * iha_scsi(). 887 */ 888 if (((bus_space_read_1(iot, ioh, TUL_STAT0) & INTPD) == 0) 889 && (iha_find_pend_scb(sc) == NULL)) 890 break; 891 } 892 } 893 894 /* 895 * iha_scsi - service any outstanding interrupts. If there are none, try to 896 * start another SCB currently in the pending queue. 897 */ 898 static void 899 iha_scsi(sc) 900 struct iha_softc *sc; 901 { 902 bus_space_tag_t iot = sc->sc_iot; 903 bus_space_handle_t ioh = sc->sc_ioh; 904 struct iha_scsi_req_q *scb; 905 struct tcs *tcs; 906 u_int8_t stat; 907 908 /* service pending interrupts asap */ 909 910 stat = bus_space_read_1(iot, ioh, TUL_STAT0); 911 if ((stat & INTPD) != 0) { 912 sc->sc_status0 = stat; 913 sc->sc_status1 = bus_space_read_1(iot, ioh, TUL_STAT1); 914 sc->sc_sistat = bus_space_read_1(iot, ioh, TUL_SISTAT); 915 916 sc->sc_phase = sc->sc_status0 & PH_MASK; 917 918 if ((sc->sc_sistat & SRSTD) != 0) { 919 iha_reset_scsi_bus(sc); 920 return; 921 } 922 923 if ((sc->sc_sistat & RSELED) != 0) { 924 iha_resel(sc); 925 return; 926 } 927 928 if ((sc->sc_sistat & (STIMEO | DISCD)) != 0) { 929 iha_busfree(sc); 930 return; 931 } 932 933 if ((sc->sc_sistat & (SCMDN | SBSRV)) != 0) { 934 iha_next_state(sc); 935 return; 936 } 937 938 if ((sc->sc_sistat & SELED) != 0) 939 iha_set_ssig(sc, 0, 0); 940 } 941 942 /* 943 * There were no interrupts pending which required action elsewhere, so 944 * see if it is possible to start the selection phase on a pending SCB 945 */ 946 if ((scb = iha_find_pend_scb(sc)) == NULL) 947 return; 948 949 tcs = scb->tcs; 950 951 /* program HBA's SCSI ID & target SCSI ID */ 952 bus_space_write_1(iot, ioh, TUL_SID, (sc->sc_id << 4) | scb->target); 953 954 if ((scb->flags & XS_CTL_RESET) == 0) { 955 bus_space_write_1(iot, ioh, TUL_SYNCM, tcs->syncm); 956 957 if ((tcs->flags & FLAG_NO_NEG_SYNC) == 0 || 958 (tcs->flags & FLAG_NO_NEG_WIDE) == 0) 959 iha_select(sc, scb, SELATNSTOP); 960 961 else if (scb->scb_tagmsg != 0) 962 iha_select(sc, scb, SEL_ATN3); 963 964 else 965 iha_select(sc, scb, SEL_ATN); 966 967 } else { 968 iha_select(sc, scb, SELATNSTOP); 969 scb->nextstat = 8; 970 } 971 972 if ((scb->flags & XS_CTL_POLL) != 0) { 973 for (; scb->timeout > 0; scb->timeout--) { 974 if (iha_wait(sc, NO_OP) == -1) 975 break; 976 if (iha_next_state(sc) == -1) 977 break; 978 delay(1000); /* Only happens in boot, so it's ok */ 979 } 980 981 /* 982 * Since done queue processing not done until AFTER this 983 * function returns, scb is on the done queue, not 984 * the free queue at this point and still has valid data 985 * 986 * Conversely, xs->error has not been set yet 987 */ 988 if (scb->timeout == 0) 989 iha_timeout(scb); 990 } 991 } 992 993 /* 994 * iha_data_over_run - return HOST_OK for all SCSI opcodes where BufLen 995 * is an 'Allocation Length'. All other SCSI opcodes 996 * get HOST_DO_DU as they SHOULD have xferred all the 997 * data requested. 998 * 999 * The list of opcodes using 'Allocation Length' was 1000 * found by scanning all the SCSI-3 T10 drafts. See 1001 * www.t10.org for the curious with a .pdf reader. 1002 */ 1003 static u_int8_t 1004 iha_data_over_run(scb) 1005 struct iha_scsi_req_q *scb; 1006 { 1007 switch (scb->cmd[0]) { 1008 case 0x03: /* Request Sense SPC-2 */ 1009 case 0x12: /* Inquiry SPC-2 */ 1010 case 0x1a: /* Mode Sense (6 byte version) SPC-2 */ 1011 case 0x1c: /* Receive Diagnostic Results SPC-2 */ 1012 case 0x23: /* Read Format Capacities MMC-2 */ 1013 case 0x29: /* Read Generation SBC */ 1014 case 0x34: /* Read Position SSC-2 */ 1015 case 0x37: /* Read Defect Data SBC */ 1016 case 0x3c: /* Read Buffer SPC-2 */ 1017 case 0x42: /* Read Sub Channel MMC-2 */ 1018 case 0x43: /* Read TOC/PMA/ATIP MMC */ 1019 1020 /* XXX - 2 with same opcode of 0x44? */ 1021 case 0x44: /* Read Header/Read Density Suprt MMC/SSC*/ 1022 1023 case 0x46: /* Get Configuration MMC-2 */ 1024 case 0x4a: /* Get Event/Status Notification MMC-2 */ 1025 case 0x4d: /* Log Sense SPC-2 */ 1026 case 0x51: /* Read Disc Information MMC */ 1027 case 0x52: /* Read Track Information MMC */ 1028 case 0x59: /* Read Master CUE MMC */ 1029 case 0x5a: /* Mode Sense (10 byte version) SPC-2 */ 1030 case 0x5c: /* Read Buffer Capacity MMC */ 1031 case 0x5e: /* Persistant Reserve In SPC-2 */ 1032 case 0x84: /* Receive Copy Results SPC-2 */ 1033 case 0xa0: /* Report LUNs SPC-2 */ 1034 case 0xa3: /* Various Report requests SBC-2/SCC-2*/ 1035 case 0xa4: /* Report Key MMC-2 */ 1036 case 0xad: /* Read DVD Structure MMC-2 */ 1037 case 0xb4: /* Read Element Status (Attached) SMC */ 1038 case 0xb5: /* Request Volume Element Address SMC */ 1039 case 0xb7: /* Read Defect Data (12 byte ver.) SBC */ 1040 case 0xb8: /* Read Element Status (Independ.) SMC */ 1041 case 0xba: /* Report Redundancy SCC-2 */ 1042 case 0xbd: /* Mechanism Status MMC */ 1043 case 0xbe: /* Report Basic Redundancy SCC-2 */ 1044 1045 return (HOST_OK); 1046 break; 1047 1048 default: 1049 return (HOST_DO_DU); 1050 break; 1051 } 1052 } 1053 1054 /* 1055 * iha_next_state - prcess the current SCB as requested in it's 1056 * nextstat member. 1057 */ 1058 static int 1059 iha_next_state(sc) 1060 struct iha_softc *sc; 1061 { 1062 1063 if (sc->sc_actscb == NULL) 1064 return (-1); 1065 1066 switch (sc->sc_actscb->nextstat) { 1067 case 1: 1068 if (iha_state_1(sc) == 3) 1069 goto state_3; 1070 break; 1071 1072 case 2: 1073 switch (iha_state_2(sc)) { 1074 case 3: 1075 goto state_3; 1076 case 4: 1077 goto state_4; 1078 default: 1079 break; 1080 } 1081 break; 1082 1083 case 3: 1084 state_3: 1085 if (iha_state_3(sc) == 4) 1086 goto state_4; 1087 break; 1088 1089 case 4: 1090 state_4: 1091 switch (iha_state_4(sc)) { 1092 case 0: 1093 return (0); 1094 case 6: 1095 goto state_6; 1096 default: 1097 break; 1098 } 1099 break; 1100 1101 case 5: 1102 switch (iha_state_5(sc)) { 1103 case 4: 1104 goto state_4; 1105 case 6: 1106 goto state_6; 1107 default: 1108 break; 1109 } 1110 break; 1111 1112 case 6: 1113 state_6: 1114 iha_state_6(sc); 1115 break; 1116 1117 case 8: 1118 iha_state_8(sc); 1119 break; 1120 1121 default: 1122 #ifdef IHA_DEBUG_STATE 1123 printf("[debug] -unknown state: %i-\n", 1124 sc->sc_actscb->nextstat); 1125 #endif 1126 iha_bad_seq(sc); 1127 break; 1128 } 1129 1130 return (-1); 1131 } 1132 1133 /* 1134 * iha_state_1 - selection is complete after a SELATNSTOP. If the target 1135 * has put the bus into MSG_OUT phase start wide/sync 1136 * negotiation. Otherwise clear the FIFO and go to state 3, 1137 * which will send the SCSI CDB to the target. 1138 */ 1139 static int 1140 iha_state_1(sc) 1141 struct iha_softc *sc; 1142 { 1143 bus_space_tag_t iot = sc->sc_iot; 1144 bus_space_handle_t ioh = sc->sc_ioh; 1145 struct iha_scsi_req_q *scb = sc->sc_actscb; 1146 struct tcs *tcs; 1147 int flags; 1148 1149 iha_mark_busy_scb(scb); 1150 1151 tcs = scb->tcs; 1152 1153 bus_space_write_1(iot, ioh, TUL_SCONFIG0, tcs->sconfig0); 1154 1155 /* 1156 * If we are in PHASE_MSG_OUT, send 1157 * a) IDENT message (with tags if appropriate) 1158 * b) WDTR if the target is configured to negotiate wide xfers 1159 * ** OR ** 1160 * c) SDTR if the target is configured to negotiate sync xfers 1161 * but not wide ones 1162 * 1163 * If we are NOT, then the target is not asking for anything but 1164 * the data/command, so go straight to state 3. 1165 */ 1166 if (sc->sc_phase == PHASE_MSG_OUT) { 1167 bus_space_write_1(iot, ioh, TUL_SCTRL1, (ESBUSIN | EHRSL)); 1168 bus_space_write_1(iot, ioh, TUL_SFIFO, scb->scb_id); 1169 1170 if (scb->scb_tagmsg != 0) { 1171 bus_space_write_1(iot, ioh, TUL_SFIFO, 1172 scb->scb_tagmsg); 1173 bus_space_write_1(iot, ioh, TUL_SFIFO, 1174 scb->scb_tagid); 1175 } 1176 1177 flags = tcs->flags; 1178 if ((flags & FLAG_NO_NEG_WIDE) == 0) { 1179 if (iha_msgout_wdtr(sc) == -1) 1180 return (-1); 1181 } else if ((flags & FLAG_NO_NEG_SYNC) == 0) { 1182 if (iha_msgout_sdtr(sc) == -1) 1183 return (-1); 1184 } 1185 1186 } else { 1187 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1188 iha_set_ssig(sc, REQ | BSY | SEL | ATN, 0); 1189 } 1190 1191 return (3); 1192 } 1193 1194 /* 1195 * iha_state_2 - selection is complete after a SEL_ATN or SEL_ATN3. If the SCSI 1196 * CDB has already been send, go to state 4 to start the data 1197 * xfer. Otherwise reset the FIFO and go to state 3, sending 1198 * the SCSI CDB. 1199 */ 1200 static int 1201 iha_state_2(sc) 1202 struct iha_softc *sc; 1203 { 1204 bus_space_tag_t iot = sc->sc_iot; 1205 bus_space_handle_t ioh = sc->sc_ioh; 1206 struct iha_scsi_req_q *scb = sc->sc_actscb; 1207 1208 iha_mark_busy_scb(scb); 1209 1210 bus_space_write_1(iot, ioh, TUL_SCONFIG0, scb->tcs->sconfig0); 1211 1212 if ((sc->sc_status1 & CPDNE) != 0) 1213 return (4); 1214 1215 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1216 1217 iha_set_ssig(sc, REQ | BSY | SEL | ATN, 0); 1218 1219 return (3); 1220 } 1221 1222 /* 1223 * iha_state_3 - send the SCSI CDB to the target, processing any status 1224 * or other messages received until that is done or 1225 * abandoned. 1226 */ 1227 static int 1228 iha_state_3(sc) 1229 struct iha_softc *sc; 1230 { 1231 bus_space_tag_t iot = sc->sc_iot; 1232 bus_space_handle_t ioh = sc->sc_ioh; 1233 struct iha_scsi_req_q *scb = sc->sc_actscb; 1234 int flags; 1235 1236 for (;;) { 1237 switch (sc->sc_phase) { 1238 case PHASE_CMD_OUT: 1239 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, 1240 scb->cmd, scb->cmdlen); 1241 if (iha_wait(sc, XF_FIFO_OUT) == -1) 1242 return (-1); 1243 else if (sc->sc_phase == PHASE_CMD_OUT) { 1244 iha_bad_seq(sc); 1245 return (-1); 1246 } else 1247 return (4); 1248 1249 case PHASE_MSG_IN: 1250 scb->nextstat = 3; 1251 if (iha_msgin(sc) == -1) 1252 return (-1); 1253 break; 1254 1255 case PHASE_STATUS_IN: 1256 if (iha_status_msg(sc) == -1) 1257 return (-1); 1258 break; 1259 1260 case PHASE_MSG_OUT: 1261 flags = scb->tcs->flags; 1262 if ((flags & FLAG_NO_NEG_SYNC) != 0) { 1263 if (iha_msgout(sc, MSG_NOOP) == -1) 1264 return (-1); 1265 } else if (iha_msgout_sdtr(sc) == -1) 1266 return (-1); 1267 break; 1268 1269 default: 1270 printf("[debug] -s3- bad phase = %d\n", sc->sc_phase); 1271 iha_bad_seq(sc); 1272 return (-1); 1273 } 1274 } 1275 } 1276 1277 /* 1278 * iha_state_4 - start a data xfer. Handle any bus state 1279 * transitions until PHASE_DATA_IN/_OUT 1280 * or the attempt is abandoned. If there is 1281 * no data to xfer, go to state 6 and finish 1282 * processing the current SCB. 1283 */ 1284 static int 1285 iha_state_4(sc) 1286 struct iha_softc *sc; 1287 { 1288 struct iha_scsi_req_q *scb = sc->sc_actscb; 1289 1290 if ((scb->flags & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) == 1291 (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) 1292 return (6); /* Both dir flags set => NO xfer was requested */ 1293 1294 for (;;) { 1295 if (scb->buflen == 0) 1296 return (6); 1297 1298 switch (sc->sc_phase) { 1299 case PHASE_STATUS_IN: 1300 if ((scb->flags & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) 1301 != 0) 1302 scb->ha_stat = iha_data_over_run(scb); 1303 if ((iha_status_msg(sc)) == -1) 1304 return (-1); 1305 break; 1306 1307 case PHASE_MSG_IN: 1308 scb->nextstat = 4; 1309 if (iha_msgin(sc) == -1) 1310 return (-1); 1311 break; 1312 1313 case PHASE_MSG_OUT: 1314 if ((sc->sc_status0 & SPERR) != 0) { 1315 scb->buflen = 0; 1316 scb->ha_stat = HOST_SPERR; 1317 if (iha_msgout(sc, MSG_INITIATOR_DET_ERR) == -1) 1318 return (-1); 1319 else 1320 return (6); 1321 } else { 1322 if (iha_msgout(sc, MSG_NOOP) == -1) 1323 return (-1); 1324 } 1325 break; 1326 1327 case PHASE_DATA_IN: 1328 return (iha_xfer_data(sc, scb, XS_CTL_DATA_IN)); 1329 1330 case PHASE_DATA_OUT: 1331 return (iha_xfer_data(sc, scb, XS_CTL_DATA_OUT)); 1332 1333 default: 1334 iha_bad_seq(sc); 1335 return (-1); 1336 } 1337 } 1338 } 1339 1340 /* 1341 * iha_state_5 - handle the partial or final completion of the current 1342 * data xfer. If DMA is still active stop it. If there is 1343 * more data to xfer, go to state 4 and start the xfer. 1344 * If not go to state 6 and finish the SCB. 1345 */ 1346 static int 1347 iha_state_5(sc) 1348 struct iha_softc *sc; 1349 { 1350 bus_space_tag_t iot = sc->sc_iot; 1351 bus_space_handle_t ioh = sc->sc_ioh; 1352 struct iha_scsi_req_q *scb = sc->sc_actscb; 1353 struct iha_sg_element *sg; 1354 u_int32_t cnt; 1355 u_int8_t period, stat; 1356 long xcnt; /* cannot use unsigned!! see code: if (xcnt < 0) */ 1357 int i; 1358 1359 cnt = bus_space_read_4(iot, ioh, TUL_STCNT0) & TCNT; 1360 1361 /* 1362 * Stop any pending DMA activity and check for parity error. 1363 */ 1364 1365 if ((bus_space_read_1(iot, ioh, TUL_DCMD) & XDIR) != 0) { 1366 /* Input Operation */ 1367 if ((sc->sc_status0 & SPERR) != 0) 1368 scb->ha_stat = HOST_SPERR; 1369 1370 if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) { 1371 bus_space_write_1(iot, ioh, TUL_DCTRL0, 1372 bus_space_read_1(iot, ioh, TUL_DCTRL0) | SXSTP); 1373 while (bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) 1374 ; 1375 } 1376 1377 } else { 1378 /* Output Operation */ 1379 if ((sc->sc_status1 & SXCMP) == 0) { 1380 period = scb->tcs->syncm; 1381 if ((period & PERIOD_WIDE_SCSI) != 0) 1382 cnt += (bus_space_read_1(iot, ioh, 1383 TUL_SFIFOCNT) & FIFOC) * 2; 1384 else 1385 cnt += bus_space_read_1(iot, ioh, 1386 TUL_SFIFOCNT) & FIFOC; 1387 } 1388 1389 if ((bus_space_read_1(iot, ioh, TUL_ISTUS1) & XPEND) != 0) { 1390 bus_space_write_1(iot, ioh, TUL_DCMD, ABTXFR); 1391 do 1392 stat = bus_space_read_1(iot, ioh, TUL_ISTUS0); 1393 while ((stat & DABT) == 0); 1394 } 1395 1396 if ((cnt == 1) && (sc->sc_phase == PHASE_DATA_OUT)) { 1397 if (iha_wait(sc, XF_FIFO_OUT) == -1) 1398 return (-1); 1399 cnt = 0; 1400 1401 } else if ((sc->sc_status1 & SXCMP) == 0) 1402 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1403 } 1404 1405 if (cnt == 0) { 1406 scb->buflen = 0; 1407 return (6); 1408 } 1409 1410 /* Update active data pointer and restart the I/O at the new point */ 1411 1412 xcnt = scb->buflen - cnt; /* xcnt == bytes xferred */ 1413 scb->buflen = cnt; /* cnt == bytes left */ 1414 1415 if ((scb->flags & FLAG_SG) != 0) { 1416 sg = &scb->sglist[scb->sg_index]; 1417 for (i = scb->sg_index; i < scb->sg_max; sg++, i++) { 1418 xcnt -= le32toh(sg->sg_len); 1419 if (xcnt < 0) { 1420 xcnt += le32toh(sg->sg_len); 1421 1422 sg->sg_addr = 1423 htole32(le32toh(sg->sg_addr) + xcnt); 1424 sg->sg_len = 1425 htole32(le32toh(sg->sg_len) - xcnt); 1426 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 1427 scb->sgoffset, IHA_SG_SIZE, 1428 BUS_DMASYNC_PREWRITE); 1429 1430 scb->bufaddr += (i - scb->sg_index) * 1431 sizeof(struct iha_sg_element); 1432 scb->sg_size = scb->sg_max - i; 1433 scb->sg_index = i; 1434 1435 return (4); 1436 } 1437 } 1438 return (6); 1439 1440 } else 1441 scb->bufaddr += xcnt; 1442 1443 return (4); 1444 } 1445 1446 /* 1447 * iha_state_6 - finish off the active scb (may require several 1448 * iterations if PHASE_MSG_IN) and return -1 to indicate 1449 * the bus is free. 1450 */ 1451 static int 1452 iha_state_6(sc) 1453 struct iha_softc *sc; 1454 { 1455 1456 for (;;) { 1457 switch (sc->sc_phase) { 1458 case PHASE_STATUS_IN: 1459 if (iha_status_msg(sc) == -1) 1460 return (-1); 1461 break; 1462 1463 case PHASE_MSG_IN: 1464 sc->sc_actscb->nextstat = 6; 1465 if ((iha_msgin(sc)) == -1) 1466 return (-1); 1467 break; 1468 1469 case PHASE_MSG_OUT: 1470 if ((iha_msgout(sc, MSG_NOOP)) == -1) 1471 return (-1); 1472 break; 1473 1474 case PHASE_DATA_IN: 1475 if (iha_xpad_in(sc) == -1) 1476 return (-1); 1477 break; 1478 1479 case PHASE_DATA_OUT: 1480 if (iha_xpad_out(sc) == -1) 1481 return (-1); 1482 break; 1483 1484 default: 1485 iha_bad_seq(sc); 1486 return (-1); 1487 } 1488 } 1489 } 1490 1491 /* 1492 * iha_state_8 - reset the active device and all busy SCBs using it 1493 */ 1494 static int 1495 iha_state_8(sc) 1496 struct iha_softc *sc; 1497 { 1498 bus_space_tag_t iot = sc->sc_iot; 1499 bus_space_handle_t ioh = sc->sc_ioh; 1500 struct iha_scsi_req_q *scb; 1501 int i; 1502 u_int8_t tar; 1503 1504 if (sc->sc_phase == PHASE_MSG_OUT) { 1505 bus_space_write_1(iot, ioh, TUL_SFIFO, MSG_BUS_DEV_RESET); 1506 1507 scb = sc->sc_actscb; 1508 1509 /* This SCB finished correctly -- resetting the device */ 1510 iha_append_done_scb(sc, scb, HOST_OK); 1511 1512 iha_reset_tcs(scb->tcs, sc->sc_sconf1); 1513 1514 tar = scb->target; 1515 for (i = 0, scb = sc->sc_scb; i < IHA_MAX_SCB; i++, scb++) 1516 if (scb->target == tar) 1517 switch (scb->status) { 1518 case STATUS_BUSY: 1519 iha_append_done_scb(sc, 1520 scb, HOST_DEV_RST); 1521 break; 1522 1523 case STATUS_SELECT: 1524 iha_push_pend_scb(sc, scb); 1525 break; 1526 1527 default: 1528 break; 1529 } 1530 1531 sc->sc_flags |= FLAG_EXPECT_DISC; 1532 1533 if (iha_wait(sc, XF_FIFO_OUT) == -1) 1534 return (-1); 1535 } 1536 1537 iha_bad_seq(sc); 1538 return (-1); 1539 } 1540 1541 /* 1542 * iha_xfer_data - initiate the DMA xfer of the data 1543 */ 1544 static int 1545 iha_xfer_data(sc, scb, direction) 1546 struct iha_softc *sc; 1547 struct iha_scsi_req_q *scb; 1548 int direction; 1549 { 1550 bus_space_tag_t iot = sc->sc_iot; 1551 bus_space_handle_t ioh = sc->sc_ioh; 1552 u_int32_t xferlen; 1553 u_int8_t xfertype; 1554 1555 if ((scb->flags & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) != direction) 1556 return (6); /* wrong direction, abandon I/O */ 1557 1558 bus_space_write_4(iot, ioh, TUL_STCNT0, scb->buflen); 1559 1560 if ((scb->flags & FLAG_SG) == 0) { 1561 xferlen = scb->buflen; 1562 xfertype = (direction == XS_CTL_DATA_IN) ? ST_X_IN : ST_X_OUT; 1563 1564 } else { 1565 xferlen = scb->sg_size * sizeof(struct iha_sg_element); 1566 xfertype = (direction == XS_CTL_DATA_IN) ? ST_SG_IN : ST_SG_OUT; 1567 } 1568 1569 bus_space_write_4(iot, ioh, TUL_DXC, xferlen); 1570 bus_space_write_4(iot, ioh, TUL_DXPA, scb->bufaddr); 1571 bus_space_write_1(iot, ioh, TUL_DCMD, xfertype); 1572 1573 bus_space_write_1(iot, ioh, TUL_SCMD, 1574 (direction == XS_CTL_DATA_IN) ? XF_DMA_IN : XF_DMA_OUT); 1575 1576 scb->nextstat = 5; 1577 1578 return (0); 1579 } 1580 1581 static int 1582 iha_xpad_in(sc) 1583 struct iha_softc *sc; 1584 { 1585 bus_space_tag_t iot = sc->sc_iot; 1586 bus_space_handle_t ioh = sc->sc_ioh; 1587 struct iha_scsi_req_q *scb = sc->sc_actscb; 1588 1589 if ((scb->flags & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) != 0) 1590 scb->ha_stat = HOST_DO_DU; 1591 1592 for (;;) { 1593 if ((scb->tcs->syncm & PERIOD_WIDE_SCSI) != 0) 1594 bus_space_write_4(iot, ioh, TUL_STCNT0, 2); 1595 else 1596 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1597 1598 switch (iha_wait(sc, XF_FIFO_IN)) { 1599 case -1: 1600 return (-1); 1601 1602 case PHASE_DATA_IN: 1603 bus_space_read_1(iot, ioh, TUL_SFIFO); 1604 break; 1605 1606 default: 1607 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1608 return (6); 1609 } 1610 } 1611 } 1612 1613 static int 1614 iha_xpad_out(sc) 1615 struct iha_softc *sc; 1616 { 1617 bus_space_tag_t iot = sc->sc_iot; 1618 bus_space_handle_t ioh = sc->sc_ioh; 1619 struct iha_scsi_req_q *scb = sc->sc_actscb; 1620 1621 if ((scb->flags & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) != 0) 1622 scb->ha_stat = HOST_DO_DU; 1623 1624 for (;;) { 1625 if ((scb->tcs->syncm & PERIOD_WIDE_SCSI) != 0) 1626 bus_space_write_4(iot, ioh, TUL_STCNT0, 2); 1627 else 1628 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1629 1630 bus_space_write_1(iot, ioh, TUL_SFIFO, 0); 1631 1632 switch (iha_wait(sc, XF_FIFO_OUT)) { 1633 case -1: 1634 return (-1); 1635 1636 case PHASE_DATA_OUT: 1637 break; 1638 1639 default: 1640 /* Disable wide CPU to allow read 16 bits */ 1641 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 1642 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1643 return (6); 1644 } 1645 } 1646 } 1647 1648 static int 1649 iha_status_msg(sc) 1650 struct iha_softc *sc; 1651 { 1652 bus_space_tag_t iot = sc->sc_iot; 1653 bus_space_handle_t ioh = sc->sc_ioh; 1654 struct iha_scsi_req_q *scb; 1655 u_int8_t msg; 1656 int phase; 1657 1658 if ((phase = iha_wait(sc, CMD_COMP)) == -1) 1659 return (-1); 1660 1661 scb = sc->sc_actscb; 1662 1663 scb->ta_stat = bus_space_read_1(iot, ioh, TUL_SFIFO); 1664 1665 if (phase == PHASE_MSG_OUT) { 1666 if ((sc->sc_status0 & SPERR) == 0) 1667 bus_space_write_1(iot, ioh, TUL_SFIFO, MSG_NOOP); 1668 else 1669 bus_space_write_1(iot, ioh, TUL_SFIFO, 1670 MSG_PARITY_ERROR); 1671 1672 return (iha_wait(sc, XF_FIFO_OUT)); 1673 1674 } else if (phase == PHASE_MSG_IN) { 1675 msg = bus_space_read_1(iot, ioh, TUL_SFIFO); 1676 1677 if ((sc->sc_status0 & SPERR) != 0) 1678 switch (iha_wait(sc, MSG_ACCEPT)) { 1679 case -1: 1680 return (-1); 1681 case PHASE_MSG_OUT: 1682 bus_space_write_1(iot, ioh, TUL_SFIFO, 1683 MSG_PARITY_ERROR); 1684 return (iha_wait(sc, XF_FIFO_OUT)); 1685 default: 1686 iha_bad_seq(sc); 1687 return (-1); 1688 } 1689 1690 if (msg == MSG_CMDCOMPLETE) { 1691 if ((scb->ta_stat & 1692 (SCSI_INTERM | SCSI_BUSY)) == SCSI_INTERM) { 1693 iha_bad_seq(sc); 1694 return (-1); 1695 } 1696 sc->sc_flags |= FLAG_EXPECT_DONE_DISC; 1697 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1698 return (iha_wait(sc, MSG_ACCEPT)); 1699 } 1700 1701 if ((msg == MSG_LINK_CMD_COMPLETE) 1702 || (msg == MSG_LINK_CMD_COMPLETEF)) { 1703 if ((scb->ta_stat & 1704 (SCSI_INTERM | SCSI_BUSY)) == SCSI_INTERM) 1705 return (iha_wait(sc, MSG_ACCEPT)); 1706 } 1707 } 1708 1709 iha_bad_seq(sc); 1710 return (-1); 1711 } 1712 1713 /* 1714 * iha_busfree - SCSI bus free detected as a result of a TIMEOUT or 1715 * DISCONNECT interrupt. Reset the tulip FIFO and 1716 * SCONFIG0 and enable hardware reselect. Move any active 1717 * SCB to sc_donescb list. Return an appropriate host status 1718 * if an I/O was active. 1719 */ 1720 static void 1721 iha_busfree(sc) 1722 struct iha_softc *sc; 1723 { 1724 bus_space_tag_t iot = sc->sc_iot; 1725 bus_space_handle_t ioh = sc->sc_ioh; 1726 struct iha_scsi_req_q *scb; 1727 1728 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1729 bus_space_write_1(iot, ioh, TUL_SCONFIG0, SCONFIG0DEFAULT); 1730 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 1731 1732 scb = sc->sc_actscb; 1733 1734 if (scb != NULL) { 1735 if (scb->status == STATUS_SELECT) 1736 /* selection timeout */ 1737 iha_append_done_scb(sc, scb, HOST_SEL_TOUT); 1738 else 1739 /* Unexpected bus free */ 1740 iha_append_done_scb(sc, scb, HOST_BAD_PHAS); 1741 } 1742 } 1743 1744 static void 1745 iha_reset_scsi_bus(sc) 1746 struct iha_softc *sc; 1747 { 1748 struct iha_scsi_req_q *scb; 1749 struct tcs *tcs; 1750 int i, s; 1751 1752 s = splbio(); 1753 1754 iha_reset_dma(sc); 1755 1756 for (i = 0, scb = sc->sc_scb; i < IHA_MAX_SCB; i++, scb++) 1757 switch (scb->status) { 1758 case STATUS_BUSY: 1759 iha_append_done_scb(sc, scb, HOST_SCSI_RST); 1760 break; 1761 1762 case STATUS_SELECT: 1763 iha_push_pend_scb(sc, scb); 1764 break; 1765 1766 default: 1767 break; 1768 } 1769 1770 for (i = 0, tcs = sc->sc_tcs; i < IHA_MAX_TARGETS; i++, tcs++) 1771 iha_reset_tcs(tcs, sc->sc_sconf1); 1772 1773 splx(s); 1774 } 1775 1776 /* 1777 * iha_resel - handle a detected SCSI bus reselection request. 1778 */ 1779 static int 1780 iha_resel(sc) 1781 struct iha_softc *sc; 1782 { 1783 bus_space_tag_t iot = sc->sc_iot; 1784 bus_space_handle_t ioh = sc->sc_ioh; 1785 struct iha_scsi_req_q *scb; 1786 struct tcs *tcs; 1787 u_int8_t tag, target, lun, msg, abortmsg; 1788 1789 if (sc->sc_actscb != NULL) { 1790 if ((sc->sc_actscb->status == STATUS_SELECT)) 1791 iha_push_pend_scb(sc, sc->sc_actscb); 1792 sc->sc_actscb = NULL; 1793 } 1794 1795 target = bus_space_read_1(iot, ioh, TUL_SBID); 1796 lun = bus_space_read_1(iot, ioh, TUL_SALVC) & MSG_IDENTIFY_LUNMASK; 1797 1798 tcs = &sc->sc_tcs[target]; 1799 1800 bus_space_write_1(iot, ioh, TUL_SCONFIG0, tcs->sconfig0); 1801 bus_space_write_1(iot, ioh, TUL_SYNCM, tcs->syncm); 1802 1803 abortmsg = MSG_ABORT; /* until a valid tag has been obtained */ 1804 1805 if (tcs->ntagscb != NULL) 1806 /* There is a non-tagged I/O active on the target */ 1807 scb = tcs->ntagscb; 1808 1809 else { 1810 /* 1811 * Since there is no active non-tagged operation 1812 * read the tag type, the tag itself, and find 1813 * the appropriate scb by indexing sc_scb with 1814 * the tag. 1815 */ 1816 1817 switch (iha_wait(sc, MSG_ACCEPT)) { 1818 case -1: 1819 return (-1); 1820 case PHASE_MSG_IN: 1821 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1822 if ((iha_wait(sc, XF_FIFO_IN)) == -1) 1823 return (-1); 1824 break; 1825 default: 1826 goto abort; 1827 } 1828 1829 msg = bus_space_read_1(iot, ioh, TUL_SFIFO); /* Read Tag Msg */ 1830 1831 if ((msg < MSG_SIMPLE_Q_TAG) || (msg > MSG_ORDERED_Q_TAG)) 1832 goto abort; 1833 1834 switch (iha_wait(sc, MSG_ACCEPT)) { 1835 case -1: 1836 return (-1); 1837 case PHASE_MSG_IN: 1838 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1839 if ((iha_wait(sc, XF_FIFO_IN)) == -1) 1840 return (-1); 1841 break; 1842 default: 1843 goto abort; 1844 } 1845 1846 tag = bus_space_read_1(iot, ioh, TUL_SFIFO); /* Read Tag ID */ 1847 scb = &sc->sc_scb[tag]; 1848 1849 abortmsg = MSG_ABORT_TAG; /* Now that we have valdid tag! */ 1850 } 1851 1852 if ((scb->target != target) 1853 || (scb->lun != lun) 1854 || (scb->status != STATUS_BUSY)) { 1855 abort: 1856 iha_msgout_abort(sc, abortmsg); 1857 return (-1); 1858 } 1859 1860 sc->sc_actscb = scb; 1861 1862 if (iha_wait(sc, MSG_ACCEPT) == -1) 1863 return (-1); 1864 1865 return (iha_next_state(sc)); 1866 } 1867 1868 static int 1869 iha_msgin(sc) 1870 struct iha_softc *sc; 1871 { 1872 bus_space_tag_t iot = sc->sc_iot; 1873 bus_space_handle_t ioh = sc->sc_ioh; 1874 int flags; 1875 int phase; 1876 u_int8_t msg; 1877 1878 for (;;) { 1879 if ((bus_space_read_1(iot, ioh, TUL_SFIFOCNT) & FIFOC) > 0) 1880 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1881 1882 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1883 1884 phase = iha_wait(sc, XF_FIFO_IN); 1885 msg = bus_space_read_1(iot, ioh, TUL_SFIFO); 1886 1887 switch (msg) { 1888 case MSG_DISCONNECT: 1889 sc->sc_flags |= FLAG_EXPECT_DISC; 1890 if (iha_wait(sc, MSG_ACCEPT) != -1) 1891 iha_bad_seq(sc); 1892 phase = -1; 1893 break; 1894 case MSG_SAVEDATAPOINTER: 1895 case MSG_RESTOREPOINTERS: 1896 case MSG_NOOP: 1897 phase = iha_wait(sc, MSG_ACCEPT); 1898 break; 1899 case MSG_MESSAGE_REJECT: 1900 /* XXX - need to clear FIFO like other 'Clear ATN'?*/ 1901 iha_set_ssig(sc, REQ | BSY | SEL | ATN, 0); 1902 flags = sc->sc_actscb->tcs->flags; 1903 if ((flags & FLAG_NO_NEG_SYNC) == 0) 1904 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 1905 phase = iha_wait(sc, MSG_ACCEPT); 1906 break; 1907 case MSG_EXTENDED: 1908 phase = iha_msgin_extended(sc); 1909 break; 1910 case MSG_IGN_WIDE_RESIDUE: 1911 phase = iha_msgin_ignore_wid_resid(sc); 1912 break; 1913 case MSG_CMDCOMPLETE: 1914 sc->sc_flags |= FLAG_EXPECT_DONE_DISC; 1915 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 1916 phase = iha_wait(sc, MSG_ACCEPT); 1917 if (phase != -1) { 1918 iha_bad_seq(sc); 1919 return (-1); 1920 } 1921 break; 1922 default: 1923 printf("[debug] iha_msgin: bad msg type: %d\n", msg); 1924 phase = iha_msgout_reject(sc); 1925 break; 1926 } 1927 1928 if (phase != PHASE_MSG_IN) 1929 return (phase); 1930 } 1931 /* NOTREACHED */ 1932 } 1933 1934 static int 1935 iha_msgin_ignore_wid_resid(sc) 1936 struct iha_softc *sc; 1937 { 1938 bus_space_tag_t iot = sc->sc_iot; 1939 bus_space_handle_t ioh = sc->sc_ioh; 1940 int phase; 1941 1942 phase = iha_wait(sc, MSG_ACCEPT); 1943 1944 if (phase == PHASE_MSG_IN) { 1945 phase = iha_wait(sc, XF_FIFO_IN); 1946 1947 if (phase != -1) { 1948 bus_space_write_1(iot, ioh, TUL_SFIFO, 0); 1949 bus_space_read_1(iot, ioh, TUL_SFIFO); 1950 bus_space_read_1(iot, ioh, TUL_SFIFO); 1951 1952 phase = iha_wait(sc, MSG_ACCEPT); 1953 } 1954 } 1955 1956 return (phase); 1957 } 1958 1959 static int 1960 iha_msgin_extended(sc) 1961 struct iha_softc *sc; 1962 { 1963 bus_space_tag_t iot = sc->sc_iot; 1964 bus_space_handle_t ioh = sc->sc_ioh; 1965 int flags, i, phase, msglen, msgcode; 1966 1967 /* 1968 * XXX - can we just stop reading and reject, or do we have to 1969 * read all input, discarding the excess, and then reject 1970 */ 1971 for (i = 0; i < IHA_MAX_EXTENDED_MSG; i++) { 1972 phase = iha_wait(sc, MSG_ACCEPT); 1973 1974 if (phase != PHASE_MSG_IN) 1975 return (phase); 1976 1977 bus_space_write_4(iot, ioh, TUL_STCNT0, 1); 1978 1979 if (iha_wait(sc, XF_FIFO_IN) == -1) 1980 return (-1); 1981 1982 sc->sc_msg[i] = bus_space_read_1(iot, ioh, TUL_SFIFO); 1983 1984 if (sc->sc_msg[0] == i) 1985 break; 1986 } 1987 1988 msglen = sc->sc_msg[0]; 1989 msgcode = sc->sc_msg[1]; 1990 1991 if ((msglen == MSG_EXT_SDTR_LEN) && (msgcode == MSG_EXT_SDTR)) { 1992 if (iha_msgin_sdtr(sc) == 0) { 1993 iha_sync_done(sc); 1994 return (iha_wait(sc, MSG_ACCEPT)); 1995 } 1996 1997 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 1998 1999 phase = iha_wait(sc, MSG_ACCEPT); 2000 if (phase != PHASE_MSG_OUT) 2001 return (phase); 2002 2003 /* Clear FIFO for important message - final SYNC offer */ 2004 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2005 2006 iha_sync_done(sc); /* This is our final offer */ 2007 2008 } else if ((msglen == MSG_EXT_WDTR_LEN) && (msgcode == MSG_EXT_WDTR)) { 2009 2010 flags = sc->sc_actscb->tcs->flags; 2011 2012 if ((flags & FLAG_NO_WIDE) != 0) 2013 sc->sc_msg[2] = 0; /* Offer async xfers only */ 2014 2015 else if (sc->sc_msg[2] > 2) /* BAD MSG: 2 is max value */ 2016 return (iha_msgout_reject(sc)); 2017 2018 else if (sc->sc_msg[2] == 2) /* a request for 32 bit xfers*/ 2019 sc->sc_msg[2] = 1; /* Offer 16 instead */ 2020 2021 else { 2022 iha_wide_done(sc); 2023 if ((flags & FLAG_NO_NEG_SYNC) == 0) 2024 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 2025 return (iha_wait(sc, MSG_ACCEPT)); 2026 } 2027 2028 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 2029 2030 phase = iha_wait(sc, MSG_ACCEPT); 2031 if (phase != PHASE_MSG_OUT) 2032 return (phase); 2033 } else 2034 return (iha_msgout_reject(sc)); 2035 2036 return (iha_msgout_extended(sc)); 2037 } 2038 2039 /* 2040 * iha_msgin_sdtr - check SDTR msg in sc_msg. If the offer is 2041 * acceptable leave sc_msg as is and return 0. 2042 * If the negotiation must continue, modify sc_msg 2043 * as needed and return 1. Else return 0. 2044 */ 2045 static int 2046 iha_msgin_sdtr(sc) 2047 struct iha_softc *sc; 2048 { 2049 int flags; 2050 int newoffer; 2051 u_int8_t default_period; 2052 2053 flags = sc->sc_actscb->tcs->flags; 2054 2055 default_period = iha_rate_tbl[flags & FLAG_SCSI_RATE]; 2056 2057 if (sc->sc_msg[3] == 0) /* target offered async only. Accept it. */ 2058 return (0); 2059 2060 newoffer = 0; 2061 2062 if ((flags & FLAG_NO_SYNC) != 0) { 2063 sc->sc_msg[3] = 0; 2064 newoffer = 1; 2065 } 2066 2067 if (sc->sc_msg[3] > IHA_MAX_OFFSET) { 2068 sc->sc_msg[3] = IHA_MAX_OFFSET; 2069 newoffer = 1; 2070 } 2071 2072 if (sc->sc_msg[2] < default_period) { 2073 sc->sc_msg[2] = default_period; 2074 newoffer = 1; 2075 } 2076 2077 if (sc->sc_msg[2] >= 59) { /* XXX magic */ 2078 sc->sc_msg[3] = 0; 2079 newoffer = 1; 2080 } 2081 2082 return (newoffer); 2083 } 2084 2085 static int 2086 iha_msgout(sc, msg) 2087 struct iha_softc *sc; 2088 u_int8_t msg; 2089 { 2090 2091 bus_space_write_1(sc->sc_iot, sc->sc_ioh, TUL_SFIFO, msg); 2092 2093 return (iha_wait(sc, XF_FIFO_OUT)); 2094 } 2095 2096 static void 2097 iha_msgout_abort(sc, aborttype) 2098 struct iha_softc *sc; 2099 u_int8_t aborttype; 2100 { 2101 2102 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 2103 2104 switch (iha_wait(sc, MSG_ACCEPT)) { 2105 case -1: 2106 break; 2107 2108 case PHASE_MSG_OUT: 2109 sc->sc_flags |= FLAG_EXPECT_DISC; 2110 if (iha_msgout(sc, aborttype) != -1) 2111 iha_bad_seq(sc); 2112 break; 2113 2114 default: 2115 iha_bad_seq(sc); 2116 break; 2117 } 2118 } 2119 2120 static int 2121 iha_msgout_reject(sc) 2122 struct iha_softc *sc; 2123 { 2124 2125 iha_set_ssig(sc, REQ | BSY | SEL, ATN); 2126 2127 if (iha_wait(sc, MSG_ACCEPT) == PHASE_MSG_OUT) 2128 return (iha_msgout(sc, MSG_MESSAGE_REJECT)); 2129 2130 return (-1); 2131 } 2132 2133 static int 2134 iha_msgout_extended(sc) 2135 struct iha_softc *sc; 2136 { 2137 bus_space_tag_t iot = sc->sc_iot; 2138 bus_space_handle_t ioh = sc->sc_ioh; 2139 int phase; 2140 2141 bus_space_write_1(iot, ioh, TUL_SFIFO, MSG_EXTENDED); 2142 2143 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, 2144 sc->sc_msg, sc->sc_msg[0] + 1); 2145 2146 phase = iha_wait(sc, XF_FIFO_OUT); 2147 2148 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2149 iha_set_ssig(sc, REQ | BSY | SEL | ATN, 0); 2150 2151 return (phase); 2152 } 2153 2154 static int 2155 iha_msgout_wdtr(sc) 2156 struct iha_softc *sc; 2157 { 2158 2159 sc->sc_actscb->tcs->flags |= FLAG_WIDE_DONE; 2160 2161 sc->sc_msg[0] = MSG_EXT_WDTR_LEN; 2162 sc->sc_msg[1] = MSG_EXT_WDTR; 2163 sc->sc_msg[2] = MSG_EXT_WDTR_BUS_16_BIT; 2164 2165 return (iha_msgout_extended(sc)); 2166 } 2167 2168 static int 2169 iha_msgout_sdtr(sc) 2170 struct iha_softc *sc; 2171 { 2172 int rateindex; 2173 2174 rateindex = sc->sc_actscb->tcs->flags & FLAG_SCSI_RATE; 2175 2176 sc->sc_msg[0] = MSG_EXT_SDTR_LEN; 2177 sc->sc_msg[1] = MSG_EXT_SDTR; 2178 sc->sc_msg[2] = iha_rate_tbl[rateindex]; 2179 sc->sc_msg[3] = IHA_MAX_OFFSET; /* REQ/ACK */ 2180 2181 return (iha_msgout_extended(sc)); 2182 } 2183 2184 static void 2185 iha_wide_done(sc) 2186 struct iha_softc *sc; 2187 { 2188 bus_space_tag_t iot = sc->sc_iot; 2189 bus_space_handle_t ioh = sc->sc_ioh; 2190 struct tcs *tcs = sc->sc_actscb->tcs; 2191 2192 tcs->syncm = 0; 2193 tcs->period = 0; 2194 tcs->offset = 0; 2195 2196 if (sc->sc_msg[2] != 0) 2197 tcs->syncm |= PERIOD_WIDE_SCSI; 2198 2199 tcs->sconfig0 &= ~ALTPD; 2200 tcs->flags &= ~FLAG_SYNC_DONE; 2201 tcs->flags |= FLAG_WIDE_DONE; 2202 2203 bus_space_write_1(iot, ioh, TUL_SCONFIG0, tcs->sconfig0); 2204 bus_space_write_1(iot, ioh, TUL_SYNCM, tcs->syncm); 2205 } 2206 2207 static void 2208 iha_sync_done(sc) 2209 struct iha_softc *sc; 2210 { 2211 bus_space_tag_t iot = sc->sc_iot; 2212 bus_space_handle_t ioh = sc->sc_ioh; 2213 struct tcs *tcs = sc->sc_actscb->tcs; 2214 int i; 2215 2216 if ((tcs->flags & FLAG_SYNC_DONE) == 0) { 2217 tcs->period = sc->sc_msg[2]; 2218 tcs->offset = sc->sc_msg[3]; 2219 if (tcs->offset != 0) { 2220 tcs->syncm |= tcs->offset; 2221 2222 /* pick the highest possible rate */ 2223 for (i = 0; i < 8; i++) 2224 if (iha_rate_tbl[i] >= tcs->period) 2225 break; 2226 2227 tcs->syncm |= (i << 4); 2228 tcs->sconfig0 |= ALTPD; 2229 } 2230 2231 tcs->flags |= FLAG_SYNC_DONE; 2232 2233 bus_space_write_1(iot, ioh, TUL_SCONFIG0, tcs->sconfig0); 2234 bus_space_write_1(iot, ioh, TUL_SYNCM, tcs->syncm); 2235 } 2236 } 2237 2238 void 2239 iha_reset_chip(sc) 2240 struct iha_softc *sc; 2241 { 2242 bus_space_tag_t iot = sc->sc_iot; 2243 bus_space_handle_t ioh = sc->sc_ioh; 2244 2245 /* reset tulip chip */ 2246 2247 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSCSI); 2248 2249 do { 2250 sc->sc_sistat = bus_space_read_1(iot, ioh, TUL_SISTAT); 2251 } while ((sc->sc_sistat & SRSTD) == 0); 2252 2253 iha_set_ssig(sc, 0, 0); 2254 2255 bus_space_read_1(iot, ioh, TUL_SISTAT); /* Clear any active interrupt*/ 2256 } 2257 2258 static void 2259 iha_select(sc, scb, select_type) 2260 struct iha_softc *sc; 2261 struct iha_scsi_req_q *scb; 2262 u_int8_t select_type; 2263 { 2264 bus_space_tag_t iot = sc->sc_iot; 2265 bus_space_handle_t ioh = sc->sc_ioh; 2266 2267 switch (select_type) { 2268 case SEL_ATN: 2269 bus_space_write_1(iot, ioh, TUL_SFIFO, scb->scb_id); 2270 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, 2271 scb->cmd, scb->cmdlen); 2272 2273 scb->nextstat = 2; 2274 break; 2275 2276 case SELATNSTOP: 2277 scb->nextstat = 1; 2278 break; 2279 2280 case SEL_ATN3: 2281 bus_space_write_1(iot, ioh, TUL_SFIFO, scb->scb_id); 2282 bus_space_write_1(iot, ioh, TUL_SFIFO, scb->scb_tagmsg); 2283 bus_space_write_1(iot, ioh, TUL_SFIFO, scb->scb_tagid); 2284 2285 bus_space_write_multi_1(iot, ioh, TUL_SFIFO, scb->cmd, 2286 scb->cmdlen); 2287 2288 scb->nextstat = 2; 2289 break; 2290 2291 default: 2292 printf("[debug] iha_select() - unknown select type = 0x%02x\n", 2293 select_type); 2294 return; 2295 } 2296 2297 iha_del_pend_scb(sc, scb); 2298 scb->status = STATUS_SELECT; 2299 2300 sc->sc_actscb = scb; 2301 2302 bus_space_write_1(iot, ioh, TUL_SCMD, select_type); 2303 } 2304 2305 /* 2306 * iha_wait - wait for an interrupt to service or a SCSI bus phase change 2307 * after writing the supplied command to the tulip chip. If 2308 * the command is NO_OP, skip the command writing. 2309 */ 2310 static int 2311 iha_wait(sc, cmd) 2312 struct iha_softc *sc; 2313 u_int8_t cmd; 2314 { 2315 bus_space_tag_t iot = sc->sc_iot; 2316 bus_space_handle_t ioh = sc->sc_ioh; 2317 2318 if (cmd != NO_OP) 2319 bus_space_write_1(iot, ioh, TUL_SCMD, cmd); 2320 2321 /* 2322 * Have to do this here, in addition to in iha_isr, because 2323 * interrupts might be turned off when we get here. 2324 */ 2325 do { 2326 sc->sc_status0 = bus_space_read_1(iot, ioh, TUL_STAT0); 2327 } while ((sc->sc_status0 & INTPD) == 0); 2328 2329 sc->sc_status1 = bus_space_read_1(iot, ioh, TUL_STAT1); 2330 sc->sc_sistat = bus_space_read_1(iot, ioh, TUL_SISTAT); 2331 2332 sc->sc_phase = sc->sc_status0 & PH_MASK; 2333 2334 if ((sc->sc_sistat & SRSTD) != 0) { 2335 /* SCSI bus reset interrupt */ 2336 iha_reset_scsi_bus(sc); 2337 return (-1); 2338 } 2339 2340 if ((sc->sc_sistat & RSELED) != 0) 2341 /* Reselection interrupt */ 2342 return (iha_resel(sc)); 2343 2344 if ((sc->sc_sistat & STIMEO) != 0) { 2345 /* selected/reselected timeout interrupt */ 2346 iha_busfree(sc); 2347 return (-1); 2348 } 2349 2350 if ((sc->sc_sistat & DISCD) != 0) { 2351 /* BUS disconnection interrupt */ 2352 if ((sc->sc_flags & FLAG_EXPECT_DONE_DISC) != 0) { 2353 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2354 bus_space_write_1(iot, ioh, TUL_SCONFIG0, 2355 SCONFIG0DEFAULT); 2356 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 2357 iha_append_done_scb(sc, sc->sc_actscb, HOST_OK); 2358 sc->sc_flags &= ~FLAG_EXPECT_DONE_DISC; 2359 2360 } else if ((sc->sc_flags & FLAG_EXPECT_DISC) != 0) { 2361 bus_space_write_1(iot, ioh, TUL_SCTRL0, RSFIFO); 2362 bus_space_write_1(iot, ioh, TUL_SCONFIG0, 2363 SCONFIG0DEFAULT); 2364 bus_space_write_1(iot, ioh, TUL_SCTRL1, EHRSL); 2365 sc->sc_actscb = NULL; 2366 sc->sc_flags &= ~FLAG_EXPECT_DISC; 2367 2368 } else 2369 iha_busfree(sc); 2370 2371 return (-1); 2372 } 2373 2374 return (sc->sc_phase); 2375 } 2376 2377 /* 2378 * iha_done_scb - We have a scb which has been processed by the 2379 * adaptor, now we look to see how the operation went. 2380 */ 2381 static void 2382 iha_done_scb(sc, scb) 2383 struct iha_softc *sc; 2384 struct iha_scsi_req_q *scb; 2385 { 2386 struct scsipi_xfer *xs = scb->xs; 2387 2388 if (xs != NULL) { 2389 /* Cancel the timeout. */ 2390 callout_stop(&xs->xs_callout); 2391 2392 if (xs->datalen > 0) { 2393 bus_dmamap_sync(sc->sc_dmat, scb->dmap, 2394 0, scb->dmap->dm_mapsize, 2395 (xs->xs_control & XS_CTL_DATA_IN) ? 2396 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2397 bus_dmamap_unload(sc->sc_dmat, scb->dmap); 2398 } 2399 2400 xs->status = scb->ta_stat; 2401 2402 switch (scb->ha_stat) { 2403 case HOST_OK: 2404 switch (scb->ta_stat) { 2405 case SCSI_OK: 2406 case SCSI_CONDITION_MET: 2407 case SCSI_INTERM: 2408 case SCSI_INTERM_COND_MET: 2409 xs->resid = scb->buflen; 2410 xs->error = XS_NOERROR; 2411 if ((scb->flags & FLAG_RSENS) != 0) 2412 xs->error = XS_SENSE; 2413 break; 2414 2415 case SCSI_RESV_CONFLICT: 2416 case SCSI_BUSY: 2417 case SCSI_QUEUE_FULL: 2418 xs->error = XS_BUSY; 2419 break; 2420 2421 case SCSI_TERMINATED: 2422 case SCSI_ACA_ACTIVE: 2423 case SCSI_CHECK: 2424 scb->tcs->flags &= 2425 ~(FLAG_SYNC_DONE | FLAG_WIDE_DONE); 2426 2427 if ((scb->flags & FLAG_RSENS) != 0 || 2428 iha_push_sense_request(sc, scb) != 0) { 2429 scb->flags &= FLAG_RSENS; 2430 printf("%s: request sense failed\n", 2431 sc->sc_dev.dv_xname); 2432 xs->error = XS_DRIVER_STUFFUP; 2433 break; 2434 } 2435 2436 xs->error = XS_SENSE; 2437 return; 2438 2439 default: 2440 xs->error = XS_DRIVER_STUFFUP; 2441 break; 2442 } 2443 break; 2444 2445 case HOST_SEL_TOUT: 2446 xs->error = XS_SELTIMEOUT; 2447 break; 2448 2449 case HOST_SCSI_RST: 2450 case HOST_DEV_RST: 2451 xs->error = XS_RESET; 2452 break; 2453 2454 case HOST_SPERR: 2455 printf("%s: SCSI Parity error detected\n", 2456 sc->sc_dev.dv_xname); 2457 xs->error = XS_DRIVER_STUFFUP; 2458 break; 2459 2460 case HOST_TIMED_OUT: 2461 xs->error = XS_TIMEOUT; 2462 break; 2463 2464 case HOST_DO_DU: 2465 case HOST_BAD_PHAS: 2466 default: 2467 xs->error = XS_DRIVER_STUFFUP; 2468 break; 2469 } 2470 2471 scsipi_done(xs); 2472 } 2473 2474 iha_append_free_scb(sc, scb); 2475 } 2476 2477 static void 2478 iha_timeout(arg) 2479 void *arg; 2480 { 2481 struct iha_scsi_req_q *scb = (struct iha_scsi_req_q *)arg; 2482 struct scsipi_xfer *xs = scb->xs; 2483 struct scsipi_periph *periph = xs->xs_periph; 2484 struct iha_softc *sc; 2485 2486 sc = (void *)periph->periph_channel->chan_adapter->adapt_dev; 2487 2488 if (xs == NULL) 2489 printf("[debug] iha_timeout called with xs == NULL\n"); 2490 2491 else { 2492 scsipi_printaddr(periph); 2493 printf("SCSI OpCode 0x%02x timed out\n", xs->cmd->opcode); 2494 2495 iha_abort_xs(sc, xs, HOST_TIMED_OUT); 2496 } 2497 } 2498 2499 static void 2500 iha_exec_scb(sc, scb) 2501 struct iha_softc *sc; 2502 struct iha_scsi_req_q *scb; 2503 { 2504 bus_space_tag_t iot; 2505 bus_space_handle_t ioh; 2506 bus_dmamap_t dm; 2507 struct scsipi_xfer *xs = scb->xs; 2508 int nseg, s; 2509 2510 dm = scb->dmap; 2511 nseg = dm->dm_nsegs; 2512 2513 if (nseg > 1) { 2514 struct iha_sg_element *sg = scb->sglist; 2515 int i; 2516 2517 for (i = 0; i < nseg; i++) { 2518 sg[i].sg_len = htole32(dm->dm_segs[i].ds_len); 2519 sg[i].sg_addr = htole32(dm->dm_segs[i].ds_addr); 2520 } 2521 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 2522 scb->sgoffset, IHA_SG_SIZE, 2523 BUS_DMASYNC_PREWRITE); 2524 2525 scb->flags |= FLAG_SG; /* XXX */ 2526 scb->sg_size = scb->sg_max = nseg; 2527 2528 scb->bufaddr = scb->sg_addr; 2529 } else 2530 scb->bufaddr = dm->dm_segs[0].ds_addr; 2531 2532 if ((xs->xs_control & XS_CTL_POLL) == 0) { 2533 int timeout = xs->timeout; 2534 timeout = (timeout > 100000) ? 2535 timeout / 1000 * hz : timeout * hz / 1000; 2536 if (timeout == 0) 2537 timeout = 1; 2538 callout_reset(&xs->xs_callout, timeout, iha_timeout, scb); 2539 } 2540 2541 s = splbio(); 2542 2543 if (((scb->flags & XS_RESET) != 0) || (scb->cmd[0] == REQUEST_SENSE)) 2544 iha_push_pend_scb(sc, scb); /* Insert SCB at head of Pend */ 2545 else 2546 iha_append_pend_scb(sc, scb); /* Append SCB to tail of Pend */ 2547 2548 /* 2549 * Run through iha_main() to ensure something is active, if 2550 * only this new SCB. 2551 */ 2552 if (sc->sc_semaph != SEMAPH_IN_MAIN) { 2553 iot = sc->sc_iot; 2554 ioh = sc->sc_ioh; 2555 2556 bus_space_write_1(iot, ioh, TUL_IMSK, MASK_ALL); 2557 sc->sc_semaph = SEMAPH_IN_MAIN;; 2558 2559 splx(s); 2560 iha_main(sc); 2561 s = splbio(); 2562 2563 sc->sc_semaph = ~SEMAPH_IN_MAIN;; 2564 bus_space_write_1(iot, ioh, TUL_IMSK, (MASK_ALL & ~MSCMP)); 2565 } 2566 2567 splx(s); 2568 } 2569 2570 2571 /* 2572 * iha_set_ssig - read the current scsi signal mask, then write a new 2573 * one which turns off/on the specified signals. 2574 */ 2575 static void 2576 iha_set_ssig(sc, offsigs, onsigs) 2577 struct iha_softc *sc; 2578 u_int8_t offsigs, onsigs; 2579 { 2580 bus_space_tag_t iot = sc->sc_iot; 2581 bus_space_handle_t ioh = sc->sc_ioh; 2582 u_int8_t currsigs; 2583 2584 currsigs = bus_space_read_1(iot, ioh, TUL_SSIGI); 2585 bus_space_write_1(iot, ioh, TUL_SSIGO, (currsigs & ~offsigs) | onsigs); 2586 } 2587 2588 /* 2589 * iha_alloc_sglist - allocate and map sglist for SCB's 2590 */ 2591 static int 2592 iha_alloc_sglist(sc) 2593 struct iha_softc *sc; 2594 { 2595 bus_dma_segment_t seg; 2596 int error, rseg; 2597 2598 /* 2599 * Allocate dma-safe memory for the SCB's sglist 2600 */ 2601 if ((error = bus_dmamem_alloc(sc->sc_dmat, 2602 IHA_SG_SIZE * IHA_MAX_SCB, 2603 PAGE_SIZE, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) { 2604 printf(": unable to allocate sglist, error = %d\n", error); 2605 return (error); 2606 } 2607 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, 2608 IHA_SG_SIZE * IHA_MAX_SCB, (caddr_t *)&sc->sc_sglist, 2609 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 2610 printf(": unable to map sglist, error = %d\n", error); 2611 return (error); 2612 } 2613 2614 /* 2615 * Create and load the DMA map used for the SCBs 2616 */ 2617 if ((error = bus_dmamap_create(sc->sc_dmat, 2618 IHA_SG_SIZE * IHA_MAX_SCB, 1, IHA_SG_SIZE * IHA_MAX_SCB, 2619 0, BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) { 2620 printf(": unable to create control DMA map, error = %d\n", 2621 error); 2622 return (error); 2623 } 2624 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, 2625 sc->sc_sglist, IHA_SG_SIZE * IHA_MAX_SCB, 2626 NULL, BUS_DMA_NOWAIT)) != 0) { 2627 printf(": unable to load control DMA map, error = %d\n", error); 2628 return (error); 2629 } 2630 2631 memset(sc->sc_sglist, 0, IHA_SG_SIZE * IHA_MAX_SCB); 2632 2633 return (0); 2634 } 2635 2636 /* 2637 * iha_read_eeprom - read Serial EEPROM value & set to defaults 2638 * if required. XXX - Writing does NOT work! 2639 */ 2640 void 2641 iha_read_eeprom(sc, eeprom) 2642 struct iha_softc *sc; 2643 struct iha_eeprom *eeprom; 2644 { 2645 bus_space_tag_t iot = sc->sc_iot; 2646 bus_space_handle_t ioh = sc->sc_ioh; 2647 u_int16_t *buf = (u_int16_t *)eeprom; 2648 u_int8_t gctrl; 2649 2650 /* Enable EEProm programming */ 2651 gctrl = bus_space_read_1(iot, ioh, TUL_GCTRL0) | EEPRG; 2652 bus_space_write_1(iot, ioh, TUL_GCTRL0, gctrl); 2653 2654 /* Read EEProm */ 2655 if (iha_se2_rd_all(sc, buf) == 0) 2656 panic("%s: cannot read EEPROM\n", sc->sc_dev.dv_xname); 2657 2658 /* Disable EEProm programming */ 2659 gctrl = bus_space_read_1(iot, ioh, TUL_GCTRL0) & ~EEPRG; 2660 bus_space_write_1(iot, ioh, TUL_GCTRL0, gctrl); 2661 } 2662 2663 #ifdef notused 2664 /* 2665 * iha_se2_update_all - Update SCSI H/A configuration parameters from 2666 * serial EEPROM Setup default pattern. Only 2667 * change those values different from the values 2668 * in iha_eeprom. 2669 */ 2670 void 2671 iha_se2_update_all(sc) 2672 struct iha_softc *sc; 2673 { 2674 bus_space_tag_t iot = sc->sc_iot; 2675 bus_space_handle_t ioh = sc->sc_ioh; 2676 u_int16_t *np; 2677 u_int32_t chksum; 2678 int i; 2679 2680 /* Enable erase/write state of EEPROM */ 2681 iha_se2_instr(sc, ENABLE_ERASE); 2682 bus_space_write_1(iot, ioh, TUL_NVRAM, 0); 2683 EEP_WAIT(); 2684 2685 np = (u_int16_t *)&eeprom_default; 2686 2687 for (i = 0, chksum = 0; i < EEPROM_SIZE - 1; i++) { 2688 iha_se2_wr(sc, i, *np); 2689 chksum += *np++; 2690 } 2691 2692 chksum &= 0x0000ffff; 2693 iha_se2_wr(sc, 31, chksum); 2694 2695 /* Disable erase/write state of EEPROM */ 2696 iha_se2_instr(sc, 0); 2697 bus_space_write_1(iot, ioh, TUL_NVRAM, 0); 2698 EEP_WAIT(); 2699 } 2700 2701 /* 2702 * iha_se2_wr - write the given 16 bit value into the Serial EEPROM 2703 * at the specified offset 2704 */ 2705 void 2706 iha_se2_wr(sc, addr, writeword) 2707 struct iha_softc *sc; 2708 int addr; 2709 u_int16_t writeword; 2710 { 2711 bus_space_tag_t iot = sc->sc_iot; 2712 bus_space_handle_t ioh = sc->sc_ioh; 2713 int i, bit; 2714 2715 /* send 'WRITE' Instruction == address | WRITE bit */ 2716 iha_se2_instr(sc, addr | WRITE); 2717 2718 for (i = 16; i > 0; i--) { 2719 if (writeword & (1 << (i - 1))) 2720 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS | NVRDO); 2721 else 2722 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2723 EEP_WAIT(); 2724 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS | NVRCK); 2725 EEP_WAIT(); 2726 } 2727 2728 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2729 EEP_WAIT(); 2730 bus_space_write_1(iot, ioh, TUL_NVRAM, 0); 2731 EEP_WAIT(); 2732 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2733 EEP_WAIT(); 2734 2735 for (;;) { 2736 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS | NVRCK); 2737 EEP_WAIT(); 2738 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2739 EEP_WAIT(); 2740 bit = bus_space_read_1(iot, ioh, TUL_NVRAM) & NVRDI; 2741 EEP_WAIT(); 2742 if (bit != 0) 2743 break; /* write complete */ 2744 } 2745 2746 bus_space_write_1(iot, ioh, TUL_NVRAM, 0); 2747 } 2748 #endif 2749 2750 /* 2751 * iha_se2_rd - read & return the 16 bit value at the specified 2752 * offset in the Serial E2PROM 2753 * 2754 */ 2755 u_int16_t 2756 iha_se2_rd(sc, addr) 2757 struct iha_softc *sc; 2758 int addr; 2759 { 2760 bus_space_tag_t iot = sc->sc_iot; 2761 bus_space_handle_t ioh = sc->sc_ioh; 2762 int i, bit; 2763 u_int16_t readword; 2764 2765 /* Send 'READ' instruction == address | READ bit */ 2766 iha_se2_instr(sc, addr | READ); 2767 2768 readword = 0; 2769 for (i = 16; i > 0; i--) { 2770 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS | NVRCK); 2771 EEP_WAIT(); 2772 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2773 EEP_WAIT(); 2774 /* sample data after the following edge of clock */ 2775 bit = bus_space_read_1(iot, ioh, TUL_NVRAM) & NVRDI ? 1 : 0; 2776 EEP_WAIT(); 2777 2778 readword |= bit << (i - 1); 2779 } 2780 2781 bus_space_write_1(iot, ioh, TUL_NVRAM, 0); 2782 2783 return (readword); 2784 } 2785 2786 /* 2787 * iha_se2_rd_all - Read SCSI H/A config parameters from serial EEPROM 2788 */ 2789 int 2790 iha_se2_rd_all(sc, buf) 2791 struct iha_softc *sc; 2792 u_int16_t *buf; 2793 { 2794 struct iha_eeprom *eeprom = (struct iha_eeprom *)buf; 2795 u_int32_t chksum; 2796 int i; 2797 2798 for (i = 0, chksum = 0; i < EEPROM_SIZE - 1; i++) { 2799 *buf = iha_se2_rd(sc, i); 2800 chksum += *buf++; 2801 } 2802 *buf = iha_se2_rd(sc, 31); /* read checksum from EEPROM */ 2803 2804 chksum &= 0x0000ffff; /* lower 16 bits */ 2805 2806 return (eeprom->signature == EEP_SIGNATURE) && 2807 (eeprom->checksum == chksum); 2808 } 2809 2810 /* 2811 * iha_se2_instr - write an octet to serial E2PROM one bit at a time 2812 */ 2813 void 2814 iha_se2_instr(sc, instr) 2815 struct iha_softc *sc; 2816 int instr; 2817 { 2818 bus_space_tag_t iot = sc->sc_iot; 2819 bus_space_handle_t ioh = sc->sc_ioh; 2820 int b, i; 2821 2822 b = NVRCS | NVRDO; /* Write the start bit (== 1) */ 2823 2824 bus_space_write_1(iot, ioh, TUL_NVRAM, b); 2825 EEP_WAIT(); 2826 bus_space_write_1(iot, ioh, TUL_NVRAM, b | NVRCK); 2827 EEP_WAIT(); 2828 2829 for (i = 8; i > 0; i--) { 2830 if (instr & (1 << (i - 1))) 2831 b = NVRCS | NVRDO; /* Write a 1 bit */ 2832 else 2833 b = NVRCS; /* Write a 0 bit */ 2834 2835 bus_space_write_1(iot, ioh, TUL_NVRAM, b); 2836 EEP_WAIT(); 2837 bus_space_write_1(iot, ioh, TUL_NVRAM, b | NVRCK); 2838 EEP_WAIT(); 2839 } 2840 2841 bus_space_write_1(iot, ioh, TUL_NVRAM, NVRCS); 2842 } 2843 2844 /* 2845 * iha_reset_tcs - reset the target control structure pointed 2846 * to by tcs to default values. tcs flags 2847 * only has the negotiation done bits reset as 2848 * the other bits are fixed at initialization. 2849 */ 2850 void 2851 iha_reset_tcs(tcs, config0) 2852 struct tcs *tcs; 2853 u_int8_t config0; 2854 { 2855 2856 tcs->flags &= ~(FLAG_SYNC_DONE | FLAG_WIDE_DONE); 2857 tcs->period = 0; 2858 tcs->offset = 0; 2859 tcs->tagcnt = 0; 2860 tcs->ntagscb = NULL; 2861 tcs->syncm = 0; 2862 tcs->sconfig0 = config0; 2863 } 2864
Indexes created Thu Sep 25 16:09:42 GMT 2025